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Line 71... Line 71...
71
 * Since the set of commands that the parser must check for is significantly
71
 * Since the set of commands that the parser must check for is significantly
72
 * smaller than the number of commands supported, the parser tables contain only
72
 * smaller than the number of commands supported, the parser tables contain only
73
 * those commands required by the parser. This generally works because command
73
 * those commands required by the parser. This generally works because command
74
 * opcode ranges have standard command length encodings. So for commands that
74
 * opcode ranges have standard command length encodings. So for commands that
75
 * the parser does not need to check, it can easily skip them. This is
75
 * the parser does not need to check, it can easily skip them. This is
76
 * implementated via a per-ring length decoding vfunc.
76
 * implemented via a per-ring length decoding vfunc.
77
 *
77
 *
78
 * Unfortunately, there are a number of commands that do not follow the standard
78
 * Unfortunately, there are a number of commands that do not follow the standard
79
 * length encoding for their opcode range, primarily amongst the MI_* commands.
79
 * length encoding for their opcode range, primarily amongst the MI_* commands.
80
 * To handle this, the parser provides a way to define explicit "skip" entries
80
 * To handle this, the parser provides a way to define explicit "skip" entries
81
 * in the per-ring command tables.
81
 * in the per-ring command tables.
Line 136... Line 136...
136
	      .bits = {{
136
	      .bits = {{
137
			.offset = 0,
137
			.offset = 0,
138
			.mask = MI_GLOBAL_GTT,
138
			.mask = MI_GLOBAL_GTT,
139
			.expected = 0,
139
			.expected = 0,
140
	      }},						       ),
140
	      }},						       ),
-
 
141
	/*
-
 
142
	 * MI_BATCH_BUFFER_START requires some special handling. It's not
-
 
143
	 * really a 'skip' action but it doesn't seem like it's worth adding
-
 
144
	 * a new action. See i915_parse_cmds().
-
 
145
	 */
141
	CMD(  MI_BATCH_BUFFER_START,            SMI,   !F,  0xFF,   S  ),
146
	CMD(  MI_BATCH_BUFFER_START,            SMI,   !F,  0xFF,   S  ),
142
};
147
};
Line 143... Line 148...
143
 
148
 
144
static const struct drm_i915_cmd_descriptor render_cmds[] = {
149
static const struct drm_i915_cmd_descriptor render_cmds[] = {
Line 406... Line 411...
406
	REG64(CL_INVOCATION_COUNT),
411
	REG64(CL_INVOCATION_COUNT),
407
	REG64(CL_PRIMITIVES_COUNT),
412
	REG64(CL_PRIMITIVES_COUNT),
408
	REG64(PS_INVOCATION_COUNT),
413
	REG64(PS_INVOCATION_COUNT),
409
	REG64(PS_DEPTH_COUNT),
414
	REG64(PS_DEPTH_COUNT),
410
	OACONTROL, /* Only allowed for LRI and SRM. See below. */
415
	OACONTROL, /* Only allowed for LRI and SRM. See below. */
-
 
416
	REG64(MI_PREDICATE_SRC0),
-
 
417
	REG64(MI_PREDICATE_SRC1),
411
	GEN7_3DPRIM_END_OFFSET,
418
	GEN7_3DPRIM_END_OFFSET,
412
	GEN7_3DPRIM_START_VERTEX,
419
	GEN7_3DPRIM_START_VERTEX,
413
	GEN7_3DPRIM_VERTEX_COUNT,
420
	GEN7_3DPRIM_VERTEX_COUNT,
414
	GEN7_3DPRIM_INSTANCE_COUNT,
421
	GEN7_3DPRIM_INSTANCE_COUNT,
415
	GEN7_3DPRIM_START_INSTANCE,
422
	GEN7_3DPRIM_START_INSTANCE,
Line 707... Line 714...
707
	}
714
	}
Line 708... Line 715...
708
 
715
 
709
	BUG_ON(!validate_cmds_sorted(ring, cmd_tables, cmd_table_count));
716
	BUG_ON(!validate_cmds_sorted(ring, cmd_tables, cmd_table_count));
Line -... Line 717...
-
 
717
	BUG_ON(!validate_regs_sorted(ring));
710
	BUG_ON(!validate_regs_sorted(ring));
718
 
711
 
719
	if (hash_empty(ring->cmd_hash)) {
712
	ret = init_hash_table(ring, cmd_tables, cmd_table_count);
720
	ret = init_hash_table(ring, cmd_tables, cmd_table_count);
713
	if (ret) {
721
	if (ret) {
714
		DRM_ERROR("CMD: cmd_parser_init failed!\n");
722
		DRM_ERROR("CMD: cmd_parser_init failed!\n");
715
		fini_hash_table(ring);
723
		fini_hash_table(ring);
-
 
724
		return ret;
Line 716... Line 725...
716
		return ret;
725
	}
Line 717... Line 726...
717
	}
726
	}
718
 
727
 
Line 834... Line 843...
834
/**
843
/**
835
 * i915_needs_cmd_parser() - should a given ring use software command parsing?
844
 * i915_needs_cmd_parser() - should a given ring use software command parsing?
836
 * @ring: the ring in question
845
 * @ring: the ring in question
837
 *
846
 *
838
 * Only certain platforms require software batch buffer command parsing, and
847
 * Only certain platforms require software batch buffer command parsing, and
839
 * only when enabled via module paramter.
848
 * only when enabled via module parameter.
840
 *
849
 *
841
 * Return: true if the ring requires software command parsing
850
 * Return: true if the ring requires software command parsing
842
 */
851
 */
843
bool i915_needs_cmd_parser(struct intel_engine_cs *ring)
852
bool i915_needs_cmd_parser(struct intel_engine_cs *ring)
844
{
853
{
845
	struct drm_i915_private *dev_priv = ring->dev->dev_private;
-
 
846
 
-
 
847
	if (!ring->needs_cmd_parser)
854
	if (!ring->needs_cmd_parser)
848
		return false;
855
		return false;
Line 849... Line -...
849
 
-
 
850
	/*
-
 
851
	 * XXX: VLV is Gen7 and therefore has cmd_tables, but has PPGTT
-
 
852
	 * disabled. That will cause all of the parser's PPGTT checks to
-
 
853
	 * fail. For now, disable parsing when PPGTT is off.
-
 
854
	 */
856
 
855
	if (!dev_priv->mm.aliasing_ppgtt)
857
	if (!USES_PPGTT(ring->dev))
Line 856... Line 858...
856
		return false;
858
		return false;
857
 
859
 
Line 886... Line 888...
886
		 * another process. To do that, we need to check the value
888
		 * another process. To do that, we need to check the value
887
		 * that will be written to the register. Hence, limit
889
		 * that will be written to the register. Hence, limit
888
		 * OACONTROL writes to only MI_LOAD_REGISTER_IMM commands.
890
		 * OACONTROL writes to only MI_LOAD_REGISTER_IMM commands.
889
		 */
891
		 */
890
		if (reg_addr == OACONTROL) {
892
		if (reg_addr == OACONTROL) {
891
			if (desc->cmd.value == MI_LOAD_REGISTER_MEM)
893
			if (desc->cmd.value == MI_LOAD_REGISTER_MEM) {
-
 
894
				DRM_DEBUG_DRIVER("CMD: Rejected LRM to OACONTROL\n");
892
				return false;
895
				return false;
-
 
896
			}
Line 893... Line 897...
893
 
897
 
894
			if (desc->cmd.value == MI_LOAD_REGISTER_IMM(1))
898
			if (desc->cmd.value == MI_LOAD_REGISTER_IMM(1))
895
				*oacontrol_set = (cmd[2] != 0);
899
				*oacontrol_set = (cmd[2] != 0);
Line 957... Line 961...
957
 * @is_master: is the submitting process the drm master?
961
 * @is_master: is the submitting process the drm master?
958
 *
962
 *
959
 * Parses the specified batch buffer looking for privilege violations as
963
 * Parses the specified batch buffer looking for privilege violations as
960
 * described in the overview.
964
 * described in the overview.
961
 *
965
 *
962
 * Return: non-zero if the parser finds violations or otherwise fails
966
 * Return: non-zero if the parser finds violations or otherwise fails; -EACCES
-
 
967
 * if the batch appears legal but should use hardware parsing
963
 */
968
 */
964
int i915_parse_cmds(struct intel_engine_cs *ring,
969
int i915_parse_cmds(struct intel_engine_cs *ring,
965
		    struct drm_i915_gem_object *batch_obj,
970
		    struct drm_i915_gem_object *batch_obj,
966
		    u32 batch_start_offset,
971
		    u32 batch_start_offset,
967
		    bool is_master)
972
		    bool is_master)
Line 1004... Line 1009...
1004
					 *cmd);
1009
					 *cmd);
1005
			ret = -EINVAL;
1010
			ret = -EINVAL;
1006
			break;
1011
			break;
1007
		}
1012
		}
Line -... Line 1013...
-
 
1013
 
-
 
1014
		/*
-
 
1015
		 * If the batch buffer contains a chained batch, return an
-
 
1016
		 * error that tells the caller to abort and dispatch the
-
 
1017
		 * workload as a non-secure batch.
-
 
1018
		 */
-
 
1019
		if (desc->cmd.value == MI_BATCH_BUFFER_START) {
-
 
1020
			ret = -EACCES;
-
 
1021
			break;
-
 
1022
		}
1008
 
1023
 
1009
		if (desc->flags & CMD_DESC_FIXED)
1024
		if (desc->flags & CMD_DESC_FIXED)
1010
			length = desc->length.fixed;
1025
			length = desc->length.fixed;
1011
		else
1026
		else
Line 1059... Line 1074...
1059
	/*
1074
	/*
1060
	 * Command parser version history
1075
	 * Command parser version history
1061
	 *
1076
	 *
1062
	 * 1. Initial version. Checks batches and reports violations, but leaves
1077
	 * 1. Initial version. Checks batches and reports violations, but leaves
1063
	 *    hardware parsing enabled (so does not allow new use cases).
1078
	 *    hardware parsing enabled (so does not allow new use cases).
-
 
1079
	 * 2. Allow access to the MI_PREDICATE_SRC0 and
-
 
1080
	 *    MI_PREDICATE_SRC1 registers.
1064
	 */
1081
	 */
1065
	return 1;
1082
	return 2;
1066
}
1083
}