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Rev 3480 Rev 4104
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	iounmap(intel_private.registers);
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	iounmap(intel_private.registers);
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	intel_gtt_teardown_scratch_page();
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	intel_gtt_teardown_scratch_page();
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}
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/* Certain Gen5 chipsets require require idling the GPU before
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 * unmapping anything from the GTT when VT-d is enabled.
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 */
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static inline int needs_ilk_vtd_wa(void)
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{
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#ifdef CONFIG_INTEL_IOMMU
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	const unsigned short gpu_devid = intel_private.pcidev->device;
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	/* Query intel_iommu to see if we need the workaround. Presumably that
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	 * was loaded first.
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	 */
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	if ((gpu_devid == PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB ||
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	     gpu_devid == PCI_DEVICE_ID_INTEL_IRONLAKE_M_IG) &&
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	     intel_iommu_gfx_mapped)
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		return 1;
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#endif
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	return 0;
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}
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static bool intel_gtt_can_wc(void)
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{
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	if (INTEL_GTT_GEN <= 2)
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		return false;
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	if (INTEL_GTT_GEN >= 6)
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		return false;
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	/* Reports of major corruption with ILK vt'd enabled */
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	if (needs_ilk_vtd_wa())
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		return false;
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	return true;
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}
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}
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static int intel_gtt_init(void)
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static int intel_gtt_init(void)
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{
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{
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	u32 gma_addr;
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	u32 gma_addr;