Rev 3031 | Rev 3746 | Go to most recent revision | Show entire file | Regard whitespace | Details | Blame | Last modification | View Log | RSS feed
Rev 3031 | Rev 3480 | ||
---|---|---|---|
Line 86... | Line 86... | ||
86 | 86 | ||
87 | 87 | ||
88 | int drm_pcie_get_speed_cap_mask(struct drm_device *dev, u32 *mask) |
88 | int drm_pcie_get_speed_cap_mask(struct drm_device *dev, u32 *mask) |
89 | { |
- | |
90 | struct pci_dev *root; |
89 | { |
Line 91... | Line 90... | ||
91 | int pos; |
90 | struct pci_dev *root; |
92 | u32 lnkcap, lnkcap2; |
91 | u32 lnkcap, lnkcap2; |
93 | 92 | ||
Line 101... | Line 100... | ||
101 | return -EINVAL; |
100 | return -EINVAL; |
Line 102... | Line 101... | ||
102 | 101 | ||
103 | #if 0 |
102 | #if 0 |
Line 104... | Line -... | ||
104 | root = dev->pdev->bus->self; |
- | |
105 | - | ||
106 | pos = pci_pcie_cap(root); |
- | |
107 | if (!pos) |
- | |
108 | return -EINVAL; |
103 | root = dev->pdev->bus->self; |
109 | 104 | ||
110 | /* we've been informed via and serverworks don't make the cut */ |
105 | /* we've been informed via and serverworks don't make the cut */ |
111 | // if (root->vendor == PCI_VENDOR_ID_VIA || |
106 | if (root->vendor == PCI_VENDOR_ID_VIA || |
112 | // root->vendor == PCI_VENDOR_ID_SERVERWORKS) |
- | |
113 | // return -EINVAL; |
- | |
114 | - | ||
Line 115... | Line 107... | ||
115 | pci_read_config_dword(root, pos + PCI_EXP_LNKCAP, &lnkcap); |
107 | root->vendor == PCI_VENDOR_ID_SERVERWORKS) |
116 | pci_read_config_dword(root, pos + PCI_EXP_LNKCAP2, &lnkcap2); |
108 | return -EINVAL; |
Line 117... | Line 109... | ||
117 | 109 | ||
118 | lnkcap &= PCI_EXP_LNKCAP_SLS; |
110 | pcie_capability_read_dword(root, PCI_EXP_LNKCAP, &lnkcap); |
119 | lnkcap2 &= 0xfe; |
111 | pcie_capability_read_dword(root, PCI_EXP_LNKCAP2, &lnkcap2); |
120 | 112 | ||
121 | if (lnkcap2) { /* PCIE GEN 3.0 */ |
113 | if (lnkcap2) { /* PCIe r3.0-compliant */ |
122 | if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_2_5GB) |
114 | if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_2_5GB) |
123 | *mask |= DRM_PCIE_SPEED_25; |
115 | *mask |= DRM_PCIE_SPEED_25; |
124 | if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_5_0GB) |
116 | if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_5_0GB) |
125 | *mask |= DRM_PCIE_SPEED_50; |
117 | *mask |= DRM_PCIE_SPEED_50; |
126 | if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_8_0GB) |
118 | if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_8_0GB) |
127 | *mask |= DRM_PCIE_SPEED_80; |
119 | *mask |= DRM_PCIE_SPEED_80; |
128 | } else { |
120 | } else { /* pre-r3.0 */ |
129 | if (lnkcap & 1) |
121 | if (lnkcap & PCI_EXP_LNKCAP_SLS_2_5GB) |
Line 130... | Line 122... | ||
130 | *mask |= DRM_PCIE_SPEED_25; |
122 | *mask |= DRM_PCIE_SPEED_25; |
131 | if (lnkcap & 2) |
123 | if (lnkcap & PCI_EXP_LNKCAP_SLS_5_0GB) |
132 | *mask |= DRM_PCIE_SPEED_50; |
124 | *mask |= (DRM_PCIE_SPEED_25 | DRM_PCIE_SPEED_50); |