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1 | /* |
1 | /* |
2 | * Copyright (c) 2006 Luc Verhaegen (quirks list) |
2 | * Copyright (c) 2006 Luc Verhaegen (quirks list) |
3 | * Copyright (c) 2007-2008 Intel Corporation |
3 | * Copyright (c) 2007-2008 Intel Corporation |
4 | * Jesse Barnes |
4 | * Jesse Barnes |
5 | * Copyright 2010 Red Hat, Inc. |
5 | * Copyright 2010 Red Hat, Inc. |
6 | * |
6 | * |
7 | * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from |
7 | * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from |
8 | * FB layer. |
8 | * FB layer. |
9 | * Copyright (C) 2006 Dennis Munsie |
9 | * Copyright (C) 2006 Dennis Munsie |
10 | * |
10 | * |
11 | * Permission is hereby granted, free of charge, to any person obtaining a |
11 | * Permission is hereby granted, free of charge, to any person obtaining a |
12 | * copy of this software and associated documentation files (the "Software"), |
12 | * copy of this software and associated documentation files (the "Software"), |
13 | * to deal in the Software without restriction, including without limitation |
13 | * to deal in the Software without restriction, including without limitation |
14 | * the rights to use, copy, modify, merge, publish, distribute, sub license, |
14 | * the rights to use, copy, modify, merge, publish, distribute, sub license, |
15 | * and/or sell copies of the Software, and to permit persons to whom the |
15 | * and/or sell copies of the Software, and to permit persons to whom the |
16 | * Software is furnished to do so, subject to the following conditions: |
16 | * Software is furnished to do so, subject to the following conditions: |
17 | * |
17 | * |
18 | * The above copyright notice and this permission notice (including the |
18 | * The above copyright notice and this permission notice (including the |
19 | * next paragraph) shall be included in all copies or substantial portions |
19 | * next paragraph) shall be included in all copies or substantial portions |
20 | * of the Software. |
20 | * of the Software. |
21 | * |
21 | * |
22 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
22 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
23 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
23 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
24 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL |
24 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL |
25 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
25 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
26 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
26 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
27 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
27 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
28 | * DEALINGS IN THE SOFTWARE. |
28 | * DEALINGS IN THE SOFTWARE. |
29 | */ |
29 | */ |
30 | #include |
30 | #include |
31 | #include |
31 | #include |
32 | #include |
32 | #include |
33 | #include |
33 | #include |
34 | #include |
34 | #include |
35 | #include |
35 | #include |
36 | #include |
36 | #include |
37 | 37 | ||
38 | #define version_greater(edid, maj, min) \ |
38 | #define version_greater(edid, maj, min) \ |
39 | (((edid)->version > (maj)) || \ |
39 | (((edid)->version > (maj)) || \ |
40 | ((edid)->version == (maj) && (edid)->revision > (min))) |
40 | ((edid)->version == (maj) && (edid)->revision > (min))) |
41 | 41 | ||
42 | #define EDID_EST_TIMINGS 16 |
42 | #define EDID_EST_TIMINGS 16 |
43 | #define EDID_STD_TIMINGS 8 |
43 | #define EDID_STD_TIMINGS 8 |
44 | #define EDID_DETAILED_TIMINGS 4 |
44 | #define EDID_DETAILED_TIMINGS 4 |
45 | 45 | ||
46 | /* |
46 | /* |
47 | * EDID blocks out in the wild have a variety of bugs, try to collect |
47 | * EDID blocks out in the wild have a variety of bugs, try to collect |
48 | * them here (note that userspace may work around broken monitors first, |
48 | * them here (note that userspace may work around broken monitors first, |
49 | * but fixes should make their way here so that the kernel "just works" |
49 | * but fixes should make their way here so that the kernel "just works" |
50 | * on as many displays as possible). |
50 | * on as many displays as possible). |
51 | */ |
51 | */ |
52 | 52 | ||
53 | /* First detailed mode wrong, use largest 60Hz mode */ |
53 | /* First detailed mode wrong, use largest 60Hz mode */ |
54 | #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0) |
54 | #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0) |
55 | /* Reported 135MHz pixel clock is too high, needs adjustment */ |
55 | /* Reported 135MHz pixel clock is too high, needs adjustment */ |
56 | #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1) |
56 | #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1) |
57 | /* Prefer the largest mode at 75 Hz */ |
57 | /* Prefer the largest mode at 75 Hz */ |
58 | #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2) |
58 | #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2) |
59 | /* Detail timing is in cm not mm */ |
59 | /* Detail timing is in cm not mm */ |
60 | #define EDID_QUIRK_DETAILED_IN_CM (1 << 3) |
60 | #define EDID_QUIRK_DETAILED_IN_CM (1 << 3) |
61 | /* Detailed timing descriptors have bogus size values, so just take the |
61 | /* Detailed timing descriptors have bogus size values, so just take the |
62 | * maximum size and use that. |
62 | * maximum size and use that. |
63 | */ |
63 | */ |
64 | #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4) |
64 | #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4) |
65 | /* Monitor forgot to set the first detailed is preferred bit. */ |
65 | /* Monitor forgot to set the first detailed is preferred bit. */ |
66 | #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5) |
66 | #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5) |
67 | /* use +hsync +vsync for detailed mode */ |
67 | /* use +hsync +vsync for detailed mode */ |
68 | #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6) |
68 | #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6) |
69 | /* Force reduced-blanking timings for detailed modes */ |
69 | /* Force reduced-blanking timings for detailed modes */ |
70 | #define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7) |
70 | #define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7) |
71 | 71 | ||
72 | struct detailed_mode_closure { |
72 | struct detailed_mode_closure { |
73 | struct drm_connector *connector; |
73 | struct drm_connector *connector; |
74 | struct edid *edid; |
74 | struct edid *edid; |
75 | bool preferred; |
75 | bool preferred; |
76 | u32 quirks; |
76 | u32 quirks; |
77 | int modes; |
77 | int modes; |
78 | }; |
78 | }; |
79 | 79 | ||
80 | #define LEVEL_DMT 0 |
80 | #define LEVEL_DMT 0 |
81 | #define LEVEL_GTF 1 |
81 | #define LEVEL_GTF 1 |
82 | #define LEVEL_GTF2 2 |
82 | #define LEVEL_GTF2 2 |
83 | #define LEVEL_CVT 3 |
83 | #define LEVEL_CVT 3 |
84 | 84 | ||
85 | static struct edid_quirk { |
85 | static struct edid_quirk { |
86 | char vendor[4]; |
86 | char vendor[4]; |
87 | int product_id; |
87 | int product_id; |
88 | u32 quirks; |
88 | u32 quirks; |
89 | } edid_quirk_list[] = { |
89 | } edid_quirk_list[] = { |
90 | /* Acer AL1706 */ |
90 | /* Acer AL1706 */ |
91 | { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 }, |
91 | { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 }, |
92 | /* Acer F51 */ |
92 | /* Acer F51 */ |
93 | { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 }, |
93 | { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 }, |
94 | /* Unknown Acer */ |
94 | /* Unknown Acer */ |
95 | { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, |
95 | { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, |
96 | 96 | ||
97 | /* Belinea 10 15 55 */ |
97 | /* Belinea 10 15 55 */ |
98 | { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 }, |
98 | { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 }, |
99 | { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 }, |
99 | { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 }, |
100 | 100 | ||
101 | /* Envision Peripherals, Inc. EN-7100e */ |
101 | /* Envision Peripherals, Inc. EN-7100e */ |
102 | { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH }, |
102 | { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH }, |
103 | /* Envision EN2028 */ |
103 | /* Envision EN2028 */ |
104 | { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 }, |
104 | { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 }, |
105 | 105 | ||
106 | /* Funai Electronics PM36B */ |
106 | /* Funai Electronics PM36B */ |
107 | { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 | |
107 | { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 | |
108 | EDID_QUIRK_DETAILED_IN_CM }, |
108 | EDID_QUIRK_DETAILED_IN_CM }, |
109 | 109 | ||
110 | /* LG Philips LCD LP154W01-A5 */ |
110 | /* LG Philips LCD LP154W01-A5 */ |
111 | { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, |
111 | { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, |
112 | { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, |
112 | { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, |
113 | 113 | ||
114 | /* Philips 107p5 CRT */ |
114 | /* Philips 107p5 CRT */ |
115 | { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, |
115 | { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, |
116 | 116 | ||
117 | /* Proview AY765C */ |
117 | /* Proview AY765C */ |
118 | { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, |
118 | { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, |
119 | 119 | ||
120 | /* Samsung SyncMaster 205BW. Note: irony */ |
120 | /* Samsung SyncMaster 205BW. Note: irony */ |
121 | { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP }, |
121 | { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP }, |
122 | /* Samsung SyncMaster 22[5-6]BW */ |
122 | /* Samsung SyncMaster 22[5-6]BW */ |
123 | { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 }, |
123 | { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 }, |
124 | { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 }, |
124 | { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 }, |
125 | 125 | ||
126 | /* ViewSonic VA2026w */ |
126 | /* ViewSonic VA2026w */ |
127 | { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING }, |
127 | { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING }, |
- | 128 | ||
- | 129 | /* Medion MD 30217 PG */ |
|
- | 130 | { "MED", 0x7b8, EDID_QUIRK_PREFER_LARGE_75 }, |
|
128 | }; |
131 | }; |
129 | 132 | ||
130 | /* |
133 | /* |
131 | * Autogenerated from the DMT spec. |
134 | * Autogenerated from the DMT spec. |
132 | * This table is copied from xfree86/modes/xf86EdidModes.c. |
135 | * This table is copied from xfree86/modes/xf86EdidModes.c. |
133 | */ |
136 | */ |
134 | static const struct drm_display_mode drm_dmt_modes[] = { |
137 | static const struct drm_display_mode drm_dmt_modes[] = { |
135 | /* 640x350@85Hz */ |
138 | /* 640x350@85Hz */ |
136 | { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672, |
139 | { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672, |
137 | 736, 832, 0, 350, 382, 385, 445, 0, |
140 | 736, 832, 0, 350, 382, 385, 445, 0, |
138 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
141 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
139 | /* 640x400@85Hz */ |
142 | /* 640x400@85Hz */ |
140 | { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672, |
143 | { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672, |
141 | 736, 832, 0, 400, 401, 404, 445, 0, |
144 | 736, 832, 0, 400, 401, 404, 445, 0, |
142 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
145 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
143 | /* 720x400@85Hz */ |
146 | /* 720x400@85Hz */ |
144 | { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756, |
147 | { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756, |
145 | 828, 936, 0, 400, 401, 404, 446, 0, |
148 | 828, 936, 0, 400, 401, 404, 446, 0, |
146 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
149 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
147 | /* 640x480@60Hz */ |
150 | /* 640x480@60Hz */ |
148 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656, |
151 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656, |
149 | 752, 800, 0, 480, 489, 492, 525, 0, |
152 | 752, 800, 0, 480, 489, 492, 525, 0, |
150 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
153 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
151 | /* 640x480@72Hz */ |
154 | /* 640x480@72Hz */ |
152 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664, |
155 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664, |
153 | 704, 832, 0, 480, 489, 492, 520, 0, |
156 | 704, 832, 0, 480, 489, 492, 520, 0, |
154 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
157 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
155 | /* 640x480@75Hz */ |
158 | /* 640x480@75Hz */ |
156 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656, |
159 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656, |
157 | 720, 840, 0, 480, 481, 484, 500, 0, |
160 | 720, 840, 0, 480, 481, 484, 500, 0, |
158 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
161 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
159 | /* 640x480@85Hz */ |
162 | /* 640x480@85Hz */ |
160 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696, |
163 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696, |
161 | 752, 832, 0, 480, 481, 484, 509, 0, |
164 | 752, 832, 0, 480, 481, 484, 509, 0, |
162 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
165 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
163 | /* 800x600@56Hz */ |
166 | /* 800x600@56Hz */ |
164 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824, |
167 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824, |
165 | 896, 1024, 0, 600, 601, 603, 625, 0, |
168 | 896, 1024, 0, 600, 601, 603, 625, 0, |
166 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
169 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
167 | /* 800x600@60Hz */ |
170 | /* 800x600@60Hz */ |
168 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840, |
171 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840, |
169 | 968, 1056, 0, 600, 601, 605, 628, 0, |
172 | 968, 1056, 0, 600, 601, 605, 628, 0, |
170 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
173 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
171 | /* 800x600@72Hz */ |
174 | /* 800x600@72Hz */ |
172 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856, |
175 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856, |
173 | 976, 1040, 0, 600, 637, 643, 666, 0, |
176 | 976, 1040, 0, 600, 637, 643, 666, 0, |
174 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
177 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
175 | /* 800x600@75Hz */ |
178 | /* 800x600@75Hz */ |
176 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816, |
179 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816, |
177 | 896, 1056, 0, 600, 601, 604, 625, 0, |
180 | 896, 1056, 0, 600, 601, 604, 625, 0, |
178 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
181 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
179 | /* 800x600@85Hz */ |
182 | /* 800x600@85Hz */ |
180 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832, |
183 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832, |
181 | 896, 1048, 0, 600, 601, 604, 631, 0, |
184 | 896, 1048, 0, 600, 601, 604, 631, 0, |
182 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
185 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
183 | /* 800x600@120Hz RB */ |
186 | /* 800x600@120Hz RB */ |
184 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 73250, 800, 848, |
187 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 73250, 800, 848, |
185 | 880, 960, 0, 600, 603, 607, 636, 0, |
188 | 880, 960, 0, 600, 603, 607, 636, 0, |
186 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
189 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
187 | /* 848x480@60Hz */ |
190 | /* 848x480@60Hz */ |
188 | { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864, |
191 | { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864, |
189 | 976, 1088, 0, 480, 486, 494, 517, 0, |
192 | 976, 1088, 0, 480, 486, 494, 517, 0, |
190 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
193 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
191 | /* 1024x768@43Hz, interlace */ |
194 | /* 1024x768@43Hz, interlace */ |
192 | { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032, |
195 | { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032, |
193 | 1208, 1264, 0, 768, 768, 772, 817, 0, |
196 | 1208, 1264, 0, 768, 768, 772, 817, 0, |
194 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | |
197 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | |
195 | DRM_MODE_FLAG_INTERLACE) }, |
198 | DRM_MODE_FLAG_INTERLACE) }, |
196 | /* 1024x768@60Hz */ |
199 | /* 1024x768@60Hz */ |
197 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048, |
200 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048, |
198 | 1184, 1344, 0, 768, 771, 777, 806, 0, |
201 | 1184, 1344, 0, 768, 771, 777, 806, 0, |
199 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
202 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
200 | /* 1024x768@70Hz */ |
203 | /* 1024x768@70Hz */ |
201 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048, |
204 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048, |
202 | 1184, 1328, 0, 768, 771, 777, 806, 0, |
205 | 1184, 1328, 0, 768, 771, 777, 806, 0, |
203 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
206 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
204 | /* 1024x768@75Hz */ |
207 | /* 1024x768@75Hz */ |
205 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040, |
208 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040, |
206 | 1136, 1312, 0, 768, 769, 772, 800, 0, |
209 | 1136, 1312, 0, 768, 769, 772, 800, 0, |
207 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
210 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
208 | /* 1024x768@85Hz */ |
211 | /* 1024x768@85Hz */ |
209 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072, |
212 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072, |
210 | 1168, 1376, 0, 768, 769, 772, 808, 0, |
213 | 1168, 1376, 0, 768, 769, 772, 808, 0, |
211 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
214 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
212 | /* 1024x768@120Hz RB */ |
215 | /* 1024x768@120Hz RB */ |
213 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 115500, 1024, 1072, |
216 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 115500, 1024, 1072, |
214 | 1104, 1184, 0, 768, 771, 775, 813, 0, |
217 | 1104, 1184, 0, 768, 771, 775, 813, 0, |
215 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
218 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
216 | /* 1152x864@75Hz */ |
219 | /* 1152x864@75Hz */ |
217 | { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216, |
220 | { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216, |
218 | 1344, 1600, 0, 864, 865, 868, 900, 0, |
221 | 1344, 1600, 0, 864, 865, 868, 900, 0, |
219 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
222 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
220 | /* 1280x768@60Hz RB */ |
223 | /* 1280x768@60Hz RB */ |
221 | { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 68250, 1280, 1328, |
224 | { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 68250, 1280, 1328, |
222 | 1360, 1440, 0, 768, 771, 778, 790, 0, |
225 | 1360, 1440, 0, 768, 771, 778, 790, 0, |
223 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
226 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
224 | /* 1280x768@60Hz */ |
227 | /* 1280x768@60Hz */ |
225 | { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344, |
228 | { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344, |
226 | 1472, 1664, 0, 768, 771, 778, 798, 0, |
229 | 1472, 1664, 0, 768, 771, 778, 798, 0, |
227 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
230 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
228 | /* 1280x768@75Hz */ |
231 | /* 1280x768@75Hz */ |
229 | { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360, |
232 | { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360, |
230 | 1488, 1696, 0, 768, 771, 778, 805, 0, |
233 | 1488, 1696, 0, 768, 771, 778, 805, 0, |
231 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
234 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
232 | /* 1280x768@85Hz */ |
235 | /* 1280x768@85Hz */ |
233 | { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360, |
236 | { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360, |
234 | 1496, 1712, 0, 768, 771, 778, 809, 0, |
237 | 1496, 1712, 0, 768, 771, 778, 809, 0, |
235 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
238 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
236 | /* 1280x768@120Hz RB */ |
239 | /* 1280x768@120Hz RB */ |
237 | { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 140250, 1280, 1328, |
240 | { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 140250, 1280, 1328, |
238 | 1360, 1440, 0, 768, 771, 778, 813, 0, |
241 | 1360, 1440, 0, 768, 771, 778, 813, 0, |
239 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
242 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
240 | /* 1280x800@60Hz RB */ |
243 | /* 1280x800@60Hz RB */ |
241 | { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 71000, 1280, 1328, |
244 | { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 71000, 1280, 1328, |
242 | 1360, 1440, 0, 800, 803, 809, 823, 0, |
245 | 1360, 1440, 0, 800, 803, 809, 823, 0, |
243 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
246 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
244 | /* 1280x800@60Hz */ |
247 | /* 1280x800@60Hz */ |
245 | { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352, |
248 | { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352, |
246 | 1480, 1680, 0, 800, 803, 809, 831, 0, |
249 | 1480, 1680, 0, 800, 803, 809, 831, 0, |
247 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
250 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
248 | /* 1280x800@75Hz */ |
251 | /* 1280x800@75Hz */ |
249 | { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360, |
252 | { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360, |
250 | 1488, 1696, 0, 800, 803, 809, 838, 0, |
253 | 1488, 1696, 0, 800, 803, 809, 838, 0, |
251 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
254 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
252 | /* 1280x800@85Hz */ |
255 | /* 1280x800@85Hz */ |
253 | { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360, |
256 | { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360, |
254 | 1496, 1712, 0, 800, 803, 809, 843, 0, |
257 | 1496, 1712, 0, 800, 803, 809, 843, 0, |
255 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
258 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
256 | /* 1280x800@120Hz RB */ |
259 | /* 1280x800@120Hz RB */ |
257 | { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 146250, 1280, 1328, |
260 | { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 146250, 1280, 1328, |
258 | 1360, 1440, 0, 800, 803, 809, 847, 0, |
261 | 1360, 1440, 0, 800, 803, 809, 847, 0, |
259 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
262 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
260 | /* 1280x960@60Hz */ |
263 | /* 1280x960@60Hz */ |
261 | { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376, |
264 | { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376, |
262 | 1488, 1800, 0, 960, 961, 964, 1000, 0, |
265 | 1488, 1800, 0, 960, 961, 964, 1000, 0, |
263 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
266 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
264 | /* 1280x960@85Hz */ |
267 | /* 1280x960@85Hz */ |
265 | { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344, |
268 | { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344, |
266 | 1504, 1728, 0, 960, 961, 964, 1011, 0, |
269 | 1504, 1728, 0, 960, 961, 964, 1011, 0, |
267 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
270 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
268 | /* 1280x960@120Hz RB */ |
271 | /* 1280x960@120Hz RB */ |
269 | { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 175500, 1280, 1328, |
272 | { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 175500, 1280, 1328, |
270 | 1360, 1440, 0, 960, 963, 967, 1017, 0, |
273 | 1360, 1440, 0, 960, 963, 967, 1017, 0, |
271 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
274 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
272 | /* 1280x1024@60Hz */ |
275 | /* 1280x1024@60Hz */ |
273 | { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328, |
276 | { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328, |
274 | 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, |
277 | 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, |
275 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
278 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
276 | /* 1280x1024@75Hz */ |
279 | /* 1280x1024@75Hz */ |
277 | { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296, |
280 | { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296, |
278 | 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, |
281 | 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, |
279 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
282 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
280 | /* 1280x1024@85Hz */ |
283 | /* 1280x1024@85Hz */ |
281 | { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344, |
284 | { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344, |
282 | 1504, 1728, 0, 1024, 1025, 1028, 1072, 0, |
285 | 1504, 1728, 0, 1024, 1025, 1028, 1072, 0, |
283 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
286 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
284 | /* 1280x1024@120Hz RB */ |
287 | /* 1280x1024@120Hz RB */ |
285 | { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 187250, 1280, 1328, |
288 | { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 187250, 1280, 1328, |
286 | 1360, 1440, 0, 1024, 1027, 1034, 1084, 0, |
289 | 1360, 1440, 0, 1024, 1027, 1034, 1084, 0, |
287 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
290 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
288 | /* 1360x768@60Hz */ |
291 | /* 1360x768@60Hz */ |
289 | { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424, |
292 | { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424, |
290 | 1536, 1792, 0, 768, 771, 777, 795, 0, |
293 | 1536, 1792, 0, 768, 771, 777, 795, 0, |
291 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
294 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
292 | /* 1360x768@120Hz RB */ |
295 | /* 1360x768@120Hz RB */ |
293 | { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 148250, 1360, 1408, |
296 | { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 148250, 1360, 1408, |
294 | 1440, 1520, 0, 768, 771, 776, 813, 0, |
297 | 1440, 1520, 0, 768, 771, 776, 813, 0, |
295 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
298 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
296 | /* 1400x1050@60Hz RB */ |
299 | /* 1400x1050@60Hz RB */ |
297 | { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 101000, 1400, 1448, |
300 | { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 101000, 1400, 1448, |
298 | 1480, 1560, 0, 1050, 1053, 1057, 1080, 0, |
301 | 1480, 1560, 0, 1050, 1053, 1057, 1080, 0, |
299 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
302 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
300 | /* 1400x1050@60Hz */ |
303 | /* 1400x1050@60Hz */ |
301 | { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488, |
304 | { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488, |
302 | 1632, 1864, 0, 1050, 1053, 1057, 1089, 0, |
305 | 1632, 1864, 0, 1050, 1053, 1057, 1089, 0, |
303 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
306 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
304 | /* 1400x1050@75Hz */ |
307 | /* 1400x1050@75Hz */ |
305 | { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504, |
308 | { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504, |
306 | 1648, 1896, 0, 1050, 1053, 1057, 1099, 0, |
309 | 1648, 1896, 0, 1050, 1053, 1057, 1099, 0, |
307 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
310 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
308 | /* 1400x1050@85Hz */ |
311 | /* 1400x1050@85Hz */ |
309 | { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504, |
312 | { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504, |
310 | 1656, 1912, 0, 1050, 1053, 1057, 1105, 0, |
313 | 1656, 1912, 0, 1050, 1053, 1057, 1105, 0, |
311 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
314 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
312 | /* 1400x1050@120Hz RB */ |
315 | /* 1400x1050@120Hz RB */ |
313 | { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 208000, 1400, 1448, |
316 | { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 208000, 1400, 1448, |
314 | 1480, 1560, 0, 1050, 1053, 1057, 1112, 0, |
317 | 1480, 1560, 0, 1050, 1053, 1057, 1112, 0, |
315 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
318 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
316 | /* 1440x900@60Hz RB */ |
319 | /* 1440x900@60Hz RB */ |
317 | { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 88750, 1440, 1488, |
320 | { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 88750, 1440, 1488, |
318 | 1520, 1600, 0, 900, 903, 909, 926, 0, |
321 | 1520, 1600, 0, 900, 903, 909, 926, 0, |
319 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
322 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
320 | /* 1440x900@60Hz */ |
323 | /* 1440x900@60Hz */ |
321 | { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520, |
324 | { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520, |
322 | 1672, 1904, 0, 900, 903, 909, 934, 0, |
325 | 1672, 1904, 0, 900, 903, 909, 934, 0, |
323 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
326 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
324 | /* 1440x900@75Hz */ |
327 | /* 1440x900@75Hz */ |
325 | { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536, |
328 | { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536, |
326 | 1688, 1936, 0, 900, 903, 909, 942, 0, |
329 | 1688, 1936, 0, 900, 903, 909, 942, 0, |
327 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
330 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
328 | /* 1440x900@85Hz */ |
331 | /* 1440x900@85Hz */ |
329 | { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544, |
332 | { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544, |
330 | 1696, 1952, 0, 900, 903, 909, 948, 0, |
333 | 1696, 1952, 0, 900, 903, 909, 948, 0, |
331 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
334 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
332 | /* 1440x900@120Hz RB */ |
335 | /* 1440x900@120Hz RB */ |
333 | { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 182750, 1440, 1488, |
336 | { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 182750, 1440, 1488, |
334 | 1520, 1600, 0, 900, 903, 909, 953, 0, |
337 | 1520, 1600, 0, 900, 903, 909, 953, 0, |
335 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
338 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
336 | /* 1600x1200@60Hz */ |
339 | /* 1600x1200@60Hz */ |
337 | { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664, |
340 | { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664, |
338 | 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, |
341 | 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, |
339 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
342 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
340 | /* 1600x1200@65Hz */ |
343 | /* 1600x1200@65Hz */ |
341 | { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664, |
344 | { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664, |
342 | 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, |
345 | 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, |
343 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
346 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
344 | /* 1600x1200@70Hz */ |
347 | /* 1600x1200@70Hz */ |
345 | { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664, |
348 | { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664, |
346 | 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, |
349 | 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, |
347 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
350 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
348 | /* 1600x1200@75Hz */ |
351 | /* 1600x1200@75Hz */ |
349 | { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664, |
352 | { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664, |
350 | 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, |
353 | 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, |
351 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
354 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
352 | /* 1600x1200@85Hz */ |
355 | /* 1600x1200@85Hz */ |
353 | { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664, |
356 | { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664, |
354 | 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, |
357 | 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, |
355 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
358 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
356 | /* 1600x1200@120Hz RB */ |
359 | /* 1600x1200@120Hz RB */ |
357 | { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 268250, 1600, 1648, |
360 | { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 268250, 1600, 1648, |
358 | 1680, 1760, 0, 1200, 1203, 1207, 1271, 0, |
361 | 1680, 1760, 0, 1200, 1203, 1207, 1271, 0, |
359 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
362 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
360 | /* 1680x1050@60Hz RB */ |
363 | /* 1680x1050@60Hz RB */ |
361 | { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 119000, 1680, 1728, |
364 | { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 119000, 1680, 1728, |
362 | 1760, 1840, 0, 1050, 1053, 1059, 1080, 0, |
365 | 1760, 1840, 0, 1050, 1053, 1059, 1080, 0, |
363 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
366 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
364 | /* 1680x1050@60Hz */ |
367 | /* 1680x1050@60Hz */ |
365 | { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784, |
368 | { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784, |
366 | 1960, 2240, 0, 1050, 1053, 1059, 1089, 0, |
369 | 1960, 2240, 0, 1050, 1053, 1059, 1089, 0, |
367 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
370 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
368 | /* 1680x1050@75Hz */ |
371 | /* 1680x1050@75Hz */ |
369 | { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800, |
372 | { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800, |
370 | 1976, 2272, 0, 1050, 1053, 1059, 1099, 0, |
373 | 1976, 2272, 0, 1050, 1053, 1059, 1099, 0, |
371 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
374 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
372 | /* 1680x1050@85Hz */ |
375 | /* 1680x1050@85Hz */ |
373 | { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808, |
376 | { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808, |
374 | 1984, 2288, 0, 1050, 1053, 1059, 1105, 0, |
377 | 1984, 2288, 0, 1050, 1053, 1059, 1105, 0, |
375 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
378 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
376 | /* 1680x1050@120Hz RB */ |
379 | /* 1680x1050@120Hz RB */ |
377 | { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 245500, 1680, 1728, |
380 | { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 245500, 1680, 1728, |
378 | 1760, 1840, 0, 1050, 1053, 1059, 1112, 0, |
381 | 1760, 1840, 0, 1050, 1053, 1059, 1112, 0, |
379 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
382 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
380 | /* 1792x1344@60Hz */ |
383 | /* 1792x1344@60Hz */ |
381 | { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920, |
384 | { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920, |
382 | 2120, 2448, 0, 1344, 1345, 1348, 1394, 0, |
385 | 2120, 2448, 0, 1344, 1345, 1348, 1394, 0, |
383 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
386 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
384 | /* 1792x1344@75Hz */ |
387 | /* 1792x1344@75Hz */ |
385 | { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888, |
388 | { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888, |
386 | 2104, 2456, 0, 1344, 1345, 1348, 1417, 0, |
389 | 2104, 2456, 0, 1344, 1345, 1348, 1417, 0, |
387 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
390 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
388 | /* 1792x1344@120Hz RB */ |
391 | /* 1792x1344@120Hz RB */ |
389 | { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 333250, 1792, 1840, |
392 | { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 333250, 1792, 1840, |
390 | 1872, 1952, 0, 1344, 1347, 1351, 1423, 0, |
393 | 1872, 1952, 0, 1344, 1347, 1351, 1423, 0, |
391 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
394 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
392 | /* 1856x1392@60Hz */ |
395 | /* 1856x1392@60Hz */ |
393 | { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952, |
396 | { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952, |
394 | 2176, 2528, 0, 1392, 1393, 1396, 1439, 0, |
397 | 2176, 2528, 0, 1392, 1393, 1396, 1439, 0, |
395 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
398 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
396 | /* 1856x1392@75Hz */ |
399 | /* 1856x1392@75Hz */ |
397 | { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984, |
400 | { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984, |
398 | 2208, 2560, 0, 1392, 1395, 1399, 1500, 0, |
401 | 2208, 2560, 0, 1392, 1395, 1399, 1500, 0, |
399 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
402 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
400 | /* 1856x1392@120Hz RB */ |
403 | /* 1856x1392@120Hz RB */ |
401 | { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 356500, 1856, 1904, |
404 | { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 356500, 1856, 1904, |
402 | 1936, 2016, 0, 1392, 1395, 1399, 1474, 0, |
405 | 1936, 2016, 0, 1392, 1395, 1399, 1474, 0, |
403 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
406 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
404 | /* 1920x1200@60Hz RB */ |
407 | /* 1920x1200@60Hz RB */ |
405 | { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 154000, 1920, 1968, |
408 | { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 154000, 1920, 1968, |
406 | 2000, 2080, 0, 1200, 1203, 1209, 1235, 0, |
409 | 2000, 2080, 0, 1200, 1203, 1209, 1235, 0, |
407 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
410 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
408 | /* 1920x1200@60Hz */ |
411 | /* 1920x1200@60Hz */ |
409 | { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056, |
412 | { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056, |
410 | 2256, 2592, 0, 1200, 1203, 1209, 1245, 0, |
413 | 2256, 2592, 0, 1200, 1203, 1209, 1245, 0, |
411 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
414 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
412 | /* 1920x1200@75Hz */ |
415 | /* 1920x1200@75Hz */ |
413 | { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056, |
416 | { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056, |
414 | 2264, 2608, 0, 1200, 1203, 1209, 1255, 0, |
417 | 2264, 2608, 0, 1200, 1203, 1209, 1255, 0, |
415 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
418 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
416 | /* 1920x1200@85Hz */ |
419 | /* 1920x1200@85Hz */ |
417 | { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064, |
420 | { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064, |
418 | 2272, 2624, 0, 1200, 1203, 1209, 1262, 0, |
421 | 2272, 2624, 0, 1200, 1203, 1209, 1262, 0, |
419 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
422 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
420 | /* 1920x1200@120Hz RB */ |
423 | /* 1920x1200@120Hz RB */ |
421 | { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 317000, 1920, 1968, |
424 | { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 317000, 1920, 1968, |
422 | 2000, 2080, 0, 1200, 1203, 1209, 1271, 0, |
425 | 2000, 2080, 0, 1200, 1203, 1209, 1271, 0, |
423 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
426 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
424 | /* 1920x1440@60Hz */ |
427 | /* 1920x1440@60Hz */ |
425 | { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048, |
428 | { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048, |
426 | 2256, 2600, 0, 1440, 1441, 1444, 1500, 0, |
429 | 2256, 2600, 0, 1440, 1441, 1444, 1500, 0, |
427 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
430 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
428 | /* 1920x1440@75Hz */ |
431 | /* 1920x1440@75Hz */ |
429 | { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064, |
432 | { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064, |
430 | 2288, 2640, 0, 1440, 1441, 1444, 1500, 0, |
433 | 2288, 2640, 0, 1440, 1441, 1444, 1500, 0, |
431 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
434 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
432 | /* 1920x1440@120Hz RB */ |
435 | /* 1920x1440@120Hz RB */ |
433 | { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 380500, 1920, 1968, |
436 | { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 380500, 1920, 1968, |
434 | 2000, 2080, 0, 1440, 1443, 1447, 1525, 0, |
437 | 2000, 2080, 0, 1440, 1443, 1447, 1525, 0, |
435 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
438 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
436 | /* 2560x1600@60Hz RB */ |
439 | /* 2560x1600@60Hz RB */ |
437 | { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 268500, 2560, 2608, |
440 | { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 268500, 2560, 2608, |
438 | 2640, 2720, 0, 1600, 1603, 1609, 1646, 0, |
441 | 2640, 2720, 0, 1600, 1603, 1609, 1646, 0, |
439 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
442 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
440 | /* 2560x1600@60Hz */ |
443 | /* 2560x1600@60Hz */ |
441 | { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752, |
444 | { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752, |
442 | 3032, 3504, 0, 1600, 1603, 1609, 1658, 0, |
445 | 3032, 3504, 0, 1600, 1603, 1609, 1658, 0, |
443 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
446 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
444 | /* 2560x1600@75HZ */ |
447 | /* 2560x1600@75HZ */ |
445 | { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768, |
448 | { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768, |
446 | 3048, 3536, 0, 1600, 1603, 1609, 1672, 0, |
449 | 3048, 3536, 0, 1600, 1603, 1609, 1672, 0, |
447 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
450 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
448 | /* 2560x1600@85HZ */ |
451 | /* 2560x1600@85HZ */ |
449 | { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768, |
452 | { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768, |
450 | 3048, 3536, 0, 1600, 1603, 1609, 1682, 0, |
453 | 3048, 3536, 0, 1600, 1603, 1609, 1682, 0, |
451 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
454 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
452 | /* 2560x1600@120Hz RB */ |
455 | /* 2560x1600@120Hz RB */ |
453 | { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 552750, 2560, 2608, |
456 | { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 552750, 2560, 2608, |
454 | 2640, 2720, 0, 1600, 1603, 1609, 1694, 0, |
457 | 2640, 2720, 0, 1600, 1603, 1609, 1694, 0, |
455 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
458 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
456 | }; |
459 | }; |
457 | 460 | ||
458 | static const struct drm_display_mode edid_est_modes[] = { |
461 | static const struct drm_display_mode edid_est_modes[] = { |
459 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840, |
462 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840, |
460 | 968, 1056, 0, 600, 601, 605, 628, 0, |
463 | 968, 1056, 0, 600, 601, 605, 628, 0, |
461 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */ |
464 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */ |
462 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824, |
465 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824, |
463 | 896, 1024, 0, 600, 601, 603, 625, 0, |
466 | 896, 1024, 0, 600, 601, 603, 625, 0, |
464 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */ |
467 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */ |
465 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656, |
468 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656, |
466 | 720, 840, 0, 480, 481, 484, 500, 0, |
469 | 720, 840, 0, 480, 481, 484, 500, 0, |
467 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */ |
470 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */ |
468 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664, |
471 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664, |
469 | 704, 832, 0, 480, 489, 491, 520, 0, |
472 | 704, 832, 0, 480, 489, 491, 520, 0, |
470 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */ |
473 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */ |
471 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704, |
474 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704, |
472 | 768, 864, 0, 480, 483, 486, 525, 0, |
475 | 768, 864, 0, 480, 483, 486, 525, 0, |
473 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */ |
476 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */ |
474 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656, |
477 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656, |
475 | 752, 800, 0, 480, 490, 492, 525, 0, |
478 | 752, 800, 0, 480, 490, 492, 525, 0, |
476 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */ |
479 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */ |
477 | { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738, |
480 | { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738, |
478 | 846, 900, 0, 400, 421, 423, 449, 0, |
481 | 846, 900, 0, 400, 421, 423, 449, 0, |
479 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */ |
482 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */ |
480 | { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738, |
483 | { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738, |
481 | 846, 900, 0, 400, 412, 414, 449, 0, |
484 | 846, 900, 0, 400, 412, 414, 449, 0, |
482 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */ |
485 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */ |
483 | { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296, |
486 | { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296, |
484 | 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, |
487 | 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, |
485 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */ |
488 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */ |
486 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040, |
489 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040, |
487 | 1136, 1312, 0, 768, 769, 772, 800, 0, |
490 | 1136, 1312, 0, 768, 769, 772, 800, 0, |
488 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */ |
491 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */ |
489 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048, |
492 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048, |
490 | 1184, 1328, 0, 768, 771, 777, 806, 0, |
493 | 1184, 1328, 0, 768, 771, 777, 806, 0, |
491 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */ |
494 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */ |
492 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048, |
495 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048, |
493 | 1184, 1344, 0, 768, 771, 777, 806, 0, |
496 | 1184, 1344, 0, 768, 771, 777, 806, 0, |
494 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */ |
497 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */ |
495 | { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032, |
498 | { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032, |
496 | 1208, 1264, 0, 768, 768, 776, 817, 0, |
499 | 1208, 1264, 0, 768, 768, 776, 817, 0, |
497 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */ |
500 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */ |
498 | { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864, |
501 | { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864, |
499 | 928, 1152, 0, 624, 625, 628, 667, 0, |
502 | 928, 1152, 0, 624, 625, 628, 667, 0, |
500 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */ |
503 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */ |
501 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816, |
504 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816, |
502 | 896, 1056, 0, 600, 601, 604, 625, 0, |
505 | 896, 1056, 0, 600, 601, 604, 625, 0, |
503 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */ |
506 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */ |
504 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856, |
507 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856, |
505 | 976, 1040, 0, 600, 637, 643, 666, 0, |
508 | 976, 1040, 0, 600, 637, 643, 666, 0, |
506 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */ |
509 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */ |
507 | { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216, |
510 | { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216, |
508 | 1344, 1600, 0, 864, 865, 868, 900, 0, |
511 | 1344, 1600, 0, 864, 865, 868, 900, 0, |
509 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */ |
512 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */ |
510 | }; |
513 | }; |
511 | 514 | ||
512 | struct minimode { |
515 | struct minimode { |
513 | short w; |
516 | short w; |
514 | short h; |
517 | short h; |
515 | short r; |
518 | short r; |
516 | short rb; |
519 | short rb; |
517 | }; |
520 | }; |
518 | 521 | ||
519 | static const struct minimode est3_modes[] = { |
522 | static const struct minimode est3_modes[] = { |
520 | /* byte 6 */ |
523 | /* byte 6 */ |
521 | { 640, 350, 85, 0 }, |
524 | { 640, 350, 85, 0 }, |
522 | { 640, 400, 85, 0 }, |
525 | { 640, 400, 85, 0 }, |
523 | { 720, 400, 85, 0 }, |
526 | { 720, 400, 85, 0 }, |
524 | { 640, 480, 85, 0 }, |
527 | { 640, 480, 85, 0 }, |
525 | { 848, 480, 60, 0 }, |
528 | { 848, 480, 60, 0 }, |
526 | { 800, 600, 85, 0 }, |
529 | { 800, 600, 85, 0 }, |
527 | { 1024, 768, 85, 0 }, |
530 | { 1024, 768, 85, 0 }, |
528 | { 1152, 864, 75, 0 }, |
531 | { 1152, 864, 75, 0 }, |
529 | /* byte 7 */ |
532 | /* byte 7 */ |
530 | { 1280, 768, 60, 1 }, |
533 | { 1280, 768, 60, 1 }, |
531 | { 1280, 768, 60, 0 }, |
534 | { 1280, 768, 60, 0 }, |
532 | { 1280, 768, 75, 0 }, |
535 | { 1280, 768, 75, 0 }, |
533 | { 1280, 768, 85, 0 }, |
536 | { 1280, 768, 85, 0 }, |
534 | { 1280, 960, 60, 0 }, |
537 | { 1280, 960, 60, 0 }, |
535 | { 1280, 960, 85, 0 }, |
538 | { 1280, 960, 85, 0 }, |
536 | { 1280, 1024, 60, 0 }, |
539 | { 1280, 1024, 60, 0 }, |
537 | { 1280, 1024, 85, 0 }, |
540 | { 1280, 1024, 85, 0 }, |
538 | /* byte 8 */ |
541 | /* byte 8 */ |
539 | { 1360, 768, 60, 0 }, |
542 | { 1360, 768, 60, 0 }, |
540 | { 1440, 900, 60, 1 }, |
543 | { 1440, 900, 60, 1 }, |
541 | { 1440, 900, 60, 0 }, |
544 | { 1440, 900, 60, 0 }, |
542 | { 1440, 900, 75, 0 }, |
545 | { 1440, 900, 75, 0 }, |
543 | { 1440, 900, 85, 0 }, |
546 | { 1440, 900, 85, 0 }, |
544 | { 1400, 1050, 60, 1 }, |
547 | { 1400, 1050, 60, 1 }, |
545 | { 1400, 1050, 60, 0 }, |
548 | { 1400, 1050, 60, 0 }, |
546 | { 1400, 1050, 75, 0 }, |
549 | { 1400, 1050, 75, 0 }, |
547 | /* byte 9 */ |
550 | /* byte 9 */ |
548 | { 1400, 1050, 85, 0 }, |
551 | { 1400, 1050, 85, 0 }, |
549 | { 1680, 1050, 60, 1 }, |
552 | { 1680, 1050, 60, 1 }, |
550 | { 1680, 1050, 60, 0 }, |
553 | { 1680, 1050, 60, 0 }, |
551 | { 1680, 1050, 75, 0 }, |
554 | { 1680, 1050, 75, 0 }, |
552 | { 1680, 1050, 85, 0 }, |
555 | { 1680, 1050, 85, 0 }, |
553 | { 1600, 1200, 60, 0 }, |
556 | { 1600, 1200, 60, 0 }, |
554 | { 1600, 1200, 65, 0 }, |
557 | { 1600, 1200, 65, 0 }, |
555 | { 1600, 1200, 70, 0 }, |
558 | { 1600, 1200, 70, 0 }, |
556 | /* byte 10 */ |
559 | /* byte 10 */ |
557 | { 1600, 1200, 75, 0 }, |
560 | { 1600, 1200, 75, 0 }, |
558 | { 1600, 1200, 85, 0 }, |
561 | { 1600, 1200, 85, 0 }, |
559 | { 1792, 1344, 60, 0 }, |
562 | { 1792, 1344, 60, 0 }, |
560 | { 1792, 1344, 85, 0 }, |
563 | { 1792, 1344, 85, 0 }, |
561 | { 1856, 1392, 60, 0 }, |
564 | { 1856, 1392, 60, 0 }, |
562 | { 1856, 1392, 75, 0 }, |
565 | { 1856, 1392, 75, 0 }, |
563 | { 1920, 1200, 60, 1 }, |
566 | { 1920, 1200, 60, 1 }, |
564 | { 1920, 1200, 60, 0 }, |
567 | { 1920, 1200, 60, 0 }, |
565 | /* byte 11 */ |
568 | /* byte 11 */ |
566 | { 1920, 1200, 75, 0 }, |
569 | { 1920, 1200, 75, 0 }, |
567 | { 1920, 1200, 85, 0 }, |
570 | { 1920, 1200, 85, 0 }, |
568 | { 1920, 1440, 60, 0 }, |
571 | { 1920, 1440, 60, 0 }, |
569 | { 1920, 1440, 75, 0 }, |
572 | { 1920, 1440, 75, 0 }, |
570 | }; |
573 | }; |
571 | 574 | ||
572 | static const struct minimode extra_modes[] = { |
575 | static const struct minimode extra_modes[] = { |
573 | { 1024, 576, 60, 0 }, |
576 | { 1024, 576, 60, 0 }, |
574 | { 1366, 768, 60, 0 }, |
577 | { 1366, 768, 60, 0 }, |
575 | { 1600, 900, 60, 0 }, |
578 | { 1600, 900, 60, 0 }, |
576 | { 1680, 945, 60, 0 }, |
579 | { 1680, 945, 60, 0 }, |
577 | { 1920, 1080, 60, 0 }, |
580 | { 1920, 1080, 60, 0 }, |
578 | { 2048, 1152, 60, 0 }, |
581 | { 2048, 1152, 60, 0 }, |
579 | { 2048, 1536, 60, 0 }, |
582 | { 2048, 1536, 60, 0 }, |
580 | }; |
583 | }; |
581 | 584 | ||
582 | /* |
585 | /* |
583 | * Probably taken from CEA-861 spec. |
586 | * Probably taken from CEA-861 spec. |
584 | * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c. |
587 | * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c. |
585 | */ |
588 | */ |
586 | static const struct drm_display_mode edid_cea_modes[] = { |
589 | static const struct drm_display_mode edid_cea_modes[] = { |
587 | /* 1 - 640x480@60Hz */ |
590 | /* 1 - 640x480@60Hz */ |
588 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656, |
591 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656, |
589 | 752, 800, 0, 480, 490, 492, 525, 0, |
592 | 752, 800, 0, 480, 490, 492, 525, 0, |
590 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
593 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
591 | .vrefresh = 60, }, |
594 | .vrefresh = 60, }, |
592 | /* 2 - 720x480@60Hz */ |
595 | /* 2 - 720x480@60Hz */ |
593 | { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736, |
596 | { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736, |
594 | 798, 858, 0, 480, 489, 495, 525, 0, |
597 | 798, 858, 0, 480, 489, 495, 525, 0, |
595 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
598 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
596 | .vrefresh = 60, }, |
599 | .vrefresh = 60, }, |
597 | /* 3 - 720x480@60Hz */ |
600 | /* 3 - 720x480@60Hz */ |
598 | { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736, |
601 | { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736, |
599 | 798, 858, 0, 480, 489, 495, 525, 0, |
602 | 798, 858, 0, 480, 489, 495, 525, 0, |
600 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
603 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
601 | .vrefresh = 60, }, |
604 | .vrefresh = 60, }, |
602 | /* 4 - 1280x720@60Hz */ |
605 | /* 4 - 1280x720@60Hz */ |
603 | { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390, |
606 | { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390, |
604 | 1430, 1650, 0, 720, 725, 730, 750, 0, |
607 | 1430, 1650, 0, 720, 725, 730, 750, 0, |
605 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
608 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
606 | .vrefresh = 60, }, |
609 | .vrefresh = 60, }, |
607 | /* 5 - 1920x1080i@60Hz */ |
610 | /* 5 - 1920x1080i@60Hz */ |
608 | { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008, |
611 | { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008, |
609 | 2052, 2200, 0, 1080, 1084, 1094, 1125, 0, |
612 | 2052, 2200, 0, 1080, 1084, 1094, 1125, 0, |
610 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | |
613 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | |
611 | DRM_MODE_FLAG_INTERLACE), |
614 | DRM_MODE_FLAG_INTERLACE), |
612 | .vrefresh = 60, }, |
615 | .vrefresh = 60, }, |
613 | /* 6 - 1440x480i@60Hz */ |
616 | /* 6 - 1440x480i@60Hz */ |
614 | { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, |
617 | { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, |
615 | 1602, 1716, 0, 480, 488, 494, 525, 0, |
618 | 1602, 1716, 0, 480, 488, 494, 525, 0, |
616 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
619 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
617 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
620 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
618 | .vrefresh = 60, }, |
621 | .vrefresh = 60, }, |
619 | /* 7 - 1440x480i@60Hz */ |
622 | /* 7 - 1440x480i@60Hz */ |
620 | { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, |
623 | { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, |
621 | 1602, 1716, 0, 480, 488, 494, 525, 0, |
624 | 1602, 1716, 0, 480, 488, 494, 525, 0, |
622 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
625 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
623 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
626 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
624 | .vrefresh = 60, }, |
627 | .vrefresh = 60, }, |
625 | /* 8 - 1440x240@60Hz */ |
628 | /* 8 - 1440x240@60Hz */ |
626 | { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, |
629 | { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, |
627 | 1602, 1716, 0, 240, 244, 247, 262, 0, |
630 | 1602, 1716, 0, 240, 244, 247, 262, 0, |
628 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
631 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
629 | DRM_MODE_FLAG_DBLCLK), |
632 | DRM_MODE_FLAG_DBLCLK), |
630 | .vrefresh = 60, }, |
633 | .vrefresh = 60, }, |
631 | /* 9 - 1440x240@60Hz */ |
634 | /* 9 - 1440x240@60Hz */ |
632 | { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, |
635 | { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, |
633 | 1602, 1716, 0, 240, 244, 247, 262, 0, |
636 | 1602, 1716, 0, 240, 244, 247, 262, 0, |
634 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
637 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
635 | DRM_MODE_FLAG_DBLCLK), |
638 | DRM_MODE_FLAG_DBLCLK), |
636 | .vrefresh = 60, }, |
639 | .vrefresh = 60, }, |
637 | /* 10 - 2880x480i@60Hz */ |
640 | /* 10 - 2880x480i@60Hz */ |
638 | { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, |
641 | { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, |
639 | 3204, 3432, 0, 480, 488, 494, 525, 0, |
642 | 3204, 3432, 0, 480, 488, 494, 525, 0, |
640 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
643 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
641 | DRM_MODE_FLAG_INTERLACE), |
644 | DRM_MODE_FLAG_INTERLACE), |
642 | .vrefresh = 60, }, |
645 | .vrefresh = 60, }, |
643 | /* 11 - 2880x480i@60Hz */ |
646 | /* 11 - 2880x480i@60Hz */ |
644 | { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, |
647 | { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, |
645 | 3204, 3432, 0, 480, 488, 494, 525, 0, |
648 | 3204, 3432, 0, 480, 488, 494, 525, 0, |
646 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
649 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
647 | DRM_MODE_FLAG_INTERLACE), |
650 | DRM_MODE_FLAG_INTERLACE), |
648 | .vrefresh = 60, }, |
651 | .vrefresh = 60, }, |
649 | /* 12 - 2880x240@60Hz */ |
652 | /* 12 - 2880x240@60Hz */ |
650 | { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, |
653 | { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, |
651 | 3204, 3432, 0, 240, 244, 247, 262, 0, |
654 | 3204, 3432, 0, 240, 244, 247, 262, 0, |
652 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
655 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
653 | .vrefresh = 60, }, |
656 | .vrefresh = 60, }, |
654 | /* 13 - 2880x240@60Hz */ |
657 | /* 13 - 2880x240@60Hz */ |
655 | { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, |
658 | { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, |
656 | 3204, 3432, 0, 240, 244, 247, 262, 0, |
659 | 3204, 3432, 0, 240, 244, 247, 262, 0, |
657 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
660 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
658 | .vrefresh = 60, }, |
661 | .vrefresh = 60, }, |
659 | /* 14 - 1440x480@60Hz */ |
662 | /* 14 - 1440x480@60Hz */ |
660 | { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472, |
663 | { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472, |
661 | 1596, 1716, 0, 480, 489, 495, 525, 0, |
664 | 1596, 1716, 0, 480, 489, 495, 525, 0, |
662 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
665 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
663 | .vrefresh = 60, }, |
666 | .vrefresh = 60, }, |
664 | /* 15 - 1440x480@60Hz */ |
667 | /* 15 - 1440x480@60Hz */ |
665 | { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472, |
668 | { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472, |
666 | 1596, 1716, 0, 480, 489, 495, 525, 0, |
669 | 1596, 1716, 0, 480, 489, 495, 525, 0, |
667 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
670 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
668 | .vrefresh = 60, }, |
671 | .vrefresh = 60, }, |
669 | /* 16 - 1920x1080@60Hz */ |
672 | /* 16 - 1920x1080@60Hz */ |
670 | { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008, |
673 | { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008, |
671 | 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, |
674 | 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, |
672 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
675 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
673 | .vrefresh = 60, }, |
676 | .vrefresh = 60, }, |
674 | /* 17 - 720x576@50Hz */ |
677 | /* 17 - 720x576@50Hz */ |
675 | { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732, |
678 | { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732, |
676 | 796, 864, 0, 576, 581, 586, 625, 0, |
679 | 796, 864, 0, 576, 581, 586, 625, 0, |
677 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
680 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
678 | .vrefresh = 50, }, |
681 | .vrefresh = 50, }, |
679 | /* 18 - 720x576@50Hz */ |
682 | /* 18 - 720x576@50Hz */ |
680 | { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732, |
683 | { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732, |
681 | 796, 864, 0, 576, 581, 586, 625, 0, |
684 | 796, 864, 0, 576, 581, 586, 625, 0, |
682 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
685 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
683 | .vrefresh = 50, }, |
686 | .vrefresh = 50, }, |
684 | /* 19 - 1280x720@50Hz */ |
687 | /* 19 - 1280x720@50Hz */ |
685 | { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720, |
688 | { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720, |
686 | 1760, 1980, 0, 720, 725, 730, 750, 0, |
689 | 1760, 1980, 0, 720, 725, 730, 750, 0, |
687 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
690 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
688 | .vrefresh = 50, }, |
691 | .vrefresh = 50, }, |
689 | /* 20 - 1920x1080i@50Hz */ |
692 | /* 20 - 1920x1080i@50Hz */ |
690 | { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448, |
693 | { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448, |
691 | 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, |
694 | 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, |
692 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | |
695 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | |
693 | DRM_MODE_FLAG_INTERLACE), |
696 | DRM_MODE_FLAG_INTERLACE), |
694 | .vrefresh = 50, }, |
697 | .vrefresh = 50, }, |
695 | /* 21 - 1440x576i@50Hz */ |
698 | /* 21 - 1440x576i@50Hz */ |
696 | { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, |
699 | { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, |
697 | 1590, 1728, 0, 576, 580, 586, 625, 0, |
700 | 1590, 1728, 0, 576, 580, 586, 625, 0, |
698 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
701 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
699 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
702 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
700 | .vrefresh = 50, }, |
703 | .vrefresh = 50, }, |
701 | /* 22 - 1440x576i@50Hz */ |
704 | /* 22 - 1440x576i@50Hz */ |
702 | { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, |
705 | { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, |
703 | 1590, 1728, 0, 576, 580, 586, 625, 0, |
706 | 1590, 1728, 0, 576, 580, 586, 625, 0, |
704 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
707 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
705 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
708 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
706 | .vrefresh = 50, }, |
709 | .vrefresh = 50, }, |
707 | /* 23 - 1440x288@50Hz */ |
710 | /* 23 - 1440x288@50Hz */ |
708 | { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, |
711 | { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, |
709 | 1590, 1728, 0, 288, 290, 293, 312, 0, |
712 | 1590, 1728, 0, 288, 290, 293, 312, 0, |
710 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
713 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
711 | DRM_MODE_FLAG_DBLCLK), |
714 | DRM_MODE_FLAG_DBLCLK), |
712 | .vrefresh = 50, }, |
715 | .vrefresh = 50, }, |
713 | /* 24 - 1440x288@50Hz */ |
716 | /* 24 - 1440x288@50Hz */ |
714 | { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, |
717 | { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, |
715 | 1590, 1728, 0, 288, 290, 293, 312, 0, |
718 | 1590, 1728, 0, 288, 290, 293, 312, 0, |
716 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
719 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
717 | DRM_MODE_FLAG_DBLCLK), |
720 | DRM_MODE_FLAG_DBLCLK), |
718 | .vrefresh = 50, }, |
721 | .vrefresh = 50, }, |
719 | /* 25 - 2880x576i@50Hz */ |
722 | /* 25 - 2880x576i@50Hz */ |
720 | { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, |
723 | { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, |
721 | 3180, 3456, 0, 576, 580, 586, 625, 0, |
724 | 3180, 3456, 0, 576, 580, 586, 625, 0, |
722 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
725 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
723 | DRM_MODE_FLAG_INTERLACE), |
726 | DRM_MODE_FLAG_INTERLACE), |
724 | .vrefresh = 50, }, |
727 | .vrefresh = 50, }, |
725 | /* 26 - 2880x576i@50Hz */ |
728 | /* 26 - 2880x576i@50Hz */ |
726 | { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, |
729 | { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, |
727 | 3180, 3456, 0, 576, 580, 586, 625, 0, |
730 | 3180, 3456, 0, 576, 580, 586, 625, 0, |
728 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
731 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
729 | DRM_MODE_FLAG_INTERLACE), |
732 | DRM_MODE_FLAG_INTERLACE), |
730 | .vrefresh = 50, }, |
733 | .vrefresh = 50, }, |
731 | /* 27 - 2880x288@50Hz */ |
734 | /* 27 - 2880x288@50Hz */ |
732 | { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, |
735 | { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, |
733 | 3180, 3456, 0, 288, 290, 293, 312, 0, |
736 | 3180, 3456, 0, 288, 290, 293, 312, 0, |
734 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
737 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
735 | .vrefresh = 50, }, |
738 | .vrefresh = 50, }, |
736 | /* 28 - 2880x288@50Hz */ |
739 | /* 28 - 2880x288@50Hz */ |
737 | { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, |
740 | { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, |
738 | 3180, 3456, 0, 288, 290, 293, 312, 0, |
741 | 3180, 3456, 0, 288, 290, 293, 312, 0, |
739 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
742 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
740 | .vrefresh = 50, }, |
743 | .vrefresh = 50, }, |
741 | /* 29 - 1440x576@50Hz */ |
744 | /* 29 - 1440x576@50Hz */ |
742 | { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, |
745 | { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, |
743 | 1592, 1728, 0, 576, 581, 586, 625, 0, |
746 | 1592, 1728, 0, 576, 581, 586, 625, 0, |
744 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
747 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
745 | .vrefresh = 50, }, |
748 | .vrefresh = 50, }, |
746 | /* 30 - 1440x576@50Hz */ |
749 | /* 30 - 1440x576@50Hz */ |
747 | { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, |
750 | { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, |
748 | 1592, 1728, 0, 576, 581, 586, 625, 0, |
751 | 1592, 1728, 0, 576, 581, 586, 625, 0, |
749 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
752 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
750 | .vrefresh = 50, }, |
753 | .vrefresh = 50, }, |
751 | /* 31 - 1920x1080@50Hz */ |
754 | /* 31 - 1920x1080@50Hz */ |
752 | { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448, |
755 | { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448, |
753 | 2492, 2640, 0, 1080, 1084, 1089, 1125, 0, |
756 | 2492, 2640, 0, 1080, 1084, 1089, 1125, 0, |
754 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
757 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
755 | .vrefresh = 50, }, |
758 | .vrefresh = 50, }, |
756 | /* 32 - 1920x1080@24Hz */ |
759 | /* 32 - 1920x1080@24Hz */ |
757 | { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558, |
760 | { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558, |
758 | 2602, 2750, 0, 1080, 1084, 1089, 1125, 0, |
761 | 2602, 2750, 0, 1080, 1084, 1089, 1125, 0, |
759 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
762 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
760 | .vrefresh = 24, }, |
763 | .vrefresh = 24, }, |
761 | /* 33 - 1920x1080@25Hz */ |
764 | /* 33 - 1920x1080@25Hz */ |
762 | { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448, |
765 | { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448, |
763 | 2492, 2640, 0, 1080, 1084, 1089, 1125, 0, |
766 | 2492, 2640, 0, 1080, 1084, 1089, 1125, 0, |
764 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
767 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
765 | .vrefresh = 25, }, |
768 | .vrefresh = 25, }, |
766 | /* 34 - 1920x1080@30Hz */ |
769 | /* 34 - 1920x1080@30Hz */ |
767 | { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008, |
770 | { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008, |
768 | 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, |
771 | 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, |
769 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
772 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
770 | .vrefresh = 30, }, |
773 | .vrefresh = 30, }, |
771 | /* 35 - 2880x480@60Hz */ |
774 | /* 35 - 2880x480@60Hz */ |
772 | { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944, |
775 | { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944, |
773 | 3192, 3432, 0, 480, 489, 495, 525, 0, |
776 | 3192, 3432, 0, 480, 489, 495, 525, 0, |
774 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
777 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
775 | .vrefresh = 60, }, |
778 | .vrefresh = 60, }, |
776 | /* 36 - 2880x480@60Hz */ |
779 | /* 36 - 2880x480@60Hz */ |
777 | { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944, |
780 | { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944, |
778 | 3192, 3432, 0, 480, 489, 495, 525, 0, |
781 | 3192, 3432, 0, 480, 489, 495, 525, 0, |
779 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
782 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
780 | .vrefresh = 60, }, |
783 | .vrefresh = 60, }, |
781 | /* 37 - 2880x576@50Hz */ |
784 | /* 37 - 2880x576@50Hz */ |
782 | { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928, |
785 | { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928, |
783 | 3184, 3456, 0, 576, 581, 586, 625, 0, |
786 | 3184, 3456, 0, 576, 581, 586, 625, 0, |
784 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
787 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
785 | .vrefresh = 50, }, |
788 | .vrefresh = 50, }, |
786 | /* 38 - 2880x576@50Hz */ |
789 | /* 38 - 2880x576@50Hz */ |
787 | { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928, |
790 | { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928, |
788 | 3184, 3456, 0, 576, 581, 586, 625, 0, |
791 | 3184, 3456, 0, 576, 581, 586, 625, 0, |
789 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
792 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
790 | .vrefresh = 50, }, |
793 | .vrefresh = 50, }, |
791 | /* 39 - 1920x1080i@50Hz */ |
794 | /* 39 - 1920x1080i@50Hz */ |
792 | { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952, |
795 | { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952, |
793 | 2120, 2304, 0, 1080, 1126, 1136, 1250, 0, |
796 | 2120, 2304, 0, 1080, 1126, 1136, 1250, 0, |
794 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC | |
797 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC | |
795 | DRM_MODE_FLAG_INTERLACE), |
798 | DRM_MODE_FLAG_INTERLACE), |
796 | .vrefresh = 50, }, |
799 | .vrefresh = 50, }, |
797 | /* 40 - 1920x1080i@100Hz */ |
800 | /* 40 - 1920x1080i@100Hz */ |
798 | { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448, |
801 | { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448, |
799 | 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, |
802 | 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, |
800 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | |
803 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | |
801 | DRM_MODE_FLAG_INTERLACE), |
804 | DRM_MODE_FLAG_INTERLACE), |
802 | .vrefresh = 100, }, |
805 | .vrefresh = 100, }, |
803 | /* 41 - 1280x720@100Hz */ |
806 | /* 41 - 1280x720@100Hz */ |
804 | { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720, |
807 | { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720, |
805 | 1760, 1980, 0, 720, 725, 730, 750, 0, |
808 | 1760, 1980, 0, 720, 725, 730, 750, 0, |
806 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
809 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
807 | .vrefresh = 100, }, |
810 | .vrefresh = 100, }, |
808 | /* 42 - 720x576@100Hz */ |
811 | /* 42 - 720x576@100Hz */ |
809 | { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732, |
812 | { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732, |
810 | 796, 864, 0, 576, 581, 586, 625, 0, |
813 | 796, 864, 0, 576, 581, 586, 625, 0, |
811 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
814 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
812 | .vrefresh = 100, }, |
815 | .vrefresh = 100, }, |
813 | /* 43 - 720x576@100Hz */ |
816 | /* 43 - 720x576@100Hz */ |
814 | { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732, |
817 | { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732, |
815 | 796, 864, 0, 576, 581, 586, 625, 0, |
818 | 796, 864, 0, 576, 581, 586, 625, 0, |
816 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
819 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
817 | .vrefresh = 100, }, |
820 | .vrefresh = 100, }, |
818 | /* 44 - 1440x576i@100Hz */ |
821 | /* 44 - 1440x576i@100Hz */ |
819 | { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, |
822 | { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, |
820 | 1590, 1728, 0, 576, 580, 586, 625, 0, |
823 | 1590, 1728, 0, 576, 580, 586, 625, 0, |
821 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
824 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
822 | DRM_MODE_FLAG_DBLCLK), |
825 | DRM_MODE_FLAG_DBLCLK), |
823 | .vrefresh = 100, }, |
826 | .vrefresh = 100, }, |
824 | /* 45 - 1440x576i@100Hz */ |
827 | /* 45 - 1440x576i@100Hz */ |
825 | { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, |
828 | { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, |
826 | 1590, 1728, 0, 576, 580, 586, 625, 0, |
829 | 1590, 1728, 0, 576, 580, 586, 625, 0, |
827 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
830 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
828 | DRM_MODE_FLAG_DBLCLK), |
831 | DRM_MODE_FLAG_DBLCLK), |
829 | .vrefresh = 100, }, |
832 | .vrefresh = 100, }, |
830 | /* 46 - 1920x1080i@120Hz */ |
833 | /* 46 - 1920x1080i@120Hz */ |
831 | { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008, |
834 | { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008, |
832 | 2052, 2200, 0, 1080, 1084, 1094, 1125, 0, |
835 | 2052, 2200, 0, 1080, 1084, 1094, 1125, 0, |
833 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | |
836 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | |
834 | DRM_MODE_FLAG_INTERLACE), |
837 | DRM_MODE_FLAG_INTERLACE), |
835 | .vrefresh = 120, }, |
838 | .vrefresh = 120, }, |
836 | /* 47 - 1280x720@120Hz */ |
839 | /* 47 - 1280x720@120Hz */ |
837 | { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390, |
840 | { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390, |
838 | 1430, 1650, 0, 720, 725, 730, 750, 0, |
841 | 1430, 1650, 0, 720, 725, 730, 750, 0, |
839 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
842 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
840 | .vrefresh = 120, }, |
843 | .vrefresh = 120, }, |
841 | /* 48 - 720x480@120Hz */ |
844 | /* 48 - 720x480@120Hz */ |
842 | { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736, |
845 | { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736, |
843 | 798, 858, 0, 480, 489, 495, 525, 0, |
846 | 798, 858, 0, 480, 489, 495, 525, 0, |
844 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
847 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
845 | .vrefresh = 120, }, |
848 | .vrefresh = 120, }, |
846 | /* 49 - 720x480@120Hz */ |
849 | /* 49 - 720x480@120Hz */ |
847 | { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736, |
850 | { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736, |
848 | 798, 858, 0, 480, 489, 495, 525, 0, |
851 | 798, 858, 0, 480, 489, 495, 525, 0, |
849 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
852 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
850 | .vrefresh = 120, }, |
853 | .vrefresh = 120, }, |
851 | /* 50 - 1440x480i@120Hz */ |
854 | /* 50 - 1440x480i@120Hz */ |
852 | { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478, |
855 | { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478, |
853 | 1602, 1716, 0, 480, 488, 494, 525, 0, |
856 | 1602, 1716, 0, 480, 488, 494, 525, 0, |
854 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
857 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
855 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
858 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
856 | .vrefresh = 120, }, |
859 | .vrefresh = 120, }, |
857 | /* 51 - 1440x480i@120Hz */ |
860 | /* 51 - 1440x480i@120Hz */ |
858 | { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478, |
861 | { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478, |
859 | 1602, 1716, 0, 480, 488, 494, 525, 0, |
862 | 1602, 1716, 0, 480, 488, 494, 525, 0, |
860 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
863 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
861 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
864 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
862 | .vrefresh = 120, }, |
865 | .vrefresh = 120, }, |
863 | /* 52 - 720x576@200Hz */ |
866 | /* 52 - 720x576@200Hz */ |
864 | { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732, |
867 | { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732, |
865 | 796, 864, 0, 576, 581, 586, 625, 0, |
868 | 796, 864, 0, 576, 581, 586, 625, 0, |
866 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
869 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
867 | .vrefresh = 200, }, |
870 | .vrefresh = 200, }, |
868 | /* 53 - 720x576@200Hz */ |
871 | /* 53 - 720x576@200Hz */ |
869 | { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732, |
872 | { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732, |
870 | 796, 864, 0, 576, 581, 586, 625, 0, |
873 | 796, 864, 0, 576, 581, 586, 625, 0, |
871 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
874 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
872 | .vrefresh = 200, }, |
875 | .vrefresh = 200, }, |
873 | /* 54 - 1440x576i@200Hz */ |
876 | /* 54 - 1440x576i@200Hz */ |
874 | { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464, |
877 | { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464, |
875 | 1590, 1728, 0, 576, 580, 586, 625, 0, |
878 | 1590, 1728, 0, 576, 580, 586, 625, 0, |
876 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
879 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
877 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
880 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
878 | .vrefresh = 200, }, |
881 | .vrefresh = 200, }, |
879 | /* 55 - 1440x576i@200Hz */ |
882 | /* 55 - 1440x576i@200Hz */ |
880 | { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464, |
883 | { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464, |
881 | 1590, 1728, 0, 576, 580, 586, 625, 0, |
884 | 1590, 1728, 0, 576, 580, 586, 625, 0, |
882 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
885 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
883 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
886 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
884 | .vrefresh = 200, }, |
887 | .vrefresh = 200, }, |
885 | /* 56 - 720x480@240Hz */ |
888 | /* 56 - 720x480@240Hz */ |
886 | { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736, |
889 | { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736, |
887 | 798, 858, 0, 480, 489, 495, 525, 0, |
890 | 798, 858, 0, 480, 489, 495, 525, 0, |
888 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
891 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
889 | .vrefresh = 240, }, |
892 | .vrefresh = 240, }, |
890 | /* 57 - 720x480@240Hz */ |
893 | /* 57 - 720x480@240Hz */ |
891 | { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736, |
894 | { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736, |
892 | 798, 858, 0, 480, 489, 495, 525, 0, |
895 | 798, 858, 0, 480, 489, 495, 525, 0, |
893 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
896 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
894 | .vrefresh = 240, }, |
897 | .vrefresh = 240, }, |
895 | /* 58 - 1440x480i@240 */ |
898 | /* 58 - 1440x480i@240 */ |
896 | { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478, |
899 | { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478, |
897 | 1602, 1716, 0, 480, 488, 494, 525, 0, |
900 | 1602, 1716, 0, 480, 488, 494, 525, 0, |
898 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
901 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
899 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
902 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
900 | .vrefresh = 240, }, |
903 | .vrefresh = 240, }, |
901 | /* 59 - 1440x480i@240 */ |
904 | /* 59 - 1440x480i@240 */ |
902 | { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478, |
905 | { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478, |
903 | 1602, 1716, 0, 480, 488, 494, 525, 0, |
906 | 1602, 1716, 0, 480, 488, 494, 525, 0, |
904 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
907 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
905 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
908 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
906 | .vrefresh = 240, }, |
909 | .vrefresh = 240, }, |
907 | /* 60 - 1280x720@24Hz */ |
910 | /* 60 - 1280x720@24Hz */ |
908 | { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040, |
911 | { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040, |
909 | 3080, 3300, 0, 720, 725, 730, 750, 0, |
912 | 3080, 3300, 0, 720, 725, 730, 750, 0, |
910 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
913 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
911 | .vrefresh = 24, }, |
914 | .vrefresh = 24, }, |
912 | /* 61 - 1280x720@25Hz */ |
915 | /* 61 - 1280x720@25Hz */ |
913 | { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700, |
916 | { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700, |
914 | 3740, 3960, 0, 720, 725, 730, 750, 0, |
917 | 3740, 3960, 0, 720, 725, 730, 750, 0, |
915 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
918 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
916 | .vrefresh = 25, }, |
919 | .vrefresh = 25, }, |
917 | /* 62 - 1280x720@30Hz */ |
920 | /* 62 - 1280x720@30Hz */ |
918 | { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040, |
921 | { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040, |
919 | 3080, 3300, 0, 720, 725, 730, 750, 0, |
922 | 3080, 3300, 0, 720, 725, 730, 750, 0, |
920 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
923 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
921 | .vrefresh = 30, }, |
924 | .vrefresh = 30, }, |
922 | /* 63 - 1920x1080@120Hz */ |
925 | /* 63 - 1920x1080@120Hz */ |
923 | { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008, |
926 | { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008, |
924 | 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, |
927 | 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, |
925 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
928 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
926 | .vrefresh = 120, }, |
929 | .vrefresh = 120, }, |
927 | /* 64 - 1920x1080@100Hz */ |
930 | /* 64 - 1920x1080@100Hz */ |
928 | { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448, |
931 | { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448, |
929 | 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, |
932 | 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, |
930 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
933 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
931 | .vrefresh = 100, }, |
934 | .vrefresh = 100, }, |
932 | }; |
935 | }; |
- | 936 | ||
- | 937 | /* |
|
- | 938 | * HDMI 1.4 4k modes. |
|
- | 939 | */ |
|
- | 940 | static const struct drm_display_mode edid_4k_modes[] = { |
|
- | 941 | /* 1 - 3840x2160@30Hz */ |
|
- | 942 | { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, |
|
- | 943 | 3840, 4016, 4104, 4400, 0, |
|
- | 944 | 2160, 2168, 2178, 2250, 0, |
|
- | 945 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
|
- | 946 | .vrefresh = 30, }, |
|
- | 947 | /* 2 - 3840x2160@25Hz */ |
|
- | 948 | { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, |
|
- | 949 | 3840, 4896, 4984, 5280, 0, |
|
- | 950 | 2160, 2168, 2178, 2250, 0, |
|
- | 951 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
|
- | 952 | .vrefresh = 25, }, |
|
- | 953 | /* 3 - 3840x2160@24Hz */ |
|
- | 954 | { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, |
|
- | 955 | 3840, 5116, 5204, 5500, 0, |
|
- | 956 | 2160, 2168, 2178, 2250, 0, |
|
- | 957 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
|
- | 958 | .vrefresh = 24, }, |
|
- | 959 | /* 4 - 4096x2160@24Hz (SMPTE) */ |
|
- | 960 | { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000, |
|
- | 961 | 4096, 5116, 5204, 5500, 0, |
|
- | 962 | 2160, 2168, 2178, 2250, 0, |
|
- | 963 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
|
- | 964 | .vrefresh = 24, }, |
|
- | 965 | }; |
|
933 | 966 | ||
934 | /*** DDC fetch and block validation ***/ |
967 | /*** DDC fetch and block validation ***/ |
935 | 968 | ||
936 | static const u8 edid_header[] = { |
969 | static const u8 edid_header[] = { |
937 | 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 |
970 | 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 |
938 | }; |
971 | }; |
939 | 972 | ||
940 | /* |
973 | /* |
941 | * Sanity check the header of the base EDID block. Return 8 if the header |
974 | * Sanity check the header of the base EDID block. Return 8 if the header |
942 | * is perfect, down to 0 if it's totally wrong. |
975 | * is perfect, down to 0 if it's totally wrong. |
943 | */ |
976 | */ |
944 | int drm_edid_header_is_valid(const u8 *raw_edid) |
977 | int drm_edid_header_is_valid(const u8 *raw_edid) |
945 | { |
978 | { |
946 | int i, score = 0; |
979 | int i, score = 0; |
947 | 980 | ||
948 | for (i = 0; i < sizeof(edid_header); i++) |
981 | for (i = 0; i < sizeof(edid_header); i++) |
949 | if (raw_edid[i] == edid_header[i]) |
982 | if (raw_edid[i] == edid_header[i]) |
950 | score++; |
983 | score++; |
951 | 984 | ||
952 | return score; |
985 | return score; |
953 | } |
986 | } |
954 | EXPORT_SYMBOL(drm_edid_header_is_valid); |
987 | EXPORT_SYMBOL(drm_edid_header_is_valid); |
955 | 988 | ||
956 | static int edid_fixup __read_mostly = 6; |
989 | static int edid_fixup __read_mostly = 6; |
957 | module_param_named(edid_fixup, edid_fixup, int, 0400); |
990 | module_param_named(edid_fixup, edid_fixup, int, 0400); |
958 | MODULE_PARM_DESC(edid_fixup, |
991 | MODULE_PARM_DESC(edid_fixup, |
959 | "Minimum number of valid EDID header bytes (0-8, default 6)"); |
992 | "Minimum number of valid EDID header bytes (0-8, default 6)"); |
960 | 993 | ||
961 | /* |
994 | /* |
962 | * Sanity check the EDID block (base or extension). Return 0 if the block |
995 | * Sanity check the EDID block (base or extension). Return 0 if the block |
963 | * doesn't check out, or 1 if it's valid. |
996 | * doesn't check out, or 1 if it's valid. |
964 | */ |
997 | */ |
965 | bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid) |
998 | bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid) |
966 | { |
999 | { |
967 | int i; |
1000 | int i; |
968 | u8 csum = 0; |
1001 | u8 csum = 0; |
969 | struct edid *edid = (struct edid *)raw_edid; |
1002 | struct edid *edid = (struct edid *)raw_edid; |
970 | 1003 | ||
971 | if (WARN_ON(!raw_edid)) |
1004 | if (WARN_ON(!raw_edid)) |
972 | return false; |
1005 | return false; |
973 | 1006 | ||
974 | if (edid_fixup > 8 || edid_fixup < 0) |
1007 | if (edid_fixup > 8 || edid_fixup < 0) |
975 | edid_fixup = 6; |
1008 | edid_fixup = 6; |
976 | 1009 | ||
977 | if (block == 0) { |
1010 | if (block == 0) { |
978 | int score = drm_edid_header_is_valid(raw_edid); |
1011 | int score = drm_edid_header_is_valid(raw_edid); |
979 | if (score == 8) ; |
1012 | if (score == 8) ; |
980 | else if (score >= edid_fixup) { |
1013 | else if (score >= edid_fixup) { |
981 | DRM_DEBUG("Fixing EDID header, your hardware may be failing\n"); |
1014 | DRM_DEBUG("Fixing EDID header, your hardware may be failing\n"); |
982 | memcpy(raw_edid, edid_header, sizeof(edid_header)); |
1015 | memcpy(raw_edid, edid_header, sizeof(edid_header)); |
983 | } else { |
1016 | } else { |
984 | goto bad; |
1017 | goto bad; |
985 | } |
1018 | } |
986 | } |
1019 | } |
987 | 1020 | ||
988 | for (i = 0; i < EDID_LENGTH; i++) |
1021 | for (i = 0; i < EDID_LENGTH; i++) |
989 | csum += raw_edid[i]; |
1022 | csum += raw_edid[i]; |
990 | if (csum) { |
1023 | if (csum) { |
991 | if (print_bad_edid) { |
1024 | if (print_bad_edid) { |
992 | DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum); |
1025 | DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum); |
993 | } |
1026 | } |
994 | 1027 | ||
995 | /* allow CEA to slide through, switches mangle this */ |
1028 | /* allow CEA to slide through, switches mangle this */ |
996 | if (raw_edid[0] != 0x02) |
1029 | if (raw_edid[0] != 0x02) |
997 | goto bad; |
1030 | goto bad; |
998 | } |
1031 | } |
999 | 1032 | ||
1000 | /* per-block-type checks */ |
1033 | /* per-block-type checks */ |
1001 | switch (raw_edid[0]) { |
1034 | switch (raw_edid[0]) { |
1002 | case 0: /* base */ |
1035 | case 0: /* base */ |
1003 | if (edid->version != 1) { |
1036 | if (edid->version != 1) { |
1004 | DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version); |
1037 | DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version); |
1005 | goto bad; |
1038 | goto bad; |
1006 | } |
1039 | } |
1007 | 1040 | ||
1008 | if (edid->revision > 4) |
1041 | if (edid->revision > 4) |
1009 | DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n"); |
1042 | DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n"); |
1010 | break; |
1043 | break; |
1011 | 1044 | ||
1012 | default: |
1045 | default: |
1013 | break; |
1046 | break; |
1014 | } |
1047 | } |
1015 | 1048 | ||
1016 | return true; |
1049 | return true; |
1017 | 1050 | ||
1018 | bad: |
1051 | bad: |
1019 | if (print_bad_edid) { |
1052 | if (print_bad_edid) { |
1020 | printk(KERN_ERR "Raw EDID:\n"); |
1053 | printk(KERN_ERR "Raw EDID:\n"); |
1021 | print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1, |
1054 | print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1, |
1022 | raw_edid, EDID_LENGTH, false); |
1055 | raw_edid, EDID_LENGTH, false); |
1023 | } |
1056 | } |
1024 | return false; |
1057 | return false; |
1025 | } |
1058 | } |
1026 | EXPORT_SYMBOL(drm_edid_block_valid); |
1059 | EXPORT_SYMBOL(drm_edid_block_valid); |
1027 | 1060 | ||
1028 | /** |
1061 | /** |
1029 | * drm_edid_is_valid - sanity check EDID data |
1062 | * drm_edid_is_valid - sanity check EDID data |
1030 | * @edid: EDID data |
1063 | * @edid: EDID data |
1031 | * |
1064 | * |
1032 | * Sanity-check an entire EDID record (including extensions) |
1065 | * Sanity-check an entire EDID record (including extensions) |
1033 | */ |
1066 | */ |
1034 | bool drm_edid_is_valid(struct edid *edid) |
1067 | bool drm_edid_is_valid(struct edid *edid) |
1035 | { |
1068 | { |
1036 | int i; |
1069 | int i; |
1037 | u8 *raw = (u8 *)edid; |
1070 | u8 *raw = (u8 *)edid; |
1038 | 1071 | ||
1039 | if (!edid) |
1072 | if (!edid) |
1040 | return false; |
1073 | return false; |
1041 | 1074 | ||
1042 | for (i = 0; i <= edid->extensions; i++) |
1075 | for (i = 0; i <= edid->extensions; i++) |
1043 | if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true)) |
1076 | if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true)) |
1044 | return false; |
1077 | return false; |
1045 | 1078 | ||
1046 | return true; |
1079 | return true; |
1047 | } |
1080 | } |
1048 | EXPORT_SYMBOL(drm_edid_is_valid); |
1081 | EXPORT_SYMBOL(drm_edid_is_valid); |
1049 | 1082 | ||
1050 | #define DDC_SEGMENT_ADDR 0x30 |
1083 | #define DDC_SEGMENT_ADDR 0x30 |
1051 | /** |
1084 | /** |
1052 | * Get EDID information via I2C. |
1085 | * Get EDID information via I2C. |
1053 | * |
1086 | * |
1054 | * \param adapter : i2c device adaptor |
1087 | * \param adapter : i2c device adaptor |
1055 | * \param buf : EDID data buffer to be filled |
1088 | * \param buf : EDID data buffer to be filled |
1056 | * \param len : EDID data buffer length |
1089 | * \param len : EDID data buffer length |
1057 | * \return 0 on success or -1 on failure. |
1090 | * \return 0 on success or -1 on failure. |
1058 | * |
1091 | * |
1059 | * Try to fetch EDID information by calling i2c driver function. |
1092 | * Try to fetch EDID information by calling i2c driver function. |
1060 | */ |
1093 | */ |
1061 | static int |
1094 | static int |
1062 | drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf, |
1095 | drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf, |
1063 | int block, int len) |
1096 | int block, int len) |
1064 | { |
1097 | { |
1065 | unsigned char start = block * EDID_LENGTH; |
1098 | unsigned char start = block * EDID_LENGTH; |
1066 | unsigned char segment = block >> 1; |
1099 | unsigned char segment = block >> 1; |
1067 | unsigned char xfers = segment ? 3 : 2; |
1100 | unsigned char xfers = segment ? 3 : 2; |
1068 | int ret, retries = 5; |
1101 | int ret, retries = 5; |
1069 | 1102 | ||
1070 | /* The core i2c driver will automatically retry the transfer if the |
1103 | /* The core i2c driver will automatically retry the transfer if the |
1071 | * adapter reports EAGAIN. However, we find that bit-banging transfers |
1104 | * adapter reports EAGAIN. However, we find that bit-banging transfers |
1072 | * are susceptible to errors under a heavily loaded machine and |
1105 | * are susceptible to errors under a heavily loaded machine and |
1073 | * generate spurious NAKs and timeouts. Retrying the transfer |
1106 | * generate spurious NAKs and timeouts. Retrying the transfer |
1074 | * of the individual block a few times seems to overcome this. |
1107 | * of the individual block a few times seems to overcome this. |
1075 | */ |
1108 | */ |
1076 | do { |
1109 | do { |
1077 | struct i2c_msg msgs[] = { |
1110 | struct i2c_msg msgs[] = { |
1078 | { |
1111 | { |
1079 | .addr = DDC_SEGMENT_ADDR, |
1112 | .addr = DDC_SEGMENT_ADDR, |
1080 | .flags = 0, |
1113 | .flags = 0, |
1081 | .len = 1, |
1114 | .len = 1, |
1082 | .buf = &segment, |
1115 | .buf = &segment, |
1083 | }, { |
1116 | }, { |
1084 | .addr = DDC_ADDR, |
1117 | .addr = DDC_ADDR, |
1085 | .flags = 0, |
1118 | .flags = 0, |
1086 | .len = 1, |
1119 | .len = 1, |
1087 | .buf = &start, |
1120 | .buf = &start, |
1088 | }, { |
1121 | }, { |
1089 | .addr = DDC_ADDR, |
1122 | .addr = DDC_ADDR, |
1090 | .flags = I2C_M_RD, |
1123 | .flags = I2C_M_RD, |
1091 | .len = len, |
1124 | .len = len, |
1092 | .buf = buf, |
1125 | .buf = buf, |
1093 | } |
1126 | } |
1094 | }; |
1127 | }; |
1095 | 1128 | ||
1096 | /* |
1129 | /* |
1097 | * Avoid sending the segment addr to not upset non-compliant ddc |
1130 | * Avoid sending the segment addr to not upset non-compliant ddc |
1098 | * monitors. |
1131 | * monitors. |
1099 | */ |
1132 | */ |
1100 | ret = i2c_transfer(adapter, &msgs[3 - xfers], xfers); |
1133 | ret = i2c_transfer(adapter, &msgs[3 - xfers], xfers); |
1101 | 1134 | ||
1102 | if (ret == -ENXIO) { |
1135 | if (ret == -ENXIO) { |
1103 | DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n", |
1136 | DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n", |
1104 | adapter->name); |
1137 | adapter->name); |
1105 | break; |
1138 | break; |
1106 | } |
1139 | } |
1107 | } while (ret != xfers && --retries); |
1140 | } while (ret != xfers && --retries); |
1108 | 1141 | ||
1109 | return ret == xfers ? 0 : -1; |
1142 | return ret == xfers ? 0 : -1; |
1110 | } |
1143 | } |
1111 | 1144 | ||
1112 | static bool drm_edid_is_zero(u8 *in_edid, int length) |
1145 | static bool drm_edid_is_zero(u8 *in_edid, int length) |
1113 | { |
1146 | { |
1114 | if (memchr_inv(in_edid, 0, length)) |
1147 | if (memchr_inv(in_edid, 0, length)) |
1115 | return false; |
1148 | return false; |
1116 | 1149 | ||
1117 | return true; |
1150 | return true; |
1118 | } |
1151 | } |
1119 | 1152 | ||
1120 | static u8 * |
1153 | static u8 * |
1121 | drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter) |
1154 | drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter) |
1122 | { |
1155 | { |
1123 | int i, j = 0, valid_extensions = 0; |
1156 | int i, j = 0, valid_extensions = 0; |
1124 | u8 *block, *new; |
1157 | u8 *block, *new; |
1125 | bool print_bad_edid = !connector->bad_edid_counter || (drm_debug & DRM_UT_KMS); |
1158 | bool print_bad_edid = !connector->bad_edid_counter || (drm_debug & DRM_UT_KMS); |
1126 | 1159 | ||
1127 | if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL) |
1160 | if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL) |
1128 | return NULL; |
1161 | return NULL; |
1129 | 1162 | ||
1130 | /* base block fetch */ |
1163 | /* base block fetch */ |
1131 | for (i = 0; i < 4; i++) { |
1164 | for (i = 0; i < 4; i++) { |
1132 | if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH)) |
1165 | if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH)) |
1133 | goto out; |
1166 | goto out; |
1134 | if (drm_edid_block_valid(block, 0, print_bad_edid)) |
1167 | if (drm_edid_block_valid(block, 0, print_bad_edid)) |
1135 | break; |
1168 | break; |
1136 | if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) { |
1169 | if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) { |
1137 | connector->null_edid_counter++; |
1170 | connector->null_edid_counter++; |
1138 | goto carp; |
1171 | goto carp; |
1139 | } |
1172 | } |
1140 | } |
1173 | } |
1141 | if (i == 4) |
1174 | if (i == 4) |
1142 | goto carp; |
1175 | goto carp; |
1143 | 1176 | ||
1144 | /* if there's no extensions, we're done */ |
1177 | /* if there's no extensions, we're done */ |
1145 | if (block[0x7e] == 0) |
1178 | if (block[0x7e] == 0) |
1146 | return block; |
1179 | return block; |
1147 | 1180 | ||
1148 | new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL); |
1181 | new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL); |
1149 | if (!new) |
1182 | if (!new) |
1150 | goto out; |
1183 | goto out; |
1151 | block = new; |
1184 | block = new; |
1152 | 1185 | ||
1153 | for (j = 1; j <= block[0x7e]; j++) { |
1186 | for (j = 1; j <= block[0x7e]; j++) { |
1154 | for (i = 0; i < 4; i++) { |
1187 | for (i = 0; i < 4; i++) { |
1155 | if (drm_do_probe_ddc_edid(adapter, |
1188 | if (drm_do_probe_ddc_edid(adapter, |
1156 | block + (valid_extensions + 1) * EDID_LENGTH, |
1189 | block + (valid_extensions + 1) * EDID_LENGTH, |
1157 | j, EDID_LENGTH)) |
1190 | j, EDID_LENGTH)) |
1158 | goto out; |
1191 | goto out; |
1159 | if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH, j, print_bad_edid)) { |
1192 | if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH, j, print_bad_edid)) { |
1160 | valid_extensions++; |
1193 | valid_extensions++; |
1161 | break; |
1194 | break; |
1162 | } |
1195 | } |
1163 | } |
1196 | } |
1164 | 1197 | ||
1165 | if (i == 4 && print_bad_edid) { |
1198 | if (i == 4 && print_bad_edid) { |
1166 | dev_warn(connector->dev->dev, |
1199 | dev_warn(connector->dev->dev, |
1167 | "%s: Ignoring invalid EDID block %d.\n", |
1200 | "%s: Ignoring invalid EDID block %d.\n", |
1168 | drm_get_connector_name(connector), j); |
1201 | drm_get_connector_name(connector), j); |
1169 | 1202 | ||
1170 | connector->bad_edid_counter++; |
1203 | connector->bad_edid_counter++; |
1171 | } |
1204 | } |
1172 | } |
1205 | } |
1173 | 1206 | ||
1174 | if (valid_extensions != block[0x7e]) { |
1207 | if (valid_extensions != block[0x7e]) { |
1175 | block[EDID_LENGTH-1] += block[0x7e] - valid_extensions; |
1208 | block[EDID_LENGTH-1] += block[0x7e] - valid_extensions; |
1176 | block[0x7e] = valid_extensions; |
1209 | block[0x7e] = valid_extensions; |
1177 | new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL); |
1210 | new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL); |
1178 | if (!new) |
1211 | if (!new) |
1179 | goto out; |
1212 | goto out; |
1180 | block = new; |
1213 | block = new; |
1181 | } |
1214 | } |
1182 | 1215 | ||
1183 | return block; |
1216 | return block; |
1184 | 1217 | ||
1185 | carp: |
1218 | carp: |
1186 | if (print_bad_edid) { |
1219 | if (print_bad_edid) { |
1187 | dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n", |
1220 | dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n", |
1188 | drm_get_connector_name(connector), j); |
1221 | drm_get_connector_name(connector), j); |
1189 | } |
1222 | } |
1190 | connector->bad_edid_counter++; |
1223 | connector->bad_edid_counter++; |
1191 | 1224 | ||
1192 | out: |
1225 | out: |
1193 | kfree(block); |
1226 | kfree(block); |
1194 | return NULL; |
1227 | return NULL; |
1195 | } |
1228 | } |
1196 | 1229 | ||
1197 | /** |
1230 | /** |
1198 | * Probe DDC presence. |
1231 | * Probe DDC presence. |
1199 | * |
1232 | * |
1200 | * \param adapter : i2c device adaptor |
1233 | * \param adapter : i2c device adaptor |
1201 | * \return 1 on success |
1234 | * \return 1 on success |
1202 | */ |
1235 | */ |
1203 | bool |
1236 | bool |
1204 | drm_probe_ddc(struct i2c_adapter *adapter) |
1237 | drm_probe_ddc(struct i2c_adapter *adapter) |
1205 | { |
1238 | { |
1206 | unsigned char out; |
1239 | unsigned char out; |
1207 | 1240 | ||
1208 | return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0); |
1241 | return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0); |
1209 | } |
1242 | } |
1210 | EXPORT_SYMBOL(drm_probe_ddc); |
1243 | EXPORT_SYMBOL(drm_probe_ddc); |
1211 | 1244 | ||
1212 | /** |
1245 | /** |
1213 | * drm_get_edid - get EDID data, if available |
1246 | * drm_get_edid - get EDID data, if available |
1214 | * @connector: connector we're probing |
1247 | * @connector: connector we're probing |
1215 | * @adapter: i2c adapter to use for DDC |
1248 | * @adapter: i2c adapter to use for DDC |
1216 | * |
1249 | * |
1217 | * Poke the given i2c channel to grab EDID data if possible. If found, |
1250 | * Poke the given i2c channel to grab EDID data if possible. If found, |
1218 | * attach it to the connector. |
1251 | * attach it to the connector. |
1219 | * |
1252 | * |
1220 | * Return edid data or NULL if we couldn't find any. |
1253 | * Return edid data or NULL if we couldn't find any. |
1221 | */ |
1254 | */ |
1222 | struct edid *drm_get_edid(struct drm_connector *connector, |
1255 | struct edid *drm_get_edid(struct drm_connector *connector, |
1223 | struct i2c_adapter *adapter) |
1256 | struct i2c_adapter *adapter) |
1224 | { |
1257 | { |
1225 | struct edid *edid = NULL; |
1258 | struct edid *edid = NULL; |
1226 | 1259 | ||
1227 | if (drm_probe_ddc(adapter)) |
1260 | if (drm_probe_ddc(adapter)) |
1228 | edid = (struct edid *)drm_do_get_edid(connector, adapter); |
1261 | edid = (struct edid *)drm_do_get_edid(connector, adapter); |
1229 | 1262 | ||
1230 | return edid; |
1263 | return edid; |
1231 | } |
1264 | } |
1232 | EXPORT_SYMBOL(drm_get_edid); |
1265 | EXPORT_SYMBOL(drm_get_edid); |
1233 | 1266 | ||
1234 | /*** EDID parsing ***/ |
1267 | /*** EDID parsing ***/ |
1235 | 1268 | ||
1236 | /** |
1269 | /** |
1237 | * edid_vendor - match a string against EDID's obfuscated vendor field |
1270 | * edid_vendor - match a string against EDID's obfuscated vendor field |
1238 | * @edid: EDID to match |
1271 | * @edid: EDID to match |
1239 | * @vendor: vendor string |
1272 | * @vendor: vendor string |
1240 | * |
1273 | * |
1241 | * Returns true if @vendor is in @edid, false otherwise |
1274 | * Returns true if @vendor is in @edid, false otherwise |
1242 | */ |
1275 | */ |
1243 | static bool edid_vendor(struct edid *edid, char *vendor) |
1276 | static bool edid_vendor(struct edid *edid, char *vendor) |
1244 | { |
1277 | { |
1245 | char edid_vendor[3]; |
1278 | char edid_vendor[3]; |
1246 | 1279 | ||
1247 | edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@'; |
1280 | edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@'; |
1248 | edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) | |
1281 | edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) | |
1249 | ((edid->mfg_id[1] & 0xe0) >> 5)) + '@'; |
1282 | ((edid->mfg_id[1] & 0xe0) >> 5)) + '@'; |
1250 | edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@'; |
1283 | edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@'; |
1251 | 1284 | ||
1252 | return !strncmp(edid_vendor, vendor, 3); |
1285 | return !strncmp(edid_vendor, vendor, 3); |
1253 | } |
1286 | } |
1254 | 1287 | ||
1255 | /** |
1288 | /** |
1256 | * edid_get_quirks - return quirk flags for a given EDID |
1289 | * edid_get_quirks - return quirk flags for a given EDID |
1257 | * @edid: EDID to process |
1290 | * @edid: EDID to process |
1258 | * |
1291 | * |
1259 | * This tells subsequent routines what fixes they need to apply. |
1292 | * This tells subsequent routines what fixes they need to apply. |
1260 | */ |
1293 | */ |
1261 | static u32 edid_get_quirks(struct edid *edid) |
1294 | static u32 edid_get_quirks(struct edid *edid) |
1262 | { |
1295 | { |
1263 | struct edid_quirk *quirk; |
1296 | struct edid_quirk *quirk; |
1264 | int i; |
1297 | int i; |
1265 | 1298 | ||
1266 | for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) { |
1299 | for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) { |
1267 | quirk = &edid_quirk_list[i]; |
1300 | quirk = &edid_quirk_list[i]; |
1268 | 1301 | ||
1269 | if (edid_vendor(edid, quirk->vendor) && |
1302 | if (edid_vendor(edid, quirk->vendor) && |
1270 | (EDID_PRODUCT_ID(edid) == quirk->product_id)) |
1303 | (EDID_PRODUCT_ID(edid) == quirk->product_id)) |
1271 | return quirk->quirks; |
1304 | return quirk->quirks; |
1272 | } |
1305 | } |
1273 | 1306 | ||
1274 | return 0; |
1307 | return 0; |
1275 | } |
1308 | } |
1276 | 1309 | ||
1277 | #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay) |
1310 | #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay) |
1278 | #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh)) |
1311 | #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh)) |
1279 | 1312 | ||
1280 | /** |
1313 | /** |
1281 | * edid_fixup_preferred - set preferred modes based on quirk list |
1314 | * edid_fixup_preferred - set preferred modes based on quirk list |
1282 | * @connector: has mode list to fix up |
1315 | * @connector: has mode list to fix up |
1283 | * @quirks: quirks list |
1316 | * @quirks: quirks list |
1284 | * |
1317 | * |
1285 | * Walk the mode list for @connector, clearing the preferred status |
1318 | * Walk the mode list for @connector, clearing the preferred status |
1286 | * on existing modes and setting it anew for the right mode ala @quirks. |
1319 | * on existing modes and setting it anew for the right mode ala @quirks. |
1287 | */ |
1320 | */ |
1288 | static void edid_fixup_preferred(struct drm_connector *connector, |
1321 | static void edid_fixup_preferred(struct drm_connector *connector, |
1289 | u32 quirks) |
1322 | u32 quirks) |
1290 | { |
1323 | { |
1291 | struct drm_display_mode *t, *cur_mode, *preferred_mode; |
1324 | struct drm_display_mode *t, *cur_mode, *preferred_mode; |
1292 | int target_refresh = 0; |
1325 | int target_refresh = 0; |
1293 | 1326 | ||
1294 | if (list_empty(&connector->probed_modes)) |
1327 | if (list_empty(&connector->probed_modes)) |
1295 | return; |
1328 | return; |
1296 | 1329 | ||
1297 | if (quirks & EDID_QUIRK_PREFER_LARGE_60) |
1330 | if (quirks & EDID_QUIRK_PREFER_LARGE_60) |
1298 | target_refresh = 60; |
1331 | target_refresh = 60; |
1299 | if (quirks & EDID_QUIRK_PREFER_LARGE_75) |
1332 | if (quirks & EDID_QUIRK_PREFER_LARGE_75) |
1300 | target_refresh = 75; |
1333 | target_refresh = 75; |
1301 | 1334 | ||
1302 | preferred_mode = list_first_entry(&connector->probed_modes, |
1335 | preferred_mode = list_first_entry(&connector->probed_modes, |
1303 | struct drm_display_mode, head); |
1336 | struct drm_display_mode, head); |
1304 | 1337 | ||
1305 | list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) { |
1338 | list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) { |
1306 | cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED; |
1339 | cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED; |
1307 | 1340 | ||
1308 | if (cur_mode == preferred_mode) |
1341 | if (cur_mode == preferred_mode) |
1309 | continue; |
1342 | continue; |
1310 | 1343 | ||
1311 | /* Largest mode is preferred */ |
1344 | /* Largest mode is preferred */ |
1312 | if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode)) |
1345 | if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode)) |
1313 | preferred_mode = cur_mode; |
1346 | preferred_mode = cur_mode; |
1314 | 1347 | ||
1315 | /* At a given size, try to get closest to target refresh */ |
1348 | /* At a given size, try to get closest to target refresh */ |
1316 | if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) && |
1349 | if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) && |
1317 | MODE_REFRESH_DIFF(cur_mode, target_refresh) < |
1350 | MODE_REFRESH_DIFF(cur_mode, target_refresh) < |
1318 | MODE_REFRESH_DIFF(preferred_mode, target_refresh)) { |
1351 | MODE_REFRESH_DIFF(preferred_mode, target_refresh)) { |
1319 | preferred_mode = cur_mode; |
1352 | preferred_mode = cur_mode; |
1320 | } |
1353 | } |
1321 | } |
1354 | } |
1322 | 1355 | ||
1323 | preferred_mode->type |= DRM_MODE_TYPE_PREFERRED; |
1356 | preferred_mode->type |= DRM_MODE_TYPE_PREFERRED; |
1324 | } |
1357 | } |
1325 | 1358 | ||
1326 | static bool |
1359 | static bool |
1327 | mode_is_rb(const struct drm_display_mode *mode) |
1360 | mode_is_rb(const struct drm_display_mode *mode) |
1328 | { |
1361 | { |
1329 | return (mode->htotal - mode->hdisplay == 160) && |
1362 | return (mode->htotal - mode->hdisplay == 160) && |
1330 | (mode->hsync_end - mode->hdisplay == 80) && |
1363 | (mode->hsync_end - mode->hdisplay == 80) && |
1331 | (mode->hsync_end - mode->hsync_start == 32) && |
1364 | (mode->hsync_end - mode->hsync_start == 32) && |
1332 | (mode->vsync_start - mode->vdisplay == 3); |
1365 | (mode->vsync_start - mode->vdisplay == 3); |
1333 | } |
1366 | } |
1334 | 1367 | ||
1335 | /* |
1368 | /* |
1336 | * drm_mode_find_dmt - Create a copy of a mode if present in DMT |
1369 | * drm_mode_find_dmt - Create a copy of a mode if present in DMT |
1337 | * @dev: Device to duplicate against |
1370 | * @dev: Device to duplicate against |
1338 | * @hsize: Mode width |
1371 | * @hsize: Mode width |
1339 | * @vsize: Mode height |
1372 | * @vsize: Mode height |
1340 | * @fresh: Mode refresh rate |
1373 | * @fresh: Mode refresh rate |
1341 | * @rb: Mode reduced-blanking-ness |
1374 | * @rb: Mode reduced-blanking-ness |
1342 | * |
1375 | * |
1343 | * Walk the DMT mode list looking for a match for the given parameters. |
1376 | * Walk the DMT mode list looking for a match for the given parameters. |
1344 | * Return a newly allocated copy of the mode, or NULL if not found. |
1377 | * Return a newly allocated copy of the mode, or NULL if not found. |
1345 | */ |
1378 | */ |
1346 | struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev, |
1379 | struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev, |
1347 | int hsize, int vsize, int fresh, |
1380 | int hsize, int vsize, int fresh, |
1348 | bool rb) |
1381 | bool rb) |
1349 | { |
1382 | { |
1350 | int i; |
1383 | int i; |
1351 | 1384 | ||
1352 | for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) { |
1385 | for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) { |
1353 | const struct drm_display_mode *ptr = &drm_dmt_modes[i]; |
1386 | const struct drm_display_mode *ptr = &drm_dmt_modes[i]; |
1354 | if (hsize != ptr->hdisplay) |
1387 | if (hsize != ptr->hdisplay) |
1355 | continue; |
1388 | continue; |
1356 | if (vsize != ptr->vdisplay) |
1389 | if (vsize != ptr->vdisplay) |
1357 | continue; |
1390 | continue; |
1358 | if (fresh != drm_mode_vrefresh(ptr)) |
1391 | if (fresh != drm_mode_vrefresh(ptr)) |
1359 | continue; |
1392 | continue; |
1360 | if (rb != mode_is_rb(ptr)) |
1393 | if (rb != mode_is_rb(ptr)) |
1361 | continue; |
1394 | continue; |
1362 | 1395 | ||
1363 | return drm_mode_duplicate(dev, ptr); |
1396 | return drm_mode_duplicate(dev, ptr); |
1364 | } |
1397 | } |
1365 | 1398 | ||
1366 | return NULL; |
1399 | return NULL; |
1367 | } |
1400 | } |
1368 | EXPORT_SYMBOL(drm_mode_find_dmt); |
1401 | EXPORT_SYMBOL(drm_mode_find_dmt); |
1369 | 1402 | ||
1370 | typedef void detailed_cb(struct detailed_timing *timing, void *closure); |
1403 | typedef void detailed_cb(struct detailed_timing *timing, void *closure); |
1371 | 1404 | ||
1372 | static void |
1405 | static void |
1373 | cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure) |
1406 | cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure) |
1374 | { |
1407 | { |
1375 | int i, n = 0; |
1408 | int i, n = 0; |
1376 | u8 d = ext[0x02]; |
1409 | u8 d = ext[0x02]; |
1377 | u8 *det_base = ext + d; |
1410 | u8 *det_base = ext + d; |
1378 | 1411 | ||
1379 | n = (127 - d) / 18; |
1412 | n = (127 - d) / 18; |
1380 | for (i = 0; i < n; i++) |
1413 | for (i = 0; i < n; i++) |
1381 | cb((struct detailed_timing *)(det_base + 18 * i), closure); |
1414 | cb((struct detailed_timing *)(det_base + 18 * i), closure); |
1382 | } |
1415 | } |
1383 | 1416 | ||
1384 | static void |
1417 | static void |
1385 | vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure) |
1418 | vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure) |
1386 | { |
1419 | { |
1387 | unsigned int i, n = min((int)ext[0x02], 6); |
1420 | unsigned int i, n = min((int)ext[0x02], 6); |
1388 | u8 *det_base = ext + 5; |
1421 | u8 *det_base = ext + 5; |
1389 | 1422 | ||
1390 | if (ext[0x01] != 1) |
1423 | if (ext[0x01] != 1) |
1391 | return; /* unknown version */ |
1424 | return; /* unknown version */ |
1392 | 1425 | ||
1393 | for (i = 0; i < n; i++) |
1426 | for (i = 0; i < n; i++) |
1394 | cb((struct detailed_timing *)(det_base + 18 * i), closure); |
1427 | cb((struct detailed_timing *)(det_base + 18 * i), closure); |
1395 | } |
1428 | } |
1396 | 1429 | ||
1397 | static void |
1430 | static void |
1398 | drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure) |
1431 | drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure) |
1399 | { |
1432 | { |
1400 | int i; |
1433 | int i; |
1401 | struct edid *edid = (struct edid *)raw_edid; |
1434 | struct edid *edid = (struct edid *)raw_edid; |
1402 | 1435 | ||
1403 | if (edid == NULL) |
1436 | if (edid == NULL) |
1404 | return; |
1437 | return; |
1405 | 1438 | ||
1406 | for (i = 0; i < EDID_DETAILED_TIMINGS; i++) |
1439 | for (i = 0; i < EDID_DETAILED_TIMINGS; i++) |
1407 | cb(&(edid->detailed_timings[i]), closure); |
1440 | cb(&(edid->detailed_timings[i]), closure); |
1408 | 1441 | ||
1409 | for (i = 1; i <= raw_edid[0x7e]; i++) { |
1442 | for (i = 1; i <= raw_edid[0x7e]; i++) { |
1410 | u8 *ext = raw_edid + (i * EDID_LENGTH); |
1443 | u8 *ext = raw_edid + (i * EDID_LENGTH); |
1411 | switch (*ext) { |
1444 | switch (*ext) { |
1412 | case CEA_EXT: |
1445 | case CEA_EXT: |
1413 | cea_for_each_detailed_block(ext, cb, closure); |
1446 | cea_for_each_detailed_block(ext, cb, closure); |
1414 | break; |
1447 | break; |
1415 | case VTB_EXT: |
1448 | case VTB_EXT: |
1416 | vtb_for_each_detailed_block(ext, cb, closure); |
1449 | vtb_for_each_detailed_block(ext, cb, closure); |
1417 | break; |
1450 | break; |
1418 | default: |
1451 | default: |
1419 | break; |
1452 | break; |
1420 | } |
1453 | } |
1421 | } |
1454 | } |
1422 | } |
1455 | } |
1423 | 1456 | ||
1424 | static void |
1457 | static void |
1425 | is_rb(struct detailed_timing *t, void *data) |
1458 | is_rb(struct detailed_timing *t, void *data) |
1426 | { |
1459 | { |
1427 | u8 *r = (u8 *)t; |
1460 | u8 *r = (u8 *)t; |
1428 | if (r[3] == EDID_DETAIL_MONITOR_RANGE) |
1461 | if (r[3] == EDID_DETAIL_MONITOR_RANGE) |
1429 | if (r[15] & 0x10) |
1462 | if (r[15] & 0x10) |
1430 | *(bool *)data = true; |
1463 | *(bool *)data = true; |
1431 | } |
1464 | } |
1432 | 1465 | ||
1433 | /* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */ |
1466 | /* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */ |
1434 | static bool |
1467 | static bool |
1435 | drm_monitor_supports_rb(struct edid *edid) |
1468 | drm_monitor_supports_rb(struct edid *edid) |
1436 | { |
1469 | { |
1437 | if (edid->revision >= 4) { |
1470 | if (edid->revision >= 4) { |
1438 | bool ret = false; |
1471 | bool ret = false; |
1439 | drm_for_each_detailed_block((u8 *)edid, is_rb, &ret); |
1472 | drm_for_each_detailed_block((u8 *)edid, is_rb, &ret); |
1440 | return ret; |
1473 | return ret; |
1441 | } |
1474 | } |
1442 | 1475 | ||
1443 | return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0); |
1476 | return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0); |
1444 | } |
1477 | } |
1445 | 1478 | ||
1446 | static void |
1479 | static void |
1447 | find_gtf2(struct detailed_timing *t, void *data) |
1480 | find_gtf2(struct detailed_timing *t, void *data) |
1448 | { |
1481 | { |
1449 | u8 *r = (u8 *)t; |
1482 | u8 *r = (u8 *)t; |
1450 | if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02) |
1483 | if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02) |
1451 | *(u8 **)data = r; |
1484 | *(u8 **)data = r; |
1452 | } |
1485 | } |
1453 | 1486 | ||
1454 | /* Secondary GTF curve kicks in above some break frequency */ |
1487 | /* Secondary GTF curve kicks in above some break frequency */ |
1455 | static int |
1488 | static int |
1456 | drm_gtf2_hbreak(struct edid *edid) |
1489 | drm_gtf2_hbreak(struct edid *edid) |
1457 | { |
1490 | { |
1458 | u8 *r = NULL; |
1491 | u8 *r = NULL; |
1459 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); |
1492 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); |
1460 | return r ? (r[12] * 2) : 0; |
1493 | return r ? (r[12] * 2) : 0; |
1461 | } |
1494 | } |
1462 | 1495 | ||
1463 | static int |
1496 | static int |
1464 | drm_gtf2_2c(struct edid *edid) |
1497 | drm_gtf2_2c(struct edid *edid) |
1465 | { |
1498 | { |
1466 | u8 *r = NULL; |
1499 | u8 *r = NULL; |
1467 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); |
1500 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); |
1468 | return r ? r[13] : 0; |
1501 | return r ? r[13] : 0; |
1469 | } |
1502 | } |
1470 | 1503 | ||
1471 | static int |
1504 | static int |
1472 | drm_gtf2_m(struct edid *edid) |
1505 | drm_gtf2_m(struct edid *edid) |
1473 | { |
1506 | { |
1474 | u8 *r = NULL; |
1507 | u8 *r = NULL; |
1475 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); |
1508 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); |
1476 | return r ? (r[15] << 8) + r[14] : 0; |
1509 | return r ? (r[15] << 8) + r[14] : 0; |
1477 | } |
1510 | } |
1478 | 1511 | ||
1479 | static int |
1512 | static int |
1480 | drm_gtf2_k(struct edid *edid) |
1513 | drm_gtf2_k(struct edid *edid) |
1481 | { |
1514 | { |
1482 | u8 *r = NULL; |
1515 | u8 *r = NULL; |
1483 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); |
1516 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); |
1484 | return r ? r[16] : 0; |
1517 | return r ? r[16] : 0; |
1485 | } |
1518 | } |
1486 | 1519 | ||
1487 | static int |
1520 | static int |
1488 | drm_gtf2_2j(struct edid *edid) |
1521 | drm_gtf2_2j(struct edid *edid) |
1489 | { |
1522 | { |
1490 | u8 *r = NULL; |
1523 | u8 *r = NULL; |
1491 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); |
1524 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); |
1492 | return r ? r[17] : 0; |
1525 | return r ? r[17] : 0; |
1493 | } |
1526 | } |
1494 | 1527 | ||
1495 | /** |
1528 | /** |
1496 | * standard_timing_level - get std. timing level(CVT/GTF/DMT) |
1529 | * standard_timing_level - get std. timing level(CVT/GTF/DMT) |
1497 | * @edid: EDID block to scan |
1530 | * @edid: EDID block to scan |
1498 | */ |
1531 | */ |
1499 | static int standard_timing_level(struct edid *edid) |
1532 | static int standard_timing_level(struct edid *edid) |
1500 | { |
1533 | { |
1501 | if (edid->revision >= 2) { |
1534 | if (edid->revision >= 2) { |
1502 | if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)) |
1535 | if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)) |
1503 | return LEVEL_CVT; |
1536 | return LEVEL_CVT; |
1504 | if (drm_gtf2_hbreak(edid)) |
1537 | if (drm_gtf2_hbreak(edid)) |
1505 | return LEVEL_GTF2; |
1538 | return LEVEL_GTF2; |
1506 | return LEVEL_GTF; |
1539 | return LEVEL_GTF; |
1507 | } |
1540 | } |
1508 | return LEVEL_DMT; |
1541 | return LEVEL_DMT; |
1509 | } |
1542 | } |
1510 | 1543 | ||
1511 | /* |
1544 | /* |
1512 | * 0 is reserved. The spec says 0x01 fill for unused timings. Some old |
1545 | * 0 is reserved. The spec says 0x01 fill for unused timings. Some old |
1513 | * monitors fill with ascii space (0x20) instead. |
1546 | * monitors fill with ascii space (0x20) instead. |
1514 | */ |
1547 | */ |
1515 | static int |
1548 | static int |
1516 | bad_std_timing(u8 a, u8 b) |
1549 | bad_std_timing(u8 a, u8 b) |
1517 | { |
1550 | { |
1518 | return (a == 0x00 && b == 0x00) || |
1551 | return (a == 0x00 && b == 0x00) || |
1519 | (a == 0x01 && b == 0x01) || |
1552 | (a == 0x01 && b == 0x01) || |
1520 | (a == 0x20 && b == 0x20); |
1553 | (a == 0x20 && b == 0x20); |
1521 | } |
1554 | } |
1522 | 1555 | ||
1523 | /** |
1556 | /** |
1524 | * drm_mode_std - convert standard mode info (width, height, refresh) into mode |
1557 | * drm_mode_std - convert standard mode info (width, height, refresh) into mode |
1525 | * @t: standard timing params |
1558 | * @t: standard timing params |
1526 | * @timing_level: standard timing level |
1559 | * @timing_level: standard timing level |
1527 | * |
1560 | * |
1528 | * Take the standard timing params (in this case width, aspect, and refresh) |
1561 | * Take the standard timing params (in this case width, aspect, and refresh) |
1529 | * and convert them into a real mode using CVT/GTF/DMT. |
1562 | * and convert them into a real mode using CVT/GTF/DMT. |
1530 | */ |
1563 | */ |
1531 | static struct drm_display_mode * |
1564 | static struct drm_display_mode * |
1532 | drm_mode_std(struct drm_connector *connector, struct edid *edid, |
1565 | drm_mode_std(struct drm_connector *connector, struct edid *edid, |
1533 | struct std_timing *t, int revision) |
1566 | struct std_timing *t, int revision) |
1534 | { |
1567 | { |
1535 | struct drm_device *dev = connector->dev; |
1568 | struct drm_device *dev = connector->dev; |
1536 | struct drm_display_mode *m, *mode = NULL; |
1569 | struct drm_display_mode *m, *mode = NULL; |
1537 | int hsize, vsize; |
1570 | int hsize, vsize; |
1538 | int vrefresh_rate; |
1571 | int vrefresh_rate; |
1539 | unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK) |
1572 | unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK) |
1540 | >> EDID_TIMING_ASPECT_SHIFT; |
1573 | >> EDID_TIMING_ASPECT_SHIFT; |
1541 | unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK) |
1574 | unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK) |
1542 | >> EDID_TIMING_VFREQ_SHIFT; |
1575 | >> EDID_TIMING_VFREQ_SHIFT; |
1543 | int timing_level = standard_timing_level(edid); |
1576 | int timing_level = standard_timing_level(edid); |
1544 | 1577 | ||
1545 | if (bad_std_timing(t->hsize, t->vfreq_aspect)) |
1578 | if (bad_std_timing(t->hsize, t->vfreq_aspect)) |
1546 | return NULL; |
1579 | return NULL; |
1547 | 1580 | ||
1548 | /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */ |
1581 | /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */ |
1549 | hsize = t->hsize * 8 + 248; |
1582 | hsize = t->hsize * 8 + 248; |
1550 | /* vrefresh_rate = vfreq + 60 */ |
1583 | /* vrefresh_rate = vfreq + 60 */ |
1551 | vrefresh_rate = vfreq + 60; |
1584 | vrefresh_rate = vfreq + 60; |
1552 | /* the vdisplay is calculated based on the aspect ratio */ |
1585 | /* the vdisplay is calculated based on the aspect ratio */ |
1553 | if (aspect_ratio == 0) { |
1586 | if (aspect_ratio == 0) { |
1554 | if (revision < 3) |
1587 | if (revision < 3) |
1555 | vsize = hsize; |
1588 | vsize = hsize; |
1556 | else |
1589 | else |
1557 | vsize = (hsize * 10) / 16; |
1590 | vsize = (hsize * 10) / 16; |
1558 | } else if (aspect_ratio == 1) |
1591 | } else if (aspect_ratio == 1) |
1559 | vsize = (hsize * 3) / 4; |
1592 | vsize = (hsize * 3) / 4; |
1560 | else if (aspect_ratio == 2) |
1593 | else if (aspect_ratio == 2) |
1561 | vsize = (hsize * 4) / 5; |
1594 | vsize = (hsize * 4) / 5; |
1562 | else |
1595 | else |
1563 | vsize = (hsize * 9) / 16; |
1596 | vsize = (hsize * 9) / 16; |
1564 | 1597 | ||
1565 | /* HDTV hack, part 1 */ |
1598 | /* HDTV hack, part 1 */ |
1566 | if (vrefresh_rate == 60 && |
1599 | if (vrefresh_rate == 60 && |
1567 | ((hsize == 1360 && vsize == 765) || |
1600 | ((hsize == 1360 && vsize == 765) || |
1568 | (hsize == 1368 && vsize == 769))) { |
1601 | (hsize == 1368 && vsize == 769))) { |
1569 | hsize = 1366; |
1602 | hsize = 1366; |
1570 | vsize = 768; |
1603 | vsize = 768; |
1571 | } |
1604 | } |
1572 | 1605 | ||
1573 | /* |
1606 | /* |
1574 | * If this connector already has a mode for this size and refresh |
1607 | * If this connector already has a mode for this size and refresh |
1575 | * rate (because it came from detailed or CVT info), use that |
1608 | * rate (because it came from detailed or CVT info), use that |
1576 | * instead. This way we don't have to guess at interlace or |
1609 | * instead. This way we don't have to guess at interlace or |
1577 | * reduced blanking. |
1610 | * reduced blanking. |
1578 | */ |
1611 | */ |
1579 | list_for_each_entry(m, &connector->probed_modes, head) |
1612 | list_for_each_entry(m, &connector->probed_modes, head) |
1580 | if (m->hdisplay == hsize && m->vdisplay == vsize && |
1613 | if (m->hdisplay == hsize && m->vdisplay == vsize && |
1581 | drm_mode_vrefresh(m) == vrefresh_rate) |
1614 | drm_mode_vrefresh(m) == vrefresh_rate) |
1582 | return NULL; |
1615 | return NULL; |
1583 | 1616 | ||
1584 | /* HDTV hack, part 2 */ |
1617 | /* HDTV hack, part 2 */ |
1585 | if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) { |
1618 | if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) { |
1586 | mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0, |
1619 | mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0, |
1587 | false); |
1620 | false); |
1588 | mode->hdisplay = 1366; |
1621 | mode->hdisplay = 1366; |
1589 | mode->hsync_start = mode->hsync_start - 1; |
1622 | mode->hsync_start = mode->hsync_start - 1; |
1590 | mode->hsync_end = mode->hsync_end - 1; |
1623 | mode->hsync_end = mode->hsync_end - 1; |
1591 | return mode; |
1624 | return mode; |
1592 | } |
1625 | } |
1593 | 1626 | ||
1594 | /* check whether it can be found in default mode table */ |
1627 | /* check whether it can be found in default mode table */ |
1595 | if (drm_monitor_supports_rb(edid)) { |
1628 | if (drm_monitor_supports_rb(edid)) { |
1596 | mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, |
1629 | mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, |
1597 | true); |
1630 | true); |
1598 | if (mode) |
1631 | if (mode) |
1599 | return mode; |
1632 | return mode; |
1600 | } |
1633 | } |
1601 | mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false); |
1634 | mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false); |
1602 | if (mode) |
1635 | if (mode) |
1603 | return mode; |
1636 | return mode; |
1604 | 1637 | ||
1605 | /* okay, generate it */ |
1638 | /* okay, generate it */ |
1606 | switch (timing_level) { |
1639 | switch (timing_level) { |
1607 | case LEVEL_DMT: |
1640 | case LEVEL_DMT: |
1608 | break; |
1641 | break; |
1609 | case LEVEL_GTF: |
1642 | case LEVEL_GTF: |
1610 | mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); |
1643 | mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); |
1611 | break; |
1644 | break; |
1612 | case LEVEL_GTF2: |
1645 | case LEVEL_GTF2: |
1613 | /* |
1646 | /* |
1614 | * This is potentially wrong if there's ever a monitor with |
1647 | * This is potentially wrong if there's ever a monitor with |
1615 | * more than one ranges section, each claiming a different |
1648 | * more than one ranges section, each claiming a different |
1616 | * secondary GTF curve. Please don't do that. |
1649 | * secondary GTF curve. Please don't do that. |
1617 | */ |
1650 | */ |
1618 | mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); |
1651 | mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); |
1619 | if (!mode) |
1652 | if (!mode) |
1620 | return NULL; |
1653 | return NULL; |
1621 | if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) { |
1654 | if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) { |
1622 | drm_mode_destroy(dev, mode); |
1655 | drm_mode_destroy(dev, mode); |
1623 | mode = drm_gtf_mode_complex(dev, hsize, vsize, |
1656 | mode = drm_gtf_mode_complex(dev, hsize, vsize, |
1624 | vrefresh_rate, 0, 0, |
1657 | vrefresh_rate, 0, 0, |
1625 | drm_gtf2_m(edid), |
1658 | drm_gtf2_m(edid), |
1626 | drm_gtf2_2c(edid), |
1659 | drm_gtf2_2c(edid), |
1627 | drm_gtf2_k(edid), |
1660 | drm_gtf2_k(edid), |
1628 | drm_gtf2_2j(edid)); |
1661 | drm_gtf2_2j(edid)); |
1629 | } |
1662 | } |
1630 | break; |
1663 | break; |
1631 | case LEVEL_CVT: |
1664 | case LEVEL_CVT: |
1632 | mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0, |
1665 | mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0, |
1633 | false); |
1666 | false); |
1634 | break; |
1667 | break; |
1635 | } |
1668 | } |
1636 | return mode; |
1669 | return mode; |
1637 | } |
1670 | } |
1638 | 1671 | ||
1639 | /* |
1672 | /* |
1640 | * EDID is delightfully ambiguous about how interlaced modes are to be |
1673 | * EDID is delightfully ambiguous about how interlaced modes are to be |
1641 | * encoded. Our internal representation is of frame height, but some |
1674 | * encoded. Our internal representation is of frame height, but some |
1642 | * HDTV detailed timings are encoded as field height. |
1675 | * HDTV detailed timings are encoded as field height. |
1643 | * |
1676 | * |
1644 | * The format list here is from CEA, in frame size. Technically we |
1677 | * The format list here is from CEA, in frame size. Technically we |
1645 | * should be checking refresh rate too. Whatever. |
1678 | * should be checking refresh rate too. Whatever. |
1646 | */ |
1679 | */ |
1647 | static void |
1680 | static void |
1648 | drm_mode_do_interlace_quirk(struct drm_display_mode *mode, |
1681 | drm_mode_do_interlace_quirk(struct drm_display_mode *mode, |
1649 | struct detailed_pixel_timing *pt) |
1682 | struct detailed_pixel_timing *pt) |
1650 | { |
1683 | { |
1651 | int i; |
1684 | int i; |
1652 | static const struct { |
1685 | static const struct { |
1653 | int w, h; |
1686 | int w, h; |
1654 | } cea_interlaced[] = { |
1687 | } cea_interlaced[] = { |
1655 | { 1920, 1080 }, |
1688 | { 1920, 1080 }, |
1656 | { 720, 480 }, |
1689 | { 720, 480 }, |
1657 | { 1440, 480 }, |
1690 | { 1440, 480 }, |
1658 | { 2880, 480 }, |
1691 | { 2880, 480 }, |
1659 | { 720, 576 }, |
1692 | { 720, 576 }, |
1660 | { 1440, 576 }, |
1693 | { 1440, 576 }, |
1661 | { 2880, 576 }, |
1694 | { 2880, 576 }, |
1662 | }; |
1695 | }; |
1663 | 1696 | ||
1664 | if (!(pt->misc & DRM_EDID_PT_INTERLACED)) |
1697 | if (!(pt->misc & DRM_EDID_PT_INTERLACED)) |
1665 | return; |
1698 | return; |
1666 | 1699 | ||
1667 | for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) { |
1700 | for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) { |
1668 | if ((mode->hdisplay == cea_interlaced[i].w) && |
1701 | if ((mode->hdisplay == cea_interlaced[i].w) && |
1669 | (mode->vdisplay == cea_interlaced[i].h / 2)) { |
1702 | (mode->vdisplay == cea_interlaced[i].h / 2)) { |
1670 | mode->vdisplay *= 2; |
1703 | mode->vdisplay *= 2; |
1671 | mode->vsync_start *= 2; |
1704 | mode->vsync_start *= 2; |
1672 | mode->vsync_end *= 2; |
1705 | mode->vsync_end *= 2; |
1673 | mode->vtotal *= 2; |
1706 | mode->vtotal *= 2; |
1674 | mode->vtotal |= 1; |
1707 | mode->vtotal |= 1; |
1675 | } |
1708 | } |
1676 | } |
1709 | } |
1677 | 1710 | ||
1678 | mode->flags |= DRM_MODE_FLAG_INTERLACE; |
1711 | mode->flags |= DRM_MODE_FLAG_INTERLACE; |
1679 | } |
1712 | } |
1680 | 1713 | ||
1681 | /** |
1714 | /** |
1682 | * drm_mode_detailed - create a new mode from an EDID detailed timing section |
1715 | * drm_mode_detailed - create a new mode from an EDID detailed timing section |
1683 | * @dev: DRM device (needed to create new mode) |
1716 | * @dev: DRM device (needed to create new mode) |
1684 | * @edid: EDID block |
1717 | * @edid: EDID block |
1685 | * @timing: EDID detailed timing info |
1718 | * @timing: EDID detailed timing info |
1686 | * @quirks: quirks to apply |
1719 | * @quirks: quirks to apply |
1687 | * |
1720 | * |
1688 | * An EDID detailed timing block contains enough info for us to create and |
1721 | * An EDID detailed timing block contains enough info for us to create and |
1689 | * return a new struct drm_display_mode. |
1722 | * return a new struct drm_display_mode. |
1690 | */ |
1723 | */ |
1691 | static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev, |
1724 | static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev, |
1692 | struct edid *edid, |
1725 | struct edid *edid, |
1693 | struct detailed_timing *timing, |
1726 | struct detailed_timing *timing, |
1694 | u32 quirks) |
1727 | u32 quirks) |
1695 | { |
1728 | { |
1696 | struct drm_display_mode *mode; |
1729 | struct drm_display_mode *mode; |
1697 | struct detailed_pixel_timing *pt = &timing->data.pixel_data; |
1730 | struct detailed_pixel_timing *pt = &timing->data.pixel_data; |
1698 | unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo; |
1731 | unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo; |
1699 | unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo; |
1732 | unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo; |
1700 | unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo; |
1733 | unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo; |
1701 | unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo; |
1734 | unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo; |
1702 | unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo; |
1735 | unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo; |
1703 | unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo; |
1736 | unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo; |
1704 | unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 2 | pt->vsync_offset_pulse_width_lo >> 4; |
1737 | unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 2 | pt->vsync_offset_pulse_width_lo >> 4; |
1705 | unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf); |
1738 | unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf); |
1706 | 1739 | ||
1707 | /* ignore tiny modes */ |
1740 | /* ignore tiny modes */ |
1708 | if (hactive < 64 || vactive < 64) |
1741 | if (hactive < 64 || vactive < 64) |
1709 | return NULL; |
1742 | return NULL; |
1710 | 1743 | ||
1711 | if (pt->misc & DRM_EDID_PT_STEREO) { |
1744 | if (pt->misc & DRM_EDID_PT_STEREO) { |
1712 | DRM_DEBUG_KMS("stereo mode not supported\n"); |
1745 | DRM_DEBUG_KMS("stereo mode not supported\n"); |
1713 | return NULL; |
1746 | return NULL; |
1714 | } |
1747 | } |
1715 | if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { |
1748 | if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { |
1716 | DRM_DEBUG_KMS("composite sync not supported\n"); |
1749 | DRM_DEBUG_KMS("composite sync not supported\n"); |
1717 | } |
1750 | } |
1718 | 1751 | ||
1719 | /* it is incorrect if hsync/vsync width is zero */ |
1752 | /* it is incorrect if hsync/vsync width is zero */ |
1720 | if (!hsync_pulse_width || !vsync_pulse_width) { |
1753 | if (!hsync_pulse_width || !vsync_pulse_width) { |
1721 | DRM_DEBUG_KMS("Incorrect Detailed timing. " |
1754 | DRM_DEBUG_KMS("Incorrect Detailed timing. " |
1722 | "Wrong Hsync/Vsync pulse width\n"); |
1755 | "Wrong Hsync/Vsync pulse width\n"); |
1723 | return NULL; |
1756 | return NULL; |
1724 | } |
1757 | } |
1725 | 1758 | ||
1726 | if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) { |
1759 | if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) { |
1727 | mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false); |
1760 | mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false); |
1728 | if (!mode) |
1761 | if (!mode) |
1729 | return NULL; |
1762 | return NULL; |
1730 | 1763 | ||
1731 | goto set_size; |
1764 | goto set_size; |
1732 | } |
1765 | } |
1733 | 1766 | ||
1734 | mode = drm_mode_create(dev); |
1767 | mode = drm_mode_create(dev); |
1735 | if (!mode) |
1768 | if (!mode) |
1736 | return NULL; |
1769 | return NULL; |
1737 | 1770 | ||
1738 | if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH) |
1771 | if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH) |
1739 | timing->pixel_clock = cpu_to_le16(1088); |
1772 | timing->pixel_clock = cpu_to_le16(1088); |
1740 | 1773 | ||
1741 | mode->clock = le16_to_cpu(timing->pixel_clock) * 10; |
1774 | mode->clock = le16_to_cpu(timing->pixel_clock) * 10; |
1742 | 1775 | ||
1743 | mode->hdisplay = hactive; |
1776 | mode->hdisplay = hactive; |
1744 | mode->hsync_start = mode->hdisplay + hsync_offset; |
1777 | mode->hsync_start = mode->hdisplay + hsync_offset; |
1745 | mode->hsync_end = mode->hsync_start + hsync_pulse_width; |
1778 | mode->hsync_end = mode->hsync_start + hsync_pulse_width; |
1746 | mode->htotal = mode->hdisplay + hblank; |
1779 | mode->htotal = mode->hdisplay + hblank; |
1747 | 1780 | ||
1748 | mode->vdisplay = vactive; |
1781 | mode->vdisplay = vactive; |
1749 | mode->vsync_start = mode->vdisplay + vsync_offset; |
1782 | mode->vsync_start = mode->vdisplay + vsync_offset; |
1750 | mode->vsync_end = mode->vsync_start + vsync_pulse_width; |
1783 | mode->vsync_end = mode->vsync_start + vsync_pulse_width; |
1751 | mode->vtotal = mode->vdisplay + vblank; |
1784 | mode->vtotal = mode->vdisplay + vblank; |
1752 | 1785 | ||
1753 | /* Some EDIDs have bogus h/vtotal values */ |
1786 | /* Some EDIDs have bogus h/vtotal values */ |
1754 | if (mode->hsync_end > mode->htotal) |
1787 | if (mode->hsync_end > mode->htotal) |
1755 | mode->htotal = mode->hsync_end + 1; |
1788 | mode->htotal = mode->hsync_end + 1; |
1756 | if (mode->vsync_end > mode->vtotal) |
1789 | if (mode->vsync_end > mode->vtotal) |
1757 | mode->vtotal = mode->vsync_end + 1; |
1790 | mode->vtotal = mode->vsync_end + 1; |
1758 | 1791 | ||
1759 | drm_mode_do_interlace_quirk(mode, pt); |
1792 | drm_mode_do_interlace_quirk(mode, pt); |
1760 | 1793 | ||
1761 | if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) { |
1794 | if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) { |
1762 | pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE; |
1795 | pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE; |
1763 | } |
1796 | } |
1764 | 1797 | ||
1765 | mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? |
1798 | mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? |
1766 | DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; |
1799 | DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; |
1767 | mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? |
1800 | mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? |
1768 | DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; |
1801 | DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; |
1769 | 1802 | ||
1770 | set_size: |
1803 | set_size: |
1771 | mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4; |
1804 | mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4; |
1772 | mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8; |
1805 | mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8; |
1773 | 1806 | ||
1774 | if (quirks & EDID_QUIRK_DETAILED_IN_CM) { |
1807 | if (quirks & EDID_QUIRK_DETAILED_IN_CM) { |
1775 | mode->width_mm *= 10; |
1808 | mode->width_mm *= 10; |
1776 | mode->height_mm *= 10; |
1809 | mode->height_mm *= 10; |
1777 | } |
1810 | } |
1778 | 1811 | ||
1779 | if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) { |
1812 | if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) { |
1780 | mode->width_mm = edid->width_cm * 10; |
1813 | mode->width_mm = edid->width_cm * 10; |
1781 | mode->height_mm = edid->height_cm * 10; |
1814 | mode->height_mm = edid->height_cm * 10; |
1782 | } |
1815 | } |
1783 | 1816 | ||
1784 | mode->type = DRM_MODE_TYPE_DRIVER; |
1817 | mode->type = DRM_MODE_TYPE_DRIVER; |
1785 | mode->vrefresh = drm_mode_vrefresh(mode); |
1818 | mode->vrefresh = drm_mode_vrefresh(mode); |
1786 | drm_mode_set_name(mode); |
1819 | drm_mode_set_name(mode); |
1787 | 1820 | ||
1788 | return mode; |
1821 | return mode; |
1789 | } |
1822 | } |
1790 | 1823 | ||
1791 | static bool |
1824 | static bool |
1792 | mode_in_hsync_range(const struct drm_display_mode *mode, |
1825 | mode_in_hsync_range(const struct drm_display_mode *mode, |
1793 | struct edid *edid, u8 *t) |
1826 | struct edid *edid, u8 *t) |
1794 | { |
1827 | { |
1795 | int hsync, hmin, hmax; |
1828 | int hsync, hmin, hmax; |
1796 | 1829 | ||
1797 | hmin = t[7]; |
1830 | hmin = t[7]; |
1798 | if (edid->revision >= 4) |
1831 | if (edid->revision >= 4) |
1799 | hmin += ((t[4] & 0x04) ? 255 : 0); |
1832 | hmin += ((t[4] & 0x04) ? 255 : 0); |
1800 | hmax = t[8]; |
1833 | hmax = t[8]; |
1801 | if (edid->revision >= 4) |
1834 | if (edid->revision >= 4) |
1802 | hmax += ((t[4] & 0x08) ? 255 : 0); |
1835 | hmax += ((t[4] & 0x08) ? 255 : 0); |
1803 | hsync = drm_mode_hsync(mode); |
1836 | hsync = drm_mode_hsync(mode); |
1804 | 1837 | ||
1805 | return (hsync <= hmax && hsync >= hmin); |
1838 | return (hsync <= hmax && hsync >= hmin); |
1806 | } |
1839 | } |
1807 | 1840 | ||
1808 | static bool |
1841 | static bool |
1809 | mode_in_vsync_range(const struct drm_display_mode *mode, |
1842 | mode_in_vsync_range(const struct drm_display_mode *mode, |
1810 | struct edid *edid, u8 *t) |
1843 | struct edid *edid, u8 *t) |
1811 | { |
1844 | { |
1812 | int vsync, vmin, vmax; |
1845 | int vsync, vmin, vmax; |
1813 | 1846 | ||
1814 | vmin = t[5]; |
1847 | vmin = t[5]; |
1815 | if (edid->revision >= 4) |
1848 | if (edid->revision >= 4) |
1816 | vmin += ((t[4] & 0x01) ? 255 : 0); |
1849 | vmin += ((t[4] & 0x01) ? 255 : 0); |
1817 | vmax = t[6]; |
1850 | vmax = t[6]; |
1818 | if (edid->revision >= 4) |
1851 | if (edid->revision >= 4) |
1819 | vmax += ((t[4] & 0x02) ? 255 : 0); |
1852 | vmax += ((t[4] & 0x02) ? 255 : 0); |
1820 | vsync = drm_mode_vrefresh(mode); |
1853 | vsync = drm_mode_vrefresh(mode); |
1821 | 1854 | ||
1822 | return (vsync <= vmax && vsync >= vmin); |
1855 | return (vsync <= vmax && vsync >= vmin); |
1823 | } |
1856 | } |
1824 | 1857 | ||
1825 | static u32 |
1858 | static u32 |
1826 | range_pixel_clock(struct edid *edid, u8 *t) |
1859 | range_pixel_clock(struct edid *edid, u8 *t) |
1827 | { |
1860 | { |
1828 | /* unspecified */ |
1861 | /* unspecified */ |
1829 | if (t[9] == 0 || t[9] == 255) |
1862 | if (t[9] == 0 || t[9] == 255) |
1830 | return 0; |
1863 | return 0; |
1831 | 1864 | ||
1832 | /* 1.4 with CVT support gives us real precision, yay */ |
1865 | /* 1.4 with CVT support gives us real precision, yay */ |
1833 | if (edid->revision >= 4 && t[10] == 0x04) |
1866 | if (edid->revision >= 4 && t[10] == 0x04) |
1834 | return (t[9] * 10000) - ((t[12] >> 2) * 250); |
1867 | return (t[9] * 10000) - ((t[12] >> 2) * 250); |
1835 | 1868 | ||
1836 | /* 1.3 is pathetic, so fuzz up a bit */ |
1869 | /* 1.3 is pathetic, so fuzz up a bit */ |
1837 | return t[9] * 10000 + 5001; |
1870 | return t[9] * 10000 + 5001; |
1838 | } |
1871 | } |
1839 | 1872 | ||
1840 | static bool |
1873 | static bool |
1841 | mode_in_range(const struct drm_display_mode *mode, struct edid *edid, |
1874 | mode_in_range(const struct drm_display_mode *mode, struct edid *edid, |
1842 | struct detailed_timing *timing) |
1875 | struct detailed_timing *timing) |
1843 | { |
1876 | { |
1844 | u32 max_clock; |
1877 | u32 max_clock; |
1845 | u8 *t = (u8 *)timing; |
1878 | u8 *t = (u8 *)timing; |
1846 | 1879 | ||
1847 | if (!mode_in_hsync_range(mode, edid, t)) |
1880 | if (!mode_in_hsync_range(mode, edid, t)) |
1848 | return false; |
1881 | return false; |
1849 | 1882 | ||
1850 | if (!mode_in_vsync_range(mode, edid, t)) |
1883 | if (!mode_in_vsync_range(mode, edid, t)) |
1851 | return false; |
1884 | return false; |
1852 | 1885 | ||
1853 | if ((max_clock = range_pixel_clock(edid, t))) |
1886 | if ((max_clock = range_pixel_clock(edid, t))) |
1854 | if (mode->clock > max_clock) |
1887 | if (mode->clock > max_clock) |
1855 | return false; |
1888 | return false; |
1856 | 1889 | ||
1857 | /* 1.4 max horizontal check */ |
1890 | /* 1.4 max horizontal check */ |
1858 | if (edid->revision >= 4 && t[10] == 0x04) |
1891 | if (edid->revision >= 4 && t[10] == 0x04) |
1859 | if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3)))) |
1892 | if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3)))) |
1860 | return false; |
1893 | return false; |
1861 | 1894 | ||
1862 | if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid)) |
1895 | if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid)) |
1863 | return false; |
1896 | return false; |
1864 | 1897 | ||
1865 | return true; |
1898 | return true; |
1866 | } |
1899 | } |
1867 | 1900 | ||
1868 | static bool valid_inferred_mode(const struct drm_connector *connector, |
1901 | static bool valid_inferred_mode(const struct drm_connector *connector, |
1869 | const struct drm_display_mode *mode) |
1902 | const struct drm_display_mode *mode) |
1870 | { |
1903 | { |
1871 | struct drm_display_mode *m; |
1904 | struct drm_display_mode *m; |
1872 | bool ok = false; |
1905 | bool ok = false; |
1873 | 1906 | ||
1874 | list_for_each_entry(m, &connector->probed_modes, head) { |
1907 | list_for_each_entry(m, &connector->probed_modes, head) { |
1875 | if (mode->hdisplay == m->hdisplay && |
1908 | if (mode->hdisplay == m->hdisplay && |
1876 | mode->vdisplay == m->vdisplay && |
1909 | mode->vdisplay == m->vdisplay && |
1877 | drm_mode_vrefresh(mode) == drm_mode_vrefresh(m)) |
1910 | drm_mode_vrefresh(mode) == drm_mode_vrefresh(m)) |
1878 | return false; /* duplicated */ |
1911 | return false; /* duplicated */ |
1879 | if (mode->hdisplay <= m->hdisplay && |
1912 | if (mode->hdisplay <= m->hdisplay && |
1880 | mode->vdisplay <= m->vdisplay) |
1913 | mode->vdisplay <= m->vdisplay) |
1881 | ok = true; |
1914 | ok = true; |
1882 | } |
1915 | } |
1883 | return ok; |
1916 | return ok; |
1884 | } |
1917 | } |
1885 | 1918 | ||
1886 | static int |
1919 | static int |
1887 | drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid, |
1920 | drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid, |
1888 | struct detailed_timing *timing) |
1921 | struct detailed_timing *timing) |
1889 | { |
1922 | { |
1890 | int i, modes = 0; |
1923 | int i, modes = 0; |
1891 | struct drm_display_mode *newmode; |
1924 | struct drm_display_mode *newmode; |
1892 | struct drm_device *dev = connector->dev; |
1925 | struct drm_device *dev = connector->dev; |
1893 | 1926 | ||
1894 | for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) { |
1927 | for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) { |
1895 | if (mode_in_range(drm_dmt_modes + i, edid, timing) && |
1928 | if (mode_in_range(drm_dmt_modes + i, edid, timing) && |
1896 | valid_inferred_mode(connector, drm_dmt_modes + i)) { |
1929 | valid_inferred_mode(connector, drm_dmt_modes + i)) { |
1897 | newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]); |
1930 | newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]); |
1898 | if (newmode) { |
1931 | if (newmode) { |
1899 | drm_mode_probed_add(connector, newmode); |
1932 | drm_mode_probed_add(connector, newmode); |
1900 | modes++; |
1933 | modes++; |
1901 | } |
1934 | } |
1902 | } |
1935 | } |
1903 | } |
1936 | } |
1904 | 1937 | ||
1905 | return modes; |
1938 | return modes; |
1906 | } |
1939 | } |
1907 | 1940 | ||
1908 | /* fix up 1366x768 mode from 1368x768; |
1941 | /* fix up 1366x768 mode from 1368x768; |
1909 | * GFT/CVT can't express 1366 width which isn't dividable by 8 |
1942 | * GFT/CVT can't express 1366 width which isn't dividable by 8 |
1910 | */ |
1943 | */ |
1911 | static void fixup_mode_1366x768(struct drm_display_mode *mode) |
1944 | static void fixup_mode_1366x768(struct drm_display_mode *mode) |
1912 | { |
1945 | { |
1913 | if (mode->hdisplay == 1368 && mode->vdisplay == 768) { |
1946 | if (mode->hdisplay == 1368 && mode->vdisplay == 768) { |
1914 | mode->hdisplay = 1366; |
1947 | mode->hdisplay = 1366; |
1915 | mode->hsync_start--; |
1948 | mode->hsync_start--; |
1916 | mode->hsync_end--; |
1949 | mode->hsync_end--; |
1917 | drm_mode_set_name(mode); |
1950 | drm_mode_set_name(mode); |
1918 | } |
1951 | } |
1919 | } |
1952 | } |
1920 | 1953 | ||
1921 | static int |
1954 | static int |
1922 | drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid, |
1955 | drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid, |
1923 | struct detailed_timing *timing) |
1956 | struct detailed_timing *timing) |
1924 | { |
1957 | { |
1925 | int i, modes = 0; |
1958 | int i, modes = 0; |
1926 | struct drm_display_mode *newmode; |
1959 | struct drm_display_mode *newmode; |
1927 | struct drm_device *dev = connector->dev; |
1960 | struct drm_device *dev = connector->dev; |
1928 | 1961 | ||
1929 | for (i = 0; i < ARRAY_SIZE(extra_modes); i++) { |
1962 | for (i = 0; i < ARRAY_SIZE(extra_modes); i++) { |
1930 | const struct minimode *m = &extra_modes[i]; |
1963 | const struct minimode *m = &extra_modes[i]; |
1931 | newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0); |
1964 | newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0); |
1932 | if (!newmode) |
1965 | if (!newmode) |
1933 | return modes; |
1966 | return modes; |
1934 | 1967 | ||
1935 | fixup_mode_1366x768(newmode); |
1968 | fixup_mode_1366x768(newmode); |
1936 | if (!mode_in_range(newmode, edid, timing) || |
1969 | if (!mode_in_range(newmode, edid, timing) || |
1937 | !valid_inferred_mode(connector, newmode)) { |
1970 | !valid_inferred_mode(connector, newmode)) { |
1938 | drm_mode_destroy(dev, newmode); |
1971 | drm_mode_destroy(dev, newmode); |
1939 | continue; |
1972 | continue; |
1940 | } |
1973 | } |
1941 | 1974 | ||
1942 | drm_mode_probed_add(connector, newmode); |
1975 | drm_mode_probed_add(connector, newmode); |
1943 | modes++; |
1976 | modes++; |
1944 | } |
1977 | } |
1945 | 1978 | ||
1946 | return modes; |
1979 | return modes; |
1947 | } |
1980 | } |
1948 | 1981 | ||
1949 | static int |
1982 | static int |
1950 | drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid, |
1983 | drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid, |
1951 | struct detailed_timing *timing) |
1984 | struct detailed_timing *timing) |
1952 | { |
1985 | { |
1953 | int i, modes = 0; |
1986 | int i, modes = 0; |
1954 | struct drm_display_mode *newmode; |
1987 | struct drm_display_mode *newmode; |
1955 | struct drm_device *dev = connector->dev; |
1988 | struct drm_device *dev = connector->dev; |
1956 | bool rb = drm_monitor_supports_rb(edid); |
1989 | bool rb = drm_monitor_supports_rb(edid); |
1957 | 1990 | ||
1958 | for (i = 0; i < ARRAY_SIZE(extra_modes); i++) { |
1991 | for (i = 0; i < ARRAY_SIZE(extra_modes); i++) { |
1959 | const struct minimode *m = &extra_modes[i]; |
1992 | const struct minimode *m = &extra_modes[i]; |
1960 | newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0); |
1993 | newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0); |
1961 | if (!newmode) |
1994 | if (!newmode) |
1962 | return modes; |
1995 | return modes; |
1963 | 1996 | ||
1964 | fixup_mode_1366x768(newmode); |
1997 | fixup_mode_1366x768(newmode); |
1965 | if (!mode_in_range(newmode, edid, timing) || |
1998 | if (!mode_in_range(newmode, edid, timing) || |
1966 | !valid_inferred_mode(connector, newmode)) { |
1999 | !valid_inferred_mode(connector, newmode)) { |
1967 | drm_mode_destroy(dev, newmode); |
2000 | drm_mode_destroy(dev, newmode); |
1968 | continue; |
2001 | continue; |
1969 | } |
2002 | } |
1970 | 2003 | ||
1971 | drm_mode_probed_add(connector, newmode); |
2004 | drm_mode_probed_add(connector, newmode); |
1972 | modes++; |
2005 | modes++; |
1973 | } |
2006 | } |
1974 | 2007 | ||
1975 | return modes; |
2008 | return modes; |
1976 | } |
2009 | } |
1977 | 2010 | ||
1978 | static void |
2011 | static void |
1979 | do_inferred_modes(struct detailed_timing *timing, void *c) |
2012 | do_inferred_modes(struct detailed_timing *timing, void *c) |
1980 | { |
2013 | { |
1981 | struct detailed_mode_closure *closure = c; |
2014 | struct detailed_mode_closure *closure = c; |
1982 | struct detailed_non_pixel *data = &timing->data.other_data; |
2015 | struct detailed_non_pixel *data = &timing->data.other_data; |
1983 | struct detailed_data_monitor_range *range = &data->data.range; |
2016 | struct detailed_data_monitor_range *range = &data->data.range; |
1984 | 2017 | ||
1985 | if (data->type != EDID_DETAIL_MONITOR_RANGE) |
2018 | if (data->type != EDID_DETAIL_MONITOR_RANGE) |
1986 | return; |
2019 | return; |
1987 | 2020 | ||
1988 | closure->modes += drm_dmt_modes_for_range(closure->connector, |
2021 | closure->modes += drm_dmt_modes_for_range(closure->connector, |
1989 | closure->edid, |
2022 | closure->edid, |
1990 | timing); |
2023 | timing); |
1991 | 2024 | ||
1992 | if (!version_greater(closure->edid, 1, 1)) |
2025 | if (!version_greater(closure->edid, 1, 1)) |
1993 | return; /* GTF not defined yet */ |
2026 | return; /* GTF not defined yet */ |
1994 | 2027 | ||
1995 | switch (range->flags) { |
2028 | switch (range->flags) { |
1996 | case 0x02: /* secondary gtf, XXX could do more */ |
2029 | case 0x02: /* secondary gtf, XXX could do more */ |
1997 | case 0x00: /* default gtf */ |
2030 | case 0x00: /* default gtf */ |
1998 | closure->modes += drm_gtf_modes_for_range(closure->connector, |
2031 | closure->modes += drm_gtf_modes_for_range(closure->connector, |
1999 | closure->edid, |
2032 | closure->edid, |
2000 | timing); |
2033 | timing); |
2001 | break; |
2034 | break; |
2002 | case 0x04: /* cvt, only in 1.4+ */ |
2035 | case 0x04: /* cvt, only in 1.4+ */ |
2003 | if (!version_greater(closure->edid, 1, 3)) |
2036 | if (!version_greater(closure->edid, 1, 3)) |
2004 | break; |
2037 | break; |
2005 | 2038 | ||
2006 | closure->modes += drm_cvt_modes_for_range(closure->connector, |
2039 | closure->modes += drm_cvt_modes_for_range(closure->connector, |
2007 | closure->edid, |
2040 | closure->edid, |
2008 | timing); |
2041 | timing); |
2009 | break; |
2042 | break; |
2010 | case 0x01: /* just the ranges, no formula */ |
2043 | case 0x01: /* just the ranges, no formula */ |
2011 | default: |
2044 | default: |
2012 | break; |
2045 | break; |
2013 | } |
2046 | } |
2014 | } |
2047 | } |
2015 | 2048 | ||
2016 | static int |
2049 | static int |
2017 | add_inferred_modes(struct drm_connector *connector, struct edid *edid) |
2050 | add_inferred_modes(struct drm_connector *connector, struct edid *edid) |
2018 | { |
2051 | { |
2019 | struct detailed_mode_closure closure = { |
2052 | struct detailed_mode_closure closure = { |
2020 | connector, edid, 0, 0, 0 |
2053 | connector, edid, 0, 0, 0 |
2021 | }; |
2054 | }; |
2022 | 2055 | ||
2023 | if (version_greater(edid, 1, 0)) |
2056 | if (version_greater(edid, 1, 0)) |
2024 | drm_for_each_detailed_block((u8 *)edid, do_inferred_modes, |
2057 | drm_for_each_detailed_block((u8 *)edid, do_inferred_modes, |
2025 | &closure); |
2058 | &closure); |
2026 | 2059 | ||
2027 | return closure.modes; |
2060 | return closure.modes; |
2028 | } |
2061 | } |
2029 | 2062 | ||
2030 | static int |
2063 | static int |
2031 | drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing) |
2064 | drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing) |
2032 | { |
2065 | { |
2033 | int i, j, m, modes = 0; |
2066 | int i, j, m, modes = 0; |
2034 | struct drm_display_mode *mode; |
2067 | struct drm_display_mode *mode; |
2035 | u8 *est = ((u8 *)timing) + 5; |
2068 | u8 *est = ((u8 *)timing) + 5; |
2036 | 2069 | ||
2037 | for (i = 0; i < 6; i++) { |
2070 | for (i = 0; i < 6; i++) { |
2038 | for (j = 7; j > 0; j--) { |
2071 | for (j = 7; j > 0; j--) { |
2039 | m = (i * 8) + (7 - j); |
2072 | m = (i * 8) + (7 - j); |
2040 | if (m >= ARRAY_SIZE(est3_modes)) |
2073 | if (m >= ARRAY_SIZE(est3_modes)) |
2041 | break; |
2074 | break; |
2042 | if (est[i] & (1 << j)) { |
2075 | if (est[i] & (1 << j)) { |
2043 | mode = drm_mode_find_dmt(connector->dev, |
2076 | mode = drm_mode_find_dmt(connector->dev, |
2044 | est3_modes[m].w, |
2077 | est3_modes[m].w, |
2045 | est3_modes[m].h, |
2078 | est3_modes[m].h, |
2046 | est3_modes[m].r, |
2079 | est3_modes[m].r, |
2047 | est3_modes[m].rb); |
2080 | est3_modes[m].rb); |
2048 | if (mode) { |
2081 | if (mode) { |
2049 | drm_mode_probed_add(connector, mode); |
2082 | drm_mode_probed_add(connector, mode); |
2050 | modes++; |
2083 | modes++; |
2051 | } |
2084 | } |
2052 | } |
2085 | } |
2053 | } |
2086 | } |
2054 | } |
2087 | } |
2055 | 2088 | ||
2056 | return modes; |
2089 | return modes; |
2057 | } |
2090 | } |
2058 | 2091 | ||
2059 | static void |
2092 | static void |
2060 | do_established_modes(struct detailed_timing *timing, void *c) |
2093 | do_established_modes(struct detailed_timing *timing, void *c) |
2061 | { |
2094 | { |
2062 | struct detailed_mode_closure *closure = c; |
2095 | struct detailed_mode_closure *closure = c; |
2063 | struct detailed_non_pixel *data = &timing->data.other_data; |
2096 | struct detailed_non_pixel *data = &timing->data.other_data; |
2064 | 2097 | ||
2065 | if (data->type == EDID_DETAIL_EST_TIMINGS) |
2098 | if (data->type == EDID_DETAIL_EST_TIMINGS) |
2066 | closure->modes += drm_est3_modes(closure->connector, timing); |
2099 | closure->modes += drm_est3_modes(closure->connector, timing); |
2067 | } |
2100 | } |
2068 | 2101 | ||
2069 | /** |
2102 | /** |
2070 | * add_established_modes - get est. modes from EDID and add them |
2103 | * add_established_modes - get est. modes from EDID and add them |
2071 | * @edid: EDID block to scan |
2104 | * @edid: EDID block to scan |
2072 | * |
2105 | * |
2073 | * Each EDID block contains a bitmap of the supported "established modes" list |
2106 | * Each EDID block contains a bitmap of the supported "established modes" list |
2074 | * (defined above). Tease them out and add them to the global modes list. |
2107 | * (defined above). Tease them out and add them to the global modes list. |
2075 | */ |
2108 | */ |
2076 | static int |
2109 | static int |
2077 | add_established_modes(struct drm_connector *connector, struct edid *edid) |
2110 | add_established_modes(struct drm_connector *connector, struct edid *edid) |
2078 | { |
2111 | { |
2079 | struct drm_device *dev = connector->dev; |
2112 | struct drm_device *dev = connector->dev; |
2080 | unsigned long est_bits = edid->established_timings.t1 | |
2113 | unsigned long est_bits = edid->established_timings.t1 | |
2081 | (edid->established_timings.t2 << 8) | |
2114 | (edid->established_timings.t2 << 8) | |
2082 | ((edid->established_timings.mfg_rsvd & 0x80) << 9); |
2115 | ((edid->established_timings.mfg_rsvd & 0x80) << 9); |
2083 | int i, modes = 0; |
2116 | int i, modes = 0; |
2084 | struct detailed_mode_closure closure = { |
2117 | struct detailed_mode_closure closure = { |
2085 | connector, edid, 0, 0, 0 |
2118 | connector, edid, 0, 0, 0 |
2086 | }; |
2119 | }; |
2087 | 2120 | ||
2088 | for (i = 0; i <= EDID_EST_TIMINGS; i++) { |
2121 | for (i = 0; i <= EDID_EST_TIMINGS; i++) { |
2089 | if (est_bits & (1< |
2122 | if (est_bits & (1< |
2090 | struct drm_display_mode *newmode; |
2123 | struct drm_display_mode *newmode; |
2091 | newmode = drm_mode_duplicate(dev, &edid_est_modes[i]); |
2124 | newmode = drm_mode_duplicate(dev, &edid_est_modes[i]); |
2092 | if (newmode) { |
2125 | if (newmode) { |
2093 | drm_mode_probed_add(connector, newmode); |
2126 | drm_mode_probed_add(connector, newmode); |
2094 | modes++; |
2127 | modes++; |
2095 | } |
2128 | } |
2096 | } |
2129 | } |
2097 | } |
2130 | } |
2098 | 2131 | ||
2099 | if (version_greater(edid, 1, 0)) |
2132 | if (version_greater(edid, 1, 0)) |
2100 | drm_for_each_detailed_block((u8 *)edid, |
2133 | drm_for_each_detailed_block((u8 *)edid, |
2101 | do_established_modes, &closure); |
2134 | do_established_modes, &closure); |
2102 | 2135 | ||
2103 | return modes + closure.modes; |
2136 | return modes + closure.modes; |
2104 | } |
2137 | } |
2105 | 2138 | ||
2106 | static void |
2139 | static void |
2107 | do_standard_modes(struct detailed_timing *timing, void *c) |
2140 | do_standard_modes(struct detailed_timing *timing, void *c) |
2108 | { |
2141 | { |
2109 | struct detailed_mode_closure *closure = c; |
2142 | struct detailed_mode_closure *closure = c; |
2110 | struct detailed_non_pixel *data = &timing->data.other_data; |
2143 | struct detailed_non_pixel *data = &timing->data.other_data; |
2111 | struct drm_connector *connector = closure->connector; |
2144 | struct drm_connector *connector = closure->connector; |
2112 | struct edid *edid = closure->edid; |
2145 | struct edid *edid = closure->edid; |
2113 | 2146 | ||
2114 | if (data->type == EDID_DETAIL_STD_MODES) { |
2147 | if (data->type == EDID_DETAIL_STD_MODES) { |
2115 | int i; |
2148 | int i; |
2116 | for (i = 0; i < 6; i++) { |
2149 | for (i = 0; i < 6; i++) { |
2117 | struct std_timing *std; |
2150 | struct std_timing *std; |
2118 | struct drm_display_mode *newmode; |
2151 | struct drm_display_mode *newmode; |
2119 | 2152 | ||
2120 | std = &data->data.timings[i]; |
2153 | std = &data->data.timings[i]; |
2121 | newmode = drm_mode_std(connector, edid, std, |
2154 | newmode = drm_mode_std(connector, edid, std, |
2122 | edid->revision); |
2155 | edid->revision); |
2123 | if (newmode) { |
2156 | if (newmode) { |
2124 | drm_mode_probed_add(connector, newmode); |
2157 | drm_mode_probed_add(connector, newmode); |
2125 | closure->modes++; |
2158 | closure->modes++; |
2126 | } |
2159 | } |
2127 | } |
2160 | } |
2128 | } |
2161 | } |
2129 | } |
2162 | } |
2130 | 2163 | ||
2131 | /** |
2164 | /** |
2132 | * add_standard_modes - get std. modes from EDID and add them |
2165 | * add_standard_modes - get std. modes from EDID and add them |
2133 | * @edid: EDID block to scan |
2166 | * @edid: EDID block to scan |
2134 | * |
2167 | * |
2135 | * Standard modes can be calculated using the appropriate standard (DMT, |
2168 | * Standard modes can be calculated using the appropriate standard (DMT, |
2136 | * GTF or CVT. Grab them from @edid and add them to the list. |
2169 | * GTF or CVT. Grab them from @edid and add them to the list. |
2137 | */ |
2170 | */ |
2138 | static int |
2171 | static int |
2139 | add_standard_modes(struct drm_connector *connector, struct edid *edid) |
2172 | add_standard_modes(struct drm_connector *connector, struct edid *edid) |
2140 | { |
2173 | { |
2141 | int i, modes = 0; |
2174 | int i, modes = 0; |
2142 | struct detailed_mode_closure closure = { |
2175 | struct detailed_mode_closure closure = { |
2143 | connector, edid, 0, 0, 0 |
2176 | connector, edid, 0, 0, 0 |
2144 | }; |
2177 | }; |
2145 | 2178 | ||
2146 | for (i = 0; i < EDID_STD_TIMINGS; i++) { |
2179 | for (i = 0; i < EDID_STD_TIMINGS; i++) { |
2147 | struct drm_display_mode *newmode; |
2180 | struct drm_display_mode *newmode; |
2148 | 2181 | ||
2149 | newmode = drm_mode_std(connector, edid, |
2182 | newmode = drm_mode_std(connector, edid, |
2150 | &edid->standard_timings[i], |
2183 | &edid->standard_timings[i], |
2151 | edid->revision); |
2184 | edid->revision); |
2152 | if (newmode) { |
2185 | if (newmode) { |
2153 | drm_mode_probed_add(connector, newmode); |
2186 | drm_mode_probed_add(connector, newmode); |
2154 | modes++; |
2187 | modes++; |
2155 | } |
2188 | } |
2156 | } |
2189 | } |
2157 | 2190 | ||
2158 | if (version_greater(edid, 1, 0)) |
2191 | if (version_greater(edid, 1, 0)) |
2159 | drm_for_each_detailed_block((u8 *)edid, do_standard_modes, |
2192 | drm_for_each_detailed_block((u8 *)edid, do_standard_modes, |
2160 | &closure); |
2193 | &closure); |
2161 | 2194 | ||
2162 | /* XXX should also look for standard codes in VTB blocks */ |
2195 | /* XXX should also look for standard codes in VTB blocks */ |
2163 | 2196 | ||
2164 | return modes + closure.modes; |
2197 | return modes + closure.modes; |
2165 | } |
2198 | } |
2166 | 2199 | ||
2167 | static int drm_cvt_modes(struct drm_connector *connector, |
2200 | static int drm_cvt_modes(struct drm_connector *connector, |
2168 | struct detailed_timing *timing) |
2201 | struct detailed_timing *timing) |
2169 | { |
2202 | { |
2170 | int i, j, modes = 0; |
2203 | int i, j, modes = 0; |
2171 | struct drm_display_mode *newmode; |
2204 | struct drm_display_mode *newmode; |
2172 | struct drm_device *dev = connector->dev; |
2205 | struct drm_device *dev = connector->dev; |
2173 | struct cvt_timing *cvt; |
2206 | struct cvt_timing *cvt; |
2174 | const int rates[] = { 60, 85, 75, 60, 50 }; |
2207 | const int rates[] = { 60, 85, 75, 60, 50 }; |
2175 | const u8 empty[3] = { 0, 0, 0 }; |
2208 | const u8 empty[3] = { 0, 0, 0 }; |
2176 | 2209 | ||
2177 | for (i = 0; i < 4; i++) { |
2210 | for (i = 0; i < 4; i++) { |
2178 | int uninitialized_var(width), height; |
2211 | int uninitialized_var(width), height; |
2179 | cvt = &(timing->data.other_data.data.cvt[i]); |
2212 | cvt = &(timing->data.other_data.data.cvt[i]); |
2180 | 2213 | ||
2181 | if (!memcmp(cvt->code, empty, 3)) |
2214 | if (!memcmp(cvt->code, empty, 3)) |
2182 | continue; |
2215 | continue; |
2183 | 2216 | ||
2184 | height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2; |
2217 | height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2; |
2185 | switch (cvt->code[1] & 0x0c) { |
2218 | switch (cvt->code[1] & 0x0c) { |
2186 | case 0x00: |
2219 | case 0x00: |
2187 | width = height * 4 / 3; |
2220 | width = height * 4 / 3; |
2188 | break; |
2221 | break; |
2189 | case 0x04: |
2222 | case 0x04: |
2190 | width = height * 16 / 9; |
2223 | width = height * 16 / 9; |
2191 | break; |
2224 | break; |
2192 | case 0x08: |
2225 | case 0x08: |
2193 | width = height * 16 / 10; |
2226 | width = height * 16 / 10; |
2194 | break; |
2227 | break; |
2195 | case 0x0c: |
2228 | case 0x0c: |
2196 | width = height * 15 / 9; |
2229 | width = height * 15 / 9; |
2197 | break; |
2230 | break; |
2198 | } |
2231 | } |
2199 | 2232 | ||
2200 | for (j = 1; j < 5; j++) { |
2233 | for (j = 1; j < 5; j++) { |
2201 | if (cvt->code[2] & (1 << j)) { |
2234 | if (cvt->code[2] & (1 << j)) { |
2202 | newmode = drm_cvt_mode(dev, width, height, |
2235 | newmode = drm_cvt_mode(dev, width, height, |
2203 | rates[j], j == 0, |
2236 | rates[j], j == 0, |
2204 | false, false); |
2237 | false, false); |
2205 | if (newmode) { |
2238 | if (newmode) { |
2206 | drm_mode_probed_add(connector, newmode); |
2239 | drm_mode_probed_add(connector, newmode); |
2207 | modes++; |
2240 | modes++; |
2208 | } |
2241 | } |
2209 | } |
2242 | } |
2210 | } |
2243 | } |
2211 | } |
2244 | } |
2212 | 2245 | ||
2213 | return modes; |
2246 | return modes; |
2214 | } |
2247 | } |
2215 | 2248 | ||
2216 | static void |
2249 | static void |
2217 | do_cvt_mode(struct detailed_timing *timing, void *c) |
2250 | do_cvt_mode(struct detailed_timing *timing, void *c) |
2218 | { |
2251 | { |
2219 | struct detailed_mode_closure *closure = c; |
2252 | struct detailed_mode_closure *closure = c; |
2220 | struct detailed_non_pixel *data = &timing->data.other_data; |
2253 | struct detailed_non_pixel *data = &timing->data.other_data; |
2221 | 2254 | ||
2222 | if (data->type == EDID_DETAIL_CVT_3BYTE) |
2255 | if (data->type == EDID_DETAIL_CVT_3BYTE) |
2223 | closure->modes += drm_cvt_modes(closure->connector, timing); |
2256 | closure->modes += drm_cvt_modes(closure->connector, timing); |
2224 | } |
2257 | } |
2225 | 2258 | ||
2226 | static int |
2259 | static int |
2227 | add_cvt_modes(struct drm_connector *connector, struct edid *edid) |
2260 | add_cvt_modes(struct drm_connector *connector, struct edid *edid) |
2228 | { |
2261 | { |
2229 | struct detailed_mode_closure closure = { |
2262 | struct detailed_mode_closure closure = { |
2230 | connector, edid, 0, 0, 0 |
2263 | connector, edid, 0, 0, 0 |
2231 | }; |
2264 | }; |
2232 | 2265 | ||
2233 | if (version_greater(edid, 1, 2)) |
2266 | if (version_greater(edid, 1, 2)) |
2234 | drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure); |
2267 | drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure); |
2235 | 2268 | ||
2236 | /* XXX should also look for CVT codes in VTB blocks */ |
2269 | /* XXX should also look for CVT codes in VTB blocks */ |
2237 | 2270 | ||
2238 | return closure.modes; |
2271 | return closure.modes; |
2239 | } |
2272 | } |
2240 | 2273 | ||
2241 | static void |
2274 | static void |
2242 | do_detailed_mode(struct detailed_timing *timing, void *c) |
2275 | do_detailed_mode(struct detailed_timing *timing, void *c) |
2243 | { |
2276 | { |
2244 | struct detailed_mode_closure *closure = c; |
2277 | struct detailed_mode_closure *closure = c; |
2245 | struct drm_display_mode *newmode; |
2278 | struct drm_display_mode *newmode; |
2246 | 2279 | ||
2247 | if (timing->pixel_clock) { |
2280 | if (timing->pixel_clock) { |
2248 | newmode = drm_mode_detailed(closure->connector->dev, |
2281 | newmode = drm_mode_detailed(closure->connector->dev, |
2249 | closure->edid, timing, |
2282 | closure->edid, timing, |
2250 | closure->quirks); |
2283 | closure->quirks); |
2251 | if (!newmode) |
2284 | if (!newmode) |
2252 | return; |
2285 | return; |
2253 | 2286 | ||
2254 | if (closure->preferred) |
2287 | if (closure->preferred) |
2255 | newmode->type |= DRM_MODE_TYPE_PREFERRED; |
2288 | newmode->type |= DRM_MODE_TYPE_PREFERRED; |
2256 | 2289 | ||
2257 | drm_mode_probed_add(closure->connector, newmode); |
2290 | drm_mode_probed_add(closure->connector, newmode); |
2258 | closure->modes++; |
2291 | closure->modes++; |
2259 | closure->preferred = 0; |
2292 | closure->preferred = 0; |
2260 | } |
2293 | } |
2261 | } |
2294 | } |
2262 | 2295 | ||
2263 | /* |
2296 | /* |
2264 | * add_detailed_modes - Add modes from detailed timings |
2297 | * add_detailed_modes - Add modes from detailed timings |
2265 | * @connector: attached connector |
2298 | * @connector: attached connector |
2266 | * @edid: EDID block to scan |
2299 | * @edid: EDID block to scan |
2267 | * @quirks: quirks to apply |
2300 | * @quirks: quirks to apply |
2268 | */ |
2301 | */ |
2269 | static int |
2302 | static int |
2270 | add_detailed_modes(struct drm_connector *connector, struct edid *edid, |
2303 | add_detailed_modes(struct drm_connector *connector, struct edid *edid, |
2271 | u32 quirks) |
2304 | u32 quirks) |
2272 | { |
2305 | { |
2273 | struct detailed_mode_closure closure = { |
2306 | struct detailed_mode_closure closure = { |
2274 | connector, |
2307 | connector, |
2275 | edid, |
2308 | edid, |
2276 | 1, |
2309 | 1, |
2277 | quirks, |
2310 | quirks, |
2278 | 0 |
2311 | 0 |
2279 | }; |
2312 | }; |
2280 | 2313 | ||
2281 | if (closure.preferred && !version_greater(edid, 1, 3)) |
2314 | if (closure.preferred && !version_greater(edid, 1, 3)) |
2282 | closure.preferred = |
2315 | closure.preferred = |
2283 | (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING); |
2316 | (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING); |
2284 | 2317 | ||
2285 | drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure); |
2318 | drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure); |
2286 | 2319 | ||
2287 | return closure.modes; |
2320 | return closure.modes; |
2288 | } |
2321 | } |
2289 | - | ||
2290 | #define HDMI_IDENTIFIER 0x000C03 |
2322 | |
2291 | #define AUDIO_BLOCK 0x01 |
2323 | #define AUDIO_BLOCK 0x01 |
2292 | #define VIDEO_BLOCK 0x02 |
2324 | #define VIDEO_BLOCK 0x02 |
2293 | #define VENDOR_BLOCK 0x03 |
2325 | #define VENDOR_BLOCK 0x03 |
2294 | #define SPEAKER_BLOCK 0x04 |
2326 | #define SPEAKER_BLOCK 0x04 |
2295 | #define VIDEO_CAPABILITY_BLOCK 0x07 |
2327 | #define VIDEO_CAPABILITY_BLOCK 0x07 |
2296 | #define EDID_BASIC_AUDIO (1 << 6) |
2328 | #define EDID_BASIC_AUDIO (1 << 6) |
2297 | #define EDID_CEA_YCRCB444 (1 << 5) |
2329 | #define EDID_CEA_YCRCB444 (1 << 5) |
2298 | #define EDID_CEA_YCRCB422 (1 << 4) |
2330 | #define EDID_CEA_YCRCB422 (1 << 4) |
2299 | #define EDID_CEA_VCDB_QS (1 << 6) |
2331 | #define EDID_CEA_VCDB_QS (1 << 6) |
2300 | 2332 | ||
2301 | /** |
2333 | /* |
2302 | * Search EDID for CEA extension block. |
2334 | * Search EDID for CEA extension block. |
2303 | */ |
2335 | */ |
2304 | u8 *drm_find_cea_extension(struct edid *edid) |
2336 | static u8 *drm_find_cea_extension(struct edid *edid) |
2305 | { |
2337 | { |
2306 | u8 *edid_ext = NULL; |
2338 | u8 *edid_ext = NULL; |
2307 | int i; |
2339 | int i; |
2308 | 2340 | ||
2309 | /* No EDID or EDID extensions */ |
2341 | /* No EDID or EDID extensions */ |
2310 | if (edid == NULL || edid->extensions == 0) |
2342 | if (edid == NULL || edid->extensions == 0) |
2311 | return NULL; |
2343 | return NULL; |
2312 | 2344 | ||
2313 | /* Find CEA extension */ |
2345 | /* Find CEA extension */ |
2314 | for (i = 0; i < edid->extensions; i++) { |
2346 | for (i = 0; i < edid->extensions; i++) { |
2315 | edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1); |
2347 | edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1); |
2316 | if (edid_ext[0] == CEA_EXT) |
2348 | if (edid_ext[0] == CEA_EXT) |
2317 | break; |
2349 | break; |
2318 | } |
2350 | } |
2319 | 2351 | ||
2320 | if (i == edid->extensions) |
2352 | if (i == edid->extensions) |
2321 | return NULL; |
2353 | return NULL; |
2322 | 2354 | ||
2323 | return edid_ext; |
2355 | return edid_ext; |
2324 | } |
2356 | } |
2325 | EXPORT_SYMBOL(drm_find_cea_extension); |
- | |
2326 | 2357 | ||
2327 | /* |
2358 | /* |
2328 | * Calculate the alternate clock for the CEA mode |
2359 | * Calculate the alternate clock for the CEA mode |
2329 | * (60Hz vs. 59.94Hz etc.) |
2360 | * (60Hz vs. 59.94Hz etc.) |
2330 | */ |
2361 | */ |
2331 | static unsigned int |
2362 | static unsigned int |
2332 | cea_mode_alternate_clock(const struct drm_display_mode *cea_mode) |
2363 | cea_mode_alternate_clock(const struct drm_display_mode *cea_mode) |
2333 | { |
2364 | { |
2334 | unsigned int clock = cea_mode->clock; |
2365 | unsigned int clock = cea_mode->clock; |
2335 | 2366 | ||
2336 | if (cea_mode->vrefresh % 6 != 0) |
2367 | if (cea_mode->vrefresh % 6 != 0) |
2337 | return clock; |
2368 | return clock; |
2338 | 2369 | ||
2339 | /* |
2370 | /* |
2340 | * edid_cea_modes contains the 59.94Hz |
2371 | * edid_cea_modes contains the 59.94Hz |
2341 | * variant for 240 and 480 line modes, |
2372 | * variant for 240 and 480 line modes, |
2342 | * and the 60Hz variant otherwise. |
2373 | * and the 60Hz variant otherwise. |
2343 | */ |
2374 | */ |
2344 | if (cea_mode->vdisplay == 240 || cea_mode->vdisplay == 480) |
2375 | if (cea_mode->vdisplay == 240 || cea_mode->vdisplay == 480) |
2345 | clock = clock * 1001 / 1000; |
2376 | clock = clock * 1001 / 1000; |
2346 | else |
2377 | else |
2347 | clock = DIV_ROUND_UP(clock * 1000, 1001); |
2378 | clock = DIV_ROUND_UP(clock * 1000, 1001); |
2348 | 2379 | ||
2349 | return clock; |
2380 | return clock; |
2350 | } |
2381 | } |
2351 | 2382 | ||
2352 | /** |
2383 | /** |
2353 | * drm_match_cea_mode - look for a CEA mode matching given mode |
2384 | * drm_match_cea_mode - look for a CEA mode matching given mode |
2354 | * @to_match: display mode |
2385 | * @to_match: display mode |
2355 | * |
2386 | * |
2356 | * Returns the CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861 |
2387 | * Returns the CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861 |
2357 | * mode. |
2388 | * mode. |
2358 | */ |
2389 | */ |
2359 | u8 drm_match_cea_mode(const struct drm_display_mode *to_match) |
2390 | u8 drm_match_cea_mode(const struct drm_display_mode *to_match) |
2360 | { |
2391 | { |
2361 | u8 mode; |
2392 | u8 mode; |
2362 | 2393 | ||
2363 | if (!to_match->clock) |
2394 | if (!to_match->clock) |
2364 | return 0; |
2395 | return 0; |
2365 | 2396 | ||
2366 | for (mode = 0; mode < ARRAY_SIZE(edid_cea_modes); mode++) { |
2397 | for (mode = 0; mode < ARRAY_SIZE(edid_cea_modes); mode++) { |
2367 | const struct drm_display_mode *cea_mode = &edid_cea_modes[mode]; |
2398 | const struct drm_display_mode *cea_mode = &edid_cea_modes[mode]; |
2368 | unsigned int clock1, clock2; |
2399 | unsigned int clock1, clock2; |
2369 | 2400 | ||
2370 | /* Check both 60Hz and 59.94Hz */ |
2401 | /* Check both 60Hz and 59.94Hz */ |
2371 | clock1 = cea_mode->clock; |
2402 | clock1 = cea_mode->clock; |
2372 | clock2 = cea_mode_alternate_clock(cea_mode); |
2403 | clock2 = cea_mode_alternate_clock(cea_mode); |
2373 | 2404 | ||
2374 | if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) || |
2405 | if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) || |
2375 | KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) && |
2406 | KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) && |
2376 | drm_mode_equal_no_clocks(to_match, cea_mode)) |
2407 | drm_mode_equal_no_clocks(to_match, cea_mode)) |
2377 | return mode + 1; |
2408 | return mode + 1; |
2378 | } |
2409 | } |
2379 | return 0; |
2410 | return 0; |
2380 | } |
2411 | } |
2381 | EXPORT_SYMBOL(drm_match_cea_mode); |
2412 | EXPORT_SYMBOL(drm_match_cea_mode); |
- | 2413 | ||
- | 2414 | /* |
|
- | 2415 | * Calculate the alternate clock for HDMI modes (those from the HDMI vendor |
|
- | 2416 | * specific block). |
|
- | 2417 | * |
|
- | 2418 | * It's almost like cea_mode_alternate_clock(), we just need to add an |
|
- | 2419 | * exception for the VIC 4 mode (4096x2160@24Hz): no alternate clock for this |
|
- | 2420 | * one. |
|
- | 2421 | */ |
|
- | 2422 | static unsigned int |
|
- | 2423 | hdmi_mode_alternate_clock(const struct drm_display_mode *hdmi_mode) |
|
- | 2424 | { |
|
- | 2425 | if (hdmi_mode->vdisplay == 4096 && hdmi_mode->hdisplay == 2160) |
|
- | 2426 | return hdmi_mode->clock; |
|
- | 2427 | ||
- | 2428 | return cea_mode_alternate_clock(hdmi_mode); |
|
- | 2429 | } |
|
- | 2430 | ||
- | 2431 | /* |
|
- | 2432 | * drm_match_hdmi_mode - look for a HDMI mode matching given mode |
|
- | 2433 | * @to_match: display mode |
|
- | 2434 | * |
|
- | 2435 | * An HDMI mode is one defined in the HDMI vendor specific block. |
|
- | 2436 | * |
|
- | 2437 | * Returns the HDMI Video ID (VIC) of the mode or 0 if it isn't one. |
|
- | 2438 | */ |
|
- | 2439 | static u8 drm_match_hdmi_mode(const struct drm_display_mode *to_match) |
|
- | 2440 | { |
|
- | 2441 | u8 mode; |
|
- | 2442 | ||
- | 2443 | if (!to_match->clock) |
|
- | 2444 | return 0; |
|
- | 2445 | ||
- | 2446 | for (mode = 0; mode < ARRAY_SIZE(edid_4k_modes); mode++) { |
|
- | 2447 | const struct drm_display_mode *hdmi_mode = &edid_4k_modes[mode]; |
|
- | 2448 | unsigned int clock1, clock2; |
|
- | 2449 | ||
- | 2450 | /* Make sure to also match alternate clocks */ |
|
- | 2451 | clock1 = hdmi_mode->clock; |
|
- | 2452 | clock2 = hdmi_mode_alternate_clock(hdmi_mode); |
|
- | 2453 | ||
- | 2454 | if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) || |
|
- | 2455 | KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) && |
|
- | 2456 | drm_mode_equal_no_clocks(to_match, hdmi_mode)) |
|
- | 2457 | return mode + 1; |
|
- | 2458 | } |
|
- | 2459 | return 0; |
|
- | 2460 | } |
|
2382 | 2461 | ||
2383 | static int |
2462 | static int |
2384 | add_alternate_cea_modes(struct drm_connector *connector, struct edid *edid) |
2463 | add_alternate_cea_modes(struct drm_connector *connector, struct edid *edid) |
2385 | { |
2464 | { |
2386 | struct drm_device *dev = connector->dev; |
2465 | struct drm_device *dev = connector->dev; |
2387 | struct drm_display_mode *mode, *tmp; |
2466 | struct drm_display_mode *mode, *tmp; |
2388 | LIST_HEAD(list); |
2467 | LIST_HEAD(list); |
2389 | int modes = 0; |
2468 | int modes = 0; |
2390 | 2469 | ||
2391 | /* Don't add CEA modes if the CEA extension block is missing */ |
2470 | /* Don't add CEA modes if the CEA extension block is missing */ |
2392 | if (!drm_find_cea_extension(edid)) |
2471 | if (!drm_find_cea_extension(edid)) |
2393 | return 0; |
2472 | return 0; |
2394 | 2473 | ||
2395 | /* |
2474 | /* |
2396 | * Go through all probed modes and create a new mode |
2475 | * Go through all probed modes and create a new mode |
2397 | * with the alternate clock for certain CEA modes. |
2476 | * with the alternate clock for certain CEA modes. |
2398 | */ |
2477 | */ |
2399 | list_for_each_entry(mode, &connector->probed_modes, head) { |
2478 | list_for_each_entry(mode, &connector->probed_modes, head) { |
2400 | const struct drm_display_mode *cea_mode; |
2479 | const struct drm_display_mode *cea_mode = NULL; |
2401 | struct drm_display_mode *newmode; |
2480 | struct drm_display_mode *newmode; |
2402 | u8 cea_mode_idx = drm_match_cea_mode(mode) - 1; |
2481 | u8 mode_idx = drm_match_cea_mode(mode) - 1; |
2403 | unsigned int clock1, clock2; |
2482 | unsigned int clock1, clock2; |
2404 | 2483 | ||
- | 2484 | if (mode_idx < ARRAY_SIZE(edid_cea_modes)) { |
|
- | 2485 | cea_mode = &edid_cea_modes[mode_idx]; |
|
2405 | if (cea_mode_idx >= ARRAY_SIZE(edid_cea_modes)) |
2486 | clock2 = cea_mode_alternate_clock(cea_mode); |
- | 2487 | } else { |
|
- | 2488 | mode_idx = drm_match_hdmi_mode(mode) - 1; |
|
- | 2489 | if (mode_idx < ARRAY_SIZE(edid_4k_modes)) { |
|
- | 2490 | cea_mode = &edid_4k_modes[mode_idx]; |
|
- | 2491 | clock2 = hdmi_mode_alternate_clock(cea_mode); |
|
- | 2492 | } |
|
2406 | continue; |
2493 | } |
- | 2494 | ||
2407 | 2495 | if (!cea_mode) |
|
2408 | cea_mode = &edid_cea_modes[cea_mode_idx]; |
- | |
2409 | 2496 | continue; |
|
2410 | clock1 = cea_mode->clock; |
2497 | |
2411 | clock2 = cea_mode_alternate_clock(cea_mode); |
2498 | clock1 = cea_mode->clock; |
2412 | 2499 | ||
2413 | if (clock1 == clock2) |
2500 | if (clock1 == clock2) |
2414 | continue; |
2501 | continue; |
2415 | 2502 | ||
2416 | if (mode->clock != clock1 && mode->clock != clock2) |
2503 | if (mode->clock != clock1 && mode->clock != clock2) |
2417 | continue; |
2504 | continue; |
2418 | 2505 | ||
2419 | newmode = drm_mode_duplicate(dev, cea_mode); |
2506 | newmode = drm_mode_duplicate(dev, cea_mode); |
2420 | if (!newmode) |
2507 | if (!newmode) |
2421 | continue; |
2508 | continue; |
2422 | 2509 | ||
2423 | /* |
2510 | /* |
2424 | * The current mode could be either variant. Make |
2511 | * The current mode could be either variant. Make |
2425 | * sure to pick the "other" clock for the new mode. |
2512 | * sure to pick the "other" clock for the new mode. |
2426 | */ |
2513 | */ |
2427 | if (mode->clock != clock1) |
2514 | if (mode->clock != clock1) |
2428 | newmode->clock = clock1; |
2515 | newmode->clock = clock1; |
2429 | else |
2516 | else |
2430 | newmode->clock = clock2; |
2517 | newmode->clock = clock2; |
2431 | 2518 | ||
2432 | list_add_tail(&newmode->head, &list); |
2519 | list_add_tail(&newmode->head, &list); |
2433 | } |
2520 | } |
2434 | 2521 | ||
2435 | list_for_each_entry_safe(mode, tmp, &list, head) { |
2522 | list_for_each_entry_safe(mode, tmp, &list, head) { |
2436 | list_del(&mode->head); |
2523 | list_del(&mode->head); |
2437 | drm_mode_probed_add(connector, mode); |
2524 | drm_mode_probed_add(connector, mode); |
2438 | modes++; |
2525 | modes++; |
2439 | } |
2526 | } |
2440 | 2527 | ||
2441 | return modes; |
2528 | return modes; |
2442 | } |
2529 | } |
2443 | 2530 | ||
2444 | static int |
2531 | static int |
2445 | do_cea_modes (struct drm_connector *connector, u8 *db, u8 len) |
2532 | do_cea_modes(struct drm_connector *connector, const u8 *db, u8 len) |
2446 | { |
2533 | { |
2447 | struct drm_device *dev = connector->dev; |
2534 | struct drm_device *dev = connector->dev; |
- | 2535 | const u8 *mode; |
|
2448 | u8 * mode, cea_mode; |
2536 | u8 cea_mode; |
2449 | int modes = 0; |
2537 | int modes = 0; |
2450 | 2538 | ||
2451 | for (mode = db; mode < db + len; mode++) { |
2539 | for (mode = db; mode < db + len; mode++) { |
2452 | cea_mode = (*mode & 127) - 1; /* CEA modes are numbered 1..127 */ |
2540 | cea_mode = (*mode & 127) - 1; /* CEA modes are numbered 1..127 */ |
2453 | if (cea_mode < ARRAY_SIZE(edid_cea_modes)) { |
2541 | if (cea_mode < ARRAY_SIZE(edid_cea_modes)) { |
2454 | struct drm_display_mode *newmode; |
2542 | struct drm_display_mode *newmode; |
2455 | newmode = drm_mode_duplicate(dev, |
2543 | newmode = drm_mode_duplicate(dev, |
2456 | &edid_cea_modes[cea_mode]); |
2544 | &edid_cea_modes[cea_mode]); |
2457 | if (newmode) { |
2545 | if (newmode) { |
2458 | newmode->vrefresh = 0; |
2546 | newmode->vrefresh = 0; |
2459 | drm_mode_probed_add(connector, newmode); |
2547 | drm_mode_probed_add(connector, newmode); |
2460 | modes++; |
2548 | modes++; |
2461 | } |
2549 | } |
2462 | } |
2550 | } |
2463 | } |
2551 | } |
2464 | 2552 | ||
2465 | return modes; |
2553 | return modes; |
2466 | } |
2554 | } |
- | 2555 | ||
- | 2556 | /* |
|
- | 2557 | * do_hdmi_vsdb_modes - Parse the HDMI Vendor Specific data block |
|
- | 2558 | * @connector: connector corresponding to the HDMI sink |
|
- | 2559 | * @db: start of the CEA vendor specific block |
|
- | 2560 | * @len: length of the CEA block payload, ie. one can access up to db[len] |
|
- | 2561 | * |
|
- | 2562 | * Parses the HDMI VSDB looking for modes to add to @connector. |
|
- | 2563 | */ |
|
- | 2564 | static int |
|
- | 2565 | do_hdmi_vsdb_modes(struct drm_connector *connector, const u8 *db, u8 len) |
|
- | 2566 | { |
|
- | 2567 | struct drm_device *dev = connector->dev; |
|
- | 2568 | int modes = 0, offset = 0, i; |
|
- | 2569 | u8 vic_len; |
|
- | 2570 | ||
- | 2571 | if (len < 8) |
|
- | 2572 | goto out; |
|
- | 2573 | ||
- | 2574 | /* no HDMI_Video_Present */ |
|
- | 2575 | if (!(db[8] & (1 << 5))) |
|
- | 2576 | goto out; |
|
- | 2577 | ||
- | 2578 | /* Latency_Fields_Present */ |
|
- | 2579 | if (db[8] & (1 << 7)) |
|
- | 2580 | offset += 2; |
|
- | 2581 | ||
- | 2582 | /* I_Latency_Fields_Present */ |
|
- | 2583 | if (db[8] & (1 << 6)) |
|
- | 2584 | offset += 2; |
|
- | 2585 | ||
- | 2586 | /* the declared length is not long enough for the 2 first bytes |
|
- | 2587 | * of additional video format capabilities */ |
|
- | 2588 | offset += 2; |
|
- | 2589 | if (len < (8 + offset)) |
|
- | 2590 | goto out; |
|
- | 2591 | ||
- | 2592 | vic_len = db[8 + offset] >> 5; |
|
- | 2593 | ||
- | 2594 | for (i = 0; i < vic_len && len >= (9 + offset + i); i++) { |
|
- | 2595 | struct drm_display_mode *newmode; |
|
- | 2596 | u8 vic; |
|
- | 2597 | ||
- | 2598 | vic = db[9 + offset + i]; |
|
- | 2599 | ||
- | 2600 | vic--; /* VICs start at 1 */ |
|
- | 2601 | if (vic >= ARRAY_SIZE(edid_4k_modes)) { |
|
- | 2602 | DRM_ERROR("Unknown HDMI VIC: %d\n", vic); |
|
- | 2603 | continue; |
|
- | 2604 | } |
|
- | 2605 | ||
- | 2606 | newmode = drm_mode_duplicate(dev, &edid_4k_modes[vic]); |
|
- | 2607 | if (!newmode) |
|
- | 2608 | continue; |
|
- | 2609 | ||
- | 2610 | drm_mode_probed_add(connector, newmode); |
|
- | 2611 | modes++; |
|
- | 2612 | } |
|
- | 2613 | ||
- | 2614 | out: |
|
- | 2615 | return modes; |
|
- | 2616 | } |
|
2467 | 2617 | ||
2468 | static int |
2618 | static int |
2469 | cea_db_payload_len(const u8 *db) |
2619 | cea_db_payload_len(const u8 *db) |
2470 | { |
2620 | { |
2471 | return db[0] & 0x1f; |
2621 | return db[0] & 0x1f; |
2472 | } |
2622 | } |
2473 | 2623 | ||
2474 | static int |
2624 | static int |
2475 | cea_db_tag(const u8 *db) |
2625 | cea_db_tag(const u8 *db) |
2476 | { |
2626 | { |
2477 | return db[0] >> 5; |
2627 | return db[0] >> 5; |
2478 | } |
2628 | } |
2479 | 2629 | ||
2480 | static int |
2630 | static int |
2481 | cea_revision(const u8 *cea) |
2631 | cea_revision(const u8 *cea) |
2482 | { |
2632 | { |
2483 | return cea[1]; |
2633 | return cea[1]; |
2484 | } |
2634 | } |
2485 | 2635 | ||
2486 | static int |
2636 | static int |
2487 | cea_db_offsets(const u8 *cea, int *start, int *end) |
2637 | cea_db_offsets(const u8 *cea, int *start, int *end) |
2488 | { |
2638 | { |
2489 | /* Data block offset in CEA extension block */ |
2639 | /* Data block offset in CEA extension block */ |
2490 | *start = 4; |
2640 | *start = 4; |
2491 | *end = cea[2]; |
2641 | *end = cea[2]; |
2492 | if (*end == 0) |
2642 | if (*end == 0) |
2493 | *end = 127; |
2643 | *end = 127; |
2494 | if (*end < 4 || *end > 127) |
2644 | if (*end < 4 || *end > 127) |
2495 | return -ERANGE; |
2645 | return -ERANGE; |
2496 | return 0; |
2646 | return 0; |
2497 | } |
2647 | } |
- | 2648 | ||
- | 2649 | static bool cea_db_is_hdmi_vsdb(const u8 *db) |
|
- | 2650 | { |
|
- | 2651 | int hdmi_id; |
|
- | 2652 | ||
- | 2653 | if (cea_db_tag(db) != VENDOR_BLOCK) |
|
- | 2654 | return false; |
|
- | 2655 | ||
- | 2656 | if (cea_db_payload_len(db) < 5) |
|
- | 2657 | return false; |
|
- | 2658 | ||
- | 2659 | hdmi_id = db[1] | (db[2] << 8) | (db[3] << 16); |
|
- | 2660 | ||
- | 2661 | return hdmi_id == HDMI_IEEE_OUI; |
|
- | 2662 | } |
|
2498 | 2663 | ||
2499 | #define for_each_cea_db(cea, i, start, end) \ |
2664 | #define for_each_cea_db(cea, i, start, end) \ |
2500 | for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1) |
2665 | for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1) |
2501 | 2666 | ||
2502 | static int |
2667 | static int |
2503 | add_cea_modes(struct drm_connector *connector, struct edid *edid) |
2668 | add_cea_modes(struct drm_connector *connector, struct edid *edid) |
2504 | { |
2669 | { |
2505 | u8 * cea = drm_find_cea_extension(edid); |
2670 | const u8 *cea = drm_find_cea_extension(edid); |
- | 2671 | const u8 *db; |
|
2506 | u8 * db, dbl; |
2672 | u8 dbl; |
2507 | int modes = 0; |
2673 | int modes = 0; |
2508 | 2674 | ||
2509 | if (cea && cea_revision(cea) >= 3) { |
2675 | if (cea && cea_revision(cea) >= 3) { |
2510 | int i, start, end; |
2676 | int i, start, end; |
2511 | 2677 | ||
2512 | if (cea_db_offsets(cea, &start, &end)) |
2678 | if (cea_db_offsets(cea, &start, &end)) |
2513 | return 0; |
2679 | return 0; |
2514 | 2680 | ||
2515 | for_each_cea_db(cea, i, start, end) { |
2681 | for_each_cea_db(cea, i, start, end) { |
2516 | db = &cea[i]; |
2682 | db = &cea[i]; |
2517 | dbl = cea_db_payload_len(db); |
2683 | dbl = cea_db_payload_len(db); |
2518 | 2684 | ||
2519 | if (cea_db_tag(db) == VIDEO_BLOCK) |
2685 | if (cea_db_tag(db) == VIDEO_BLOCK) |
2520 | modes += do_cea_modes (connector, db+1, dbl); |
2686 | modes += do_cea_modes (connector, db+1, dbl); |
- | 2687 | else if (cea_db_is_hdmi_vsdb(db)) |
|
- | 2688 | modes += do_hdmi_vsdb_modes(connector, db, dbl); |
|
2521 | } |
2689 | } |
2522 | } |
2690 | } |
2523 | 2691 | ||
2524 | return modes; |
2692 | return modes; |
2525 | } |
2693 | } |
2526 | 2694 | ||
2527 | static void |
2695 | static void |
2528 | parse_hdmi_vsdb(struct drm_connector *connector, const u8 *db) |
2696 | parse_hdmi_vsdb(struct drm_connector *connector, const u8 *db) |
2529 | { |
2697 | { |
2530 | u8 len = cea_db_payload_len(db); |
2698 | u8 len = cea_db_payload_len(db); |
2531 | 2699 | ||
2532 | if (len >= 6) { |
2700 | if (len >= 6) { |
2533 | connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */ |
2701 | connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */ |
2534 | connector->dvi_dual = db[6] & 1; |
2702 | connector->dvi_dual = db[6] & 1; |
2535 | } |
2703 | } |
2536 | if (len >= 7) |
2704 | if (len >= 7) |
2537 | connector->max_tmds_clock = db[7] * 5; |
2705 | connector->max_tmds_clock = db[7] * 5; |
2538 | if (len >= 8) { |
2706 | if (len >= 8) { |
2539 | connector->latency_present[0] = db[8] >> 7; |
2707 | connector->latency_present[0] = db[8] >> 7; |
2540 | connector->latency_present[1] = (db[8] >> 6) & 1; |
2708 | connector->latency_present[1] = (db[8] >> 6) & 1; |
2541 | } |
2709 | } |
2542 | if (len >= 9) |
2710 | if (len >= 9) |
2543 | connector->video_latency[0] = db[9]; |
2711 | connector->video_latency[0] = db[9]; |
2544 | if (len >= 10) |
2712 | if (len >= 10) |
2545 | connector->audio_latency[0] = db[10]; |
2713 | connector->audio_latency[0] = db[10]; |
2546 | if (len >= 11) |
2714 | if (len >= 11) |
2547 | connector->video_latency[1] = db[11]; |
2715 | connector->video_latency[1] = db[11]; |
2548 | if (len >= 12) |
2716 | if (len >= 12) |
2549 | connector->audio_latency[1] = db[12]; |
2717 | connector->audio_latency[1] = db[12]; |
2550 | 2718 | ||
2551 | DRM_DEBUG_KMS("HDMI: DVI dual %d, " |
2719 | DRM_DEBUG_KMS("HDMI: DVI dual %d, " |
2552 | "max TMDS clock %d, " |
2720 | "max TMDS clock %d, " |
2553 | "latency present %d %d, " |
2721 | "latency present %d %d, " |
2554 | "video latency %d %d, " |
2722 | "video latency %d %d, " |
2555 | "audio latency %d %d\n", |
2723 | "audio latency %d %d\n", |
2556 | connector->dvi_dual, |
2724 | connector->dvi_dual, |
2557 | connector->max_tmds_clock, |
2725 | connector->max_tmds_clock, |
2558 | (int) connector->latency_present[0], |
2726 | (int) connector->latency_present[0], |
2559 | (int) connector->latency_present[1], |
2727 | (int) connector->latency_present[1], |
2560 | connector->video_latency[0], |
2728 | connector->video_latency[0], |
2561 | connector->video_latency[1], |
2729 | connector->video_latency[1], |
2562 | connector->audio_latency[0], |
2730 | connector->audio_latency[0], |
2563 | connector->audio_latency[1]); |
2731 | connector->audio_latency[1]); |
2564 | } |
2732 | } |
2565 | 2733 | ||
2566 | static void |
2734 | static void |
2567 | monitor_name(struct detailed_timing *t, void *data) |
2735 | monitor_name(struct detailed_timing *t, void *data) |
2568 | { |
2736 | { |
2569 | if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME) |
2737 | if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME) |
2570 | *(u8 **)data = t->data.other_data.data.str.str; |
2738 | *(u8 **)data = t->data.other_data.data.str.str; |
2571 | } |
2739 | } |
2572 | - | ||
2573 | static bool cea_db_is_hdmi_vsdb(const u8 *db) |
- | |
2574 | { |
- | |
2575 | int hdmi_id; |
- | |
2576 | - | ||
2577 | if (cea_db_tag(db) != VENDOR_BLOCK) |
- | |
2578 | return false; |
- | |
2579 | - | ||
2580 | if (cea_db_payload_len(db) < 5) |
- | |
2581 | return false; |
- | |
2582 | - | ||
2583 | hdmi_id = db[1] | (db[2] << 8) | (db[3] << 16); |
- | |
2584 | - | ||
2585 | return hdmi_id == HDMI_IDENTIFIER; |
- | |
2586 | } |
- | |
2587 | 2740 | ||
2588 | /** |
2741 | /** |
2589 | * drm_edid_to_eld - build ELD from EDID |
2742 | * drm_edid_to_eld - build ELD from EDID |
2590 | * @connector: connector corresponding to the HDMI/DP sink |
2743 | * @connector: connector corresponding to the HDMI/DP sink |
2591 | * @edid: EDID to parse |
2744 | * @edid: EDID to parse |
2592 | * |
2745 | * |
2593 | * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver. |
2746 | * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver. |
2594 | * Some ELD fields are left to the graphics driver caller: |
2747 | * Some ELD fields are left to the graphics driver caller: |
2595 | * - Conn_Type |
2748 | * - Conn_Type |
2596 | * - HDCP |
2749 | * - HDCP |
2597 | * - Port_ID |
2750 | * - Port_ID |
2598 | */ |
2751 | */ |
2599 | void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid) |
2752 | void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid) |
2600 | { |
2753 | { |
2601 | uint8_t *eld = connector->eld; |
2754 | uint8_t *eld = connector->eld; |
2602 | u8 *cea; |
2755 | u8 *cea; |
2603 | u8 *name; |
2756 | u8 *name; |
2604 | u8 *db; |
2757 | u8 *db; |
2605 | int sad_count = 0; |
2758 | int sad_count = 0; |
2606 | int mnl; |
2759 | int mnl; |
2607 | int dbl; |
2760 | int dbl; |
2608 | 2761 | ||
2609 | memset(eld, 0, sizeof(connector->eld)); |
2762 | memset(eld, 0, sizeof(connector->eld)); |
2610 | 2763 | ||
2611 | cea = drm_find_cea_extension(edid); |
2764 | cea = drm_find_cea_extension(edid); |
2612 | if (!cea) { |
2765 | if (!cea) { |
2613 | DRM_DEBUG_KMS("ELD: no CEA Extension found\n"); |
2766 | DRM_DEBUG_KMS("ELD: no CEA Extension found\n"); |
2614 | return; |
2767 | return; |
2615 | } |
2768 | } |
2616 | 2769 | ||
2617 | name = NULL; |
2770 | name = NULL; |
2618 | drm_for_each_detailed_block((u8 *)edid, monitor_name, &name); |
2771 | drm_for_each_detailed_block((u8 *)edid, monitor_name, &name); |
2619 | for (mnl = 0; name && mnl < 13; mnl++) { |
2772 | for (mnl = 0; name && mnl < 13; mnl++) { |
2620 | if (name[mnl] == 0x0a) |
2773 | if (name[mnl] == 0x0a) |
2621 | break; |
2774 | break; |
2622 | eld[20 + mnl] = name[mnl]; |
2775 | eld[20 + mnl] = name[mnl]; |
2623 | } |
2776 | } |
2624 | eld[4] = (cea[1] << 5) | mnl; |
2777 | eld[4] = (cea[1] << 5) | mnl; |
2625 | DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20); |
2778 | DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20); |
2626 | 2779 | ||
2627 | eld[0] = 2 << 3; /* ELD version: 2 */ |
2780 | eld[0] = 2 << 3; /* ELD version: 2 */ |
2628 | 2781 | ||
2629 | eld[16] = edid->mfg_id[0]; |
2782 | eld[16] = edid->mfg_id[0]; |
2630 | eld[17] = edid->mfg_id[1]; |
2783 | eld[17] = edid->mfg_id[1]; |
2631 | eld[18] = edid->prod_code[0]; |
2784 | eld[18] = edid->prod_code[0]; |
2632 | eld[19] = edid->prod_code[1]; |
2785 | eld[19] = edid->prod_code[1]; |
2633 | 2786 | ||
2634 | if (cea_revision(cea) >= 3) { |
2787 | if (cea_revision(cea) >= 3) { |
2635 | int i, start, end; |
2788 | int i, start, end; |
2636 | 2789 | ||
2637 | if (cea_db_offsets(cea, &start, &end)) { |
2790 | if (cea_db_offsets(cea, &start, &end)) { |
2638 | start = 0; |
2791 | start = 0; |
2639 | end = 0; |
2792 | end = 0; |
2640 | } |
2793 | } |
2641 | 2794 | ||
2642 | for_each_cea_db(cea, i, start, end) { |
2795 | for_each_cea_db(cea, i, start, end) { |
2643 | db = &cea[i]; |
2796 | db = &cea[i]; |
2644 | dbl = cea_db_payload_len(db); |
2797 | dbl = cea_db_payload_len(db); |
2645 | 2798 | ||
2646 | switch (cea_db_tag(db)) { |
2799 | switch (cea_db_tag(db)) { |
2647 | case AUDIO_BLOCK: |
2800 | case AUDIO_BLOCK: |
2648 | /* Audio Data Block, contains SADs */ |
2801 | /* Audio Data Block, contains SADs */ |
2649 | sad_count = dbl / 3; |
2802 | sad_count = dbl / 3; |
2650 | if (dbl >= 1) |
2803 | if (dbl >= 1) |
2651 | memcpy(eld + 20 + mnl, &db[1], dbl); |
2804 | memcpy(eld + 20 + mnl, &db[1], dbl); |
2652 | break; |
2805 | break; |
2653 | case SPEAKER_BLOCK: |
2806 | case SPEAKER_BLOCK: |
2654 | /* Speaker Allocation Data Block */ |
2807 | /* Speaker Allocation Data Block */ |
2655 | if (dbl >= 1) |
2808 | if (dbl >= 1) |
2656 | eld[7] = db[1]; |
2809 | eld[7] = db[1]; |
2657 | break; |
2810 | break; |
2658 | case VENDOR_BLOCK: |
2811 | case VENDOR_BLOCK: |
2659 | /* HDMI Vendor-Specific Data Block */ |
2812 | /* HDMI Vendor-Specific Data Block */ |
2660 | if (cea_db_is_hdmi_vsdb(db)) |
2813 | if (cea_db_is_hdmi_vsdb(db)) |
2661 | parse_hdmi_vsdb(connector, db); |
2814 | parse_hdmi_vsdb(connector, db); |
2662 | break; |
2815 | break; |
2663 | default: |
2816 | default: |
2664 | break; |
2817 | break; |
2665 | } |
2818 | } |
2666 | } |
2819 | } |
2667 | } |
2820 | } |
2668 | eld[5] |= sad_count << 4; |
2821 | eld[5] |= sad_count << 4; |
2669 | eld[2] = (20 + mnl + sad_count * 3 + 3) / 4; |
2822 | eld[2] = (20 + mnl + sad_count * 3 + 3) / 4; |
2670 | 2823 | ||
2671 | DRM_DEBUG_KMS("ELD size %d, SAD count %d\n", (int)eld[2], sad_count); |
2824 | DRM_DEBUG_KMS("ELD size %d, SAD count %d\n", (int)eld[2], sad_count); |
2672 | } |
2825 | } |
2673 | EXPORT_SYMBOL(drm_edid_to_eld); |
2826 | EXPORT_SYMBOL(drm_edid_to_eld); |
2674 | 2827 | ||
2675 | /** |
2828 | /** |
2676 | * drm_edid_to_sad - extracts SADs from EDID |
2829 | * drm_edid_to_sad - extracts SADs from EDID |
2677 | * @edid: EDID to parse |
2830 | * @edid: EDID to parse |
2678 | * @sads: pointer that will be set to the extracted SADs |
2831 | * @sads: pointer that will be set to the extracted SADs |
2679 | * |
2832 | * |
2680 | * Looks for CEA EDID block and extracts SADs (Short Audio Descriptors) from it. |
2833 | * Looks for CEA EDID block and extracts SADs (Short Audio Descriptors) from it. |
2681 | * Note: returned pointer needs to be kfreed |
2834 | * Note: returned pointer needs to be kfreed |
2682 | * |
2835 | * |
2683 | * Return number of found SADs or negative number on error. |
2836 | * Return number of found SADs or negative number on error. |
2684 | */ |
2837 | */ |
2685 | int drm_edid_to_sad(struct edid *edid, struct cea_sad **sads) |
2838 | int drm_edid_to_sad(struct edid *edid, struct cea_sad **sads) |
2686 | { |
2839 | { |
2687 | int count = 0; |
2840 | int count = 0; |
2688 | int i, start, end, dbl; |
2841 | int i, start, end, dbl; |
2689 | u8 *cea; |
2842 | u8 *cea; |
2690 | 2843 | ||
2691 | cea = drm_find_cea_extension(edid); |
2844 | cea = drm_find_cea_extension(edid); |
2692 | if (!cea) { |
2845 | if (!cea) { |
2693 | DRM_DEBUG_KMS("SAD: no CEA Extension found\n"); |
2846 | DRM_DEBUG_KMS("SAD: no CEA Extension found\n"); |
2694 | return -ENOENT; |
2847 | return -ENOENT; |
2695 | } |
2848 | } |
2696 | 2849 | ||
2697 | if (cea_revision(cea) < 3) { |
2850 | if (cea_revision(cea) < 3) { |
2698 | DRM_DEBUG_KMS("SAD: wrong CEA revision\n"); |
2851 | DRM_DEBUG_KMS("SAD: wrong CEA revision\n"); |
2699 | return -ENOTSUPP; |
2852 | return -ENOTSUPP; |
2700 | } |
2853 | } |
2701 | 2854 | ||
2702 | if (cea_db_offsets(cea, &start, &end)) { |
2855 | if (cea_db_offsets(cea, &start, &end)) { |
2703 | DRM_DEBUG_KMS("SAD: invalid data block offsets\n"); |
2856 | DRM_DEBUG_KMS("SAD: invalid data block offsets\n"); |
2704 | return -EPROTO; |
2857 | return -EPROTO; |
2705 | } |
2858 | } |
2706 | 2859 | ||
2707 | for_each_cea_db(cea, i, start, end) { |
2860 | for_each_cea_db(cea, i, start, end) { |
2708 | u8 *db = &cea[i]; |
2861 | u8 *db = &cea[i]; |
2709 | 2862 | ||
2710 | if (cea_db_tag(db) == AUDIO_BLOCK) { |
2863 | if (cea_db_tag(db) == AUDIO_BLOCK) { |
2711 | int j; |
2864 | int j; |
2712 | dbl = cea_db_payload_len(db); |
2865 | dbl = cea_db_payload_len(db); |
2713 | 2866 | ||
2714 | count = dbl / 3; /* SAD is 3B */ |
2867 | count = dbl / 3; /* SAD is 3B */ |
2715 | *sads = kcalloc(count, sizeof(**sads), GFP_KERNEL); |
2868 | *sads = kcalloc(count, sizeof(**sads), GFP_KERNEL); |
2716 | if (!*sads) |
2869 | if (!*sads) |
2717 | return -ENOMEM; |
2870 | return -ENOMEM; |
2718 | for (j = 0; j < count; j++) { |
2871 | for (j = 0; j < count; j++) { |
2719 | u8 *sad = &db[1 + j * 3]; |
2872 | u8 *sad = &db[1 + j * 3]; |
2720 | 2873 | ||
2721 | (*sads)[j].format = (sad[0] & 0x78) >> 3; |
2874 | (*sads)[j].format = (sad[0] & 0x78) >> 3; |
2722 | (*sads)[j].channels = sad[0] & 0x7; |
2875 | (*sads)[j].channels = sad[0] & 0x7; |
2723 | (*sads)[j].freq = sad[1] & 0x7F; |
2876 | (*sads)[j].freq = sad[1] & 0x7F; |
2724 | (*sads)[j].byte2 = sad[2]; |
2877 | (*sads)[j].byte2 = sad[2]; |
2725 | } |
2878 | } |
2726 | break; |
2879 | break; |
2727 | } |
2880 | } |
2728 | } |
2881 | } |
2729 | 2882 | ||
2730 | return count; |
2883 | return count; |
2731 | } |
2884 | } |
2732 | EXPORT_SYMBOL(drm_edid_to_sad); |
2885 | EXPORT_SYMBOL(drm_edid_to_sad); |
2733 | 2886 | ||
2734 | /** |
2887 | /** |
- | 2888 | * drm_edid_to_speaker_allocation - extracts Speaker Allocation Data Blocks from EDID |
|
- | 2889 | * @edid: EDID to parse |
|
- | 2890 | * @sadb: pointer to the speaker block |
|
- | 2891 | * |
|
- | 2892 | * Looks for CEA EDID block and extracts the Speaker Allocation Data Block from it. |
|
- | 2893 | * Note: returned pointer needs to be kfreed |
|
- | 2894 | * |
|
- | 2895 | * Return number of found Speaker Allocation Blocks or negative number on error. |
|
- | 2896 | */ |
|
- | 2897 | int drm_edid_to_speaker_allocation(struct edid *edid, u8 **sadb) |
|
- | 2898 | { |
|
- | 2899 | int count = 0; |
|
- | 2900 | int i, start, end, dbl; |
|
- | 2901 | const u8 *cea; |
|
- | 2902 | ||
- | 2903 | cea = drm_find_cea_extension(edid); |
|
- | 2904 | if (!cea) { |
|
- | 2905 | DRM_DEBUG_KMS("SAD: no CEA Extension found\n"); |
|
- | 2906 | return -ENOENT; |
|
- | 2907 | } |
|
- | 2908 | ||
- | 2909 | if (cea_revision(cea) < 3) { |
|
- | 2910 | DRM_DEBUG_KMS("SAD: wrong CEA revision\n"); |
|
- | 2911 | return -ENOTSUPP; |
|
- | 2912 | } |
|
- | 2913 | ||
- | 2914 | if (cea_db_offsets(cea, &start, &end)) { |
|
- | 2915 | DRM_DEBUG_KMS("SAD: invalid data block offsets\n"); |
|
- | 2916 | return -EPROTO; |
|
- | 2917 | } |
|
- | 2918 | ||
- | 2919 | for_each_cea_db(cea, i, start, end) { |
|
- | 2920 | const u8 *db = &cea[i]; |
|
- | 2921 | ||
- | 2922 | if (cea_db_tag(db) == SPEAKER_BLOCK) { |
|
- | 2923 | dbl = cea_db_payload_len(db); |
|
- | 2924 | ||
- | 2925 | /* Speaker Allocation Data Block */ |
|
- | 2926 | if (dbl == 3) { |
|
- | 2927 | *sadb = kmalloc(dbl, GFP_KERNEL); |
|
- | 2928 | if (!*sadb) |
|
- | 2929 | return -ENOMEM; |
|
- | 2930 | memcpy(*sadb, &db[1], dbl); |
|
- | 2931 | count = dbl; |
|
- | 2932 | break; |
|
- | 2933 | } |
|
- | 2934 | } |
|
- | 2935 | } |
|
- | 2936 | ||
- | 2937 | return count; |
|
- | 2938 | } |
|
- | 2939 | EXPORT_SYMBOL(drm_edid_to_speaker_allocation); |
|
- | 2940 | ||
- | 2941 | /** |
|
2735 | * drm_av_sync_delay - HDMI/DP sink audio-video sync delay in millisecond |
2942 | * drm_av_sync_delay - HDMI/DP sink audio-video sync delay in millisecond |
2736 | * @connector: connector associated with the HDMI/DP sink |
2943 | * @connector: connector associated with the HDMI/DP sink |
2737 | * @mode: the display mode |
2944 | * @mode: the display mode |
2738 | */ |
2945 | */ |
2739 | int drm_av_sync_delay(struct drm_connector *connector, |
2946 | int drm_av_sync_delay(struct drm_connector *connector, |
2740 | struct drm_display_mode *mode) |
2947 | struct drm_display_mode *mode) |
2741 | { |
2948 | { |
2742 | int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE); |
2949 | int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE); |
2743 | int a, v; |
2950 | int a, v; |
2744 | 2951 | ||
2745 | if (!connector->latency_present[0]) |
2952 | if (!connector->latency_present[0]) |
2746 | return 0; |
2953 | return 0; |
2747 | if (!connector->latency_present[1]) |
2954 | if (!connector->latency_present[1]) |
2748 | i = 0; |
2955 | i = 0; |
2749 | 2956 | ||
2750 | a = connector->audio_latency[i]; |
2957 | a = connector->audio_latency[i]; |
2751 | v = connector->video_latency[i]; |
2958 | v = connector->video_latency[i]; |
2752 | 2959 | ||
2753 | /* |
2960 | /* |
2754 | * HDMI/DP sink doesn't support audio or video? |
2961 | * HDMI/DP sink doesn't support audio or video? |
2755 | */ |
2962 | */ |
2756 | if (a == 255 || v == 255) |
2963 | if (a == 255 || v == 255) |
2757 | return 0; |
2964 | return 0; |
2758 | 2965 | ||
2759 | /* |
2966 | /* |
2760 | * Convert raw EDID values to millisecond. |
2967 | * Convert raw EDID values to millisecond. |
2761 | * Treat unknown latency as 0ms. |
2968 | * Treat unknown latency as 0ms. |
2762 | */ |
2969 | */ |
2763 | if (a) |
2970 | if (a) |
2764 | a = min(2 * (a - 1), 500); |
2971 | a = min(2 * (a - 1), 500); |
2765 | if (v) |
2972 | if (v) |
2766 | v = min(2 * (v - 1), 500); |
2973 | v = min(2 * (v - 1), 500); |
2767 | 2974 | ||
2768 | return max(v - a, 0); |
2975 | return max(v - a, 0); |
2769 | } |
2976 | } |
2770 | EXPORT_SYMBOL(drm_av_sync_delay); |
2977 | EXPORT_SYMBOL(drm_av_sync_delay); |
2771 | 2978 | ||
2772 | /** |
2979 | /** |
2773 | * drm_select_eld - select one ELD from multiple HDMI/DP sinks |
2980 | * drm_select_eld - select one ELD from multiple HDMI/DP sinks |
2774 | * @encoder: the encoder just changed display mode |
2981 | * @encoder: the encoder just changed display mode |
2775 | * @mode: the adjusted display mode |
2982 | * @mode: the adjusted display mode |
2776 | * |
2983 | * |
2777 | * It's possible for one encoder to be associated with multiple HDMI/DP sinks. |
2984 | * It's possible for one encoder to be associated with multiple HDMI/DP sinks. |
2778 | * The policy is now hard coded to simply use the first HDMI/DP sink's ELD. |
2985 | * The policy is now hard coded to simply use the first HDMI/DP sink's ELD. |
2779 | */ |
2986 | */ |
2780 | struct drm_connector *drm_select_eld(struct drm_encoder *encoder, |
2987 | struct drm_connector *drm_select_eld(struct drm_encoder *encoder, |
2781 | struct drm_display_mode *mode) |
2988 | struct drm_display_mode *mode) |
2782 | { |
2989 | { |
2783 | struct drm_connector *connector; |
2990 | struct drm_connector *connector; |
2784 | struct drm_device *dev = encoder->dev; |
2991 | struct drm_device *dev = encoder->dev; |
2785 | 2992 | ||
2786 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) |
2993 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) |
2787 | if (connector->encoder == encoder && connector->eld[0]) |
2994 | if (connector->encoder == encoder && connector->eld[0]) |
2788 | return connector; |
2995 | return connector; |
2789 | 2996 | ||
2790 | return NULL; |
2997 | return NULL; |
2791 | } |
2998 | } |
2792 | EXPORT_SYMBOL(drm_select_eld); |
2999 | EXPORT_SYMBOL(drm_select_eld); |
2793 | 3000 | ||
2794 | /** |
3001 | /** |
2795 | * drm_detect_hdmi_monitor - detect whether monitor is hdmi. |
3002 | * drm_detect_hdmi_monitor - detect whether monitor is hdmi. |
2796 | * @edid: monitor EDID information |
3003 | * @edid: monitor EDID information |
2797 | * |
3004 | * |
2798 | * Parse the CEA extension according to CEA-861-B. |
3005 | * Parse the CEA extension according to CEA-861-B. |
2799 | * Return true if HDMI, false if not or unknown. |
3006 | * Return true if HDMI, false if not or unknown. |
2800 | */ |
3007 | */ |
2801 | bool drm_detect_hdmi_monitor(struct edid *edid) |
3008 | bool drm_detect_hdmi_monitor(struct edid *edid) |
2802 | { |
3009 | { |
2803 | u8 *edid_ext; |
3010 | u8 *edid_ext; |
2804 | int i; |
3011 | int i; |
2805 | int start_offset, end_offset; |
3012 | int start_offset, end_offset; |
2806 | 3013 | ||
2807 | edid_ext = drm_find_cea_extension(edid); |
3014 | edid_ext = drm_find_cea_extension(edid); |
2808 | if (!edid_ext) |
3015 | if (!edid_ext) |
2809 | return false; |
3016 | return false; |
2810 | 3017 | ||
2811 | if (cea_db_offsets(edid_ext, &start_offset, &end_offset)) |
3018 | if (cea_db_offsets(edid_ext, &start_offset, &end_offset)) |
2812 | return false; |
3019 | return false; |
2813 | 3020 | ||
2814 | /* |
3021 | /* |
2815 | * Because HDMI identifier is in Vendor Specific Block, |
3022 | * Because HDMI identifier is in Vendor Specific Block, |
2816 | * search it from all data blocks of CEA extension. |
3023 | * search it from all data blocks of CEA extension. |
2817 | */ |
3024 | */ |
2818 | for_each_cea_db(edid_ext, i, start_offset, end_offset) { |
3025 | for_each_cea_db(edid_ext, i, start_offset, end_offset) { |
2819 | if (cea_db_is_hdmi_vsdb(&edid_ext[i])) |
3026 | if (cea_db_is_hdmi_vsdb(&edid_ext[i])) |
2820 | return true; |
3027 | return true; |
2821 | } |
3028 | } |
2822 | 3029 | ||
2823 | return false; |
3030 | return false; |
2824 | } |
3031 | } |
2825 | EXPORT_SYMBOL(drm_detect_hdmi_monitor); |
3032 | EXPORT_SYMBOL(drm_detect_hdmi_monitor); |
2826 | 3033 | ||
2827 | /** |
3034 | /** |
2828 | * drm_detect_monitor_audio - check monitor audio capability |
3035 | * drm_detect_monitor_audio - check monitor audio capability |
2829 | * |
3036 | * |
2830 | * Monitor should have CEA extension block. |
3037 | * Monitor should have CEA extension block. |
2831 | * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic |
3038 | * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic |
2832 | * audio' only. If there is any audio extension block and supported |
3039 | * audio' only. If there is any audio extension block and supported |
2833 | * audio format, assume at least 'basic audio' support, even if 'basic |
3040 | * audio format, assume at least 'basic audio' support, even if 'basic |
2834 | * audio' is not defined in EDID. |
3041 | * audio' is not defined in EDID. |
2835 | * |
3042 | * |
2836 | */ |
3043 | */ |
2837 | bool drm_detect_monitor_audio(struct edid *edid) |
3044 | bool drm_detect_monitor_audio(struct edid *edid) |
2838 | { |
3045 | { |
2839 | u8 *edid_ext; |
3046 | u8 *edid_ext; |
2840 | int i, j; |
3047 | int i, j; |
2841 | bool has_audio = false; |
3048 | bool has_audio = false; |
2842 | int start_offset, end_offset; |
3049 | int start_offset, end_offset; |
2843 | 3050 | ||
2844 | edid_ext = drm_find_cea_extension(edid); |
3051 | edid_ext = drm_find_cea_extension(edid); |
2845 | if (!edid_ext) |
3052 | if (!edid_ext) |
2846 | goto end; |
3053 | goto end; |
2847 | 3054 | ||
2848 | has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0); |
3055 | has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0); |
2849 | 3056 | ||
2850 | if (has_audio) { |
3057 | if (has_audio) { |
2851 | DRM_DEBUG_KMS("Monitor has basic audio support\n"); |
3058 | DRM_DEBUG_KMS("Monitor has basic audio support\n"); |
2852 | goto end; |
3059 | goto end; |
2853 | } |
3060 | } |
2854 | 3061 | ||
2855 | if (cea_db_offsets(edid_ext, &start_offset, &end_offset)) |
3062 | if (cea_db_offsets(edid_ext, &start_offset, &end_offset)) |
2856 | goto end; |
3063 | goto end; |
2857 | 3064 | ||
2858 | for_each_cea_db(edid_ext, i, start_offset, end_offset) { |
3065 | for_each_cea_db(edid_ext, i, start_offset, end_offset) { |
2859 | if (cea_db_tag(&edid_ext[i]) == AUDIO_BLOCK) { |
3066 | if (cea_db_tag(&edid_ext[i]) == AUDIO_BLOCK) { |
2860 | has_audio = true; |
3067 | has_audio = true; |
2861 | for (j = 1; j < cea_db_payload_len(&edid_ext[i]) + 1; j += 3) |
3068 | for (j = 1; j < cea_db_payload_len(&edid_ext[i]) + 1; j += 3) |
2862 | DRM_DEBUG_KMS("CEA audio format %d\n", |
3069 | DRM_DEBUG_KMS("CEA audio format %d\n", |
2863 | (edid_ext[i + j] >> 3) & 0xf); |
3070 | (edid_ext[i + j] >> 3) & 0xf); |
2864 | goto end; |
3071 | goto end; |
2865 | } |
3072 | } |
2866 | } |
3073 | } |
2867 | end: |
3074 | end: |
2868 | return has_audio; |
3075 | return has_audio; |
2869 | } |
3076 | } |
2870 | EXPORT_SYMBOL(drm_detect_monitor_audio); |
3077 | EXPORT_SYMBOL(drm_detect_monitor_audio); |
2871 | 3078 | ||
2872 | /** |
3079 | /** |
2873 | * drm_rgb_quant_range_selectable - is RGB quantization range selectable? |
3080 | * drm_rgb_quant_range_selectable - is RGB quantization range selectable? |
2874 | * |
3081 | * |
2875 | * Check whether the monitor reports the RGB quantization range selection |
3082 | * Check whether the monitor reports the RGB quantization range selection |
2876 | * as supported. The AVI infoframe can then be used to inform the monitor |
3083 | * as supported. The AVI infoframe can then be used to inform the monitor |
2877 | * which quantization range (full or limited) is used. |
3084 | * which quantization range (full or limited) is used. |
2878 | */ |
3085 | */ |
2879 | bool drm_rgb_quant_range_selectable(struct edid *edid) |
3086 | bool drm_rgb_quant_range_selectable(struct edid *edid) |
2880 | { |
3087 | { |
2881 | u8 *edid_ext; |
3088 | u8 *edid_ext; |
2882 | int i, start, end; |
3089 | int i, start, end; |
2883 | 3090 | ||
2884 | edid_ext = drm_find_cea_extension(edid); |
3091 | edid_ext = drm_find_cea_extension(edid); |
2885 | if (!edid_ext) |
3092 | if (!edid_ext) |
2886 | return false; |
3093 | return false; |
2887 | 3094 | ||
2888 | if (cea_db_offsets(edid_ext, &start, &end)) |
3095 | if (cea_db_offsets(edid_ext, &start, &end)) |
2889 | return false; |
3096 | return false; |
2890 | 3097 | ||
2891 | for_each_cea_db(edid_ext, i, start, end) { |
3098 | for_each_cea_db(edid_ext, i, start, end) { |
2892 | if (cea_db_tag(&edid_ext[i]) == VIDEO_CAPABILITY_BLOCK && |
3099 | if (cea_db_tag(&edid_ext[i]) == VIDEO_CAPABILITY_BLOCK && |
2893 | cea_db_payload_len(&edid_ext[i]) == 2) { |
3100 | cea_db_payload_len(&edid_ext[i]) == 2) { |
2894 | DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", edid_ext[i + 2]); |
3101 | DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", edid_ext[i + 2]); |
2895 | return edid_ext[i + 2] & EDID_CEA_VCDB_QS; |
3102 | return edid_ext[i + 2] & EDID_CEA_VCDB_QS; |
2896 | } |
3103 | } |
2897 | } |
3104 | } |
2898 | 3105 | ||
2899 | return false; |
3106 | return false; |
2900 | } |
3107 | } |
2901 | EXPORT_SYMBOL(drm_rgb_quant_range_selectable); |
3108 | EXPORT_SYMBOL(drm_rgb_quant_range_selectable); |
2902 | 3109 | ||
2903 | /** |
3110 | /** |
2904 | * drm_add_display_info - pull display info out if present |
3111 | * drm_add_display_info - pull display info out if present |
2905 | * @edid: EDID data |
3112 | * @edid: EDID data |
2906 | * @info: display info (attached to connector) |
3113 | * @info: display info (attached to connector) |
2907 | * |
3114 | * |
2908 | * Grab any available display info and stuff it into the drm_display_info |
3115 | * Grab any available display info and stuff it into the drm_display_info |
2909 | * structure that's part of the connector. Useful for tracking bpp and |
3116 | * structure that's part of the connector. Useful for tracking bpp and |
2910 | * color spaces. |
3117 | * color spaces. |
2911 | */ |
3118 | */ |
2912 | static void drm_add_display_info(struct edid *edid, |
3119 | static void drm_add_display_info(struct edid *edid, |
2913 | struct drm_display_info *info) |
3120 | struct drm_display_info *info) |
2914 | { |
3121 | { |
2915 | u8 *edid_ext; |
3122 | u8 *edid_ext; |
2916 | 3123 | ||
2917 | info->width_mm = edid->width_cm * 10; |
3124 | info->width_mm = edid->width_cm * 10; |
2918 | info->height_mm = edid->height_cm * 10; |
3125 | info->height_mm = edid->height_cm * 10; |
2919 | 3126 | ||
2920 | /* driver figures it out in this case */ |
3127 | /* driver figures it out in this case */ |
2921 | info->bpc = 0; |
3128 | info->bpc = 0; |
2922 | info->color_formats = 0; |
3129 | info->color_formats = 0; |
2923 | 3130 | ||
2924 | if (edid->revision < 3) |
3131 | if (edid->revision < 3) |
2925 | return; |
3132 | return; |
2926 | 3133 | ||
2927 | if (!(edid->input & DRM_EDID_INPUT_DIGITAL)) |
3134 | if (!(edid->input & DRM_EDID_INPUT_DIGITAL)) |
2928 | return; |
3135 | return; |
2929 | 3136 | ||
2930 | /* Get data from CEA blocks if present */ |
3137 | /* Get data from CEA blocks if present */ |
2931 | edid_ext = drm_find_cea_extension(edid); |
3138 | edid_ext = drm_find_cea_extension(edid); |
2932 | if (edid_ext) { |
3139 | if (edid_ext) { |
2933 | info->cea_rev = edid_ext[1]; |
3140 | info->cea_rev = edid_ext[1]; |
2934 | 3141 | ||
2935 | /* The existence of a CEA block should imply RGB support */ |
3142 | /* The existence of a CEA block should imply RGB support */ |
2936 | info->color_formats = DRM_COLOR_FORMAT_RGB444; |
3143 | info->color_formats = DRM_COLOR_FORMAT_RGB444; |
2937 | if (edid_ext[3] & EDID_CEA_YCRCB444) |
3144 | if (edid_ext[3] & EDID_CEA_YCRCB444) |
2938 | info->color_formats |= DRM_COLOR_FORMAT_YCRCB444; |
3145 | info->color_formats |= DRM_COLOR_FORMAT_YCRCB444; |
2939 | if (edid_ext[3] & EDID_CEA_YCRCB422) |
3146 | if (edid_ext[3] & EDID_CEA_YCRCB422) |
2940 | info->color_formats |= DRM_COLOR_FORMAT_YCRCB422; |
3147 | info->color_formats |= DRM_COLOR_FORMAT_YCRCB422; |
2941 | } |
3148 | } |
2942 | 3149 | ||
2943 | /* Only defined for 1.4 with digital displays */ |
3150 | /* Only defined for 1.4 with digital displays */ |
2944 | if (edid->revision < 4) |
3151 | if (edid->revision < 4) |
2945 | return; |
3152 | return; |
2946 | 3153 | ||
2947 | switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) { |
3154 | switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) { |
2948 | case DRM_EDID_DIGITAL_DEPTH_6: |
3155 | case DRM_EDID_DIGITAL_DEPTH_6: |
2949 | info->bpc = 6; |
3156 | info->bpc = 6; |
2950 | break; |
3157 | break; |
2951 | case DRM_EDID_DIGITAL_DEPTH_8: |
3158 | case DRM_EDID_DIGITAL_DEPTH_8: |
2952 | info->bpc = 8; |
3159 | info->bpc = 8; |
2953 | break; |
3160 | break; |
2954 | case DRM_EDID_DIGITAL_DEPTH_10: |
3161 | case DRM_EDID_DIGITAL_DEPTH_10: |
2955 | info->bpc = 10; |
3162 | info->bpc = 10; |
2956 | break; |
3163 | break; |
2957 | case DRM_EDID_DIGITAL_DEPTH_12: |
3164 | case DRM_EDID_DIGITAL_DEPTH_12: |
2958 | info->bpc = 12; |
3165 | info->bpc = 12; |
2959 | break; |
3166 | break; |
2960 | case DRM_EDID_DIGITAL_DEPTH_14: |
3167 | case DRM_EDID_DIGITAL_DEPTH_14: |
2961 | info->bpc = 14; |
3168 | info->bpc = 14; |
2962 | break; |
3169 | break; |
2963 | case DRM_EDID_DIGITAL_DEPTH_16: |
3170 | case DRM_EDID_DIGITAL_DEPTH_16: |
2964 | info->bpc = 16; |
3171 | info->bpc = 16; |
2965 | break; |
3172 | break; |
2966 | case DRM_EDID_DIGITAL_DEPTH_UNDEF: |
3173 | case DRM_EDID_DIGITAL_DEPTH_UNDEF: |
2967 | default: |
3174 | default: |
2968 | info->bpc = 0; |
3175 | info->bpc = 0; |
2969 | break; |
3176 | break; |
2970 | } |
3177 | } |
2971 | 3178 | ||
2972 | info->color_formats |= DRM_COLOR_FORMAT_RGB444; |
3179 | info->color_formats |= DRM_COLOR_FORMAT_RGB444; |
2973 | if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444) |
3180 | if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444) |
2974 | info->color_formats |= DRM_COLOR_FORMAT_YCRCB444; |
3181 | info->color_formats |= DRM_COLOR_FORMAT_YCRCB444; |
2975 | if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422) |
3182 | if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422) |
2976 | info->color_formats |= DRM_COLOR_FORMAT_YCRCB422; |
3183 | info->color_formats |= DRM_COLOR_FORMAT_YCRCB422; |
2977 | } |
3184 | } |
2978 | 3185 | ||
2979 | /** |
3186 | /** |
2980 | * drm_add_edid_modes - add modes from EDID data, if available |
3187 | * drm_add_edid_modes - add modes from EDID data, if available |
2981 | * @connector: connector we're probing |
3188 | * @connector: connector we're probing |
2982 | * @edid: edid data |
3189 | * @edid: edid data |
2983 | * |
3190 | * |
2984 | * Add the specified modes to the connector's mode list. |
3191 | * Add the specified modes to the connector's mode list. |
2985 | * |
3192 | * |
2986 | * Return number of modes added or 0 if we couldn't find any. |
3193 | * Return number of modes added or 0 if we couldn't find any. |
2987 | */ |
3194 | */ |
2988 | int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid) |
3195 | int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid) |
2989 | { |
3196 | { |
2990 | int num_modes = 0; |
3197 | int num_modes = 0; |
2991 | u32 quirks; |
3198 | u32 quirks; |
2992 | 3199 | ||
2993 | if (edid == NULL) { |
3200 | if (edid == NULL) { |
2994 | return 0; |
3201 | return 0; |
2995 | } |
3202 | } |
2996 | if (!drm_edid_is_valid(edid)) { |
3203 | if (!drm_edid_is_valid(edid)) { |
2997 | dev_warn(connector->dev->dev, "%s: EDID invalid.\n", |
3204 | dev_warn(connector->dev->dev, "%s: EDID invalid.\n", |
2998 | drm_get_connector_name(connector)); |
3205 | drm_get_connector_name(connector)); |
2999 | return 0; |
3206 | return 0; |
3000 | } |
3207 | } |
3001 | 3208 | ||
3002 | quirks = edid_get_quirks(edid); |
3209 | quirks = edid_get_quirks(edid); |
3003 | 3210 | ||
3004 | /* |
3211 | /* |
3005 | * EDID spec says modes should be preferred in this order: |
3212 | * EDID spec says modes should be preferred in this order: |
3006 | * - preferred detailed mode |
3213 | * - preferred detailed mode |
3007 | * - other detailed modes from base block |
3214 | * - other detailed modes from base block |
3008 | * - detailed modes from extension blocks |
3215 | * - detailed modes from extension blocks |
3009 | * - CVT 3-byte code modes |
3216 | * - CVT 3-byte code modes |
3010 | * - standard timing codes |
3217 | * - standard timing codes |
3011 | * - established timing codes |
3218 | * - established timing codes |
3012 | * - modes inferred from GTF or CVT range information |
3219 | * - modes inferred from GTF or CVT range information |
3013 | * |
3220 | * |
3014 | * We get this pretty much right. |
3221 | * We get this pretty much right. |
3015 | * |
3222 | * |
3016 | * XXX order for additional mode types in extension blocks? |
3223 | * XXX order for additional mode types in extension blocks? |
3017 | */ |
3224 | */ |
3018 | num_modes += add_detailed_modes(connector, edid, quirks); |
3225 | num_modes += add_detailed_modes(connector, edid, quirks); |
3019 | num_modes += add_cvt_modes(connector, edid); |
3226 | num_modes += add_cvt_modes(connector, edid); |
3020 | num_modes += add_standard_modes(connector, edid); |
3227 | num_modes += add_standard_modes(connector, edid); |
3021 | num_modes += add_established_modes(connector, edid); |
3228 | num_modes += add_established_modes(connector, edid); |
3022 | if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF) |
3229 | if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF) |
3023 | num_modes += add_inferred_modes(connector, edid); |
3230 | num_modes += add_inferred_modes(connector, edid); |
3024 | num_modes += add_cea_modes(connector, edid); |
3231 | num_modes += add_cea_modes(connector, edid); |
3025 | num_modes += add_alternate_cea_modes(connector, edid); |
3232 | num_modes += add_alternate_cea_modes(connector, edid); |
3026 | 3233 | ||
3027 | if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75)) |
3234 | if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75)) |
3028 | edid_fixup_preferred(connector, quirks); |
3235 | edid_fixup_preferred(connector, quirks); |
3029 | 3236 | ||
3030 | drm_add_display_info(edid, &connector->display_info); |
3237 | drm_add_display_info(edid, &connector->display_info); |
3031 | 3238 | ||
3032 | return num_modes; |
3239 | return num_modes; |
3033 | } |
3240 | } |
3034 | EXPORT_SYMBOL(drm_add_edid_modes); |
3241 | EXPORT_SYMBOL(drm_add_edid_modes); |
3035 | 3242 | ||
3036 | /** |
3243 | /** |
3037 | * drm_add_modes_noedid - add modes for the connectors without EDID |
3244 | * drm_add_modes_noedid - add modes for the connectors without EDID |
3038 | * @connector: connector we're probing |
3245 | * @connector: connector we're probing |
3039 | * @hdisplay: the horizontal display limit |
3246 | * @hdisplay: the horizontal display limit |
3040 | * @vdisplay: the vertical display limit |
3247 | * @vdisplay: the vertical display limit |
3041 | * |
3248 | * |
3042 | * Add the specified modes to the connector's mode list. Only when the |
3249 | * Add the specified modes to the connector's mode list. Only when the |
3043 | * hdisplay/vdisplay is not beyond the given limit, it will be added. |
3250 | * hdisplay/vdisplay is not beyond the given limit, it will be added. |
3044 | * |
3251 | * |
3045 | * Return number of modes added or 0 if we couldn't find any. |
3252 | * Return number of modes added or 0 if we couldn't find any. |
3046 | */ |
3253 | */ |
3047 | int drm_add_modes_noedid(struct drm_connector *connector, |
3254 | int drm_add_modes_noedid(struct drm_connector *connector, |
3048 | int hdisplay, int vdisplay) |
3255 | int hdisplay, int vdisplay) |
3049 | { |
3256 | { |
3050 | int i, count, num_modes = 0; |
3257 | int i, count, num_modes = 0; |
3051 | struct drm_display_mode *mode; |
3258 | struct drm_display_mode *mode; |
3052 | struct drm_device *dev = connector->dev; |
3259 | struct drm_device *dev = connector->dev; |
3053 | 3260 | ||
3054 | count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode); |
3261 | count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode); |
3055 | if (hdisplay < 0) |
3262 | if (hdisplay < 0) |
3056 | hdisplay = 0; |
3263 | hdisplay = 0; |
3057 | if (vdisplay < 0) |
3264 | if (vdisplay < 0) |
3058 | vdisplay = 0; |
3265 | vdisplay = 0; |
3059 | 3266 | ||
3060 | for (i = 0; i < count; i++) { |
3267 | for (i = 0; i < count; i++) { |
3061 | const struct drm_display_mode *ptr = &drm_dmt_modes[i]; |
3268 | const struct drm_display_mode *ptr = &drm_dmt_modes[i]; |
3062 | if (hdisplay && vdisplay) { |
3269 | if (hdisplay && vdisplay) { |
3063 | /* |
3270 | /* |
3064 | * Only when two are valid, they will be used to check |
3271 | * Only when two are valid, they will be used to check |
3065 | * whether the mode should be added to the mode list of |
3272 | * whether the mode should be added to the mode list of |
3066 | * the connector. |
3273 | * the connector. |
3067 | */ |
3274 | */ |
3068 | if (ptr->hdisplay > hdisplay || |
3275 | if (ptr->hdisplay > hdisplay || |
3069 | ptr->vdisplay > vdisplay) |
3276 | ptr->vdisplay > vdisplay) |
3070 | continue; |
3277 | continue; |
3071 | } |
3278 | } |
3072 | if (drm_mode_vrefresh(ptr) > 61) |
3279 | if (drm_mode_vrefresh(ptr) > 61) |
3073 | continue; |
3280 | continue; |
3074 | mode = drm_mode_duplicate(dev, ptr); |
3281 | mode = drm_mode_duplicate(dev, ptr); |
3075 | if (mode) { |
3282 | if (mode) { |
3076 | drm_mode_probed_add(connector, mode); |
3283 | drm_mode_probed_add(connector, mode); |
3077 | num_modes++; |
3284 | num_modes++; |
3078 | } |
3285 | } |
3079 | } |
3286 | } |
3080 | return num_modes; |
3287 | return num_modes; |
3081 | } |
3288 | } |
3082 | EXPORT_SYMBOL(drm_add_modes_noedid); |
3289 | EXPORT_SYMBOL(drm_add_modes_noedid); |
3083 | 3290 | ||
3084 | /** |
3291 | /** |
3085 | * drm_hdmi_avi_infoframe_from_display_mode() - fill an HDMI AVI infoframe with |
3292 | * drm_hdmi_avi_infoframe_from_display_mode() - fill an HDMI AVI infoframe with |
3086 | * data from a DRM display mode |
3293 | * data from a DRM display mode |
3087 | * @frame: HDMI AVI infoframe |
3294 | * @frame: HDMI AVI infoframe |
3088 | * @mode: DRM display mode |
3295 | * @mode: DRM display mode |
3089 | * |
3296 | * |
3090 | * Returns 0 on success or a negative error code on failure. |
3297 | * Returns 0 on success or a negative error code on failure. |
3091 | */ |
3298 | */ |
3092 | int |
3299 | int |
3093 | drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame, |
3300 | drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame, |
3094 | const struct drm_display_mode *mode) |
3301 | const struct drm_display_mode *mode) |
3095 | { |
3302 | { |
3096 | int err; |
3303 | int err; |
3097 | 3304 | ||
3098 | if (!frame || !mode) |
3305 | if (!frame || !mode) |
3099 | return -EINVAL; |
3306 | return -EINVAL; |
3100 | 3307 | ||
3101 | err = hdmi_avi_infoframe_init(frame); |
3308 | err = hdmi_avi_infoframe_init(frame); |
3102 | if (err < 0) |
3309 | if (err < 0) |
3103 | return err; |
3310 | return err; |
- | 3311 | ||
- | 3312 | if (mode->flags & DRM_MODE_FLAG_DBLCLK) |
|
- | 3313 | frame->pixel_repeat = 1; |
|
3104 | 3314 | ||
3105 | frame->video_code = drm_match_cea_mode(mode); |
- | |
3106 | if (!frame->video_code) |
- | |
3107 | return 0; |
3315 | frame->video_code = drm_match_cea_mode(mode); |
3108 | 3316 | ||
3109 | frame->picture_aspect = HDMI_PICTURE_ASPECT_NONE; |
3317 | frame->picture_aspect = HDMI_PICTURE_ASPECT_NONE; |
3110 | frame->active_aspect = HDMI_ACTIVE_ASPECT_PICTURE; |
3318 | frame->active_aspect = HDMI_ACTIVE_ASPECT_PICTURE; |
3111 | 3319 | ||
3112 | return 0; |
3320 | return 0; |
3113 | } |
3321 | } |
3114 | EXPORT_SYMBOL(drm_hdmi_avi_infoframe_from_display_mode);>>>>>>>>>><>><>><>>><>><>>><>>>>>>>>><>><>><>><>><>>><>>>>=>><>><>><>>>>>=>=>=>=>><>><>>>><>><>><>><>><>><>><>><>>>><>=>>>>> |
3322 | EXPORT_SYMBOL(drm_hdmi_avi_infoframe_from_display_mode); |
- | 3323 | ||
- | 3324 | /** |
|
- | 3325 | * drm_hdmi_vendor_infoframe_from_display_mode() - fill an HDMI infoframe with |
|
- | 3326 | * data from a DRM display mode |
|
- | 3327 | * @frame: HDMI vendor infoframe |
|
- | 3328 | * @mode: DRM display mode |
|
- | 3329 | * |
|
- | 3330 | * Note that there's is a need to send HDMI vendor infoframes only when using a |
|
- | 3331 | * 4k or stereoscopic 3D mode. So when giving any other mode as input this |
|
- | 3332 | * function will return -EINVAL, error that can be safely ignored. |
|
- | 3333 | * |
|
- | 3334 | * Returns 0 on success or a negative error code on failure. |
|
- | 3335 | */ |
|
- | 3336 | int |
|
- | 3337 | drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame, |
|
- | 3338 | const struct drm_display_mode *mode) |
|
- | 3339 | { |
|
- | 3340 | int err; |
|
- | 3341 | u8 vic; |
|
- | 3342 | ||
- | 3343 | if (!frame || !mode) |
|
- | 3344 | return -EINVAL; |
|
- | 3345 | ||
- | 3346 | vic = drm_match_hdmi_mode(mode); |
|
- | 3347 | if (!vic) |
|
- | 3348 | return -EINVAL; |
|
- | 3349 | ||
- | 3350 | err = hdmi_vendor_infoframe_init(frame); |
|
- | 3351 | if (err < 0) |
|
- | 3352 | return err; |
|
- | 3353 | ||
- | 3354 | frame->vic = vic; |
|
- | 3355 | ||
- | 3356 | return 0; |
|
- | 3357 | } |
|
- | 3358 | EXPORT_SYMBOL(drm_hdmi_vendor_infoframe_from_display_mode);>>>>>>>>>>>><>><>><>>><>>>><>><>>>>>><>><>><>>>>>>>>>><>><>><>><>><>>><>>>>=>><>><>><>>>>>=>=>=>=>><>><>>>><>><>><>><>><>><>><>><>>>><>=>>>>> |
|
3115 | >>><>>=>>=>>>>><>><>><>><>><>><>><>><> |
3359 | >>><>>=>>=>>>>><>><>><>><>><>><>><>><> |