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/**************************************************************************
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/**************************************************************************
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 *
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 *
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 * Copyright (c) 2006-2007 Tungsten Graphics, Inc., Cedar Park, TX., USA
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 * Copyright (c) 2006-2007 Tungsten Graphics, Inc., Cedar Park, TX., USA
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 * All Rights Reserved.
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 * All Rights Reserved.
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 *
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a
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 * Permission is hereby granted, free of charge, to any person obtaining a
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 * copy of this software and associated documentation files (the
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 * copy of this software and associated documentation files (the
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 * "Software"), to deal in the Software without restriction, including
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 * "Software"), to deal in the Software without restriction, including
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 * without limitation the rights to use, copy, modify, merge, publish,
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 * without limitation the rights to use, copy, modify, merge, publish,
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 * distribute, sub license, and/or sell copies of the Software, and to
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 * distribute, sub license, and/or sell copies of the Software, and to
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 * permit persons to whom the Software is furnished to do so, subject to
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 * permit persons to whom the Software is furnished to do so, subject to
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 * the following conditions:
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 * the following conditions:
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 *
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 *
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 * The above copyright notice and this permission notice (including the
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 * The above copyright notice and this permission notice (including the
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 * next paragraph) shall be included in all copies or substantial portions
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 * next paragraph) shall be included in all copies or substantial portions
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 * of the Software.
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 * of the Software.
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 *
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
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 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
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 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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 * USE OR OTHER DEALINGS IN THE SOFTWARE.
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 * USE OR OTHER DEALINGS IN THE SOFTWARE.
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 *
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 *
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 **************************************************************************/
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 **************************************************************************/
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/*
 27 
/*
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 * Authors: Thomas Hellström
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 * Authors: Thomas Hellström
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 */
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 */
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 30 
 
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#include
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#include
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#include
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#include
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 33 
 
34 
extern int x86_clflush_size;
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extern int x86_clflush_size;
- 
 
 35 
 
- 
 
 36 
#if defined(CONFIG_X86)
- 
 
 37 
 
- 
 
 38 
/*
- 
 
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 * clflushopt is an unordered instruction which needs fencing with mfence or
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 40 
 * sfence to avoid ordering issues.  For drm_clflush_page this fencing happens
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 41 
 * in the caller.
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#if 0
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 */
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static void
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static void
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drm_clflush_page(struct page *page)
 44 
drm_clflush_page(struct page *page)
40 
{
 45 
{
41 
	uint8_t *page_virtual;
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	uint8_t *page_virtual;
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	unsigned int i;
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	unsigned int i;
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	const int size = boot_cpu_data.x86_clflush_size;
 48 
	const int size = boot_cpu_data.x86_clflush_size;
44 
 
 49 
 
45 
	if (unlikely(page == NULL))
 50 
	if (unlikely(page == NULL))
46 
		return;
 51 
		return;
47 
 
 52 
 
48 
	page_virtual = kmap_atomic(page);
 53 
	page_virtual = kmap_atomic(page);
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	for (i = 0; i < PAGE_SIZE; i += size)
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	for (i = 0; i < PAGE_SIZE; i += size)
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		clflush(page_virtual + i);
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		clflush(page_virtual + i);
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	kunmap_atomic(page_virtual);
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	kunmap_atomic(page_virtual);
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}
 57 
}
53 
 
 58 
 
54 
static void drm_cache_flush_clflush(struct page *pages[],
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static void drm_cache_flush_clflush(struct page *pages[],
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				    unsigned long num_pages)
 60 
				    unsigned long num_pages)
56 
{
 61 
{
57 
	unsigned long i;
 62 
	unsigned long i;
58 
 
 63 
 
59 
	mb();
 64 
	mb();
60 
	for (i = 0; i < num_pages; i++)
 65 
	for (i = 0; i < num_pages; i++)
61 
		drm_clflush_page(*pages++);
 66 
		drm_clflush_page(*pages++);
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	mb();
 67 
	mb();
63 
}
 68 
}
64 
#endif
 69 
#endif
65 
 
 70 
 
66 
void
 71 
void
67 
drm_clflush_pages(struct page *pages[], unsigned long num_pages)
 72 
drm_clflush_pages(struct page *pages[], unsigned long num_pages)
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{
 73 
{
69 
    uint8_t *pva;
 - 
 
70 
    unsigned int i, j;
 - 
 
- 
 
 74 
 
71 
 
 75 
#if defined(CONFIG_X86)
- 
 
 76 
	drm_cache_flush_clflush(pages, num_pages);
72 
    pva = AllocKernelSpace(4096);
 77 
	return;
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 78 
 
- 
 
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#elif defined(__powerpc__)
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    if(pva != NULL)
 80 
	unsigned long i;
75 
    {
 81 
	for (i = 0; i < num_pages; i++) {
76 
        dma_addr_t *src, *dst;
 82 
		struct page *page = pages[i];
77 
        u32 count;
 83 
		void *page_virtual;
- 
 
 84 
 
78 
 
 85 
		if (unlikely(page == NULL))
79 
        for (i = 0; i < num_pages; i++)
 86 
			continue;
80 
        {
 - 
 
81 
            mb();
 87 
 
82 
            MapPage(pva, page_to_phys(pages[i]), 0x001);
 - 
 
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            for (j = 0; j < PAGE_SIZE; j += x86_clflush_size)
 88 
		page_virtual = kmap_atomic(page);
84 
                clflush(pva + j);
 89 
		flush_dcache_range((unsigned long)page_virtual,
- 
 
 90 
				   (unsigned long)page_virtual + PAGE_SIZE);
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 91 
		kunmap_atomic(page_virtual);
85 
        }
 92 
	}
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 93 
#else
86 
        FreeKernelSpace(pva);
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	printk(KERN_ERR "Architecture has no drm_cache.c support\n");
87 
    }
 95 
	WARN_ON_ONCE(1);
88 
    mb();
 96 
#endif
89 
}
 97 
}
90 
EXPORT_SYMBOL(drm_clflush_pages);
 98 
EXPORT_SYMBOL(drm_clflush_pages);
91 
 
 99 
 
92 
void
 100 
void
93 
drm_clflush_sg(struct sg_table *st)
 101 
drm_clflush_sg(struct sg_table *st)
94 
{
 102 
{
- 
 
 103 
#if defined(CONFIG_X86)
- 
 
 104 
	if (cpu_has_clflush) {
95 
    struct sg_page_iter sg_iter;
 105 
		struct sg_page_iter sg_iter;
96 
    struct page *page;
 - 
 
97 
 
 - 
 
98 
    uint8_t *pva;
 - 
 
99 
    unsigned int i;
 - 
 
100 
 
 - 
 
101 
    pva = AllocKernelSpace(4096);
 - 
 
102 
    if( pva != NULL)
 - 
 
103 
    {
 106 
 
104 
        mb();
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		mb();
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        for_each_sg_page(st->sgl, &sg_iter, st->nents, 0)
 - 
 
106 
        {
 108 
		for_each_sg_page(st->sgl, &sg_iter, st->nents, 0)
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 109 
			drm_clflush_page(sg_page_iter_page(&sg_iter));
107 
            page = sg_page_iter_page(&sg_iter);
 110 
		mb();
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 111 
 
108 
 
 112 
		return;
109 
            MapPage(pva,page_to_phys(page), 0x001);
 113 
	}
110 
 
 114 
 
111 
            for (i = 0; i < PAGE_SIZE; i += x86_clflush_size)
 115 
	if (wbinvd_on_all_cpus())
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                clflush(pva + i);
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		printk(KERN_ERR "Timed out waiting for cache flush.\n");
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        };
 117 
#else
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        FreeKernelSpace(pva);
 118 
	printk(KERN_ERR "Architecture has no drm_cache.c support\n");
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    };
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	WARN_ON_ONCE(1);
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    mb();
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#endif
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}
 121 
}
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EXPORT_SYMBOL(drm_clflush_sg);
 122 
EXPORT_SYMBOL(drm_clflush_sg);
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 - 
 
120 
#if 0
 123 
 
121 
void
 124 
void
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drm_clflush_virt_range(void *addr, unsigned long length)
 125 
drm_clflush_virt_range(void *addr, unsigned long length)
123 
{
 126 
{
124 
#if defined(CONFIG_X86)
 127 
#if defined(CONFIG_X86)
125 
	if (cpu_has_clflush) {
 128 
	if (1) {
126 
		const int size = boot_cpu_data.x86_clflush_size;
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		const int size = x86_clflush_size;
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		void *end = addr + length;
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		void *end = addr + length;
128 
		addr = (void *)(((unsigned long)addr) & -size);
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		addr = (void *)(((unsigned long)addr) & -size);
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		mb();
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		mb();
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		for (; addr < end; addr += size)
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		for (; addr < end; addr += size)
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			clflushopt(addr);
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			clflush(addr);
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		mb();
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		mb();
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		return;
 136 
		return;
134 
	}
 137 
	}
135 
 
 - 
 
136 
	if (wbinvd_on_all_cpus())
 - 
 
137 
		printk(KERN_ERR "Timed out waiting for cache flush.\n");
 138 
 
138 
#else
 139 
#else
139 
	printk(KERN_ERR "Architecture has no drm_cache.c support\n");
 140 
	printk(KERN_ERR "Architecture has no drm_cache.c support\n");
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	WARN_ON_ONCE(1);
 141 
	WARN_ON_ONCE(1);
141 
#endif
 142 
#endif
142 
}
 143 
}
143 
EXPORT_SYMBOL(drm_clflush_virt_range);
 144 
EXPORT_SYMBOL(drm_clflush_virt_range);
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 - 
 
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#endif
 -