Rev 3299 | Go to most recent revision | Only display areas with differences | Regard whitespace | Details | Blame | Last modification | View Log | RSS feed
Rev 3299 | Rev 3769 | ||
---|---|---|---|
1 | /* |
1 | /* |
2 | * Copyright © 2010-2011 Intel Corporation |
2 | * Copyright © 2010-2011 Intel Corporation |
3 | * |
3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a |
4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), |
5 | * copy of this software and associated documentation files (the "Software"), |
6 | * to deal in the Software without restriction, including without limitation |
6 | * to deal in the Software without restriction, including without limitation |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
8 | * and/or sell copies of the Software, and to permit persons to whom the |
8 | * and/or sell copies of the Software, and to permit persons to whom the |
9 | * Software is furnished to do so, subject to the following conditions: |
9 | * Software is furnished to do so, subject to the following conditions: |
10 | * |
10 | * |
11 | * The above copyright notice and this permission notice (including the next |
11 | * The above copyright notice and this permission notice (including the next |
12 | * paragraph) shall be included in all copies or substantial portions of the |
12 | * paragraph) shall be included in all copies or substantial portions of the |
13 | * Software. |
13 | * Software. |
14 | * |
14 | * |
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
20 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
20 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
21 | * SOFTWARE. |
21 | * SOFTWARE. |
22 | * |
22 | * |
23 | * Authors: |
23 | * Authors: |
24 | * Chris Wilson |
24 | * Chris Wilson |
25 | * |
25 | * |
26 | */ |
26 | */ |
27 | 27 | ||
28 | #ifdef HAVE_CONFIG_H |
28 | #ifdef HAVE_CONFIG_H |
29 | #include "config.h" |
29 | #include "config.h" |
30 | #endif |
30 | #endif |
31 | 31 | ||
32 | #include "sna.h" |
32 | #include "sna.h" |
33 | #include "sna_render.h" |
33 | #include "sna_render.h" |
34 | #include "sna_render_inline.h" |
34 | #include "sna_render_inline.h" |
35 | #include "sna_reg.h" |
35 | #include "sna_reg.h" |
36 | //#include "sna_video.h" |
36 | //#include "sna_video.h" |
37 | 37 | ||
38 | #include "gen3_render.h" |
38 | #include "gen3_render.h" |
39 | 39 | ||
40 | #define NO_COMPOSITE 0 |
40 | #define NO_COMPOSITE 0 |
41 | #define NO_COMPOSITE_SPANS 0 |
41 | #define NO_COMPOSITE_SPANS 0 |
42 | #define NO_COPY 0 |
42 | #define NO_COPY 0 |
43 | #define NO_COPY_BOXES 0 |
43 | #define NO_COPY_BOXES 0 |
44 | #define NO_FILL 0 |
44 | #define NO_FILL 0 |
45 | #define NO_FILL_ONE 0 |
45 | #define NO_FILL_ONE 0 |
46 | #define NO_FILL_BOXES 0 |
46 | #define NO_FILL_BOXES 0 |
47 | 47 | ||
48 | #define PREFER_BLT_FILL 1 |
48 | #define PREFER_BLT_FILL 1 |
49 | 49 | ||
50 | enum { |
50 | enum { |
51 | SHADER_NONE = 0, |
51 | SHADER_NONE = 0, |
52 | SHADER_ZERO, |
52 | SHADER_ZERO, |
53 | SHADER_BLACK, |
53 | SHADER_BLACK, |
54 | SHADER_WHITE, |
54 | SHADER_WHITE, |
55 | SHADER_CONSTANT, |
55 | SHADER_CONSTANT, |
56 | SHADER_LINEAR, |
56 | SHADER_LINEAR, |
57 | SHADER_RADIAL, |
57 | SHADER_RADIAL, |
58 | SHADER_TEXTURE, |
58 | SHADER_TEXTURE, |
59 | SHADER_OPACITY, |
59 | SHADER_OPACITY, |
60 | }; |
60 | }; |
61 | 61 | ||
62 | #define MAX_3D_SIZE 2048 |
62 | #define MAX_3D_SIZE 2048 |
63 | #define MAX_3D_PITCH 8192 |
63 | #define MAX_3D_PITCH 8192 |
64 | 64 | ||
65 | #define OUT_BATCH(v) batch_emit(sna, v) |
65 | #define OUT_BATCH(v) batch_emit(sna, v) |
66 | #define OUT_BATCH_F(v) batch_emit_float(sna, v) |
66 | #define OUT_BATCH_F(v) batch_emit_float(sna, v) |
67 | #define OUT_VERTEX(v) vertex_emit(sna, v) |
67 | #define OUT_VERTEX(v) vertex_emit(sna, v) |
68 | 68 | ||
69 | enum gen3_radial_mode { |
69 | enum gen3_radial_mode { |
70 | RADIAL_ONE, |
70 | RADIAL_ONE, |
71 | RADIAL_TWO |
71 | RADIAL_TWO |
72 | }; |
72 | }; |
73 | 73 | ||
74 | static const struct blendinfo { |
74 | static const struct blendinfo { |
75 | bool dst_alpha; |
75 | bool dst_alpha; |
76 | bool src_alpha; |
76 | bool src_alpha; |
77 | uint32_t src_blend; |
77 | uint32_t src_blend; |
78 | uint32_t dst_blend; |
78 | uint32_t dst_blend; |
79 | } gen3_blend_op[] = { |
79 | } gen3_blend_op[] = { |
80 | /* Clear */ {0, 0, BLENDFACT_ZERO, BLENDFACT_ZERO}, |
80 | /* Clear */ {0, 0, BLENDFACT_ZERO, BLENDFACT_ZERO}, |
81 | /* Src */ {0, 0, BLENDFACT_ONE, BLENDFACT_ZERO}, |
81 | /* Src */ {0, 0, BLENDFACT_ONE, BLENDFACT_ZERO}, |
82 | /* Dst */ {0, 0, BLENDFACT_ZERO, BLENDFACT_ONE}, |
82 | /* Dst */ {0, 0, BLENDFACT_ZERO, BLENDFACT_ONE}, |
83 | /* Over */ {0, 1, BLENDFACT_ONE, BLENDFACT_INV_SRC_ALPHA}, |
83 | /* Over */ {0, 1, BLENDFACT_ONE, BLENDFACT_INV_SRC_ALPHA}, |
84 | /* OverReverse */ {1, 0, BLENDFACT_INV_DST_ALPHA, BLENDFACT_ONE}, |
84 | /* OverReverse */ {1, 0, BLENDFACT_INV_DST_ALPHA, BLENDFACT_ONE}, |
85 | /* In */ {1, 0, BLENDFACT_DST_ALPHA, BLENDFACT_ZERO}, |
85 | /* In */ {1, 0, BLENDFACT_DST_ALPHA, BLENDFACT_ZERO}, |
86 | /* InReverse */ {0, 1, BLENDFACT_ZERO, BLENDFACT_SRC_ALPHA}, |
86 | /* InReverse */ {0, 1, BLENDFACT_ZERO, BLENDFACT_SRC_ALPHA}, |
87 | /* Out */ {1, 0, BLENDFACT_INV_DST_ALPHA, BLENDFACT_ZERO}, |
87 | /* Out */ {1, 0, BLENDFACT_INV_DST_ALPHA, BLENDFACT_ZERO}, |
88 | /* OutReverse */ {0, 1, BLENDFACT_ZERO, BLENDFACT_INV_SRC_ALPHA}, |
88 | /* OutReverse */ {0, 1, BLENDFACT_ZERO, BLENDFACT_INV_SRC_ALPHA}, |
89 | /* Atop */ {1, 1, BLENDFACT_DST_ALPHA, BLENDFACT_INV_SRC_ALPHA}, |
89 | /* Atop */ {1, 1, BLENDFACT_DST_ALPHA, BLENDFACT_INV_SRC_ALPHA}, |
90 | /* AtopReverse */ {1, 1, BLENDFACT_INV_DST_ALPHA, BLENDFACT_SRC_ALPHA}, |
90 | /* AtopReverse */ {1, 1, BLENDFACT_INV_DST_ALPHA, BLENDFACT_SRC_ALPHA}, |
91 | /* Xor */ {1, 1, BLENDFACT_INV_DST_ALPHA, BLENDFACT_INV_SRC_ALPHA}, |
91 | /* Xor */ {1, 1, BLENDFACT_INV_DST_ALPHA, BLENDFACT_INV_SRC_ALPHA}, |
92 | /* Add */ {0, 0, BLENDFACT_ONE, BLENDFACT_ONE}, |
92 | /* Add */ {0, 0, BLENDFACT_ONE, BLENDFACT_ONE}, |
93 | }; |
93 | }; |
94 | 94 | ||
95 | #define S6_COLOR_WRITE_ONLY \ |
95 | #define S6_COLOR_WRITE_ONLY \ |
96 | (S6_COLOR_WRITE_ENABLE | \ |
96 | (S6_COLOR_WRITE_ENABLE | \ |
97 | BLENDFUNC_ADD << S6_CBUF_BLEND_FUNC_SHIFT | \ |
97 | BLENDFUNC_ADD << S6_CBUF_BLEND_FUNC_SHIFT | \ |
98 | BLENDFACT_ONE << S6_CBUF_SRC_BLEND_FACT_SHIFT | \ |
98 | BLENDFACT_ONE << S6_CBUF_SRC_BLEND_FACT_SHIFT | \ |
99 | BLENDFACT_ZERO << S6_CBUF_DST_BLEND_FACT_SHIFT) |
99 | BLENDFACT_ZERO << S6_CBUF_DST_BLEND_FACT_SHIFT) |
100 | 100 | ||
101 | static const struct formatinfo { |
101 | static const struct formatinfo { |
102 | unsigned int fmt, xfmt; |
102 | unsigned int fmt, xfmt; |
103 | uint32_t card_fmt; |
103 | uint32_t card_fmt; |
104 | bool rb_reversed; |
104 | bool rb_reversed; |
105 | } gen3_tex_formats[] = { |
105 | } gen3_tex_formats[] = { |
106 | {PICT_a8, 0, MAPSURF_8BIT | MT_8BIT_A8, false}, |
106 | {PICT_a8, 0, MAPSURF_8BIT | MT_8BIT_A8, false}, |
107 | {PICT_a8r8g8b8, 0, MAPSURF_32BIT | MT_32BIT_ARGB8888, false}, |
107 | {PICT_a8r8g8b8, 0, MAPSURF_32BIT | MT_32BIT_ARGB8888, false}, |
108 | {PICT_x8r8g8b8, 0, MAPSURF_32BIT | MT_32BIT_XRGB8888, false}, |
108 | {PICT_x8r8g8b8, 0, MAPSURF_32BIT | MT_32BIT_XRGB8888, false}, |
109 | {PICT_a8b8g8r8, 0, MAPSURF_32BIT | MT_32BIT_ABGR8888, false}, |
109 | {PICT_a8b8g8r8, 0, MAPSURF_32BIT | MT_32BIT_ABGR8888, false}, |
110 | {PICT_x8b8g8r8, 0, MAPSURF_32BIT | MT_32BIT_XBGR8888, false} |
110 | {PICT_x8b8g8r8, 0, MAPSURF_32BIT | MT_32BIT_XBGR8888, false} |
111 | }; |
111 | }; |
112 | 112 | ||
113 | #define xFixedToDouble(f) pixman_fixed_to_double(f) |
113 | #define xFixedToDouble(f) pixman_fixed_to_double(f) |
114 | 114 | ||
115 | static inline bool too_large(int width, int height) |
115 | static inline bool too_large(int width, int height) |
116 | { |
116 | { |
117 | return width > MAX_3D_SIZE || height > MAX_3D_SIZE; |
117 | return width > MAX_3D_SIZE || height > MAX_3D_SIZE; |
118 | } |
118 | } |
119 | 119 | ||
120 | static inline uint32_t gen3_buf_tiling(uint32_t tiling) |
120 | static inline uint32_t gen3_buf_tiling(uint32_t tiling) |
121 | { |
121 | { |
122 | uint32_t v = 0; |
122 | uint32_t v = 0; |
123 | switch (tiling) { |
123 | switch (tiling) { |
124 | case I915_TILING_Y: v |= BUF_3D_TILE_WALK_Y; |
124 | case I915_TILING_Y: v |= BUF_3D_TILE_WALK_Y; |
125 | case I915_TILING_X: v |= BUF_3D_TILED_SURFACE; |
125 | case I915_TILING_X: v |= BUF_3D_TILED_SURFACE; |
126 | case I915_TILING_NONE: break; |
126 | case I915_TILING_NONE: break; |
127 | } |
127 | } |
128 | return v; |
128 | return v; |
129 | } |
129 | } |
130 | static uint32_t gen3_get_blend_cntl(int op, |
130 | static uint32_t gen3_get_blend_cntl(int op, |
131 | bool has_component_alpha, |
131 | bool has_component_alpha, |
132 | uint32_t dst_format) |
132 | uint32_t dst_format) |
133 | { |
133 | { |
134 | uint32_t sblend; |
134 | uint32_t sblend; |
135 | uint32_t dblend; |
135 | uint32_t dblend; |
136 | 136 | ||
137 | sblend = BLENDFACT_ONE; |
137 | sblend = BLENDFACT_ONE; |
138 | dblend = BLENDFACT_INV_SRC_ALPHA; |
138 | dblend = BLENDFACT_INV_SRC_ALPHA; |
139 | 139 | ||
140 | #if 0 |
140 | #if 0 |
141 | if (op <= PictOpSrc) /* for clear and src disable blending */ |
141 | if (op <= PictOpSrc) /* for clear and src disable blending */ |
142 | return S6_COLOR_WRITE_ONLY; |
142 | return S6_COLOR_WRITE_ONLY; |
143 | 143 | ||
144 | /* If there's no dst alpha channel, adjust the blend op so that we'll |
144 | /* If there's no dst alpha channel, adjust the blend op so that we'll |
145 | * treat it as always 1. |
145 | * treat it as always 1. |
146 | */ |
146 | */ |
147 | if (gen3_blend_op[op].dst_alpha) { |
147 | if (gen3_blend_op[op].dst_alpha) { |
148 | if (PICT_FORMAT_A(dst_format) == 0) { |
148 | if (PICT_FORMAT_A(dst_format) == 0) { |
149 | if (sblend == BLENDFACT_DST_ALPHA) |
149 | if (sblend == BLENDFACT_DST_ALPHA) |
150 | sblend = BLENDFACT_ONE; |
150 | sblend = BLENDFACT_ONE; |
151 | else if (sblend == BLENDFACT_INV_DST_ALPHA) |
151 | else if (sblend == BLENDFACT_INV_DST_ALPHA) |
152 | sblend = BLENDFACT_ZERO; |
152 | sblend = BLENDFACT_ZERO; |
153 | } |
153 | } |
154 | 154 | ||
155 | /* gen3 engine reads 8bit color buffer into green channel |
155 | /* gen3 engine reads 8bit color buffer into green channel |
156 | * in cases like color buffer blending etc., and also writes |
156 | * in cases like color buffer blending etc., and also writes |
157 | * back green channel. So with dst_alpha blend we should use |
157 | * back green channel. So with dst_alpha blend we should use |
158 | * color factor. See spec on "8-bit rendering". |
158 | * color factor. See spec on "8-bit rendering". |
159 | */ |
159 | */ |
160 | if (dst_format == PICT_a8) { |
160 | if (dst_format == PICT_a8) { |
161 | if (sblend == BLENDFACT_DST_ALPHA) |
161 | if (sblend == BLENDFACT_DST_ALPHA) |
162 | sblend = BLENDFACT_DST_COLR; |
162 | sblend = BLENDFACT_DST_COLR; |
163 | else if (sblend == BLENDFACT_INV_DST_ALPHA) |
163 | else if (sblend == BLENDFACT_INV_DST_ALPHA) |
164 | sblend = BLENDFACT_INV_DST_COLR; |
164 | sblend = BLENDFACT_INV_DST_COLR; |
165 | } |
165 | } |
166 | } |
166 | } |
167 | 167 | ||
168 | /* If the source alpha is being used, then we should only be in a case |
168 | /* If the source alpha is being used, then we should only be in a case |
169 | * where the source blend factor is 0, and the source blend value is the |
169 | * where the source blend factor is 0, and the source blend value is the |
170 | * mask channels multiplied by the source picture's alpha. |
170 | * mask channels multiplied by the source picture's alpha. |
171 | */ |
171 | */ |
172 | if (has_component_alpha && gen3_blend_op[op].src_alpha) { |
172 | if (has_component_alpha && gen3_blend_op[op].src_alpha) { |
173 | if (dblend == BLENDFACT_SRC_ALPHA) |
173 | if (dblend == BLENDFACT_SRC_ALPHA) |
174 | dblend = BLENDFACT_SRC_COLR; |
174 | dblend = BLENDFACT_SRC_COLR; |
175 | else if (dblend == BLENDFACT_INV_SRC_ALPHA) |
175 | else if (dblend == BLENDFACT_INV_SRC_ALPHA) |
176 | dblend = BLENDFACT_INV_SRC_COLR; |
176 | dblend = BLENDFACT_INV_SRC_COLR; |
177 | } |
177 | } |
178 | #endif |
178 | #endif |
179 | 179 | ||
180 | return (S6_CBUF_BLEND_ENABLE | S6_COLOR_WRITE_ENABLE | |
180 | return (S6_CBUF_BLEND_ENABLE | S6_COLOR_WRITE_ENABLE | |
181 | BLENDFUNC_ADD << S6_CBUF_BLEND_FUNC_SHIFT | |
181 | BLENDFUNC_ADD << S6_CBUF_BLEND_FUNC_SHIFT | |
182 | sblend << S6_CBUF_SRC_BLEND_FACT_SHIFT | |
182 | sblend << S6_CBUF_SRC_BLEND_FACT_SHIFT | |
183 | dblend << S6_CBUF_DST_BLEND_FACT_SHIFT); |
183 | dblend << S6_CBUF_DST_BLEND_FACT_SHIFT); |
184 | } |
184 | } |
185 | static bool gen3_dst_rb_reversed(uint32_t format) |
185 | static bool gen3_dst_rb_reversed(uint32_t format) |
186 | { |
186 | { |
187 | switch (format) { |
187 | switch (format) { |
188 | case PICT_a8r8g8b8: |
188 | case PICT_a8r8g8b8: |
189 | case PICT_x8r8g8b8: |
189 | case PICT_x8r8g8b8: |
190 | case PICT_a8: |
190 | case PICT_a8: |
191 | return false; |
191 | return false; |
192 | default: |
192 | default: |
193 | return true; |
193 | return true; |
194 | } |
194 | } |
195 | } |
195 | } |
196 | 196 | ||
197 | #define DSTORG_HORT_BIAS(x) ((x)<<20) |
197 | #define DSTORG_HORT_BIAS(x) ((x)<<20) |
198 | #define DSTORG_VERT_BIAS(x) ((x)<<16) |
198 | #define DSTORG_VERT_BIAS(x) ((x)<<16) |
199 | 199 | ||
200 | static uint32_t gen3_get_dst_format(uint32_t format) |
200 | static uint32_t gen3_get_dst_format(uint32_t format) |
201 | { |
201 | { |
202 | #define BIAS (DSTORG_HORT_BIAS(0x8) | DSTORG_VERT_BIAS(0x8)) |
202 | #define BIAS (DSTORG_HORT_BIAS(0x8) | DSTORG_VERT_BIAS(0x8)) |
203 | switch (format) { |
203 | switch (format) { |
204 | default: |
204 | default: |
205 | case PICT_a8r8g8b8: |
205 | case PICT_a8r8g8b8: |
206 | case PICT_x8r8g8b8: |
206 | case PICT_x8r8g8b8: |
207 | case PICT_a8b8g8r8: |
207 | case PICT_a8b8g8r8: |
208 | case PICT_x8b8g8r8: |
208 | case PICT_x8b8g8r8: |
209 | return BIAS | COLR_BUF_ARGB8888; |
209 | return BIAS | COLR_BUF_ARGB8888; |
210 | case PICT_a8: |
210 | case PICT_a8: |
211 | return BIAS | COLR_BUF_8BIT; |
211 | return BIAS | COLR_BUF_8BIT; |
212 | } |
212 | } |
213 | #undef BIAS |
213 | #undef BIAS |
214 | } |
214 | } |
215 | 215 | ||
216 | 216 | ||
217 | 217 | ||
218 | fastcall static void |
218 | fastcall static void |
219 | gen3_emit_composite_primitive_identity_source_mask(struct sna *sna, |
219 | gen3_emit_composite_primitive_identity_source_mask(struct sna *sna, |
220 | const struct sna_composite_op *op, |
220 | const struct sna_composite_op *op, |
221 | const struct sna_composite_rectangles *r) |
221 | const struct sna_composite_rectangles *r) |
222 | { |
222 | { |
223 | float dst_x, dst_y; |
223 | float dst_x, dst_y; |
224 | float src_x, src_y; |
224 | float src_x, src_y; |
225 | float msk_x, msk_y; |
225 | float msk_x, msk_y; |
226 | float w, h; |
226 | float w, h; |
227 | float *v; |
227 | float *v; |
228 | 228 | ||
229 | dst_x = r->dst.x + op->dst.x; |
229 | dst_x = r->dst.x + op->dst.x; |
230 | dst_y = r->dst.y + op->dst.y; |
230 | dst_y = r->dst.y + op->dst.y; |
231 | src_x = r->src.x + op->src.offset[0]; |
231 | src_x = r->src.x + op->src.offset[0]; |
232 | src_y = r->src.y + op->src.offset[1]; |
232 | src_y = r->src.y + op->src.offset[1]; |
233 | msk_x = r->mask.x + op->mask.offset[0]; |
233 | msk_x = r->mask.x + op->mask.offset[0]; |
234 | msk_y = r->mask.y + op->mask.offset[1]; |
234 | msk_y = r->mask.y + op->mask.offset[1]; |
235 | w = r->width; |
235 | w = r->width; |
236 | h = r->height; |
236 | h = r->height; |
237 | 237 | ||
238 | v = sna->render.vertices + sna->render.vertex_used; |
238 | v = sna->render.vertices + sna->render.vertex_used; |
239 | sna->render.vertex_used += 18; |
239 | sna->render.vertex_used += 18; |
240 | 240 | ||
241 | v[0] = dst_x + w; |
241 | v[0] = dst_x + w; |
242 | v[1] = dst_y + h; |
242 | v[1] = dst_y + h; |
243 | v[2] = (src_x + w) * op->src.scale[0]; |
243 | v[2] = (src_x + w) * op->src.scale[0]; |
244 | v[3] = (src_y + h) * op->src.scale[1]; |
244 | v[3] = (src_y + h) * op->src.scale[1]; |
245 | v[4] = (msk_x + w) * op->mask.scale[0]; |
245 | v[4] = (msk_x + w) * op->mask.scale[0]; |
246 | v[5] = (msk_y + h) * op->mask.scale[1]; |
246 | v[5] = (msk_y + h) * op->mask.scale[1]; |
247 | 247 | ||
248 | v[6] = dst_x; |
248 | v[6] = dst_x; |
249 | v[7] = v[1]; |
249 | v[7] = v[1]; |
250 | v[8] = src_x * op->src.scale[0]; |
250 | v[8] = src_x * op->src.scale[0]; |
251 | v[9] = v[3]; |
251 | v[9] = v[3]; |
252 | v[10] = msk_x * op->mask.scale[0]; |
252 | v[10] = msk_x * op->mask.scale[0]; |
253 | v[11] =v[5]; |
253 | v[11] =v[5]; |
254 | 254 | ||
255 | v[12] = v[6]; |
255 | v[12] = v[6]; |
256 | v[13] = dst_y; |
256 | v[13] = dst_y; |
257 | v[14] = v[8]; |
257 | v[14] = v[8]; |
258 | v[15] = src_y * op->src.scale[1]; |
258 | v[15] = src_y * op->src.scale[1]; |
259 | v[16] = v[10]; |
259 | v[16] = v[10]; |
260 | v[17] = msk_y * op->mask.scale[1]; |
260 | v[17] = msk_y * op->mask.scale[1]; |
261 | } |
261 | } |
262 | 262 | ||
263 | 263 | ||
264 | 264 | ||
265 | 265 | ||
266 | 266 | ||
267 | 267 | ||
268 | 268 | ||
269 | 269 | ||
270 | 270 | ||
271 | 271 | ||
272 | 272 | ||
273 | 273 | ||
274 | 274 | ||
275 | 275 | ||
276 | 276 | ||
277 | 277 | ||
278 | 278 | ||
279 | 279 | ||
280 | 280 | ||
281 | 281 | ||
282 | 282 | ||
283 | 283 | ||
284 | 284 | ||
285 | 285 | ||
286 | 286 | ||
287 | 287 | ||
288 | 288 | ||
289 | 289 | ||
290 | 290 | ||
291 | 291 | ||
292 | 292 | ||
293 | 293 | ||
294 | 294 | ||
295 | 295 | ||
296 | 296 | ||
297 | 297 | ||
298 | 298 | ||
299 | 299 | ||
300 | 300 | ||
301 | 301 | ||
302 | 302 | ||
303 | 303 | ||
304 | 304 | ||
305 | 305 | ||
306 | 306 | ||
307 | 307 | ||
308 | 308 | ||
309 | 309 | ||
310 | 310 | ||
311 | 311 | ||
312 | 312 | ||
313 | 313 | ||
314 | 314 | ||
315 | 315 | ||
316 | 316 | ||
317 | 317 | ||
318 | 318 | ||
319 | 319 | ||
320 | 320 | ||
321 | 321 | ||
322 | 322 | ||
323 | 323 | ||
324 | 324 | ||
325 | static inline void |
325 | static inline void |
326 | gen3_2d_perspective(struct sna *sna, int in, int out) |
326 | gen3_2d_perspective(struct sna *sna, int in, int out) |
327 | { |
327 | { |
328 | gen3_fs_rcp(out, 0, gen3_fs_operand(in, W, W, W, W)); |
328 | gen3_fs_rcp(out, 0, gen3_fs_operand(in, W, W, W, W)); |
329 | gen3_fs_mul(out, |
329 | gen3_fs_mul(out, |
330 | gen3_fs_operand(in, X, Y, ZERO, ONE), |
330 | gen3_fs_operand(in, X, Y, ZERO, ONE), |
331 | gen3_fs_operand_reg(out)); |
331 | gen3_fs_operand_reg(out)); |
332 | } |
332 | } |
333 | 333 | ||
334 | static inline void |
334 | static inline void |
335 | gen3_linear_coord(struct sna *sna, |
335 | gen3_linear_coord(struct sna *sna, |
336 | const struct sna_composite_channel *channel, |
336 | const struct sna_composite_channel *channel, |
337 | int in, int out) |
337 | int in, int out) |
338 | { |
338 | { |
339 | int c = channel->u.gen3.constants; |
339 | int c = channel->u.gen3.constants; |
340 | 340 | ||
341 | if (!channel->is_affine) { |
341 | if (!channel->is_affine) { |
342 | gen3_2d_perspective(sna, in, FS_U0); |
342 | gen3_2d_perspective(sna, in, FS_U0); |
343 | in = FS_U0; |
343 | in = FS_U0; |
344 | } |
344 | } |
345 | 345 | ||
346 | gen3_fs_mov(out, gen3_fs_operand_zero()); |
346 | gen3_fs_mov(out, gen3_fs_operand_zero()); |
347 | gen3_fs_dp3(out, MASK_X, |
347 | gen3_fs_dp3(out, MASK_X, |
348 | gen3_fs_operand(in, X, Y, ONE, ZERO), |
348 | gen3_fs_operand(in, X, Y, ONE, ZERO), |
349 | gen3_fs_operand_reg(c)); |
349 | gen3_fs_operand_reg(c)); |
350 | } |
350 | } |
351 | 351 | ||
352 | static void |
352 | static void |
353 | gen3_radial_coord(struct sna *sna, |
353 | gen3_radial_coord(struct sna *sna, |
354 | const struct sna_composite_channel *channel, |
354 | const struct sna_composite_channel *channel, |
355 | int in, int out) |
355 | int in, int out) |
356 | { |
356 | { |
357 | int c = channel->u.gen3.constants; |
357 | int c = channel->u.gen3.constants; |
358 | 358 | ||
359 | if (!channel->is_affine) { |
359 | if (!channel->is_affine) { |
360 | gen3_2d_perspective(sna, in, FS_U0); |
360 | gen3_2d_perspective(sna, in, FS_U0); |
361 | in = FS_U0; |
361 | in = FS_U0; |
362 | } |
362 | } |
363 | 363 | ||
364 | switch (channel->u.gen3.mode) { |
364 | switch (channel->u.gen3.mode) { |
365 | case RADIAL_ONE: |
365 | case RADIAL_ONE: |
366 | /* |
366 | /* |
367 | pdx = (x - c1x) / dr, pdy = (y - c1y) / dr; |
367 | pdx = (x - c1x) / dr, pdy = (y - c1y) / dr; |
368 | r? = pdx*pdx + pdy*pdy |
368 | r? = pdx*pdx + pdy*pdy |
369 | t = r?/sqrt(r?) - r1/dr; |
369 | t = r?/sqrt(r?) - r1/dr; |
370 | */ |
370 | */ |
371 | gen3_fs_mad(FS_U0, MASK_X | MASK_Y, |
371 | gen3_fs_mad(FS_U0, MASK_X | MASK_Y, |
372 | gen3_fs_operand(in, X, Y, ZERO, ZERO), |
372 | gen3_fs_operand(in, X, Y, ZERO, ZERO), |
373 | gen3_fs_operand(c, Z, Z, ZERO, ZERO), |
373 | gen3_fs_operand(c, Z, Z, ZERO, ZERO), |
374 | gen3_fs_operand(c, NEG_X, NEG_Y, ZERO, ZERO)); |
374 | gen3_fs_operand(c, NEG_X, NEG_Y, ZERO, ZERO)); |
375 | gen3_fs_dp2add(FS_U0, MASK_X, |
375 | gen3_fs_dp2add(FS_U0, MASK_X, |
376 | gen3_fs_operand(FS_U0, X, Y, ZERO, ZERO), |
376 | gen3_fs_operand(FS_U0, X, Y, ZERO, ZERO), |
377 | gen3_fs_operand(FS_U0, X, Y, ZERO, ZERO), |
377 | gen3_fs_operand(FS_U0, X, Y, ZERO, ZERO), |
378 | gen3_fs_operand_zero()); |
378 | gen3_fs_operand_zero()); |
379 | gen3_fs_rsq(out, MASK_X, gen3_fs_operand(FS_U0, X, X, X, X)); |
379 | gen3_fs_rsq(out, MASK_X, gen3_fs_operand(FS_U0, X, X, X, X)); |
380 | gen3_fs_mad(out, 0, |
380 | gen3_fs_mad(out, 0, |
381 | gen3_fs_operand(FS_U0, X, ZERO, ZERO, ZERO), |
381 | gen3_fs_operand(FS_U0, X, ZERO, ZERO, ZERO), |
382 | gen3_fs_operand(out, X, ZERO, ZERO, ZERO), |
382 | gen3_fs_operand(out, X, ZERO, ZERO, ZERO), |
383 | gen3_fs_operand(c, W, ZERO, ZERO, ZERO)); |
383 | gen3_fs_operand(c, W, ZERO, ZERO, ZERO)); |
384 | break; |
384 | break; |
385 | 385 | ||
386 | case RADIAL_TWO: |
386 | case RADIAL_TWO: |
387 | /* |
387 | /* |
388 | pdx = x - c1x, pdy = y - c1y; |
388 | pdx = x - c1x, pdy = y - c1y; |
389 | A = dx? + dy? - dr? |
389 | A = dx? + dy? - dr? |
390 | B = -2*(pdx*dx + pdy*dy + r1*dr); |
390 | B = -2*(pdx*dx + pdy*dy + r1*dr); |
391 | C = pdx? + pdy? - r1?; |
391 | C = pdx? + pdy? - r1?; |
392 | det = B*B - 4*A*C; |
392 | det = B*B - 4*A*C; |
393 | t = (-B + sqrt (det)) / (2 * A) |
393 | t = (-B + sqrt (det)) / (2 * A) |
394 | */ |
394 | */ |
395 | 395 | ||
396 | /* u0.x = pdx, u0.y = pdy, u[0].z = r1; */ |
396 | /* u0.x = pdx, u0.y = pdy, u[0].z = r1; */ |
397 | gen3_fs_add(FS_U0, |
397 | gen3_fs_add(FS_U0, |
398 | gen3_fs_operand(in, X, Y, ZERO, ZERO), |
398 | gen3_fs_operand(in, X, Y, ZERO, ZERO), |
399 | gen3_fs_operand(c, X, Y, Z, ZERO)); |
399 | gen3_fs_operand(c, X, Y, Z, ZERO)); |
400 | /* u0.x = pdx, u0.y = pdy, u[0].z = r1, u[0].w = B; */ |
400 | /* u0.x = pdx, u0.y = pdy, u[0].z = r1, u[0].w = B; */ |
401 | gen3_fs_dp3(FS_U0, MASK_W, |
401 | gen3_fs_dp3(FS_U0, MASK_W, |
402 | gen3_fs_operand(FS_U0, X, Y, ONE, ZERO), |
402 | gen3_fs_operand(FS_U0, X, Y, ONE, ZERO), |
403 | gen3_fs_operand(c+1, X, Y, Z, ZERO)); |
403 | gen3_fs_operand(c+1, X, Y, Z, ZERO)); |
404 | /* u1.x = pdx? + pdy? - r1?; [C] */ |
404 | /* u1.x = pdx? + pdy? - r1?; [C] */ |
405 | gen3_fs_dp3(FS_U1, MASK_X, |
405 | gen3_fs_dp3(FS_U1, MASK_X, |
406 | gen3_fs_operand(FS_U0, X, Y, Z, ZERO), |
406 | gen3_fs_operand(FS_U0, X, Y, Z, ZERO), |
407 | gen3_fs_operand(FS_U0, X, Y, NEG_Z, ZERO)); |
407 | gen3_fs_operand(FS_U0, X, Y, NEG_Z, ZERO)); |
408 | /* u1.x = C, u1.y = B, u1.z=-4*A; */ |
408 | /* u1.x = C, u1.y = B, u1.z=-4*A; */ |
409 | gen3_fs_mov_masked(FS_U1, MASK_Y, gen3_fs_operand(FS_U0, W, W, W, W)); |
409 | gen3_fs_mov_masked(FS_U1, MASK_Y, gen3_fs_operand(FS_U0, W, W, W, W)); |
410 | gen3_fs_mov_masked(FS_U1, MASK_Z, gen3_fs_operand(c, W, W, W, W)); |
410 | gen3_fs_mov_masked(FS_U1, MASK_Z, gen3_fs_operand(c, W, W, W, W)); |
411 | /* u1.x = B? - 4*A*C */ |
411 | /* u1.x = B? - 4*A*C */ |
412 | gen3_fs_dp2add(FS_U1, MASK_X, |
412 | gen3_fs_dp2add(FS_U1, MASK_X, |
413 | gen3_fs_operand(FS_U1, X, Y, ZERO, ZERO), |
413 | gen3_fs_operand(FS_U1, X, Y, ZERO, ZERO), |
414 | gen3_fs_operand(FS_U1, Z, Y, ZERO, ZERO), |
414 | gen3_fs_operand(FS_U1, Z, Y, ZERO, ZERO), |
415 | gen3_fs_operand_zero()); |
415 | gen3_fs_operand_zero()); |
416 | /* out.x = -B + sqrt (B? - 4*A*C), */ |
416 | /* out.x = -B + sqrt (B? - 4*A*C), */ |
417 | gen3_fs_rsq(out, MASK_X, gen3_fs_operand(FS_U1, X, X, X, X)); |
417 | gen3_fs_rsq(out, MASK_X, gen3_fs_operand(FS_U1, X, X, X, X)); |
418 | gen3_fs_mad(out, MASK_X, |
418 | gen3_fs_mad(out, MASK_X, |
419 | gen3_fs_operand(out, X, ZERO, ZERO, ZERO), |
419 | gen3_fs_operand(out, X, ZERO, ZERO, ZERO), |
420 | gen3_fs_operand(FS_U1, X, ZERO, ZERO, ZERO), |
420 | gen3_fs_operand(FS_U1, X, ZERO, ZERO, ZERO), |
421 | gen3_fs_operand(FS_U0, NEG_W, ZERO, ZERO, ZERO)); |
421 | gen3_fs_operand(FS_U0, NEG_W, ZERO, ZERO, ZERO)); |
422 | /* out.x = (-B + sqrt (B? - 4*A*C)) / (2 * A), */ |
422 | /* out.x = (-B + sqrt (B? - 4*A*C)) / (2 * A), */ |
423 | gen3_fs_mul(out, |
423 | gen3_fs_mul(out, |
424 | gen3_fs_operand(out, X, ZERO, ZERO, ZERO), |
424 | gen3_fs_operand(out, X, ZERO, ZERO, ZERO), |
425 | gen3_fs_operand(c+1, W, ZERO, ZERO, ZERO)); |
425 | gen3_fs_operand(c+1, W, ZERO, ZERO, ZERO)); |
426 | break; |
426 | break; |
427 | } |
427 | } |
428 | } |
428 | } |
429 | 429 | ||
430 | static void |
430 | static void |
431 | gen3_composite_emit_shader(struct sna *sna, |
431 | gen3_composite_emit_shader(struct sna *sna, |
432 | const struct sna_composite_op *op, |
432 | const struct sna_composite_op *op, |
433 | uint8_t blend) |
433 | uint8_t blend) |
434 | { |
434 | { |
435 | bool dst_is_alpha = PIXMAN_FORMAT_RGB(op->dst.format) == 0; |
435 | bool dst_is_alpha = PIXMAN_FORMAT_RGB(op->dst.format) == 0; |
436 | const struct sna_composite_channel *src, *mask; |
436 | const struct sna_composite_channel *src, *mask; |
437 | struct gen3_render_state *state = &sna->render_state.gen3; |
437 | struct gen3_render_state *state = &sna->render_state.gen3; |
438 | uint32_t shader_offset, id; |
438 | uint32_t shader_offset, id; |
439 | int src_reg, mask_reg; |
439 | int src_reg, mask_reg; |
440 | int t, length; |
440 | int t, length; |
441 | 441 | ||
442 | src = &op->src; |
442 | src = &op->src; |
443 | mask = &op->mask; |
443 | mask = &op->mask; |
444 | if (mask->u.gen3.type == SHADER_NONE) |
444 | if (mask->u.gen3.type == SHADER_NONE) |
445 | mask = NULL; |
445 | mask = NULL; |
446 | 446 | ||
447 | id = (src->u.gen3.type | |
447 | id = (src->u.gen3.type | |
448 | src->is_affine << 4 | |
448 | src->is_affine << 4 | |
449 | src->alpha_fixup << 5 | |
449 | src->alpha_fixup << 5 | |
450 | src->rb_reversed << 6); |
450 | src->rb_reversed << 6); |
451 | if (mask) { |
451 | if (mask) { |
452 | id |= (mask->u.gen3.type << 8 | |
452 | id |= (mask->u.gen3.type << 8 | |
453 | mask->is_affine << 12 | |
453 | mask->is_affine << 12 | |
454 | gen3_blend_op[blend].src_alpha << 13 | |
454 | gen3_blend_op[blend].src_alpha << 13 | |
455 | op->has_component_alpha << 14 | |
455 | op->has_component_alpha << 14 | |
456 | mask->alpha_fixup << 15 | |
456 | mask->alpha_fixup << 15 | |
457 | mask->rb_reversed << 16); |
457 | mask->rb_reversed << 16); |
458 | } |
458 | } |
459 | id |= dst_is_alpha << 24; |
459 | id |= dst_is_alpha << 24; |
460 | id |= op->rb_reversed << 25; |
460 | id |= op->rb_reversed << 25; |
461 | 461 | ||
462 | if (id == state->last_shader) |
462 | if (id == state->last_shader) |
463 | return; |
463 | return; |
464 | 464 | ||
465 | state->last_shader = id; |
465 | state->last_shader = id; |
466 | 466 | ||
467 | shader_offset = sna->kgem.nbatch++; |
467 | shader_offset = sna->kgem.nbatch++; |
468 | t = 0; |
468 | t = 0; |
469 | switch (src->u.gen3.type) { |
469 | switch (src->u.gen3.type) { |
470 | case SHADER_NONE: |
470 | case SHADER_NONE: |
471 | case SHADER_OPACITY: |
471 | case SHADER_OPACITY: |
472 | assert(0); |
472 | assert(0); |
473 | case SHADER_ZERO: |
473 | case SHADER_ZERO: |
474 | case SHADER_BLACK: |
474 | case SHADER_BLACK: |
475 | case SHADER_WHITE: |
475 | case SHADER_WHITE: |
476 | break; |
476 | break; |
477 | case SHADER_CONSTANT: |
477 | case SHADER_CONSTANT: |
478 | gen3_fs_dcl(FS_T8); |
478 | gen3_fs_dcl(FS_T8); |
479 | src_reg = FS_T8; |
479 | src_reg = FS_T8; |
480 | break; |
480 | break; |
481 | case SHADER_TEXTURE: |
481 | case SHADER_TEXTURE: |
482 | case SHADER_RADIAL: |
482 | case SHADER_RADIAL: |
483 | case SHADER_LINEAR: |
483 | case SHADER_LINEAR: |
484 | gen3_fs_dcl(FS_S0); |
484 | gen3_fs_dcl(FS_S0); |
485 | gen3_fs_dcl(FS_T0); |
485 | gen3_fs_dcl(FS_T0); |
486 | t++; |
486 | t++; |
487 | break; |
487 | break; |
488 | } |
488 | } |
489 | 489 | ||
490 | if (mask == NULL) { |
490 | if (mask == NULL) { |
491 | switch (src->u.gen3.type) { |
491 | switch (src->u.gen3.type) { |
492 | case SHADER_ZERO: |
492 | case SHADER_ZERO: |
493 | gen3_fs_mov(FS_OC, gen3_fs_operand_zero()); |
493 | gen3_fs_mov(FS_OC, gen3_fs_operand_zero()); |
494 | goto done; |
494 | goto done; |
495 | case SHADER_BLACK: |
495 | case SHADER_BLACK: |
496 | if (dst_is_alpha) |
496 | if (dst_is_alpha) |
497 | gen3_fs_mov(FS_OC, gen3_fs_operand_one()); |
497 | gen3_fs_mov(FS_OC, gen3_fs_operand_one()); |
498 | else |
498 | else |
499 | gen3_fs_mov(FS_OC, gen3_fs_operand(FS_R0, ZERO, ZERO, ZERO, ONE)); |
499 | gen3_fs_mov(FS_OC, gen3_fs_operand(FS_R0, ZERO, ZERO, ZERO, ONE)); |
500 | goto done; |
500 | goto done; |
501 | case SHADER_WHITE: |
501 | case SHADER_WHITE: |
502 | gen3_fs_mov(FS_OC, gen3_fs_operand_one()); |
502 | gen3_fs_mov(FS_OC, gen3_fs_operand_one()); |
503 | goto done; |
503 | goto done; |
504 | } |
504 | } |
505 | if (src->alpha_fixup && dst_is_alpha) { |
505 | if (src->alpha_fixup && dst_is_alpha) { |
506 | gen3_fs_mov(FS_OC, gen3_fs_operand_one()); |
506 | gen3_fs_mov(FS_OC, gen3_fs_operand_one()); |
507 | goto done; |
507 | goto done; |
508 | } |
508 | } |
509 | /* No mask, so load directly to output color */ |
509 | /* No mask, so load directly to output color */ |
510 | if (src->u.gen3.type != SHADER_CONSTANT) { |
510 | if (src->u.gen3.type != SHADER_CONSTANT) { |
511 | if (dst_is_alpha || src->rb_reversed ^ op->rb_reversed) |
511 | if (dst_is_alpha || src->rb_reversed ^ op->rb_reversed) |
512 | src_reg = FS_R0; |
512 | src_reg = FS_R0; |
513 | else |
513 | else |
514 | src_reg = FS_OC; |
514 | src_reg = FS_OC; |
515 | } |
515 | } |
516 | switch (src->u.gen3.type) { |
516 | switch (src->u.gen3.type) { |
517 | case SHADER_LINEAR: |
517 | case SHADER_LINEAR: |
518 | gen3_linear_coord(sna, src, FS_T0, FS_R0); |
518 | gen3_linear_coord(sna, src, FS_T0, FS_R0); |
519 | gen3_fs_texld(src_reg, FS_S0, FS_R0); |
519 | gen3_fs_texld(src_reg, FS_S0, FS_R0); |
520 | break; |
520 | break; |
521 | 521 | ||
522 | case SHADER_RADIAL: |
522 | case SHADER_RADIAL: |
523 | gen3_radial_coord(sna, src, FS_T0, FS_R0); |
523 | gen3_radial_coord(sna, src, FS_T0, FS_R0); |
524 | gen3_fs_texld(src_reg, FS_S0, FS_R0); |
524 | gen3_fs_texld(src_reg, FS_S0, FS_R0); |
525 | break; |
525 | break; |
526 | 526 | ||
527 | case SHADER_TEXTURE: |
527 | case SHADER_TEXTURE: |
528 | if (src->is_affine) |
528 | if (src->is_affine) |
529 | gen3_fs_texld(src_reg, FS_S0, FS_T0); |
529 | gen3_fs_texld(src_reg, FS_S0, FS_T0); |
530 | else |
530 | else |
531 | gen3_fs_texldp(src_reg, FS_S0, FS_T0); |
531 | gen3_fs_texldp(src_reg, FS_S0, FS_T0); |
532 | break; |
532 | break; |
533 | 533 | ||
534 | case SHADER_NONE: |
534 | case SHADER_NONE: |
535 | case SHADER_WHITE: |
535 | case SHADER_WHITE: |
536 | case SHADER_BLACK: |
536 | case SHADER_BLACK: |
537 | case SHADER_ZERO: |
537 | case SHADER_ZERO: |
538 | assert(0); |
538 | assert(0); |
539 | case SHADER_CONSTANT: |
539 | case SHADER_CONSTANT: |
540 | break; |
540 | break; |
541 | } |
541 | } |
542 | 542 | ||
543 | if (src_reg != FS_OC) { |
543 | if (src_reg != FS_OC) { |
544 | if (src->alpha_fixup) |
544 | if (src->alpha_fixup) |
545 | gen3_fs_mov(FS_OC, |
545 | gen3_fs_mov(FS_OC, |
546 | src->rb_reversed ^ op->rb_reversed ? |
546 | src->rb_reversed ^ op->rb_reversed ? |
547 | gen3_fs_operand(src_reg, Z, Y, X, ONE) : |
547 | gen3_fs_operand(src_reg, Z, Y, X, ONE) : |
548 | gen3_fs_operand(src_reg, X, Y, Z, ONE)); |
548 | gen3_fs_operand(src_reg, X, Y, Z, ONE)); |
549 | else if (dst_is_alpha) |
549 | else if (dst_is_alpha) |
550 | gen3_fs_mov(FS_OC, gen3_fs_operand(src_reg, W, W, W, W)); |
550 | gen3_fs_mov(FS_OC, gen3_fs_operand(src_reg, W, W, W, W)); |
551 | else if (src->rb_reversed ^ op->rb_reversed) |
551 | else if (src->rb_reversed ^ op->rb_reversed) |
552 | gen3_fs_mov(FS_OC, gen3_fs_operand(src_reg, Z, Y, X, W)); |
552 | gen3_fs_mov(FS_OC, gen3_fs_operand(src_reg, Z, Y, X, W)); |
553 | else |
553 | else |
554 | gen3_fs_mov(FS_OC, gen3_fs_operand_reg(src_reg)); |
554 | gen3_fs_mov(FS_OC, gen3_fs_operand_reg(src_reg)); |
555 | } else if (src->alpha_fixup) |
555 | } else if (src->alpha_fixup) |
556 | gen3_fs_mov_masked(FS_OC, MASK_W, gen3_fs_operand_one()); |
556 | gen3_fs_mov_masked(FS_OC, MASK_W, gen3_fs_operand_one()); |
557 | } else { |
557 | } else { |
558 | int out_reg = FS_OC; |
558 | int out_reg = FS_OC; |
559 | if (op->rb_reversed) |
559 | if (op->rb_reversed) |
560 | out_reg = FS_U0; |
560 | out_reg = FS_U0; |
561 | 561 | ||
562 | switch (mask->u.gen3.type) { |
562 | switch (mask->u.gen3.type) { |
563 | case SHADER_CONSTANT: |
563 | case SHADER_CONSTANT: |
564 | gen3_fs_dcl(FS_T9); |
564 | gen3_fs_dcl(FS_T9); |
565 | mask_reg = FS_T9; |
565 | mask_reg = FS_T9; |
566 | break; |
566 | break; |
567 | case SHADER_TEXTURE: |
567 | case SHADER_TEXTURE: |
568 | case SHADER_LINEAR: |
568 | case SHADER_LINEAR: |
569 | case SHADER_RADIAL: |
569 | case SHADER_RADIAL: |
570 | gen3_fs_dcl(FS_S0 + t); |
570 | gen3_fs_dcl(FS_S0 + t); |
571 | /* fall through */ |
571 | /* fall through */ |
572 | case SHADER_OPACITY: |
572 | case SHADER_OPACITY: |
573 | gen3_fs_dcl(FS_T0 + t); |
573 | gen3_fs_dcl(FS_T0 + t); |
574 | break; |
574 | break; |
575 | case SHADER_ZERO: |
575 | case SHADER_ZERO: |
576 | case SHADER_BLACK: |
576 | case SHADER_BLACK: |
577 | assert(0); |
577 | assert(0); |
578 | case SHADER_NONE: |
578 | case SHADER_NONE: |
579 | case SHADER_WHITE: |
579 | case SHADER_WHITE: |
580 | break; |
580 | break; |
581 | } |
581 | } |
582 | 582 | ||
583 | t = 0; |
583 | t = 0; |
584 | switch (src->u.gen3.type) { |
584 | switch (src->u.gen3.type) { |
585 | case SHADER_LINEAR: |
585 | case SHADER_LINEAR: |
586 | gen3_linear_coord(sna, src, FS_T0, FS_R0); |
586 | gen3_linear_coord(sna, src, FS_T0, FS_R0); |
587 | gen3_fs_texld(FS_R0, FS_S0, FS_R0); |
587 | gen3_fs_texld(FS_R0, FS_S0, FS_R0); |
588 | src_reg = FS_R0; |
588 | src_reg = FS_R0; |
589 | t++; |
589 | t++; |
590 | break; |
590 | break; |
591 | 591 | ||
592 | case SHADER_RADIAL: |
592 | case SHADER_RADIAL: |
593 | gen3_radial_coord(sna, src, FS_T0, FS_R0); |
593 | gen3_radial_coord(sna, src, FS_T0, FS_R0); |
594 | gen3_fs_texld(FS_R0, FS_S0, FS_R0); |
594 | gen3_fs_texld(FS_R0, FS_S0, FS_R0); |
595 | src_reg = FS_R0; |
595 | src_reg = FS_R0; |
596 | t++; |
596 | t++; |
597 | break; |
597 | break; |
598 | 598 | ||
599 | case SHADER_TEXTURE: |
599 | case SHADER_TEXTURE: |
600 | if (src->is_affine) |
600 | if (src->is_affine) |
601 | gen3_fs_texld(FS_R0, FS_S0, FS_T0); |
601 | gen3_fs_texld(FS_R0, FS_S0, FS_T0); |
602 | else |
602 | else |
603 | gen3_fs_texldp(FS_R0, FS_S0, FS_T0); |
603 | gen3_fs_texldp(FS_R0, FS_S0, FS_T0); |
604 | src_reg = FS_R0; |
604 | src_reg = FS_R0; |
605 | t++; |
605 | t++; |
606 | break; |
606 | break; |
607 | 607 | ||
608 | case SHADER_CONSTANT: |
608 | case SHADER_CONSTANT: |
609 | case SHADER_NONE: |
609 | case SHADER_NONE: |
610 | case SHADER_ZERO: |
610 | case SHADER_ZERO: |
611 | case SHADER_BLACK: |
611 | case SHADER_BLACK: |
612 | case SHADER_WHITE: |
612 | case SHADER_WHITE: |
613 | break; |
613 | break; |
614 | } |
614 | } |
615 | if (src->alpha_fixup) |
615 | if (src->alpha_fixup) |
616 | gen3_fs_mov_masked(src_reg, MASK_W, gen3_fs_operand_one()); |
616 | gen3_fs_mov_masked(src_reg, MASK_W, gen3_fs_operand_one()); |
617 | if (src->rb_reversed) |
617 | if (src->rb_reversed) |
618 | gen3_fs_mov(src_reg, gen3_fs_operand(src_reg, Z, Y, X, W)); |
618 | gen3_fs_mov(src_reg, gen3_fs_operand(src_reg, Z, Y, X, W)); |
619 | 619 | ||
620 | switch (mask->u.gen3.type) { |
620 | switch (mask->u.gen3.type) { |
621 | case SHADER_LINEAR: |
621 | case SHADER_LINEAR: |
622 | gen3_linear_coord(sna, mask, FS_T0 + t, FS_R1); |
622 | gen3_linear_coord(sna, mask, FS_T0 + t, FS_R1); |
623 | gen3_fs_texld(FS_R1, FS_S0 + t, FS_R1); |
623 | gen3_fs_texld(FS_R1, FS_S0 + t, FS_R1); |
624 | mask_reg = FS_R1; |
624 | mask_reg = FS_R1; |
625 | break; |
625 | break; |
626 | 626 | ||
627 | case SHADER_RADIAL: |
627 | case SHADER_RADIAL: |
628 | gen3_radial_coord(sna, mask, FS_T0 + t, FS_R1); |
628 | gen3_radial_coord(sna, mask, FS_T0 + t, FS_R1); |
629 | gen3_fs_texld(FS_R1, FS_S0 + t, FS_R1); |
629 | gen3_fs_texld(FS_R1, FS_S0 + t, FS_R1); |
630 | mask_reg = FS_R1; |
630 | mask_reg = FS_R1; |
631 | break; |
631 | break; |
632 | 632 | ||
633 | case SHADER_TEXTURE: |
633 | case SHADER_TEXTURE: |
634 | if (mask->is_affine) |
634 | if (mask->is_affine) |
635 | gen3_fs_texld(FS_R1, FS_S0 + t, FS_T0 + t); |
635 | gen3_fs_texld(FS_R1, FS_S0 + t, FS_T0 + t); |
636 | else |
636 | else |
637 | gen3_fs_texldp(FS_R1, FS_S0 + t, FS_T0 + t); |
637 | gen3_fs_texldp(FS_R1, FS_S0 + t, FS_T0 + t); |
638 | mask_reg = FS_R1; |
638 | mask_reg = FS_R1; |
639 | break; |
639 | break; |
640 | 640 | ||
641 | case SHADER_OPACITY: |
641 | case SHADER_OPACITY: |
642 | switch (src->u.gen3.type) { |
642 | switch (src->u.gen3.type) { |
643 | case SHADER_BLACK: |
643 | case SHADER_BLACK: |
644 | case SHADER_WHITE: |
644 | case SHADER_WHITE: |
645 | if (dst_is_alpha || src->u.gen3.type == SHADER_WHITE) { |
645 | if (dst_is_alpha || src->u.gen3.type == SHADER_WHITE) { |
646 | gen3_fs_mov(out_reg, |
646 | gen3_fs_mov(out_reg, |
647 | gen3_fs_operand(FS_T0 + t, X, X, X, X)); |
647 | gen3_fs_operand(FS_T0 + t, X, X, X, X)); |
648 | } else { |
648 | } else { |
649 | gen3_fs_mov(out_reg, |
649 | gen3_fs_mov(out_reg, |
650 | gen3_fs_operand(FS_T0 + t, ZERO, ZERO, ZERO, X)); |
650 | gen3_fs_operand(FS_T0 + t, ZERO, ZERO, ZERO, X)); |
651 | } |
651 | } |
652 | break; |
652 | break; |
653 | default: |
653 | default: |
654 | if (dst_is_alpha) { |
654 | if (dst_is_alpha) { |
655 | gen3_fs_mul(out_reg, |
655 | gen3_fs_mul(out_reg, |
656 | gen3_fs_operand(src_reg, W, W, W, W), |
656 | gen3_fs_operand(src_reg, W, W, W, W), |
657 | gen3_fs_operand(FS_T0 + t, X, X, X, X)); |
657 | gen3_fs_operand(FS_T0 + t, X, X, X, X)); |
658 | } else { |
658 | } else { |
659 | gen3_fs_mul(out_reg, |
659 | gen3_fs_mul(out_reg, |
660 | gen3_fs_operand(src_reg, X, Y, Z, W), |
660 | gen3_fs_operand(src_reg, X, Y, Z, W), |
661 | gen3_fs_operand(FS_T0 + t, X, X, X, X)); |
661 | gen3_fs_operand(FS_T0 + t, X, X, X, X)); |
662 | } |
662 | } |
663 | } |
663 | } |
664 | goto mask_done; |
664 | goto mask_done; |
665 | 665 | ||
666 | case SHADER_CONSTANT: |
666 | case SHADER_CONSTANT: |
667 | case SHADER_ZERO: |
667 | case SHADER_ZERO: |
668 | case SHADER_BLACK: |
668 | case SHADER_BLACK: |
669 | case SHADER_WHITE: |
669 | case SHADER_WHITE: |
670 | case SHADER_NONE: |
670 | case SHADER_NONE: |
671 | break; |
671 | break; |
672 | } |
672 | } |
673 | if (mask->alpha_fixup) |
673 | if (mask->alpha_fixup) |
674 | gen3_fs_mov_masked(mask_reg, MASK_W, gen3_fs_operand_one()); |
674 | gen3_fs_mov_masked(mask_reg, MASK_W, gen3_fs_operand_one()); |
675 | if (mask->rb_reversed) |
675 | if (mask->rb_reversed) |
676 | gen3_fs_mov(mask_reg, gen3_fs_operand(mask_reg, Z, Y, X, W)); |
676 | gen3_fs_mov(mask_reg, gen3_fs_operand(mask_reg, Z, Y, X, W)); |
677 | 677 | ||
678 | if (dst_is_alpha) { |
678 | if (dst_is_alpha) { |
679 | switch (src->u.gen3.type) { |
679 | switch (src->u.gen3.type) { |
680 | case SHADER_BLACK: |
680 | case SHADER_BLACK: |
681 | case SHADER_WHITE: |
681 | case SHADER_WHITE: |
682 | gen3_fs_mov(out_reg, |
682 | gen3_fs_mov(out_reg, |
683 | gen3_fs_operand(mask_reg, W, W, W, W)); |
683 | gen3_fs_operand(mask_reg, W, W, W, W)); |
684 | break; |
684 | break; |
685 | default: |
685 | default: |
686 | gen3_fs_mul(out_reg, |
686 | gen3_fs_mul(out_reg, |
687 | gen3_fs_operand(src_reg, W, W, W, W), |
687 | gen3_fs_operand(src_reg, W, W, W, W), |
688 | gen3_fs_operand(mask_reg, W, W, W, W)); |
688 | gen3_fs_operand(mask_reg, W, W, W, W)); |
689 | break; |
689 | break; |
690 | } |
690 | } |
691 | } else { |
691 | } else { |
692 | /* If component alpha is active in the mask and the blend |
692 | /* If component alpha is active in the mask and the blend |
693 | * operation uses the source alpha, then we know we don't |
693 | * operation uses the source alpha, then we know we don't |
694 | * need the source value (otherwise we would have hit a |
694 | * need the source value (otherwise we would have hit a |
695 | * fallback earlier), so we provide the source alpha (src.A * |
695 | * fallback earlier), so we provide the source alpha (src.A * |
696 | * mask.X) as output color. |
696 | * mask.X) as output color. |
697 | * Conversely, if CA is set and we don't need the source alpha, |
697 | * Conversely, if CA is set and we don't need the source alpha, |
698 | * then we produce the source value (src.X * mask.X) and the |
698 | * then we produce the source value (src.X * mask.X) and the |
699 | * source alpha is unused. Otherwise, we provide the non-CA |
699 | * source alpha is unused. Otherwise, we provide the non-CA |
700 | * source value (src.X * mask.A). |
700 | * source value (src.X * mask.A). |
701 | */ |
701 | */ |
702 | if (op->has_component_alpha) { |
702 | if (op->has_component_alpha) { |
703 | switch (src->u.gen3.type) { |
703 | switch (src->u.gen3.type) { |
704 | case SHADER_BLACK: |
704 | case SHADER_BLACK: |
705 | if (gen3_blend_op[blend].src_alpha) |
705 | if (gen3_blend_op[blend].src_alpha) |
706 | gen3_fs_mov(out_reg, |
706 | gen3_fs_mov(out_reg, |
707 | gen3_fs_operand_reg(mask_reg)); |
707 | gen3_fs_operand_reg(mask_reg)); |
708 | else |
708 | else |
709 | gen3_fs_mov(out_reg, |
709 | gen3_fs_mov(out_reg, |
710 | gen3_fs_operand(mask_reg, ZERO, ZERO, ZERO, W)); |
710 | gen3_fs_operand(mask_reg, ZERO, ZERO, ZERO, W)); |
711 | break; |
711 | break; |
712 | case SHADER_WHITE: |
712 | case SHADER_WHITE: |
713 | gen3_fs_mov(out_reg, |
713 | gen3_fs_mov(out_reg, |
714 | gen3_fs_operand_reg(mask_reg)); |
714 | gen3_fs_operand_reg(mask_reg)); |
715 | break; |
715 | break; |
716 | default: |
716 | default: |
717 | if (gen3_blend_op[blend].src_alpha) |
717 | if (gen3_blend_op[blend].src_alpha) |
718 | gen3_fs_mul(out_reg, |
718 | gen3_fs_mul(out_reg, |
719 | gen3_fs_operand(src_reg, W, W, W, W), |
719 | gen3_fs_operand(src_reg, W, W, W, W), |
720 | gen3_fs_operand_reg(mask_reg)); |
720 | gen3_fs_operand_reg(mask_reg)); |
721 | else |
721 | else |
722 | gen3_fs_mul(out_reg, |
722 | gen3_fs_mul(out_reg, |
723 | gen3_fs_operand_reg(src_reg), |
723 | gen3_fs_operand_reg(src_reg), |
724 | gen3_fs_operand_reg(mask_reg)); |
724 | gen3_fs_operand_reg(mask_reg)); |
725 | break; |
725 | break; |
726 | } |
726 | } |
727 | } else { |
727 | } else { |
728 | switch (src->u.gen3.type) { |
728 | switch (src->u.gen3.type) { |
729 | case SHADER_WHITE: |
729 | case SHADER_WHITE: |
730 | gen3_fs_mov(out_reg, |
730 | gen3_fs_mov(out_reg, |
731 | gen3_fs_operand(mask_reg, W, W, W, W)); |
731 | gen3_fs_operand(mask_reg, W, W, W, W)); |
732 | break; |
732 | break; |
733 | case SHADER_BLACK: |
733 | case SHADER_BLACK: |
734 | gen3_fs_mov(out_reg, |
734 | gen3_fs_mov(out_reg, |
735 | gen3_fs_operand(mask_reg, ZERO, ZERO, ZERO, W)); |
735 | gen3_fs_operand(mask_reg, ZERO, ZERO, ZERO, W)); |
736 | break; |
736 | break; |
737 | default: |
737 | default: |
738 | gen3_fs_mul(out_reg, |
738 | gen3_fs_mul(out_reg, |
739 | gen3_fs_operand_reg(src_reg), |
739 | gen3_fs_operand_reg(src_reg), |
740 | gen3_fs_operand(mask_reg, W, W, W, W)); |
740 | gen3_fs_operand(mask_reg, W, W, W, W)); |
741 | break; |
741 | break; |
742 | } |
742 | } |
743 | } |
743 | } |
744 | } |
744 | } |
745 | mask_done: |
745 | mask_done: |
746 | if (op->rb_reversed) |
746 | if (op->rb_reversed) |
747 | gen3_fs_mov(FS_OC, gen3_fs_operand(FS_U0, Z, Y, X, W)); |
747 | gen3_fs_mov(FS_OC, gen3_fs_operand(FS_U0, Z, Y, X, W)); |
748 | } |
748 | } |
749 | 749 | ||
750 | done: |
750 | done: |
751 | length = sna->kgem.nbatch - shader_offset; |
751 | length = sna->kgem.nbatch - shader_offset; |
752 | sna->kgem.batch[shader_offset] = |
752 | sna->kgem.batch[shader_offset] = |
753 | _3DSTATE_PIXEL_SHADER_PROGRAM | (length - 2); |
753 | _3DSTATE_PIXEL_SHADER_PROGRAM | (length - 2); |
754 | } |
754 | } |
755 | 755 | ||
756 | static uint32_t gen3_ms_tiling(uint32_t tiling) |
756 | static uint32_t gen3_ms_tiling(uint32_t tiling) |
757 | { |
757 | { |
758 | uint32_t v = 0; |
758 | uint32_t v = 0; |
759 | switch (tiling) { |
759 | switch (tiling) { |
760 | case I915_TILING_Y: v |= MS3_TILE_WALK; |
760 | case I915_TILING_Y: v |= MS3_TILE_WALK; |
761 | case I915_TILING_X: v |= MS3_TILED_SURFACE; |
761 | case I915_TILING_X: v |= MS3_TILED_SURFACE; |
762 | case I915_TILING_NONE: break; |
762 | case I915_TILING_NONE: break; |
763 | } |
763 | } |
764 | return v; |
764 | return v; |
765 | } |
765 | } |
766 | 766 | ||
767 | static void gen3_emit_invariant(struct sna *sna) |
767 | static void gen3_emit_invariant(struct sna *sna) |
768 | { |
768 | { |
769 | /* Disable independent alpha blend */ |
769 | /* Disable independent alpha blend */ |
770 | OUT_BATCH(_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD | IAB_MODIFY_ENABLE | |
770 | OUT_BATCH(_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD | IAB_MODIFY_ENABLE | |
771 | IAB_MODIFY_FUNC | BLENDFUNC_ADD << IAB_FUNC_SHIFT | |
771 | IAB_MODIFY_FUNC | BLENDFUNC_ADD << IAB_FUNC_SHIFT | |
772 | IAB_MODIFY_SRC_FACTOR | BLENDFACT_ONE << IAB_SRC_FACTOR_SHIFT | |
772 | IAB_MODIFY_SRC_FACTOR | BLENDFACT_ONE << IAB_SRC_FACTOR_SHIFT | |
773 | IAB_MODIFY_DST_FACTOR | BLENDFACT_ZERO << IAB_DST_FACTOR_SHIFT); |
773 | IAB_MODIFY_DST_FACTOR | BLENDFACT_ZERO << IAB_DST_FACTOR_SHIFT); |
774 | 774 | ||
775 | OUT_BATCH(_3DSTATE_COORD_SET_BINDINGS | |
775 | OUT_BATCH(_3DSTATE_COORD_SET_BINDINGS | |
776 | CSB_TCB(0, 0) | |
776 | CSB_TCB(0, 0) | |
777 | CSB_TCB(1, 1) | |
777 | CSB_TCB(1, 1) | |
778 | CSB_TCB(2, 2) | |
778 | CSB_TCB(2, 2) | |
779 | CSB_TCB(3, 3) | |
779 | CSB_TCB(3, 3) | |
780 | CSB_TCB(4, 4) | |
780 | CSB_TCB(4, 4) | |
781 | CSB_TCB(5, 5) | |
781 | CSB_TCB(5, 5) | |
782 | CSB_TCB(6, 6) | |
782 | CSB_TCB(6, 6) | |
783 | CSB_TCB(7, 7)); |
783 | CSB_TCB(7, 7)); |
784 | 784 | ||
785 | OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(3) | I1_LOAD_S(4) | I1_LOAD_S(5) | I1_LOAD_S(6) | 3); |
785 | OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(3) | I1_LOAD_S(4) | I1_LOAD_S(5) | I1_LOAD_S(6) | 3); |
786 | OUT_BATCH(0); /* Disable texture coordinate wrap-shortest */ |
786 | OUT_BATCH(0); /* Disable texture coordinate wrap-shortest */ |
787 | OUT_BATCH((1 << S4_POINT_WIDTH_SHIFT) | |
787 | OUT_BATCH((1 << S4_POINT_WIDTH_SHIFT) | |
788 | S4_LINE_WIDTH_ONE | |
788 | S4_LINE_WIDTH_ONE | |
789 | S4_CULLMODE_NONE | |
789 | S4_CULLMODE_NONE | |
790 | S4_VFMT_XY); |
790 | S4_VFMT_XY); |
791 | OUT_BATCH(0); /* Disable fog/stencil. *Enable* write mask. */ |
791 | OUT_BATCH(0); /* Disable fog/stencil. *Enable* write mask. */ |
792 | OUT_BATCH(S6_COLOR_WRITE_ONLY); /* Disable blending, depth */ |
792 | OUT_BATCH(S6_COLOR_WRITE_ONLY); /* Disable blending, depth */ |
793 | 793 | ||
794 | OUT_BATCH(_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT); |
794 | OUT_BATCH(_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT); |
795 | OUT_BATCH(_3DSTATE_DEPTH_SUBRECT_DISABLE); |
795 | OUT_BATCH(_3DSTATE_DEPTH_SUBRECT_DISABLE); |
796 | 796 | ||
797 | OUT_BATCH(_3DSTATE_LOAD_INDIRECT); |
797 | OUT_BATCH(_3DSTATE_LOAD_INDIRECT); |
798 | OUT_BATCH(0x00000000); |
798 | OUT_BATCH(0x00000000); |
799 | 799 | ||
800 | OUT_BATCH(_3DSTATE_STIPPLE); |
800 | OUT_BATCH(_3DSTATE_STIPPLE); |
801 | OUT_BATCH(0x00000000); |
801 | OUT_BATCH(0x00000000); |
802 | 802 | ||
803 | sna->render_state.gen3.need_invariant = false; |
803 | sna->render_state.gen3.need_invariant = false; |
804 | } |
804 | } |
805 | 805 | ||
806 | #define MAX_OBJECTS 3 /* worst case: dst + src + mask */ |
806 | #define MAX_OBJECTS 3 /* worst case: dst + src + mask */ |
807 | 807 | ||
808 | static void |
808 | static void |
809 | gen3_get_batch(struct sna *sna, const struct sna_composite_op *op) |
809 | gen3_get_batch(struct sna *sna, const struct sna_composite_op *op) |
810 | { |
810 | { |
811 | kgem_set_mode(&sna->kgem, KGEM_RENDER, op->dst.bo); |
811 | kgem_set_mode(&sna->kgem, KGEM_RENDER, op->dst.bo); |
812 | 812 | ||
813 | if (!kgem_check_batch(&sna->kgem, 200)) { |
813 | if (!kgem_check_batch(&sna->kgem, 200)) { |
814 | DBG(("%s: flushing batch: size %d > %d\n", |
814 | DBG(("%s: flushing batch: size %d > %d\n", |
815 | __FUNCTION__, 200, |
815 | __FUNCTION__, 200, |
816 | sna->kgem.surface-sna->kgem.nbatch)); |
816 | sna->kgem.surface-sna->kgem.nbatch)); |
817 | kgem_submit(&sna->kgem); |
817 | kgem_submit(&sna->kgem); |
818 | _kgem_set_mode(&sna->kgem, KGEM_RENDER); |
818 | _kgem_set_mode(&sna->kgem, KGEM_RENDER); |
819 | } |
819 | } |
820 | 820 | ||
821 | if (!kgem_check_reloc(&sna->kgem, MAX_OBJECTS)) { |
821 | if (!kgem_check_reloc(&sna->kgem, MAX_OBJECTS)) { |
822 | DBG(("%s: flushing batch: reloc %d >= %d\n", |
822 | DBG(("%s: flushing batch: reloc %d >= %d\n", |
823 | __FUNCTION__, |
823 | __FUNCTION__, |
824 | sna->kgem.nreloc, |
824 | sna->kgem.nreloc, |
825 | (int)KGEM_RELOC_SIZE(&sna->kgem) - MAX_OBJECTS)); |
825 | (int)KGEM_RELOC_SIZE(&sna->kgem) - MAX_OBJECTS)); |
826 | kgem_submit(&sna->kgem); |
826 | kgem_submit(&sna->kgem); |
827 | _kgem_set_mode(&sna->kgem, KGEM_RENDER); |
827 | _kgem_set_mode(&sna->kgem, KGEM_RENDER); |
828 | } |
828 | } |
829 | 829 | ||
830 | if (!kgem_check_exec(&sna->kgem, MAX_OBJECTS)) { |
830 | if (!kgem_check_exec(&sna->kgem, MAX_OBJECTS)) { |
831 | DBG(("%s: flushing batch: exec %d >= %d\n", |
831 | DBG(("%s: flushing batch: exec %d >= %d\n", |
832 | __FUNCTION__, |
832 | __FUNCTION__, |
833 | sna->kgem.nexec, |
833 | sna->kgem.nexec, |
834 | (int)KGEM_EXEC_SIZE(&sna->kgem) - MAX_OBJECTS - 1)); |
834 | (int)KGEM_EXEC_SIZE(&sna->kgem) - MAX_OBJECTS - 1)); |
835 | kgem_submit(&sna->kgem); |
835 | kgem_submit(&sna->kgem); |
836 | _kgem_set_mode(&sna->kgem, KGEM_RENDER); |
836 | _kgem_set_mode(&sna->kgem, KGEM_RENDER); |
837 | } |
837 | } |
838 | 838 | ||
839 | if (sna->render_state.gen3.need_invariant) |
839 | if (sna->render_state.gen3.need_invariant) |
840 | gen3_emit_invariant(sna); |
840 | gen3_emit_invariant(sna); |
841 | #undef MAX_OBJECTS |
841 | #undef MAX_OBJECTS |
842 | } |
842 | } |
843 | 843 | ||
844 | static void gen3_emit_target(struct sna *sna, |
844 | static void gen3_emit_target(struct sna *sna, |
845 | struct kgem_bo *bo, |
845 | struct kgem_bo *bo, |
846 | int width, |
846 | int width, |
847 | int height, |
847 | int height, |
848 | int format) |
848 | int format) |
849 | { |
849 | { |
850 | struct gen3_render_state *state = &sna->render_state.gen3; |
850 | struct gen3_render_state *state = &sna->render_state.gen3; |
851 | 851 | ||
852 | assert(!too_large(width, height)); |
852 | assert(!too_large(width, height)); |
853 | 853 | ||
854 | /* BUF_INFO is an implicit flush, so skip if the target is unchanged. */ |
854 | /* BUF_INFO is an implicit flush, so skip if the target is unchanged. */ |
855 | assert(bo->unique_id != 0); |
855 | assert(bo->unique_id != 0); |
856 | if (bo->unique_id != state->current_dst) { |
856 | if (bo->unique_id != state->current_dst) { |
857 | uint32_t v; |
857 | uint32_t v; |
858 | 858 | ||
859 | DBG(("%s: setting new target id=%d, handle=%d\n", |
859 | DBG(("%s: setting new target id=%d, handle=%d\n", |
860 | __FUNCTION__, bo->unique_id, bo->handle)); |
860 | __FUNCTION__, bo->unique_id, bo->handle)); |
861 | 861 | ||
862 | OUT_BATCH(_3DSTATE_BUF_INFO_CMD); |
862 | OUT_BATCH(_3DSTATE_BUF_INFO_CMD); |
863 | OUT_BATCH(BUF_3D_ID_COLOR_BACK | |
863 | OUT_BATCH(BUF_3D_ID_COLOR_BACK | |
864 | gen3_buf_tiling(bo->tiling) | |
864 | gen3_buf_tiling(bo->tiling) | |
865 | bo->pitch); |
865 | bo->pitch); |
866 | OUT_BATCH(kgem_add_reloc(&sna->kgem, sna->kgem.nbatch, |
866 | OUT_BATCH(kgem_add_reloc(&sna->kgem, sna->kgem.nbatch, |
867 | bo, |
867 | bo, |
868 | I915_GEM_DOMAIN_RENDER << 16 | |
868 | I915_GEM_DOMAIN_RENDER << 16 | |
869 | I915_GEM_DOMAIN_RENDER, |
869 | I915_GEM_DOMAIN_RENDER, |
870 | 0)); |
870 | 0)); |
871 | 871 | ||
872 | OUT_BATCH(_3DSTATE_DST_BUF_VARS_CMD); |
872 | OUT_BATCH(_3DSTATE_DST_BUF_VARS_CMD); |
873 | OUT_BATCH(gen3_get_dst_format(format)); |
873 | OUT_BATCH(gen3_get_dst_format(format)); |
874 | 874 | ||
875 | v = DRAW_YMAX(height - 1) | DRAW_XMAX(width - 1); |
875 | v = DRAW_YMAX(height - 1) | DRAW_XMAX(width - 1); |
876 | if (v != state->last_drawrect_limit) { |
876 | if (v != state->last_drawrect_limit) { |
877 | OUT_BATCH(_3DSTATE_DRAW_RECT_CMD); |
877 | OUT_BATCH(_3DSTATE_DRAW_RECT_CMD); |
878 | OUT_BATCH(0); /* XXX dither origin? */ |
878 | OUT_BATCH(0); /* XXX dither origin? */ |
879 | OUT_BATCH(0); |
879 | OUT_BATCH(0); |
880 | OUT_BATCH(v); |
880 | OUT_BATCH(v); |
881 | OUT_BATCH(0); |
881 | OUT_BATCH(0); |
882 | state->last_drawrect_limit = v; |
882 | state->last_drawrect_limit = v; |
883 | } |
883 | } |
884 | 884 | ||
885 | state->current_dst = bo->unique_id; |
885 | state->current_dst = bo->unique_id; |
886 | } |
886 | } |
887 | kgem_bo_mark_dirty(bo); |
887 | kgem_bo_mark_dirty(bo); |
888 | } |
888 | } |
889 | 889 | ||
890 | static void gen3_emit_composite_state(struct sna *sna, |
890 | static void gen3_emit_composite_state(struct sna *sna, |
891 | const struct sna_composite_op *op) |
891 | const struct sna_composite_op *op) |
892 | { |
892 | { |
893 | struct gen3_render_state *state = &sna->render_state.gen3; |
893 | struct gen3_render_state *state = &sna->render_state.gen3; |
894 | uint32_t map[4]; |
894 | uint32_t map[4]; |
895 | uint32_t sampler[4]; |
895 | uint32_t sampler[4]; |
896 | struct kgem_bo *bo[2]; |
896 | struct kgem_bo *bo[2]; |
897 | unsigned int tex_count, n; |
897 | unsigned int tex_count, n; |
898 | uint32_t ss2; |
898 | uint32_t ss2; |
899 | 899 | ||
900 | gen3_get_batch(sna, op); |
900 | gen3_get_batch(sna, op); |
901 | 901 | ||
902 | if (kgem_bo_is_dirty(op->src.bo) || kgem_bo_is_dirty(op->mask.bo)) { |
902 | if (kgem_bo_is_dirty(op->src.bo) || kgem_bo_is_dirty(op->mask.bo)) { |
903 | if (op->src.bo == op->dst.bo || op->mask.bo == op->dst.bo) |
903 | if (op->src.bo == op->dst.bo || op->mask.bo == op->dst.bo) |
904 | OUT_BATCH(MI_FLUSH | MI_INVALIDATE_MAP_CACHE); |
904 | OUT_BATCH(MI_FLUSH | MI_INVALIDATE_MAP_CACHE); |
905 | else |
905 | else |
906 | OUT_BATCH(_3DSTATE_MODES_5_CMD | |
906 | OUT_BATCH(_3DSTATE_MODES_5_CMD | |
907 | PIPELINE_FLUSH_RENDER_CACHE | |
907 | PIPELINE_FLUSH_RENDER_CACHE | |
908 | PIPELINE_FLUSH_TEXTURE_CACHE); |
908 | PIPELINE_FLUSH_TEXTURE_CACHE); |
909 | kgem_clear_dirty(&sna->kgem); |
909 | kgem_clear_dirty(&sna->kgem); |
910 | } |
910 | } |
911 | 911 | ||
912 | gen3_emit_target(sna, |
912 | gen3_emit_target(sna, |
913 | op->dst.bo, |
913 | op->dst.bo, |
914 | op->dst.width, |
914 | op->dst.width, |
915 | op->dst.height, |
915 | op->dst.height, |
916 | op->dst.format); |
916 | op->dst.format); |
917 | 917 | ||
918 | ss2 = ~0; |
918 | ss2 = ~0; |
919 | tex_count = 0; |
919 | tex_count = 0; |
920 | switch (op->src.u.gen3.type) { |
920 | switch (op->src.u.gen3.type) { |
921 | case SHADER_OPACITY: |
921 | case SHADER_OPACITY: |
922 | case SHADER_NONE: |
922 | case SHADER_NONE: |
923 | assert(0); |
923 | assert(0); |
924 | case SHADER_ZERO: |
924 | case SHADER_ZERO: |
925 | case SHADER_BLACK: |
925 | case SHADER_BLACK: |
926 | case SHADER_WHITE: |
926 | case SHADER_WHITE: |
927 | break; |
927 | break; |
928 | case SHADER_CONSTANT: |
928 | case SHADER_CONSTANT: |
929 | if (op->src.u.gen3.mode != state->last_diffuse) { |
929 | if (op->src.u.gen3.mode != state->last_diffuse) { |
930 | OUT_BATCH(_3DSTATE_DFLT_DIFFUSE_CMD); |
930 | OUT_BATCH(_3DSTATE_DFLT_DIFFUSE_CMD); |
931 | OUT_BATCH(op->src.u.gen3.mode); |
931 | OUT_BATCH(op->src.u.gen3.mode); |
932 | state->last_diffuse = op->src.u.gen3.mode; |
932 | state->last_diffuse = op->src.u.gen3.mode; |
933 | } |
933 | } |
934 | break; |
934 | break; |
935 | case SHADER_LINEAR: |
935 | case SHADER_LINEAR: |
936 | case SHADER_RADIAL: |
936 | case SHADER_RADIAL: |
937 | case SHADER_TEXTURE: |
937 | case SHADER_TEXTURE: |
938 | ss2 &= ~S2_TEXCOORD_FMT(tex_count, TEXCOORDFMT_NOT_PRESENT); |
938 | ss2 &= ~S2_TEXCOORD_FMT(tex_count, TEXCOORDFMT_NOT_PRESENT); |
939 | ss2 |= S2_TEXCOORD_FMT(tex_count, |
939 | ss2 |= S2_TEXCOORD_FMT(tex_count, |
940 | op->src.is_affine ? TEXCOORDFMT_2D : TEXCOORDFMT_4D); |
940 | op->src.is_affine ? TEXCOORDFMT_2D : TEXCOORDFMT_4D); |
941 | map[tex_count * 2 + 0] = |
941 | map[tex_count * 2 + 0] = |
942 | op->src.card_format | |
942 | op->src.card_format | |
943 | gen3_ms_tiling(op->src.bo->tiling) | |
943 | gen3_ms_tiling(op->src.bo->tiling) | |
944 | (op->src.height - 1) << MS3_HEIGHT_SHIFT | |
944 | (op->src.height - 1) << MS3_HEIGHT_SHIFT | |
945 | (op->src.width - 1) << MS3_WIDTH_SHIFT; |
945 | (op->src.width - 1) << MS3_WIDTH_SHIFT; |
946 | map[tex_count * 2 + 1] = |
946 | map[tex_count * 2 + 1] = |
947 | (op->src.bo->pitch / 4 - 1) << MS4_PITCH_SHIFT; |
947 | (op->src.bo->pitch / 4 - 1) << MS4_PITCH_SHIFT; |
948 | 948 | ||
949 | sampler[tex_count * 2 + 0] = op->src.filter; |
949 | sampler[tex_count * 2 + 0] = op->src.filter; |
950 | sampler[tex_count * 2 + 1] = |
950 | sampler[tex_count * 2 + 1] = |
951 | op->src.repeat | |
951 | op->src.repeat | |
952 | tex_count << SS3_TEXTUREMAP_INDEX_SHIFT; |
952 | tex_count << SS3_TEXTUREMAP_INDEX_SHIFT; |
953 | bo[tex_count] = op->src.bo; |
953 | bo[tex_count] = op->src.bo; |
954 | tex_count++; |
954 | tex_count++; |
955 | break; |
955 | break; |
956 | } |
956 | } |
957 | switch (op->mask.u.gen3.type) { |
957 | switch (op->mask.u.gen3.type) { |
958 | case SHADER_NONE: |
958 | case SHADER_NONE: |
959 | case SHADER_ZERO: |
959 | case SHADER_ZERO: |
960 | case SHADER_BLACK: |
960 | case SHADER_BLACK: |
961 | case SHADER_WHITE: |
961 | case SHADER_WHITE: |
962 | break; |
962 | break; |
963 | case SHADER_CONSTANT: |
963 | case SHADER_CONSTANT: |
964 | if (op->mask.u.gen3.mode != state->last_specular) { |
964 | if (op->mask.u.gen3.mode != state->last_specular) { |
965 | OUT_BATCH(_3DSTATE_DFLT_SPEC_CMD); |
965 | OUT_BATCH(_3DSTATE_DFLT_SPEC_CMD); |
966 | OUT_BATCH(op->mask.u.gen3.mode); |
966 | OUT_BATCH(op->mask.u.gen3.mode); |
967 | state->last_specular = op->mask.u.gen3.mode; |
967 | state->last_specular = op->mask.u.gen3.mode; |
968 | } |
968 | } |
969 | break; |
969 | break; |
970 | case SHADER_LINEAR: |
970 | case SHADER_LINEAR: |
971 | case SHADER_RADIAL: |
971 | case SHADER_RADIAL: |
972 | case SHADER_TEXTURE: |
972 | case SHADER_TEXTURE: |
973 | ss2 &= ~S2_TEXCOORD_FMT(tex_count, TEXCOORDFMT_NOT_PRESENT); |
973 | ss2 &= ~S2_TEXCOORD_FMT(tex_count, TEXCOORDFMT_NOT_PRESENT); |
974 | ss2 |= S2_TEXCOORD_FMT(tex_count, |
974 | ss2 |= S2_TEXCOORD_FMT(tex_count, |
975 | op->mask.is_affine ? TEXCOORDFMT_2D : TEXCOORDFMT_4D); |
975 | op->mask.is_affine ? TEXCOORDFMT_2D : TEXCOORDFMT_4D); |
976 | map[tex_count * 2 + 0] = |
976 | map[tex_count * 2 + 0] = |
977 | op->mask.card_format | |
977 | op->mask.card_format | |
978 | gen3_ms_tiling(op->mask.bo->tiling) | |
978 | gen3_ms_tiling(op->mask.bo->tiling) | |
979 | (op->mask.height - 1) << MS3_HEIGHT_SHIFT | |
979 | (op->mask.height - 1) << MS3_HEIGHT_SHIFT | |
980 | (op->mask.width - 1) << MS3_WIDTH_SHIFT; |
980 | (op->mask.width - 1) << MS3_WIDTH_SHIFT; |
981 | map[tex_count * 2 + 1] = |
981 | map[tex_count * 2 + 1] = |
982 | (op->mask.bo->pitch / 4 - 1) << MS4_PITCH_SHIFT; |
982 | (op->mask.bo->pitch / 4 - 1) << MS4_PITCH_SHIFT; |
983 | 983 | ||
984 | sampler[tex_count * 2 + 0] = op->mask.filter; |
984 | sampler[tex_count * 2 + 0] = op->mask.filter; |
985 | sampler[tex_count * 2 + 1] = |
985 | sampler[tex_count * 2 + 1] = |
986 | op->mask.repeat | |
986 | op->mask.repeat | |
987 | tex_count << SS3_TEXTUREMAP_INDEX_SHIFT; |
987 | tex_count << SS3_TEXTUREMAP_INDEX_SHIFT; |
988 | bo[tex_count] = op->mask.bo; |
988 | bo[tex_count] = op->mask.bo; |
989 | tex_count++; |
989 | tex_count++; |
990 | break; |
990 | break; |
991 | case SHADER_OPACITY: |
991 | case SHADER_OPACITY: |
992 | ss2 &= ~S2_TEXCOORD_FMT(tex_count, TEXCOORDFMT_NOT_PRESENT); |
992 | ss2 &= ~S2_TEXCOORD_FMT(tex_count, TEXCOORDFMT_NOT_PRESENT); |
993 | ss2 |= S2_TEXCOORD_FMT(tex_count, TEXCOORDFMT_1D); |
993 | ss2 |= S2_TEXCOORD_FMT(tex_count, TEXCOORDFMT_1D); |
994 | break; |
994 | break; |
995 | } |
995 | } |
996 | 996 | ||
997 | { |
997 | { |
998 | uint32_t blend_offset = sna->kgem.nbatch; |
998 | uint32_t blend_offset = sna->kgem.nbatch; |
999 | 999 | ||
1000 | OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(2) | I1_LOAD_S(6) | 1); |
1000 | OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(2) | I1_LOAD_S(6) | 1); |
1001 | OUT_BATCH(ss2); |
1001 | OUT_BATCH(ss2); |
1002 | OUT_BATCH(gen3_get_blend_cntl(op->op, |
1002 | OUT_BATCH(gen3_get_blend_cntl(op->op, |
1003 | op->has_component_alpha, |
1003 | op->has_component_alpha, |
1004 | op->dst.format)); |
1004 | op->dst.format)); |
1005 | 1005 | ||
1006 | if (memcmp(sna->kgem.batch + state->last_blend + 1, |
1006 | if (memcmp(sna->kgem.batch + state->last_blend + 1, |
1007 | sna->kgem.batch + blend_offset + 1, |
1007 | sna->kgem.batch + blend_offset + 1, |
1008 | 2 * 4) == 0) |
1008 | 2 * 4) == 0) |
1009 | sna->kgem.nbatch = blend_offset; |
1009 | sna->kgem.nbatch = blend_offset; |
1010 | else |
1010 | else |
1011 | state->last_blend = blend_offset; |
1011 | state->last_blend = blend_offset; |
1012 | } |
1012 | } |
1013 | 1013 | ||
1014 | if (op->u.gen3.num_constants) { |
1014 | if (op->u.gen3.num_constants) { |
1015 | int count = op->u.gen3.num_constants; |
1015 | int count = op->u.gen3.num_constants; |
1016 | if (state->last_constants) { |
1016 | if (state->last_constants) { |
1017 | int last = sna->kgem.batch[state->last_constants+1]; |
1017 | int last = sna->kgem.batch[state->last_constants+1]; |
1018 | if (last == (1 << (count >> 2)) - 1 && |
1018 | if (last == (1 << (count >> 2)) - 1 && |
1019 | memcmp(&sna->kgem.batch[state->last_constants+2], |
1019 | memcmp(&sna->kgem.batch[state->last_constants+2], |
1020 | op->u.gen3.constants, |
1020 | op->u.gen3.constants, |
1021 | count * sizeof(uint32_t)) == 0) |
1021 | count * sizeof(uint32_t)) == 0) |
1022 | count = 0; |
1022 | count = 0; |
1023 | } |
1023 | } |
1024 | if (count) { |
1024 | if (count) { |
1025 | state->last_constants = sna->kgem.nbatch; |
1025 | state->last_constants = sna->kgem.nbatch; |
1026 | OUT_BATCH(_3DSTATE_PIXEL_SHADER_CONSTANTS | count); |
1026 | OUT_BATCH(_3DSTATE_PIXEL_SHADER_CONSTANTS | count); |
1027 | OUT_BATCH((1 << (count >> 2)) - 1); |
1027 | OUT_BATCH((1 << (count >> 2)) - 1); |
1028 | 1028 | ||
1029 | memcpy(sna->kgem.batch + sna->kgem.nbatch, |
1029 | memcpy(sna->kgem.batch + sna->kgem.nbatch, |
1030 | op->u.gen3.constants, |
1030 | op->u.gen3.constants, |
1031 | count * sizeof(uint32_t)); |
1031 | count * sizeof(uint32_t)); |
1032 | sna->kgem.nbatch += count; |
1032 | sna->kgem.nbatch += count; |
1033 | } |
1033 | } |
1034 | } |
1034 | } |
1035 | 1035 | ||
1036 | if (tex_count != 0) { |
1036 | if (tex_count != 0) { |
1037 | uint32_t rewind; |
1037 | uint32_t rewind; |
1038 | 1038 | ||
1039 | n = 0; |
1039 | n = 0; |
1040 | if (tex_count == state->tex_count) { |
1040 | if (tex_count == state->tex_count) { |
1041 | for (; n < tex_count; n++) { |
1041 | for (; n < tex_count; n++) { |
1042 | if (map[2*n+0] != state->tex_map[2*n+0] || |
1042 | if (map[2*n+0] != state->tex_map[2*n+0] || |
1043 | map[2*n+1] != state->tex_map[2*n+1] || |
1043 | map[2*n+1] != state->tex_map[2*n+1] || |
1044 | state->tex_handle[n] != bo[n]->handle || |
1044 | state->tex_handle[n] != bo[n]->handle || |
1045 | state->tex_delta[n] != bo[n]->delta) |
1045 | state->tex_delta[n] != bo[n]->delta) |
1046 | break; |
1046 | break; |
1047 | } |
1047 | } |
1048 | } |
1048 | } |
1049 | if (n < tex_count) { |
1049 | if (n < tex_count) { |
1050 | OUT_BATCH(_3DSTATE_MAP_STATE | (3 * tex_count)); |
1050 | OUT_BATCH(_3DSTATE_MAP_STATE | (3 * tex_count)); |
1051 | OUT_BATCH((1 << tex_count) - 1); |
1051 | OUT_BATCH((1 << tex_count) - 1); |
1052 | for (n = 0; n < tex_count; n++) { |
1052 | for (n = 0; n < tex_count; n++) { |
1053 | OUT_BATCH(kgem_add_reloc(&sna->kgem, |
1053 | OUT_BATCH(kgem_add_reloc(&sna->kgem, |
1054 | sna->kgem.nbatch, |
1054 | sna->kgem.nbatch, |
1055 | bo[n], |
1055 | bo[n], |
1056 | I915_GEM_DOMAIN_SAMPLER<< 16, |
1056 | I915_GEM_DOMAIN_SAMPLER<< 16, |
1057 | 0)); |
1057 | 0)); |
1058 | OUT_BATCH(map[2*n + 0]); |
1058 | OUT_BATCH(map[2*n + 0]); |
1059 | OUT_BATCH(map[2*n + 1]); |
1059 | OUT_BATCH(map[2*n + 1]); |
1060 | 1060 | ||
1061 | state->tex_map[2*n+0] = map[2*n+0]; |
1061 | state->tex_map[2*n+0] = map[2*n+0]; |
1062 | state->tex_map[2*n+1] = map[2*n+1]; |
1062 | state->tex_map[2*n+1] = map[2*n+1]; |
1063 | state->tex_handle[n] = bo[n]->handle; |
1063 | state->tex_handle[n] = bo[n]->handle; |
1064 | state->tex_delta[n] = bo[n]->delta; |
1064 | state->tex_delta[n] = bo[n]->delta; |
1065 | } |
1065 | } |
1066 | state->tex_count = n; |
1066 | state->tex_count = n; |
1067 | } |
1067 | } |
1068 | 1068 | ||
1069 | rewind = sna->kgem.nbatch; |
1069 | rewind = sna->kgem.nbatch; |
1070 | OUT_BATCH(_3DSTATE_SAMPLER_STATE | (3 * tex_count)); |
1070 | OUT_BATCH(_3DSTATE_SAMPLER_STATE | (3 * tex_count)); |
1071 | OUT_BATCH((1 << tex_count) - 1); |
1071 | OUT_BATCH((1 << tex_count) - 1); |
1072 | for (n = 0; n < tex_count; n++) { |
1072 | for (n = 0; n < tex_count; n++) { |
1073 | OUT_BATCH(sampler[2*n + 0]); |
1073 | OUT_BATCH(sampler[2*n + 0]); |
1074 | OUT_BATCH(sampler[2*n + 1]); |
1074 | OUT_BATCH(sampler[2*n + 1]); |
1075 | OUT_BATCH(0); |
1075 | OUT_BATCH(0); |
1076 | } |
1076 | } |
1077 | if (state->last_sampler && |
1077 | if (state->last_sampler && |
1078 | memcmp(&sna->kgem.batch[state->last_sampler+1], |
1078 | memcmp(&sna->kgem.batch[state->last_sampler+1], |
1079 | &sna->kgem.batch[rewind + 1], |
1079 | &sna->kgem.batch[rewind + 1], |
1080 | (3*tex_count + 1)*sizeof(uint32_t)) == 0) |
1080 | (3*tex_count + 1)*sizeof(uint32_t)) == 0) |
1081 | sna->kgem.nbatch = rewind; |
1081 | sna->kgem.nbatch = rewind; |
1082 | else |
1082 | else |
1083 | state->last_sampler = rewind; |
1083 | state->last_sampler = rewind; |
1084 | } |
1084 | } |
1085 | 1085 | ||
1086 | gen3_composite_emit_shader(sna, op, op->op); |
1086 | gen3_composite_emit_shader(sna, op, op->op); |
1087 | } |
1087 | } |
1088 | 1088 | ||
1089 | static bool gen3_magic_ca_pass(struct sna *sna, |
1089 | static bool gen3_magic_ca_pass(struct sna *sna, |
1090 | const struct sna_composite_op *op) |
1090 | const struct sna_composite_op *op) |
1091 | { |
1091 | { |
1092 | if (!op->need_magic_ca_pass) |
1092 | if (!op->need_magic_ca_pass) |
1093 | return false; |
1093 | return false; |
1094 | 1094 | ||
1095 | DBG(("%s(%d)\n", __FUNCTION__, |
1095 | DBG(("%s(%d)\n", __FUNCTION__, |
1096 | sna->render.vertex_index - sna->render.vertex_start)); |
1096 | sna->render.vertex_index - sna->render.vertex_start)); |
1097 | 1097 | ||
1098 | OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(6) | 0); |
1098 | OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(6) | 0); |
1099 | OUT_BATCH(gen3_get_blend_cntl(PictOpAdd, true, op->dst.format)); |
1099 | OUT_BATCH(gen3_get_blend_cntl(PictOpAdd, true, op->dst.format)); |
1100 | gen3_composite_emit_shader(sna, op, PictOpAdd); |
1100 | gen3_composite_emit_shader(sna, op, PictOpAdd); |
1101 | 1101 | ||
1102 | OUT_BATCH(PRIM3D_RECTLIST | PRIM3D_INDIRECT_SEQUENTIAL | |
1102 | OUT_BATCH(PRIM3D_RECTLIST | PRIM3D_INDIRECT_SEQUENTIAL | |
1103 | (sna->render.vertex_index - sna->render.vertex_start)); |
1103 | (sna->render.vertex_index - sna->render.vertex_start)); |
1104 | OUT_BATCH(sna->render.vertex_start); |
1104 | OUT_BATCH(sna->render.vertex_start); |
1105 | 1105 | ||
1106 | sna->render_state.gen3.last_blend = 0; |
1106 | sna->render_state.gen3.last_blend = 0; |
1107 | return true; |
1107 | return true; |
1108 | } |
1108 | } |
1109 | 1109 | ||
1110 | static void gen3_vertex_flush(struct sna *sna) |
1110 | static void gen3_vertex_flush(struct sna *sna) |
1111 | { |
1111 | { |
1112 | assert(sna->render.vertex_offset); |
1112 | assert(sna->render.vertex_offset); |
1113 | 1113 | ||
1114 | DBG(("%s[%x] = %d\n", __FUNCTION__, |
1114 | DBG(("%s[%x] = %d\n", __FUNCTION__, |
1115 | 4*sna->render.vertex_offset, |
1115 | 4*sna->render.vertex_offset, |
1116 | sna->render.vertex_index - sna->render.vertex_start)); |
1116 | sna->render.vertex_index - sna->render.vertex_start)); |
1117 | 1117 | ||
1118 | sna->kgem.batch[sna->render.vertex_offset] = |
1118 | sna->kgem.batch[sna->render.vertex_offset] = |
1119 | PRIM3D_RECTLIST | PRIM3D_INDIRECT_SEQUENTIAL | |
1119 | PRIM3D_RECTLIST | PRIM3D_INDIRECT_SEQUENTIAL | |
1120 | (sna->render.vertex_index - sna->render.vertex_start); |
1120 | (sna->render.vertex_index - sna->render.vertex_start); |
1121 | sna->kgem.batch[sna->render.vertex_offset + 1] = |
1121 | sna->kgem.batch[sna->render.vertex_offset + 1] = |
1122 | sna->render.vertex_start; |
1122 | sna->render.vertex_start; |
1123 | 1123 | ||
1124 | sna->render.vertex_offset = 0; |
1124 | sna->render.vertex_offset = 0; |
1125 | } |
1125 | } |
1126 | 1126 | ||
1127 | static int gen3_vertex_finish(struct sna *sna) |
1127 | static int gen3_vertex_finish(struct sna *sna) |
1128 | { |
1128 | { |
1129 | struct kgem_bo *bo; |
1129 | struct kgem_bo *bo; |
1130 | 1130 | ||
1131 | DBG(("%s: used=%d/%d, vbo active? %d\n", |
1131 | DBG(("%s: used=%d/%d, vbo active? %d\n", |
1132 | __FUNCTION__, sna->render.vertex_used, sna->render.vertex_size, |
1132 | __FUNCTION__, sna->render.vertex_used, sna->render.vertex_size, |
1133 | sna->render.vbo ? sna->render.vbo->handle : 0)); |
1133 | sna->render.vbo ? sna->render.vbo->handle : 0)); |
1134 | assert(sna->render.vertex_offset == 0); |
1134 | assert(sna->render.vertex_offset == 0); |
1135 | assert(sna->render.vertex_used); |
1135 | assert(sna->render.vertex_used); |
1136 | assert(sna->render.vertex_used <= sna->render.vertex_size); |
1136 | assert(sna->render.vertex_used <= sna->render.vertex_size); |
1137 | 1137 | ||
1138 | sna_vertex_wait__locked(&sna->render); |
1138 | sna_vertex_wait__locked(&sna->render); |
1139 | 1139 | ||
1140 | bo = sna->render.vbo; |
1140 | bo = sna->render.vbo; |
1141 | if (bo) { |
1141 | if (bo) { |
1142 | DBG(("%s: reloc = %d\n", __FUNCTION__, |
1142 | DBG(("%s: reloc = %d\n", __FUNCTION__, |
1143 | sna->render.vertex_reloc[0])); |
1143 | sna->render.vertex_reloc[0])); |
1144 | 1144 | ||
1145 | if (sna->render.vertex_reloc[0]) { |
1145 | if (sna->render.vertex_reloc[0]) { |
1146 | sna->kgem.batch[sna->render.vertex_reloc[0]] = |
1146 | sna->kgem.batch[sna->render.vertex_reloc[0]] = |
1147 | kgem_add_reloc(&sna->kgem, sna->render.vertex_reloc[0], |
1147 | kgem_add_reloc(&sna->kgem, sna->render.vertex_reloc[0], |
1148 | bo, I915_GEM_DOMAIN_VERTEX << 16, 0); |
1148 | bo, I915_GEM_DOMAIN_VERTEX << 16, 0); |
1149 | 1149 | ||
1150 | sna->render.vertex_reloc[0] = 0; |
1150 | sna->render.vertex_reloc[0] = 0; |
1151 | } |
1151 | } |
1152 | sna->render.vertex_used = 0; |
1152 | sna->render.vertex_used = 0; |
1153 | sna->render.vertex_index = 0; |
1153 | sna->render.vertex_index = 0; |
1154 | sna->render.vbo = NULL; |
1154 | sna->render.vbo = NULL; |
1155 | 1155 | ||
1156 | kgem_bo_destroy(&sna->kgem, bo); |
1156 | kgem_bo_destroy(&sna->kgem, bo); |
1157 | } |
1157 | } |
1158 | 1158 | ||
1159 | sna->render.vertices = NULL; |
1159 | sna->render.vertices = NULL; |
1160 | sna->render.vbo = kgem_create_linear(&sna->kgem, |
1160 | sna->render.vbo = kgem_create_linear(&sna->kgem, |
1161 | 256*1024, CREATE_GTT_MAP); |
1161 | 256*1024, CREATE_GTT_MAP); |
1162 | if (sna->render.vbo) |
1162 | if (sna->render.vbo) |
1163 | sna->render.vertices = kgem_bo_map(&sna->kgem, sna->render.vbo); |
1163 | sna->render.vertices = kgem_bo_map(&sna->kgem, sna->render.vbo); |
1164 | if (sna->render.vertices == NULL) { |
1164 | if (sna->render.vertices == NULL) { |
1165 | if (sna->render.vbo) |
1165 | if (sna->render.vbo) |
1166 | kgem_bo_destroy(&sna->kgem, sna->render.vbo); |
1166 | kgem_bo_destroy(&sna->kgem, sna->render.vbo); |
1167 | sna->render.vbo = NULL; |
1167 | sna->render.vbo = NULL; |
1168 | return 0; |
1168 | return 0; |
1169 | } |
1169 | } |
1170 | assert(sna->render.vbo->snoop == false); |
1170 | assert(sna->render.vbo->snoop == false); |
1171 | 1171 | ||
1172 | if (sna->render.vertex_used) { |
1172 | if (sna->render.vertex_used) { |
1173 | memcpy(sna->render.vertices, |
1173 | memcpy(sna->render.vertices, |
1174 | sna->render.vertex_data, |
1174 | sna->render.vertex_data, |
1175 | sizeof(float)*sna->render.vertex_used); |
1175 | sizeof(float)*sna->render.vertex_used); |
1176 | } |
1176 | } |
1177 | sna->render.vertex_size = 64 * 1024 - 1; |
1177 | sna->render.vertex_size = 64 * 1024 - 1; |
1178 | return sna->render.vertex_size - sna->render.vertex_used; |
1178 | return sna->render.vertex_size - sna->render.vertex_used; |
1179 | } |
1179 | } |
1180 | 1180 | ||
1181 | static void gen3_vertex_close(struct sna *sna) |
1181 | static void gen3_vertex_close(struct sna *sna) |
1182 | { |
1182 | { |
1183 | struct kgem_bo *bo, *free_bo = NULL; |
1183 | struct kgem_bo *bo, *free_bo = NULL; |
1184 | unsigned int delta = 0; |
1184 | unsigned int delta = 0; |
1185 | 1185 | ||
1186 | assert(sna->render.vertex_offset == 0); |
1186 | assert(sna->render.vertex_offset == 0); |
1187 | if (sna->render.vertex_reloc[0] == 0) |
1187 | if (sna->render.vertex_reloc[0] == 0) |
1188 | return; |
1188 | return; |
1189 | 1189 | ||
1190 | DBG(("%s: used=%d/%d, vbo active? %d\n", |
1190 | DBG(("%s: used=%d/%d, vbo active? %d\n", |
1191 | __FUNCTION__, sna->render.vertex_used, sna->render.vertex_size, |
1191 | __FUNCTION__, sna->render.vertex_used, sna->render.vertex_size, |
1192 | sna->render.vbo ? sna->render.vbo->handle : 0)); |
1192 | sna->render.vbo ? sna->render.vbo->handle : 0)); |
1193 | 1193 | ||
1194 | bo = sna->render.vbo; |
1194 | bo = sna->render.vbo; |
1195 | if (bo) { |
1195 | if (bo) { |
1196 | if (sna->render.vertex_size - sna->render.vertex_used < 64) { |
1196 | if (sna->render.vertex_size - sna->render.vertex_used < 64) { |
1197 | DBG(("%s: discarding full vbo\n", __FUNCTION__)); |
1197 | DBG(("%s: discarding full vbo\n", __FUNCTION__)); |
1198 | sna->render.vbo = NULL; |
1198 | sna->render.vbo = NULL; |
1199 | sna->render.vertices = sna->render.vertex_data; |
1199 | sna->render.vertices = sna->render.vertex_data; |
1200 | sna->render.vertex_size = ARRAY_SIZE(sna->render.vertex_data); |
1200 | sna->render.vertex_size = ARRAY_SIZE(sna->render.vertex_data); |
1201 | free_bo = bo; |
1201 | free_bo = bo; |
1202 | } else if (IS_CPU_MAP(bo->map)) { |
1202 | } else if (IS_CPU_MAP(bo->map)) { |
1203 | DBG(("%s: converting CPU map to GTT\n", __FUNCTION__)); |
1203 | DBG(("%s: converting CPU map to GTT\n", __FUNCTION__)); |
1204 | sna->render.vertices = kgem_bo_map__gtt(&sna->kgem, bo); |
1204 | sna->render.vertices = kgem_bo_map__gtt(&sna->kgem, bo); |
1205 | if (sna->render.vertices == NULL) { |
1205 | if (sna->render.vertices == NULL) { |
1206 | DBG(("%s: discarding non-mappable vertices\n",__FUNCTION__)); |
1206 | DBG(("%s: discarding non-mappable vertices\n",__FUNCTION__)); |
1207 | sna->render.vbo = NULL; |
1207 | sna->render.vbo = NULL; |
1208 | sna->render.vertices = sna->render.vertex_data; |
1208 | sna->render.vertices = sna->render.vertex_data; |
1209 | sna->render.vertex_size = ARRAY_SIZE(sna->render.vertex_data); |
1209 | sna->render.vertex_size = ARRAY_SIZE(sna->render.vertex_data); |
1210 | free_bo = bo; |
1210 | free_bo = bo; |
1211 | } |
1211 | } |
1212 | } |
1212 | } |
1213 | } else { |
1213 | } else { |
1214 | if (sna->kgem.nbatch + sna->render.vertex_used <= sna->kgem.surface) { |
1214 | if (sna->kgem.nbatch + sna->render.vertex_used <= sna->kgem.surface) { |
1215 | DBG(("%s: copy to batch: %d @ %d\n", __FUNCTION__, |
1215 | DBG(("%s: copy to batch: %d @ %d\n", __FUNCTION__, |
1216 | sna->render.vertex_used, sna->kgem.nbatch)); |
1216 | sna->render.vertex_used, sna->kgem.nbatch)); |
1217 | memcpy(sna->kgem.batch + sna->kgem.nbatch, |
1217 | memcpy(sna->kgem.batch + sna->kgem.nbatch, |
1218 | sna->render.vertex_data, |
1218 | sna->render.vertex_data, |
1219 | sna->render.vertex_used * 4); |
1219 | sna->render.vertex_used * 4); |
1220 | delta = sna->kgem.nbatch * 4; |
1220 | delta = sna->kgem.nbatch * 4; |
1221 | bo = NULL; |
1221 | bo = NULL; |
1222 | sna->kgem.nbatch += sna->render.vertex_used; |
1222 | sna->kgem.nbatch += sna->render.vertex_used; |
1223 | } else { |
1223 | } else { |
1224 | DBG(("%s: new vbo: %d\n", __FUNCTION__, |
1224 | DBG(("%s: new vbo: %d\n", __FUNCTION__, |
1225 | sna->render.vertex_used)); |
1225 | sna->render.vertex_used)); |
1226 | bo = kgem_create_linear(&sna->kgem, |
1226 | bo = kgem_create_linear(&sna->kgem, |
1227 | 4*sna->render.vertex_used, |
1227 | 4*sna->render.vertex_used, |
1228 | CREATE_NO_THROTTLE); |
1228 | CREATE_NO_THROTTLE); |
1229 | if (bo) { |
1229 | if (bo) { |
1230 | assert(bo->snoop == false); |
1230 | assert(bo->snoop == false); |
1231 | kgem_bo_write(&sna->kgem, bo, |
1231 | kgem_bo_write(&sna->kgem, bo, |
1232 | sna->render.vertex_data, |
1232 | sna->render.vertex_data, |
1233 | 4*sna->render.vertex_used); |
1233 | 4*sna->render.vertex_used); |
1234 | } |
1234 | } |
1235 | free_bo = bo; |
1235 | free_bo = bo; |
1236 | } |
1236 | } |
1237 | } |
1237 | } |
1238 | 1238 | ||
1239 | DBG(("%s: reloc = %d\n", __FUNCTION__, sna->render.vertex_reloc[0])); |
1239 | DBG(("%s: reloc = %d\n", __FUNCTION__, sna->render.vertex_reloc[0])); |
1240 | sna->kgem.batch[sna->render.vertex_reloc[0]] = |
1240 | sna->kgem.batch[sna->render.vertex_reloc[0]] = |
1241 | kgem_add_reloc(&sna->kgem, sna->render.vertex_reloc[0], |
1241 | kgem_add_reloc(&sna->kgem, sna->render.vertex_reloc[0], |
1242 | bo, I915_GEM_DOMAIN_VERTEX << 16, delta); |
1242 | bo, I915_GEM_DOMAIN_VERTEX << 16, delta); |
1243 | sna->render.vertex_reloc[0] = 0; |
1243 | sna->render.vertex_reloc[0] = 0; |
1244 | 1244 | ||
1245 | if (sna->render.vbo == NULL) { |
1245 | if (sna->render.vbo == NULL) { |
1246 | DBG(("%s: resetting vbo\n", __FUNCTION__)); |
1246 | DBG(("%s: resetting vbo\n", __FUNCTION__)); |
1247 | sna->render.vertex_used = 0; |
1247 | sna->render.vertex_used = 0; |
1248 | sna->render.vertex_index = 0; |
1248 | sna->render.vertex_index = 0; |
1249 | assert(sna->render.vertices == sna->render.vertex_data); |
1249 | assert(sna->render.vertices == sna->render.vertex_data); |
1250 | assert(sna->render.vertex_size == ARRAY_SIZE(sna->render.vertex_data)); |
1250 | assert(sna->render.vertex_size == ARRAY_SIZE(sna->render.vertex_data)); |
1251 | } |
1251 | } |
1252 | 1252 | ||
1253 | if (free_bo) |
1253 | if (free_bo) |
1254 | kgem_bo_destroy(&sna->kgem, free_bo); |
1254 | kgem_bo_destroy(&sna->kgem, free_bo); |
1255 | } |
1255 | } |
1256 | 1256 | ||
1257 | static bool gen3_rectangle_begin(struct sna *sna, |
1257 | static bool gen3_rectangle_begin(struct sna *sna, |
1258 | const struct sna_composite_op *op) |
1258 | const struct sna_composite_op *op) |
1259 | { |
1259 | { |
1260 | struct gen3_render_state *state = &sna->render_state.gen3; |
1260 | struct gen3_render_state *state = &sna->render_state.gen3; |
1261 | int ndwords, i1_cmd = 0, i1_len = 0; |
1261 | int ndwords, i1_cmd = 0, i1_len = 0; |
1262 | 1262 | ||
1263 | if (sna_vertex_wait__locked(&sna->render) && sna->render.vertex_offset) |
1263 | if (sna_vertex_wait__locked(&sna->render) && sna->render.vertex_offset) |
1264 | return true; |
1264 | return true; |
1265 | 1265 | ||
1266 | ndwords = 2; |
1266 | ndwords = 2; |
1267 | if (op->need_magic_ca_pass) |
1267 | if (op->need_magic_ca_pass) |
1268 | ndwords += 100; |
1268 | ndwords += 100; |
1269 | if (sna->render.vertex_reloc[0] == 0) |
1269 | if (sna->render.vertex_reloc[0] == 0) |
1270 | i1_len++, i1_cmd |= I1_LOAD_S(0), ndwords++; |
1270 | i1_len++, i1_cmd |= I1_LOAD_S(0), ndwords++; |
1271 | if (state->floats_per_vertex != op->floats_per_vertex) |
1271 | if (state->floats_per_vertex != op->floats_per_vertex) |
1272 | i1_len++, i1_cmd |= I1_LOAD_S(1), ndwords++; |
1272 | i1_len++, i1_cmd |= I1_LOAD_S(1), ndwords++; |
1273 | 1273 | ||
1274 | if (!kgem_check_batch(&sna->kgem, ndwords+1)) |
1274 | if (!kgem_check_batch(&sna->kgem, ndwords+1)) |
1275 | return false; |
1275 | return false; |
1276 | 1276 | ||
1277 | if (i1_cmd) { |
1277 | if (i1_cmd) { |
1278 | OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | i1_cmd | (i1_len - 1)); |
1278 | OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | i1_cmd | (i1_len - 1)); |
1279 | if (sna->render.vertex_reloc[0] == 0) |
1279 | if (sna->render.vertex_reloc[0] == 0) |
1280 | sna->render.vertex_reloc[0] = sna->kgem.nbatch++; |
1280 | sna->render.vertex_reloc[0] = sna->kgem.nbatch++; |
1281 | if (state->floats_per_vertex != op->floats_per_vertex) { |
1281 | if (state->floats_per_vertex != op->floats_per_vertex) { |
1282 | state->floats_per_vertex = op->floats_per_vertex; |
1282 | state->floats_per_vertex = op->floats_per_vertex; |
1283 | OUT_BATCH(state->floats_per_vertex << S1_VERTEX_WIDTH_SHIFT | |
1283 | OUT_BATCH(state->floats_per_vertex << S1_VERTEX_WIDTH_SHIFT | |
1284 | state->floats_per_vertex << S1_VERTEX_PITCH_SHIFT); |
1284 | state->floats_per_vertex << S1_VERTEX_PITCH_SHIFT); |
1285 | } |
1285 | } |
1286 | } |
1286 | } |
1287 | 1287 | ||
1288 | if (sna->kgem.nbatch == 2 + state->last_vertex_offset && |
1288 | if (sna->kgem.nbatch == 2 + state->last_vertex_offset && |
1289 | !op->need_magic_ca_pass) { |
1289 | !op->need_magic_ca_pass) { |
1290 | sna->render.vertex_offset = state->last_vertex_offset; |
1290 | sna->render.vertex_offset = state->last_vertex_offset; |
1291 | } else { |
1291 | } else { |
1292 | sna->render.vertex_offset = sna->kgem.nbatch; |
1292 | sna->render.vertex_offset = sna->kgem.nbatch; |
1293 | OUT_BATCH(MI_NOOP); /* to be filled later */ |
1293 | OUT_BATCH(MI_NOOP); /* to be filled later */ |
1294 | OUT_BATCH(MI_NOOP); |
1294 | OUT_BATCH(MI_NOOP); |
1295 | sna->render.vertex_start = sna->render.vertex_index; |
1295 | sna->render.vertex_start = sna->render.vertex_index; |
1296 | state->last_vertex_offset = sna->render.vertex_offset; |
1296 | state->last_vertex_offset = sna->render.vertex_offset; |
1297 | } |
1297 | } |
1298 | 1298 | ||
1299 | return true; |
1299 | return true; |
1300 | } |
1300 | } |
1301 | 1301 | ||
1302 | static int gen3_get_rectangles__flush(struct sna *sna, |
1302 | static int gen3_get_rectangles__flush(struct sna *sna, |
1303 | const struct sna_composite_op *op) |
1303 | const struct sna_composite_op *op) |
1304 | { |
1304 | { |
1305 | /* Preventing discarding new vbo after lock contention */ |
1305 | /* Preventing discarding new vbo after lock contention */ |
1306 | if (sna_vertex_wait__locked(&sna->render)) { |
1306 | if (sna_vertex_wait__locked(&sna->render)) { |
1307 | int rem = vertex_space(sna); |
1307 | int rem = vertex_space(sna); |
1308 | if (rem > op->floats_per_rect) |
1308 | if (rem > op->floats_per_rect) |
1309 | return rem; |
1309 | return rem; |
1310 | } |
1310 | } |
1311 | 1311 | ||
1312 | if (!kgem_check_batch(&sna->kgem, op->need_magic_ca_pass ? 105: 5)) |
1312 | if (!kgem_check_batch(&sna->kgem, op->need_magic_ca_pass ? 105: 5)) |
1313 | return 0; |
1313 | return 0; |
1314 | if (!kgem_check_reloc_and_exec(&sna->kgem, 1)) |
1314 | if (!kgem_check_reloc_and_exec(&sna->kgem, 1)) |
1315 | return 0; |
1315 | return 0; |
1316 | 1316 | ||
1317 | if (sna->render.vertex_offset) { |
1317 | if (sna->render.vertex_offset) { |
1318 | gen3_vertex_flush(sna); |
1318 | gen3_vertex_flush(sna); |
1319 | if (gen3_magic_ca_pass(sna, op)) { |
1319 | if (gen3_magic_ca_pass(sna, op)) { |
1320 | OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(6) | 0); |
1320 | OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(6) | 0); |
1321 | OUT_BATCH(gen3_get_blend_cntl(op->op, |
1321 | OUT_BATCH(gen3_get_blend_cntl(op->op, |
1322 | op->has_component_alpha, |
1322 | op->has_component_alpha, |
1323 | op->dst.format)); |
1323 | op->dst.format)); |
1324 | gen3_composite_emit_shader(sna, op, op->op); |
1324 | gen3_composite_emit_shader(sna, op, op->op); |
1325 | } |
1325 | } |
1326 | } |
1326 | } |
1327 | 1327 | ||
1328 | return gen3_vertex_finish(sna); |
1328 | return gen3_vertex_finish(sna); |
1329 | } |
1329 | } |
1330 | 1330 | ||
1331 | inline static int gen3_get_rectangles(struct sna *sna, |
1331 | inline static int gen3_get_rectangles(struct sna *sna, |
1332 | const struct sna_composite_op *op, |
1332 | const struct sna_composite_op *op, |
1333 | int want) |
1333 | int want) |
1334 | { |
1334 | { |
1335 | int rem; |
1335 | int rem; |
1336 | 1336 | ||
1337 | DBG(("%s: want=%d, rem=%d\n", |
1337 | DBG(("%s: want=%d, rem=%d\n", |
1338 | __FUNCTION__, want*op->floats_per_rect, vertex_space(sna))); |
1338 | __FUNCTION__, want*op->floats_per_rect, vertex_space(sna))); |
1339 | 1339 | ||
1340 | assert(want); |
1340 | assert(want); |
1341 | assert(sna->render.vertex_index * op->floats_per_vertex == sna->render.vertex_used); |
1341 | assert(sna->render.vertex_index * op->floats_per_vertex == sna->render.vertex_used); |
1342 | 1342 | ||
1343 | start: |
1343 | start: |
1344 | rem = vertex_space(sna); |
1344 | rem = vertex_space(sna); |
1345 | if (unlikely(op->floats_per_rect > rem)) { |
1345 | if (unlikely(op->floats_per_rect > rem)) { |
1346 | DBG(("flushing vbo for %s: %d < %d\n", |
1346 | DBG(("flushing vbo for %s: %d < %d\n", |
1347 | __FUNCTION__, rem, op->floats_per_rect)); |
1347 | __FUNCTION__, rem, op->floats_per_rect)); |
1348 | rem = gen3_get_rectangles__flush(sna, op); |
1348 | rem = gen3_get_rectangles__flush(sna, op); |
1349 | if (unlikely(rem == 0)) |
1349 | if (unlikely(rem == 0)) |
1350 | goto flush; |
1350 | goto flush; |
1351 | } |
1351 | } |
1352 | 1352 | ||
1353 | if (unlikely(sna->render.vertex_offset == 0)) { |
1353 | if (unlikely(sna->render.vertex_offset == 0)) { |
1354 | if (!gen3_rectangle_begin(sna, op)) |
1354 | if (!gen3_rectangle_begin(sna, op)) |
1355 | goto flush; |
1355 | goto flush; |
1356 | else |
1356 | else |
1357 | goto start; |
1357 | goto start; |
1358 | } |
1358 | } |
1359 | 1359 | ||
1360 | assert(op->floats_per_rect >= vertex_space(sna)); |
1360 | assert(op->floats_per_rect >= vertex_space(sna)); |
1361 | assert(rem <= vertex_space(sna)); |
1361 | assert(rem <= vertex_space(sna)); |
1362 | if (want > 1 && want * op->floats_per_rect > rem) |
1362 | if (want > 1 && want * op->floats_per_rect > rem) |
1363 | want = rem / op->floats_per_rect; |
1363 | want = rem / op->floats_per_rect; |
1364 | sna->render.vertex_index += 3*want; |
1364 | sna->render.vertex_index += 3*want; |
1365 | 1365 | ||
1366 | assert(want); |
1366 | assert(want); |
1367 | assert(sna->render.vertex_index * op->floats_per_vertex <= sna->render.vertex_size); |
1367 | assert(sna->render.vertex_index * op->floats_per_vertex <= sna->render.vertex_size); |
1368 | return want; |
1368 | return want; |
1369 | 1369 | ||
1370 | flush: |
1370 | flush: |
1371 | DBG(("%s: flushing batch\n", __FUNCTION__)); |
1371 | DBG(("%s: flushing batch\n", __FUNCTION__)); |
1372 | if (sna->render.vertex_offset) { |
1372 | if (sna->render.vertex_offset) { |
1373 | gen3_vertex_flush(sna); |
1373 | gen3_vertex_flush(sna); |
1374 | gen3_magic_ca_pass(sna, op); |
1374 | gen3_magic_ca_pass(sna, op); |
1375 | } |
1375 | } |
1376 | sna_vertex_wait__locked(&sna->render); |
1376 | sna_vertex_wait__locked(&sna->render); |
1377 | _kgem_submit(&sna->kgem); |
1377 | _kgem_submit(&sna->kgem); |
1378 | gen3_emit_composite_state(sna, op); |
1378 | gen3_emit_composite_state(sna, op); |
1379 | assert(sna->render.vertex_offset == 0); |
1379 | assert(sna->render.vertex_offset == 0); |
1380 | assert(sna->render.vertex_reloc[0] == 0); |
1380 | assert(sna->render.vertex_reloc[0] == 0); |
1381 | goto start; |
1381 | goto start; |
1382 | } |
1382 | } |
1383 | 1383 | ||
1384 | fastcall static void |
1384 | fastcall static void |
1385 | gen3_render_composite_blt(struct sna *sna, |
1385 | gen3_render_composite_blt(struct sna *sna, |
1386 | const struct sna_composite_op *op, |
1386 | const struct sna_composite_op *op, |
1387 | const struct sna_composite_rectangles *r) |
1387 | const struct sna_composite_rectangles *r) |
1388 | { |
1388 | { |
1389 | DBG(("%s: src=(%d, %d)+(%d, %d), mask=(%d, %d)+(%d, %d), dst=(%d, %d)+(%d, %d), size=(%d, %d)\n", __FUNCTION__, |
1389 | DBG(("%s: src=(%d, %d)+(%d, %d), mask=(%d, %d)+(%d, %d), dst=(%d, %d)+(%d, %d), size=(%d, %d)\n", __FUNCTION__, |
1390 | r->src.x, r->src.y, op->src.offset[0], op->src.offset[1], |
1390 | r->src.x, r->src.y, op->src.offset[0], op->src.offset[1], |
1391 | r->mask.x, r->mask.y, op->mask.offset[0], op->mask.offset[1], |
1391 | r->mask.x, r->mask.y, op->mask.offset[0], op->mask.offset[1], |
1392 | r->dst.x, r->dst.y, op->dst.x, op->dst.y, |
1392 | r->dst.x, r->dst.y, op->dst.x, op->dst.y, |
1393 | r->width, r->height)); |
1393 | r->width, r->height)); |
1394 | 1394 | ||
1395 | gen3_get_rectangles(sna, op, 1); |
1395 | gen3_get_rectangles(sna, op, 1); |
1396 | 1396 | ||
1397 | op->prim_emit(sna, op, r); |
1397 | op->prim_emit(sna, op, r); |
1398 | } |
1398 | } |
1399 | 1399 | ||
1400 | static void |
1400 | static void |
1401 | gen3_render_composite_done(struct sna *sna, |
1401 | gen3_render_composite_done(struct sna *sna, |
1402 | const struct sna_composite_op *op) |
1402 | const struct sna_composite_op *op) |
1403 | { |
1403 | { |
1404 | DBG(("%s()\n", __FUNCTION__)); |
1404 | DBG(("%s()\n", __FUNCTION__)); |
1405 | 1405 | ||
1406 | if (sna->render.vertex_offset) { |
1406 | if (sna->render.vertex_offset) { |
1407 | gen3_vertex_flush(sna); |
1407 | gen3_vertex_flush(sna); |
1408 | gen3_magic_ca_pass(sna, op); |
1408 | gen3_magic_ca_pass(sna, op); |
1409 | } |
1409 | } |
1410 | 1410 | ||
1411 | } |
1411 | } |
1412 | 1412 | ||
1413 | static void |
1413 | static void |
1414 | discard_vbo(struct sna *sna) |
1414 | discard_vbo(struct sna *sna) |
1415 | { |
1415 | { |
1416 | kgem_bo_destroy(&sna->kgem, sna->render.vbo); |
1416 | kgem_bo_destroy(&sna->kgem, sna->render.vbo); |
1417 | sna->render.vbo = NULL; |
1417 | sna->render.vbo = NULL; |
1418 | sna->render.vertices = sna->render.vertex_data; |
1418 | sna->render.vertices = sna->render.vertex_data; |
1419 | sna->render.vertex_size = ARRAY_SIZE(sna->render.vertex_data); |
1419 | sna->render.vertex_size = ARRAY_SIZE(sna->render.vertex_data); |
1420 | sna->render.vertex_used = 0; |
1420 | sna->render.vertex_used = 0; |
1421 | sna->render.vertex_index = 0; |
1421 | sna->render.vertex_index = 0; |
1422 | } |
1422 | } |
1423 | 1423 | ||
1424 | static void |
1424 | static void |
1425 | gen3_render_reset(struct sna *sna) |
1425 | gen3_render_reset(struct sna *sna) |
1426 | { |
1426 | { |
1427 | struct gen3_render_state *state = &sna->render_state.gen3; |
1427 | struct gen3_render_state *state = &sna->render_state.gen3; |
1428 | 1428 | ||
1429 | state->need_invariant = true; |
1429 | state->need_invariant = true; |
1430 | state->current_dst = 0; |
1430 | state->current_dst = 0; |
1431 | state->tex_count = 0; |
1431 | state->tex_count = 0; |
1432 | state->last_drawrect_limit = ~0U; |
1432 | state->last_drawrect_limit = ~0U; |
1433 | state->last_target = 0; |
1433 | state->last_target = 0; |
1434 | state->last_blend = 0; |
1434 | state->last_blend = 0; |
1435 | state->last_constants = 0; |
1435 | state->last_constants = 0; |
1436 | state->last_sampler = 0; |
1436 | state->last_sampler = 0; |
1437 | state->last_shader = 0x7fffffff; |
1437 | state->last_shader = 0x7fffffff; |
1438 | state->last_diffuse = 0xcc00ffee; |
1438 | state->last_diffuse = 0xcc00ffee; |
1439 | state->last_specular = 0xcc00ffee; |
1439 | state->last_specular = 0xcc00ffee; |
1440 | 1440 | ||
1441 | state->floats_per_vertex = 0; |
1441 | state->floats_per_vertex = 0; |
1442 | state->last_floats_per_vertex = 0; |
1442 | state->last_floats_per_vertex = 0; |
1443 | state->last_vertex_offset = 0; |
1443 | state->last_vertex_offset = 0; |
1444 | 1444 | ||
1445 | if (sna->render.vbo != NULL && |
1445 | if (sna->render.vbo != NULL && |
1446 | !kgem_bo_is_mappable(&sna->kgem, sna->render.vbo)) { |
1446 | !kgem_bo_is_mappable(&sna->kgem, sna->render.vbo)) { |
1447 | DBG(("%s: discarding vbo as next access will stall: %d\n", |
1447 | DBG(("%s: discarding vbo as next access will stall: %d\n", |
1448 | __FUNCTION__, sna->render.vbo->presumed_offset)); |
1448 | __FUNCTION__, sna->render.vbo->presumed_offset)); |
1449 | discard_vbo(sna); |
1449 | discard_vbo(sna); |
1450 | } |
1450 | } |
1451 | 1451 | ||
1452 | sna->render.vertex_reloc[0] = 0; |
1452 | sna->render.vertex_reloc[0] = 0; |
1453 | sna->render.vertex_offset = 0; |
1453 | sna->render.vertex_offset = 0; |
1454 | } |
1454 | } |
1455 | 1455 | ||
1456 | static void |
1456 | static void |
1457 | gen3_render_retire(struct kgem *kgem) |
1457 | gen3_render_retire(struct kgem *kgem) |
1458 | { |
1458 | { |
1459 | struct sna *sna; |
1459 | struct sna *sna; |
1460 | 1460 | ||
1461 | sna = container_of(kgem, struct sna, kgem); |
1461 | sna = container_of(kgem, struct sna, kgem); |
1462 | if (sna->render.vertex_reloc[0] == 0 && |
1462 | if (sna->render.vertex_reloc[0] == 0 && |
1463 | sna->render.vbo && !kgem_bo_is_busy(sna->render.vbo)) { |
1463 | sna->render.vbo && !kgem_bo_is_busy(sna->render.vbo)) { |
1464 | DBG(("%s: resetting idle vbo\n", __FUNCTION__)); |
1464 | DBG(("%s: resetting idle vbo\n", __FUNCTION__)); |
1465 | sna->render.vertex_used = 0; |
1465 | sna->render.vertex_used = 0; |
1466 | sna->render.vertex_index = 0; |
1466 | sna->render.vertex_index = 0; |
1467 | } |
1467 | } |
1468 | } |
1468 | } |
1469 | 1469 | ||
1470 | static void |
1470 | static void |
1471 | gen3_render_expire(struct kgem *kgem) |
1471 | gen3_render_expire(struct kgem *kgem) |
1472 | { |
1472 | { |
1473 | struct sna *sna; |
1473 | struct sna *sna; |
1474 | 1474 | ||
1475 | sna = container_of(kgem, struct sna, kgem); |
1475 | sna = container_of(kgem, struct sna, kgem); |
1476 | if (sna->render.vbo && !sna->render.vertex_used) { |
1476 | if (sna->render.vbo && !sna->render.vertex_used) { |
1477 | DBG(("%s: discarding vbo\n", __FUNCTION__)); |
1477 | DBG(("%s: discarding vbo\n", __FUNCTION__)); |
1478 | discard_vbo(sna); |
1478 | discard_vbo(sna); |
1479 | } |
1479 | } |
1480 | } |
1480 | } |
1481 | 1481 | ||
1482 | static bool gen3_composite_channel_set_format(struct sna_composite_channel *channel, |
1482 | static bool gen3_composite_channel_set_format(struct sna_composite_channel *channel, |
1483 | CARD32 format) |
1483 | CARD32 format) |
1484 | { |
1484 | { |
1485 | unsigned int i; |
1485 | unsigned int i; |
1486 | 1486 | ||
1487 | for (i = 0; i < ARRAY_SIZE(gen3_tex_formats); i++) { |
1487 | for (i = 0; i < ARRAY_SIZE(gen3_tex_formats); i++) { |
1488 | if (gen3_tex_formats[i].fmt == format) { |
1488 | if (gen3_tex_formats[i].fmt == format) { |
1489 | channel->card_format = gen3_tex_formats[i].card_fmt; |
1489 | channel->card_format = gen3_tex_formats[i].card_fmt; |
1490 | channel->rb_reversed = gen3_tex_formats[i].rb_reversed; |
1490 | channel->rb_reversed = gen3_tex_formats[i].rb_reversed; |
1491 | return true; |
1491 | return true; |
1492 | } |
1492 | } |
1493 | } |
1493 | } |
1494 | return false; |
1494 | return false; |
1495 | } |
1495 | } |
1496 | 1496 | ||
1497 | 1497 | ||
1498 | 1498 | ||
1499 | 1499 | ||
1500 | 1500 | ||
1501 | 1501 | ||
1502 | 1502 | ||
1503 | 1503 | ||
1504 | 1504 | ||
1505 | 1505 | ||
1506 | 1506 | ||
1507 | 1507 | ||
1508 | 1508 | ||
1509 | 1509 | ||
1510 | 1510 | ||
1511 | 1511 | ||
1512 | 1512 | ||
1513 | 1513 | ||
1514 | 1514 | ||
1515 | 1515 | ||
1516 | 1516 | ||
1517 | 1517 | ||
1518 | 1518 | ||
1519 | 1519 | ||
1520 | 1520 | ||
1521 | 1521 | ||
1522 | 1522 | ||
1523 | 1523 | ||
1524 | 1524 | ||
1525 | 1525 | ||
1526 | 1526 | ||
1527 | 1527 | ||
1528 | 1528 | ||
1529 | 1529 | ||
1530 | 1530 | ||
1531 | 1531 | ||
1532 | 1532 | ||
1533 | 1533 | ||
1534 | 1534 | ||
1535 | 1535 | ||
1536 | 1536 | ||
1537 | 1537 | ||
1538 | 1538 | ||
1539 | 1539 | ||
1540 | 1540 | ||
1541 | 1541 | ||
1542 | 1542 | ||
1543 | 1543 | ||
1544 | 1544 | ||
1545 | 1545 | ||
1546 | 1546 | ||
1547 | 1547 | ||
1548 | 1548 | ||
1549 | 1549 | ||
1550 | 1550 | ||
1551 | 1551 | ||
1552 | 1552 | ||
1553 | 1553 | ||
1554 | 1554 | ||
1555 | static void |
1555 | static void |
1556 | gen3_align_vertex(struct sna *sna, |
1556 | gen3_align_vertex(struct sna *sna, |
1557 | const struct sna_composite_op *op) |
1557 | const struct sna_composite_op *op) |
1558 | { |
1558 | { |
1559 | if (op->floats_per_vertex != sna->render_state.gen3.last_floats_per_vertex) { |
1559 | if (op->floats_per_vertex != sna->render_state.gen3.last_floats_per_vertex) { |
1560 | if (sna->render.vertex_size - sna->render.vertex_used < 2*op->floats_per_rect) |
1560 | if (sna->render.vertex_size - sna->render.vertex_used < 2*op->floats_per_rect) |
1561 | gen3_vertex_finish(sna); |
1561 | gen3_vertex_finish(sna); |
1562 | 1562 | ||
1563 | DBG(("aligning vertex: was %d, now %d floats per vertex, %d->%d\n", |
1563 | DBG(("aligning vertex: was %d, now %d floats per vertex, %d->%d\n", |
1564 | sna->render_state.gen3.last_floats_per_vertex, |
1564 | sna->render_state.gen3.last_floats_per_vertex, |
1565 | op->floats_per_vertex, |
1565 | op->floats_per_vertex, |
1566 | sna->render.vertex_index, |
1566 | sna->render.vertex_index, |
1567 | (sna->render.vertex_used + op->floats_per_vertex - 1) / op->floats_per_vertex)); |
1567 | (sna->render.vertex_used + op->floats_per_vertex - 1) / op->floats_per_vertex)); |
1568 | sna->render.vertex_index = (sna->render.vertex_used + op->floats_per_vertex - 1) / op->floats_per_vertex; |
1568 | sna->render.vertex_index = (sna->render.vertex_used + op->floats_per_vertex - 1) / op->floats_per_vertex; |
1569 | sna->render.vertex_used = sna->render.vertex_index * op->floats_per_vertex; |
1569 | sna->render.vertex_used = sna->render.vertex_index * op->floats_per_vertex; |
1570 | assert(sna->render.vertex_used < sna->render.vertex_size - op->floats_per_rect); |
1570 | assert(sna->render.vertex_used < sna->render.vertex_size - op->floats_per_rect); |
1571 | sna->render_state.gen3.last_floats_per_vertex = op->floats_per_vertex; |
1571 | sna->render_state.gen3.last_floats_per_vertex = op->floats_per_vertex; |
1572 | } |
1572 | } |
1573 | } |
1573 | } |
1574 | 1574 | ||
1575 | 1575 | ||
1576 | 1576 | ||
1577 | 1577 | ||
1578 | 1578 | ||
1579 | 1579 | ||
1580 | 1580 | ||
1581 | 1581 | ||
1582 | 1582 | ||
1583 | 1583 | ||
1584 | 1584 | ||
1585 | 1585 | ||
1586 | 1586 | ||
1587 | 1587 | ||
1588 | 1588 | ||
1589 | 1589 | ||
1590 | 1590 | ||
1591 | 1591 | ||
1592 | 1592 | ||
1593 | 1593 | ||
1594 | 1594 | ||
1595 | 1595 | ||
1596 | 1596 | ||
1597 | 1597 | ||
1598 | 1598 | ||
1599 | 1599 | ||
1600 | 1600 | ||
1601 | 1601 | ||
1602 | 1602 | ||
1603 | 1603 | ||
1604 | 1604 | ||
1605 | 1605 | ||
1606 | 1606 | ||
1607 | 1607 | ||
1608 | 1608 | ||
1609 | 1609 | ||
1610 | 1610 | ||
1611 | 1611 | ||
1612 | 1612 | ||
1613 | 1613 | ||
1614 | 1614 | ||
1615 | 1615 | ||
1616 | 1616 | ||
1617 | 1617 | ||
1618 | 1618 | ||
1619 | 1619 | ||
1620 | 1620 | ||
1621 | 1621 | ||
1622 | 1622 | ||
1623 | 1623 | ||
1624 | 1624 | ||
1625 | 1625 | ||
1626 | 1626 | ||
1627 | 1627 | ||
1628 | 1628 | ||
1629 | 1629 | ||
1630 | 1630 | ||
1631 | 1631 | ||
1632 | 1632 | ||
1633 | 1633 | ||
1634 | 1634 | ||
1635 | 1635 | ||
1636 | 1636 | ||
1637 | 1637 | ||
1638 | 1638 | ||
1639 | 1639 | ||
1640 | 1640 | ||
1641 | 1641 | ||
1642 | 1642 | ||
1643 | 1643 | ||
1644 | 1644 | ||
1645 | 1645 | ||
1646 | 1646 | ||
1647 | 1647 | ||
1648 | 1648 | ||
1649 | 1649 | ||
1650 | 1650 | ||
1651 | 1651 | ||
1652 | 1652 | ||
1653 | 1653 | ||
1654 | 1654 | ||
1655 | 1655 | ||
1656 | 1656 | ||
1657 | 1657 | ||
1658 | 1658 | ||
1659 | 1659 | ||
1660 | 1660 | ||
1661 | 1661 | ||
1662 | 1662 | ||
1663 | 1663 | ||
1664 | 1664 | ||
1665 | 1665 | ||
1666 | 1666 | ||
1667 | 1667 | ||
1668 | 1668 | ||
1669 | 1669 | ||
1670 | 1670 | ||
1671 | 1671 | ||
1672 | 1672 | ||
1673 | 1673 | ||
1674 | 1674 | ||
1675 | 1675 | ||
1676 | 1676 | ||
1677 | 1677 | ||
1678 | 1678 | ||
1679 | 1679 | ||
1680 | 1680 | ||
1681 | 1681 | ||
1682 | 1682 | ||
1683 | 1683 | ||
1684 | 1684 | ||
1685 | 1685 | ||
1686 | 1686 | ||
1687 | 1687 | ||
1688 | 1688 | ||
1689 | 1689 | ||
1690 | 1690 | ||
1691 | 1691 | ||
1692 | 1692 | ||
1693 | 1693 | ||
1694 | 1694 | ||
1695 | 1695 | ||
1696 | 1696 | ||
1697 | 1697 | ||
1698 | 1698 | ||
1699 | 1699 | ||
1700 | 1700 | ||
1701 | 1701 | ||
1702 | 1702 | ||
1703 | 1703 | ||
1704 | 1704 | ||
1705 | 1705 | ||
1706 | 1706 | ||
1707 | 1707 | ||
1708 | 1708 | ||
1709 | 1709 | ||
1710 | 1710 | ||
1711 | 1711 | ||
1712 | 1712 | ||
1713 | static inline bool is_constant_ps(uint32_t type) |
1713 | static inline bool is_constant_ps(uint32_t type) |
1714 | { |
1714 | { |
1715 | switch (type) { |
1715 | switch (type) { |
1716 | case SHADER_NONE: /* be warned! */ |
1716 | case SHADER_NONE: /* be warned! */ |
1717 | case SHADER_ZERO: |
1717 | case SHADER_ZERO: |
1718 | case SHADER_BLACK: |
1718 | case SHADER_BLACK: |
1719 | case SHADER_WHITE: |
1719 | case SHADER_WHITE: |
1720 | case SHADER_CONSTANT: |
1720 | case SHADER_CONSTANT: |
1721 | return true; |
1721 | return true; |
1722 | default: |
1722 | default: |
1723 | return false; |
1723 | return false; |
1724 | } |
1724 | } |
1725 | } |
1725 | } |
1726 | 1726 | ||
1727 | 1727 | ||
1728 | 1728 | ||
1729 | 1729 | ||
1730 | 1730 | ||
1731 | 1731 | ||
1732 | 1732 | ||
1733 | 1733 | ||
1734 | 1734 | ||
1735 | 1735 | ||
1736 | 1736 | ||
1737 | 1737 | ||
1738 | 1738 | ||
1739 | 1739 | ||
1740 | 1740 | ||
1741 | 1741 | ||
1742 | 1742 | ||
1743 | 1743 | ||
1744 | 1744 | ||
1745 | 1745 | ||
1746 | 1746 | ||
1747 | 1747 | ||
1748 | 1748 | ||
1749 | 1749 | ||
1750 | 1750 | ||
1751 | 1751 | ||
1752 | 1752 | ||
1753 | 1753 | ||
1754 | 1754 | ||
1755 | 1755 | ||
1756 | 1756 | ||
1757 | 1757 | ||
1758 | 1758 | ||
1759 | 1759 | ||
1760 | 1760 | ||
1761 | 1761 | ||
1762 | 1762 | ||
1763 | 1763 | ||
1764 | 1764 | ||
1765 | 1765 | ||
1766 | 1766 | ||
1767 | 1767 | ||
1768 | 1768 | ||
1769 | 1769 | ||
1770 | 1770 | ||
1771 | 1771 | ||
1772 | 1772 | ||
1773 | 1773 | ||
1774 | 1774 | ||
1775 | 1775 | ||
1776 | 1776 | ||
1777 | 1777 | ||
1778 | 1778 | ||
1779 | 1779 | ||
1780 | 1780 | ||
1781 | 1781 | ||
1782 | 1782 | ||
1783 | 1783 | ||
1784 | 1784 | ||
1785 | 1785 | ||
1786 | 1786 | ||
1787 | 1787 | ||
1788 | 1788 | ||
1789 | 1789 | ||
1790 | 1790 | ||
1791 | 1791 | ||
1792 | 1792 | ||
1793 | 1793 | ||
1794 | 1794 | ||
1795 | 1795 | ||
1796 | 1796 | ||
1797 | 1797 | ||
1798 | 1798 | ||
1799 | 1799 | ||
1800 | 1800 | ||
1801 | 1801 | ||
1802 | 1802 | ||
1803 | 1803 | ||
1804 | 1804 | ||
1805 | 1805 | ||
1806 | 1806 | ||
1807 | 1807 | ||
1808 | 1808 | ||
1809 | 1809 | ||
1810 | 1810 | ||
1811 | 1811 | ||
1812 | 1812 | ||
1813 | 1813 | ||
1814 | 1814 | ||
1815 | 1815 | ||
1816 | 1816 | ||
1817 | 1817 | ||
1818 | 1818 | ||
1819 | 1819 | ||
1820 | 1820 | ||
1821 | 1821 | ||
1822 | 1822 | ||
1823 | 1823 | ||
1824 | 1824 | ||
1825 | 1825 | ||
1826 | 1826 | ||
1827 | 1827 | ||
1828 | 1828 | ||
1829 | 1829 | ||
1830 | 1830 | ||
1831 | 1831 | ||
1832 | 1832 | ||
1833 | 1833 | ||
1834 | 1834 | ||
1835 | static bool |
1835 | static bool |
1836 | gen3_blit_tex(struct sna *sna, |
1836 | gen3_blit_tex(struct sna *sna, |
1837 | uint8_t op, |
1837 | uint8_t op, bool scale, |
1838 | PixmapPtr src, struct kgem_bo *src_bo, |
1838 | PixmapPtr src, struct kgem_bo *src_bo, |
1839 | PixmapPtr mask,struct kgem_bo *mask_bo, |
1839 | PixmapPtr mask,struct kgem_bo *mask_bo, |
1840 | PixmapPtr dst, struct kgem_bo *dst_bo, |
1840 | PixmapPtr dst, struct kgem_bo *dst_bo, |
1841 | int32_t src_x, int32_t src_y, |
1841 | int32_t src_x, int32_t src_y, |
1842 | int32_t msk_x, int32_t msk_y, |
1842 | int32_t msk_x, int32_t msk_y, |
1843 | int32_t dst_x, int32_t dst_y, |
1843 | int32_t dst_x, int32_t dst_y, |
1844 | int32_t width, int32_t height, |
1844 | int32_t width, int32_t height, |
1845 | struct sna_composite_op *tmp) |
1845 | struct sna_composite_op *tmp) |
1846 | { |
1846 | { |
1847 | 1847 | ||
1848 | DBG(("%s: %dx%d, current mode=%d\n", __FUNCTION__, |
1848 | DBG(("%s: %dx%d, current mode=%d\n", __FUNCTION__, |
1849 | width, height, sna->kgem.ring)); |
1849 | width, height, sna->kgem.ring)); |
1850 | 1850 | ||
1851 | tmp->op = PictOpSrc; |
1851 | tmp->op = PictOpSrc; |
1852 | 1852 | ||
1853 | tmp->dst.pixmap = dst; |
1853 | tmp->dst.pixmap = dst; |
1854 | tmp->dst.bo = dst_bo; |
1854 | tmp->dst.bo = dst_bo; |
1855 | tmp->dst.width = dst->drawable.width; |
1855 | tmp->dst.width = dst->drawable.width; |
1856 | tmp->dst.height = dst->drawable.height; |
1856 | tmp->dst.height = dst->drawable.height; |
1857 | tmp->dst.format = PICT_x8r8g8b8; |
1857 | tmp->dst.format = PICT_x8r8g8b8; |
1858 | 1858 | ||
1859 | tmp->rb_reversed = gen3_dst_rb_reversed(tmp->dst.format); |
1859 | tmp->rb_reversed = gen3_dst_rb_reversed(tmp->dst.format); |
1860 | 1860 | ||
1861 | tmp->u.gen3.num_constants = 0; |
1861 | tmp->u.gen3.num_constants = 0; |
1862 | tmp->src.u.gen3.type = SHADER_TEXTURE; |
1862 | tmp->src.u.gen3.type = SHADER_TEXTURE; |
1863 | tmp->src.is_affine = true; |
1863 | tmp->src.is_affine = true; |
1864 | 1864 | ||
1865 | 1865 | ||
1866 | tmp->src.repeat = RepeatNone; |
1866 | tmp->src.repeat = RepeatNone; |
1867 | tmp->src.filter = PictFilterNearest; |
1867 | tmp->src.filter = PictFilterNearest; |
1868 | 1868 | ||
1869 | tmp->src.bo = src_bo; |
1869 | tmp->src.bo = src_bo; |
1870 | tmp->src.pict_format = PICT_x8r8g8b8; |
1870 | tmp->src.pict_format = PICT_x8r8g8b8; |
1871 | 1871 | ||
1872 | gen3_composite_channel_set_format(&tmp->src, tmp->src.pict_format); |
1872 | gen3_composite_channel_set_format(&tmp->src, tmp->src.pict_format); |
1873 | 1873 | ||
1874 | tmp->src.width = src->drawable.width; |
1874 | tmp->src.width = src->drawable.width; |
1875 | tmp->src.height = src->drawable.height; |
1875 | tmp->src.height = src->drawable.height; |
1876 | 1876 | ||
1877 | tmp->mask.u.gen3.type = SHADER_TEXTURE; |
1877 | tmp->mask.u.gen3.type = SHADER_TEXTURE; |
1878 | tmp->mask.is_affine = true; |
1878 | tmp->mask.is_affine = true; |
1879 | tmp->need_magic_ca_pass = false; |
1879 | tmp->need_magic_ca_pass = false; |
1880 | tmp->has_component_alpha = false; |
1880 | tmp->has_component_alpha = false; |
1881 | 1881 | ||
1882 | 1882 | ||
1883 | tmp->mask.repeat = RepeatNone; |
1883 | tmp->mask.repeat = RepeatNone; |
1884 | tmp->mask.filter = PictFilterNearest; |
1884 | tmp->mask.filter = PictFilterNearest; |
1885 | tmp->mask.is_affine = true; |
1885 | tmp->mask.is_affine = true; |
1886 | 1886 | ||
1887 | tmp->mask.bo = mask_bo; |
1887 | tmp->mask.bo = mask_bo; |
1888 | tmp->mask.pict_format = PIXMAN_a8; |
1888 | tmp->mask.pict_format = PIXMAN_a8; |
1889 | gen3_composite_channel_set_format(&tmp->mask, tmp->mask.pict_format); |
1889 | gen3_composite_channel_set_format(&tmp->mask, tmp->mask.pict_format); |
1890 | tmp->mask.width = mask->drawable.width; |
1890 | tmp->mask.width = mask->drawable.width; |
1891 | tmp->mask.height = mask->drawable.height; |
1891 | tmp->mask.height = mask->drawable.height; |
- | 1892 | ||
- | 1893 | if( scale ) |
|
1892 | 1894 | { |
|
1893 | tmp->src.scale[0] = 1.f/width; //src->width; |
1895 | tmp->src.scale[0] = 1.f/width; |
- | 1896 | tmp->src.scale[1] = 1.f/height; |
|
- | 1897 | } |
|
- | 1898 | else |
|
1894 | tmp->src.scale[1] = 1.f/height; //src->height; |
1899 | { |
1895 | // tmp->src.offset[0] = -dst_x; |
1900 | tmp->src.scale[0] = 1.f/src->drawable.width; |
1896 | // tmp->src.offset[1] = -dst_y; |
1901 | tmp->src.scale[1] = 1.f/src->drawable.height; |
1897 | 1902 | } |
|
1898 | 1903 | ||
1899 | tmp->mask.scale[0] = 1.f/mask->drawable.width; |
1904 | tmp->mask.scale[0] = 1.f/mask->drawable.width; |
1900 | tmp->mask.scale[1] = 1.f/mask->drawable.height; |
1905 | tmp->mask.scale[1] = 1.f/mask->drawable.height; |
1901 | // tmp->mask.offset[0] = -dst_x; |
- | |
1902 | // tmp->mask.offset[1] = -dst_y; |
- | |
1903 | - | ||
1904 | 1906 | ||
1905 | tmp->prim_emit = gen3_emit_composite_primitive_identity_source_mask; |
1907 | tmp->prim_emit = gen3_emit_composite_primitive_identity_source_mask; |
1906 | 1908 | ||
1907 | 1909 | ||
1908 | tmp->floats_per_vertex = 2; |
1910 | tmp->floats_per_vertex = 2; |
1909 | if (!is_constant_ps(tmp->src.u.gen3.type)) |
1911 | if (!is_constant_ps(tmp->src.u.gen3.type)) |
1910 | tmp->floats_per_vertex += tmp->src.is_affine ? 2 : 4; |
1912 | tmp->floats_per_vertex += tmp->src.is_affine ? 2 : 4; |
1911 | if (!is_constant_ps(tmp->mask.u.gen3.type)) |
1913 | if (!is_constant_ps(tmp->mask.u.gen3.type)) |
1912 | tmp->floats_per_vertex += tmp->mask.is_affine ? 2 : 4; |
1914 | tmp->floats_per_vertex += tmp->mask.is_affine ? 2 : 4; |
1913 | DBG(("%s: floats_per_vertex = 2 + %d + %d = %d [specialised emitter? %d]\n", __FUNCTION__, |
1915 | DBG(("%s: floats_per_vertex = 2 + %d + %d = %d [specialised emitter? %d]\n", __FUNCTION__, |
1914 | !is_constant_ps(tmp->src.u.gen3.type) ? tmp->src.is_affine ? 2 : 4 : 0, |
1916 | !is_constant_ps(tmp->src.u.gen3.type) ? tmp->src.is_affine ? 2 : 4 : 0, |
1915 | !is_constant_ps(tmp->mask.u.gen3.type) ? tmp->mask.is_affine ? 2 : 4 : 0, |
1917 | !is_constant_ps(tmp->mask.u.gen3.type) ? tmp->mask.is_affine ? 2 : 4 : 0, |
1916 | tmp->floats_per_vertex, |
1918 | tmp->floats_per_vertex, |
1917 | tmp->prim_emit != gen3_emit_composite_primitive)); |
1919 | tmp->prim_emit != gen3_emit_composite_primitive)); |
1918 | tmp->floats_per_rect = 3 * tmp->floats_per_vertex; |
1920 | tmp->floats_per_rect = 3 * tmp->floats_per_vertex; |
1919 | 1921 | ||
1920 | tmp->blt = gen3_render_composite_blt; |
1922 | tmp->blt = gen3_render_composite_blt; |
1921 | 1923 | ||
1922 | tmp->done = gen3_render_composite_done; |
1924 | tmp->done = gen3_render_composite_done; |
1923 | 1925 | ||
1924 | if (!kgem_check_bo(&sna->kgem, |
1926 | if (!kgem_check_bo(&sna->kgem, |
1925 | tmp->dst.bo, tmp->src.bo, tmp->mask.bo, |
1927 | tmp->dst.bo, tmp->src.bo, tmp->mask.bo, |
1926 | NULL)) { |
1928 | NULL)) { |
1927 | kgem_submit(&sna->kgem); |
1929 | kgem_submit(&sna->kgem); |
1928 | } |
1930 | } |
1929 | 1931 | ||
1930 | gen3_emit_composite_state(sna, tmp); |
1932 | gen3_emit_composite_state(sna, tmp); |
1931 | gen3_align_vertex(sna, tmp); |
1933 | gen3_align_vertex(sna, tmp); |
1932 | return true; |
1934 | return true; |
1933 | } |
1935 | } |
1934 | 1936 | ||
1935 | static void gen3_render_flush(struct sna *sna) |
1937 | static void gen3_render_flush(struct sna *sna) |
1936 | { |
1938 | { |
1937 | gen3_vertex_close(sna); |
1939 | gen3_vertex_close(sna); |
1938 | 1940 | ||
1939 | assert(sna->render.vertex_reloc[0] == 0); |
1941 | assert(sna->render.vertex_reloc[0] == 0); |
1940 | assert(sna->render.vertex_offset == 0); |
1942 | assert(sna->render.vertex_offset == 0); |
1941 | } |
1943 | } |
1942 | 1944 | ||
1943 | static void |
1945 | static void |
1944 | gen3_render_fini(struct sna *sna) |
1946 | gen3_render_fini(struct sna *sna) |
1945 | { |
1947 | { |
1946 | } |
1948 | } |
1947 | 1949 | ||
1948 | bool gen3_render_init(struct sna *sna) |
1950 | bool gen3_render_init(struct sna *sna) |
1949 | { |
1951 | { |
1950 | struct sna_render *render = &sna->render; |
1952 | struct sna_render *render = &sna->render; |
1951 | 1953 | ||
1952 | 1954 | ||
1953 | // render->video = gen3_render_video; |
1955 | // render->video = gen3_render_video; |
1954 | 1956 | ||
1955 | sna->render.blit_tex = gen3_blit_tex; |
1957 | render->blit_tex = gen3_blit_tex; |
1956 | 1958 | ||
1957 | render->reset = gen3_render_reset; |
1959 | render->reset = gen3_render_reset; |
1958 | render->flush = gen3_render_flush; |
1960 | render->flush = gen3_render_flush; |
1959 | render->fini = gen3_render_fini; |
1961 | render->fini = gen3_render_fini; |
1960 | 1962 | ||
1961 | render->max_3d_size = MAX_3D_SIZE; |
1963 | render->max_3d_size = MAX_3D_SIZE; |
1962 | render->max_3d_pitch = MAX_3D_PITCH; |
1964 | render->max_3d_pitch = MAX_3D_PITCH; |
- | 1965 | ||
- | 1966 | render->caps = HW_BIT_BLIT | HW_TEX_BLIT; |
|
1963 | 1967 | ||
1964 | sna->kgem.retire = gen3_render_retire; |
1968 | sna->kgem.retire = gen3_render_retire; |
1965 | sna->kgem.expire = gen3_render_expire; |
1969 | sna->kgem.expire = gen3_render_expire; |
1966 | return true; |
1970 | return true; |
1967 | }>>>=>=>>><>><>><>=>>><>=>>><>><>>><>>>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>16) |
1971 | }>>>=>=>>><>><>><>=>>><>=>>><>><>>><>>>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>16) |
1968 | 1972 | ||
1969 | static><16) |
1973 | static><16) |
1970 | 1974 | ||
1971 | static>20) |
1975 | static>20) |
1972 | #define><20) |
1976 | #define><20) |
1973 | #define>><>><>><>=>><>><>><> |
1977 | #define>><>><>><>=>><>><>><> |