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1 | #include |
1 | #include |
2 | - | ||
3 | #include |
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4 | #include |
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5 | #include |
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6 | #include |
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7 | #include |
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8 | #include |
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9 | #include |
2 | #include |
Line 10... | Line -... | ||
10 | - | ||
11 | extern int pci_scan_filter(u32 id, u32 busnr, u32 devfn); |
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12 | 3 | ||
Line 13... | Line 4... | ||
13 | LIST_HEAD(devices); |
4 | LIST_HEAD(devices); |
14 | 5 | ||
Line 15... | Line 6... | ||
15 | /* PCI control bits. Shares IORESOURCE_BITS with above PCI ROM. */ |
6 | /* PCI control bits. Shares IORESOURCE_BITS with above PCI ROM. */ |
Line 16... | Line 7... | ||
16 | #define IORESOURCE_PCI_FIXED (1<<4) /* Do not move resource */ |
7 | #define IORESOURCE_PCI_FIXED (1<<4) /* Do not move resource */ |
17 | 8 | ||
Line 18... | Line -... | ||
18 | #define LEGACY_IO_RESOURCE (IORESOURCE_IO | IORESOURCE_PCI_FIXED) |
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19 | - | ||
20 | #define IORESOURCE_ROM_COPY (1<<2) /* ROM is alloc'd copy, resource field overlaid */ |
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21 | #define IORESOURCE_ROM_BIOS_COPY (1<<3) /* ROM is BIOS copy, resource field overlaid */ |
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22 | - | ||
23 | /* |
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24 | * Translate the low bits of the PCI base |
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25 | * to the resource type |
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26 | */ |
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27 | /* |
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28 | //int pci_scan_filter(u32 id, u32 busnr, u32 devfn) |
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29 | { |
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30 | u16 vendor, device; |
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31 | u32 class; |
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32 | int ret = 0; |
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33 | - | ||
34 | vendor = id & 0xffff; |
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35 | device = (id >> 16) & 0xffff; |
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36 | - | ||
37 | if(vendor == 0x15AD ) |
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38 | { |
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39 | class = PciRead32(busnr, devfn, PCI_CLASS_REVISION); |
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40 | class >>= 16; |
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41 | - | ||
42 | if( class == PCI_CLASS_DISPLAY_VGA ) |
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Line 43... | Line 9... | ||
43 | ret = 1; |
9 | #define LEGACY_IO_RESOURCE (IORESOURCE_IO | IORESOURCE_PCI_FIXED) |
44 | } |
10 | |
45 | return ret; |
11 | #define IORESOURCE_ROM_COPY (1<<2) /* ROM is alloc'd copy, resource field overlaid */ |
46 | };*/ |
12 | #define IORESOURCE_ROM_BIOS_COPY (1<<3) /* ROM is BIOS copy, resource field overlaid */ |
Line 372... | Line 338... | ||
372 | /* if( pci_scan_filter(id, busnr, devfn) == 0) |
338 | /* if( pci_scan_filter(id, busnr, devfn) == 0) |
373 | return NULL;*/ |
339 | return NULL;*/ |
Line 374... | Line 340... | ||
374 | 340 | ||
Line 375... | Line 341... | ||
375 | hdr = PciRead8(busnr, devfn, PCI_HEADER_TYPE); |
341 | hdr = PciRead8(busnr, devfn, PCI_HEADER_TYPE); |
376 | 342 | ||
377 | dev = (pci_dev_t*)kzalloc(sizeof(pci_dev_t), 0); |
343 | dev = (pci_dev_t*)KernelZeroAlloc(sizeof(pci_dev_t)); |
Line 378... | Line 344... | ||
378 | if(unlikely(dev == NULL)) |
344 | if(unlikely(dev == NULL)) |
Line 379... | Line -... | ||
379 | return NULL; |
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380 | 345 | return NULL; |
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381 | INIT_LIST_HEAD(&dev->link); |
346 | |
382 | 347 | INIT_LIST_HEAD(&dev->link); |
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383 | 348 | ||
384 | dev->pci_dev.busnr = busnr; |
349 | dev->pci_dev.busnr = busnr; |
Line 496... | Line 461... | ||
496 | 461 | ||
497 | return pos; |
462 | return pos; |
Line 498... | Line -... | ||
498 | } |
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499 | - | ||
500 | 463 | } |
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501 | 464 | ||
502 | 465 | ||
503 | int enum_pci_devices() |
466 | int enum_pci_devices(void) |
504 | { |
467 | { |
Line 505... | Line 468... | ||
505 | pci_dev_t *dev; |
468 | pci_dev_t *dev; |
Line 506... | Line -... | ||
506 | u32 last_bus; |
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507 | u32 bus = 0 , devfn = 0; |
469 | u32 last_bus; |
508 | 470 | u32 bus = 0 , devfn = 0; |
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Line 509... | Line 471... | ||
509 | last_bus = PciApi(1); |
471 | |
510 | 472 | last_bus = PciApi(1); |
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Line 530... | Line 492... | ||
530 | dev = (pci_dev_t*)dev->link.next; |
492 | dev = (pci_dev_t*)dev->link.next; |
531 | } |
493 | } |
532 | return 0; |
494 | return 0; |
533 | } |
495 | } |
Line -... | Line 496... | ||
- | 496 | ||
- | 497 | void free_pci_devices(void) |
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- | 498 | { |
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- | 499 | pci_dev_t *dev = (pci_dev_t*)devices.next; |
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- | 500 | while(&dev->link != &devices) { |
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- | 501 | pci_dev_t *temp = dev; |
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- | 502 | dev = (pci_dev_t*)dev->link.next; |
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- | 503 | KernelFree(temp); |
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- | 504 | } |
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- | 505 | } |
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534 | 506 | ||
535 | const struct pci_device_id* find_pci_device(pci_dev_t* pdev, const struct pci_device_id *idlist) |
507 | const struct pci_device_id* find_pci_device(pci_dev_t* pdev, const struct pci_device_id *idlist) |
536 | { |
508 | { |
537 | pci_dev_t *dev; |
509 | pci_dev_t *dev; |
Line 635... | Line 607... | ||
635 | } |
607 | } |
Line 636... | Line 608... | ||
636 | 608 | ||
637 | return NULL; |
609 | return NULL; |
Line -... | Line 610... | ||
- | 610 | } |
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638 | } |
611 | |
639 | 612 | ||
640 | int pci_bus_read_config_byte (struct pci_bus *bus, u32 devfn, int pos, u8 *value) |
613 | int pci_bus_read_config_byte (struct pci_bus *bus, u32 devfn, int pos, u8 *value) |
641 | { |
614 | { |
642 | // raw_spin_lock_irqsave(&pci_lock, flags); |
615 | // raw_spin_lock_irqsave(&pci_lock, flags); |
Line 658... | Line 631... | ||
658 | 631 | ||
659 | int pci_bus_read_config_dword (struct pci_bus *bus, u32 devfn, int pos, u32 *value) |
632 | int pci_bus_read_config_dword (struct pci_bus *bus, u32 devfn, int pos, u32 *value) |
660 | { |
633 | { |
661 | if ( pos & 3) |
634 | if ( pos & 3) |
662 | return PCIBIOS_BAD_REGISTER_NUMBER; |
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663 | - | ||
664 | // raw_spin_lock_irqsave(&pci_lock, flags); |
635 | return PCIBIOS_BAD_REGISTER_NUMBER; |
665 | *value = PciRead32(bus->number, devfn, pos); |
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666 | // raw_spin_unlock_irqrestore(&pci_lock, flags); |
636 | *value = PciRead32(bus->number, devfn, pos); |
667 | return 0; |
637 | return 0; |
Line 668... | Line 638... | ||
668 | } |
638 | } |
669 | 639 | ||
670 | int pci_bus_write_config_dword(struct pci_bus *bus, unsigned int devfn, int where, u32 val) |
640 | int pci_bus_write_config_dword(struct pci_bus *bus, unsigned int devfn, int where, u32 val) |
671 | { |
641 | { |
672 | if ( where & 3) |
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673 | return PCIBIOS_BAD_REGISTER_NUMBER; |
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674 | 642 | if ( where & 3) |
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675 | // raw_spin_lock_irqsave(&pci_lock, flags); |
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676 | PciWrite32(bus->number, devfn,where, val); |
643 | return PCIBIOS_BAD_REGISTER_NUMBER; |
677 | // raw_spin_unlock_irqrestore(&pci_lock, flags); |
644 | PciWrite32(bus->number, devfn,where, val); |
678 | return 0; |
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679 | }>=>>>><>><>><>>3)><3)>2)><2)>4)><4)> |
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