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1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
2 | ;; ;; |
2 | ;; ;; |
3 | ;; Copyright (C) KolibriOS team 2010-2014. All rights reserved. ;; |
3 | ;; Copyright (C) KolibriOS team 2010-2015. All rights reserved. ;; |
4 | ;; Distributed under terms of the GNU General Public License ;; |
4 | ;; Distributed under terms of the GNU General Public License ;; |
5 | ;; ;; |
5 | ;; ;; |
6 | ;; mii.inc - Media Independent Interface routines for KolibriOS ;; |
6 | ;; mii.inc - Media Independent Interface routines for KolibriOS ;; |
7 | ;; ;; |
7 | ;; ;; |
8 | ;; GNU GENERAL PUBLIC LICENSE ;; |
8 | ;; GNU GENERAL PUBLIC LICENSE ;; |
9 | ;; Version 2, June 1991 ;; |
9 | ;; Version 2, June 1991 ;; |
10 | ;; ;; |
10 | ;; ;; |
11 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
11 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
12 | 12 | ||
13 | 13 | ||
14 | ; Generic MII registers. |
14 | ; Generic MII registers. |
15 | 15 | ||
16 | MII_BMCR = 0x00 ; Basic mode control register |
16 | MII_BMCR = 0x00 ; Basic mode control register |
17 | MII_BMSR = 0x01 ; Basic mode status register |
17 | MII_BMSR = 0x01 ; Basic mode status register |
18 | MII_PHYSID1 = 0x02 ; PHYS ID 1 |
18 | MII_PHYSID1 = 0x02 ; PHYS ID 1 |
19 | MII_PHYSID2 = 0x03 ; PHYS ID 2 |
19 | MII_PHYSID2 = 0x03 ; PHYS ID 2 |
20 | 20 | ||
21 | ; Auto negotiation registers |
21 | ; Auto negotiation registers |
22 | MII_ADVERTISE = 0x04 ; Advertisement control reg |
22 | MII_ADVERTISE = 0x04 ; Advertisement control reg |
23 | MII_LPA = 0x05 ; Link partner ability reg |
23 | MII_LPA = 0x05 ; Link partner ability reg |
24 | MII_EXPANSION = 0x06 ; Expansion register |
24 | MII_EXPANSION = 0x06 ; Expansion register |
25 | 25 | ||
26 | MII_CTRL1000 = 0x09 ; 1000BASE-T control |
26 | MII_CTRL1000 = 0x09 ; 1000BASE-T control |
27 | MII_STAT1000 = 0x0a ; 1000BASE-T status |
27 | MII_STAT1000 = 0x0a ; 1000BASE-T status |
28 | MII_ESTATUS = 0x0f ; Extended Status |
28 | MII_ESTATUS = 0x0f ; Extended Status |
29 | MII_DCOUNTER = 0x12 ; Disconnect counter |
29 | MII_DCOUNTER = 0x12 ; Disconnect counter |
30 | MII_FCSCOUNTER = 0x13 ; False carrier counter |
30 | MII_FCSCOUNTER = 0x13 ; False carrier counter |
31 | MII_NWAYTEST = 0x14 ; N-way auto-neg test reg |
31 | MII_NWAYTEST = 0x14 ; N-way auto-neg test reg |
32 | MII_RERRCOUNTER = 0x15 ; Receive error counter |
32 | MII_RERRCOUNTER = 0x15 ; Receive error counter |
33 | MII_SREVISION = 0x16 ; Silicon revision |
33 | MII_SREVISION = 0x16 ; Silicon revision |
34 | MII_RESV1 = 0x17 ; Reserved... |
34 | MII_RESV1 = 0x17 ; Reserved... |
35 | MII_LBRERROR = 0x18 ; Lpback, rx, bypass error |
35 | MII_LBRERROR = 0x18 ; Lpback, rx, bypass error |
36 | MII_PHYADDR = 0x19 ; PHY address |
36 | MII_PHYADDR = 0x19 ; PHY address |
37 | MII_RESV2 = 0x1a ; Reserved... |
37 | MII_RESV2 = 0x1a ; Reserved... |
38 | MII_TPISTATUS = 0x1b ; TPI status for 10mbps |
38 | MII_TPISTATUS = 0x1b ; TPI status for 10mbps |
39 | MII_NCONFIG = 0x1c ; Network interface config |
39 | MII_NCONFIG = 0x1c ; Network interface config |
40 | 40 | ||
41 | ; Basic mode control register. |
41 | ; Basic mode control register. |
42 | 42 | ||
43 | BMCR_RESV = 0x003f ; Unused... |
43 | BMCR_RESV = 0x003f ; Unused... |
44 | BMCR_SPEED1000 = 0x0040 ; MSB of Speed (1000) |
44 | BMCR_SPEED1000 = 0x0040 ; MSB of Speed (1000) |
45 | BMCR_CTST = 0x0080 ; Collision test |
45 | BMCR_CTST = 0x0080 ; Collision test |
46 | BMCR_FULLDPLX = 0x0100 ; Full duplex |
46 | BMCR_FULLDPLX = 0x0100 ; Full duplex |
47 | BMCR_ANRESTART = 0x0200 ; Auto negotiation restart |
47 | BMCR_ANRESTART = 0x0200 ; Auto negotiation restart |
48 | BMCR_ISOLATE = 0x0400 ; Disconnect DP83840 from MII |
48 | BMCR_ISOLATE = 0x0400 ; Disconnect DP83840 from MII |
49 | BMCR_PDOWN = 0x0800 ; Powerdown the DP83840 |
49 | BMCR_PDOWN = 0x0800 ; Powerdown the DP83840 |
50 | BMCR_ANENABLE = 0x1000 ; Enable auto negotiation |
50 | BMCR_ANENABLE = 0x1000 ; Enable auto negotiation |
51 | BMCR_SPEED100 = 0x2000 ; Select 100Mbps |
51 | BMCR_SPEED100 = 0x2000 ; Select 100Mbps |
52 | BMCR_LOOPBACK = 0x4000 ; TXD loopback bits |
52 | BMCR_LOOPBACK = 0x4000 ; TXD loopback bits |
53 | BMCR_RESET = 0x8000 ; Reset the DP83840 |
53 | BMCR_RESET = 0x8000 ; Reset the DP83840 |
54 | 54 | ||
55 | ; Basic mode status register. |
55 | ; Basic mode status register. |
56 | 56 | ||
57 | BMSR_ERCAP = 0x0001 ; Ext-reg capability |
57 | BMSR_ERCAP = 0x0001 ; Ext-reg capability |
58 | BMSR_JCD = 0x0002 ; Jabber detected |
58 | BMSR_JCD = 0x0002 ; Jabber detected |
59 | BMSR_LSTATUS = 0x0004 ; Link status |
59 | BMSR_LSTATUS = 0x0004 ; Link status |
60 | BMSR_ANEGCAPABLE = 0x0008 ; Able to do auto-negotiation |
60 | BMSR_ANEGCAPABLE = 0x0008 ; Able to do auto-negotiation |
61 | BMSR_RFAULT = 0x0010 ; Remote fault detected |
61 | BMSR_RFAULT = 0x0010 ; Remote fault detected |
62 | BMSR_ANEGCOMPLETE = 0x0020 ; Auto-negotiation complete |
62 | BMSR_ANEGCOMPLETE = 0x0020 ; Auto-negotiation complete |
63 | BMSR_RESV = 0x00c0 ; Unused... |
63 | BMSR_RESV = 0x00c0 ; Unused... |
64 | BMSR_ESTATEN = 0x0100 ; Extended Status in R15 |
64 | BMSR_ESTATEN = 0x0100 ; Extended Status in R15 |
65 | BMSR_100HALF2 = 0x0200 ; Can do 100BASE-T2 HDX |
65 | BMSR_100HALF2 = 0x0200 ; Can do 100BASE-T2 HDX |
66 | BMSR_100FULL2 = 0x0400 ; Can do 100BASE-T2 FDX |
66 | BMSR_100FULL2 = 0x0400 ; Can do 100BASE-T2 FDX |
67 | BMSR_10HALF = 0x0800 ; Can do 10mbps, half-duplex |
67 | BMSR_10HALF = 0x0800 ; Can do 10mbps, half-duplex |
68 | BMSR_10FULL = 0x1000 ; Can do 10mbps, full-duplex |
68 | BMSR_10FULL = 0x1000 ; Can do 10mbps, full-duplex |
69 | BMSR_100HALF = 0x2000 ; Can do 100mbps, half-duplex |
69 | BMSR_100HALF = 0x2000 ; Can do 100mbps, half-duplex |
70 | BMSR_100FULL = 0x4000 ; Can do 100mbps, full-duplex |
70 | BMSR_100FULL = 0x4000 ; Can do 100mbps, full-duplex |
71 | BMSR_100BASE4 = 0x8000 ; Can do 100mbps, 4k packets |
71 | BMSR_100BASE4 = 0x8000 ; Can do 100mbps, 4k packets |
72 | 72 | ||
73 | ; Advertisement control register. |
73 | ; Advertisement control register. |
74 | 74 | ||
75 | ADVERTISE_SLCT = 0x001f ; Selector bits |
75 | ADVERTISE_SLCT = 0x001f ; Selector bits |
76 | ADVERTISE_CSMA = 0x0001 ; Only selector supported |
76 | ADVERTISE_CSMA = 0x0001 ; Only selector supported |
77 | ADVERTISE_10HALF = 0x0020 ; Try for 10mbps half-duplex |
77 | ADVERTISE_10HALF = 0x0020 ; Try for 10mbps half-duplex |
78 | ADVERTISE_1000XFULL = 0x0020 ; Try for 1000BASE-X full-duplex |
78 | ADVERTISE_1000XFULL = 0x0020 ; Try for 1000BASE-X full-duplex |
79 | ADVERTISE_10FULL = 0x0040 ; Try for 10mbps full-duplex |
79 | ADVERTISE_10FULL = 0x0040 ; Try for 10mbps full-duplex |
80 | ADVERTISE_1000XHALF = 0x0040 ; Try for 1000BASE-X half-duplex |
80 | ADVERTISE_1000XHALF = 0x0040 ; Try for 1000BASE-X half-duplex |
81 | ADVERTISE_100HALF = 0x0080 ; Try for 100mbps half-duplex |
81 | ADVERTISE_100HALF = 0x0080 ; Try for 100mbps half-duplex |
82 | ADVERTISE_1000XPAUSE = 0x0080 ; Try for 1000BASE-X pause |
82 | ADVERTISE_1000XPAUSE = 0x0080 ; Try for 1000BASE-X pause |
83 | ADVERTISE_100FULL = 0x0100 ; Try for 100mbps full-duplex |
83 | ADVERTISE_100FULL = 0x0100 ; Try for 100mbps full-duplex |
84 | ADVERTISE_1000XPSE_ASYM = 0x0100 ; Try for 1000BASE-X asym pause |
84 | ADVERTISE_1000XPSE_ASYM = 0x0100 ; Try for 1000BASE-X asym pause |
85 | ADVERTISE_100BASE4 = 0x0200 ; Try for 100mbps 4k packets |
85 | ADVERTISE_100BASE4 = 0x0200 ; Try for 100mbps 4k packets |
86 | ADVERTISE_PAUSE_CAP = 0x0400 ; Try for pause |
86 | ADVERTISE_PAUSE_CAP = 0x0400 ; Try for pause |
87 | ADVERTISE_PAUSE_ASYM = 0x0800 ; Try for asymetric pause |
87 | ADVERTISE_PAUSE_ASYM = 0x0800 ; Try for asymetric pause |
88 | ADVERTISE_RESV = 0x1000 ; Unused... |
88 | ADVERTISE_RESV = 0x1000 ; Unused... |
89 | ADVERTISE_RFAULT = 0x2000 ; Say we can detect faults |
89 | ADVERTISE_RFAULT = 0x2000 ; Say we can detect faults |
90 | ADVERTISE_LPACK = 0x4000 ; Ack link partners response |
90 | ADVERTISE_LPACK = 0x4000 ; Ack link partners response |
91 | ADVERTISE_NPAGE = 0x8000 ; Next page bit |
91 | ADVERTISE_NPAGE = 0x8000 ; Next page bit |
92 | 92 | ||
93 | ADVERTISE_FULL = (ADVERTISE_100FULL or ADVERTISE_10FULL or ADVERTISE_CSMA) |
93 | ADVERTISE_FULL = (ADVERTISE_100FULL or ADVERTISE_10FULL or ADVERTISE_CSMA) |
94 | ADVERTISE_ALL = (ADVERTISE_10HALF or ADVERTISE_10FULL or ADVERTISE_100HALF or ADVERTISE_100FULL) |
94 | ADVERTISE_ALL = (ADVERTISE_10HALF or ADVERTISE_10FULL or ADVERTISE_100HALF or ADVERTISE_100FULL) |
95 | 95 | ||
96 | ; Link partner ability register. |
96 | ; Link partner ability register. |
97 | 97 | ||
98 | LPA_SLCT = 0x001f ; Same as advertise selector |
98 | LPA_SLCT = 0x001f ; Same as advertise selector |
99 | LPA_10HALF = 0x0020 ; Can do 10mbps half-duplex |
99 | LPA_10HALF = 0x0020 ; Can do 10mbps half-duplex |
100 | LPA_1000XFULL = 0x0020 ; Can do 1000BASE-X full-duplex |
100 | LPA_1000XFULL = 0x0020 ; Can do 1000BASE-X full-duplex |
101 | LPA_10FULL = 0x0040 ; Can do 10mbps full-duplex |
101 | LPA_10FULL = 0x0040 ; Can do 10mbps full-duplex |
102 | LPA_1000XHALF = 0x0040 ; Can do 1000BASE-X half-duplex |
102 | LPA_1000XHALF = 0x0040 ; Can do 1000BASE-X half-duplex |
103 | LPA_100HALF = 0x0080 ; Can do 100mbps half-duplex |
103 | LPA_100HALF = 0x0080 ; Can do 100mbps half-duplex |
104 | LPA_1000XPAUSE = 0x0080 ; Can do 1000BASE-X pause |
104 | LPA_1000XPAUSE = 0x0080 ; Can do 1000BASE-X pause |
105 | LPA_100FULL = 0x0100 ; Can do 100mbps full-duplex |
105 | LPA_100FULL = 0x0100 ; Can do 100mbps full-duplex |
106 | LPA_1000XPAUSE_ASYM = 0x0100 ; Can do 1000BASE-X pause asym |
106 | LPA_1000XPAUSE_ASYM = 0x0100 ; Can do 1000BASE-X pause asym |
107 | LPA_100BASE4 = 0x0200 ; Can do 100mbps 4k packets |
107 | LPA_100BASE4 = 0x0200 ; Can do 100mbps 4k packets |
108 | LPA_PAUSE_CAP = 0x0400 ; Can pause |
108 | LPA_PAUSE_CAP = 0x0400 ; Can pause |
109 | LPA_PAUSE_ASYM = 0x0800 ; Can pause asymetrically |
109 | LPA_PAUSE_ASYM = 0x0800 ; Can pause asymetrically |
110 | LPA_RESV = 0x1000 ; Unused... |
110 | LPA_RESV = 0x1000 ; Unused... |
111 | LPA_RFAULT = 0x2000 ; Link partner faulted |
111 | LPA_RFAULT = 0x2000 ; Link partner faulted |
112 | LPA_LPACK = 0x4000 ; Link partner acked us |
112 | LPA_LPACK = 0x4000 ; Link partner acked us |
113 | LPA_NPAGE = 0x8000 ; Next page bit |
113 | LPA_NPAGE = 0x8000 ; Next page bit |
114 | 114 | ||
115 | LPA_DUPLEX = (LPA_10FULL or LPA_100FULL) |
115 | LPA_DUPLEX = (LPA_10FULL or LPA_100FULL) |
116 | LPA_100 = (LPA_100FULL or LPA_100HALF or LPA_100BASE4) |
116 | LPA_100 = (LPA_100FULL or LPA_100HALF or LPA_100BASE4) |
117 | 117 | ||
118 | ; Expansion register for auto-negotiation. |
118 | ; Expansion register for auto-negotiation. |
119 | 119 | ||
120 | EXPANSION_NWAY = 0x0001 ; Can do N-way auto-nego |
120 | EXPANSION_NWAY = 0x0001 ; Can do N-way auto-nego |
121 | EXPANSION_LCWP = 0x0002 ; Got new RX page code word |
121 | EXPANSION_LCWP = 0x0002 ; Got new RX page code word |
122 | EXPANSION_ENABLENPAGE = 0x0004 ; This enables npage words |
122 | EXPANSION_ENABLENPAGE = 0x0004 ; This enables npage words |
123 | EXPANSION_NPCAPABLE = 0x0008 ; Link partner supports npage |
123 | EXPANSION_NPCAPABLE = 0x0008 ; Link partner supports npage |
124 | EXPANSION_MFAULTS = 0x0010 ; Multiple faults detected |
124 | EXPANSION_MFAULTS = 0x0010 ; Multiple faults detected |
125 | EXPANSION_RESV = 0xffe0 ; Unused... |
125 | EXPANSION_RESV = 0xffe0 ; Unused... |
126 | 126 | ||
127 | ESTATUS_1000_TFULL = 0x2000 ; Can do 1000BT Full |
127 | ESTATUS_1000_TFULL = 0x2000 ; Can do 1000BT Full |
128 | ESTATUS_1000_THALF = 0x1000 ; Can do 1000BT Half |
128 | ESTATUS_1000_THALF = 0x1000 ; Can do 1000BT Half |
129 | 129 | ||
130 | ; N-way test register. |
130 | ; N-way test register. |
131 | 131 | ||
132 | NWAYTEST_RESV1 = 0x00ff ; Unused... |
132 | NWAYTEST_RESV1 = 0x00ff ; Unused... |
133 | NWAYTEST_LOOPBACK = 0x0100 ; Enable loopback for N-way |
133 | NWAYTEST_LOOPBACK = 0x0100 ; Enable loopback for N-way |
134 | NWAYTEST_RESV2 = 0xfe00 ; Unused... |
134 | NWAYTEST_RESV2 = 0xfe00 ; Unused... |
135 | 135 | ||
136 | ; 1000BASE-T Control register |
136 | ; 1000BASE-T Control register |
137 | 137 | ||
138 | ADVERTISE_1000FULL = 0x0200 ; Advertise 1000BASE-T full duplex |
138 | ADVERTISE_1000FULL = 0x0200 ; Advertise 1000BASE-T full duplex |
139 | ADVERTISE_1000HALF = 0x0100 ; Advertise 1000BASE-T half duplex |
139 | ADVERTISE_1000HALF = 0x0100 ; Advertise 1000BASE-T half duplex |
140 | 140 | ||
141 | ; 1000BASE-T Status register |
141 | ; 1000BASE-T Status register |
142 | 142 | ||
143 | LPA_1000LOCALRXOK = 0x2000 ; Link partner local receiver status |
143 | LPA_1000LOCALRXOK = 0x2000 ; Link partner local receiver status |
144 | LPA_1000REMRXOK = 0x1000 ; Link partner remote receiver status |
144 | LPA_1000REMRXOK = 0x1000 ; Link partner remote receiver status |
145 | LPA_1000FULL = 0x0800 ; Link partner 1000BASE-T full duplex |
145 | LPA_1000FULL = 0x0800 ; Link partner 1000BASE-T full duplex |
146 | LPA_1000HALF = 0x0400 ; Link partner 1000BASE-T half duplex |
146 | LPA_1000HALF = 0x0400 ; Link partner 1000BASE-T half duplex |
147 | 147 | ||
148 | ; Flow control flags |
148 | ; Flow control flags |
149 | 149 | ||
150 | FLOW_CTRL_TX = 0x01 |
150 | FLOW_CTRL_TX = 0x01 |
151 | FLOW_CTRL_RX = 0x02 |
151 | FLOW_CTRL_RX = 0x02 |
152 | 152 | ||
153 | 153 | ||
154 | 154 | ||
155 | if used mii_link_ok |
155 | if used mii_link_ok |
156 | 156 | ||
157 | align 4 |
157 | align 4 |
158 | mii_link_ok: |
158 | mii_link_ok: |
159 | 159 | ||
160 | DEBUGF 1, "mii_link_ok\n" |
160 | DEBUGF 1, "mii_link_ok\n" |
161 | 161 | ||
162 | ; First do a dummy read to latch some MII phys |
162 | ; First do a dummy read to latch some MII phys |
163 | 163 | ||
164 | mov ecx, MII_BMSR |
164 | mov ecx, MII_BMSR |
165 | call mdio_read |
165 | call mdio_read |
166 | 166 | ||
167 | mov ecx, MII_BMSR |
167 | mov ecx, MII_BMSR |
168 | call mdio_read |
168 | call mdio_read |
169 | 169 | ||
170 | and ax, BMSR_LSTATUS |
170 | and ax, BMSR_LSTATUS |
171 | 171 | ||
172 | DEBUGF 1, "link status=0x%x\n", ax |
172 | DEBUGF 1, "link status=0x%x\n", ax |
173 | 173 | ||
174 | ret |
174 | ret |
175 | 175 | ||
176 | end if |
176 | end if |