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25 | */ |
25 | */ |
Line 26... | Line 26... | ||
26 | 26 | ||
27 | #ifndef _UAPI_I915_DRM_H_ |
27 | #ifndef _UAPI_I915_DRM_H_ |
Line 28... | Line 28... | ||
28 | #define _UAPI_I915_DRM_H_ |
28 | #define _UAPI_I915_DRM_H_ |
Line 29... | Line 29... | ||
29 | 29 | ||
30 | #include |
30 | #include "drm.h" |
31 | 31 | ||
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354 | #define I915_PARAM_REVISION 32 |
354 | #define I915_PARAM_REVISION 32 |
355 | #define I915_PARAM_SUBSLICE_TOTAL 33 |
355 | #define I915_PARAM_SUBSLICE_TOTAL 33 |
356 | #define I915_PARAM_EU_TOTAL 34 |
356 | #define I915_PARAM_EU_TOTAL 34 |
357 | #define I915_PARAM_HAS_GPU_RESET 35 |
357 | #define I915_PARAM_HAS_GPU_RESET 35 |
358 | #define I915_PARAM_HAS_RESOURCE_STREAMER 36 |
358 | #define I915_PARAM_HAS_RESOURCE_STREAMER 36 |
- | 359 | #define I915_PARAM_HAS_EXEC_SOFTPIN 37 |
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359 | 360 | ||
360 | typedef struct drm_i915_getparam { |
361 | typedef struct drm_i915_getparam { |
361 | __s32 param; |
362 | __s32 param; |
362 | /* |
363 | /* |
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680 | 681 | ||
681 | /** Required alignment in graphics aperture */ |
682 | /** Required alignment in graphics aperture */ |
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682 | __u64 alignment; |
683 | __u64 alignment; |
- | 684 | ||
683 | 685 | /** |
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- | 686 | * When the EXEC_OBJECT_PINNED flag is specified this is populated by |
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684 | /** |
687 | * the user with the GTT offset at which this object will be pinned. |
- | 688 | * When the I915_EXEC_NO_RELOC flag is specified this must contain the |
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- | 689 | * presumed_offset of the object. |
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685 | * Returned value of the updated offset of the object, for future |
690 | * During execbuffer2 the kernel populates it with the value of the |
686 | * presumed_offset writes. |
691 | * current GTT offset of the object, for future presumed_offset writes. |
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687 | */ |
692 | */ |
688 | __u64 offset; |
693 | __u64 offset; |
689 | 694 | ||
690 | #define EXEC_OBJECT_NEEDS_FENCE (1<<0) |
695 | #define EXEC_OBJECT_NEEDS_FENCE (1<<0) |
- | 696 | #define EXEC_OBJECT_NEEDS_GTT (1<<1) |
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691 | #define EXEC_OBJECT_NEEDS_GTT (1<<1) |
697 | #define EXEC_OBJECT_WRITE (1<<2) |
692 | #define EXEC_OBJECT_WRITE (1<<2) |
698 | #define EXEC_OBJECT_SUPPORTS_48B_ADDRESS (1<<3) |
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693 | #define EXEC_OBJECT_SUPPORTS_48B_ADDRESS (1<<3) |
699 | #define EXEC_OBJECT_PINNED (1<<4) |
694 | #define __EXEC_OBJECT_UNKNOWN_FLAGS -(EXEC_OBJECT_SUPPORTS_48B_ADDRESS<<1) |
700 | #define __EXEC_OBJECT_UNKNOWN_FLAGS -(EXEC_OBJECT_PINNED<<1) |
695 | __u64 flags; |
701 | __u64 flags; |
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1077 | __u32 ctx_id; |
1083 | __u32 ctx_id; |
1078 | __u32 pad; |
1084 | __u32 pad; |
1079 | }; |
1085 | }; |
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1080 | 1086 | ||
- | 1087 | struct drm_i915_reg_read { |
|
- | 1088 | /* |
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- | 1089 | * Register offset. |
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- | 1090 | * For 64bit wide registers where the upper 32bits don't immediately |
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- | 1091 | * follow the lower 32bits, the offset of the lower 32bits must |
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- | 1092 | * be specified |
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1081 | struct drm_i915_reg_read { |
1093 | */ |
1082 | __u64 offset; |
1094 | __u64 offset; |
1083 | __u64 val; /* Return value */ |
1095 | __u64 val; /* Return value */ |
1084 | }; |
1096 | }; |
1085 | /* Known registers: |
1097 | /* Known registers: |
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1125 | __u32 ctx_id; |
1137 | __u32 ctx_id; |
1126 | __u32 size; |
1138 | __u32 size; |
1127 | __u64 param; |
1139 | __u64 param; |
1128 | #define I915_CONTEXT_PARAM_BAN_PERIOD 0x1 |
1140 | #define I915_CONTEXT_PARAM_BAN_PERIOD 0x1 |
1129 | #define I915_CONTEXT_PARAM_NO_ZEROMAP 0x2 |
1141 | #define I915_CONTEXT_PARAM_NO_ZEROMAP 0x2 |
- | 1142 | #define I915_CONTEXT_PARAM_GTT_SIZE 0x3 |
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1130 | __u64 value; |
1143 | __u64 value; |
1131 | }; |
1144 | }; |
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1132 | 1145 |