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 */
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 */
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#ifndef _UAPI_I915_DRM_H_
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#ifndef _UAPI_I915_DRM_H_
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#define _UAPI_I915_DRM_H_
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#define _UAPI_I915_DRM_H_
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#include 
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#include "drm.h"
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#define I915_PARAM_REVISION              32
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#define I915_PARAM_REVISION              32
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#define I915_PARAM_SUBSLICE_TOTAL	 33
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#define I915_PARAM_SUBSLICE_TOTAL	 33
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#define I915_PARAM_EU_TOTAL		 34
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#define I915_PARAM_EU_TOTAL		 34
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#define I915_PARAM_HAS_GPU_RESET	 35
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#define I915_PARAM_HAS_GPU_RESET	 35
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#define I915_PARAM_HAS_RESOURCE_STREAMER 36
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#define I915_PARAM_HAS_RESOURCE_STREAMER 36
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#define I915_PARAM_HAS_EXEC_SOFTPIN	 37
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typedef struct drm_i915_getparam {
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typedef struct drm_i915_getparam {
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	__s32 param;
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	__s32 param;
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	/*
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	/*
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	/** Required alignment in graphics aperture */
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	/** Required alignment in graphics aperture */
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	__u64 alignment;
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	__u64 alignment;
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	/**
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	 * When the EXEC_OBJECT_PINNED flag is specified this is populated by
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	/**
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	 * the user with the GTT offset at which this object will be pinned.
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	 * When the I915_EXEC_NO_RELOC flag is specified this must contain the
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	 * presumed_offset of the object.
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	 * Returned value of the updated offset of the object, for future
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	 * During execbuffer2 the kernel populates it with the value of the
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	 * presumed_offset writes.
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	 * current GTT offset of the object, for future presumed_offset writes.
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	 */
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	 */
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	__u64 offset;
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	__u64 offset;
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#define EXEC_OBJECT_NEEDS_FENCE (1<<0)
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#define EXEC_OBJECT_NEEDS_FENCE (1<<0)
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#define EXEC_OBJECT_NEEDS_GTT	(1<<1)
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#define EXEC_OBJECT_NEEDS_GTT	(1<<1)
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#define EXEC_OBJECT_WRITE	(1<<2)
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#define EXEC_OBJECT_WRITE	(1<<2)
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#define EXEC_OBJECT_SUPPORTS_48B_ADDRESS (1<<3)
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#define EXEC_OBJECT_SUPPORTS_48B_ADDRESS (1<<3)
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#define EXEC_OBJECT_PINNED	(1<<4)
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#define __EXEC_OBJECT_UNKNOWN_FLAGS -(EXEC_OBJECT_SUPPORTS_48B_ADDRESS<<1)
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#define __EXEC_OBJECT_UNKNOWN_FLAGS -(EXEC_OBJECT_PINNED<<1)
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	__u64 flags;
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	__u64 flags;
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	__u32 ctx_id;
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	__u32 ctx_id;
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	__u32 pad;
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	__u32 pad;
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};
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};
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struct drm_i915_reg_read {
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	/*
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	 * Register offset.
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	 * For 64bit wide registers where the upper 32bits don't immediately
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	 * follow the lower 32bits, the offset of the lower 32bits must
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	 * be specified
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struct drm_i915_reg_read {
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	 */
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	__u64 offset;
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	__u64 offset;
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	__u64 val; /* Return value */
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	__u64 val; /* Return value */
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};
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};
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/* Known registers:
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/* Known registers:
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	__u32 ctx_id;
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	__u32 ctx_id;
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	__u32 size;
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	__u32 size;
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	__u64 param;
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	__u64 param;
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#define I915_CONTEXT_PARAM_BAN_PERIOD 0x1
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#define I915_CONTEXT_PARAM_BAN_PERIOD 0x1
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#define I915_CONTEXT_PARAM_NO_ZEROMAP 0x2
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#define I915_CONTEXT_PARAM_NO_ZEROMAP 0x2
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#define I915_CONTEXT_PARAM_GTT_SIZE	0x3
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	__u64 value;
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	__u64 value;
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};
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};
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