Rev 9078 | Only display areas with differences | Regard whitespace | Details | Blame | Last modification | View Log | RSS feed
Rev 9078 | Rev 9493 | ||
---|---|---|---|
1 | /* |
1 | /* |
2 | * pci.h |
2 | * pci.h |
3 | * |
3 | * |
4 | * PCI defines and function prototypes |
4 | * PCI defines and function prototypes |
5 | * Copyright 1994, Drew Eckhardt |
5 | * Copyright 1994, Drew Eckhardt |
6 | * Copyright 1997--1999 Martin Mares |
6 | * Copyright 1997--1999 Martin Mares |
7 | * |
7 | * |
8 | * For more information, please consult the following manuals (look at |
8 | * For more information, please consult the following manuals (look at |
9 | * http://www.pcisig.com/ for how to get them): |
9 | * http://www.pcisig.com/ for how to get them): |
10 | * |
10 | * |
11 | * PCI BIOS Specification |
11 | * PCI BIOS Specification |
12 | * PCI Local Bus Specification |
12 | * PCI Local Bus Specification |
13 | * PCI to PCI Bridge Specification |
13 | * PCI to PCI Bridge Specification |
14 | * PCI System Design Guide |
14 | * PCI System Design Guide |
15 | */ |
15 | */ |
16 | #ifndef LINUX_PCI_H |
16 | #ifndef LINUX_PCI_H |
17 | #define LINUX_PCI_H |
17 | #define LINUX_PCI_H |
18 | 18 | ||
19 | 19 | ||
20 | #include |
20 | #include |
21 | 21 | ||
22 | #include |
22 | #include |
23 | #include |
23 | #include |
24 | #include |
24 | #include |
25 | #include |
25 | #include |
26 | #include |
26 | #include |
27 | #include |
27 | #include |
28 | #include |
28 | #include |
29 | #include |
29 | #include |
30 | #include |
30 | #include |
31 | #include |
31 | #include |
32 | #include |
32 | #include |
33 | #include |
33 | #include |
34 | 34 | ||
35 | #include |
35 | #include |
36 | #include |
36 | #include |
- | 37 | ||
- | 38 | #ifdef HAVE_ACPICA |
|
- | 39 | #include |
|
- | 40 | #endif |
|
- | 41 | ||
37 | /* |
42 | /* |
38 | * The PCI interface treats multi-function devices as independent |
43 | * The PCI interface treats multi-function devices as independent |
39 | * devices. The slot/function address of each device is encoded |
44 | * devices. The slot/function address of each device is encoded |
40 | * in a single byte as follows: |
45 | * in a single byte as follows: |
41 | * |
46 | * |
42 | * 7:3 = slot |
47 | * 7:3 = slot |
43 | * 2:0 = function |
48 | * 2:0 = function |
44 | * |
49 | * |
45 | * PCI_DEVFN(), PCI_SLOT(), and PCI_FUNC() are defined in uapi/linux/pci.h. |
50 | * PCI_DEVFN(), PCI_SLOT(), and PCI_FUNC() are defined in uapi/linux/pci.h. |
46 | * In the interest of not exposing interfaces to user-space unnecessarily, |
51 | * In the interest of not exposing interfaces to user-space unnecessarily, |
47 | * the following kernel-only defines are being added here. |
52 | * the following kernel-only defines are being added here. |
48 | */ |
53 | */ |
49 | #define PCI_DEVID(bus, devfn) ((((u16)(bus)) << 8) | (devfn)) |
54 | #define PCI_DEVID(bus, devfn) ((((u16)(bus)) << 8) | (devfn)) |
50 | /* return bus from PCI devid = ((u16)bus_number) << 8) | devfn */ |
55 | /* return bus from PCI devid = ((u16)bus_number) << 8) | devfn */ |
51 | #define PCI_BUS_NUM(x) (((x) >> 8) & 0xff) |
56 | #define PCI_BUS_NUM(x) (((x) >> 8) & 0xff) |
- | 57 | ||
- | 58 | #define PCI_CFG_SPACE_SIZE 256 |
|
- | 59 | #define PCI_CFG_SPACE_EXP_SIZE 4096 |
|
- | 60 | ||
- | 61 | enum pci_bar_type { |
|
- | 62 | pci_bar_unknown, /* Standard PCI BAR probe */ |
|
- | 63 | pci_bar_io, /* An io port BAR */ |
|
- | 64 | pci_bar_mem32, /* A 32-bit memory BAR */ |
|
- | 65 | pci_bar_mem64, /* A 64-bit memory BAR */ |
|
- | 66 | }; |
|
52 | 67 | ||
53 | /* pci_slot represents a physical slot */ |
68 | /* pci_slot represents a physical slot */ |
54 | struct pci_slot { |
69 | struct pci_slot { |
55 | struct pci_bus *bus; /* The bus this slot is on */ |
70 | struct pci_bus *bus; /* The bus this slot is on */ |
56 | struct list_head list; /* node in list of slots on this bus */ |
71 | struct list_head list; /* node in list of slots on this bus */ |
57 | struct hotplug_slot *hotplug; /* Hotplug info (migrate over time) */ |
72 | struct hotplug_slot *hotplug; /* Hotplug info (migrate over time) */ |
58 | unsigned char number; /* PCI_SLOT(pci_dev->devfn) */ |
73 | unsigned char number; /* PCI_SLOT(pci_dev->devfn) */ |
59 | struct kobject kobj; |
74 | struct kobject kobj; |
60 | }; |
75 | }; |
61 | 76 | ||
62 | static inline const char *pci_slot_name(const struct pci_slot *slot) |
77 | static inline const char *pci_slot_name(const struct pci_slot *slot) |
63 | { |
78 | { |
64 | return kobject_name(&slot->kobj); |
79 | return kobject_name(&slot->kobj); |
65 | } |
80 | } |
66 | 81 | ||
67 | /* File state for mmap()s on /proc/bus/pci/X/Y */ |
82 | /* File state for mmap()s on /proc/bus/pci/X/Y */ |
68 | enum pci_mmap_state { |
83 | enum pci_mmap_state { |
69 | pci_mmap_io, |
84 | pci_mmap_io, |
70 | pci_mmap_mem |
85 | pci_mmap_mem |
71 | }; |
86 | }; |
72 | 87 | ||
73 | /* This defines the direction arg to the DMA mapping routines. */ |
88 | /* This defines the direction arg to the DMA mapping routines. */ |
74 | #define PCI_DMA_BIDIRECTIONAL 0 |
89 | #define PCI_DMA_BIDIRECTIONAL 0 |
75 | #define PCI_DMA_TODEVICE 1 |
90 | #define PCI_DMA_TODEVICE 1 |
76 | #define PCI_DMA_FROMDEVICE 2 |
91 | #define PCI_DMA_FROMDEVICE 2 |
77 | #define PCI_DMA_NONE 3 |
92 | #define PCI_DMA_NONE 3 |
78 | 93 | ||
79 | /* |
94 | /* |
80 | * For PCI devices, the region numbers are assigned this way: |
95 | * For PCI devices, the region numbers are assigned this way: |
81 | */ |
96 | */ |
82 | enum { |
97 | enum { |
83 | /* #0-5: standard PCI resources */ |
98 | /* #0-5: standard PCI resources */ |
84 | PCI_STD_RESOURCES, |
99 | PCI_STD_RESOURCES, |
85 | PCI_STD_RESOURCE_END = 5, |
100 | PCI_STD_RESOURCE_END = 5, |
86 | 101 | ||
87 | /* #6: expansion ROM resource */ |
102 | /* #6: expansion ROM resource */ |
88 | PCI_ROM_RESOURCE, |
103 | PCI_ROM_RESOURCE, |
89 | 104 | ||
90 | /* device specific resources */ |
105 | /* device specific resources */ |
91 | #ifdef CONFIG_PCI_IOV |
106 | #ifdef CONFIG_PCI_IOV |
92 | PCI_IOV_RESOURCES, |
107 | PCI_IOV_RESOURCES, |
93 | PCI_IOV_RESOURCE_END = PCI_IOV_RESOURCES + PCI_SRIOV_NUM_BARS - 1, |
108 | PCI_IOV_RESOURCE_END = PCI_IOV_RESOURCES + PCI_SRIOV_NUM_BARS - 1, |
94 | #endif |
109 | #endif |
95 | 110 | ||
96 | /* resources assigned to buses behind the bridge */ |
111 | /* resources assigned to buses behind the bridge */ |
97 | #define PCI_BRIDGE_RESOURCE_NUM 4 |
112 | #define PCI_BRIDGE_RESOURCE_NUM 4 |
98 | 113 | ||
99 | PCI_BRIDGE_RESOURCES, |
114 | PCI_BRIDGE_RESOURCES, |
100 | PCI_BRIDGE_RESOURCE_END = PCI_BRIDGE_RESOURCES + |
115 | PCI_BRIDGE_RESOURCE_END = PCI_BRIDGE_RESOURCES + |
101 | PCI_BRIDGE_RESOURCE_NUM - 1, |
116 | PCI_BRIDGE_RESOURCE_NUM - 1, |
102 | 117 | ||
103 | /* total resources associated with a PCI device */ |
118 | /* total resources associated with a PCI device */ |
104 | PCI_NUM_RESOURCES, |
119 | PCI_NUM_RESOURCES, |
105 | 120 | ||
106 | /* preserve this for compatibility */ |
121 | /* preserve this for compatibility */ |
107 | DEVICE_COUNT_RESOURCE = PCI_NUM_RESOURCES, |
122 | DEVICE_COUNT_RESOURCE = PCI_NUM_RESOURCES, |
108 | }; |
123 | }; |
109 | 124 | ||
110 | typedef int __bitwise pci_power_t; |
125 | typedef int __bitwise pci_power_t; |
111 | 126 | ||
112 | #define PCI_D0 ((pci_power_t __force) 0) |
127 | #define PCI_D0 ((pci_power_t __force) 0) |
113 | #define PCI_D1 ((pci_power_t __force) 1) |
128 | #define PCI_D1 ((pci_power_t __force) 1) |
114 | #define PCI_D2 ((pci_power_t __force) 2) |
129 | #define PCI_D2 ((pci_power_t __force) 2) |
115 | #define PCI_D3hot ((pci_power_t __force) 3) |
130 | #define PCI_D3hot ((pci_power_t __force) 3) |
116 | #define PCI_D3cold ((pci_power_t __force) 4) |
131 | #define PCI_D3cold ((pci_power_t __force) 4) |
117 | #define PCI_UNKNOWN ((pci_power_t __force) 5) |
132 | #define PCI_UNKNOWN ((pci_power_t __force) 5) |
118 | #define PCI_POWER_ERROR ((pci_power_t __force) -1) |
133 | #define PCI_POWER_ERROR ((pci_power_t __force) -1) |
119 | 134 | ||
120 | /* Remember to update this when the list above changes! */ |
135 | /* Remember to update this when the list above changes! */ |
121 | extern const char *pci_power_names[]; |
136 | extern const char *pci_power_names[]; |
122 | 137 | ||
123 | static inline const char *pci_power_name(pci_power_t state) |
138 | static inline const char *pci_power_name(pci_power_t state) |
124 | { |
139 | { |
125 | return pci_power_names[1 + (int) state]; |
140 | return pci_power_names[1 + (int) state]; |
126 | } |
141 | } |
127 | 142 | ||
128 | #define PCI_PM_D2_DELAY 200 |
143 | #define PCI_PM_D2_DELAY 200 |
129 | #define PCI_PM_D3_WAIT 10 |
144 | #define PCI_PM_D3_WAIT 10 |
130 | #define PCI_PM_D3COLD_WAIT 100 |
145 | #define PCI_PM_D3COLD_WAIT 100 |
131 | #define PCI_PM_BUS_WAIT 50 |
146 | #define PCI_PM_BUS_WAIT 50 |
132 | 147 | ||
133 | /** The pci_channel state describes connectivity between the CPU and |
148 | /** The pci_channel state describes connectivity between the CPU and |
134 | * the pci device. If some PCI bus between here and the pci device |
149 | * the pci device. If some PCI bus between here and the pci device |
135 | * has crashed or locked up, this info is reflected here. |
150 | * has crashed or locked up, this info is reflected here. |
136 | */ |
151 | */ |
137 | typedef unsigned int __bitwise pci_channel_state_t; |
152 | typedef unsigned int __bitwise pci_channel_state_t; |
138 | 153 | ||
139 | enum pci_channel_state { |
154 | enum pci_channel_state { |
140 | /* I/O channel is in normal state */ |
155 | /* I/O channel is in normal state */ |
141 | pci_channel_io_normal = (__force pci_channel_state_t) 1, |
156 | pci_channel_io_normal = (__force pci_channel_state_t) 1, |
142 | 157 | ||
143 | /* I/O to channel is blocked */ |
158 | /* I/O to channel is blocked */ |
144 | pci_channel_io_frozen = (__force pci_channel_state_t) 2, |
159 | pci_channel_io_frozen = (__force pci_channel_state_t) 2, |
145 | 160 | ||
146 | /* PCI card is dead */ |
161 | /* PCI card is dead */ |
147 | pci_channel_io_perm_failure = (__force pci_channel_state_t) 3, |
162 | pci_channel_io_perm_failure = (__force pci_channel_state_t) 3, |
148 | }; |
163 | }; |
149 | 164 | ||
150 | typedef unsigned int __bitwise pcie_reset_state_t; |
165 | typedef unsigned int __bitwise pcie_reset_state_t; |
151 | 166 | ||
152 | enum pcie_reset_state { |
167 | enum pcie_reset_state { |
153 | /* Reset is NOT asserted (Use to deassert reset) */ |
168 | /* Reset is NOT asserted (Use to deassert reset) */ |
154 | pcie_deassert_reset = (__force pcie_reset_state_t) 1, |
169 | pcie_deassert_reset = (__force pcie_reset_state_t) 1, |
155 | 170 | ||
156 | /* Use #PERST to reset PCIe device */ |
171 | /* Use #PERST to reset PCIe device */ |
157 | pcie_warm_reset = (__force pcie_reset_state_t) 2, |
172 | pcie_warm_reset = (__force pcie_reset_state_t) 2, |
158 | 173 | ||
159 | /* Use PCIe Hot Reset to reset device */ |
174 | /* Use PCIe Hot Reset to reset device */ |
160 | pcie_hot_reset = (__force pcie_reset_state_t) 3 |
175 | pcie_hot_reset = (__force pcie_reset_state_t) 3 |
161 | }; |
176 | }; |
162 | 177 | ||
163 | typedef unsigned short __bitwise pci_dev_flags_t; |
178 | typedef unsigned short __bitwise pci_dev_flags_t; |
164 | enum pci_dev_flags { |
179 | enum pci_dev_flags { |
165 | /* INTX_DISABLE in PCI_COMMAND register disables MSI |
180 | /* INTX_DISABLE in PCI_COMMAND register disables MSI |
166 | * generation too. |
181 | * generation too. |
167 | */ |
182 | */ |
168 | PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) (1 << 0), |
183 | PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) (1 << 0), |
169 | /* Device configuration is irrevocably lost if disabled into D3 */ |
184 | /* Device configuration is irrevocably lost if disabled into D3 */ |
170 | PCI_DEV_FLAGS_NO_D3 = (__force pci_dev_flags_t) (1 << 1), |
185 | PCI_DEV_FLAGS_NO_D3 = (__force pci_dev_flags_t) (1 << 1), |
171 | /* Provide indication device is assigned by a Virtual Machine Manager */ |
186 | /* Provide indication device is assigned by a Virtual Machine Manager */ |
172 | PCI_DEV_FLAGS_ASSIGNED = (__force pci_dev_flags_t) (1 << 2), |
187 | PCI_DEV_FLAGS_ASSIGNED = (__force pci_dev_flags_t) (1 << 2), |
173 | /* Flag for quirk use to store if quirk-specific ACS is enabled */ |
188 | /* Flag for quirk use to store if quirk-specific ACS is enabled */ |
174 | PCI_DEV_FLAGS_ACS_ENABLED_QUIRK = (__force pci_dev_flags_t) (1 << 3), |
189 | PCI_DEV_FLAGS_ACS_ENABLED_QUIRK = (__force pci_dev_flags_t) (1 << 3), |
175 | /* Flag to indicate the device uses dma_alias_devfn */ |
190 | /* Flag to indicate the device uses dma_alias_devfn */ |
176 | PCI_DEV_FLAGS_DMA_ALIAS_DEVFN = (__force pci_dev_flags_t) (1 << 4), |
191 | PCI_DEV_FLAGS_DMA_ALIAS_DEVFN = (__force pci_dev_flags_t) (1 << 4), |
177 | /* Use a PCIe-to-PCI bridge alias even if !pci_is_pcie */ |
192 | /* Use a PCIe-to-PCI bridge alias even if !pci_is_pcie */ |
178 | PCI_DEV_FLAG_PCIE_BRIDGE_ALIAS = (__force pci_dev_flags_t) (1 << 5), |
193 | PCI_DEV_FLAG_PCIE_BRIDGE_ALIAS = (__force pci_dev_flags_t) (1 << 5), |
179 | /* Do not use bus resets for device */ |
194 | /* Do not use bus resets for device */ |
180 | PCI_DEV_FLAGS_NO_BUS_RESET = (__force pci_dev_flags_t) (1 << 6), |
195 | PCI_DEV_FLAGS_NO_BUS_RESET = (__force pci_dev_flags_t) (1 << 6), |
181 | /* Do not use PM reset even if device advertises NoSoftRst- */ |
196 | /* Do not use PM reset even if device advertises NoSoftRst- */ |
182 | PCI_DEV_FLAGS_NO_PM_RESET = (__force pci_dev_flags_t) (1 << 7), |
197 | PCI_DEV_FLAGS_NO_PM_RESET = (__force pci_dev_flags_t) (1 << 7), |
183 | /* Get VPD from function 0 VPD */ |
198 | /* Get VPD from function 0 VPD */ |
184 | PCI_DEV_FLAGS_VPD_REF_F0 = (__force pci_dev_flags_t) (1 << 8), |
199 | PCI_DEV_FLAGS_VPD_REF_F0 = (__force pci_dev_flags_t) (1 << 8), |
185 | }; |
200 | }; |
186 | 201 | ||
187 | enum pci_irq_reroute_variant { |
202 | enum pci_irq_reroute_variant { |
188 | INTEL_IRQ_REROUTE_VARIANT = 1, |
203 | INTEL_IRQ_REROUTE_VARIANT = 1, |
189 | MAX_IRQ_REROUTE_VARIANTS = 3 |
204 | MAX_IRQ_REROUTE_VARIANTS = 3 |
190 | }; |
205 | }; |
191 | 206 | ||
192 | typedef unsigned short __bitwise pci_bus_flags_t; |
207 | typedef unsigned short __bitwise pci_bus_flags_t; |
193 | enum pci_bus_flags { |
208 | enum pci_bus_flags { |
194 | PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1, |
209 | PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1, |
195 | PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2, |
210 | PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2, |
196 | }; |
211 | }; |
197 | 212 | ||
198 | /* These values come from the PCI Express Spec */ |
213 | /* These values come from the PCI Express Spec */ |
199 | enum pcie_link_width { |
214 | enum pcie_link_width { |
200 | PCIE_LNK_WIDTH_RESRV = 0x00, |
215 | PCIE_LNK_WIDTH_RESRV = 0x00, |
201 | PCIE_LNK_X1 = 0x01, |
216 | PCIE_LNK_X1 = 0x01, |
202 | PCIE_LNK_X2 = 0x02, |
217 | PCIE_LNK_X2 = 0x02, |
203 | PCIE_LNK_X4 = 0x04, |
218 | PCIE_LNK_X4 = 0x04, |
204 | PCIE_LNK_X8 = 0x08, |
219 | PCIE_LNK_X8 = 0x08, |
205 | PCIE_LNK_X12 = 0x0C, |
220 | PCIE_LNK_X12 = 0x0C, |
206 | PCIE_LNK_X16 = 0x10, |
221 | PCIE_LNK_X16 = 0x10, |
207 | PCIE_LNK_X32 = 0x20, |
222 | PCIE_LNK_X32 = 0x20, |
208 | PCIE_LNK_WIDTH_UNKNOWN = 0xFF, |
223 | PCIE_LNK_WIDTH_UNKNOWN = 0xFF, |
209 | }; |
224 | }; |
210 | 225 | ||
211 | /* Based on the PCI Hotplug Spec, but some values are made up by us */ |
226 | /* Based on the PCI Hotplug Spec, but some values are made up by us */ |
212 | enum pci_bus_speed { |
227 | enum pci_bus_speed { |
213 | PCI_SPEED_33MHz = 0x00, |
228 | PCI_SPEED_33MHz = 0x00, |
214 | PCI_SPEED_66MHz = 0x01, |
229 | PCI_SPEED_66MHz = 0x01, |
215 | PCI_SPEED_66MHz_PCIX = 0x02, |
230 | PCI_SPEED_66MHz_PCIX = 0x02, |
216 | PCI_SPEED_100MHz_PCIX = 0x03, |
231 | PCI_SPEED_100MHz_PCIX = 0x03, |
217 | PCI_SPEED_133MHz_PCIX = 0x04, |
232 | PCI_SPEED_133MHz_PCIX = 0x04, |
218 | PCI_SPEED_66MHz_PCIX_ECC = 0x05, |
233 | PCI_SPEED_66MHz_PCIX_ECC = 0x05, |
219 | PCI_SPEED_100MHz_PCIX_ECC = 0x06, |
234 | PCI_SPEED_100MHz_PCIX_ECC = 0x06, |
220 | PCI_SPEED_133MHz_PCIX_ECC = 0x07, |
235 | PCI_SPEED_133MHz_PCIX_ECC = 0x07, |
221 | PCI_SPEED_66MHz_PCIX_266 = 0x09, |
236 | PCI_SPEED_66MHz_PCIX_266 = 0x09, |
222 | PCI_SPEED_100MHz_PCIX_266 = 0x0a, |
237 | PCI_SPEED_100MHz_PCIX_266 = 0x0a, |
223 | PCI_SPEED_133MHz_PCIX_266 = 0x0b, |
238 | PCI_SPEED_133MHz_PCIX_266 = 0x0b, |
224 | AGP_UNKNOWN = 0x0c, |
239 | AGP_UNKNOWN = 0x0c, |
225 | AGP_1X = 0x0d, |
240 | AGP_1X = 0x0d, |
226 | AGP_2X = 0x0e, |
241 | AGP_2X = 0x0e, |
227 | AGP_4X = 0x0f, |
242 | AGP_4X = 0x0f, |
228 | AGP_8X = 0x10, |
243 | AGP_8X = 0x10, |
229 | PCI_SPEED_66MHz_PCIX_533 = 0x11, |
244 | PCI_SPEED_66MHz_PCIX_533 = 0x11, |
230 | PCI_SPEED_100MHz_PCIX_533 = 0x12, |
245 | PCI_SPEED_100MHz_PCIX_533 = 0x12, |
231 | PCI_SPEED_133MHz_PCIX_533 = 0x13, |
246 | PCI_SPEED_133MHz_PCIX_533 = 0x13, |
232 | PCIE_SPEED_2_5GT = 0x14, |
247 | PCIE_SPEED_2_5GT = 0x14, |
233 | PCIE_SPEED_5_0GT = 0x15, |
248 | PCIE_SPEED_5_0GT = 0x15, |
234 | PCIE_SPEED_8_0GT = 0x16, |
249 | PCIE_SPEED_8_0GT = 0x16, |
235 | PCI_SPEED_UNKNOWN = 0xff, |
250 | PCI_SPEED_UNKNOWN = 0xff, |
236 | }; |
251 | }; |
237 | 252 | ||
238 | struct pci_cap_saved_data { |
253 | struct pci_cap_saved_data { |
239 | u16 cap_nr; |
254 | u16 cap_nr; |
240 | bool cap_extended; |
255 | bool cap_extended; |
241 | unsigned int size; |
256 | unsigned int size; |
242 | u32 data[0]; |
257 | u32 data[0]; |
243 | }; |
258 | }; |
244 | 259 | ||
245 | struct pci_cap_saved_state { |
260 | struct pci_cap_saved_state { |
246 | struct hlist_node next; |
261 | struct hlist_node next; |
247 | struct pci_cap_saved_data cap; |
262 | struct pci_cap_saved_data cap; |
248 | }; |
263 | }; |
249 | 264 | ||
250 | struct pcie_link_state; |
265 | struct pcie_link_state; |
251 | struct pci_vpd; |
266 | struct pci_vpd; |
252 | struct pci_sriov; |
267 | struct pci_sriov; |
253 | struct pci_ats; |
268 | struct pci_ats; |
254 | 269 | ||
255 | /* |
270 | /* |
256 | * The pci_dev structure is used to describe PCI devices. |
271 | * The pci_dev structure is used to describe PCI devices. |
257 | */ |
272 | */ |
258 | struct pci_dev { |
273 | struct pci_dev { |
259 | struct list_head bus_list; /* node in per-bus list */ |
274 | struct list_head bus_list; /* node in per-bus list */ |
260 | struct pci_bus *bus; /* bus this device is on */ |
275 | struct pci_bus *bus; /* bus this device is on */ |
261 | struct pci_bus *subordinate; /* bus this device bridges to */ |
276 | struct pci_bus *subordinate; /* bus this device bridges to */ |
262 | 277 | ||
263 | void *sysdata; /* hook for sys-specific extension */ |
278 | void *sysdata; /* hook for sys-specific extension */ |
264 | // struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */ |
279 | // struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */ |
265 | struct pci_slot *slot; /* Physical slot this device is in */ |
280 | struct pci_slot *slot; /* Physical slot this device is in */ |
266 | u32 busnr; |
281 | u32 busnr; |
267 | unsigned int devfn; /* encoded device & function index */ |
282 | unsigned int devfn; /* encoded device & function index */ |
268 | unsigned short vendor; |
283 | unsigned short vendor; |
269 | unsigned short device; |
284 | unsigned short device; |
270 | unsigned short subsystem_vendor; |
285 | unsigned short subsystem_vendor; |
271 | unsigned short subsystem_device; |
286 | unsigned short subsystem_device; |
272 | unsigned int class; /* 3 bytes: (base,sub,prog-if) */ |
287 | unsigned int class; /* 3 bytes: (base,sub,prog-if) */ |
273 | u8 revision; /* PCI revision, low byte of class word */ |
288 | u8 revision; /* PCI revision, low byte of class word */ |
274 | u8 hdr_type; /* PCI header type (`multi' flag masked out) */ |
289 | u8 hdr_type; /* PCI header type (`multi' flag masked out) */ |
275 | u8 pcie_cap; /* PCIe capability offset */ |
290 | u8 pcie_cap; /* PCIe capability offset */ |
276 | u8 msi_cap; /* MSI capability offset */ |
291 | u8 msi_cap; /* MSI capability offset */ |
277 | u8 msix_cap; /* MSI-X capability offset */ |
292 | u8 msix_cap; /* MSI-X capability offset */ |
278 | u8 pcie_mpss:3; /* PCIe Max Payload Size Supported */ |
293 | u8 pcie_mpss:3; /* PCIe Max Payload Size Supported */ |
279 | u8 rom_base_reg; /* which config register controls the ROM */ |
294 | u8 rom_base_reg; /* which config register controls the ROM */ |
280 | u8 pin; /* which interrupt pin this device uses */ |
295 | u8 pin; /* which interrupt pin this device uses */ |
281 | u16 pcie_flags_reg; /* cached PCIe Capabilities Register */ |
296 | u16 pcie_flags_reg; /* cached PCIe Capabilities Register */ |
- | 297 | int pcie_type; |
|
282 | u8 dma_alias_devfn;/* devfn of DMA alias, if any */ |
298 | u8 dma_alias_devfn;/* devfn of DMA alias, if any */ |
283 | 299 | ||
284 | u64 dma_mask; /* Mask of the bits of bus address this |
300 | u64 dma_mask; /* Mask of the bits of bus address this |
285 | device implements. Normally this is |
301 | device implements. Normally this is |
286 | 0xffffffff. You only need to change |
302 | 0xffffffff. You only need to change |
287 | this if your device has broken DMA |
303 | this if your device has broken DMA |
288 | or supports 64-bit transfers. */ |
304 | or supports 64-bit transfers. */ |
289 | 305 | ||
290 | 306 | ||
291 | pci_power_t current_state; /* Current operating state. In ACPI-speak, |
307 | pci_power_t current_state; /* Current operating state. In ACPI-speak, |
292 | this is D0-D3, D0 being fully functional, |
308 | this is D0-D3, D0 being fully functional, |
293 | and D3 being off. */ |
309 | and D3 being off. */ |
294 | u8 pm_cap; /* PM capability offset */ |
310 | u8 pm_cap; /* PM capability offset */ |
295 | unsigned int pme_support:5; /* Bitmask of states from which PME# |
311 | unsigned int pme_support:5; /* Bitmask of states from which PME# |
296 | can be generated */ |
312 | can be generated */ |
297 | unsigned int pme_interrupt:1; |
313 | unsigned int pme_interrupt:1; |
298 | unsigned int pme_poll:1; /* Poll device's PME status bit */ |
314 | unsigned int pme_poll:1; /* Poll device's PME status bit */ |
299 | unsigned int d1_support:1; /* Low power state D1 is supported */ |
315 | unsigned int d1_support:1; /* Low power state D1 is supported */ |
300 | unsigned int d2_support:1; /* Low power state D2 is supported */ |
316 | unsigned int d2_support:1; /* Low power state D2 is supported */ |
301 | unsigned int no_d1d2:1; /* D1 and D2 are forbidden */ |
317 | unsigned int no_d1d2:1; /* D1 and D2 are forbidden */ |
302 | unsigned int no_d3cold:1; /* D3cold is forbidden */ |
318 | unsigned int no_d3cold:1; /* D3cold is forbidden */ |
303 | unsigned int d3cold_allowed:1; /* D3cold is allowed by user */ |
319 | unsigned int d3cold_allowed:1; /* D3cold is allowed by user */ |
304 | unsigned int mmio_always_on:1; /* disallow turning off io/mem |
320 | unsigned int mmio_always_on:1; /* disallow turning off io/mem |
305 | decoding during bar sizing */ |
321 | decoding during bar sizing */ |
306 | unsigned int wakeup_prepared:1; |
322 | unsigned int wakeup_prepared:1; |
307 | unsigned int runtime_d3cold:1; /* whether go through runtime |
323 | unsigned int runtime_d3cold:1; /* whether go through runtime |
308 | D3cold, not set for devices |
324 | D3cold, not set for devices |
309 | powered on/off by the |
325 | powered on/off by the |
310 | corresponding bridge */ |
326 | corresponding bridge */ |
311 | unsigned int ignore_hotplug:1; /* Ignore hotplug events */ |
327 | unsigned int ignore_hotplug:1; /* Ignore hotplug events */ |
312 | unsigned int d3_delay; /* D3->D0 transition time in ms */ |
328 | unsigned int d3_delay; /* D3->D0 transition time in ms */ |
313 | unsigned int d3cold_delay; /* D3cold->D0 transition time in ms */ |
329 | unsigned int d3cold_delay; /* D3cold->D0 transition time in ms */ |
314 | 330 | ||
315 | #ifdef CONFIG_PCIEASPM |
331 | #ifdef CONFIG_PCIEASPM |
316 | struct pcie_link_state *link_state; /* ASPM link state */ |
332 | struct pcie_link_state *link_state; /* ASPM link state */ |
317 | #endif |
333 | #endif |
318 | 334 | ||
319 | pci_channel_state_t error_state; /* current connectivity state */ |
335 | pci_channel_state_t error_state; /* current connectivity state */ |
320 | struct device dev; /* Generic device interface */ |
336 | struct device dev; /* Generic device interface */ |
321 | 337 | ||
322 | int cfg_size; /* Size of configuration space */ |
338 | int cfg_size; /* Size of configuration space */ |
323 | 339 | ||
324 | /* |
340 | /* |
325 | * Instead of touching interrupt line and base address registers |
341 | * Instead of touching interrupt line and base address registers |
326 | * directly, use the values stored here. They might be different! |
342 | * directly, use the values stored here. They might be different! |
327 | */ |
343 | */ |
328 | unsigned int irq; |
344 | unsigned int irq; |
329 | struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */ |
345 | struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */ |
330 | 346 | ||
331 | bool match_driver; /* Skip attaching driver */ |
347 | bool match_driver; /* Skip attaching driver */ |
332 | /* These fields are used by common fixups */ |
348 | /* These fields are used by common fixups */ |
333 | unsigned int transparent:1; /* Subtractive decode PCI bridge */ |
349 | unsigned int transparent:1; /* Subtractive decode PCI bridge */ |
334 | unsigned int multifunction:1;/* Part of multi-function device */ |
350 | unsigned int multifunction:1;/* Part of multi-function device */ |
335 | /* keep track of device state */ |
351 | /* keep track of device state */ |
336 | unsigned int is_added:1; |
352 | unsigned int is_added:1; |
337 | unsigned int is_busmaster:1; /* device is busmaster */ |
353 | unsigned int is_busmaster:1; /* device is busmaster */ |
338 | unsigned int no_msi:1; /* device may not use msi */ |
354 | unsigned int no_msi:1; /* device may not use msi */ |
339 | unsigned int no_64bit_msi:1; /* device may only use 32-bit MSIs */ |
355 | unsigned int no_64bit_msi:1; /* device may only use 32-bit MSIs */ |
340 | unsigned int block_cfg_access:1; /* config space access is blocked */ |
356 | unsigned int block_cfg_access:1; /* config space access is blocked */ |
341 | unsigned int broken_parity_status:1; /* Device generates false positive parity */ |
357 | unsigned int broken_parity_status:1; /* Device generates false positive parity */ |
342 | unsigned int irq_reroute_variant:2; /* device needs IRQ rerouting variant */ |
358 | unsigned int irq_reroute_variant:2; /* device needs IRQ rerouting variant */ |
343 | unsigned int msi_enabled:1; |
359 | unsigned int msi_enabled:1; |
344 | unsigned int msix_enabled:1; |
360 | unsigned int msix_enabled:1; |
345 | unsigned int ari_enabled:1; /* ARI forwarding */ |
361 | unsigned int ari_enabled:1; /* ARI forwarding */ |
346 | unsigned int ats_enabled:1; /* Address Translation Service */ |
362 | unsigned int ats_enabled:1; /* Address Translation Service */ |
347 | unsigned int is_managed:1; |
363 | unsigned int is_managed:1; |
348 | unsigned int needs_freset:1; /* Dev requires fundamental reset */ |
364 | unsigned int needs_freset:1; /* Dev requires fundamental reset */ |
349 | unsigned int state_saved:1; |
365 | unsigned int state_saved:1; |
350 | unsigned int is_physfn:1; |
366 | unsigned int is_physfn:1; |
351 | unsigned int is_virtfn:1; |
367 | unsigned int is_virtfn:1; |
352 | unsigned int reset_fn:1; |
368 | unsigned int reset_fn:1; |
353 | unsigned int is_hotplug_bridge:1; |
369 | unsigned int is_hotplug_bridge:1; |
354 | unsigned int __aer_firmware_first_valid:1; |
370 | unsigned int __aer_firmware_first_valid:1; |
355 | unsigned int __aer_firmware_first:1; |
371 | unsigned int __aer_firmware_first:1; |
356 | unsigned int broken_intx_masking:1; |
372 | unsigned int broken_intx_masking:1; |
357 | unsigned int io_window_1k:1; /* Intel P2P bridge 1K I/O windows */ |
373 | unsigned int io_window_1k:1; /* Intel P2P bridge 1K I/O windows */ |
358 | unsigned int irq_managed:1; |
374 | unsigned int irq_managed:1; |
359 | unsigned int has_secondary_link:1; |
375 | unsigned int has_secondary_link:1; |
360 | unsigned int non_compliant_bars:1; /* broken BARs; ignore them */ |
376 | unsigned int non_compliant_bars:1; /* broken BARs; ignore them */ |
361 | pci_dev_flags_t dev_flags; |
377 | pci_dev_flags_t dev_flags; |
362 | atomic_t enable_cnt; /* pci_enable_device has been called */ |
378 | atomic_t enable_cnt; /* pci_enable_device has been called */ |
363 | 379 | ||
364 | u32 saved_config_space[16]; /* config space saved at suspend time */ |
380 | u32 saved_config_space[16]; /* config space saved at suspend time */ |
365 | struct hlist_head saved_cap_space; |
381 | struct hlist_head saved_cap_space; |
366 | struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */ |
382 | struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */ |
367 | int rom_attr_enabled; /* has display of the rom attribute been enabled? */ |
383 | int rom_attr_enabled; /* has display of the rom attribute been enabled? */ |
368 | #ifdef CONFIG_PCI_MSI |
384 | #ifdef CONFIG_PCI_MSI |
369 | const struct attribute_group **msi_irq_groups; |
385 | const struct attribute_group **msi_irq_groups; |
370 | #endif |
386 | #endif |
371 | #ifdef CONFIG_PCI_ATS |
387 | #ifdef CONFIG_PCI_ATS |
372 | union { |
388 | union { |
373 | struct pci_sriov *sriov; /* SR-IOV capability related */ |
389 | struct pci_sriov *sriov; /* SR-IOV capability related */ |
374 | struct pci_dev *physfn; /* the PF this VF is associated with */ |
390 | struct pci_dev *physfn; /* the PF this VF is associated with */ |
375 | }; |
391 | }; |
376 | u16 ats_cap; /* ATS Capability offset */ |
392 | u16 ats_cap; /* ATS Capability offset */ |
377 | u8 ats_stu; /* ATS Smallest Translation Unit */ |
393 | u8 ats_stu; /* ATS Smallest Translation Unit */ |
378 | atomic_t ats_ref_cnt; /* number of VFs with ATS enabled */ |
394 | atomic_t ats_ref_cnt; /* number of VFs with ATS enabled */ |
379 | #endif |
395 | #endif |
380 | phys_addr_t rom; /* Physical address of ROM if it's not from the BAR */ |
396 | phys_addr_t rom; /* Physical address of ROM if it's not from the BAR */ |
381 | size_t romlen; /* Length of ROM if it's not from the BAR */ |
397 | size_t romlen; /* Length of ROM if it's not from the BAR */ |
382 | char *driver_override; /* Driver name to force a match */ |
398 | char *driver_override; /* Driver name to force a match */ |
- | 399 | #ifdef HAVE_ACPICA |
|
- | 400 | struct acpi_device *acpi_dev; |
|
- | 401 | #endif |
|
383 | }; |
402 | }; |
384 | 403 | ||
385 | static inline struct pci_dev *pci_physfn(struct pci_dev *dev) |
404 | static inline struct pci_dev *pci_physfn(struct pci_dev *dev) |
386 | { |
405 | { |
387 | #ifdef CONFIG_PCI_IOV |
406 | #ifdef CONFIG_PCI_IOV |
388 | if (dev->is_virtfn) |
407 | if (dev->is_virtfn) |
389 | dev = dev->physfn; |
408 | dev = dev->physfn; |
390 | #endif |
409 | #endif |
391 | return dev; |
410 | return dev; |
392 | } |
411 | } |
393 | 412 | ||
394 | struct pci_dev *pci_alloc_dev(struct pci_bus *bus); |
413 | struct pci_dev *pci_alloc_dev(struct pci_bus *bus); |
395 | 414 | ||
396 | #define to_pci_dev(n) container_of(n, struct pci_dev, dev) |
415 | #define to_pci_dev(n) container_of(n, struct pci_dev, dev) |
397 | #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL) |
416 | #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL) |
398 | 417 | ||
399 | static inline int pci_channel_offline(struct pci_dev *pdev) |
418 | static inline int pci_channel_offline(struct pci_dev *pdev) |
400 | { |
419 | { |
401 | return (pdev->error_state != pci_channel_io_normal); |
420 | return (pdev->error_state != pci_channel_io_normal); |
402 | } |
421 | } |
403 | 422 | ||
404 | struct pci_host_bridge { |
423 | struct pci_host_bridge { |
405 | struct device dev; |
424 | struct device dev; |
406 | struct pci_bus *bus; /* root bus */ |
425 | struct pci_bus *bus; /* root bus */ |
407 | struct list_head windows; /* resource_entry */ |
426 | struct list_head windows; /* resource_entry */ |
408 | void (*release_fn)(struct pci_host_bridge *); |
427 | void (*release_fn)(struct pci_host_bridge *); |
409 | void *release_data; |
428 | void *release_data; |
410 | unsigned int ignore_reset_delay:1; /* for entire hierarchy */ |
429 | unsigned int ignore_reset_delay:1; /* for entire hierarchy */ |
411 | /* Resource alignment requirements */ |
430 | /* Resource alignment requirements */ |
412 | resource_size_t (*align_resource)(struct pci_dev *dev, |
431 | resource_size_t (*align_resource)(struct pci_dev *dev, |
413 | const struct resource *res, |
432 | const struct resource *res, |
414 | resource_size_t start, |
433 | resource_size_t start, |
415 | resource_size_t size, |
434 | resource_size_t size, |
416 | resource_size_t align); |
435 | resource_size_t align); |
417 | }; |
436 | }; |
418 | 437 | ||
419 | #define to_pci_host_bridge(n) container_of(n, struct pci_host_bridge, dev) |
438 | #define to_pci_host_bridge(n) container_of(n, struct pci_host_bridge, dev) |
420 | 439 | ||
421 | struct pci_host_bridge *pci_find_host_bridge(struct pci_bus *bus); |
440 | struct pci_host_bridge *pci_find_host_bridge(struct pci_bus *bus); |
422 | 441 | ||
423 | void pci_set_host_bridge_release(struct pci_host_bridge *bridge, |
442 | void pci_set_host_bridge_release(struct pci_host_bridge *bridge, |
424 | void (*release_fn)(struct pci_host_bridge *), |
443 | void (*release_fn)(struct pci_host_bridge *), |
425 | void *release_data); |
444 | void *release_data); |
426 | 445 | ||
427 | int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge); |
446 | int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge); |
428 | 447 | ||
429 | /* |
448 | /* |
430 | * The first PCI_BRIDGE_RESOURCE_NUM PCI bus resources (those that correspond |
449 | * The first PCI_BRIDGE_RESOURCE_NUM PCI bus resources (those that correspond |
431 | * to P2P or CardBus bridge windows) go in a table. Additional ones (for |
450 | * to P2P or CardBus bridge windows) go in a table. Additional ones (for |
432 | * buses below host bridges or subtractive decode bridges) go in the list. |
451 | * buses below host bridges or subtractive decode bridges) go in the list. |
433 | * Use pci_bus_for_each_resource() to iterate through all the resources. |
452 | * Use pci_bus_for_each_resource() to iterate through all the resources. |
434 | */ |
453 | */ |
435 | 454 | ||
436 | /* |
455 | /* |
437 | * PCI_SUBTRACTIVE_DECODE means the bridge forwards the window implicitly |
456 | * PCI_SUBTRACTIVE_DECODE means the bridge forwards the window implicitly |
438 | * and there's no way to program the bridge with the details of the window. |
457 | * and there's no way to program the bridge with the details of the window. |
439 | * This does not apply to ACPI _CRS windows, even with the _DEC subtractive- |
458 | * This does not apply to ACPI _CRS windows, even with the _DEC subtractive- |
440 | * decode bit set, because they are explicit and can be programmed with _SRS. |
459 | * decode bit set, because they are explicit and can be programmed with _SRS. |
441 | */ |
460 | */ |
442 | #define PCI_SUBTRACTIVE_DECODE 0x1 |
461 | #define PCI_SUBTRACTIVE_DECODE 0x1 |
443 | 462 | ||
444 | struct pci_bus_resource { |
463 | struct pci_bus_resource { |
445 | struct list_head list; |
464 | struct list_head list; |
446 | struct resource *res; |
465 | struct resource *res; |
447 | unsigned int flags; |
466 | unsigned int flags; |
448 | }; |
467 | }; |
449 | 468 | ||
450 | #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */ |
469 | #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */ |
451 | 470 | ||
452 | struct pci_bus { |
471 | struct pci_bus { |
453 | struct list_head node; /* node in list of buses */ |
472 | struct list_head node; /* node in list of buses */ |
454 | struct pci_bus *parent; /* parent bus this bridge is on */ |
473 | struct pci_bus *parent; /* parent bus this bridge is on */ |
- | 474 | struct pci_bus *subordinate; |
|
- | 475 | struct pci_bus *secondary; |
|
455 | struct list_head children; /* list of child buses */ |
476 | struct list_head children; /* list of child buses */ |
456 | struct list_head devices; /* list of devices on this bus */ |
477 | struct list_head devices; /* list of devices on this bus */ |
457 | struct pci_dev *self; /* bridge device as seen by parent */ |
478 | struct pci_dev *self; /* bridge device as seen by parent */ |
458 | struct list_head slots; /* list of slots on this bus; |
479 | struct list_head slots; /* list of slots on this bus; |
459 | protected by pci_slot_mutex */ |
480 | protected by pci_slot_mutex */ |
460 | struct resource *resource[PCI_BRIDGE_RESOURCE_NUM]; |
481 | struct resource *resource[PCI_BRIDGE_RESOURCE_NUM]; |
461 | struct list_head resources; /* address space routed to this bus */ |
482 | struct list_head resources; /* address space routed to this bus */ |
462 | struct resource busn_res; /* bus numbers routed to this bus */ |
483 | struct resource busn_res; /* bus numbers routed to this bus */ |
463 | 484 | ||
464 | struct pci_ops *ops; /* configuration access functions */ |
485 | struct pci_ops *ops; /* configuration access functions */ |
465 | struct msi_controller *msi; /* MSI controller */ |
486 | struct msi_controller *msi; /* MSI controller */ |
466 | void *sysdata; /* hook for sys-specific extension */ |
487 | void *sysdata; /* hook for sys-specific extension */ |
467 | struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */ |
488 | struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */ |
468 | 489 | ||
469 | unsigned char number; /* bus number */ |
490 | unsigned char number; /* bus number */ |
470 | unsigned char primary; /* number of primary bridge */ |
491 | unsigned char primary; /* number of primary bridge */ |
471 | unsigned char max_bus_speed; /* enum pci_bus_speed */ |
492 | unsigned char max_bus_speed; /* enum pci_bus_speed */ |
472 | unsigned char cur_bus_speed; /* enum pci_bus_speed */ |
493 | unsigned char cur_bus_speed; /* enum pci_bus_speed */ |
473 | #ifdef CONFIG_PCI_DOMAINS_GENERIC |
494 | #ifdef CONFIG_PCI_DOMAINS_GENERIC |
474 | int domain_nr; |
495 | int domain_nr; |
475 | #endif |
496 | #endif |
476 | 497 | ||
477 | char name[48]; |
498 | char name[48]; |
478 | 499 | ||
479 | unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */ |
500 | unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */ |
480 | pci_bus_flags_t bus_flags; /* inherited by child buses */ |
501 | pci_bus_flags_t bus_flags; /* inherited by child buses */ |
481 | struct device *bridge; |
502 | struct device *bridge; |
482 | struct device dev; |
503 | struct device dev; |
483 | struct bin_attribute *legacy_io; /* legacy I/O for this bus */ |
504 | struct bin_attribute *legacy_io; /* legacy I/O for this bus */ |
484 | struct bin_attribute *legacy_mem; /* legacy mem */ |
505 | struct bin_attribute *legacy_mem; /* legacy mem */ |
485 | unsigned int is_added:1; |
506 | unsigned int is_added:1; |
486 | }; |
507 | }; |
- | 508 | ||
- | 509 | #define pci_bus_b(n) list_entry(n, struct pci_bus, node) |
|
487 | 510 | #define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list) |
|
488 | #define to_pci_bus(n) container_of(n, struct pci_bus, dev) |
511 | #define to_pci_bus(n) container_of(n, struct pci_bus, dev) |
489 | 512 | ||
490 | /* |
513 | /* |
491 | * Returns true if the PCI bus is root (behind host-PCI bridge), |
514 | * Returns true if the PCI bus is root (behind host-PCI bridge), |
492 | * false otherwise |
515 | * false otherwise |
493 | * |
516 | * |
494 | * Some code assumes that "bus->self == NULL" means that bus is a root bus. |
517 | * Some code assumes that "bus->self == NULL" means that bus is a root bus. |
495 | * This is incorrect because "virtual" buses added for SR-IOV (via |
518 | * This is incorrect because "virtual" buses added for SR-IOV (via |
496 | * virtfn_add_bus()) have "bus->self == NULL" but are not root buses. |
519 | * virtfn_add_bus()) have "bus->self == NULL" but are not root buses. |
497 | */ |
520 | */ |
498 | static inline bool pci_is_root_bus(struct pci_bus *pbus) |
521 | static inline bool pci_is_root_bus(struct pci_bus *pbus) |
499 | { |
522 | { |
500 | return !(pbus->parent); |
523 | return !(pbus->parent); |
501 | } |
524 | } |
502 | 525 | ||
503 | /** |
526 | /** |
504 | * pci_is_bridge - check if the PCI device is a bridge |
527 | * pci_is_bridge - check if the PCI device is a bridge |
505 | * @dev: PCI device |
528 | * @dev: PCI device |
506 | * |
529 | * |
507 | * Return true if the PCI device is bridge whether it has subordinate |
530 | * Return true if the PCI device is bridge whether it has subordinate |
508 | * or not. |
531 | * or not. |
509 | */ |
532 | */ |
510 | static inline bool pci_is_bridge(struct pci_dev *dev) |
533 | static inline bool pci_is_bridge(struct pci_dev *dev) |
511 | { |
534 | { |
512 | return dev->hdr_type == PCI_HEADER_TYPE_BRIDGE || |
535 | return dev->hdr_type == PCI_HEADER_TYPE_BRIDGE || |
513 | dev->hdr_type == PCI_HEADER_TYPE_CARDBUS; |
536 | dev->hdr_type == PCI_HEADER_TYPE_CARDBUS; |
514 | } |
537 | } |
515 | 538 | ||
516 | static inline struct pci_dev *pci_upstream_bridge(struct pci_dev *dev) |
539 | static inline struct pci_dev *pci_upstream_bridge(struct pci_dev *dev) |
517 | { |
540 | { |
518 | dev = pci_physfn(dev); |
541 | dev = pci_physfn(dev); |
519 | if (pci_is_root_bus(dev->bus)) |
542 | if (pci_is_root_bus(dev->bus)) |
520 | return NULL; |
543 | return NULL; |
521 | 544 | ||
522 | return dev->bus->self; |
545 | return dev->bus->self; |
523 | } |
546 | } |
524 | 547 | ||
525 | struct device *pci_get_host_bridge_device(struct pci_dev *dev); |
548 | struct device *pci_get_host_bridge_device(struct pci_dev *dev); |
526 | void pci_put_host_bridge_device(struct device *dev); |
549 | void pci_put_host_bridge_device(struct device *dev); |
527 | 550 | ||
528 | #ifdef CONFIG_PCI_MSI |
551 | #ifdef CONFIG_PCI_MSI |
529 | static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) |
552 | static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) |
530 | { |
553 | { |
531 | return pci_dev->msi_enabled || pci_dev->msix_enabled; |
554 | return pci_dev->msi_enabled || pci_dev->msix_enabled; |
532 | } |
555 | } |
533 | #else |
556 | #else |
534 | static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) { return false; } |
557 | static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) { return false; } |
535 | #endif |
558 | #endif |
536 | 559 | ||
537 | /* |
560 | /* |
538 | * Error values that may be returned by PCI functions. |
561 | * Error values that may be returned by PCI functions. |
539 | */ |
562 | */ |
540 | #define PCIBIOS_SUCCESSFUL 0x00 |
563 | #define PCIBIOS_SUCCESSFUL 0x00 |
541 | #define PCIBIOS_FUNC_NOT_SUPPORTED 0x81 |
564 | #define PCIBIOS_FUNC_NOT_SUPPORTED 0x81 |
542 | #define PCIBIOS_BAD_VENDOR_ID 0x83 |
565 | #define PCIBIOS_BAD_VENDOR_ID 0x83 |
543 | #define PCIBIOS_DEVICE_NOT_FOUND 0x86 |
566 | #define PCIBIOS_DEVICE_NOT_FOUND 0x86 |
544 | #define PCIBIOS_BAD_REGISTER_NUMBER 0x87 |
567 | #define PCIBIOS_BAD_REGISTER_NUMBER 0x87 |
545 | #define PCIBIOS_SET_FAILED 0x88 |
568 | #define PCIBIOS_SET_FAILED 0x88 |
546 | #define PCIBIOS_BUFFER_TOO_SMALL 0x89 |
569 | #define PCIBIOS_BUFFER_TOO_SMALL 0x89 |
547 | 570 | ||
548 | /* |
571 | /* |
549 | * Translate above to generic errno for passing back through non-PCI code. |
572 | * Translate above to generic errno for passing back through non-PCI code. |
550 | */ |
573 | */ |
551 | static inline int pcibios_err_to_errno(int err) |
574 | static inline int pcibios_err_to_errno(int err) |
552 | { |
575 | { |
553 | if (err <= PCIBIOS_SUCCESSFUL) |
576 | if (err <= PCIBIOS_SUCCESSFUL) |
554 | return err; /* Assume already errno */ |
577 | return err; /* Assume already errno */ |
555 | 578 | ||
556 | switch (err) { |
579 | switch (err) { |
557 | case PCIBIOS_FUNC_NOT_SUPPORTED: |
580 | case PCIBIOS_FUNC_NOT_SUPPORTED: |
558 | return -ENOENT; |
581 | return -ENOENT; |
559 | case PCIBIOS_BAD_VENDOR_ID: |
582 | case PCIBIOS_BAD_VENDOR_ID: |
560 | return -ENOTTY; |
583 | return -ENOTTY; |
561 | case PCIBIOS_DEVICE_NOT_FOUND: |
584 | case PCIBIOS_DEVICE_NOT_FOUND: |
562 | return -ENODEV; |
585 | return -ENODEV; |
563 | case PCIBIOS_BAD_REGISTER_NUMBER: |
586 | case PCIBIOS_BAD_REGISTER_NUMBER: |
564 | return -EFAULT; |
587 | return -EFAULT; |
565 | case PCIBIOS_SET_FAILED: |
588 | case PCIBIOS_SET_FAILED: |
566 | return -EIO; |
589 | return -EIO; |
567 | case PCIBIOS_BUFFER_TOO_SMALL: |
590 | case PCIBIOS_BUFFER_TOO_SMALL: |
568 | return -ENOSPC; |
591 | return -ENOSPC; |
569 | } |
592 | } |
570 | 593 | ||
571 | return -ERANGE; |
594 | return -ERANGE; |
572 | } |
595 | } |
573 | 596 | ||
574 | /* Low-level architecture-dependent routines */ |
597 | /* Low-level architecture-dependent routines */ |
575 | 598 | ||
576 | struct pci_ops { |
599 | struct pci_ops { |
577 | void __iomem *(*map_bus)(struct pci_bus *bus, unsigned int devfn, int where); |
600 | void __iomem *(*map_bus)(struct pci_bus *bus, unsigned int devfn, int where); |
578 | int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val); |
601 | int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val); |
579 | int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val); |
602 | int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val); |
580 | }; |
603 | }; |
581 | 604 | ||
582 | /* |
605 | /* |
583 | * ACPI needs to be able to access PCI config space before we've done a |
606 | * ACPI needs to be able to access PCI config space before we've done a |
584 | * PCI bus scan and created pci_bus structures. |
607 | * PCI bus scan and created pci_bus structures. |
585 | */ |
608 | */ |
586 | int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn, |
609 | int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn, |
587 | int reg, int len, u32 *val); |
610 | int reg, int len, u32 *val); |
588 | int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn, |
611 | int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn, |
589 | int reg, int len, u32 val); |
612 | int reg, int len, u32 val); |
590 | 613 | ||
591 | #ifdef CONFIG_PCI_BUS_ADDR_T_64BIT |
614 | #ifdef CONFIG_PCI_BUS_ADDR_T_64BIT |
592 | typedef u64 pci_bus_addr_t; |
615 | typedef u64 pci_bus_addr_t; |
593 | #else |
616 | #else |
594 | typedef u32 pci_bus_addr_t; |
617 | typedef u32 pci_bus_addr_t; |
595 | #endif |
618 | #endif |
596 | 619 | ||
597 | struct pci_bus_region { |
620 | struct pci_bus_region { |
598 | pci_bus_addr_t start; |
621 | pci_bus_addr_t start; |
599 | pci_bus_addr_t end; |
622 | pci_bus_addr_t end; |
600 | }; |
623 | }; |
601 | 624 | ||
602 | struct pci_dynids { |
625 | struct pci_dynids { |
603 | spinlock_t lock; /* protects list, index */ |
626 | spinlock_t lock; /* protects list, index */ |
604 | struct list_head list; /* for IDs added at runtime */ |
627 | struct list_head list; /* for IDs added at runtime */ |
605 | }; |
628 | }; |
606 | 629 | ||
607 | 630 | ||
608 | /* |
631 | /* |
609 | * PCI Error Recovery System (PCI-ERS). If a PCI device driver provides |
632 | * PCI Error Recovery System (PCI-ERS). If a PCI device driver provides |
610 | * a set of callbacks in struct pci_error_handlers, that device driver |
633 | * a set of callbacks in struct pci_error_handlers, that device driver |
611 | * will be notified of PCI bus errors, and will be driven to recovery |
634 | * will be notified of PCI bus errors, and will be driven to recovery |
612 | * when an error occurs. |
635 | * when an error occurs. |
613 | */ |
636 | */ |
614 | 637 | ||
615 | typedef unsigned int __bitwise pci_ers_result_t; |
638 | typedef unsigned int __bitwise pci_ers_result_t; |
616 | 639 | ||
617 | enum pci_ers_result { |
640 | enum pci_ers_result { |
618 | /* no result/none/not supported in device driver */ |
641 | /* no result/none/not supported in device driver */ |
619 | PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1, |
642 | PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1, |
620 | 643 | ||
621 | /* Device driver can recover without slot reset */ |
644 | /* Device driver can recover without slot reset */ |
622 | PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2, |
645 | PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2, |
623 | 646 | ||
624 | /* Device driver wants slot to be reset. */ |
647 | /* Device driver wants slot to be reset. */ |
625 | PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3, |
648 | PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3, |
626 | 649 | ||
627 | /* Device has completely failed, is unrecoverable */ |
650 | /* Device has completely failed, is unrecoverable */ |
628 | PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4, |
651 | PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4, |
629 | 652 | ||
630 | /* Device driver is fully recovered and operational */ |
653 | /* Device driver is fully recovered and operational */ |
631 | PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5, |
654 | PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5, |
632 | 655 | ||
633 | /* No AER capabilities registered for the driver */ |
656 | /* No AER capabilities registered for the driver */ |
634 | PCI_ERS_RESULT_NO_AER_DRIVER = (__force pci_ers_result_t) 6, |
657 | PCI_ERS_RESULT_NO_AER_DRIVER = (__force pci_ers_result_t) 6, |
635 | }; |
658 | }; |
636 | 659 | ||
637 | /* PCI bus error event callbacks */ |
660 | /* PCI bus error event callbacks */ |
638 | struct pci_error_handlers { |
661 | struct pci_error_handlers { |
639 | /* PCI bus error detected on this device */ |
662 | /* PCI bus error detected on this device */ |
640 | pci_ers_result_t (*error_detected)(struct pci_dev *dev, |
663 | pci_ers_result_t (*error_detected)(struct pci_dev *dev, |
641 | enum pci_channel_state error); |
664 | enum pci_channel_state error); |
642 | 665 | ||
643 | /* MMIO has been re-enabled, but not DMA */ |
666 | /* MMIO has been re-enabled, but not DMA */ |
644 | pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev); |
667 | pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev); |
645 | 668 | ||
646 | /* PCI Express link has been reset */ |
669 | /* PCI Express link has been reset */ |
647 | pci_ers_result_t (*link_reset)(struct pci_dev *dev); |
670 | pci_ers_result_t (*link_reset)(struct pci_dev *dev); |
648 | 671 | ||
649 | /* PCI slot has been reset */ |
672 | /* PCI slot has been reset */ |
650 | pci_ers_result_t (*slot_reset)(struct pci_dev *dev); |
673 | pci_ers_result_t (*slot_reset)(struct pci_dev *dev); |
651 | 674 | ||
652 | /* PCI function reset prepare or completed */ |
675 | /* PCI function reset prepare or completed */ |
653 | void (*reset_notify)(struct pci_dev *dev, bool prepare); |
676 | void (*reset_notify)(struct pci_dev *dev, bool prepare); |
654 | 677 | ||
655 | /* Device driver may resume normal operations */ |
678 | /* Device driver may resume normal operations */ |
656 | void (*resume)(struct pci_dev *dev); |
679 | void (*resume)(struct pci_dev *dev); |
657 | }; |
680 | }; |
658 | 681 | ||
659 | 682 | ||
660 | struct module; |
683 | struct module; |
661 | struct pci_driver { |
684 | struct pci_driver { |
662 | struct list_head node; |
685 | struct list_head node; |
663 | const char *name; |
686 | const char *name; |
664 | const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */ |
687 | const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */ |
665 | int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */ |
688 | int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */ |
666 | void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */ |
689 | void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */ |
667 | int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */ |
690 | int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */ |
668 | int (*suspend_late) (struct pci_dev *dev, pm_message_t state); |
691 | int (*suspend_late) (struct pci_dev *dev, pm_message_t state); |
669 | int (*resume_early) (struct pci_dev *dev); |
692 | int (*resume_early) (struct pci_dev *dev); |
670 | int (*resume) (struct pci_dev *dev); /* Device woken up */ |
693 | int (*resume) (struct pci_dev *dev); /* Device woken up */ |
671 | void (*shutdown) (struct pci_dev *dev); |
694 | void (*shutdown) (struct pci_dev *dev); |
672 | int (*sriov_configure) (struct pci_dev *dev, int num_vfs); /* PF pdev */ |
695 | int (*sriov_configure) (struct pci_dev *dev, int num_vfs); /* PF pdev */ |
673 | const struct pci_error_handlers *err_handler; |
696 | const struct pci_error_handlers *err_handler; |
674 | struct device_driver driver; |
697 | struct device_driver driver; |
675 | struct pci_dynids dynids; |
698 | struct pci_dynids dynids; |
676 | }; |
699 | }; |
677 | 700 | ||
678 | #define to_pci_driver(drv) container_of(drv, struct pci_driver, driver) |
701 | #define to_pci_driver(drv) container_of(drv, struct pci_driver, driver) |
679 | 702 | ||
680 | /** |
703 | /** |
681 | * DEFINE_PCI_DEVICE_TABLE - macro used to describe a pci device table |
704 | * DEFINE_PCI_DEVICE_TABLE - macro used to describe a pci device table |
682 | * @_table: device table name |
705 | * @_table: device table name |
683 | * |
706 | * |
684 | * This macro is deprecated and should not be used in new code. |
707 | * This macro is deprecated and should not be used in new code. |
685 | */ |
708 | */ |
686 | #define DEFINE_PCI_DEVICE_TABLE(_table) \ |
709 | #define DEFINE_PCI_DEVICE_TABLE(_table) \ |
687 | const struct pci_device_id _table[] |
710 | const struct pci_device_id _table[] |
688 | 711 | ||
689 | /** |
712 | /** |
690 | * PCI_DEVICE - macro used to describe a specific pci device |
713 | * PCI_DEVICE - macro used to describe a specific pci device |
691 | * @vend: the 16 bit PCI Vendor ID |
714 | * @vend: the 16 bit PCI Vendor ID |
692 | * @dev: the 16 bit PCI Device ID |
715 | * @dev: the 16 bit PCI Device ID |
693 | * |
716 | * |
694 | * This macro is used to create a struct pci_device_id that matches a |
717 | * This macro is used to create a struct pci_device_id that matches a |
695 | * specific device. The subvendor and subdevice fields will be set to |
718 | * specific device. The subvendor and subdevice fields will be set to |
696 | * PCI_ANY_ID. |
719 | * PCI_ANY_ID. |
697 | */ |
720 | */ |
698 | #define PCI_DEVICE(vend,dev) \ |
721 | #define PCI_DEVICE(vend,dev) \ |
699 | .vendor = (vend), .device = (dev), \ |
722 | .vendor = (vend), .device = (dev), \ |
700 | .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID |
723 | .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID |
701 | 724 | ||
702 | /** |
725 | /** |
703 | * PCI_DEVICE_SUB - macro used to describe a specific pci device with subsystem |
726 | * PCI_DEVICE_SUB - macro used to describe a specific pci device with subsystem |
704 | * @vend: the 16 bit PCI Vendor ID |
727 | * @vend: the 16 bit PCI Vendor ID |
705 | * @dev: the 16 bit PCI Device ID |
728 | * @dev: the 16 bit PCI Device ID |
706 | * @subvend: the 16 bit PCI Subvendor ID |
729 | * @subvend: the 16 bit PCI Subvendor ID |
707 | * @subdev: the 16 bit PCI Subdevice ID |
730 | * @subdev: the 16 bit PCI Subdevice ID |
708 | * |
731 | * |
709 | * This macro is used to create a struct pci_device_id that matches a |
732 | * This macro is used to create a struct pci_device_id that matches a |
710 | * specific device with subsystem information. |
733 | * specific device with subsystem information. |
711 | */ |
734 | */ |
712 | #define PCI_DEVICE_SUB(vend, dev, subvend, subdev) \ |
735 | #define PCI_DEVICE_SUB(vend, dev, subvend, subdev) \ |
713 | .vendor = (vend), .device = (dev), \ |
736 | .vendor = (vend), .device = (dev), \ |
714 | .subvendor = (subvend), .subdevice = (subdev) |
737 | .subvendor = (subvend), .subdevice = (subdev) |
715 | 738 | ||
716 | /** |
739 | /** |
717 | * PCI_DEVICE_CLASS - macro used to describe a specific pci device class |
740 | * PCI_DEVICE_CLASS - macro used to describe a specific pci device class |
718 | * @dev_class: the class, subclass, prog-if triple for this device |
741 | * @dev_class: the class, subclass, prog-if triple for this device |
719 | * @dev_class_mask: the class mask for this device |
742 | * @dev_class_mask: the class mask for this device |
720 | * |
743 | * |
721 | * This macro is used to create a struct pci_device_id that matches a |
744 | * This macro is used to create a struct pci_device_id that matches a |
722 | * specific PCI class. The vendor, device, subvendor, and subdevice |
745 | * specific PCI class. The vendor, device, subvendor, and subdevice |
723 | * fields will be set to PCI_ANY_ID. |
746 | * fields will be set to PCI_ANY_ID. |
724 | */ |
747 | */ |
725 | #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \ |
748 | #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \ |
726 | .class = (dev_class), .class_mask = (dev_class_mask), \ |
749 | .class = (dev_class), .class_mask = (dev_class_mask), \ |
727 | .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \ |
750 | .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \ |
728 | .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID |
751 | .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID |
729 | 752 | ||
730 | /** |
753 | /** |
731 | * PCI_VDEVICE - macro used to describe a specific pci device in short form |
754 | * PCI_VDEVICE - macro used to describe a specific pci device in short form |
732 | * @vend: the vendor name |
755 | * @vend: the vendor name |
733 | * @dev: the 16 bit PCI Device ID |
756 | * @dev: the 16 bit PCI Device ID |
734 | * |
757 | * |
735 | * This macro is used to create a struct pci_device_id that matches a |
758 | * This macro is used to create a struct pci_device_id that matches a |
736 | * specific PCI device. The subvendor, and subdevice fields will be set |
759 | * specific PCI device. The subvendor, and subdevice fields will be set |
737 | * to PCI_ANY_ID. The macro allows the next field to follow as the device |
760 | * to PCI_ANY_ID. The macro allows the next field to follow as the device |
738 | * private data. |
761 | * private data. |
739 | */ |
762 | */ |
740 | 763 | ||
741 | #define PCI_VDEVICE(vend, dev) \ |
764 | #define PCI_VDEVICE(vend, dev) \ |
742 | .vendor = PCI_VENDOR_ID_##vend, .device = (dev), \ |
765 | .vendor = PCI_VENDOR_ID_##vend, .device = (dev), \ |
743 | .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, 0, 0 |
766 | .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, 0, 0 |
744 | 767 | ||
745 | enum { |
768 | enum { |
746 | PCI_REASSIGN_ALL_RSRC = 0x00000001, /* ignore firmware setup */ |
769 | PCI_REASSIGN_ALL_RSRC = 0x00000001, /* ignore firmware setup */ |
747 | PCI_REASSIGN_ALL_BUS = 0x00000002, /* reassign all bus numbers */ |
770 | PCI_REASSIGN_ALL_BUS = 0x00000002, /* reassign all bus numbers */ |
748 | PCI_PROBE_ONLY = 0x00000004, /* use existing setup */ |
771 | PCI_PROBE_ONLY = 0x00000004, /* use existing setup */ |
749 | PCI_CAN_SKIP_ISA_ALIGN = 0x00000008, /* don't do ISA alignment */ |
772 | PCI_CAN_SKIP_ISA_ALIGN = 0x00000008, /* don't do ISA alignment */ |
750 | PCI_ENABLE_PROC_DOMAINS = 0x00000010, /* enable domains in /proc */ |
773 | PCI_ENABLE_PROC_DOMAINS = 0x00000010, /* enable domains in /proc */ |
751 | PCI_COMPAT_DOMAIN_0 = 0x00000020, /* ... except domain 0 */ |
774 | PCI_COMPAT_DOMAIN_0 = 0x00000020, /* ... except domain 0 */ |
752 | PCI_SCAN_ALL_PCIE_DEVS = 0x00000040, /* scan all, not just dev 0 */ |
775 | PCI_SCAN_ALL_PCIE_DEVS = 0x00000040, /* scan all, not just dev 0 */ |
753 | }; |
776 | }; |
754 | 777 | ||
755 | /* these external functions are only available when PCI support is enabled */ |
778 | /* these external functions are only available when PCI support is enabled */ |
756 | #ifdef CONFIG_PCI |
779 | #ifdef CONFIG_PCI |
757 | 780 | ||
758 | extern unsigned int pci_flags; |
781 | extern unsigned int pci_flags; |
759 | 782 | ||
760 | static inline void pci_set_flags(int flags) { pci_flags = flags; } |
783 | static inline void pci_set_flags(int flags) { pci_flags = flags; } |
761 | static inline void pci_add_flags(int flags) { pci_flags |= flags; } |
784 | static inline void pci_add_flags(int flags) { pci_flags |= flags; } |
762 | static inline void pci_clear_flags(int flags) { pci_flags &= ~flags; } |
785 | static inline void pci_clear_flags(int flags) { pci_flags &= ~flags; } |
763 | static inline int pci_has_flag(int flag) { return pci_flags & flag; } |
786 | static inline int pci_has_flag(int flag) { return pci_flags & flag; } |
764 | 787 | ||
765 | void pcie_bus_configure_settings(struct pci_bus *bus); |
788 | void pcie_bus_configure_settings(struct pci_bus *bus); |
766 | 789 | ||
767 | enum pcie_bus_config_types { |
790 | enum pcie_bus_config_types { |
768 | PCIE_BUS_TUNE_OFF, /* don't touch MPS at all */ |
791 | PCIE_BUS_TUNE_OFF, /* don't touch MPS at all */ |
769 | PCIE_BUS_DEFAULT, /* ensure MPS matches upstream bridge */ |
792 | PCIE_BUS_DEFAULT, /* ensure MPS matches upstream bridge */ |
770 | PCIE_BUS_SAFE, /* use largest MPS boot-time devices support */ |
793 | PCIE_BUS_SAFE, /* use largest MPS boot-time devices support */ |
771 | PCIE_BUS_PERFORMANCE, /* use MPS and MRRS for best performance */ |
794 | PCIE_BUS_PERFORMANCE, /* use MPS and MRRS for best performance */ |
772 | PCIE_BUS_PEER2PEER, /* set MPS = 128 for all devices */ |
795 | PCIE_BUS_PEER2PEER, /* set MPS = 128 for all devices */ |
773 | }; |
796 | }; |
774 | 797 | ||
775 | extern enum pcie_bus_config_types pcie_bus_config; |
798 | extern enum pcie_bus_config_types pcie_bus_config; |
776 | 799 | ||
777 | extern struct bus_type pci_bus_type; |
800 | extern struct bus_type pci_bus_type; |
778 | 801 | ||
779 | /* Do NOT directly access these two variables, unless you are arch-specific PCI |
802 | /* Do NOT directly access these two variables, unless you are arch-specific PCI |
780 | * code, or PCI core code. */ |
803 | * code, or PCI core code. */ |
781 | extern struct list_head pci_root_buses; /* list of all known PCI buses */ |
804 | extern struct list_head pci_root_buses; /* list of all known PCI buses */ |
782 | /* Some device drivers need know if PCI is initiated */ |
805 | /* Some device drivers need know if PCI is initiated */ |
783 | int no_pci_devices(void); |
806 | int no_pci_devices(void); |
784 | 807 | ||
785 | void pcibios_resource_survey_bus(struct pci_bus *bus); |
808 | void pcibios_resource_survey_bus(struct pci_bus *bus); |
786 | void pcibios_bus_add_device(struct pci_dev *pdev); |
809 | void pcibios_bus_add_device(struct pci_dev *pdev); |
787 | void pcibios_add_bus(struct pci_bus *bus); |
810 | void pcibios_add_bus(struct pci_bus *bus); |
788 | void pcibios_remove_bus(struct pci_bus *bus); |
811 | void pcibios_remove_bus(struct pci_bus *bus); |
789 | void pcibios_fixup_bus(struct pci_bus *); |
812 | void pcibios_fixup_bus(struct pci_bus *); |
790 | int __must_check pcibios_enable_device(struct pci_dev *, int mask); |
813 | int __must_check pcibios_enable_device(struct pci_dev *, int mask); |
791 | /* Architecture-specific versions may override this (weak) */ |
814 | /* Architecture-specific versions may override this (weak) */ |
792 | char *pcibios_setup(char *str); |
815 | char *pcibios_setup(char *str); |
793 | 816 | ||
794 | /* Used only when drivers/pci/setup.c is used */ |
817 | /* Used only when drivers/pci/setup.c is used */ |
795 | resource_size_t pcibios_align_resource(void *, const struct resource *, |
818 | resource_size_t pcibios_align_resource(void *, const struct resource *, |
796 | resource_size_t, |
819 | resource_size_t, |
797 | resource_size_t); |
820 | resource_size_t); |
798 | void pcibios_update_irq(struct pci_dev *, int irq); |
821 | void pcibios_update_irq(struct pci_dev *, int irq); |
799 | 822 | ||
800 | /* Weak but can be overriden by arch */ |
823 | /* Weak but can be overriden by arch */ |
801 | void pci_fixup_cardbus(struct pci_bus *); |
824 | void pci_fixup_cardbus(struct pci_bus *); |
802 | 825 | ||
803 | /* Generic PCI functions used internally */ |
826 | /* Generic PCI functions used internally */ |
804 | 827 | ||
805 | void pcibios_resource_to_bus(struct pci_bus *bus, struct pci_bus_region *region, |
828 | void pcibios_resource_to_bus(struct pci_bus *bus, struct pci_bus_region *region, |
806 | struct resource *res); |
829 | struct resource *res); |
807 | void pcibios_bus_to_resource(struct pci_bus *bus, struct resource *res, |
830 | void pcibios_bus_to_resource(struct pci_bus *bus, struct resource *res, |
808 | struct pci_bus_region *region); |
831 | struct pci_bus_region *region); |
809 | void pcibios_scan_specific_bus(int busn); |
832 | void pcibios_scan_specific_bus(int busn); |
810 | struct pci_bus *pci_find_bus(int domain, int busnr); |
833 | struct pci_bus *pci_find_bus(int domain, int busnr); |
811 | void pci_bus_add_devices(const struct pci_bus *bus); |
834 | void pci_bus_add_devices(const struct pci_bus *bus); |
812 | struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata); |
835 | struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata); |
813 | struct pci_bus *pci_create_root_bus(struct device *parent, int bus, |
836 | struct pci_bus *pci_create_root_bus(struct device *parent, int bus, |
814 | struct pci_ops *ops, void *sysdata, |
837 | struct pci_ops *ops, void *sysdata, |
815 | struct list_head *resources); |
838 | struct list_head *resources); |
816 | int pci_bus_insert_busn_res(struct pci_bus *b, int bus, int busmax); |
839 | int pci_bus_insert_busn_res(struct pci_bus *b, int bus, int busmax); |
817 | int pci_bus_update_busn_res_end(struct pci_bus *b, int busmax); |
840 | int pci_bus_update_busn_res_end(struct pci_bus *b, int busmax); |
818 | void pci_bus_release_busn_res(struct pci_bus *b); |
841 | void pci_bus_release_busn_res(struct pci_bus *b); |
819 | struct pci_bus *pci_scan_root_bus_msi(struct device *parent, int bus, |
842 | struct pci_bus *pci_scan_root_bus_msi(struct device *parent, int bus, |
820 | struct pci_ops *ops, void *sysdata, |
843 | struct pci_ops *ops, void *sysdata, |
821 | struct list_head *resources, |
844 | struct list_head *resources, |
822 | struct msi_controller *msi); |
845 | struct msi_controller *msi); |
823 | struct pci_bus *pci_scan_root_bus(struct device *parent, int bus, |
846 | struct pci_bus *pci_scan_root_bus(struct device *parent, int bus, |
824 | struct pci_ops *ops, void *sysdata, |
847 | struct pci_ops *ops, void *sysdata, |
825 | struct list_head *resources); |
848 | struct list_head *resources); |
826 | struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, |
849 | struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, |
827 | int busnr); |
850 | int busnr); |
828 | void pcie_update_link_speed(struct pci_bus *bus, u16 link_status); |
851 | void pcie_update_link_speed(struct pci_bus *bus, u16 link_status); |
829 | struct pci_slot *pci_create_slot(struct pci_bus *parent, int slot_nr, |
852 | struct pci_slot *pci_create_slot(struct pci_bus *parent, int slot_nr, |
830 | const char *name, |
853 | const char *name, |
831 | struct hotplug_slot *hotplug); |
854 | struct hotplug_slot *hotplug); |
832 | void pci_destroy_slot(struct pci_slot *slot); |
855 | void pci_destroy_slot(struct pci_slot *slot); |
833 | #ifdef CONFIG_SYSFS |
856 | #ifdef CONFIG_SYSFS |
834 | void pci_dev_assign_slot(struct pci_dev *dev); |
857 | void pci_dev_assign_slot(struct pci_dev *dev); |
835 | #else |
858 | #else |
836 | static inline void pci_dev_assign_slot(struct pci_dev *dev) { } |
859 | static inline void pci_dev_assign_slot(struct pci_dev *dev) { } |
837 | #endif |
860 | #endif |
838 | int pci_scan_slot(struct pci_bus *bus, int devfn); |
861 | int pci_scan_slot(struct pci_bus *bus, int devfn); |
839 | struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn); |
862 | struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn); |
840 | void pci_device_add(struct pci_dev *dev, struct pci_bus *bus); |
863 | void pci_device_add(struct pci_dev *dev, struct pci_bus *bus); |
841 | unsigned int pci_scan_child_bus(struct pci_bus *bus); |
864 | unsigned int pci_scan_child_bus(struct pci_bus *bus); |
842 | void pci_bus_add_device(struct pci_dev *dev); |
865 | void pci_bus_add_device(struct pci_dev *dev); |
843 | void pci_read_bridge_bases(struct pci_bus *child); |
866 | void pci_read_bridge_bases(struct pci_bus *child); |
844 | struct resource *pci_find_parent_resource(const struct pci_dev *dev, |
867 | struct resource *pci_find_parent_resource(const struct pci_dev *dev, |
845 | struct resource *res); |
868 | struct resource *res); |
846 | struct pci_dev *pci_find_pcie_root_port(struct pci_dev *dev); |
869 | struct pci_dev *pci_find_pcie_root_port(struct pci_dev *dev); |
847 | u8 pci_swizzle_interrupt_pin(const struct pci_dev *dev, u8 pin); |
870 | u8 pci_swizzle_interrupt_pin(struct pci_dev *dev, u8 pin); |
848 | int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge); |
871 | int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge); |
849 | u8 pci_common_swizzle(struct pci_dev *dev, u8 *pinp); |
872 | u8 pci_common_swizzle(struct pci_dev *dev, u8 *pinp); |
850 | struct pci_dev *pci_dev_get(struct pci_dev *dev); |
873 | struct pci_dev *pci_dev_get(struct pci_dev *dev); |
851 | void pci_dev_put(struct pci_dev *dev); |
874 | void pci_dev_put(struct pci_dev *dev); |
852 | void pci_remove_bus(struct pci_bus *b); |
875 | void pci_remove_bus(struct pci_bus *b); |
853 | void pci_stop_and_remove_bus_device(struct pci_dev *dev); |
876 | void pci_stop_and_remove_bus_device(struct pci_dev *dev); |
854 | void pci_stop_and_remove_bus_device_locked(struct pci_dev *dev); |
877 | void pci_stop_and_remove_bus_device_locked(struct pci_dev *dev); |
855 | void pci_stop_root_bus(struct pci_bus *bus); |
878 | void pci_stop_root_bus(struct pci_bus *bus); |
856 | void pci_remove_root_bus(struct pci_bus *bus); |
879 | void pci_remove_root_bus(struct pci_bus *bus); |
857 | void pci_setup_cardbus(struct pci_bus *bus); |
880 | void pci_setup_cardbus(struct pci_bus *bus); |
858 | void pci_sort_breadthfirst(void); |
881 | void pci_sort_breadthfirst(void); |
859 | #define dev_is_pci(d) ((d)->bus == &pci_bus_type) |
882 | #define dev_is_pci(d) ((d)->bus == &pci_bus_type) |
860 | #define dev_is_pf(d) ((dev_is_pci(d) ? to_pci_dev(d)->is_physfn : false)) |
883 | #define dev_is_pf(d) ((dev_is_pci(d) ? to_pci_dev(d)->is_physfn : false)) |
861 | #define dev_num_vf(d) ((dev_is_pci(d) ? pci_num_vf(to_pci_dev(d)) : 0)) |
884 | #define dev_num_vf(d) ((dev_is_pci(d) ? pci_num_vf(to_pci_dev(d)) : 0)) |
862 | 885 | ||
863 | /* Generic PCI functions exported to card drivers */ |
886 | /* Generic PCI functions exported to card drivers */ |
864 | 887 | ||
865 | enum pci_lost_interrupt_reason { |
888 | enum pci_lost_interrupt_reason { |
866 | PCI_LOST_IRQ_NO_INFORMATION = 0, |
889 | PCI_LOST_IRQ_NO_INFORMATION = 0, |
867 | PCI_LOST_IRQ_DISABLE_MSI, |
890 | PCI_LOST_IRQ_DISABLE_MSI, |
868 | PCI_LOST_IRQ_DISABLE_MSIX, |
891 | PCI_LOST_IRQ_DISABLE_MSIX, |
869 | PCI_LOST_IRQ_DISABLE_ACPI, |
892 | PCI_LOST_IRQ_DISABLE_ACPI, |
870 | }; |
893 | }; |
871 | enum pci_lost_interrupt_reason pci_lost_interrupt(struct pci_dev *dev); |
894 | enum pci_lost_interrupt_reason pci_lost_interrupt(struct pci_dev *dev); |
872 | int pci_find_capability(struct pci_dev *dev, int cap); |
895 | int pci_find_capability(struct pci_dev *dev, int cap); |
873 | int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap); |
896 | int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap); |
874 | int pci_find_ext_capability(struct pci_dev *dev, int cap); |
897 | int pci_find_ext_capability(struct pci_dev *dev, int cap); |
875 | int pci_find_next_ext_capability(struct pci_dev *dev, int pos, int cap); |
898 | int pci_find_next_ext_capability(struct pci_dev *dev, int pos, int cap); |
876 | int pci_find_ht_capability(struct pci_dev *dev, int ht_cap); |
899 | int pci_find_ht_capability(struct pci_dev *dev, int ht_cap); |
877 | int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap); |
900 | int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap); |
878 | struct pci_bus *pci_find_next_bus(const struct pci_bus *from); |
901 | struct pci_bus *pci_find_next_bus(const struct pci_bus *from); |
879 | 902 | ||
880 | struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device, |
903 | struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device, |
881 | struct pci_dev *from); |
904 | struct pci_dev *from); |
882 | struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device, |
905 | struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device, |
883 | unsigned int ss_vendor, unsigned int ss_device, |
906 | unsigned int ss_vendor, unsigned int ss_device, |
884 | struct pci_dev *from); |
907 | struct pci_dev *from); |
885 | struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn); |
908 | struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn); |
886 | struct pci_dev *pci_get_domain_bus_and_slot(int domain, unsigned int bus, |
909 | struct pci_dev *pci_get_domain_bus_and_slot(int domain, unsigned int bus, |
887 | unsigned int devfn); |
910 | unsigned int devfn); |
888 | static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus, |
911 | static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus, |
889 | unsigned int devfn) |
912 | unsigned int devfn) |
890 | { |
913 | { |
891 | return pci_get_domain_bus_and_slot(0, bus, devfn); |
914 | return pci_get_domain_bus_and_slot(0, bus, devfn); |
892 | } |
915 | } |
893 | struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from); |
916 | struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from); |
894 | int pci_dev_present(const struct pci_device_id *ids); |
917 | int pci_dev_present(const struct pci_device_id *ids); |
895 | 918 | ||
896 | int pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn, |
919 | int pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn, |
897 | int where, u8 *val); |
920 | int where, u8 *val); |
898 | int pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn, |
921 | int pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn, |
899 | int where, u16 *val); |
922 | int where, u16 *val); |
900 | int pci_bus_read_config_dword(struct pci_bus *bus, unsigned int devfn, |
923 | int pci_bus_read_config_dword(struct pci_bus *bus, unsigned int devfn, |
901 | int where, u32 *val); |
924 | int where, u32 *val); |
902 | int pci_bus_write_config_byte(struct pci_bus *bus, unsigned int devfn, |
925 | int pci_bus_write_config_byte(struct pci_bus *bus, unsigned int devfn, |
903 | int where, u8 val); |
926 | int where, u8 val); |
904 | int pci_bus_write_config_word(struct pci_bus *bus, unsigned int devfn, |
927 | int pci_bus_write_config_word(struct pci_bus *bus, unsigned int devfn, |
905 | int where, u16 val); |
928 | int where, u16 val); |
906 | int pci_bus_write_config_dword(struct pci_bus *bus, unsigned int devfn, |
929 | int pci_bus_write_config_dword(struct pci_bus *bus, unsigned int devfn, |
907 | int where, u32 val); |
930 | int where, u32 val); |
908 | 931 | ||
909 | int pci_generic_config_read(struct pci_bus *bus, unsigned int devfn, |
932 | int pci_generic_config_read(struct pci_bus *bus, unsigned int devfn, |
910 | int where, int size, u32 *val); |
933 | int where, int size, u32 *val); |
911 | int pci_generic_config_write(struct pci_bus *bus, unsigned int devfn, |
934 | int pci_generic_config_write(struct pci_bus *bus, unsigned int devfn, |
912 | int where, int size, u32 val); |
935 | int where, int size, u32 val); |
913 | int pci_generic_config_read32(struct pci_bus *bus, unsigned int devfn, |
936 | int pci_generic_config_read32(struct pci_bus *bus, unsigned int devfn, |
914 | int where, int size, u32 *val); |
937 | int where, int size, u32 *val); |
915 | int pci_generic_config_write32(struct pci_bus *bus, unsigned int devfn, |
938 | int pci_generic_config_write32(struct pci_bus *bus, unsigned int devfn, |
916 | int where, int size, u32 val); |
939 | int where, int size, u32 val); |
917 | 940 | ||
918 | struct pci_ops *pci_bus_set_ops(struct pci_bus *bus, struct pci_ops *ops); |
941 | struct pci_ops *pci_bus_set_ops(struct pci_bus *bus, struct pci_ops *ops); |
919 | 942 | ||
920 | 943 | ||
921 | #if 0 |
944 | #if 0 |
922 | static inline int pci_read_config_byte(const struct pci_dev *dev, int where, u8 *val) |
945 | static inline int pci_read_config_byte(const struct pci_dev *dev, int where, u8 *val) |
923 | { |
946 | { |
924 | *val = PciRead8(dev->busnr, dev->devfn, where); |
947 | *val = PciRead8(dev->busnr, dev->devfn, where); |
925 | return 1; |
948 | return 1; |
926 | } |
949 | } |
927 | static inline int pci_read_config_word(const struct pci_dev *dev, int where, u16 *val) |
950 | static inline int pci_read_config_word(const struct pci_dev *dev, int where, u16 *val) |
928 | { |
951 | { |
929 | *val = PciRead16(dev->busnr, dev->devfn, where); |
952 | *val = PciRead16(dev->busnr, dev->devfn, where); |
930 | return 1; |
953 | return 1; |
931 | } |
954 | } |
932 | static inline int pci_read_config_dword(const struct pci_dev *dev, int where, |
955 | static inline int pci_read_config_dword(const struct pci_dev *dev, int where, |
933 | u32 *val) |
956 | u32 *val) |
934 | { |
957 | { |
935 | *val = PciRead32(dev->busnr, dev->devfn, where); |
958 | *val = PciRead32(dev->busnr, dev->devfn, where); |
936 | return 1; |
959 | return 1; |
937 | } |
960 | } |
938 | static inline int pci_write_config_byte(const struct pci_dev *dev, int where, u8 val) |
961 | static inline int pci_write_config_byte(const struct pci_dev *dev, int where, u8 val) |
939 | { |
962 | { |
940 | PciWrite8(dev->busnr, dev->devfn, where, val); |
963 | PciWrite8(dev->busnr, dev->devfn, where, val); |
941 | return 1; |
964 | return 1; |
942 | } |
965 | } |
943 | static inline int pci_write_config_word(const struct pci_dev *dev, int where, u16 val) |
966 | static inline int pci_write_config_word(const struct pci_dev *dev, int where, u16 val) |
944 | { |
967 | { |
945 | PciWrite16(dev->busnr, dev->devfn, where, val); |
968 | PciWrite16(dev->busnr, dev->devfn, where, val); |
946 | return 1; |
969 | return 1; |
947 | } |
970 | } |
948 | static inline int pci_write_config_dword(const struct pci_dev *dev, int where, |
971 | static inline int pci_write_config_dword(const struct pci_dev *dev, int where, |
949 | u32 val) |
972 | u32 val) |
950 | { |
973 | { |
951 | PciWrite32(dev->busnr, dev->devfn, where, val); |
974 | PciWrite32(dev->busnr, dev->devfn, where, val); |
952 | return 1; |
975 | return 1; |
953 | } |
976 | } |
954 | #endif |
977 | #endif |
955 | 978 | ||
956 | static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val) |
979 | static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val) |
957 | { |
980 | { |
958 | *val = PciRead8(dev->busnr, dev->devfn, where); |
981 | *val = PciRead8(dev->busnr, dev->devfn, where); |
959 | return 0; |
982 | return 0; |
960 | } |
983 | } |
961 | 984 | ||
962 | static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val) |
985 | static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val) |
963 | { |
986 | { |
964 | 987 | ||
965 | if ( where & 1) |
988 | if ( where & 1) |
966 | return PCIBIOS_BAD_REGISTER_NUMBER; |
989 | return PCIBIOS_BAD_REGISTER_NUMBER; |
967 | *val = PciRead16(dev->busnr, dev->devfn, where); |
990 | *val = PciRead16(dev->busnr, dev->devfn, where); |
968 | return 0; |
991 | return 0; |
969 | } |
992 | } |
970 | 993 | ||
971 | static inline int pci_read_config_dword(struct pci_dev *dev, int where, u32 *val) |
994 | static inline int pci_read_config_dword(struct pci_dev *dev, int where, u32 *val) |
972 | { |
995 | { |
973 | 996 | ||
974 | if ( where & 3) |
997 | if ( where & 3) |
975 | return PCIBIOS_BAD_REGISTER_NUMBER; |
998 | return PCIBIOS_BAD_REGISTER_NUMBER; |
976 | *val = PciRead32(dev->busnr, dev->devfn, where); |
999 | *val = PciRead32(dev->busnr, dev->devfn, where); |
977 | return 0; |
1000 | return 0; |
978 | } |
1001 | } |
979 | 1002 | ||
980 | static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val) |
1003 | static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val) |
981 | { |
1004 | { |
982 | PciWrite8(dev->busnr, dev->devfn, where, val); |
1005 | PciWrite8(dev->busnr, dev->devfn, where, val); |
983 | return 0; |
1006 | return 0; |
984 | }; |
1007 | }; |
985 | 1008 | ||
986 | static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val) |
1009 | static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val) |
987 | { |
1010 | { |
988 | if ( where & 1) |
1011 | if ( where & 1) |
989 | return PCIBIOS_BAD_REGISTER_NUMBER; |
1012 | return PCIBIOS_BAD_REGISTER_NUMBER; |
990 | PciWrite16(dev->busnr, dev->devfn, where, val); |
1013 | PciWrite16(dev->busnr, dev->devfn, where, val); |
991 | return 0; |
1014 | return 0; |
992 | } |
1015 | } |
993 | 1016 | ||
994 | static inline int pci_write_config_dword(struct pci_dev *dev, int where, |
1017 | static inline int pci_write_config_dword(struct pci_dev *dev, int where, |
995 | u32 val) |
1018 | u32 val) |
996 | { |
1019 | { |
997 | if ( where & 3) |
1020 | if ( where & 3) |
998 | return PCIBIOS_BAD_REGISTER_NUMBER; |
1021 | return PCIBIOS_BAD_REGISTER_NUMBER; |
999 | PciWrite32(dev->busnr, dev->devfn, where, val); |
1022 | PciWrite32(dev->busnr, dev->devfn, where, val); |
1000 | return 0; |
1023 | return 0; |
1001 | } |
1024 | } |
1002 | 1025 | ||
1003 | 1026 | ||
1004 | int pcie_capability_read_word(struct pci_dev *dev, int pos, u16 *val); |
1027 | int pcie_capability_read_word(struct pci_dev *dev, int pos, u16 *val); |
1005 | int pcie_capability_read_dword(struct pci_dev *dev, int pos, u32 *val); |
1028 | int pcie_capability_read_dword(struct pci_dev *dev, int pos, u32 *val); |
1006 | int pcie_capability_write_word(struct pci_dev *dev, int pos, u16 val); |
1029 | int pcie_capability_write_word(struct pci_dev *dev, int pos, u16 val); |
1007 | int pcie_capability_write_dword(struct pci_dev *dev, int pos, u32 val); |
1030 | int pcie_capability_write_dword(struct pci_dev *dev, int pos, u32 val); |
1008 | int pcie_capability_clear_and_set_word(struct pci_dev *dev, int pos, |
1031 | int pcie_capability_clear_and_set_word(struct pci_dev *dev, int pos, |
1009 | u16 clear, u16 set); |
1032 | u16 clear, u16 set); |
1010 | int pcie_capability_clear_and_set_dword(struct pci_dev *dev, int pos, |
1033 | int pcie_capability_clear_and_set_dword(struct pci_dev *dev, int pos, |
1011 | u32 clear, u32 set); |
1034 | u32 clear, u32 set); |
1012 | 1035 | ||
1013 | static inline int pcie_capability_set_word(struct pci_dev *dev, int pos, |
1036 | static inline int pcie_capability_set_word(struct pci_dev *dev, int pos, |
1014 | u16 set) |
1037 | u16 set) |
1015 | { |
1038 | { |
1016 | return pcie_capability_clear_and_set_word(dev, pos, 0, set); |
1039 | return pcie_capability_clear_and_set_word(dev, pos, 0, set); |
1017 | } |
1040 | } |
1018 | 1041 | ||
1019 | static inline int pcie_capability_set_dword(struct pci_dev *dev, int pos, |
1042 | static inline int pcie_capability_set_dword(struct pci_dev *dev, int pos, |
1020 | u32 set) |
1043 | u32 set) |
1021 | { |
1044 | { |
1022 | return pcie_capability_clear_and_set_dword(dev, pos, 0, set); |
1045 | return pcie_capability_clear_and_set_dword(dev, pos, 0, set); |
1023 | } |
1046 | } |
1024 | 1047 | ||
1025 | static inline int pcie_capability_clear_word(struct pci_dev *dev, int pos, |
1048 | static inline int pcie_capability_clear_word(struct pci_dev *dev, int pos, |
1026 | u16 clear) |
1049 | u16 clear) |
1027 | { |
1050 | { |
1028 | return pcie_capability_clear_and_set_word(dev, pos, clear, 0); |
1051 | return pcie_capability_clear_and_set_word(dev, pos, clear, 0); |
1029 | } |
1052 | } |
1030 | 1053 | ||
1031 | static inline int pcie_capability_clear_dword(struct pci_dev *dev, int pos, |
1054 | static inline int pcie_capability_clear_dword(struct pci_dev *dev, int pos, |
1032 | u32 clear) |
1055 | u32 clear) |
1033 | { |
1056 | { |
1034 | return pcie_capability_clear_and_set_dword(dev, pos, clear, 0); |
1057 | return pcie_capability_clear_and_set_dword(dev, pos, clear, 0); |
1035 | } |
1058 | } |
1036 | 1059 | ||
1037 | /* user-space driven config access */ |
1060 | /* user-space driven config access */ |
1038 | int pci_user_read_config_byte(struct pci_dev *dev, int where, u8 *val); |
1061 | int pci_user_read_config_byte(struct pci_dev *dev, int where, u8 *val); |
1039 | int pci_user_read_config_word(struct pci_dev *dev, int where, u16 *val); |
1062 | int pci_user_read_config_word(struct pci_dev *dev, int where, u16 *val); |
1040 | int pci_user_read_config_dword(struct pci_dev *dev, int where, u32 *val); |
1063 | int pci_user_read_config_dword(struct pci_dev *dev, int where, u32 *val); |
1041 | int pci_user_write_config_byte(struct pci_dev *dev, int where, u8 val); |
1064 | int pci_user_write_config_byte(struct pci_dev *dev, int where, u8 val); |
1042 | int pci_user_write_config_word(struct pci_dev *dev, int where, u16 val); |
1065 | int pci_user_write_config_word(struct pci_dev *dev, int where, u16 val); |
1043 | int pci_user_write_config_dword(struct pci_dev *dev, int where, u32 val); |
1066 | int pci_user_write_config_dword(struct pci_dev *dev, int where, u32 val); |
1044 | 1067 | ||
1045 | int __must_check pci_enable_device(struct pci_dev *dev); |
1068 | int __must_check pci_enable_device(struct pci_dev *dev); |
1046 | int __must_check pci_enable_device_io(struct pci_dev *dev); |
1069 | int __must_check pci_enable_device_io(struct pci_dev *dev); |
1047 | int __must_check pci_enable_device_mem(struct pci_dev *dev); |
1070 | int __must_check pci_enable_device_mem(struct pci_dev *dev); |
1048 | int __must_check pci_reenable_device(struct pci_dev *); |
1071 | int __must_check pci_reenable_device(struct pci_dev *); |
1049 | int __must_check pcim_enable_device(struct pci_dev *pdev); |
1072 | int __must_check pcim_enable_device(struct pci_dev *pdev); |
1050 | void pcim_pin_device(struct pci_dev *pdev); |
1073 | void pcim_pin_device(struct pci_dev *pdev); |
1051 | 1074 | ||
1052 | static inline int pci_is_enabled(struct pci_dev *pdev) |
1075 | static inline int pci_is_enabled(struct pci_dev *pdev) |
1053 | { |
1076 | { |
1054 | return (atomic_read(&pdev->enable_cnt) > 0); |
1077 | return (atomic_read(&pdev->enable_cnt) > 0); |
1055 | } |
1078 | } |
1056 | 1079 | ||
1057 | static inline int pci_is_managed(struct pci_dev *pdev) |
1080 | static inline int pci_is_managed(struct pci_dev *pdev) |
1058 | { |
1081 | { |
1059 | return pdev->is_managed; |
1082 | return pdev->is_managed; |
1060 | } |
1083 | } |
1061 | 1084 | ||
1062 | void pci_disable_device(struct pci_dev *dev); |
1085 | void pci_disable_device(struct pci_dev *dev); |
1063 | 1086 | ||
1064 | extern unsigned int pcibios_max_latency; |
1087 | extern unsigned int pcibios_max_latency; |
1065 | void pci_set_master(struct pci_dev *dev); |
1088 | void pci_set_master(struct pci_dev *dev); |
1066 | void pci_clear_master(struct pci_dev *dev); |
1089 | void pci_clear_master(struct pci_dev *dev); |
1067 | 1090 | ||
1068 | int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state); |
1091 | int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state); |
1069 | int pci_set_cacheline_size(struct pci_dev *dev); |
1092 | int pci_set_cacheline_size(struct pci_dev *dev); |
1070 | #define HAVE_PCI_SET_MWI |
1093 | #define HAVE_PCI_SET_MWI |
1071 | int __must_check pci_set_mwi(struct pci_dev *dev); |
1094 | int __must_check pci_set_mwi(struct pci_dev *dev); |
1072 | int pci_try_set_mwi(struct pci_dev *dev); |
1095 | int pci_try_set_mwi(struct pci_dev *dev); |
1073 | void pci_clear_mwi(struct pci_dev *dev); |
1096 | void pci_clear_mwi(struct pci_dev *dev); |
1074 | void pci_intx(struct pci_dev *dev, int enable); |
1097 | void pci_intx(struct pci_dev *dev, int enable); |
1075 | bool pci_intx_mask_supported(struct pci_dev *dev); |
1098 | bool pci_intx_mask_supported(struct pci_dev *dev); |
1076 | bool pci_check_and_mask_intx(struct pci_dev *dev); |
1099 | bool pci_check_and_mask_intx(struct pci_dev *dev); |
1077 | bool pci_check_and_unmask_intx(struct pci_dev *dev); |
1100 | bool pci_check_and_unmask_intx(struct pci_dev *dev); |
1078 | int pci_wait_for_pending(struct pci_dev *dev, int pos, u16 mask); |
1101 | int pci_wait_for_pending(struct pci_dev *dev, int pos, u16 mask); |
1079 | int pci_wait_for_pending_transaction(struct pci_dev *dev); |
1102 | int pci_wait_for_pending_transaction(struct pci_dev *dev); |
1080 | int pcix_get_max_mmrbc(struct pci_dev *dev); |
1103 | int pcix_get_max_mmrbc(struct pci_dev *dev); |
1081 | int pcix_get_mmrbc(struct pci_dev *dev); |
1104 | int pcix_get_mmrbc(struct pci_dev *dev); |
1082 | int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc); |
1105 | int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc); |
1083 | int pcie_get_readrq(struct pci_dev *dev); |
1106 | int pcie_get_readrq(struct pci_dev *dev); |
1084 | int pcie_set_readrq(struct pci_dev *dev, int rq); |
1107 | int pcie_set_readrq(struct pci_dev *dev, int rq); |
1085 | int pcie_get_mps(struct pci_dev *dev); |
1108 | int pcie_get_mps(struct pci_dev *dev); |
1086 | int pcie_set_mps(struct pci_dev *dev, int mps); |
1109 | int pcie_set_mps(struct pci_dev *dev, int mps); |
1087 | int pcie_get_minimum_link(struct pci_dev *dev, enum pci_bus_speed *speed, |
1110 | int pcie_get_minimum_link(struct pci_dev *dev, enum pci_bus_speed *speed, |
1088 | enum pcie_link_width *width); |
1111 | enum pcie_link_width *width); |
1089 | int __pci_reset_function(struct pci_dev *dev); |
1112 | int __pci_reset_function(struct pci_dev *dev); |
1090 | int __pci_reset_function_locked(struct pci_dev *dev); |
1113 | int __pci_reset_function_locked(struct pci_dev *dev); |
1091 | int pci_reset_function(struct pci_dev *dev); |
1114 | int pci_reset_function(struct pci_dev *dev); |
1092 | int pci_try_reset_function(struct pci_dev *dev); |
1115 | int pci_try_reset_function(struct pci_dev *dev); |
1093 | int pci_probe_reset_slot(struct pci_slot *slot); |
1116 | int pci_probe_reset_slot(struct pci_slot *slot); |
1094 | int pci_reset_slot(struct pci_slot *slot); |
1117 | int pci_reset_slot(struct pci_slot *slot); |
1095 | int pci_try_reset_slot(struct pci_slot *slot); |
1118 | int pci_try_reset_slot(struct pci_slot *slot); |
1096 | int pci_probe_reset_bus(struct pci_bus *bus); |
1119 | int pci_probe_reset_bus(struct pci_bus *bus); |
1097 | int pci_reset_bus(struct pci_bus *bus); |
1120 | int pci_reset_bus(struct pci_bus *bus); |
1098 | int pci_try_reset_bus(struct pci_bus *bus); |
1121 | int pci_try_reset_bus(struct pci_bus *bus); |
1099 | void pci_reset_secondary_bus(struct pci_dev *dev); |
1122 | void pci_reset_secondary_bus(struct pci_dev *dev); |
1100 | void pcibios_reset_secondary_bus(struct pci_dev *dev); |
1123 | void pcibios_reset_secondary_bus(struct pci_dev *dev); |
1101 | void pci_reset_bridge_secondary_bus(struct pci_dev *dev); |
1124 | void pci_reset_bridge_secondary_bus(struct pci_dev *dev); |
1102 | void pci_update_resource(struct pci_dev *dev, int resno); |
1125 | void pci_update_resource(struct pci_dev *dev, int resno); |
1103 | int __must_check pci_assign_resource(struct pci_dev *dev, int i); |
1126 | int __must_check pci_assign_resource(struct pci_dev *dev, int i); |
1104 | int __must_check pci_reassign_resource(struct pci_dev *dev, int i, resource_size_t add_size, resource_size_t align); |
1127 | int __must_check pci_reassign_resource(struct pci_dev *dev, int i, resource_size_t add_size, resource_size_t align); |
1105 | int pci_select_bars(struct pci_dev *dev, unsigned long flags); |
1128 | int pci_select_bars(struct pci_dev *dev, unsigned long flags); |
1106 | bool pci_device_is_present(struct pci_dev *pdev); |
1129 | bool pci_device_is_present(struct pci_dev *pdev); |
1107 | void pci_ignore_hotplug(struct pci_dev *dev); |
1130 | void pci_ignore_hotplug(struct pci_dev *dev); |
1108 | 1131 | ||
1109 | /* ROM control related routines */ |
1132 | /* ROM control related routines */ |
1110 | int pci_enable_rom(struct pci_dev *pdev); |
1133 | int pci_enable_rom(struct pci_dev *pdev); |
1111 | void pci_disable_rom(struct pci_dev *pdev); |
1134 | void pci_disable_rom(struct pci_dev *pdev); |
1112 | void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size); |
1135 | void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size); |
1113 | void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom); |
1136 | void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom); |
1114 | size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size); |
1137 | size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size); |
1115 | void __iomem __must_check *pci_platform_rom(struct pci_dev *pdev, size_t *size); |
1138 | void __iomem __must_check *pci_platform_rom(struct pci_dev *pdev, size_t *size); |
1116 | 1139 | ||
1117 | /* Power management related routines */ |
1140 | /* Power management related routines */ |
1118 | int pci_save_state(struct pci_dev *dev); |
1141 | int pci_save_state(struct pci_dev *dev); |
1119 | void pci_restore_state(struct pci_dev *dev); |
1142 | void pci_restore_state(struct pci_dev *dev); |
1120 | struct pci_saved_state *pci_store_saved_state(struct pci_dev *dev); |
1143 | struct pci_saved_state *pci_store_saved_state(struct pci_dev *dev); |
1121 | int pci_load_saved_state(struct pci_dev *dev, |
1144 | int pci_load_saved_state(struct pci_dev *dev, |
1122 | struct pci_saved_state *state); |
1145 | struct pci_saved_state *state); |
1123 | int pci_load_and_free_saved_state(struct pci_dev *dev, |
1146 | int pci_load_and_free_saved_state(struct pci_dev *dev, |
1124 | struct pci_saved_state **state); |
1147 | struct pci_saved_state **state); |
1125 | struct pci_cap_saved_state *pci_find_saved_cap(struct pci_dev *dev, char cap); |
1148 | struct pci_cap_saved_state *pci_find_saved_cap(struct pci_dev *dev, char cap); |
1126 | struct pci_cap_saved_state *pci_find_saved_ext_cap(struct pci_dev *dev, |
1149 | struct pci_cap_saved_state *pci_find_saved_ext_cap(struct pci_dev *dev, |
1127 | u16 cap); |
1150 | u16 cap); |
1128 | int pci_add_cap_save_buffer(struct pci_dev *dev, char cap, unsigned int size); |
1151 | int pci_add_cap_save_buffer(struct pci_dev *dev, char cap, unsigned int size); |
1129 | int pci_add_ext_cap_save_buffer(struct pci_dev *dev, |
1152 | int pci_add_ext_cap_save_buffer(struct pci_dev *dev, |
1130 | u16 cap, unsigned int size); |
1153 | u16 cap, unsigned int size); |
1131 | int __pci_complete_power_transition(struct pci_dev *dev, pci_power_t state); |
1154 | int __pci_complete_power_transition(struct pci_dev *dev, pci_power_t state); |
1132 | int pci_set_power_state(struct pci_dev *dev, pci_power_t state); |
1155 | int pci_set_power_state(struct pci_dev *dev, pci_power_t state); |
1133 | pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state); |
1156 | pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state); |
1134 | bool pci_pme_capable(struct pci_dev *dev, pci_power_t state); |
1157 | bool pci_pme_capable(struct pci_dev *dev, pci_power_t state); |
1135 | void pci_pme_active(struct pci_dev *dev, bool enable); |
1158 | void pci_pme_active(struct pci_dev *dev, bool enable); |
1136 | int __pci_enable_wake(struct pci_dev *dev, pci_power_t state, |
1159 | int __pci_enable_wake(struct pci_dev *dev, pci_power_t state, |
1137 | bool runtime, bool enable); |
1160 | bool runtime, bool enable); |
1138 | int pci_wake_from_d3(struct pci_dev *dev, bool enable); |
1161 | int pci_wake_from_d3(struct pci_dev *dev, bool enable); |
1139 | int pci_prepare_to_sleep(struct pci_dev *dev); |
1162 | int pci_prepare_to_sleep(struct pci_dev *dev); |
1140 | int pci_back_from_sleep(struct pci_dev *dev); |
1163 | int pci_back_from_sleep(struct pci_dev *dev); |
1141 | bool pci_dev_run_wake(struct pci_dev *dev); |
1164 | bool pci_dev_run_wake(struct pci_dev *dev); |
1142 | bool pci_check_pme_status(struct pci_dev *dev); |
1165 | bool pci_check_pme_status(struct pci_dev *dev); |
1143 | void pci_pme_wakeup_bus(struct pci_bus *bus); |
1166 | void pci_pme_wakeup_bus(struct pci_bus *bus); |
1144 | 1167 | ||
1145 | static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, |
1168 | static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, |
1146 | bool enable) |
1169 | bool enable) |
1147 | { |
1170 | { |
1148 | return __pci_enable_wake(dev, state, false, enable); |
1171 | return __pci_enable_wake(dev, state, false, enable); |
1149 | } |
1172 | } |
1150 | 1173 | ||
1151 | /* PCI Virtual Channel */ |
1174 | /* PCI Virtual Channel */ |
1152 | int pci_save_vc_state(struct pci_dev *dev); |
1175 | int pci_save_vc_state(struct pci_dev *dev); |
1153 | void pci_restore_vc_state(struct pci_dev *dev); |
1176 | void pci_restore_vc_state(struct pci_dev *dev); |
1154 | void pci_allocate_vc_save_buffers(struct pci_dev *dev); |
1177 | void pci_allocate_vc_save_buffers(struct pci_dev *dev); |
1155 | 1178 | ||
1156 | /* For use by arch with custom probe code */ |
1179 | /* For use by arch with custom probe code */ |
1157 | void set_pcie_port_type(struct pci_dev *pdev); |
1180 | void set_pcie_port_type(struct pci_dev *pdev); |
1158 | void set_pcie_hotplug_bridge(struct pci_dev *pdev); |
1181 | void set_pcie_hotplug_bridge(struct pci_dev *pdev); |
1159 | 1182 | ||
1160 | /* Functions for PCI Hotplug drivers to use */ |
1183 | /* Functions for PCI Hotplug drivers to use */ |
1161 | int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap); |
1184 | int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap); |
1162 | unsigned int pci_rescan_bus_bridge_resize(struct pci_dev *bridge); |
1185 | unsigned int pci_rescan_bus_bridge_resize(struct pci_dev *bridge); |
1163 | unsigned int pci_rescan_bus(struct pci_bus *bus); |
1186 | unsigned int pci_rescan_bus(struct pci_bus *bus); |
1164 | void pci_lock_rescan_remove(void); |
1187 | void pci_lock_rescan_remove(void); |
1165 | void pci_unlock_rescan_remove(void); |
1188 | void pci_unlock_rescan_remove(void); |
1166 | 1189 | ||
1167 | /* Vital product data routines */ |
1190 | /* Vital product data routines */ |
1168 | ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf); |
1191 | ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf); |
1169 | ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf); |
1192 | ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf); |
1170 | int pci_set_vpd_size(struct pci_dev *dev, size_t len); |
1193 | int pci_set_vpd_size(struct pci_dev *dev, size_t len); |
1171 | 1194 | ||
1172 | /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */ |
1195 | /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */ |
1173 | resource_size_t pcibios_retrieve_fw_addr(struct pci_dev *dev, int idx); |
1196 | resource_size_t pcibios_retrieve_fw_addr(struct pci_dev *dev, int idx); |
1174 | void pci_bus_assign_resources(const struct pci_bus *bus); |
1197 | void pci_bus_assign_resources(const struct pci_bus *bus); |
1175 | void pci_bus_size_bridges(struct pci_bus *bus); |
1198 | void pci_bus_size_bridges(struct pci_bus *bus); |
1176 | int pci_claim_resource(struct pci_dev *, int); |
1199 | int pci_claim_resource(struct pci_dev *, int); |
1177 | int pci_claim_bridge_resource(struct pci_dev *bridge, int i); |
1200 | int pci_claim_bridge_resource(struct pci_dev *bridge, int i); |
1178 | void pci_assign_unassigned_resources(void); |
1201 | void pci_assign_unassigned_resources(void); |
1179 | void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge); |
1202 | void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge); |
1180 | void pci_assign_unassigned_bus_resources(struct pci_bus *bus); |
1203 | void pci_assign_unassigned_bus_resources(struct pci_bus *bus); |
1181 | void pci_assign_unassigned_root_bus_resources(struct pci_bus *bus); |
1204 | void pci_assign_unassigned_root_bus_resources(struct pci_bus *bus); |
1182 | void pdev_enable_device(struct pci_dev *); |
1205 | void pdev_enable_device(struct pci_dev *); |
1183 | int pci_enable_resources(struct pci_dev *, int mask); |
1206 | int pci_enable_resources(struct pci_dev *, int mask); |
1184 | void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *), |
1207 | void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *), |
1185 | int (*)(const struct pci_dev *, u8, u8)); |
1208 | int (*)(const struct pci_dev *, u8, u8)); |
1186 | #define HAVE_PCI_REQ_REGIONS 2 |
1209 | #define HAVE_PCI_REQ_REGIONS 2 |
1187 | int __must_check pci_request_regions(struct pci_dev *, const char *); |
1210 | int __must_check pci_request_regions(struct pci_dev *, const char *); |
1188 | int __must_check pci_request_regions_exclusive(struct pci_dev *, const char *); |
1211 | int __must_check pci_request_regions_exclusive(struct pci_dev *, const char *); |
1189 | void pci_release_regions(struct pci_dev *); |
1212 | void pci_release_regions(struct pci_dev *); |
1190 | int __must_check pci_request_region(struct pci_dev *, int, const char *); |
1213 | int __must_check pci_request_region(struct pci_dev *, int, const char *); |
1191 | int __must_check pci_request_region_exclusive(struct pci_dev *, int, const char *); |
1214 | int __must_check pci_request_region_exclusive(struct pci_dev *, int, const char *); |
1192 | void pci_release_region(struct pci_dev *, int); |
1215 | void pci_release_region(struct pci_dev *, int); |
1193 | int pci_request_selected_regions(struct pci_dev *, int, const char *); |
1216 | int pci_request_selected_regions(struct pci_dev *, int, const char *); |
1194 | int pci_request_selected_regions_exclusive(struct pci_dev *, int, const char *); |
1217 | int pci_request_selected_regions_exclusive(struct pci_dev *, int, const char *); |
1195 | void pci_release_selected_regions(struct pci_dev *, int); |
1218 | void pci_release_selected_regions(struct pci_dev *, int); |
1196 | 1219 | ||
1197 | /* drivers/pci/bus.c */ |
1220 | /* drivers/pci/bus.c */ |
1198 | struct pci_bus *pci_bus_get(struct pci_bus *bus); |
1221 | struct pci_bus *pci_bus_get(struct pci_bus *bus); |
1199 | void pci_bus_put(struct pci_bus *bus); |
1222 | void pci_bus_put(struct pci_bus *bus); |
1200 | void pci_add_resource(struct list_head *resources, struct resource *res); |
1223 | void pci_add_resource(struct list_head *resources, struct resource *res); |
1201 | void pci_add_resource_offset(struct list_head *resources, struct resource *res, |
1224 | void pci_add_resource_offset(struct list_head *resources, struct resource *res, |
1202 | resource_size_t offset); |
1225 | resource_size_t offset); |
1203 | void pci_free_resource_list(struct list_head *resources); |
1226 | void pci_free_resource_list(struct list_head *resources); |
1204 | void pci_bus_add_resource(struct pci_bus *bus, struct resource *res, unsigned int flags); |
1227 | void pci_bus_add_resource(struct pci_bus *bus, struct resource *res, unsigned int flags); |
1205 | struct resource *pci_bus_resource_n(const struct pci_bus *bus, int n); |
1228 | struct resource *pci_bus_resource_n(const struct pci_bus *bus, int n); |
1206 | void pci_bus_remove_resources(struct pci_bus *bus); |
1229 | void pci_bus_remove_resources(struct pci_bus *bus); |
1207 | 1230 | ||
1208 | #define pci_bus_for_each_resource(bus, res, i) \ |
1231 | #define pci_bus_for_each_resource(bus, res, i) \ |
1209 | for (i = 0; \ |
1232 | for (i = 0; \ |
1210 | (res = pci_bus_resource_n(bus, i)) || i < PCI_BRIDGE_RESOURCE_NUM; \ |
1233 | (res = pci_bus_resource_n(bus, i)) || i < PCI_BRIDGE_RESOURCE_NUM; \ |
1211 | i++) |
1234 | i++) |
1212 | 1235 | ||
1213 | int __must_check pci_bus_alloc_resource(struct pci_bus *bus, |
1236 | int __must_check pci_bus_alloc_resource(struct pci_bus *bus, |
1214 | struct resource *res, resource_size_t size, |
1237 | struct resource *res, resource_size_t size, |
1215 | resource_size_t align, resource_size_t min, |
1238 | resource_size_t align, resource_size_t min, |
1216 | unsigned long type_mask, |
1239 | unsigned long type_mask, |
1217 | resource_size_t (*alignf)(void *, |
1240 | resource_size_t (*alignf)(void *, |
1218 | const struct resource *, |
1241 | const struct resource *, |
1219 | resource_size_t, |
1242 | resource_size_t, |
1220 | resource_size_t), |
1243 | resource_size_t), |
1221 | void *alignf_data); |
1244 | void *alignf_data); |
1222 | 1245 | ||
1223 | 1246 | ||
1224 | int pci_remap_iospace(const struct resource *res, phys_addr_t phys_addr); |
1247 | int pci_remap_iospace(const struct resource *res, phys_addr_t phys_addr); |
1225 | 1248 | ||
1226 | static inline void |
1249 | static inline void |
1227 | _pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, |
1250 | _pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, |
1228 | struct resource *res) |
1251 | struct resource *res) |
1229 | { |
1252 | { |
1230 | region->start = res->start; |
1253 | region->start = res->start; |
1231 | region->end = res->end; |
1254 | region->end = res->end; |
1232 | } |
1255 | } |
1233 | 1256 | ||
1234 | static inline pci_bus_addr_t pci_bus_address(struct pci_dev *pdev, int bar) |
1257 | static inline pci_bus_addr_t pci_bus_address(struct pci_dev *pdev, int bar) |
1235 | { |
1258 | { |
1236 | struct pci_bus_region region; |
1259 | struct pci_bus_region region; |
1237 | 1260 | ||
1238 | _pcibios_resource_to_bus(pdev, ®ion, &pdev->resource[bar]); |
1261 | _pcibios_resource_to_bus(pdev, ®ion, &pdev->resource[bar]); |
1239 | return region.start; |
1262 | return region.start; |
1240 | } |
1263 | } |
1241 | 1264 | ||
1242 | /* Proper probing supporting hot-pluggable devices */ |
1265 | /* Proper probing supporting hot-pluggable devices */ |
1243 | int __must_check __pci_register_driver(struct pci_driver *, struct module *, |
1266 | int __must_check __pci_register_driver(struct pci_driver *, struct module *, |
1244 | const char *mod_name); |
1267 | const char *mod_name); |
1245 | 1268 | ||
1246 | /* |
1269 | /* |
1247 | * pci_register_driver must be a macro so that KBUILD_MODNAME can be expanded |
1270 | * pci_register_driver must be a macro so that KBUILD_MODNAME can be expanded |
1248 | */ |
1271 | */ |
1249 | #define pci_register_driver(driver) \ |
1272 | #define pci_register_driver(driver) \ |
1250 | __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME) |
1273 | __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME) |
1251 | 1274 | ||
1252 | void pci_unregister_driver(struct pci_driver *dev); |
1275 | void pci_unregister_driver(struct pci_driver *dev); |
1253 | 1276 | ||
1254 | /** |
1277 | /** |
1255 | * module_pci_driver() - Helper macro for registering a PCI driver |
1278 | * module_pci_driver() - Helper macro for registering a PCI driver |
1256 | * @__pci_driver: pci_driver struct |
1279 | * @__pci_driver: pci_driver struct |
1257 | * |
1280 | * |
1258 | * Helper macro for PCI drivers which do not do anything special in module |
1281 | * Helper macro for PCI drivers which do not do anything special in module |
1259 | * init/exit. This eliminates a lot of boilerplate. Each module may only |
1282 | * init/exit. This eliminates a lot of boilerplate. Each module may only |
1260 | * use this macro once, and calling it replaces module_init() and module_exit() |
1283 | * use this macro once, and calling it replaces module_init() and module_exit() |
1261 | */ |
1284 | */ |
1262 | #define module_pci_driver(__pci_driver) \ |
1285 | #define module_pci_driver(__pci_driver) \ |
1263 | module_driver(__pci_driver, pci_register_driver, \ |
1286 | module_driver(__pci_driver, pci_register_driver, \ |
1264 | pci_unregister_driver) |
1287 | pci_unregister_driver) |
1265 | 1288 | ||
1266 | /** |
1289 | /** |
1267 | * builtin_pci_driver() - Helper macro for registering a PCI driver |
1290 | * builtin_pci_driver() - Helper macro for registering a PCI driver |
1268 | * @__pci_driver: pci_driver struct |
1291 | * @__pci_driver: pci_driver struct |
1269 | * |
1292 | * |
1270 | * Helper macro for PCI drivers which do not do anything special in their |
1293 | * Helper macro for PCI drivers which do not do anything special in their |
1271 | * init code. This eliminates a lot of boilerplate. Each driver may only |
1294 | * init code. This eliminates a lot of boilerplate. Each driver may only |
1272 | * use this macro once, and calling it replaces device_initcall(...) |
1295 | * use this macro once, and calling it replaces device_initcall(...) |
1273 | */ |
1296 | */ |
1274 | #define builtin_pci_driver(__pci_driver) \ |
1297 | #define builtin_pci_driver(__pci_driver) \ |
1275 | builtin_driver(__pci_driver, pci_register_driver) |
1298 | builtin_driver(__pci_driver, pci_register_driver) |
1276 | 1299 | ||
1277 | struct pci_driver *pci_dev_driver(const struct pci_dev *dev); |
1300 | struct pci_driver *pci_dev_driver(const struct pci_dev *dev); |
1278 | int pci_add_dynid(struct pci_driver *drv, |
1301 | int pci_add_dynid(struct pci_driver *drv, |
1279 | unsigned int vendor, unsigned int device, |
1302 | unsigned int vendor, unsigned int device, |
1280 | unsigned int subvendor, unsigned int subdevice, |
1303 | unsigned int subvendor, unsigned int subdevice, |
1281 | unsigned int class, unsigned int class_mask, |
1304 | unsigned int class, unsigned int class_mask, |
1282 | unsigned long driver_data); |
1305 | unsigned long driver_data); |
1283 | const struct pci_device_id *pci_match_id(const struct pci_device_id *ids, |
1306 | const struct pci_device_id *pci_match_id(const struct pci_device_id *ids, |
1284 | struct pci_dev *dev); |
1307 | struct pci_dev *dev); |
1285 | int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max, |
1308 | int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max, |
1286 | int pass); |
1309 | int pass); |
1287 | 1310 | ||
1288 | void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *), |
1311 | void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *), |
1289 | void *userdata); |
1312 | void *userdata); |
1290 | int pci_cfg_space_size(struct pci_dev *dev); |
1313 | int pci_cfg_space_size(struct pci_dev *dev); |
1291 | unsigned char pci_bus_max_busnr(struct pci_bus *bus); |
1314 | unsigned char pci_bus_max_busnr(struct pci_bus *bus); |
1292 | void pci_setup_bridge(struct pci_bus *bus); |
1315 | void pci_setup_bridge(struct pci_bus *bus); |
1293 | resource_size_t pcibios_window_alignment(struct pci_bus *bus, |
1316 | resource_size_t pcibios_window_alignment(struct pci_bus *bus, |
1294 | unsigned long type); |
1317 | unsigned long type); |
1295 | resource_size_t pcibios_iov_resource_alignment(struct pci_dev *dev, int resno); |
1318 | resource_size_t pcibios_iov_resource_alignment(struct pci_dev *dev, int resno); |
1296 | 1319 | ||
1297 | #define PCI_VGA_STATE_CHANGE_BRIDGE (1 << 0) |
1320 | #define PCI_VGA_STATE_CHANGE_BRIDGE (1 << 0) |
1298 | #define PCI_VGA_STATE_CHANGE_DECODES (1 << 1) |
1321 | #define PCI_VGA_STATE_CHANGE_DECODES (1 << 1) |
1299 | 1322 | ||
1300 | int pci_set_vga_state(struct pci_dev *pdev, bool decode, |
1323 | int pci_set_vga_state(struct pci_dev *pdev, bool decode, |
1301 | unsigned int command_bits, u32 flags); |
1324 | unsigned int command_bits, u32 flags); |
1302 | 1325 | ||
1303 | /* kmem_cache style wrapper around pci_alloc_consistent() */ |
1326 | /* kmem_cache style wrapper around pci_alloc_consistent() */ |
1304 | 1327 | ||
1305 | #include |
1328 | #include |
1306 | #include |
1329 | #include |
1307 | 1330 | ||
1308 | #define pci_pool dma_pool |
1331 | #define pci_pool dma_pool |
1309 | #define pci_pool_create(name, pdev, size, align, allocation) \ |
1332 | #define pci_pool_create(name, pdev, size, align, allocation) \ |
1310 | dma_pool_create(name, &pdev->dev, size, align, allocation) |
1333 | dma_pool_create(name, &pdev->dev, size, align, allocation) |
1311 | #define pci_pool_destroy(pool) dma_pool_destroy(pool) |
1334 | #define pci_pool_destroy(pool) dma_pool_destroy(pool) |
1312 | #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle) |
1335 | #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle) |
1313 | #define pci_pool_zalloc(pool, flags, handle) \ |
1336 | #define pci_pool_zalloc(pool, flags, handle) \ |
1314 | dma_pool_zalloc(pool, flags, handle) |
1337 | dma_pool_zalloc(pool, flags, handle) |
1315 | #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr) |
1338 | #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr) |
1316 | 1339 | ||
1317 | struct msix_entry { |
1340 | struct msix_entry { |
1318 | u32 vector; /* kernel uses to write allocated vector */ |
1341 | u32 vector; /* kernel uses to write allocated vector */ |
1319 | u16 entry; /* driver uses to specify entry, OS writes */ |
1342 | u16 entry; /* driver uses to specify entry, OS writes */ |
1320 | }; |
1343 | }; |
1321 | 1344 | ||
1322 | #ifdef CONFIG_PCI_MSI |
1345 | #ifdef CONFIG_PCI_MSI |
1323 | int pci_msi_vec_count(struct pci_dev *dev); |
1346 | int pci_msi_vec_count(struct pci_dev *dev); |
1324 | void pci_msi_shutdown(struct pci_dev *dev); |
1347 | void pci_msi_shutdown(struct pci_dev *dev); |
1325 | void pci_disable_msi(struct pci_dev *dev); |
1348 | void pci_disable_msi(struct pci_dev *dev); |
1326 | int pci_msix_vec_count(struct pci_dev *dev); |
1349 | int pci_msix_vec_count(struct pci_dev *dev); |
1327 | int pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, int nvec); |
1350 | int pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, int nvec); |
1328 | void pci_msix_shutdown(struct pci_dev *dev); |
1351 | void pci_msix_shutdown(struct pci_dev *dev); |
1329 | void pci_disable_msix(struct pci_dev *dev); |
1352 | void pci_disable_msix(struct pci_dev *dev); |
1330 | void pci_restore_msi_state(struct pci_dev *dev); |
1353 | void pci_restore_msi_state(struct pci_dev *dev); |
1331 | int pci_msi_enabled(void); |
1354 | int pci_msi_enabled(void); |
1332 | int pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec); |
1355 | int pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec); |
1333 | static inline int pci_enable_msi_exact(struct pci_dev *dev, int nvec) |
1356 | static inline int pci_enable_msi_exact(struct pci_dev *dev, int nvec) |
1334 | { |
1357 | { |
1335 | int rc = pci_enable_msi_range(dev, nvec, nvec); |
1358 | int rc = pci_enable_msi_range(dev, nvec, nvec); |
1336 | if (rc < 0) |
1359 | if (rc < 0) |
1337 | return rc; |
1360 | return rc; |
1338 | return 0; |
1361 | return 0; |
1339 | } |
1362 | } |
1340 | int pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries, |
1363 | int pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries, |
1341 | int minvec, int maxvec); |
1364 | int minvec, int maxvec); |
1342 | static inline int pci_enable_msix_exact(struct pci_dev *dev, |
1365 | static inline int pci_enable_msix_exact(struct pci_dev *dev, |
1343 | struct msix_entry *entries, int nvec) |
1366 | struct msix_entry *entries, int nvec) |
1344 | { |
1367 | { |
1345 | int rc = pci_enable_msix_range(dev, entries, nvec, nvec); |
1368 | int rc = pci_enable_msix_range(dev, entries, nvec, nvec); |
1346 | if (rc < 0) |
1369 | if (rc < 0) |
1347 | return rc; |
1370 | return rc; |
1348 | return 0; |
1371 | return 0; |
1349 | } |
1372 | } |
1350 | #else |
1373 | #else |
1351 | static inline int pci_msi_vec_count(struct pci_dev *dev) { return -ENOSYS; } |
1374 | static inline int pci_msi_vec_count(struct pci_dev *dev) { return -ENOSYS; } |
1352 | static inline void pci_msi_shutdown(struct pci_dev *dev) { } |
1375 | static inline void pci_msi_shutdown(struct pci_dev *dev) { } |
1353 | static inline void pci_disable_msi(struct pci_dev *dev) { } |
1376 | static inline void pci_disable_msi(struct pci_dev *dev) { } |
1354 | static inline int pci_msix_vec_count(struct pci_dev *dev) { return -ENOSYS; } |
1377 | static inline int pci_msix_vec_count(struct pci_dev *dev) { return -ENOSYS; } |
1355 | static inline int pci_enable_msix(struct pci_dev *dev, |
1378 | static inline int pci_enable_msix(struct pci_dev *dev, |
1356 | struct msix_entry *entries, int nvec) |
1379 | struct msix_entry *entries, int nvec) |
1357 | { return -ENOSYS; } |
1380 | { return -ENOSYS; } |
1358 | static inline void pci_msix_shutdown(struct pci_dev *dev) { } |
1381 | static inline void pci_msix_shutdown(struct pci_dev *dev) { } |
1359 | static inline void pci_disable_msix(struct pci_dev *dev) { } |
1382 | static inline void pci_disable_msix(struct pci_dev *dev) { } |
1360 | static inline void pci_restore_msi_state(struct pci_dev *dev) { } |
1383 | static inline void pci_restore_msi_state(struct pci_dev *dev) { } |
1361 | static inline int pci_msi_enabled(void) { return 0; } |
1384 | static inline int pci_msi_enabled(void) { return 0; } |
1362 | static inline int pci_enable_msi_range(struct pci_dev *dev, int minvec, |
1385 | static inline int pci_enable_msi_range(struct pci_dev *dev, int minvec, |
1363 | int maxvec) |
1386 | int maxvec) |
1364 | { return -ENOSYS; } |
1387 | { return -ENOSYS; } |
1365 | static inline int pci_enable_msi_exact(struct pci_dev *dev, int nvec) |
1388 | static inline int pci_enable_msi_exact(struct pci_dev *dev, int nvec) |
1366 | { return -ENOSYS; } |
1389 | { return -ENOSYS; } |
1367 | static inline int pci_enable_msix_range(struct pci_dev *dev, |
1390 | static inline int pci_enable_msix_range(struct pci_dev *dev, |
1368 | struct msix_entry *entries, int minvec, int maxvec) |
1391 | struct msix_entry *entries, int minvec, int maxvec) |
1369 | { return -ENOSYS; } |
1392 | { return -ENOSYS; } |
1370 | static inline int pci_enable_msix_exact(struct pci_dev *dev, |
1393 | static inline int pci_enable_msix_exact(struct pci_dev *dev, |
1371 | struct msix_entry *entries, int nvec) |
1394 | struct msix_entry *entries, int nvec) |
1372 | { return -ENOSYS; } |
1395 | { return -ENOSYS; } |
1373 | #endif |
1396 | #endif |
1374 | 1397 | ||
1375 | #ifdef CONFIG_PCIEPORTBUS |
1398 | #ifdef CONFIG_PCIEPORTBUS |
1376 | extern bool pcie_ports_disabled; |
1399 | extern bool pcie_ports_disabled; |
1377 | extern bool pcie_ports_auto; |
1400 | extern bool pcie_ports_auto; |
1378 | #else |
1401 | #else |
1379 | #define pcie_ports_disabled true |
1402 | #define pcie_ports_disabled true |
1380 | #define pcie_ports_auto false |
1403 | #define pcie_ports_auto false |
1381 | #endif |
1404 | #endif |
1382 | 1405 | ||
1383 | #ifdef CONFIG_PCIEASPM |
1406 | #ifdef CONFIG_PCIEASPM |
1384 | bool pcie_aspm_support_enabled(void); |
1407 | bool pcie_aspm_support_enabled(void); |
1385 | #else |
1408 | #else |
1386 | static inline bool pcie_aspm_support_enabled(void) { return false; } |
1409 | static inline bool pcie_aspm_support_enabled(void) { return false; } |
1387 | #endif |
1410 | #endif |
1388 | 1411 | ||
1389 | #ifdef CONFIG_PCIEAER |
1412 | #ifdef CONFIG_PCIEAER |
1390 | void pci_no_aer(void); |
1413 | void pci_no_aer(void); |
1391 | bool pci_aer_available(void); |
1414 | bool pci_aer_available(void); |
1392 | #else |
1415 | #else |
1393 | static inline void pci_no_aer(void) { } |
1416 | static inline void pci_no_aer(void) { } |
1394 | static inline bool pci_aer_available(void) { return false; } |
1417 | static inline bool pci_aer_available(void) { return false; } |
1395 | #endif |
1418 | #endif |
1396 | 1419 | ||
1397 | #ifdef CONFIG_PCIE_ECRC |
1420 | #ifdef CONFIG_PCIE_ECRC |
1398 | void pcie_set_ecrc_checking(struct pci_dev *dev); |
1421 | void pcie_set_ecrc_checking(struct pci_dev *dev); |
1399 | void pcie_ecrc_get_policy(char *str); |
1422 | void pcie_ecrc_get_policy(char *str); |
1400 | #else |
1423 | #else |
1401 | static inline void pcie_set_ecrc_checking(struct pci_dev *dev) { } |
1424 | static inline void pcie_set_ecrc_checking(struct pci_dev *dev) { } |
1402 | static inline void pcie_ecrc_get_policy(char *str) { } |
1425 | static inline void pcie_ecrc_get_policy(char *str) { } |
1403 | #endif |
1426 | #endif |
1404 | 1427 | ||
1405 | #define pci_enable_msi(pdev) pci_enable_msi_exact(pdev, 1) |
1428 | #define pci_enable_msi(pdev) pci_enable_msi_exact(pdev, 1) |
1406 | 1429 | ||
1407 | #ifdef CONFIG_HT_IRQ |
1430 | #ifdef CONFIG_HT_IRQ |
1408 | /* The functions a driver should call */ |
1431 | /* The functions a driver should call */ |
1409 | int ht_create_irq(struct pci_dev *dev, int idx); |
1432 | int ht_create_irq(struct pci_dev *dev, int idx); |
1410 | void ht_destroy_irq(unsigned int irq); |
1433 | void ht_destroy_irq(unsigned int irq); |
1411 | #endif /* CONFIG_HT_IRQ */ |
1434 | #endif /* CONFIG_HT_IRQ */ |
1412 | 1435 | ||
1413 | #ifdef CONFIG_PCI_ATS |
1436 | #ifdef CONFIG_PCI_ATS |
1414 | /* Address Translation Service */ |
1437 | /* Address Translation Service */ |
1415 | void pci_ats_init(struct pci_dev *dev); |
1438 | void pci_ats_init(struct pci_dev *dev); |
1416 | int pci_enable_ats(struct pci_dev *dev, int ps); |
1439 | int pci_enable_ats(struct pci_dev *dev, int ps); |
1417 | void pci_disable_ats(struct pci_dev *dev); |
1440 | void pci_disable_ats(struct pci_dev *dev); |
1418 | int pci_ats_queue_depth(struct pci_dev *dev); |
1441 | int pci_ats_queue_depth(struct pci_dev *dev); |
1419 | #else |
1442 | #else |
1420 | static inline void pci_ats_init(struct pci_dev *d) { } |
1443 | static inline void pci_ats_init(struct pci_dev *d) { } |
1421 | static inline int pci_enable_ats(struct pci_dev *d, int ps) { return -ENODEV; } |
1444 | static inline int pci_enable_ats(struct pci_dev *d, int ps) { return -ENODEV; } |
1422 | static inline void pci_disable_ats(struct pci_dev *d) { } |
1445 | static inline void pci_disable_ats(struct pci_dev *d) { } |
1423 | static inline int pci_ats_queue_depth(struct pci_dev *d) { return -ENODEV; } |
1446 | static inline int pci_ats_queue_depth(struct pci_dev *d) { return -ENODEV; } |
1424 | #endif |
1447 | #endif |
1425 | 1448 | ||
1426 | void pci_cfg_access_lock(struct pci_dev *dev); |
1449 | void pci_cfg_access_lock(struct pci_dev *dev); |
1427 | bool pci_cfg_access_trylock(struct pci_dev *dev); |
1450 | bool pci_cfg_access_trylock(struct pci_dev *dev); |
1428 | void pci_cfg_access_unlock(struct pci_dev *dev); |
1451 | void pci_cfg_access_unlock(struct pci_dev *dev); |
1429 | 1452 | ||
1430 | /* |
1453 | /* |
1431 | * PCI domain support. Sometimes called PCI segment (eg by ACPI), |
1454 | * PCI domain support. Sometimes called PCI segment (eg by ACPI), |
1432 | * a PCI domain is defined to be a set of PCI buses which share |
1455 | * a PCI domain is defined to be a set of PCI buses which share |
1433 | * configuration space. |
1456 | * configuration space. |
1434 | */ |
1457 | */ |
1435 | #ifdef CONFIG_PCI_DOMAINS |
1458 | #ifdef CONFIG_PCI_DOMAINS |
1436 | extern int pci_domains_supported; |
1459 | extern int pci_domains_supported; |
1437 | int pci_get_new_domain_nr(void); |
1460 | int pci_get_new_domain_nr(void); |
1438 | #else |
1461 | #else |
1439 | enum { pci_domains_supported = 0 }; |
1462 | enum { pci_domains_supported = 0 }; |
1440 | static inline int pci_domain_nr(struct pci_bus *bus) { return 0; } |
1463 | static inline int pci_domain_nr(struct pci_bus *bus) { return 0; } |
1441 | static inline int pci_proc_domain(struct pci_bus *bus) { return 0; } |
1464 | static inline int pci_proc_domain(struct pci_bus *bus) { return 0; } |
1442 | static inline int pci_get_new_domain_nr(void) { return -ENOSYS; } |
1465 | static inline int pci_get_new_domain_nr(void) { return -ENOSYS; } |
1443 | #endif /* CONFIG_PCI_DOMAINS */ |
1466 | #endif /* CONFIG_PCI_DOMAINS */ |
1444 | 1467 | ||
1445 | /* |
1468 | /* |
1446 | * Generic implementation for PCI domain support. If your |
1469 | * Generic implementation for PCI domain support. If your |
1447 | * architecture does not need custom management of PCI |
1470 | * architecture does not need custom management of PCI |
1448 | * domains then this implementation will be used |
1471 | * domains then this implementation will be used |
1449 | */ |
1472 | */ |
1450 | #ifdef CONFIG_PCI_DOMAINS_GENERIC |
1473 | #ifdef CONFIG_PCI_DOMAINS_GENERIC |
1451 | static inline int pci_domain_nr(struct pci_bus *bus) |
1474 | static inline int pci_domain_nr(struct pci_bus *bus) |
1452 | { |
1475 | { |
1453 | return bus->domain_nr; |
1476 | return bus->domain_nr; |
1454 | } |
1477 | } |
1455 | void pci_bus_assign_domain_nr(struct pci_bus *bus, struct device *parent); |
1478 | void pci_bus_assign_domain_nr(struct pci_bus *bus, struct device *parent); |
1456 | #else |
1479 | #else |
1457 | static inline void pci_bus_assign_domain_nr(struct pci_bus *bus, |
1480 | static inline void pci_bus_assign_domain_nr(struct pci_bus *bus, |
1458 | struct device *parent) |
1481 | struct device *parent) |
1459 | { |
1482 | { |
1460 | } |
1483 | } |
1461 | #endif |
1484 | #endif |
1462 | 1485 | ||
1463 | /* some architectures require additional setup to direct VGA traffic */ |
1486 | /* some architectures require additional setup to direct VGA traffic */ |
1464 | typedef int (*arch_set_vga_state_t)(struct pci_dev *pdev, bool decode, |
1487 | typedef int (*arch_set_vga_state_t)(struct pci_dev *pdev, bool decode, |
1465 | unsigned int command_bits, u32 flags); |
1488 | unsigned int command_bits, u32 flags); |
1466 | void pci_register_set_vga_state(arch_set_vga_state_t func); |
1489 | void pci_register_set_vga_state(arch_set_vga_state_t func); |
1467 | 1490 | ||
1468 | #else /* CONFIG_PCI is not enabled */ |
1491 | #else /* CONFIG_PCI is not enabled */ |
1469 | 1492 | ||
1470 | static inline void pci_set_flags(int flags) { } |
1493 | static inline void pci_set_flags(int flags) { } |
1471 | static inline void pci_add_flags(int flags) { } |
1494 | static inline void pci_add_flags(int flags) { } |
1472 | static inline void pci_clear_flags(int flags) { } |
1495 | static inline void pci_clear_flags(int flags) { } |
1473 | static inline int pci_has_flag(int flag) { return 0; } |
1496 | static inline int pci_has_flag(int flag) { return 0; } |
1474 | 1497 | ||
1475 | /* |
1498 | /* |
1476 | * If the system does not have PCI, clearly these return errors. Define |
1499 | * If the system does not have PCI, clearly these return errors. Define |
1477 | * these as simple inline functions to avoid hair in drivers. |
1500 | * these as simple inline functions to avoid hair in drivers. |
1478 | */ |
1501 | */ |
1479 | 1502 | ||
1480 | #define _PCI_NOP(o, s, t) \ |
1503 | #define _PCI_NOP(o, s, t) \ |
1481 | static inline int pci_##o##_config_##s(struct pci_dev *dev, \ |
1504 | static inline int pci_##o##_config_##s(struct pci_dev *dev, \ |
1482 | int where, t val) \ |
1505 | int where, t val) \ |
1483 | { return PCIBIOS_FUNC_NOT_SUPPORTED; } |
1506 | { return PCIBIOS_FUNC_NOT_SUPPORTED; } |
1484 | 1507 | ||
1485 | #define _PCI_NOP_ALL(o, x) _PCI_NOP(o, byte, u8 x) \ |
1508 | #define _PCI_NOP_ALL(o, x) _PCI_NOP(o, byte, u8 x) \ |
1486 | _PCI_NOP(o, word, u16 x) \ |
1509 | _PCI_NOP(o, word, u16 x) \ |
1487 | _PCI_NOP(o, dword, u32 x) |
1510 | _PCI_NOP(o, dword, u32 x) |
1488 | _PCI_NOP_ALL(read, *) |
1511 | _PCI_NOP_ALL(read, *) |
1489 | _PCI_NOP_ALL(write,) |
1512 | _PCI_NOP_ALL(write,) |
1490 | /* |
1513 | /* |
1491 | static inline struct pci_dev *pci_get_device(unsigned int vendor, |
1514 | static inline struct pci_dev *pci_get_device(unsigned int vendor, |
1492 | unsigned int device, |
1515 | unsigned int device, |
1493 | struct pci_dev *from) |
1516 | struct pci_dev *from) |
1494 | { return NULL; }*/ |
1517 | { return NULL; }*/ |
1495 | 1518 | ||
1496 | static inline struct pci_dev *pci_get_subsys(unsigned int vendor, |
1519 | static inline struct pci_dev *pci_get_subsys(unsigned int vendor, |
1497 | unsigned int device, |
1520 | unsigned int device, |
1498 | unsigned int ss_vendor, |
1521 | unsigned int ss_vendor, |
1499 | unsigned int ss_device, |
1522 | unsigned int ss_device, |
1500 | struct pci_dev *from) |
1523 | struct pci_dev *from) |
1501 | { return NULL; } |
1524 | { return NULL; } |
1502 | 1525 | ||
1503 | static inline struct pci_dev *pci_get_class(unsigned int class, |
1526 | static inline struct pci_dev *pci_get_class(unsigned int class, |
1504 | struct pci_dev *from) |
1527 | struct pci_dev *from) |
1505 | { return NULL; } |
1528 | { return NULL; } |
1506 | 1529 | ||
1507 | #define pci_dev_present(ids) (0) |
1530 | #define pci_dev_present(ids) (0) |
1508 | #define no_pci_devices() (1) |
1531 | #define no_pci_devices() (1) |
1509 | #define pci_dev_put(dev) do { } while (0) |
1532 | #define pci_dev_put(dev) do { } while (0) |
1510 | 1533 | ||
1511 | static inline void pci_set_master(struct pci_dev *dev) { } |
1534 | static inline void pci_set_master(struct pci_dev *dev) { } |
1512 | static inline int pci_enable_device(struct pci_dev *dev) { return -EIO; } |
1535 | static inline int pci_enable_device(struct pci_dev *dev) { return -EIO; } |
1513 | static inline void pci_disable_device(struct pci_dev *dev) { } |
1536 | static inline void pci_disable_device(struct pci_dev *dev) { } |
1514 | static inline int pci_assign_resource(struct pci_dev *dev, int i) |
1537 | static inline int pci_assign_resource(struct pci_dev *dev, int i) |
1515 | { return -EBUSY; } |
1538 | { return -EBUSY; } |
1516 | static inline int __pci_register_driver(struct pci_driver *drv, |
1539 | static inline int __pci_register_driver(struct pci_driver *drv, |
1517 | struct module *owner) |
1540 | struct module *owner) |
1518 | { return 0; } |
1541 | { return 0; } |
1519 | static inline int pci_register_driver(struct pci_driver *drv) |
1542 | static inline int pci_register_driver(struct pci_driver *drv) |
1520 | { return 0; } |
1543 | { return 0; } |
1521 | static inline void pci_unregister_driver(struct pci_driver *drv) { } |
1544 | static inline void pci_unregister_driver(struct pci_driver *drv) { } |
1522 | static inline int pci_find_capability(struct pci_dev *dev, int cap) |
1545 | static inline int pci_find_capability(struct pci_dev *dev, int cap) |
1523 | { return 0; } |
1546 | { return 0; } |
1524 | static inline int pci_find_next_capability(struct pci_dev *dev, u8 post, |
1547 | static inline int pci_find_next_capability(struct pci_dev *dev, u8 post, |
1525 | int cap) |
1548 | int cap) |
1526 | { return 0; } |
1549 | { return 0; } |
1527 | static inline int pci_find_ext_capability(struct pci_dev *dev, int cap) |
1550 | static inline int pci_find_ext_capability(struct pci_dev *dev, int cap) |
1528 | { return 0; } |
1551 | { return 0; } |
1529 | 1552 | ||
1530 | /* Power management related routines */ |
1553 | /* Power management related routines */ |
1531 | static inline int pci_save_state(struct pci_dev *dev) { return 0; } |
1554 | static inline int pci_save_state(struct pci_dev *dev) { return 0; } |
1532 | static inline void pci_restore_state(struct pci_dev *dev) { } |
1555 | static inline void pci_restore_state(struct pci_dev *dev) { } |
1533 | static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state) |
1556 | static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state) |
1534 | { return 0; } |
1557 | { return 0; } |
1535 | static inline int pci_wake_from_d3(struct pci_dev *dev, bool enable) |
1558 | static inline int pci_wake_from_d3(struct pci_dev *dev, bool enable) |
1536 | { return 0; } |
1559 | { return 0; } |
1537 | static inline pci_power_t pci_choose_state(struct pci_dev *dev, |
1560 | static inline pci_power_t pci_choose_state(struct pci_dev *dev, |
1538 | pm_message_t state) |
1561 | pm_message_t state) |
1539 | { return PCI_D0; } |
1562 | { return PCI_D0; } |
1540 | static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, |
1563 | static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, |
1541 | int enable) |
1564 | int enable) |
1542 | { return 0; } |
1565 | { return 0; } |
1543 | 1566 | ||
1544 | static inline int pci_request_regions(struct pci_dev *dev, const char *res_name) |
1567 | static inline int pci_request_regions(struct pci_dev *dev, const char *res_name) |
1545 | { return -EIO; } |
1568 | { return -EIO; } |
1546 | static inline void pci_release_regions(struct pci_dev *dev) { } |
1569 | static inline void pci_release_regions(struct pci_dev *dev) { } |
1547 | 1570 | ||
1548 | static inline void pci_block_cfg_access(struct pci_dev *dev) { } |
1571 | static inline void pci_block_cfg_access(struct pci_dev *dev) { } |
1549 | static inline int pci_block_cfg_access_in_atomic(struct pci_dev *dev) |
1572 | static inline int pci_block_cfg_access_in_atomic(struct pci_dev *dev) |
1550 | { return 0; } |
1573 | { return 0; } |
1551 | static inline void pci_unblock_cfg_access(struct pci_dev *dev) { } |
1574 | static inline void pci_unblock_cfg_access(struct pci_dev *dev) { } |
1552 | 1575 | ||
1553 | static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from) |
1576 | static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from) |
1554 | { return NULL; } |
1577 | { return NULL; } |
1555 | static inline struct pci_dev *pci_get_slot(struct pci_bus *bus, |
1578 | static inline struct pci_dev *pci_get_slot(struct pci_bus *bus, |
1556 | unsigned int devfn) |
1579 | unsigned int devfn) |
1557 | { return NULL; } |
1580 | { return NULL; } |
1558 | static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus, |
1581 | static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus, |
1559 | unsigned int devfn) |
1582 | unsigned int devfn) |
1560 | { return NULL; } |
1583 | { return NULL; } |
1561 | 1584 | ||
1562 | static inline int pci_domain_nr(struct pci_bus *bus) { return 0; } |
1585 | static inline int pci_domain_nr(struct pci_bus *bus) { return 0; } |
1563 | static inline struct pci_dev *pci_dev_get(struct pci_dev *dev) { return NULL; } |
1586 | static inline struct pci_dev *pci_dev_get(struct pci_dev *dev) { return NULL; } |
1564 | static inline int pci_get_new_domain_nr(void) { return -ENOSYS; } |
1587 | static inline int pci_get_new_domain_nr(void) { return -ENOSYS; } |
1565 | 1588 | ||
1566 | #define dev_is_pci(d) (false) |
1589 | #define dev_is_pci(d) (false) |
1567 | #define dev_is_pf(d) (false) |
1590 | #define dev_is_pf(d) (false) |
1568 | #define dev_num_vf(d) (0) |
1591 | #define dev_num_vf(d) (0) |
1569 | #endif /* CONFIG_PCI */ |
1592 | #endif /* CONFIG_PCI */ |
1570 | 1593 | ||
1571 | /* Include architecture-dependent settings and functions */ |
1594 | /* Include architecture-dependent settings and functions */ |
1572 | 1595 | ||
1573 | #include |
1596 | #include |
1574 | 1597 | ||
1575 | #ifndef pci_root_bus_fwnode |
1598 | #ifndef pci_root_bus_fwnode |
1576 | #define pci_root_bus_fwnode(bus) NULL |
1599 | #define pci_root_bus_fwnode(bus) NULL |
1577 | #endif |
1600 | #endif |
1578 | 1601 | ||
1579 | /* these helpers provide future and backwards compatibility |
1602 | /* these helpers provide future and backwards compatibility |
1580 | * for accessing popular PCI BAR info */ |
1603 | * for accessing popular PCI BAR info */ |
1581 | #define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start) |
1604 | #define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start) |
1582 | #define pci_resource_end(dev, bar) ((dev)->resource[(bar)].end) |
1605 | #define pci_resource_end(dev, bar) ((dev)->resource[(bar)].end) |
1583 | #define pci_resource_flags(dev, bar) ((dev)->resource[(bar)].flags) |
1606 | #define pci_resource_flags(dev, bar) ((dev)->resource[(bar)].flags) |
1584 | #define pci_resource_len(dev,bar) \ |
1607 | #define pci_resource_len(dev,bar) \ |
1585 | ((pci_resource_start((dev), (bar)) == 0 && \ |
1608 | ((pci_resource_start((dev), (bar)) == 0 && \ |
1586 | pci_resource_end((dev), (bar)) == \ |
1609 | pci_resource_end((dev), (bar)) == \ |
1587 | pci_resource_start((dev), (bar))) ? 0 : \ |
1610 | pci_resource_start((dev), (bar))) ? 0 : \ |
1588 | \ |
1611 | \ |
1589 | (pci_resource_end((dev), (bar)) - \ |
1612 | (pci_resource_end((dev), (bar)) - \ |
1590 | pci_resource_start((dev), (bar)) + 1)) |
1613 | pci_resource_start((dev), (bar)) + 1)) |
1591 | 1614 | ||
1592 | /* Similar to the helpers above, these manipulate per-pci_dev |
1615 | /* Similar to the helpers above, these manipulate per-pci_dev |
1593 | * driver-specific data. They are really just a wrapper around |
1616 | * driver-specific data. They are really just a wrapper around |
1594 | * the generic device structure functions of these calls. |
1617 | * the generic device structure functions of these calls. |
1595 | */ |
1618 | */ |
1596 | static inline void *pci_get_drvdata(struct pci_dev *pdev) |
1619 | static inline void *pci_get_drvdata(struct pci_dev *pdev) |
1597 | { |
1620 | { |
1598 | return dev_get_drvdata(&pdev->dev); |
1621 | return dev_get_drvdata(&pdev->dev); |
1599 | } |
1622 | } |
1600 | 1623 | ||
1601 | static inline void pci_set_drvdata(struct pci_dev *pdev, void *data) |
1624 | static inline void pci_set_drvdata(struct pci_dev *pdev, void *data) |
1602 | { |
1625 | { |
1603 | dev_set_drvdata(&pdev->dev, data); |
1626 | dev_set_drvdata(&pdev->dev, data); |
1604 | } |
1627 | } |
1605 | 1628 | ||
1606 | /* If you want to know what to call your pci_dev, ask this function. |
1629 | /* If you want to know what to call your pci_dev, ask this function. |
1607 | * Again, it's a wrapper around the generic device. |
1630 | * Again, it's a wrapper around the generic device. |
1608 | */ |
1631 | */ |
1609 | static inline const char *pci_name(const struct pci_dev *pdev) |
1632 | static inline const char *pci_name(const struct pci_dev *pdev) |
1610 | { |
1633 | { |
1611 | return dev_name(&pdev->dev); |
1634 | return dev_name(&pdev->dev); |
1612 | } |
1635 | } |
1613 | 1636 | ||
1614 | 1637 | ||
1615 | /* Some archs don't want to expose struct resource to userland as-is |
1638 | /* Some archs don't want to expose struct resource to userland as-is |
1616 | * in sysfs and /proc |
1639 | * in sysfs and /proc |
1617 | */ |
1640 | */ |
1618 | #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER |
1641 | #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER |
1619 | static inline void pci_resource_to_user(const struct pci_dev *dev, int bar, |
1642 | static inline void pci_resource_to_user(const struct pci_dev *dev, int bar, |
1620 | const struct resource *rsrc, resource_size_t *start, |
1643 | const struct resource *rsrc, resource_size_t *start, |
1621 | resource_size_t *end) |
1644 | resource_size_t *end) |
1622 | { |
1645 | { |
1623 | *start = rsrc->start; |
1646 | *start = rsrc->start; |
1624 | *end = rsrc->end; |
1647 | *end = rsrc->end; |
1625 | } |
1648 | } |
1626 | #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */ |
1649 | #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */ |
1627 | 1650 | ||
1628 | 1651 | ||
1629 | /* |
1652 | /* |
1630 | * The world is not perfect and supplies us with broken PCI devices. |
1653 | * The world is not perfect and supplies us with broken PCI devices. |
1631 | * For at least a part of these bugs we need a work-around, so both |
1654 | * For at least a part of these bugs we need a work-around, so both |
1632 | * generic (drivers/pci/quirks.c) and per-architecture code can define |
1655 | * generic (drivers/pci/quirks.c) and per-architecture code can define |
1633 | * fixup hooks to be called for particular buggy devices. |
1656 | * fixup hooks to be called for particular buggy devices. |
1634 | */ |
1657 | */ |
1635 | 1658 | ||
1636 | struct pci_fixup { |
1659 | struct pci_fixup { |
1637 | u16 vendor; /* You can use PCI_ANY_ID here of course */ |
1660 | u16 vendor; /* You can use PCI_ANY_ID here of course */ |
1638 | u16 device; /* You can use PCI_ANY_ID here of course */ |
1661 | u16 device; /* You can use PCI_ANY_ID here of course */ |
1639 | u32 class; /* You can use PCI_ANY_ID here too */ |
1662 | u32 class; /* You can use PCI_ANY_ID here too */ |
1640 | unsigned int class_shift; /* should be 0, 8, 16 */ |
1663 | unsigned int class_shift; /* should be 0, 8, 16 */ |
1641 | void (*hook)(struct pci_dev *dev); |
1664 | void (*hook)(struct pci_dev *dev); |
1642 | }; |
1665 | }; |
1643 | 1666 | ||
1644 | enum pci_fixup_pass { |
1667 | enum pci_fixup_pass { |
1645 | pci_fixup_early, /* Before probing BARs */ |
1668 | pci_fixup_early, /* Before probing BARs */ |
1646 | pci_fixup_header, /* After reading configuration header */ |
1669 | pci_fixup_header, /* After reading configuration header */ |
1647 | pci_fixup_final, /* Final phase of device fixups */ |
1670 | pci_fixup_final, /* Final phase of device fixups */ |
1648 | pci_fixup_enable, /* pci_enable_device() time */ |
1671 | pci_fixup_enable, /* pci_enable_device() time */ |
1649 | pci_fixup_resume, /* pci_device_resume() */ |
1672 | pci_fixup_resume, /* pci_device_resume() */ |
1650 | pci_fixup_suspend, /* pci_device_suspend() */ |
1673 | pci_fixup_suspend, /* pci_device_suspend() */ |
1651 | pci_fixup_resume_early, /* pci_device_resume_early() */ |
1674 | pci_fixup_resume_early, /* pci_device_resume_early() */ |
1652 | pci_fixup_suspend_late, /* pci_device_suspend_late() */ |
1675 | pci_fixup_suspend_late, /* pci_device_suspend_late() */ |
1653 | }; |
1676 | }; |
1654 | 1677 | ||
1655 | /* Anonymous variables would be nice... */ |
1678 | /* Anonymous variables would be nice... */ |
1656 | #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, class, \ |
1679 | #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, class, \ |
1657 | class_shift, hook) \ |
1680 | class_shift, hook) \ |
1658 | static const struct pci_fixup __PASTE(__pci_fixup_##name,__LINE__) __used \ |
1681 | static const struct pci_fixup __PASTE(__pci_fixup_##name,__LINE__) __used \ |
1659 | __attribute__((__section__(#section), aligned((sizeof(void *))))) \ |
1682 | __attribute__((__section__(#section), aligned((sizeof(void *))))) \ |
1660 | = { vendor, device, class, class_shift, hook }; |
1683 | = { vendor, device, class, class_shift, hook }; |
1661 | 1684 | ||
1662 | #define DECLARE_PCI_FIXUP_CLASS_EARLY(vendor, device, class, \ |
1685 | #define DECLARE_PCI_FIXUP_CLASS_EARLY(vendor, device, class, \ |
1663 | class_shift, hook) \ |
1686 | class_shift, hook) \ |
1664 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \ |
1687 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \ |
1665 | hook, vendor, device, class, class_shift, hook) |
1688 | hook, vendor, device, class, class_shift, hook) |
1666 | #define DECLARE_PCI_FIXUP_CLASS_HEADER(vendor, device, class, \ |
1689 | #define DECLARE_PCI_FIXUP_CLASS_HEADER(vendor, device, class, \ |
1667 | class_shift, hook) \ |
1690 | class_shift, hook) \ |
1668 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \ |
1691 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \ |
1669 | hook, vendor, device, class, class_shift, hook) |
1692 | hook, vendor, device, class, class_shift, hook) |
1670 | #define DECLARE_PCI_FIXUP_CLASS_FINAL(vendor, device, class, \ |
1693 | #define DECLARE_PCI_FIXUP_CLASS_FINAL(vendor, device, class, \ |
1671 | class_shift, hook) \ |
1694 | class_shift, hook) \ |
1672 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \ |
1695 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \ |
1673 | hook, vendor, device, class, class_shift, hook) |
1696 | hook, vendor, device, class, class_shift, hook) |
1674 | #define DECLARE_PCI_FIXUP_CLASS_ENABLE(vendor, device, class, \ |
1697 | #define DECLARE_PCI_FIXUP_CLASS_ENABLE(vendor, device, class, \ |
1675 | class_shift, hook) \ |
1698 | class_shift, hook) \ |
1676 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \ |
1699 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \ |
1677 | hook, vendor, device, class, class_shift, hook) |
1700 | hook, vendor, device, class, class_shift, hook) |
1678 | #define DECLARE_PCI_FIXUP_CLASS_RESUME(vendor, device, class, \ |
1701 | #define DECLARE_PCI_FIXUP_CLASS_RESUME(vendor, device, class, \ |
1679 | class_shift, hook) \ |
1702 | class_shift, hook) \ |
1680 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \ |
1703 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \ |
1681 | resume##hook, vendor, device, class, \ |
1704 | resume##hook, vendor, device, class, \ |
1682 | class_shift, hook) |
1705 | class_shift, hook) |
1683 | #define DECLARE_PCI_FIXUP_CLASS_RESUME_EARLY(vendor, device, class, \ |
1706 | #define DECLARE_PCI_FIXUP_CLASS_RESUME_EARLY(vendor, device, class, \ |
1684 | class_shift, hook) \ |
1707 | class_shift, hook) \ |
1685 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \ |
1708 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \ |
1686 | resume_early##hook, vendor, device, \ |
1709 | resume_early##hook, vendor, device, \ |
1687 | class, class_shift, hook) |
1710 | class, class_shift, hook) |
1688 | #define DECLARE_PCI_FIXUP_CLASS_SUSPEND(vendor, device, class, \ |
1711 | #define DECLARE_PCI_FIXUP_CLASS_SUSPEND(vendor, device, class, \ |
1689 | class_shift, hook) \ |
1712 | class_shift, hook) \ |
1690 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \ |
1713 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \ |
1691 | suspend##hook, vendor, device, class, \ |
1714 | suspend##hook, vendor, device, class, \ |
1692 | class_shift, hook) |
1715 | class_shift, hook) |
1693 | #define DECLARE_PCI_FIXUP_CLASS_SUSPEND_LATE(vendor, device, class, \ |
1716 | #define DECLARE_PCI_FIXUP_CLASS_SUSPEND_LATE(vendor, device, class, \ |
1694 | class_shift, hook) \ |
1717 | class_shift, hook) \ |
1695 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend_late, \ |
1718 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend_late, \ |
1696 | suspend_late##hook, vendor, device, \ |
1719 | suspend_late##hook, vendor, device, \ |
1697 | class, class_shift, hook) |
1720 | class, class_shift, hook) |
1698 | 1721 | ||
1699 | #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \ |
1722 | #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \ |
1700 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \ |
1723 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \ |
1701 | hook, vendor, device, PCI_ANY_ID, 0, hook) |
1724 | hook, vendor, device, PCI_ANY_ID, 0, hook) |
1702 | #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \ |
1725 | #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \ |
1703 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \ |
1726 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \ |
1704 | hook, vendor, device, PCI_ANY_ID, 0, hook) |
1727 | hook, vendor, device, PCI_ANY_ID, 0, hook) |
1705 | #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \ |
1728 | #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \ |
1706 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \ |
1729 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \ |
1707 | hook, vendor, device, PCI_ANY_ID, 0, hook) |
1730 | hook, vendor, device, PCI_ANY_ID, 0, hook) |
1708 | #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \ |
1731 | #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \ |
1709 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \ |
1732 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \ |
1710 | hook, vendor, device, PCI_ANY_ID, 0, hook) |
1733 | hook, vendor, device, PCI_ANY_ID, 0, hook) |
1711 | #define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \ |
1734 | #define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \ |
1712 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \ |
1735 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \ |
1713 | resume##hook, vendor, device, \ |
1736 | resume##hook, vendor, device, \ |
1714 | PCI_ANY_ID, 0, hook) |
1737 | PCI_ANY_ID, 0, hook) |
1715 | #define DECLARE_PCI_FIXUP_RESUME_EARLY(vendor, device, hook) \ |
1738 | #define DECLARE_PCI_FIXUP_RESUME_EARLY(vendor, device, hook) \ |
1716 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \ |
1739 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \ |
1717 | resume_early##hook, vendor, device, \ |
1740 | resume_early##hook, vendor, device, \ |
1718 | PCI_ANY_ID, 0, hook) |
1741 | PCI_ANY_ID, 0, hook) |
1719 | #define DECLARE_PCI_FIXUP_SUSPEND(vendor, device, hook) \ |
1742 | #define DECLARE_PCI_FIXUP_SUSPEND(vendor, device, hook) \ |
1720 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \ |
1743 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \ |
1721 | suspend##hook, vendor, device, \ |
1744 | suspend##hook, vendor, device, \ |
1722 | PCI_ANY_ID, 0, hook) |
1745 | PCI_ANY_ID, 0, hook) |
1723 | #define DECLARE_PCI_FIXUP_SUSPEND_LATE(vendor, device, hook) \ |
1746 | #define DECLARE_PCI_FIXUP_SUSPEND_LATE(vendor, device, hook) \ |
1724 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend_late, \ |
1747 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend_late, \ |
1725 | suspend_late##hook, vendor, device, \ |
1748 | suspend_late##hook, vendor, device, \ |
1726 | PCI_ANY_ID, 0, hook) |
1749 | PCI_ANY_ID, 0, hook) |
1727 | 1750 | ||
1728 | #ifdef CONFIG_PCI_QUIRKS |
1751 | #ifdef CONFIG_PCI_QUIRKS |
1729 | void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev); |
1752 | void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev); |
1730 | int pci_dev_specific_acs_enabled(struct pci_dev *dev, u16 acs_flags); |
1753 | int pci_dev_specific_acs_enabled(struct pci_dev *dev, u16 acs_flags); |
1731 | void pci_dev_specific_enable_acs(struct pci_dev *dev); |
1754 | void pci_dev_specific_enable_acs(struct pci_dev *dev); |
1732 | #else |
1755 | #else |
1733 | static inline void pci_fixup_device(enum pci_fixup_pass pass, |
1756 | static inline void pci_fixup_device(enum pci_fixup_pass pass, |
1734 | struct pci_dev *dev) { } |
1757 | struct pci_dev *dev) { } |
1735 | static inline int pci_dev_specific_acs_enabled(struct pci_dev *dev, |
1758 | static inline int pci_dev_specific_acs_enabled(struct pci_dev *dev, |
1736 | u16 acs_flags) |
1759 | u16 acs_flags) |
1737 | { |
1760 | { |
1738 | return -ENOTTY; |
1761 | return -ENOTTY; |
1739 | } |
1762 | } |
1740 | static inline void pci_dev_specific_enable_acs(struct pci_dev *dev) { } |
1763 | static inline void pci_dev_specific_enable_acs(struct pci_dev *dev) { } |
1741 | #endif |
1764 | #endif |
1742 | 1765 | ||
1743 | void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen); |
1766 | void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen); |
1744 | void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr); |
1767 | void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr); |
1745 | void __iomem * const *pcim_iomap_table(struct pci_dev *pdev); |
1768 | void __iomem * const *pcim_iomap_table(struct pci_dev *pdev); |
1746 | int pcim_iomap_regions(struct pci_dev *pdev, int mask, const char *name); |
1769 | int pcim_iomap_regions(struct pci_dev *pdev, int mask, const char *name); |
1747 | int pcim_iomap_regions_request_all(struct pci_dev *pdev, int mask, |
1770 | int pcim_iomap_regions_request_all(struct pci_dev *pdev, int mask, |
1748 | const char *name); |
1771 | const char *name); |
1749 | void pcim_iounmap_regions(struct pci_dev *pdev, int mask); |
1772 | void pcim_iounmap_regions(struct pci_dev *pdev, int mask); |
1750 | 1773 | ||
1751 | extern int pci_pci_problems; |
1774 | extern int pci_pci_problems; |
1752 | #define PCIPCI_FAIL 1 /* No PCI PCI DMA */ |
1775 | #define PCIPCI_FAIL 1 /* No PCI PCI DMA */ |
1753 | #define PCIPCI_TRITON 2 |
1776 | #define PCIPCI_TRITON 2 |
1754 | #define PCIPCI_NATOMA 4 |
1777 | #define PCIPCI_NATOMA 4 |
1755 | #define PCIPCI_VIAETBF 8 |
1778 | #define PCIPCI_VIAETBF 8 |
1756 | #define PCIPCI_VSFX 16 |
1779 | #define PCIPCI_VSFX 16 |
1757 | #define PCIPCI_ALIMAGIK 32 /* Need low latency setting */ |
1780 | #define PCIPCI_ALIMAGIK 32 /* Need low latency setting */ |
1758 | #define PCIAGP_FAIL 64 /* No PCI to AGP DMA */ |
1781 | #define PCIAGP_FAIL 64 /* No PCI to AGP DMA */ |
1759 | 1782 | ||
1760 | extern unsigned long pci_cardbus_io_size; |
1783 | extern unsigned long pci_cardbus_io_size; |
1761 | extern unsigned long pci_cardbus_mem_size; |
1784 | extern unsigned long pci_cardbus_mem_size; |
1762 | extern u8 pci_dfl_cache_line_size; |
1785 | extern u8 pci_dfl_cache_line_size; |
1763 | extern u8 pci_cache_line_size; |
1786 | extern u8 pci_cache_line_size; |
1764 | 1787 | ||
1765 | extern unsigned long pci_hotplug_io_size; |
1788 | extern unsigned long pci_hotplug_io_size; |
1766 | extern unsigned long pci_hotplug_mem_size; |
1789 | extern unsigned long pci_hotplug_mem_size; |
1767 | 1790 | ||
1768 | /* Architecture-specific versions may override these (weak) */ |
1791 | /* Architecture-specific versions may override these (weak) */ |
1769 | void pcibios_disable_device(struct pci_dev *dev); |
1792 | void pcibios_disable_device(struct pci_dev *dev); |
1770 | void pcibios_set_master(struct pci_dev *dev); |
1793 | void pcibios_set_master(struct pci_dev *dev); |
1771 | int pcibios_set_pcie_reset_state(struct pci_dev *dev, |
1794 | int pcibios_set_pcie_reset_state(struct pci_dev *dev, |
1772 | enum pcie_reset_state state); |
1795 | enum pcie_reset_state state); |
1773 | int pcibios_add_device(struct pci_dev *dev); |
1796 | int pcibios_add_device(struct pci_dev *dev); |
1774 | void pcibios_release_device(struct pci_dev *dev); |
1797 | void pcibios_release_device(struct pci_dev *dev); |
1775 | void pcibios_penalize_isa_irq(int irq, int active); |
1798 | void pcibios_penalize_isa_irq(int irq, int active); |
1776 | int pcibios_alloc_irq(struct pci_dev *dev); |
1799 | int pcibios_alloc_irq(struct pci_dev *dev); |
1777 | void pcibios_free_irq(struct pci_dev *dev); |
1800 | void pcibios_free_irq(struct pci_dev *dev); |
1778 | 1801 | ||
1779 | #ifdef CONFIG_HIBERNATE_CALLBACKS |
1802 | #ifdef CONFIG_HIBERNATE_CALLBACKS |
1780 | extern struct dev_pm_ops pcibios_pm_ops; |
1803 | extern struct dev_pm_ops pcibios_pm_ops; |
1781 | #endif |
1804 | #endif |
1782 | 1805 | ||
1783 | #ifdef CONFIG_PCI_MMCONFIG |
1806 | #ifdef CONFIG_PCI_MMCONFIG |
1784 | void __init pci_mmcfg_early_init(void); |
1807 | void __init pci_mmcfg_early_init(void); |
1785 | void __init pci_mmcfg_late_init(void); |
1808 | void __init pci_mmcfg_late_init(void); |
1786 | #else |
1809 | #else |
1787 | static inline void pci_mmcfg_early_init(void) { } |
1810 | static inline void pci_mmcfg_early_init(void) { } |
1788 | static inline void pci_mmcfg_late_init(void) { } |
1811 | static inline void pci_mmcfg_late_init(void) { } |
1789 | #endif |
1812 | #endif |
1790 | 1813 | ||
1791 | int pci_ext_cfg_avail(void); |
1814 | int pci_ext_cfg_avail(void); |
1792 | 1815 | ||
1793 | void __iomem *pci_ioremap_bar(struct pci_dev *pdev, int bar); |
1816 | void __iomem *pci_ioremap_bar(struct pci_dev *pdev, int bar); |
1794 | void __iomem *pci_ioremap_wc_bar(struct pci_dev *pdev, int bar); |
1817 | void __iomem *pci_ioremap_wc_bar(struct pci_dev *pdev, int bar); |
1795 | 1818 | ||
1796 | #ifdef CONFIG_PCI_IOV |
1819 | #ifdef CONFIG_PCI_IOV |
1797 | int pci_iov_virtfn_bus(struct pci_dev *dev, int id); |
1820 | int pci_iov_virtfn_bus(struct pci_dev *dev, int id); |
1798 | int pci_iov_virtfn_devfn(struct pci_dev *dev, int id); |
1821 | int pci_iov_virtfn_devfn(struct pci_dev *dev, int id); |
1799 | 1822 | ||
1800 | int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn); |
1823 | int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn); |
1801 | void pci_disable_sriov(struct pci_dev *dev); |
1824 | void pci_disable_sriov(struct pci_dev *dev); |
1802 | int pci_iov_add_virtfn(struct pci_dev *dev, int id, int reset); |
1825 | int pci_iov_add_virtfn(struct pci_dev *dev, int id, int reset); |
1803 | void pci_iov_remove_virtfn(struct pci_dev *dev, int id, int reset); |
1826 | void pci_iov_remove_virtfn(struct pci_dev *dev, int id, int reset); |
1804 | int pci_num_vf(struct pci_dev *dev); |
1827 | int pci_num_vf(struct pci_dev *dev); |
1805 | int pci_vfs_assigned(struct pci_dev *dev); |
1828 | int pci_vfs_assigned(struct pci_dev *dev); |
1806 | int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs); |
1829 | int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs); |
1807 | int pci_sriov_get_totalvfs(struct pci_dev *dev); |
1830 | int pci_sriov_get_totalvfs(struct pci_dev *dev); |
1808 | resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno); |
1831 | resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno); |
1809 | #else |
1832 | #else |
1810 | static inline int pci_iov_virtfn_bus(struct pci_dev *dev, int id) |
1833 | static inline int pci_iov_virtfn_bus(struct pci_dev *dev, int id) |
1811 | { |
1834 | { |
1812 | return -ENOSYS; |
1835 | return -ENOSYS; |
1813 | } |
1836 | } |
1814 | static inline int pci_iov_virtfn_devfn(struct pci_dev *dev, int id) |
1837 | static inline int pci_iov_virtfn_devfn(struct pci_dev *dev, int id) |
1815 | { |
1838 | { |
1816 | return -ENOSYS; |
1839 | return -ENOSYS; |
1817 | } |
1840 | } |
1818 | static inline int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn) |
1841 | static inline int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn) |
1819 | { return -ENODEV; } |
1842 | { return -ENODEV; } |
1820 | static inline int pci_iov_add_virtfn(struct pci_dev *dev, int id, int reset) |
1843 | static inline int pci_iov_add_virtfn(struct pci_dev *dev, int id, int reset) |
1821 | { |
1844 | { |
1822 | return -ENOSYS; |
1845 | return -ENOSYS; |
1823 | } |
1846 | } |
1824 | static inline void pci_iov_remove_virtfn(struct pci_dev *dev, |
1847 | static inline void pci_iov_remove_virtfn(struct pci_dev *dev, |
1825 | int id, int reset) { } |
1848 | int id, int reset) { } |
1826 | static inline void pci_disable_sriov(struct pci_dev *dev) { } |
1849 | static inline void pci_disable_sriov(struct pci_dev *dev) { } |
1827 | static inline int pci_num_vf(struct pci_dev *dev) { return 0; } |
1850 | static inline int pci_num_vf(struct pci_dev *dev) { return 0; } |
1828 | static inline int pci_vfs_assigned(struct pci_dev *dev) |
1851 | static inline int pci_vfs_assigned(struct pci_dev *dev) |
1829 | { return 0; } |
1852 | { return 0; } |
1830 | static inline int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs) |
1853 | static inline int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs) |
1831 | { return 0; } |
1854 | { return 0; } |
1832 | static inline int pci_sriov_get_totalvfs(struct pci_dev *dev) |
1855 | static inline int pci_sriov_get_totalvfs(struct pci_dev *dev) |
1833 | { return 0; } |
1856 | { return 0; } |
1834 | static inline resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno) |
1857 | static inline resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno) |
1835 | { return 0; } |
1858 | { return 0; } |
1836 | #endif |
1859 | #endif |
1837 | 1860 | ||
1838 | #if defined(CONFIG_HOTPLUG_PCI) || defined(CONFIG_HOTPLUG_PCI_MODULE) |
1861 | #if defined(CONFIG_HOTPLUG_PCI) || defined(CONFIG_HOTPLUG_PCI_MODULE) |
1839 | void pci_hp_create_module_link(struct pci_slot *pci_slot); |
1862 | void pci_hp_create_module_link(struct pci_slot *pci_slot); |
1840 | void pci_hp_remove_module_link(struct pci_slot *pci_slot); |
1863 | void pci_hp_remove_module_link(struct pci_slot *pci_slot); |
1841 | #endif |
1864 | #endif |
1842 | 1865 | ||
1843 | /** |
1866 | /** |
1844 | * pci_pcie_cap - get the saved PCIe capability offset |
1867 | * pci_pcie_cap - get the saved PCIe capability offset |
1845 | * @dev: PCI device |
1868 | * @dev: PCI device |
1846 | * |
1869 | * |
1847 | * PCIe capability offset is calculated at PCI device initialization |
1870 | * PCIe capability offset is calculated at PCI device initialization |
1848 | * time and saved in the data structure. This function returns saved |
1871 | * time and saved in the data structure. This function returns saved |
1849 | * PCIe capability offset. Using this instead of pci_find_capability() |
1872 | * PCIe capability offset. Using this instead of pci_find_capability() |
1850 | * reduces unnecessary search in the PCI configuration space. If you |
1873 | * reduces unnecessary search in the PCI configuration space. If you |
1851 | * need to calculate PCIe capability offset from raw device for some |
1874 | * need to calculate PCIe capability offset from raw device for some |
1852 | * reasons, please use pci_find_capability() instead. |
1875 | * reasons, please use pci_find_capability() instead. |
1853 | */ |
1876 | */ |
1854 | static inline int pci_pcie_cap(struct pci_dev *dev) |
1877 | static inline int pci_pcie_cap(struct pci_dev *dev) |
1855 | { |
1878 | { |
1856 | return dev->pcie_cap; |
1879 | return dev->pcie_cap; |
1857 | } |
1880 | } |
1858 | 1881 | ||
1859 | /** |
1882 | /** |
1860 | * pci_is_pcie - check if the PCI device is PCI Express capable |
1883 | * pci_is_pcie - check if the PCI device is PCI Express capable |
1861 | * @dev: PCI device |
1884 | * @dev: PCI device |
1862 | * |
1885 | * |
1863 | * Returns: true if the PCI device is PCI Express capable, false otherwise. |
1886 | * Returns: true if the PCI device is PCI Express capable, false otherwise. |
1864 | */ |
1887 | */ |
1865 | static inline bool pci_is_pcie(struct pci_dev *dev) |
1888 | static inline bool pci_is_pcie(struct pci_dev *dev) |
1866 | { |
1889 | { |
1867 | return pci_pcie_cap(dev); |
1890 | return pci_pcie_cap(dev); |
1868 | } |
1891 | } |
1869 | 1892 | ||
1870 | /** |
1893 | /** |
1871 | * pcie_caps_reg - get the PCIe Capabilities Register |
1894 | * pcie_caps_reg - get the PCIe Capabilities Register |
1872 | * @dev: PCI device |
1895 | * @dev: PCI device |
1873 | */ |
1896 | */ |
1874 | static inline u16 pcie_caps_reg(const struct pci_dev *dev) |
1897 | static inline u16 pcie_caps_reg(const struct pci_dev *dev) |
1875 | { |
1898 | { |
1876 | return dev->pcie_flags_reg; |
1899 | return dev->pcie_flags_reg; |
1877 | } |
1900 | } |
1878 | 1901 | ||
1879 | /** |
1902 | /** |
1880 | * pci_pcie_type - get the PCIe device/port type |
1903 | * pci_pcie_type - get the PCIe device/port type |
1881 | * @dev: PCI device |
1904 | * @dev: PCI device |
1882 | */ |
1905 | */ |
1883 | static inline int pci_pcie_type(const struct pci_dev *dev) |
1906 | static inline int pci_pcie_type(const struct pci_dev *dev) |
1884 | { |
1907 | { |
1885 | return (pcie_caps_reg(dev) & PCI_EXP_FLAGS_TYPE) >> 4; |
1908 | return (pcie_caps_reg(dev) & PCI_EXP_FLAGS_TYPE) >> 4; |
1886 | } |
1909 | } |
1887 | 1910 | ||
1888 | void pci_request_acs(void); |
1911 | void pci_request_acs(void); |
1889 | bool pci_acs_enabled(struct pci_dev *pdev, u16 acs_flags); |
1912 | bool pci_acs_enabled(struct pci_dev *pdev, u16 acs_flags); |
1890 | bool pci_acs_path_enabled(struct pci_dev *start, |
1913 | bool pci_acs_path_enabled(struct pci_dev *start, |
1891 | struct pci_dev *end, u16 acs_flags); |
1914 | struct pci_dev *end, u16 acs_flags); |
1892 | 1915 | ||
1893 | #define PCI_VPD_LRDT 0x80 /* Large Resource Data Type */ |
1916 | #define PCI_VPD_LRDT 0x80 /* Large Resource Data Type */ |
1894 | #define PCI_VPD_LRDT_ID(x) ((x) | PCI_VPD_LRDT) |
1917 | #define PCI_VPD_LRDT_ID(x) ((x) | PCI_VPD_LRDT) |
1895 | 1918 | ||
1896 | /* Large Resource Data Type Tag Item Names */ |
1919 | /* Large Resource Data Type Tag Item Names */ |
1897 | #define PCI_VPD_LTIN_ID_STRING 0x02 /* Identifier String */ |
1920 | #define PCI_VPD_LTIN_ID_STRING 0x02 /* Identifier String */ |
1898 | #define PCI_VPD_LTIN_RO_DATA 0x10 /* Read-Only Data */ |
1921 | #define PCI_VPD_LTIN_RO_DATA 0x10 /* Read-Only Data */ |
1899 | #define PCI_VPD_LTIN_RW_DATA 0x11 /* Read-Write Data */ |
1922 | #define PCI_VPD_LTIN_RW_DATA 0x11 /* Read-Write Data */ |
1900 | 1923 | ||
1901 | #define PCI_VPD_LRDT_ID_STRING PCI_VPD_LRDT_ID(PCI_VPD_LTIN_ID_STRING) |
1924 | #define PCI_VPD_LRDT_ID_STRING PCI_VPD_LRDT_ID(PCI_VPD_LTIN_ID_STRING) |
1902 | #define PCI_VPD_LRDT_RO_DATA PCI_VPD_LRDT_ID(PCI_VPD_LTIN_RO_DATA) |
1925 | #define PCI_VPD_LRDT_RO_DATA PCI_VPD_LRDT_ID(PCI_VPD_LTIN_RO_DATA) |
1903 | #define PCI_VPD_LRDT_RW_DATA PCI_VPD_LRDT_ID(PCI_VPD_LTIN_RW_DATA) |
1926 | #define PCI_VPD_LRDT_RW_DATA PCI_VPD_LRDT_ID(PCI_VPD_LTIN_RW_DATA) |
1904 | 1927 | ||
1905 | /* Small Resource Data Type Tag Item Names */ |
1928 | /* Small Resource Data Type Tag Item Names */ |
1906 | #define PCI_VPD_STIN_END 0x0f /* End */ |
1929 | #define PCI_VPD_STIN_END 0x0f /* End */ |
1907 | 1930 | ||
1908 | #define PCI_VPD_SRDT_END (PCI_VPD_STIN_END << 3) |
1931 | #define PCI_VPD_SRDT_END (PCI_VPD_STIN_END << 3) |
1909 | 1932 | ||
1910 | #define PCI_VPD_SRDT_TIN_MASK 0x78 |
1933 | #define PCI_VPD_SRDT_TIN_MASK 0x78 |
1911 | #define PCI_VPD_SRDT_LEN_MASK 0x07 |
1934 | #define PCI_VPD_SRDT_LEN_MASK 0x07 |
1912 | #define PCI_VPD_LRDT_TIN_MASK 0x7f |
1935 | #define PCI_VPD_LRDT_TIN_MASK 0x7f |
1913 | 1936 | ||
1914 | #define PCI_VPD_LRDT_TAG_SIZE 3 |
1937 | #define PCI_VPD_LRDT_TAG_SIZE 3 |
1915 | #define PCI_VPD_SRDT_TAG_SIZE 1 |
1938 | #define PCI_VPD_SRDT_TAG_SIZE 1 |
1916 | 1939 | ||
1917 | #define PCI_VPD_INFO_FLD_HDR_SIZE 3 |
1940 | #define PCI_VPD_INFO_FLD_HDR_SIZE 3 |
1918 | 1941 | ||
1919 | #define PCI_VPD_RO_KEYWORD_PARTNO "PN" |
1942 | #define PCI_VPD_RO_KEYWORD_PARTNO "PN" |
1920 | #define PCI_VPD_RO_KEYWORD_MFR_ID "MN" |
1943 | #define PCI_VPD_RO_KEYWORD_MFR_ID "MN" |
1921 | #define PCI_VPD_RO_KEYWORD_VENDOR0 "V0" |
1944 | #define PCI_VPD_RO_KEYWORD_VENDOR0 "V0" |
1922 | #define PCI_VPD_RO_KEYWORD_CHKSUM "RV" |
1945 | #define PCI_VPD_RO_KEYWORD_CHKSUM "RV" |
1923 | 1946 | ||
1924 | /** |
1947 | /** |
1925 | * pci_vpd_lrdt_size - Extracts the Large Resource Data Type length |
1948 | * pci_vpd_lrdt_size - Extracts the Large Resource Data Type length |
1926 | * @lrdt: Pointer to the beginning of the Large Resource Data Type tag |
1949 | * @lrdt: Pointer to the beginning of the Large Resource Data Type tag |
1927 | * |
1950 | * |
1928 | * Returns the extracted Large Resource Data Type length. |
1951 | * Returns the extracted Large Resource Data Type length. |
1929 | */ |
1952 | */ |
1930 | static inline u16 pci_vpd_lrdt_size(const u8 *lrdt) |
1953 | static inline u16 pci_vpd_lrdt_size(const u8 *lrdt) |
1931 | { |
1954 | { |
1932 | return (u16)lrdt[1] + ((u16)lrdt[2] << 8); |
1955 | return (u16)lrdt[1] + ((u16)lrdt[2] << 8); |
1933 | } |
1956 | } |
1934 | 1957 | ||
1935 | /** |
1958 | /** |
1936 | * pci_vpd_lrdt_tag - Extracts the Large Resource Data Type Tag Item |
1959 | * pci_vpd_lrdt_tag - Extracts the Large Resource Data Type Tag Item |
1937 | * @lrdt: Pointer to the beginning of the Large Resource Data Type tag |
1960 | * @lrdt: Pointer to the beginning of the Large Resource Data Type tag |
1938 | * |
1961 | * |
1939 | * Returns the extracted Large Resource Data Type Tag item. |
1962 | * Returns the extracted Large Resource Data Type Tag item. |
1940 | */ |
1963 | */ |
1941 | static inline u16 pci_vpd_lrdt_tag(const u8 *lrdt) |
1964 | static inline u16 pci_vpd_lrdt_tag(const u8 *lrdt) |
1942 | { |
1965 | { |
1943 | return (u16)(lrdt[0] & PCI_VPD_LRDT_TIN_MASK); |
1966 | return (u16)(lrdt[0] & PCI_VPD_LRDT_TIN_MASK); |
1944 | } |
1967 | } |
1945 | 1968 | ||
1946 | /** |
1969 | /** |
1947 | * pci_vpd_srdt_size - Extracts the Small Resource Data Type length |
1970 | * pci_vpd_srdt_size - Extracts the Small Resource Data Type length |
1948 | * @lrdt: Pointer to the beginning of the Small Resource Data Type tag |
1971 | * @lrdt: Pointer to the beginning of the Small Resource Data Type tag |
1949 | * |
1972 | * |
1950 | * Returns the extracted Small Resource Data Type length. |
1973 | * Returns the extracted Small Resource Data Type length. |
1951 | */ |
1974 | */ |
1952 | static inline u8 pci_vpd_srdt_size(const u8 *srdt) |
1975 | static inline u8 pci_vpd_srdt_size(const u8 *srdt) |
1953 | { |
1976 | { |
1954 | return (*srdt) & PCI_VPD_SRDT_LEN_MASK; |
1977 | return (*srdt) & PCI_VPD_SRDT_LEN_MASK; |
1955 | } |
1978 | } |
1956 | 1979 | ||
1957 | /** |
1980 | /** |
1958 | * pci_vpd_srdt_tag - Extracts the Small Resource Data Type Tag Item |
1981 | * pci_vpd_srdt_tag - Extracts the Small Resource Data Type Tag Item |
1959 | * @lrdt: Pointer to the beginning of the Small Resource Data Type tag |
1982 | * @lrdt: Pointer to the beginning of the Small Resource Data Type tag |
1960 | * |
1983 | * |
1961 | * Returns the extracted Small Resource Data Type Tag Item. |
1984 | * Returns the extracted Small Resource Data Type Tag Item. |
1962 | */ |
1985 | */ |
1963 | static inline u8 pci_vpd_srdt_tag(const u8 *srdt) |
1986 | static inline u8 pci_vpd_srdt_tag(const u8 *srdt) |
1964 | { |
1987 | { |
1965 | return ((*srdt) & PCI_VPD_SRDT_TIN_MASK) >> 3; |
1988 | return ((*srdt) & PCI_VPD_SRDT_TIN_MASK) >> 3; |
1966 | } |
1989 | } |
1967 | 1990 | ||
1968 | /** |
1991 | /** |
1969 | * pci_vpd_info_field_size - Extracts the information field length |
1992 | * pci_vpd_info_field_size - Extracts the information field length |
1970 | * @lrdt: Pointer to the beginning of an information field header |
1993 | * @lrdt: Pointer to the beginning of an information field header |
1971 | * |
1994 | * |
1972 | * Returns the extracted information field length. |
1995 | * Returns the extracted information field length. |
1973 | */ |
1996 | */ |
1974 | static inline u8 pci_vpd_info_field_size(const u8 *info_field) |
1997 | static inline u8 pci_vpd_info_field_size(const u8 *info_field) |
1975 | { |
1998 | { |
1976 | return info_field[2]; |
1999 | return info_field[2]; |
1977 | } |
2000 | } |
1978 | 2001 | ||
1979 | /** |
2002 | /** |
1980 | * pci_vpd_find_tag - Locates the Resource Data Type tag provided |
2003 | * pci_vpd_find_tag - Locates the Resource Data Type tag provided |
1981 | * @buf: Pointer to buffered vpd data |
2004 | * @buf: Pointer to buffered vpd data |
1982 | * @off: The offset into the buffer at which to begin the search |
2005 | * @off: The offset into the buffer at which to begin the search |
1983 | * @len: The length of the vpd buffer |
2006 | * @len: The length of the vpd buffer |
1984 | * @rdt: The Resource Data Type to search for |
2007 | * @rdt: The Resource Data Type to search for |
1985 | * |
2008 | * |
1986 | * Returns the index where the Resource Data Type was found or |
2009 | * Returns the index where the Resource Data Type was found or |
1987 | * -ENOENT otherwise. |
2010 | * -ENOENT otherwise. |
1988 | */ |
2011 | */ |
1989 | int pci_vpd_find_tag(const u8 *buf, unsigned int off, unsigned int len, u8 rdt); |
2012 | int pci_vpd_find_tag(const u8 *buf, unsigned int off, unsigned int len, u8 rdt); |
1990 | 2013 | ||
1991 | /** |
2014 | /** |
1992 | * pci_vpd_find_info_keyword - Locates an information field keyword in the VPD |
2015 | * pci_vpd_find_info_keyword - Locates an information field keyword in the VPD |
1993 | * @buf: Pointer to buffered vpd data |
2016 | * @buf: Pointer to buffered vpd data |
1994 | * @off: The offset into the buffer at which to begin the search |
2017 | * @off: The offset into the buffer at which to begin the search |
1995 | * @len: The length of the buffer area, relative to off, in which to search |
2018 | * @len: The length of the buffer area, relative to off, in which to search |
1996 | * @kw: The keyword to search for |
2019 | * @kw: The keyword to search for |
1997 | * |
2020 | * |
1998 | * Returns the index where the information field keyword was found or |
2021 | * Returns the index where the information field keyword was found or |
1999 | * -ENOENT otherwise. |
2022 | * -ENOENT otherwise. |
2000 | */ |
2023 | */ |
2001 | int pci_vpd_find_info_keyword(const u8 *buf, unsigned int off, |
2024 | int pci_vpd_find_info_keyword(const u8 *buf, unsigned int off, |
2002 | unsigned int len, const char *kw); |
2025 | unsigned int len, const char *kw); |
2003 | 2026 | ||
2004 | /* PCI <-> OF binding helpers */ |
2027 | /* PCI <-> OF binding helpers */ |
2005 | #ifdef CONFIG_OF |
2028 | #ifdef CONFIG_OF |
2006 | struct device_node; |
2029 | struct device_node; |
2007 | struct irq_domain; |
2030 | struct irq_domain; |
2008 | void pci_set_of_node(struct pci_dev *dev); |
2031 | void pci_set_of_node(struct pci_dev *dev); |
2009 | void pci_release_of_node(struct pci_dev *dev); |
2032 | void pci_release_of_node(struct pci_dev *dev); |
2010 | void pci_set_bus_of_node(struct pci_bus *bus); |
2033 | void pci_set_bus_of_node(struct pci_bus *bus); |
2011 | void pci_release_bus_of_node(struct pci_bus *bus); |
2034 | void pci_release_bus_of_node(struct pci_bus *bus); |
2012 | struct irq_domain *pci_host_bridge_of_msi_domain(struct pci_bus *bus); |
2035 | struct irq_domain *pci_host_bridge_of_msi_domain(struct pci_bus *bus); |
2013 | 2036 | ||
2014 | /* Arch may override this (weak) */ |
2037 | /* Arch may override this (weak) */ |
2015 | struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus); |
2038 | struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus); |
2016 | 2039 | ||
2017 | static inline struct device_node * |
2040 | static inline struct device_node * |
2018 | pci_device_to_OF_node(const struct pci_dev *pdev) |
2041 | pci_device_to_OF_node(const struct pci_dev *pdev) |
2019 | { |
2042 | { |
2020 | return pdev ? pdev->dev.of_node : NULL; |
2043 | return pdev ? pdev->dev.of_node : NULL; |
2021 | } |
2044 | } |
2022 | 2045 | ||
2023 | static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus) |
2046 | static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus) |
2024 | { |
2047 | { |
2025 | return bus ? bus->dev.of_node : NULL; |
2048 | return bus ? bus->dev.of_node : NULL; |
2026 | } |
2049 | } |
2027 | 2050 | ||
2028 | #else /* CONFIG_OF */ |
2051 | #else /* CONFIG_OF */ |
2029 | static inline void pci_set_of_node(struct pci_dev *dev) { } |
2052 | static inline void pci_set_of_node(struct pci_dev *dev) { } |
2030 | static inline void pci_release_of_node(struct pci_dev *dev) { } |
2053 | static inline void pci_release_of_node(struct pci_dev *dev) { } |
2031 | static inline void pci_set_bus_of_node(struct pci_bus *bus) { } |
2054 | static inline void pci_set_bus_of_node(struct pci_bus *bus) { } |
2032 | static inline void pci_release_bus_of_node(struct pci_bus *bus) { } |
2055 | static inline void pci_release_bus_of_node(struct pci_bus *bus) { } |
2033 | static inline struct device_node * |
2056 | static inline struct device_node * |
2034 | pci_device_to_OF_node(const struct pci_dev *pdev) { return NULL; } |
2057 | pci_device_to_OF_node(const struct pci_dev *pdev) { return NULL; } |
2035 | static inline struct irq_domain * |
2058 | static inline struct irq_domain * |
2036 | pci_host_bridge_of_msi_domain(struct pci_bus *bus) { return NULL; } |
2059 | pci_host_bridge_of_msi_domain(struct pci_bus *bus) { return NULL; } |
2037 | #endif /* CONFIG_OF */ |
2060 | #endif /* CONFIG_OF */ |
2038 | 2061 | ||
2039 | #ifdef CONFIG_ACPI |
2062 | #ifdef CONFIG_ACPI |
2040 | struct irq_domain *pci_host_bridge_acpi_msi_domain(struct pci_bus *bus); |
2063 | struct irq_domain *pci_host_bridge_acpi_msi_domain(struct pci_bus *bus); |
2041 | 2064 | ||
2042 | void |
2065 | void |
2043 | pci_msi_register_fwnode_provider(struct fwnode_handle *(*fn)(struct device *)); |
2066 | pci_msi_register_fwnode_provider(struct fwnode_handle *(*fn)(struct device *)); |
2044 | #else |
2067 | #else |
2045 | static inline struct irq_domain * |
2068 | static inline struct irq_domain * |
2046 | pci_host_bridge_acpi_msi_domain(struct pci_bus *bus) { return NULL; } |
2069 | pci_host_bridge_acpi_msi_domain(struct pci_bus *bus) { return NULL; } |
2047 | #endif |
2070 | #endif |
2048 | 2071 | ||
2049 | #ifdef CONFIG_EEH |
2072 | #ifdef CONFIG_EEH |
2050 | static inline struct eeh_dev *pci_dev_to_eeh_dev(struct pci_dev *pdev) |
2073 | static inline struct eeh_dev *pci_dev_to_eeh_dev(struct pci_dev *pdev) |
2051 | { |
2074 | { |
2052 | return pdev->dev.archdata.edev; |
2075 | return pdev->dev.archdata.edev; |
2053 | } |
2076 | } |
2054 | #endif |
2077 | #endif |
2055 | 2078 | ||
2056 | int pci_for_each_dma_alias(struct pci_dev *pdev, |
2079 | int pci_for_each_dma_alias(struct pci_dev *pdev, |
2057 | int (*fn)(struct pci_dev *pdev, |
2080 | int (*fn)(struct pci_dev *pdev, |
2058 | u16 alias, void *data), void *data); |
2081 | u16 alias, void *data), void *data); |
2059 | 2082 | ||
2060 | /* helper functions for operation of device flag */ |
2083 | /* helper functions for operation of device flag */ |
2061 | static inline void pci_set_dev_assigned(struct pci_dev *pdev) |
2084 | static inline void pci_set_dev_assigned(struct pci_dev *pdev) |
2062 | { |
2085 | { |
2063 | pdev->dev_flags |= PCI_DEV_FLAGS_ASSIGNED; |
2086 | pdev->dev_flags |= PCI_DEV_FLAGS_ASSIGNED; |
2064 | } |
2087 | } |
2065 | static inline void pci_clear_dev_assigned(struct pci_dev *pdev) |
2088 | static inline void pci_clear_dev_assigned(struct pci_dev *pdev) |
2066 | { |
2089 | { |
2067 | pdev->dev_flags &= ~PCI_DEV_FLAGS_ASSIGNED; |
2090 | pdev->dev_flags &= ~PCI_DEV_FLAGS_ASSIGNED; |
2068 | } |
2091 | } |
2069 | static inline bool pci_is_dev_assigned(struct pci_dev *pdev) |
2092 | static inline bool pci_is_dev_assigned(struct pci_dev *pdev) |
2070 | { |
2093 | { |
2071 | return (pdev->dev_flags & PCI_DEV_FLAGS_ASSIGNED) == PCI_DEV_FLAGS_ASSIGNED; |
2094 | return (pdev->dev_flags & PCI_DEV_FLAGS_ASSIGNED) == PCI_DEV_FLAGS_ASSIGNED; |
2072 | } |
2095 | } |
2073 | 2096 | ||
2074 | /** |
2097 | /** |
2075 | * pci_ari_enabled - query ARI forwarding status |
2098 | * pci_ari_enabled - query ARI forwarding status |
2076 | * @bus: the PCI bus |
2099 | * @bus: the PCI bus |
2077 | * |
2100 | * |
2078 | * Returns true if ARI forwarding is enabled. |
2101 | * Returns true if ARI forwarding is enabled. |
2079 | */ |
2102 | */ |
2080 | static inline bool pci_ari_enabled(struct pci_bus *bus) |
2103 | static inline bool pci_ari_enabled(struct pci_bus *bus) |
2081 | { |
2104 | { |
2082 | return bus->self && bus->self->ari_enabled; |
2105 | return bus->self && bus->self->ari_enabled; |
2083 | } |
2106 | } |
2084 | 2107 | ||
2085 | /* provide the legacy pci_dma_* API */ |
2108 | /* provide the legacy pci_dma_* API */ |
2086 | #include |
2109 | #include |
2087 | 2110 | ||
2088 | typedef struct |
2111 | typedef struct |
2089 | { |
2112 | { |
2090 | struct list_head link; |
2113 | struct list_head link; |
2091 | struct pci_dev pci_dev; |
2114 | struct pci_dev pci_dev; |
2092 | }pci_dev_t; |
2115 | }pci_dev_t; |
2093 | 2116 | ||
2094 | int enum_pci_devices(void); |
2117 | int enum_pci_devices(void); |
2095 | 2118 | ||
2096 | const struct pci_device_id* |
2119 | const struct pci_device_id* |
2097 | find_pci_device(pci_dev_t* pdev, const struct pci_device_id *idlist); |
2120 | find_pci_device(pci_dev_t* pdev, const struct pci_device_id *idlist); |
2098 | 2121 | ||
2099 | struct pci_dev * _pci_get_bus_and_slot(unsigned int bus, unsigned int devfn); |
2122 | struct pci_dev * _pci_get_bus_and_slot(unsigned int bus, unsigned int devfn); |
2100 | 2123 | ||
2101 | #endif /* LINUX_PCI_H */->><>><>>>><>><>>=>><>><>><>><>><>><>><>><>><>><>><> |
2124 | #endif /* LINUX_PCI_H */->><>><>>>><>><>>=>><>><>><>><>><>><>><>><>><>><>><> |