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1 | /* |
1 | /* |
2 | * pci.h |
2 | * pci.h |
3 | * |
3 | * |
4 | * PCI defines and function prototypes |
4 | * PCI defines and function prototypes |
5 | * Copyright 1994, Drew Eckhardt |
5 | * Copyright 1994, Drew Eckhardt |
6 | * Copyright 1997--1999 Martin Mares |
6 | * Copyright 1997--1999 Martin Mares |
7 | * |
7 | * |
8 | * For more information, please consult the following manuals (look at |
8 | * For more information, please consult the following manuals (look at |
9 | * http://www.pcisig.com/ for how to get them): |
9 | * http://www.pcisig.com/ for how to get them): |
10 | * |
10 | * |
11 | * PCI BIOS Specification |
11 | * PCI BIOS Specification |
12 | * PCI Local Bus Specification |
12 | * PCI Local Bus Specification |
13 | * PCI to PCI Bridge Specification |
13 | * PCI to PCI Bridge Specification |
14 | * PCI System Design Guide |
14 | * PCI System Design Guide |
15 | */ |
15 | */ |
16 | #ifndef LINUX_PCI_H |
16 | #ifndef LINUX_PCI_H |
17 | #define LINUX_PCI_H |
17 | #define LINUX_PCI_H |
18 | 18 | ||
19 | 19 | ||
20 | #include |
20 | #include |
21 | 21 | ||
22 | #include |
22 | #include |
23 | #include |
23 | #include |
24 | #include |
24 | #include |
25 | #include |
25 | #include |
26 | #include |
26 | #include |
27 | #include |
27 | #include |
28 | #include |
28 | #include |
29 | #include |
29 | #include |
30 | #include |
30 | #include |
31 | #include |
31 | #include |
32 | #include |
32 | #include |
33 | #include |
33 | #include |
34 | 34 | ||
35 | #include |
35 | #include |
36 | #include |
36 | #include |
37 | /* |
37 | /* |
38 | * The PCI interface treats multi-function devices as independent |
38 | * The PCI interface treats multi-function devices as independent |
39 | * devices. The slot/function address of each device is encoded |
39 | * devices. The slot/function address of each device is encoded |
40 | * in a single byte as follows: |
40 | * in a single byte as follows: |
41 | * |
41 | * |
42 | * 7:3 = slot |
42 | * 7:3 = slot |
43 | * 2:0 = function |
43 | * 2:0 = function |
44 | * |
44 | * |
45 | * PCI_DEVFN(), PCI_SLOT(), and PCI_FUNC() are defined in uapi/linux/pci.h. |
45 | * PCI_DEVFN(), PCI_SLOT(), and PCI_FUNC() are defined in uapi/linux/pci.h. |
46 | * In the interest of not exposing interfaces to user-space unnecessarily, |
46 | * In the interest of not exposing interfaces to user-space unnecessarily, |
47 | * the following kernel-only defines are being added here. |
47 | * the following kernel-only defines are being added here. |
48 | */ |
48 | */ |
49 | #define PCI_DEVID(bus, devfn) ((((u16)(bus)) << 8) | (devfn)) |
49 | #define PCI_DEVID(bus, devfn) ((((u16)(bus)) << 8) | (devfn)) |
50 | /* return bus from PCI devid = ((u16)bus_number) << 8) | devfn */ |
50 | /* return bus from PCI devid = ((u16)bus_number) << 8) | devfn */ |
51 | #define PCI_BUS_NUM(x) (((x) >> 8) & 0xff) |
51 | #define PCI_BUS_NUM(x) (((x) >> 8) & 0xff) |
52 | 52 | ||
53 | /* pci_slot represents a physical slot */ |
53 | /* pci_slot represents a physical slot */ |
54 | struct pci_slot { |
54 | struct pci_slot { |
55 | struct pci_bus *bus; /* The bus this slot is on */ |
55 | struct pci_bus *bus; /* The bus this slot is on */ |
56 | struct list_head list; /* node in list of slots on this bus */ |
56 | struct list_head list; /* node in list of slots on this bus */ |
57 | struct hotplug_slot *hotplug; /* Hotplug info (migrate over time) */ |
57 | struct hotplug_slot *hotplug; /* Hotplug info (migrate over time) */ |
58 | unsigned char number; /* PCI_SLOT(pci_dev->devfn) */ |
58 | unsigned char number; /* PCI_SLOT(pci_dev->devfn) */ |
59 | struct kobject kobj; |
59 | struct kobject kobj; |
60 | }; |
60 | }; |
61 | 61 | ||
62 | static inline const char *pci_slot_name(const struct pci_slot *slot) |
62 | static inline const char *pci_slot_name(const struct pci_slot *slot) |
63 | { |
63 | { |
64 | return kobject_name(&slot->kobj); |
64 | return kobject_name(&slot->kobj); |
65 | } |
65 | } |
66 | 66 | ||
67 | /* File state for mmap()s on /proc/bus/pci/X/Y */ |
67 | /* File state for mmap()s on /proc/bus/pci/X/Y */ |
68 | enum pci_mmap_state { |
68 | enum pci_mmap_state { |
69 | pci_mmap_io, |
69 | pci_mmap_io, |
70 | pci_mmap_mem |
70 | pci_mmap_mem |
71 | }; |
71 | }; |
72 | 72 | ||
73 | /* This defines the direction arg to the DMA mapping routines. */ |
73 | /* This defines the direction arg to the DMA mapping routines. */ |
74 | #define PCI_DMA_BIDIRECTIONAL 0 |
74 | #define PCI_DMA_BIDIRECTIONAL 0 |
75 | #define PCI_DMA_TODEVICE 1 |
75 | #define PCI_DMA_TODEVICE 1 |
76 | #define PCI_DMA_FROMDEVICE 2 |
76 | #define PCI_DMA_FROMDEVICE 2 |
77 | #define PCI_DMA_NONE 3 |
77 | #define PCI_DMA_NONE 3 |
78 | 78 | ||
79 | /* |
79 | /* |
80 | * For PCI devices, the region numbers are assigned this way: |
80 | * For PCI devices, the region numbers are assigned this way: |
81 | */ |
81 | */ |
82 | enum { |
82 | enum { |
83 | /* #0-5: standard PCI resources */ |
83 | /* #0-5: standard PCI resources */ |
84 | PCI_STD_RESOURCES, |
84 | PCI_STD_RESOURCES, |
85 | PCI_STD_RESOURCE_END = 5, |
85 | PCI_STD_RESOURCE_END = 5, |
86 | 86 | ||
87 | /* #6: expansion ROM resource */ |
87 | /* #6: expansion ROM resource */ |
88 | PCI_ROM_RESOURCE, |
88 | PCI_ROM_RESOURCE, |
89 | 89 | ||
90 | /* device specific resources */ |
90 | /* device specific resources */ |
91 | #ifdef CONFIG_PCI_IOV |
91 | #ifdef CONFIG_PCI_IOV |
92 | PCI_IOV_RESOURCES, |
92 | PCI_IOV_RESOURCES, |
93 | PCI_IOV_RESOURCE_END = PCI_IOV_RESOURCES + PCI_SRIOV_NUM_BARS - 1, |
93 | PCI_IOV_RESOURCE_END = PCI_IOV_RESOURCES + PCI_SRIOV_NUM_BARS - 1, |
94 | #endif |
94 | #endif |
95 | 95 | ||
96 | /* resources assigned to buses behind the bridge */ |
96 | /* resources assigned to buses behind the bridge */ |
97 | #define PCI_BRIDGE_RESOURCE_NUM 4 |
97 | #define PCI_BRIDGE_RESOURCE_NUM 4 |
98 | 98 | ||
99 | PCI_BRIDGE_RESOURCES, |
99 | PCI_BRIDGE_RESOURCES, |
100 | PCI_BRIDGE_RESOURCE_END = PCI_BRIDGE_RESOURCES + |
100 | PCI_BRIDGE_RESOURCE_END = PCI_BRIDGE_RESOURCES + |
101 | PCI_BRIDGE_RESOURCE_NUM - 1, |
101 | PCI_BRIDGE_RESOURCE_NUM - 1, |
102 | 102 | ||
103 | /* total resources associated with a PCI device */ |
103 | /* total resources associated with a PCI device */ |
104 | PCI_NUM_RESOURCES, |
104 | PCI_NUM_RESOURCES, |
105 | 105 | ||
106 | /* preserve this for compatibility */ |
106 | /* preserve this for compatibility */ |
107 | DEVICE_COUNT_RESOURCE = PCI_NUM_RESOURCES, |
107 | DEVICE_COUNT_RESOURCE = PCI_NUM_RESOURCES, |
108 | }; |
108 | }; |
109 | 109 | ||
110 | typedef int __bitwise pci_power_t; |
110 | typedef int __bitwise pci_power_t; |
111 | 111 | ||
112 | #define PCI_D0 ((pci_power_t __force) 0) |
112 | #define PCI_D0 ((pci_power_t __force) 0) |
113 | #define PCI_D1 ((pci_power_t __force) 1) |
113 | #define PCI_D1 ((pci_power_t __force) 1) |
114 | #define PCI_D2 ((pci_power_t __force) 2) |
114 | #define PCI_D2 ((pci_power_t __force) 2) |
115 | #define PCI_D3hot ((pci_power_t __force) 3) |
115 | #define PCI_D3hot ((pci_power_t __force) 3) |
116 | #define PCI_D3cold ((pci_power_t __force) 4) |
116 | #define PCI_D3cold ((pci_power_t __force) 4) |
117 | #define PCI_UNKNOWN ((pci_power_t __force) 5) |
117 | #define PCI_UNKNOWN ((pci_power_t __force) 5) |
118 | #define PCI_POWER_ERROR ((pci_power_t __force) -1) |
118 | #define PCI_POWER_ERROR ((pci_power_t __force) -1) |
119 | 119 | ||
120 | /* Remember to update this when the list above changes! */ |
120 | /* Remember to update this when the list above changes! */ |
121 | extern const char *pci_power_names[]; |
121 | extern const char *pci_power_names[]; |
122 | 122 | ||
123 | static inline const char *pci_power_name(pci_power_t state) |
123 | static inline const char *pci_power_name(pci_power_t state) |
124 | { |
124 | { |
125 | return pci_power_names[1 + (int) state]; |
125 | return pci_power_names[1 + (int) state]; |
126 | } |
126 | } |
127 | 127 | ||
128 | #define PCI_PM_D2_DELAY 200 |
128 | #define PCI_PM_D2_DELAY 200 |
129 | #define PCI_PM_D3_WAIT 10 |
129 | #define PCI_PM_D3_WAIT 10 |
130 | #define PCI_PM_D3COLD_WAIT 100 |
130 | #define PCI_PM_D3COLD_WAIT 100 |
131 | #define PCI_PM_BUS_WAIT 50 |
131 | #define PCI_PM_BUS_WAIT 50 |
132 | 132 | ||
133 | /** The pci_channel state describes connectivity between the CPU and |
133 | /** The pci_channel state describes connectivity between the CPU and |
134 | * the pci device. If some PCI bus between here and the pci device |
134 | * the pci device. If some PCI bus between here and the pci device |
135 | * has crashed or locked up, this info is reflected here. |
135 | * has crashed or locked up, this info is reflected here. |
136 | */ |
136 | */ |
137 | typedef unsigned int __bitwise pci_channel_state_t; |
137 | typedef unsigned int __bitwise pci_channel_state_t; |
138 | 138 | ||
139 | enum pci_channel_state { |
139 | enum pci_channel_state { |
140 | /* I/O channel is in normal state */ |
140 | /* I/O channel is in normal state */ |
141 | pci_channel_io_normal = (__force pci_channel_state_t) 1, |
141 | pci_channel_io_normal = (__force pci_channel_state_t) 1, |
142 | 142 | ||
143 | /* I/O to channel is blocked */ |
143 | /* I/O to channel is blocked */ |
144 | pci_channel_io_frozen = (__force pci_channel_state_t) 2, |
144 | pci_channel_io_frozen = (__force pci_channel_state_t) 2, |
145 | 145 | ||
146 | /* PCI card is dead */ |
146 | /* PCI card is dead */ |
147 | pci_channel_io_perm_failure = (__force pci_channel_state_t) 3, |
147 | pci_channel_io_perm_failure = (__force pci_channel_state_t) 3, |
148 | }; |
148 | }; |
149 | 149 | ||
150 | typedef unsigned int __bitwise pcie_reset_state_t; |
150 | typedef unsigned int __bitwise pcie_reset_state_t; |
151 | 151 | ||
152 | enum pcie_reset_state { |
152 | enum pcie_reset_state { |
153 | /* Reset is NOT asserted (Use to deassert reset) */ |
153 | /* Reset is NOT asserted (Use to deassert reset) */ |
154 | pcie_deassert_reset = (__force pcie_reset_state_t) 1, |
154 | pcie_deassert_reset = (__force pcie_reset_state_t) 1, |
155 | 155 | ||
156 | /* Use #PERST to reset PCIe device */ |
156 | /* Use #PERST to reset PCIe device */ |
157 | pcie_warm_reset = (__force pcie_reset_state_t) 2, |
157 | pcie_warm_reset = (__force pcie_reset_state_t) 2, |
158 | 158 | ||
159 | /* Use PCIe Hot Reset to reset device */ |
159 | /* Use PCIe Hot Reset to reset device */ |
160 | pcie_hot_reset = (__force pcie_reset_state_t) 3 |
160 | pcie_hot_reset = (__force pcie_reset_state_t) 3 |
161 | }; |
161 | }; |
162 | 162 | ||
163 | typedef unsigned short __bitwise pci_dev_flags_t; |
163 | typedef unsigned short __bitwise pci_dev_flags_t; |
164 | enum pci_dev_flags { |
164 | enum pci_dev_flags { |
165 | /* INTX_DISABLE in PCI_COMMAND register disables MSI |
165 | /* INTX_DISABLE in PCI_COMMAND register disables MSI |
166 | * generation too. |
166 | * generation too. |
167 | */ |
167 | */ |
168 | PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) (1 << 0), |
168 | PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) (1 << 0), |
169 | /* Device configuration is irrevocably lost if disabled into D3 */ |
169 | /* Device configuration is irrevocably lost if disabled into D3 */ |
170 | PCI_DEV_FLAGS_NO_D3 = (__force pci_dev_flags_t) (1 << 1), |
170 | PCI_DEV_FLAGS_NO_D3 = (__force pci_dev_flags_t) (1 << 1), |
171 | /* Provide indication device is assigned by a Virtual Machine Manager */ |
171 | /* Provide indication device is assigned by a Virtual Machine Manager */ |
172 | PCI_DEV_FLAGS_ASSIGNED = (__force pci_dev_flags_t) (1 << 2), |
172 | PCI_DEV_FLAGS_ASSIGNED = (__force pci_dev_flags_t) (1 << 2), |
173 | /* Flag for quirk use to store if quirk-specific ACS is enabled */ |
173 | /* Flag for quirk use to store if quirk-specific ACS is enabled */ |
174 | PCI_DEV_FLAGS_ACS_ENABLED_QUIRK = (__force pci_dev_flags_t) (1 << 3), |
174 | PCI_DEV_FLAGS_ACS_ENABLED_QUIRK = (__force pci_dev_flags_t) (1 << 3), |
175 | /* Flag to indicate the device uses dma_alias_devfn */ |
175 | /* Flag to indicate the device uses dma_alias_devfn */ |
176 | PCI_DEV_FLAGS_DMA_ALIAS_DEVFN = (__force pci_dev_flags_t) (1 << 4), |
176 | PCI_DEV_FLAGS_DMA_ALIAS_DEVFN = (__force pci_dev_flags_t) (1 << 4), |
177 | /* Use a PCIe-to-PCI bridge alias even if !pci_is_pcie */ |
177 | /* Use a PCIe-to-PCI bridge alias even if !pci_is_pcie */ |
178 | PCI_DEV_FLAG_PCIE_BRIDGE_ALIAS = (__force pci_dev_flags_t) (1 << 5), |
178 | PCI_DEV_FLAG_PCIE_BRIDGE_ALIAS = (__force pci_dev_flags_t) (1 << 5), |
179 | /* Do not use bus resets for device */ |
179 | /* Do not use bus resets for device */ |
180 | PCI_DEV_FLAGS_NO_BUS_RESET = (__force pci_dev_flags_t) (1 << 6), |
180 | PCI_DEV_FLAGS_NO_BUS_RESET = (__force pci_dev_flags_t) (1 << 6), |
181 | /* Do not use PM reset even if device advertises NoSoftRst- */ |
181 | /* Do not use PM reset even if device advertises NoSoftRst- */ |
182 | PCI_DEV_FLAGS_NO_PM_RESET = (__force pci_dev_flags_t) (1 << 7), |
182 | PCI_DEV_FLAGS_NO_PM_RESET = (__force pci_dev_flags_t) (1 << 7), |
183 | /* Get VPD from function 0 VPD */ |
183 | /* Get VPD from function 0 VPD */ |
184 | PCI_DEV_FLAGS_VPD_REF_F0 = (__force pci_dev_flags_t) (1 << 8), |
184 | PCI_DEV_FLAGS_VPD_REF_F0 = (__force pci_dev_flags_t) (1 << 8), |
185 | }; |
185 | }; |
186 | 186 | ||
187 | enum pci_irq_reroute_variant { |
187 | enum pci_irq_reroute_variant { |
188 | INTEL_IRQ_REROUTE_VARIANT = 1, |
188 | INTEL_IRQ_REROUTE_VARIANT = 1, |
189 | MAX_IRQ_REROUTE_VARIANTS = 3 |
189 | MAX_IRQ_REROUTE_VARIANTS = 3 |
190 | }; |
190 | }; |
191 | 191 | ||
192 | typedef unsigned short __bitwise pci_bus_flags_t; |
192 | typedef unsigned short __bitwise pci_bus_flags_t; |
193 | enum pci_bus_flags { |
193 | enum pci_bus_flags { |
194 | PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1, |
194 | PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1, |
195 | PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2, |
195 | PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2, |
196 | }; |
196 | }; |
197 | 197 | ||
198 | /* These values come from the PCI Express Spec */ |
198 | /* These values come from the PCI Express Spec */ |
199 | enum pcie_link_width { |
199 | enum pcie_link_width { |
200 | PCIE_LNK_WIDTH_RESRV = 0x00, |
200 | PCIE_LNK_WIDTH_RESRV = 0x00, |
201 | PCIE_LNK_X1 = 0x01, |
201 | PCIE_LNK_X1 = 0x01, |
202 | PCIE_LNK_X2 = 0x02, |
202 | PCIE_LNK_X2 = 0x02, |
203 | PCIE_LNK_X4 = 0x04, |
203 | PCIE_LNK_X4 = 0x04, |
204 | PCIE_LNK_X8 = 0x08, |
204 | PCIE_LNK_X8 = 0x08, |
205 | PCIE_LNK_X12 = 0x0C, |
205 | PCIE_LNK_X12 = 0x0C, |
206 | PCIE_LNK_X16 = 0x10, |
206 | PCIE_LNK_X16 = 0x10, |
207 | PCIE_LNK_X32 = 0x20, |
207 | PCIE_LNK_X32 = 0x20, |
208 | PCIE_LNK_WIDTH_UNKNOWN = 0xFF, |
208 | PCIE_LNK_WIDTH_UNKNOWN = 0xFF, |
209 | }; |
209 | }; |
210 | 210 | ||
211 | /* Based on the PCI Hotplug Spec, but some values are made up by us */ |
211 | /* Based on the PCI Hotplug Spec, but some values are made up by us */ |
212 | enum pci_bus_speed { |
212 | enum pci_bus_speed { |
213 | PCI_SPEED_33MHz = 0x00, |
213 | PCI_SPEED_33MHz = 0x00, |
214 | PCI_SPEED_66MHz = 0x01, |
214 | PCI_SPEED_66MHz = 0x01, |
215 | PCI_SPEED_66MHz_PCIX = 0x02, |
215 | PCI_SPEED_66MHz_PCIX = 0x02, |
216 | PCI_SPEED_100MHz_PCIX = 0x03, |
216 | PCI_SPEED_100MHz_PCIX = 0x03, |
217 | PCI_SPEED_133MHz_PCIX = 0x04, |
217 | PCI_SPEED_133MHz_PCIX = 0x04, |
218 | PCI_SPEED_66MHz_PCIX_ECC = 0x05, |
218 | PCI_SPEED_66MHz_PCIX_ECC = 0x05, |
219 | PCI_SPEED_100MHz_PCIX_ECC = 0x06, |
219 | PCI_SPEED_100MHz_PCIX_ECC = 0x06, |
220 | PCI_SPEED_133MHz_PCIX_ECC = 0x07, |
220 | PCI_SPEED_133MHz_PCIX_ECC = 0x07, |
221 | PCI_SPEED_66MHz_PCIX_266 = 0x09, |
221 | PCI_SPEED_66MHz_PCIX_266 = 0x09, |
222 | PCI_SPEED_100MHz_PCIX_266 = 0x0a, |
222 | PCI_SPEED_100MHz_PCIX_266 = 0x0a, |
223 | PCI_SPEED_133MHz_PCIX_266 = 0x0b, |
223 | PCI_SPEED_133MHz_PCIX_266 = 0x0b, |
224 | AGP_UNKNOWN = 0x0c, |
224 | AGP_UNKNOWN = 0x0c, |
225 | AGP_1X = 0x0d, |
225 | AGP_1X = 0x0d, |
226 | AGP_2X = 0x0e, |
226 | AGP_2X = 0x0e, |
227 | AGP_4X = 0x0f, |
227 | AGP_4X = 0x0f, |
228 | AGP_8X = 0x10, |
228 | AGP_8X = 0x10, |
229 | PCI_SPEED_66MHz_PCIX_533 = 0x11, |
229 | PCI_SPEED_66MHz_PCIX_533 = 0x11, |
230 | PCI_SPEED_100MHz_PCIX_533 = 0x12, |
230 | PCI_SPEED_100MHz_PCIX_533 = 0x12, |
231 | PCI_SPEED_133MHz_PCIX_533 = 0x13, |
231 | PCI_SPEED_133MHz_PCIX_533 = 0x13, |
232 | PCIE_SPEED_2_5GT = 0x14, |
232 | PCIE_SPEED_2_5GT = 0x14, |
233 | PCIE_SPEED_5_0GT = 0x15, |
233 | PCIE_SPEED_5_0GT = 0x15, |
234 | PCIE_SPEED_8_0GT = 0x16, |
234 | PCIE_SPEED_8_0GT = 0x16, |
235 | PCI_SPEED_UNKNOWN = 0xff, |
235 | PCI_SPEED_UNKNOWN = 0xff, |
236 | }; |
236 | }; |
237 | 237 | ||
238 | struct pci_cap_saved_data { |
238 | struct pci_cap_saved_data { |
239 | u16 cap_nr; |
239 | u16 cap_nr; |
240 | bool cap_extended; |
240 | bool cap_extended; |
241 | unsigned int size; |
241 | unsigned int size; |
242 | u32 data[0]; |
242 | u32 data[0]; |
243 | }; |
243 | }; |
244 | 244 | ||
245 | struct pci_cap_saved_state { |
245 | struct pci_cap_saved_state { |
246 | struct hlist_node next; |
246 | struct hlist_node next; |
247 | struct pci_cap_saved_data cap; |
247 | struct pci_cap_saved_data cap; |
248 | }; |
248 | }; |
249 | 249 | ||
250 | struct pcie_link_state; |
250 | struct pcie_link_state; |
251 | struct pci_vpd; |
251 | struct pci_vpd; |
252 | struct pci_sriov; |
252 | struct pci_sriov; |
253 | struct pci_ats; |
253 | struct pci_ats; |
254 | 254 | ||
255 | /* |
255 | /* |
256 | * The pci_dev structure is used to describe PCI devices. |
256 | * The pci_dev structure is used to describe PCI devices. |
257 | */ |
257 | */ |
258 | struct pci_dev { |
258 | struct pci_dev { |
259 | struct list_head bus_list; /* node in per-bus list */ |
259 | struct list_head bus_list; /* node in per-bus list */ |
260 | struct pci_bus *bus; /* bus this device is on */ |
260 | struct pci_bus *bus; /* bus this device is on */ |
261 | struct pci_bus *subordinate; /* bus this device bridges to */ |
261 | struct pci_bus *subordinate; /* bus this device bridges to */ |
262 | 262 | ||
263 | void *sysdata; /* hook for sys-specific extension */ |
263 | void *sysdata; /* hook for sys-specific extension */ |
264 | // struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */ |
264 | // struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */ |
265 | struct pci_slot *slot; /* Physical slot this device is in */ |
265 | struct pci_slot *slot; /* Physical slot this device is in */ |
266 | u32 busnr; |
266 | u32 busnr; |
267 | unsigned int devfn; /* encoded device & function index */ |
267 | unsigned int devfn; /* encoded device & function index */ |
268 | unsigned short vendor; |
268 | unsigned short vendor; |
269 | unsigned short device; |
269 | unsigned short device; |
270 | unsigned short subsystem_vendor; |
270 | unsigned short subsystem_vendor; |
271 | unsigned short subsystem_device; |
271 | unsigned short subsystem_device; |
272 | unsigned int class; /* 3 bytes: (base,sub,prog-if) */ |
272 | unsigned int class; /* 3 bytes: (base,sub,prog-if) */ |
273 | u8 revision; /* PCI revision, low byte of class word */ |
273 | u8 revision; /* PCI revision, low byte of class word */ |
274 | u8 hdr_type; /* PCI header type (`multi' flag masked out) */ |
274 | u8 hdr_type; /* PCI header type (`multi' flag masked out) */ |
275 | u8 pcie_cap; /* PCIe capability offset */ |
275 | u8 pcie_cap; /* PCIe capability offset */ |
276 | u8 msi_cap; /* MSI capability offset */ |
276 | u8 msi_cap; /* MSI capability offset */ |
277 | u8 msix_cap; /* MSI-X capability offset */ |
277 | u8 msix_cap; /* MSI-X capability offset */ |
278 | u8 pcie_mpss:3; /* PCIe Max Payload Size Supported */ |
278 | u8 pcie_mpss:3; /* PCIe Max Payload Size Supported */ |
279 | u8 rom_base_reg; /* which config register controls the ROM */ |
279 | u8 rom_base_reg; /* which config register controls the ROM */ |
280 | u8 pin; /* which interrupt pin this device uses */ |
280 | u8 pin; /* which interrupt pin this device uses */ |
281 | u16 pcie_flags_reg; /* cached PCIe Capabilities Register */ |
281 | u16 pcie_flags_reg; /* cached PCIe Capabilities Register */ |
282 | u8 dma_alias_devfn;/* devfn of DMA alias, if any */ |
282 | u8 dma_alias_devfn;/* devfn of DMA alias, if any */ |
283 | 283 | ||
284 | u64 dma_mask; /* Mask of the bits of bus address this |
284 | u64 dma_mask; /* Mask of the bits of bus address this |
285 | device implements. Normally this is |
285 | device implements. Normally this is |
286 | 0xffffffff. You only need to change |
286 | 0xffffffff. You only need to change |
287 | this if your device has broken DMA |
287 | this if your device has broken DMA |
288 | or supports 64-bit transfers. */ |
288 | or supports 64-bit transfers. */ |
289 | 289 | ||
290 | 290 | ||
291 | pci_power_t current_state; /* Current operating state. In ACPI-speak, |
291 | pci_power_t current_state; /* Current operating state. In ACPI-speak, |
292 | this is D0-D3, D0 being fully functional, |
292 | this is D0-D3, D0 being fully functional, |
293 | and D3 being off. */ |
293 | and D3 being off. */ |
294 | u8 pm_cap; /* PM capability offset */ |
294 | u8 pm_cap; /* PM capability offset */ |
295 | unsigned int pme_support:5; /* Bitmask of states from which PME# |
295 | unsigned int pme_support:5; /* Bitmask of states from which PME# |
296 | can be generated */ |
296 | can be generated */ |
297 | unsigned int pme_interrupt:1; |
297 | unsigned int pme_interrupt:1; |
298 | unsigned int pme_poll:1; /* Poll device's PME status bit */ |
298 | unsigned int pme_poll:1; /* Poll device's PME status bit */ |
299 | unsigned int d1_support:1; /* Low power state D1 is supported */ |
299 | unsigned int d1_support:1; /* Low power state D1 is supported */ |
300 | unsigned int d2_support:1; /* Low power state D2 is supported */ |
300 | unsigned int d2_support:1; /* Low power state D2 is supported */ |
301 | unsigned int no_d1d2:1; /* D1 and D2 are forbidden */ |
301 | unsigned int no_d1d2:1; /* D1 and D2 are forbidden */ |
302 | unsigned int no_d3cold:1; /* D3cold is forbidden */ |
302 | unsigned int no_d3cold:1; /* D3cold is forbidden */ |
303 | unsigned int d3cold_allowed:1; /* D3cold is allowed by user */ |
303 | unsigned int d3cold_allowed:1; /* D3cold is allowed by user */ |
304 | unsigned int mmio_always_on:1; /* disallow turning off io/mem |
304 | unsigned int mmio_always_on:1; /* disallow turning off io/mem |
305 | decoding during bar sizing */ |
305 | decoding during bar sizing */ |
306 | unsigned int wakeup_prepared:1; |
306 | unsigned int wakeup_prepared:1; |
307 | unsigned int runtime_d3cold:1; /* whether go through runtime |
307 | unsigned int runtime_d3cold:1; /* whether go through runtime |
308 | D3cold, not set for devices |
308 | D3cold, not set for devices |
309 | powered on/off by the |
309 | powered on/off by the |
310 | corresponding bridge */ |
310 | corresponding bridge */ |
311 | unsigned int ignore_hotplug:1; /* Ignore hotplug events */ |
311 | unsigned int ignore_hotplug:1; /* Ignore hotplug events */ |
312 | unsigned int d3_delay; /* D3->D0 transition time in ms */ |
312 | unsigned int d3_delay; /* D3->D0 transition time in ms */ |
313 | unsigned int d3cold_delay; /* D3cold->D0 transition time in ms */ |
313 | unsigned int d3cold_delay; /* D3cold->D0 transition time in ms */ |
314 | 314 | ||
315 | #ifdef CONFIG_PCIEASPM |
315 | #ifdef CONFIG_PCIEASPM |
316 | struct pcie_link_state *link_state; /* ASPM link state */ |
316 | struct pcie_link_state *link_state; /* ASPM link state */ |
317 | #endif |
317 | #endif |
318 | 318 | ||
319 | pci_channel_state_t error_state; /* current connectivity state */ |
319 | pci_channel_state_t error_state; /* current connectivity state */ |
320 | struct device dev; /* Generic device interface */ |
320 | struct device dev; /* Generic device interface */ |
321 | 321 | ||
322 | int cfg_size; /* Size of configuration space */ |
322 | int cfg_size; /* Size of configuration space */ |
323 | 323 | ||
324 | /* |
324 | /* |
325 | * Instead of touching interrupt line and base address registers |
325 | * Instead of touching interrupt line and base address registers |
326 | * directly, use the values stored here. They might be different! |
326 | * directly, use the values stored here. They might be different! |
327 | */ |
327 | */ |
328 | unsigned int irq; |
328 | unsigned int irq; |
329 | struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */ |
329 | struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */ |
330 | 330 | ||
331 | bool match_driver; /* Skip attaching driver */ |
331 | bool match_driver; /* Skip attaching driver */ |
332 | /* These fields are used by common fixups */ |
332 | /* These fields are used by common fixups */ |
333 | unsigned int transparent:1; /* Subtractive decode PCI bridge */ |
333 | unsigned int transparent:1; /* Subtractive decode PCI bridge */ |
334 | unsigned int multifunction:1;/* Part of multi-function device */ |
334 | unsigned int multifunction:1;/* Part of multi-function device */ |
335 | /* keep track of device state */ |
335 | /* keep track of device state */ |
336 | unsigned int is_added:1; |
336 | unsigned int is_added:1; |
337 | unsigned int is_busmaster:1; /* device is busmaster */ |
337 | unsigned int is_busmaster:1; /* device is busmaster */ |
338 | unsigned int no_msi:1; /* device may not use msi */ |
338 | unsigned int no_msi:1; /* device may not use msi */ |
339 | unsigned int no_64bit_msi:1; /* device may only use 32-bit MSIs */ |
339 | unsigned int no_64bit_msi:1; /* device may only use 32-bit MSIs */ |
340 | unsigned int block_cfg_access:1; /* config space access is blocked */ |
340 | unsigned int block_cfg_access:1; /* config space access is blocked */ |
341 | unsigned int broken_parity_status:1; /* Device generates false positive parity */ |
341 | unsigned int broken_parity_status:1; /* Device generates false positive parity */ |
342 | unsigned int irq_reroute_variant:2; /* device needs IRQ rerouting variant */ |
342 | unsigned int irq_reroute_variant:2; /* device needs IRQ rerouting variant */ |
343 | unsigned int msi_enabled:1; |
343 | unsigned int msi_enabled:1; |
344 | unsigned int msix_enabled:1; |
344 | unsigned int msix_enabled:1; |
345 | unsigned int ari_enabled:1; /* ARI forwarding */ |
345 | unsigned int ari_enabled:1; /* ARI forwarding */ |
346 | unsigned int ats_enabled:1; /* Address Translation Service */ |
346 | unsigned int ats_enabled:1; /* Address Translation Service */ |
347 | unsigned int is_managed:1; |
347 | unsigned int is_managed:1; |
348 | unsigned int needs_freset:1; /* Dev requires fundamental reset */ |
348 | unsigned int needs_freset:1; /* Dev requires fundamental reset */ |
349 | unsigned int state_saved:1; |
349 | unsigned int state_saved:1; |
350 | unsigned int is_physfn:1; |
350 | unsigned int is_physfn:1; |
351 | unsigned int is_virtfn:1; |
351 | unsigned int is_virtfn:1; |
352 | unsigned int reset_fn:1; |
352 | unsigned int reset_fn:1; |
353 | unsigned int is_hotplug_bridge:1; |
353 | unsigned int is_hotplug_bridge:1; |
354 | unsigned int __aer_firmware_first_valid:1; |
354 | unsigned int __aer_firmware_first_valid:1; |
355 | unsigned int __aer_firmware_first:1; |
355 | unsigned int __aer_firmware_first:1; |
356 | unsigned int broken_intx_masking:1; |
356 | unsigned int broken_intx_masking:1; |
357 | unsigned int io_window_1k:1; /* Intel P2P bridge 1K I/O windows */ |
357 | unsigned int io_window_1k:1; /* Intel P2P bridge 1K I/O windows */ |
358 | unsigned int irq_managed:1; |
358 | unsigned int irq_managed:1; |
359 | unsigned int has_secondary_link:1; |
359 | unsigned int has_secondary_link:1; |
360 | unsigned int non_compliant_bars:1; /* broken BARs; ignore them */ |
360 | unsigned int non_compliant_bars:1; /* broken BARs; ignore them */ |
361 | pci_dev_flags_t dev_flags; |
361 | pci_dev_flags_t dev_flags; |
362 | atomic_t enable_cnt; /* pci_enable_device has been called */ |
362 | atomic_t enable_cnt; /* pci_enable_device has been called */ |
363 | 363 | ||
364 | u32 saved_config_space[16]; /* config space saved at suspend time */ |
364 | u32 saved_config_space[16]; /* config space saved at suspend time */ |
365 | struct hlist_head saved_cap_space; |
365 | struct hlist_head saved_cap_space; |
366 | struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */ |
366 | struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */ |
367 | int rom_attr_enabled; /* has display of the rom attribute been enabled? */ |
367 | int rom_attr_enabled; /* has display of the rom attribute been enabled? */ |
368 | #ifdef CONFIG_PCI_MSI |
368 | #ifdef CONFIG_PCI_MSI |
369 | const struct attribute_group **msi_irq_groups; |
369 | const struct attribute_group **msi_irq_groups; |
370 | #endif |
370 | #endif |
371 | #ifdef CONFIG_PCI_ATS |
371 | #ifdef CONFIG_PCI_ATS |
372 | union { |
372 | union { |
373 | struct pci_sriov *sriov; /* SR-IOV capability related */ |
373 | struct pci_sriov *sriov; /* SR-IOV capability related */ |
374 | struct pci_dev *physfn; /* the PF this VF is associated with */ |
374 | struct pci_dev *physfn; /* the PF this VF is associated with */ |
375 | }; |
375 | }; |
376 | u16 ats_cap; /* ATS Capability offset */ |
376 | u16 ats_cap; /* ATS Capability offset */ |
377 | u8 ats_stu; /* ATS Smallest Translation Unit */ |
377 | u8 ats_stu; /* ATS Smallest Translation Unit */ |
378 | atomic_t ats_ref_cnt; /* number of VFs with ATS enabled */ |
378 | atomic_t ats_ref_cnt; /* number of VFs with ATS enabled */ |
379 | #endif |
379 | #endif |
380 | phys_addr_t rom; /* Physical address of ROM if it's not from the BAR */ |
380 | phys_addr_t rom; /* Physical address of ROM if it's not from the BAR */ |
381 | size_t romlen; /* Length of ROM if it's not from the BAR */ |
381 | size_t romlen; /* Length of ROM if it's not from the BAR */ |
382 | char *driver_override; /* Driver name to force a match */ |
382 | char *driver_override; /* Driver name to force a match */ |
383 | }; |
383 | }; |
384 | 384 | ||
385 | static inline struct pci_dev *pci_physfn(struct pci_dev *dev) |
385 | static inline struct pci_dev *pci_physfn(struct pci_dev *dev) |
386 | { |
386 | { |
387 | #ifdef CONFIG_PCI_IOV |
387 | #ifdef CONFIG_PCI_IOV |
388 | if (dev->is_virtfn) |
388 | if (dev->is_virtfn) |
389 | dev = dev->physfn; |
389 | dev = dev->physfn; |
390 | #endif |
390 | #endif |
391 | return dev; |
391 | return dev; |
392 | } |
392 | } |
393 | 393 | ||
394 | struct pci_dev *pci_alloc_dev(struct pci_bus *bus); |
394 | struct pci_dev *pci_alloc_dev(struct pci_bus *bus); |
395 | 395 | ||
396 | #define to_pci_dev(n) container_of(n, struct pci_dev, dev) |
396 | #define to_pci_dev(n) container_of(n, struct pci_dev, dev) |
397 | #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL) |
397 | #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL) |
398 | 398 | ||
399 | static inline int pci_channel_offline(struct pci_dev *pdev) |
399 | static inline int pci_channel_offline(struct pci_dev *pdev) |
400 | { |
400 | { |
401 | return (pdev->error_state != pci_channel_io_normal); |
401 | return (pdev->error_state != pci_channel_io_normal); |
402 | } |
402 | } |
403 | 403 | ||
404 | struct pci_host_bridge { |
404 | struct pci_host_bridge { |
405 | struct device dev; |
405 | struct device dev; |
406 | struct pci_bus *bus; /* root bus */ |
406 | struct pci_bus *bus; /* root bus */ |
407 | struct list_head windows; /* resource_entry */ |
407 | struct list_head windows; /* resource_entry */ |
408 | void (*release_fn)(struct pci_host_bridge *); |
408 | void (*release_fn)(struct pci_host_bridge *); |
409 | void *release_data; |
409 | void *release_data; |
410 | unsigned int ignore_reset_delay:1; /* for entire hierarchy */ |
410 | unsigned int ignore_reset_delay:1; /* for entire hierarchy */ |
411 | /* Resource alignment requirements */ |
411 | /* Resource alignment requirements */ |
412 | resource_size_t (*align_resource)(struct pci_dev *dev, |
412 | resource_size_t (*align_resource)(struct pci_dev *dev, |
413 | const struct resource *res, |
413 | const struct resource *res, |
414 | resource_size_t start, |
414 | resource_size_t start, |
415 | resource_size_t size, |
415 | resource_size_t size, |
416 | resource_size_t align); |
416 | resource_size_t align); |
417 | }; |
417 | }; |
418 | 418 | ||
419 | #define to_pci_host_bridge(n) container_of(n, struct pci_host_bridge, dev) |
419 | #define to_pci_host_bridge(n) container_of(n, struct pci_host_bridge, dev) |
420 | 420 | ||
421 | struct pci_host_bridge *pci_find_host_bridge(struct pci_bus *bus); |
421 | struct pci_host_bridge *pci_find_host_bridge(struct pci_bus *bus); |
422 | 422 | ||
423 | void pci_set_host_bridge_release(struct pci_host_bridge *bridge, |
423 | void pci_set_host_bridge_release(struct pci_host_bridge *bridge, |
424 | void (*release_fn)(struct pci_host_bridge *), |
424 | void (*release_fn)(struct pci_host_bridge *), |
425 | void *release_data); |
425 | void *release_data); |
426 | 426 | ||
427 | int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge); |
427 | int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge); |
428 | 428 | ||
429 | /* |
429 | /* |
430 | * The first PCI_BRIDGE_RESOURCE_NUM PCI bus resources (those that correspond |
430 | * The first PCI_BRIDGE_RESOURCE_NUM PCI bus resources (those that correspond |
431 | * to P2P or CardBus bridge windows) go in a table. Additional ones (for |
431 | * to P2P or CardBus bridge windows) go in a table. Additional ones (for |
432 | * buses below host bridges or subtractive decode bridges) go in the list. |
432 | * buses below host bridges or subtractive decode bridges) go in the list. |
433 | * Use pci_bus_for_each_resource() to iterate through all the resources. |
433 | * Use pci_bus_for_each_resource() to iterate through all the resources. |
434 | */ |
434 | */ |
435 | 435 | ||
436 | /* |
436 | /* |
437 | * PCI_SUBTRACTIVE_DECODE means the bridge forwards the window implicitly |
437 | * PCI_SUBTRACTIVE_DECODE means the bridge forwards the window implicitly |
438 | * and there's no way to program the bridge with the details of the window. |
438 | * and there's no way to program the bridge with the details of the window. |
439 | * This does not apply to ACPI _CRS windows, even with the _DEC subtractive- |
439 | * This does not apply to ACPI _CRS windows, even with the _DEC subtractive- |
440 | * decode bit set, because they are explicit and can be programmed with _SRS. |
440 | * decode bit set, because they are explicit and can be programmed with _SRS. |
441 | */ |
441 | */ |
442 | #define PCI_SUBTRACTIVE_DECODE 0x1 |
442 | #define PCI_SUBTRACTIVE_DECODE 0x1 |
443 | 443 | ||
444 | struct pci_bus_resource { |
444 | struct pci_bus_resource { |
445 | struct list_head list; |
445 | struct list_head list; |
446 | struct resource *res; |
446 | struct resource *res; |
447 | unsigned int flags; |
447 | unsigned int flags; |
448 | }; |
448 | }; |
449 | 449 | ||
450 | #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */ |
450 | #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */ |
451 | 451 | ||
452 | struct pci_bus { |
452 | struct pci_bus { |
453 | struct list_head node; /* node in list of buses */ |
453 | struct list_head node; /* node in list of buses */ |
454 | struct pci_bus *parent; /* parent bus this bridge is on */ |
454 | struct pci_bus *parent; /* parent bus this bridge is on */ |
455 | struct list_head children; /* list of child buses */ |
455 | struct list_head children; /* list of child buses */ |
456 | struct list_head devices; /* list of devices on this bus */ |
456 | struct list_head devices; /* list of devices on this bus */ |
457 | struct pci_dev *self; /* bridge device as seen by parent */ |
457 | struct pci_dev *self; /* bridge device as seen by parent */ |
458 | struct list_head slots; /* list of slots on this bus; |
458 | struct list_head slots; /* list of slots on this bus; |
459 | protected by pci_slot_mutex */ |
459 | protected by pci_slot_mutex */ |
460 | struct resource *resource[PCI_BRIDGE_RESOURCE_NUM]; |
460 | struct resource *resource[PCI_BRIDGE_RESOURCE_NUM]; |
461 | struct list_head resources; /* address space routed to this bus */ |
461 | struct list_head resources; /* address space routed to this bus */ |
462 | struct resource busn_res; /* bus numbers routed to this bus */ |
462 | struct resource busn_res; /* bus numbers routed to this bus */ |
463 | 463 | ||
464 | struct pci_ops *ops; /* configuration access functions */ |
464 | struct pci_ops *ops; /* configuration access functions */ |
465 | struct msi_controller *msi; /* MSI controller */ |
465 | struct msi_controller *msi; /* MSI controller */ |
466 | void *sysdata; /* hook for sys-specific extension */ |
466 | void *sysdata; /* hook for sys-specific extension */ |
467 | struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */ |
467 | struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */ |
468 | 468 | ||
469 | unsigned char number; /* bus number */ |
469 | unsigned char number; /* bus number */ |
470 | unsigned char primary; /* number of primary bridge */ |
470 | unsigned char primary; /* number of primary bridge */ |
471 | unsigned char max_bus_speed; /* enum pci_bus_speed */ |
471 | unsigned char max_bus_speed; /* enum pci_bus_speed */ |
472 | unsigned char cur_bus_speed; /* enum pci_bus_speed */ |
472 | unsigned char cur_bus_speed; /* enum pci_bus_speed */ |
473 | #ifdef CONFIG_PCI_DOMAINS_GENERIC |
473 | #ifdef CONFIG_PCI_DOMAINS_GENERIC |
474 | int domain_nr; |
474 | int domain_nr; |
475 | #endif |
475 | #endif |
476 | 476 | ||
477 | char name[48]; |
477 | char name[48]; |
478 | 478 | ||
479 | unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */ |
479 | unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */ |
480 | pci_bus_flags_t bus_flags; /* inherited by child buses */ |
480 | pci_bus_flags_t bus_flags; /* inherited by child buses */ |
481 | struct device *bridge; |
481 | struct device *bridge; |
482 | struct device dev; |
482 | struct device dev; |
483 | struct bin_attribute *legacy_io; /* legacy I/O for this bus */ |
483 | struct bin_attribute *legacy_io; /* legacy I/O for this bus */ |
484 | struct bin_attribute *legacy_mem; /* legacy mem */ |
484 | struct bin_attribute *legacy_mem; /* legacy mem */ |
485 | unsigned int is_added:1; |
485 | unsigned int is_added:1; |
486 | }; |
486 | }; |
487 | 487 | ||
488 | #define to_pci_bus(n) container_of(n, struct pci_bus, dev) |
488 | #define to_pci_bus(n) container_of(n, struct pci_bus, dev) |
489 | 489 | ||
490 | /* |
490 | /* |
491 | * Returns true if the PCI bus is root (behind host-PCI bridge), |
491 | * Returns true if the PCI bus is root (behind host-PCI bridge), |
492 | * false otherwise |
492 | * false otherwise |
493 | * |
493 | * |
494 | * Some code assumes that "bus->self == NULL" means that bus is a root bus. |
494 | * Some code assumes that "bus->self == NULL" means that bus is a root bus. |
495 | * This is incorrect because "virtual" buses added for SR-IOV (via |
495 | * This is incorrect because "virtual" buses added for SR-IOV (via |
496 | * virtfn_add_bus()) have "bus->self == NULL" but are not root buses. |
496 | * virtfn_add_bus()) have "bus->self == NULL" but are not root buses. |
497 | */ |
497 | */ |
498 | static inline bool pci_is_root_bus(struct pci_bus *pbus) |
498 | static inline bool pci_is_root_bus(struct pci_bus *pbus) |
499 | { |
499 | { |
500 | return !(pbus->parent); |
500 | return !(pbus->parent); |
501 | } |
501 | } |
502 | 502 | ||
503 | /** |
503 | /** |
504 | * pci_is_bridge - check if the PCI device is a bridge |
504 | * pci_is_bridge - check if the PCI device is a bridge |
505 | * @dev: PCI device |
505 | * @dev: PCI device |
506 | * |
506 | * |
507 | * Return true if the PCI device is bridge whether it has subordinate |
507 | * Return true if the PCI device is bridge whether it has subordinate |
508 | * or not. |
508 | * or not. |
509 | */ |
509 | */ |
510 | static inline bool pci_is_bridge(struct pci_dev *dev) |
510 | static inline bool pci_is_bridge(struct pci_dev *dev) |
511 | { |
511 | { |
512 | return dev->hdr_type == PCI_HEADER_TYPE_BRIDGE || |
512 | return dev->hdr_type == PCI_HEADER_TYPE_BRIDGE || |
513 | dev->hdr_type == PCI_HEADER_TYPE_CARDBUS; |
513 | dev->hdr_type == PCI_HEADER_TYPE_CARDBUS; |
514 | } |
514 | } |
515 | 515 | ||
516 | static inline struct pci_dev *pci_upstream_bridge(struct pci_dev *dev) |
516 | static inline struct pci_dev *pci_upstream_bridge(struct pci_dev *dev) |
517 | { |
517 | { |
518 | dev = pci_physfn(dev); |
518 | dev = pci_physfn(dev); |
519 | if (pci_is_root_bus(dev->bus)) |
519 | if (pci_is_root_bus(dev->bus)) |
520 | return NULL; |
520 | return NULL; |
521 | 521 | ||
522 | return dev->bus->self; |
522 | return dev->bus->self; |
523 | } |
523 | } |
524 | 524 | ||
525 | struct device *pci_get_host_bridge_device(struct pci_dev *dev); |
525 | struct device *pci_get_host_bridge_device(struct pci_dev *dev); |
526 | void pci_put_host_bridge_device(struct device *dev); |
526 | void pci_put_host_bridge_device(struct device *dev); |
527 | 527 | ||
528 | #ifdef CONFIG_PCI_MSI |
528 | #ifdef CONFIG_PCI_MSI |
529 | static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) |
529 | static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) |
530 | { |
530 | { |
531 | return pci_dev->msi_enabled || pci_dev->msix_enabled; |
531 | return pci_dev->msi_enabled || pci_dev->msix_enabled; |
532 | } |
532 | } |
533 | #else |
533 | #else |
534 | static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) { return false; } |
534 | static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) { return false; } |
535 | #endif |
535 | #endif |
536 | 536 | ||
537 | /* |
537 | /* |
538 | * Error values that may be returned by PCI functions. |
538 | * Error values that may be returned by PCI functions. |
539 | */ |
539 | */ |
540 | #define PCIBIOS_SUCCESSFUL 0x00 |
540 | #define PCIBIOS_SUCCESSFUL 0x00 |
541 | #define PCIBIOS_FUNC_NOT_SUPPORTED 0x81 |
541 | #define PCIBIOS_FUNC_NOT_SUPPORTED 0x81 |
542 | #define PCIBIOS_BAD_VENDOR_ID 0x83 |
542 | #define PCIBIOS_BAD_VENDOR_ID 0x83 |
543 | #define PCIBIOS_DEVICE_NOT_FOUND 0x86 |
543 | #define PCIBIOS_DEVICE_NOT_FOUND 0x86 |
544 | #define PCIBIOS_BAD_REGISTER_NUMBER 0x87 |
544 | #define PCIBIOS_BAD_REGISTER_NUMBER 0x87 |
545 | #define PCIBIOS_SET_FAILED 0x88 |
545 | #define PCIBIOS_SET_FAILED 0x88 |
546 | #define PCIBIOS_BUFFER_TOO_SMALL 0x89 |
546 | #define PCIBIOS_BUFFER_TOO_SMALL 0x89 |
547 | 547 | ||
548 | /* |
548 | /* |
549 | * Translate above to generic errno for passing back through non-PCI code. |
549 | * Translate above to generic errno for passing back through non-PCI code. |
550 | */ |
550 | */ |
551 | static inline int pcibios_err_to_errno(int err) |
551 | static inline int pcibios_err_to_errno(int err) |
552 | { |
552 | { |
553 | if (err <= PCIBIOS_SUCCESSFUL) |
553 | if (err <= PCIBIOS_SUCCESSFUL) |
554 | return err; /* Assume already errno */ |
554 | return err; /* Assume already errno */ |
555 | 555 | ||
556 | switch (err) { |
556 | switch (err) { |
557 | case PCIBIOS_FUNC_NOT_SUPPORTED: |
557 | case PCIBIOS_FUNC_NOT_SUPPORTED: |
558 | return -ENOENT; |
558 | return -ENOENT; |
559 | case PCIBIOS_BAD_VENDOR_ID: |
559 | case PCIBIOS_BAD_VENDOR_ID: |
560 | return -ENOTTY; |
560 | return -ENOTTY; |
561 | case PCIBIOS_DEVICE_NOT_FOUND: |
561 | case PCIBIOS_DEVICE_NOT_FOUND: |
562 | return -ENODEV; |
562 | return -ENODEV; |
563 | case PCIBIOS_BAD_REGISTER_NUMBER: |
563 | case PCIBIOS_BAD_REGISTER_NUMBER: |
564 | return -EFAULT; |
564 | return -EFAULT; |
565 | case PCIBIOS_SET_FAILED: |
565 | case PCIBIOS_SET_FAILED: |
566 | return -EIO; |
566 | return -EIO; |
567 | case PCIBIOS_BUFFER_TOO_SMALL: |
567 | case PCIBIOS_BUFFER_TOO_SMALL: |
568 | return -ENOSPC; |
568 | return -ENOSPC; |
569 | } |
569 | } |
570 | 570 | ||
571 | return -ERANGE; |
571 | return -ERANGE; |
572 | } |
572 | } |
573 | 573 | ||
574 | /* Low-level architecture-dependent routines */ |
574 | /* Low-level architecture-dependent routines */ |
575 | 575 | ||
576 | struct pci_ops { |
576 | struct pci_ops { |
577 | void __iomem *(*map_bus)(struct pci_bus *bus, unsigned int devfn, int where); |
577 | void __iomem *(*map_bus)(struct pci_bus *bus, unsigned int devfn, int where); |
578 | int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val); |
578 | int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val); |
579 | int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val); |
579 | int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val); |
580 | }; |
580 | }; |
581 | 581 | ||
582 | /* |
582 | /* |
583 | * ACPI needs to be able to access PCI config space before we've done a |
583 | * ACPI needs to be able to access PCI config space before we've done a |
584 | * PCI bus scan and created pci_bus structures. |
584 | * PCI bus scan and created pci_bus structures. |
585 | */ |
585 | */ |
586 | int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn, |
586 | int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn, |
587 | int reg, int len, u32 *val); |
587 | int reg, int len, u32 *val); |
588 | int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn, |
588 | int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn, |
589 | int reg, int len, u32 val); |
589 | int reg, int len, u32 val); |
590 | 590 | ||
591 | #ifdef CONFIG_PCI_BUS_ADDR_T_64BIT |
591 | #ifdef CONFIG_PCI_BUS_ADDR_T_64BIT |
592 | typedef u64 pci_bus_addr_t; |
592 | typedef u64 pci_bus_addr_t; |
593 | #else |
593 | #else |
594 | typedef u32 pci_bus_addr_t; |
594 | typedef u32 pci_bus_addr_t; |
595 | #endif |
595 | #endif |
596 | 596 | ||
597 | struct pci_bus_region { |
597 | struct pci_bus_region { |
598 | pci_bus_addr_t start; |
598 | pci_bus_addr_t start; |
599 | pci_bus_addr_t end; |
599 | pci_bus_addr_t end; |
600 | }; |
600 | }; |
601 | 601 | ||
602 | struct pci_dynids { |
602 | struct pci_dynids { |
603 | spinlock_t lock; /* protects list, index */ |
603 | spinlock_t lock; /* protects list, index */ |
604 | struct list_head list; /* for IDs added at runtime */ |
604 | struct list_head list; /* for IDs added at runtime */ |
605 | }; |
605 | }; |
606 | 606 | ||
607 | 607 | ||
608 | /* |
608 | /* |
609 | * PCI Error Recovery System (PCI-ERS). If a PCI device driver provides |
609 | * PCI Error Recovery System (PCI-ERS). If a PCI device driver provides |
610 | * a set of callbacks in struct pci_error_handlers, that device driver |
610 | * a set of callbacks in struct pci_error_handlers, that device driver |
611 | * will be notified of PCI bus errors, and will be driven to recovery |
611 | * will be notified of PCI bus errors, and will be driven to recovery |
612 | * when an error occurs. |
612 | * when an error occurs. |
613 | */ |
613 | */ |
614 | 614 | ||
615 | typedef unsigned int __bitwise pci_ers_result_t; |
615 | typedef unsigned int __bitwise pci_ers_result_t; |
616 | 616 | ||
617 | enum pci_ers_result { |
617 | enum pci_ers_result { |
618 | /* no result/none/not supported in device driver */ |
618 | /* no result/none/not supported in device driver */ |
619 | PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1, |
619 | PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1, |
620 | 620 | ||
621 | /* Device driver can recover without slot reset */ |
621 | /* Device driver can recover without slot reset */ |
622 | PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2, |
622 | PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2, |
623 | 623 | ||
624 | /* Device driver wants slot to be reset. */ |
624 | /* Device driver wants slot to be reset. */ |
625 | PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3, |
625 | PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3, |
626 | 626 | ||
627 | /* Device has completely failed, is unrecoverable */ |
627 | /* Device has completely failed, is unrecoverable */ |
628 | PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4, |
628 | PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4, |
629 | 629 | ||
630 | /* Device driver is fully recovered and operational */ |
630 | /* Device driver is fully recovered and operational */ |
631 | PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5, |
631 | PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5, |
632 | 632 | ||
633 | /* No AER capabilities registered for the driver */ |
633 | /* No AER capabilities registered for the driver */ |
634 | PCI_ERS_RESULT_NO_AER_DRIVER = (__force pci_ers_result_t) 6, |
634 | PCI_ERS_RESULT_NO_AER_DRIVER = (__force pci_ers_result_t) 6, |
635 | }; |
635 | }; |
636 | 636 | ||
637 | /* PCI bus error event callbacks */ |
637 | /* PCI bus error event callbacks */ |
638 | struct pci_error_handlers { |
638 | struct pci_error_handlers { |
639 | /* PCI bus error detected on this device */ |
639 | /* PCI bus error detected on this device */ |
640 | pci_ers_result_t (*error_detected)(struct pci_dev *dev, |
640 | pci_ers_result_t (*error_detected)(struct pci_dev *dev, |
641 | enum pci_channel_state error); |
641 | enum pci_channel_state error); |
642 | 642 | ||
643 | /* MMIO has been re-enabled, but not DMA */ |
643 | /* MMIO has been re-enabled, but not DMA */ |
644 | pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev); |
644 | pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev); |
645 | 645 | ||
646 | /* PCI Express link has been reset */ |
646 | /* PCI Express link has been reset */ |
647 | pci_ers_result_t (*link_reset)(struct pci_dev *dev); |
647 | pci_ers_result_t (*link_reset)(struct pci_dev *dev); |
648 | 648 | ||
649 | /* PCI slot has been reset */ |
649 | /* PCI slot has been reset */ |
650 | pci_ers_result_t (*slot_reset)(struct pci_dev *dev); |
650 | pci_ers_result_t (*slot_reset)(struct pci_dev *dev); |
651 | 651 | ||
652 | /* PCI function reset prepare or completed */ |
652 | /* PCI function reset prepare or completed */ |
653 | void (*reset_notify)(struct pci_dev *dev, bool prepare); |
653 | void (*reset_notify)(struct pci_dev *dev, bool prepare); |
654 | 654 | ||
655 | /* Device driver may resume normal operations */ |
655 | /* Device driver may resume normal operations */ |
656 | void (*resume)(struct pci_dev *dev); |
656 | void (*resume)(struct pci_dev *dev); |
657 | }; |
657 | }; |
658 | 658 | ||
659 | 659 | ||
660 | struct module; |
660 | struct module; |
661 | struct pci_driver { |
661 | struct pci_driver { |
662 | struct list_head node; |
662 | struct list_head node; |
663 | const char *name; |
663 | const char *name; |
664 | const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */ |
664 | const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */ |
665 | int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */ |
665 | int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */ |
666 | void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */ |
666 | void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */ |
667 | int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */ |
667 | int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */ |
668 | int (*suspend_late) (struct pci_dev *dev, pm_message_t state); |
668 | int (*suspend_late) (struct pci_dev *dev, pm_message_t state); |
669 | int (*resume_early) (struct pci_dev *dev); |
669 | int (*resume_early) (struct pci_dev *dev); |
670 | int (*resume) (struct pci_dev *dev); /* Device woken up */ |
670 | int (*resume) (struct pci_dev *dev); /* Device woken up */ |
671 | void (*shutdown) (struct pci_dev *dev); |
671 | void (*shutdown) (struct pci_dev *dev); |
672 | int (*sriov_configure) (struct pci_dev *dev, int num_vfs); /* PF pdev */ |
672 | int (*sriov_configure) (struct pci_dev *dev, int num_vfs); /* PF pdev */ |
673 | const struct pci_error_handlers *err_handler; |
673 | const struct pci_error_handlers *err_handler; |
674 | struct device_driver driver; |
674 | struct device_driver driver; |
675 | struct pci_dynids dynids; |
675 | struct pci_dynids dynids; |
676 | }; |
676 | }; |
677 | 677 | ||
678 | #define to_pci_driver(drv) container_of(drv, struct pci_driver, driver) |
678 | #define to_pci_driver(drv) container_of(drv, struct pci_driver, driver) |
679 | 679 | ||
680 | /** |
680 | /** |
681 | * DEFINE_PCI_DEVICE_TABLE - macro used to describe a pci device table |
681 | * DEFINE_PCI_DEVICE_TABLE - macro used to describe a pci device table |
682 | * @_table: device table name |
682 | * @_table: device table name |
683 | * |
683 | * |
684 | * This macro is deprecated and should not be used in new code. |
684 | * This macro is deprecated and should not be used in new code. |
685 | */ |
685 | */ |
686 | #define DEFINE_PCI_DEVICE_TABLE(_table) \ |
686 | #define DEFINE_PCI_DEVICE_TABLE(_table) \ |
687 | const struct pci_device_id _table[] |
687 | const struct pci_device_id _table[] |
688 | 688 | ||
689 | /** |
689 | /** |
690 | * PCI_DEVICE - macro used to describe a specific pci device |
690 | * PCI_DEVICE - macro used to describe a specific pci device |
691 | * @vend: the 16 bit PCI Vendor ID |
691 | * @vend: the 16 bit PCI Vendor ID |
692 | * @dev: the 16 bit PCI Device ID |
692 | * @dev: the 16 bit PCI Device ID |
693 | * |
693 | * |
694 | * This macro is used to create a struct pci_device_id that matches a |
694 | * This macro is used to create a struct pci_device_id that matches a |
695 | * specific device. The subvendor and subdevice fields will be set to |
695 | * specific device. The subvendor and subdevice fields will be set to |
696 | * PCI_ANY_ID. |
696 | * PCI_ANY_ID. |
697 | */ |
697 | */ |
698 | #define PCI_DEVICE(vend,dev) \ |
698 | #define PCI_DEVICE(vend,dev) \ |
699 | .vendor = (vend), .device = (dev), \ |
699 | .vendor = (vend), .device = (dev), \ |
700 | .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID |
700 | .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID |
701 | 701 | ||
702 | /** |
702 | /** |
703 | * PCI_DEVICE_SUB - macro used to describe a specific pci device with subsystem |
703 | * PCI_DEVICE_SUB - macro used to describe a specific pci device with subsystem |
704 | * @vend: the 16 bit PCI Vendor ID |
704 | * @vend: the 16 bit PCI Vendor ID |
705 | * @dev: the 16 bit PCI Device ID |
705 | * @dev: the 16 bit PCI Device ID |
706 | * @subvend: the 16 bit PCI Subvendor ID |
706 | * @subvend: the 16 bit PCI Subvendor ID |
707 | * @subdev: the 16 bit PCI Subdevice ID |
707 | * @subdev: the 16 bit PCI Subdevice ID |
708 | * |
708 | * |
709 | * This macro is used to create a struct pci_device_id that matches a |
709 | * This macro is used to create a struct pci_device_id that matches a |
710 | * specific device with subsystem information. |
710 | * specific device with subsystem information. |
711 | */ |
711 | */ |
712 | #define PCI_DEVICE_SUB(vend, dev, subvend, subdev) \ |
712 | #define PCI_DEVICE_SUB(vend, dev, subvend, subdev) \ |
713 | .vendor = (vend), .device = (dev), \ |
713 | .vendor = (vend), .device = (dev), \ |
714 | .subvendor = (subvend), .subdevice = (subdev) |
714 | .subvendor = (subvend), .subdevice = (subdev) |
715 | 715 | ||
716 | /** |
716 | /** |
717 | * PCI_DEVICE_CLASS - macro used to describe a specific pci device class |
717 | * PCI_DEVICE_CLASS - macro used to describe a specific pci device class |
718 | * @dev_class: the class, subclass, prog-if triple for this device |
718 | * @dev_class: the class, subclass, prog-if triple for this device |
719 | * @dev_class_mask: the class mask for this device |
719 | * @dev_class_mask: the class mask for this device |
720 | * |
720 | * |
721 | * This macro is used to create a struct pci_device_id that matches a |
721 | * This macro is used to create a struct pci_device_id that matches a |
722 | * specific PCI class. The vendor, device, subvendor, and subdevice |
722 | * specific PCI class. The vendor, device, subvendor, and subdevice |
723 | * fields will be set to PCI_ANY_ID. |
723 | * fields will be set to PCI_ANY_ID. |
724 | */ |
724 | */ |
725 | #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \ |
725 | #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \ |
726 | .class = (dev_class), .class_mask = (dev_class_mask), \ |
726 | .class = (dev_class), .class_mask = (dev_class_mask), \ |
727 | .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \ |
727 | .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \ |
728 | .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID |
728 | .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID |
729 | 729 | ||
730 | /** |
730 | /** |
731 | * PCI_VDEVICE - macro used to describe a specific pci device in short form |
731 | * PCI_VDEVICE - macro used to describe a specific pci device in short form |
732 | * @vend: the vendor name |
732 | * @vend: the vendor name |
733 | * @dev: the 16 bit PCI Device ID |
733 | * @dev: the 16 bit PCI Device ID |
734 | * |
734 | * |
735 | * This macro is used to create a struct pci_device_id that matches a |
735 | * This macro is used to create a struct pci_device_id that matches a |
736 | * specific PCI device. The subvendor, and subdevice fields will be set |
736 | * specific PCI device. The subvendor, and subdevice fields will be set |
737 | * to PCI_ANY_ID. The macro allows the next field to follow as the device |
737 | * to PCI_ANY_ID. The macro allows the next field to follow as the device |
738 | * private data. |
738 | * private data. |
739 | */ |
739 | */ |
740 | 740 | ||
741 | #define PCI_VDEVICE(vend, dev) \ |
741 | #define PCI_VDEVICE(vend, dev) \ |
742 | .vendor = PCI_VENDOR_ID_##vend, .device = (dev), \ |
742 | .vendor = PCI_VENDOR_ID_##vend, .device = (dev), \ |
743 | .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, 0, 0 |
743 | .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, 0, 0 |
744 | 744 | ||
745 | /* these external functions are only available when PCI support is enabled */ |
745 | /* these external functions are only available when PCI support is enabled */ |
746 | #ifdef CONFIG_PCI |
746 | #ifdef CONFIG_PCI |
747 | 747 | ||
748 | void pcie_bus_configure_settings(struct pci_bus *bus); |
748 | void pcie_bus_configure_settings(struct pci_bus *bus); |
749 | 749 | ||
750 | enum pcie_bus_config_types { |
750 | enum pcie_bus_config_types { |
751 | PCIE_BUS_TUNE_OFF, /* don't touch MPS at all */ |
751 | PCIE_BUS_TUNE_OFF, /* don't touch MPS at all */ |
752 | PCIE_BUS_DEFAULT, /* ensure MPS matches upstream bridge */ |
752 | PCIE_BUS_DEFAULT, /* ensure MPS matches upstream bridge */ |
753 | PCIE_BUS_SAFE, /* use largest MPS boot-time devices support */ |
753 | PCIE_BUS_SAFE, /* use largest MPS boot-time devices support */ |
754 | PCIE_BUS_PERFORMANCE, /* use MPS and MRRS for best performance */ |
754 | PCIE_BUS_PERFORMANCE, /* use MPS and MRRS for best performance */ |
755 | PCIE_BUS_PEER2PEER, /* set MPS = 128 for all devices */ |
755 | PCIE_BUS_PEER2PEER, /* set MPS = 128 for all devices */ |
756 | }; |
756 | }; |
757 | 757 | ||
758 | extern enum pcie_bus_config_types pcie_bus_config; |
758 | extern enum pcie_bus_config_types pcie_bus_config; |
759 | 759 | ||
760 | extern struct bus_type pci_bus_type; |
760 | extern struct bus_type pci_bus_type; |
761 | 761 | ||
762 | /* Do NOT directly access these two variables, unless you are arch-specific PCI |
762 | /* Do NOT directly access these two variables, unless you are arch-specific PCI |
763 | * code, or PCI core code. */ |
763 | * code, or PCI core code. */ |
764 | extern struct list_head pci_root_buses; /* list of all known PCI buses */ |
764 | extern struct list_head pci_root_buses; /* list of all known PCI buses */ |
765 | /* Some device drivers need know if PCI is initiated */ |
765 | /* Some device drivers need know if PCI is initiated */ |
766 | int no_pci_devices(void); |
766 | int no_pci_devices(void); |
767 | 767 | ||
768 | void pcibios_resource_survey_bus(struct pci_bus *bus); |
768 | void pcibios_resource_survey_bus(struct pci_bus *bus); |
769 | void pcibios_add_bus(struct pci_bus *bus); |
769 | void pcibios_add_bus(struct pci_bus *bus); |
770 | void pcibios_remove_bus(struct pci_bus *bus); |
770 | void pcibios_remove_bus(struct pci_bus *bus); |
771 | void pcibios_fixup_bus(struct pci_bus *); |
771 | void pcibios_fixup_bus(struct pci_bus *); |
772 | int __must_check pcibios_enable_device(struct pci_dev *, int mask); |
772 | int __must_check pcibios_enable_device(struct pci_dev *, int mask); |
773 | /* Architecture-specific versions may override this (weak) */ |
773 | /* Architecture-specific versions may override this (weak) */ |
774 | char *pcibios_setup(char *str); |
774 | char *pcibios_setup(char *str); |
775 | 775 | ||
776 | /* Used only when drivers/pci/setup.c is used */ |
776 | /* Used only when drivers/pci/setup.c is used */ |
777 | resource_size_t pcibios_align_resource(void *, const struct resource *, |
777 | resource_size_t pcibios_align_resource(void *, const struct resource *, |
778 | resource_size_t, |
778 | resource_size_t, |
779 | resource_size_t); |
779 | resource_size_t); |
780 | void pcibios_update_irq(struct pci_dev *, int irq); |
780 | void pcibios_update_irq(struct pci_dev *, int irq); |
781 | 781 | ||
782 | /* Weak but can be overriden by arch */ |
782 | /* Weak but can be overriden by arch */ |
783 | void pci_fixup_cardbus(struct pci_bus *); |
783 | void pci_fixup_cardbus(struct pci_bus *); |
784 | 784 | ||
785 | /* Generic PCI functions used internally */ |
785 | /* Generic PCI functions used internally */ |
786 | 786 | ||
787 | void pcibios_resource_to_bus(struct pci_bus *bus, struct pci_bus_region *region, |
787 | void pcibios_resource_to_bus(struct pci_bus *bus, struct pci_bus_region *region, |
788 | struct resource *res); |
788 | struct resource *res); |
789 | void pcibios_bus_to_resource(struct pci_bus *bus, struct resource *res, |
789 | void pcibios_bus_to_resource(struct pci_bus *bus, struct resource *res, |
790 | struct pci_bus_region *region); |
790 | struct pci_bus_region *region); |
791 | void pcibios_scan_specific_bus(int busn); |
791 | void pcibios_scan_specific_bus(int busn); |
792 | struct pci_bus *pci_find_bus(int domain, int busnr); |
792 | struct pci_bus *pci_find_bus(int domain, int busnr); |
793 | void pci_bus_add_devices(const struct pci_bus *bus); |
793 | void pci_bus_add_devices(const struct pci_bus *bus); |
794 | struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata); |
794 | struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata); |
795 | struct pci_bus *pci_create_root_bus(struct device *parent, int bus, |
795 | struct pci_bus *pci_create_root_bus(struct device *parent, int bus, |
796 | struct pci_ops *ops, void *sysdata, |
796 | struct pci_ops *ops, void *sysdata, |
797 | struct list_head *resources); |
797 | struct list_head *resources); |
798 | int pci_bus_insert_busn_res(struct pci_bus *b, int bus, int busmax); |
798 | int pci_bus_insert_busn_res(struct pci_bus *b, int bus, int busmax); |
799 | int pci_bus_update_busn_res_end(struct pci_bus *b, int busmax); |
799 | int pci_bus_update_busn_res_end(struct pci_bus *b, int busmax); |
800 | void pci_bus_release_busn_res(struct pci_bus *b); |
800 | void pci_bus_release_busn_res(struct pci_bus *b); |
801 | struct pci_bus *pci_scan_root_bus_msi(struct device *parent, int bus, |
801 | struct pci_bus *pci_scan_root_bus_msi(struct device *parent, int bus, |
802 | struct pci_ops *ops, void *sysdata, |
802 | struct pci_ops *ops, void *sysdata, |
803 | struct list_head *resources, |
803 | struct list_head *resources, |
804 | struct msi_controller *msi); |
804 | struct msi_controller *msi); |
805 | struct pci_bus *pci_scan_root_bus(struct device *parent, int bus, |
805 | struct pci_bus *pci_scan_root_bus(struct device *parent, int bus, |
806 | struct pci_ops *ops, void *sysdata, |
806 | struct pci_ops *ops, void *sysdata, |
807 | struct list_head *resources); |
807 | struct list_head *resources); |
808 | struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, |
808 | struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, |
809 | int busnr); |
809 | int busnr); |
810 | void pcie_update_link_speed(struct pci_bus *bus, u16 link_status); |
810 | void pcie_update_link_speed(struct pci_bus *bus, u16 link_status); |
811 | struct pci_slot *pci_create_slot(struct pci_bus *parent, int slot_nr, |
811 | struct pci_slot *pci_create_slot(struct pci_bus *parent, int slot_nr, |
812 | const char *name, |
812 | const char *name, |
813 | struct hotplug_slot *hotplug); |
813 | struct hotplug_slot *hotplug); |
814 | void pci_destroy_slot(struct pci_slot *slot); |
814 | void pci_destroy_slot(struct pci_slot *slot); |
815 | #ifdef CONFIG_SYSFS |
815 | #ifdef CONFIG_SYSFS |
816 | void pci_dev_assign_slot(struct pci_dev *dev); |
816 | void pci_dev_assign_slot(struct pci_dev *dev); |
817 | #else |
817 | #else |
818 | static inline void pci_dev_assign_slot(struct pci_dev *dev) { } |
818 | static inline void pci_dev_assign_slot(struct pci_dev *dev) { } |
819 | #endif |
819 | #endif |
820 | int pci_scan_slot(struct pci_bus *bus, int devfn); |
820 | int pci_scan_slot(struct pci_bus *bus, int devfn); |
821 | struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn); |
821 | struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn); |
822 | void pci_device_add(struct pci_dev *dev, struct pci_bus *bus); |
822 | void pci_device_add(struct pci_dev *dev, struct pci_bus *bus); |
823 | unsigned int pci_scan_child_bus(struct pci_bus *bus); |
823 | unsigned int pci_scan_child_bus(struct pci_bus *bus); |
824 | void pci_bus_add_device(struct pci_dev *dev); |
824 | void pci_bus_add_device(struct pci_dev *dev); |
825 | void pci_read_bridge_bases(struct pci_bus *child); |
825 | void pci_read_bridge_bases(struct pci_bus *child); |
826 | struct resource *pci_find_parent_resource(const struct pci_dev *dev, |
826 | struct resource *pci_find_parent_resource(const struct pci_dev *dev, |
827 | struct resource *res); |
827 | struct resource *res); |
828 | struct pci_dev *pci_find_pcie_root_port(struct pci_dev *dev); |
828 | struct pci_dev *pci_find_pcie_root_port(struct pci_dev *dev); |
829 | u8 pci_swizzle_interrupt_pin(const struct pci_dev *dev, u8 pin); |
829 | u8 pci_swizzle_interrupt_pin(const struct pci_dev *dev, u8 pin); |
830 | int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge); |
830 | int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge); |
831 | u8 pci_common_swizzle(struct pci_dev *dev, u8 *pinp); |
831 | u8 pci_common_swizzle(struct pci_dev *dev, u8 *pinp); |
832 | struct pci_dev *pci_dev_get(struct pci_dev *dev); |
832 | struct pci_dev *pci_dev_get(struct pci_dev *dev); |
833 | void pci_dev_put(struct pci_dev *dev); |
833 | void pci_dev_put(struct pci_dev *dev); |
834 | void pci_remove_bus(struct pci_bus *b); |
834 | void pci_remove_bus(struct pci_bus *b); |
835 | void pci_stop_and_remove_bus_device(struct pci_dev *dev); |
835 | void pci_stop_and_remove_bus_device(struct pci_dev *dev); |
836 | void pci_stop_and_remove_bus_device_locked(struct pci_dev *dev); |
836 | void pci_stop_and_remove_bus_device_locked(struct pci_dev *dev); |
837 | void pci_stop_root_bus(struct pci_bus *bus); |
837 | void pci_stop_root_bus(struct pci_bus *bus); |
838 | void pci_remove_root_bus(struct pci_bus *bus); |
838 | void pci_remove_root_bus(struct pci_bus *bus); |
839 | void pci_setup_cardbus(struct pci_bus *bus); |
839 | void pci_setup_cardbus(struct pci_bus *bus); |
840 | void pci_sort_breadthfirst(void); |
840 | void pci_sort_breadthfirst(void); |
841 | #define dev_is_pci(d) ((d)->bus == &pci_bus_type) |
841 | #define dev_is_pci(d) ((d)->bus == &pci_bus_type) |
842 | #define dev_is_pf(d) ((dev_is_pci(d) ? to_pci_dev(d)->is_physfn : false)) |
842 | #define dev_is_pf(d) ((dev_is_pci(d) ? to_pci_dev(d)->is_physfn : false)) |
843 | #define dev_num_vf(d) ((dev_is_pci(d) ? pci_num_vf(to_pci_dev(d)) : 0)) |
843 | #define dev_num_vf(d) ((dev_is_pci(d) ? pci_num_vf(to_pci_dev(d)) : 0)) |
844 | 844 | ||
845 | /* Generic PCI functions exported to card drivers */ |
845 | /* Generic PCI functions exported to card drivers */ |
846 | 846 | ||
847 | enum pci_lost_interrupt_reason { |
847 | enum pci_lost_interrupt_reason { |
848 | PCI_LOST_IRQ_NO_INFORMATION = 0, |
848 | PCI_LOST_IRQ_NO_INFORMATION = 0, |
849 | PCI_LOST_IRQ_DISABLE_MSI, |
849 | PCI_LOST_IRQ_DISABLE_MSI, |
850 | PCI_LOST_IRQ_DISABLE_MSIX, |
850 | PCI_LOST_IRQ_DISABLE_MSIX, |
851 | PCI_LOST_IRQ_DISABLE_ACPI, |
851 | PCI_LOST_IRQ_DISABLE_ACPI, |
852 | }; |
852 | }; |
853 | enum pci_lost_interrupt_reason pci_lost_interrupt(struct pci_dev *dev); |
853 | enum pci_lost_interrupt_reason pci_lost_interrupt(struct pci_dev *dev); |
854 | int pci_find_capability(struct pci_dev *dev, int cap); |
854 | int pci_find_capability(struct pci_dev *dev, int cap); |
855 | int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap); |
855 | int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap); |
856 | int pci_find_ext_capability(struct pci_dev *dev, int cap); |
856 | int pci_find_ext_capability(struct pci_dev *dev, int cap); |
857 | int pci_find_next_ext_capability(struct pci_dev *dev, int pos, int cap); |
857 | int pci_find_next_ext_capability(struct pci_dev *dev, int pos, int cap); |
858 | int pci_find_ht_capability(struct pci_dev *dev, int ht_cap); |
858 | int pci_find_ht_capability(struct pci_dev *dev, int ht_cap); |
859 | int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap); |
859 | int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap); |
860 | struct pci_bus *pci_find_next_bus(const struct pci_bus *from); |
860 | struct pci_bus *pci_find_next_bus(const struct pci_bus *from); |
861 | 861 | ||
862 | struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device, |
862 | struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device, |
863 | struct pci_dev *from); |
863 | struct pci_dev *from); |
864 | struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device, |
864 | struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device, |
865 | unsigned int ss_vendor, unsigned int ss_device, |
865 | unsigned int ss_vendor, unsigned int ss_device, |
866 | struct pci_dev *from); |
866 | struct pci_dev *from); |
867 | struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn); |
867 | struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn); |
868 | struct pci_dev *pci_get_domain_bus_and_slot(int domain, unsigned int bus, |
868 | struct pci_dev *pci_get_domain_bus_and_slot(int domain, unsigned int bus, |
869 | unsigned int devfn); |
869 | unsigned int devfn); |
870 | static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus, |
870 | static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus, |
871 | unsigned int devfn) |
871 | unsigned int devfn) |
872 | { |
872 | { |
873 | return pci_get_domain_bus_and_slot(0, bus, devfn); |
873 | return pci_get_domain_bus_and_slot(0, bus, devfn); |
874 | } |
874 | } |
875 | struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from); |
875 | struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from); |
876 | int pci_dev_present(const struct pci_device_id *ids); |
876 | int pci_dev_present(const struct pci_device_id *ids); |
877 | 877 | ||
878 | int pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn, |
878 | int pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn, |
879 | int where, u8 *val); |
879 | int where, u8 *val); |
880 | int pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn, |
880 | int pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn, |
881 | int where, u16 *val); |
881 | int where, u16 *val); |
882 | int pci_bus_read_config_dword(struct pci_bus *bus, unsigned int devfn, |
882 | int pci_bus_read_config_dword(struct pci_bus *bus, unsigned int devfn, |
883 | int where, u32 *val); |
883 | int where, u32 *val); |
884 | int pci_bus_write_config_byte(struct pci_bus *bus, unsigned int devfn, |
884 | int pci_bus_write_config_byte(struct pci_bus *bus, unsigned int devfn, |
885 | int where, u8 val); |
885 | int where, u8 val); |
886 | int pci_bus_write_config_word(struct pci_bus *bus, unsigned int devfn, |
886 | int pci_bus_write_config_word(struct pci_bus *bus, unsigned int devfn, |
887 | int where, u16 val); |
887 | int where, u16 val); |
888 | int pci_bus_write_config_dword(struct pci_bus *bus, unsigned int devfn, |
888 | int pci_bus_write_config_dword(struct pci_bus *bus, unsigned int devfn, |
889 | int where, u32 val); |
889 | int where, u32 val); |
890 | 890 | ||
891 | int pci_generic_config_read(struct pci_bus *bus, unsigned int devfn, |
891 | int pci_generic_config_read(struct pci_bus *bus, unsigned int devfn, |
892 | int where, int size, u32 *val); |
892 | int where, int size, u32 *val); |
893 | int pci_generic_config_write(struct pci_bus *bus, unsigned int devfn, |
893 | int pci_generic_config_write(struct pci_bus *bus, unsigned int devfn, |
894 | int where, int size, u32 val); |
894 | int where, int size, u32 val); |
895 | int pci_generic_config_read32(struct pci_bus *bus, unsigned int devfn, |
895 | int pci_generic_config_read32(struct pci_bus *bus, unsigned int devfn, |
896 | int where, int size, u32 *val); |
896 | int where, int size, u32 *val); |
897 | int pci_generic_config_write32(struct pci_bus *bus, unsigned int devfn, |
897 | int pci_generic_config_write32(struct pci_bus *bus, unsigned int devfn, |
898 | int where, int size, u32 val); |
898 | int where, int size, u32 val); |
899 | 899 | ||
900 | struct pci_ops *pci_bus_set_ops(struct pci_bus *bus, struct pci_ops *ops); |
900 | struct pci_ops *pci_bus_set_ops(struct pci_bus *bus, struct pci_ops *ops); |
901 | 901 | ||
902 | static inline int pci_read_config_byte(const struct pci_dev *dev, int where, u8 *val) |
902 | static inline int pci_read_config_byte(const struct pci_dev *dev, int where, u8 *val) |
903 | { |
903 | { |
904 | *val = PciRead8(dev->busnr, dev->devfn, where); |
904 | *val = PciRead8(dev->busnr, dev->devfn, where); |
905 | return 1; |
905 | return 1; |
906 | } |
906 | } |
907 | static inline int pci_read_config_word(const struct pci_dev *dev, int where, u16 *val) |
907 | static inline int pci_read_config_word(const struct pci_dev *dev, int where, u16 *val) |
908 | { |
908 | { |
909 | *val = PciRead16(dev->busnr, dev->devfn, where); |
909 | *val = PciRead16(dev->busnr, dev->devfn, where); |
910 | return 1; |
910 | return 1; |
911 | } |
911 | } |
912 | static inline int pci_read_config_dword(const struct pci_dev *dev, int where, |
912 | static inline int pci_read_config_dword(const struct pci_dev *dev, int where, |
913 | u32 *val) |
913 | u32 *val) |
914 | { |
914 | { |
915 | *val = PciRead32(dev->busnr, dev->devfn, where); |
915 | *val = PciRead32(dev->busnr, dev->devfn, where); |
916 | return 1; |
916 | return 1; |
917 | } |
917 | } |
918 | static inline int pci_write_config_byte(const struct pci_dev *dev, int where, u8 val) |
918 | static inline int pci_write_config_byte(const struct pci_dev *dev, int where, u8 val) |
919 | { |
919 | { |
920 | PciWrite8(dev->busnr, dev->devfn, where, val); |
920 | PciWrite8(dev->busnr, dev->devfn, where, val); |
921 | return 1; |
921 | return 1; |
922 | } |
922 | } |
923 | static inline int pci_write_config_word(const struct pci_dev *dev, int where, u16 val) |
923 | static inline int pci_write_config_word(const struct pci_dev *dev, int where, u16 val) |
924 | { |
924 | { |
925 | PciWrite16(dev->busnr, dev->devfn, where, val); |
925 | PciWrite16(dev->busnr, dev->devfn, where, val); |
926 | return 1; |
926 | return 1; |
927 | } |
927 | } |
928 | static inline int pci_write_config_dword(const struct pci_dev *dev, int where, |
928 | static inline int pci_write_config_dword(const struct pci_dev *dev, int where, |
929 | u32 val) |
929 | u32 val) |
930 | { |
930 | { |
931 | PciWrite32(dev->busnr, dev->devfn, where, val); |
931 | PciWrite32(dev->busnr, dev->devfn, where, val); |
932 | return 1; |
932 | return 1; |
933 | } |
933 | } |
934 | 934 | ||
935 | int pcie_capability_read_word(struct pci_dev *dev, int pos, u16 *val); |
935 | int pcie_capability_read_word(struct pci_dev *dev, int pos, u16 *val); |
936 | int pcie_capability_read_dword(struct pci_dev *dev, int pos, u32 *val); |
936 | int pcie_capability_read_dword(struct pci_dev *dev, int pos, u32 *val); |
937 | int pcie_capability_write_word(struct pci_dev *dev, int pos, u16 val); |
937 | int pcie_capability_write_word(struct pci_dev *dev, int pos, u16 val); |
938 | int pcie_capability_write_dword(struct pci_dev *dev, int pos, u32 val); |
938 | int pcie_capability_write_dword(struct pci_dev *dev, int pos, u32 val); |
939 | int pcie_capability_clear_and_set_word(struct pci_dev *dev, int pos, |
939 | int pcie_capability_clear_and_set_word(struct pci_dev *dev, int pos, |
940 | u16 clear, u16 set); |
940 | u16 clear, u16 set); |
941 | int pcie_capability_clear_and_set_dword(struct pci_dev *dev, int pos, |
941 | int pcie_capability_clear_and_set_dword(struct pci_dev *dev, int pos, |
942 | u32 clear, u32 set); |
942 | u32 clear, u32 set); |
943 | 943 | ||
944 | static inline int pcie_capability_set_word(struct pci_dev *dev, int pos, |
944 | static inline int pcie_capability_set_word(struct pci_dev *dev, int pos, |
945 | u16 set) |
945 | u16 set) |
946 | { |
946 | { |
947 | return pcie_capability_clear_and_set_word(dev, pos, 0, set); |
947 | return pcie_capability_clear_and_set_word(dev, pos, 0, set); |
948 | } |
948 | } |
949 | 949 | ||
950 | static inline int pcie_capability_set_dword(struct pci_dev *dev, int pos, |
950 | static inline int pcie_capability_set_dword(struct pci_dev *dev, int pos, |
951 | u32 set) |
951 | u32 set) |
952 | { |
952 | { |
953 | return pcie_capability_clear_and_set_dword(dev, pos, 0, set); |
953 | return pcie_capability_clear_and_set_dword(dev, pos, 0, set); |
954 | } |
954 | } |
955 | 955 | ||
956 | static inline int pcie_capability_clear_word(struct pci_dev *dev, int pos, |
956 | static inline int pcie_capability_clear_word(struct pci_dev *dev, int pos, |
957 | u16 clear) |
957 | u16 clear) |
958 | { |
958 | { |
959 | return pcie_capability_clear_and_set_word(dev, pos, clear, 0); |
959 | return pcie_capability_clear_and_set_word(dev, pos, clear, 0); |
960 | } |
960 | } |
961 | 961 | ||
962 | static inline int pcie_capability_clear_dword(struct pci_dev *dev, int pos, |
962 | static inline int pcie_capability_clear_dword(struct pci_dev *dev, int pos, |
963 | u32 clear) |
963 | u32 clear) |
964 | { |
964 | { |
965 | return pcie_capability_clear_and_set_dword(dev, pos, clear, 0); |
965 | return pcie_capability_clear_and_set_dword(dev, pos, clear, 0); |
966 | } |
966 | } |
967 | 967 | ||
968 | /* user-space driven config access */ |
968 | /* user-space driven config access */ |
969 | int pci_user_read_config_byte(struct pci_dev *dev, int where, u8 *val); |
969 | int pci_user_read_config_byte(struct pci_dev *dev, int where, u8 *val); |
970 | int pci_user_read_config_word(struct pci_dev *dev, int where, u16 *val); |
970 | int pci_user_read_config_word(struct pci_dev *dev, int where, u16 *val); |
971 | int pci_user_read_config_dword(struct pci_dev *dev, int where, u32 *val); |
971 | int pci_user_read_config_dword(struct pci_dev *dev, int where, u32 *val); |
972 | int pci_user_write_config_byte(struct pci_dev *dev, int where, u8 val); |
972 | int pci_user_write_config_byte(struct pci_dev *dev, int where, u8 val); |
973 | int pci_user_write_config_word(struct pci_dev *dev, int where, u16 val); |
973 | int pci_user_write_config_word(struct pci_dev *dev, int where, u16 val); |
974 | int pci_user_write_config_dword(struct pci_dev *dev, int where, u32 val); |
974 | int pci_user_write_config_dword(struct pci_dev *dev, int where, u32 val); |
975 | 975 | ||
976 | int __must_check pci_enable_device(struct pci_dev *dev); |
976 | int __must_check pci_enable_device(struct pci_dev *dev); |
977 | int __must_check pci_enable_device_io(struct pci_dev *dev); |
977 | int __must_check pci_enable_device_io(struct pci_dev *dev); |
978 | int __must_check pci_enable_device_mem(struct pci_dev *dev); |
978 | int __must_check pci_enable_device_mem(struct pci_dev *dev); |
979 | int __must_check pci_reenable_device(struct pci_dev *); |
979 | int __must_check pci_reenable_device(struct pci_dev *); |
980 | int __must_check pcim_enable_device(struct pci_dev *pdev); |
980 | int __must_check pcim_enable_device(struct pci_dev *pdev); |
981 | void pcim_pin_device(struct pci_dev *pdev); |
981 | void pcim_pin_device(struct pci_dev *pdev); |
982 | 982 | ||
983 | static inline int pci_is_enabled(struct pci_dev *pdev) |
983 | static inline int pci_is_enabled(struct pci_dev *pdev) |
984 | { |
984 | { |
985 | return (atomic_read(&pdev->enable_cnt) > 0); |
985 | return (atomic_read(&pdev->enable_cnt) > 0); |
986 | } |
986 | } |
987 | 987 | ||
988 | static inline int pci_is_managed(struct pci_dev *pdev) |
988 | static inline int pci_is_managed(struct pci_dev *pdev) |
989 | { |
989 | { |
990 | return pdev->is_managed; |
990 | return pdev->is_managed; |
991 | } |
991 | } |
992 | - | ||
993 | static inline void pci_set_managed_irq(struct pci_dev *pdev, unsigned int irq) |
- | |
994 | { |
- | |
995 | pdev->irq = irq; |
- | |
996 | pdev->irq_managed = 1; |
- | |
997 | } |
- | |
998 | - | ||
999 | static inline void pci_reset_managed_irq(struct pci_dev *pdev) |
- | |
1000 | { |
- | |
1001 | pdev->irq = 0; |
- | |
1002 | pdev->irq_managed = 0; |
- | |
1003 | } |
- | |
1004 | - | ||
1005 | static inline bool pci_has_managed_irq(struct pci_dev *pdev) |
- | |
1006 | { |
- | |
1007 | return pdev->irq_managed && pdev->irq > 0; |
- | |
1008 | } |
- | |
1009 | 992 | ||
1010 | void pci_disable_device(struct pci_dev *dev); |
993 | void pci_disable_device(struct pci_dev *dev); |
1011 | 994 | ||
1012 | extern unsigned int pcibios_max_latency; |
995 | extern unsigned int pcibios_max_latency; |
1013 | void pci_set_master(struct pci_dev *dev); |
996 | void pci_set_master(struct pci_dev *dev); |
1014 | void pci_clear_master(struct pci_dev *dev); |
997 | void pci_clear_master(struct pci_dev *dev); |
1015 | 998 | ||
1016 | int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state); |
999 | int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state); |
1017 | int pci_set_cacheline_size(struct pci_dev *dev); |
1000 | int pci_set_cacheline_size(struct pci_dev *dev); |
1018 | #define HAVE_PCI_SET_MWI |
1001 | #define HAVE_PCI_SET_MWI |
1019 | int __must_check pci_set_mwi(struct pci_dev *dev); |
1002 | int __must_check pci_set_mwi(struct pci_dev *dev); |
1020 | int pci_try_set_mwi(struct pci_dev *dev); |
1003 | int pci_try_set_mwi(struct pci_dev *dev); |
1021 | void pci_clear_mwi(struct pci_dev *dev); |
1004 | void pci_clear_mwi(struct pci_dev *dev); |
1022 | void pci_intx(struct pci_dev *dev, int enable); |
1005 | void pci_intx(struct pci_dev *dev, int enable); |
1023 | bool pci_intx_mask_supported(struct pci_dev *dev); |
1006 | bool pci_intx_mask_supported(struct pci_dev *dev); |
1024 | bool pci_check_and_mask_intx(struct pci_dev *dev); |
1007 | bool pci_check_and_mask_intx(struct pci_dev *dev); |
1025 | bool pci_check_and_unmask_intx(struct pci_dev *dev); |
1008 | bool pci_check_and_unmask_intx(struct pci_dev *dev); |
1026 | int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size); |
1009 | int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size); |
1027 | int pci_set_dma_seg_boundary(struct pci_dev *dev, unsigned long mask); |
1010 | int pci_set_dma_seg_boundary(struct pci_dev *dev, unsigned long mask); |
1028 | int pci_wait_for_pending(struct pci_dev *dev, int pos, u16 mask); |
1011 | int pci_wait_for_pending(struct pci_dev *dev, int pos, u16 mask); |
1029 | int pci_wait_for_pending_transaction(struct pci_dev *dev); |
1012 | int pci_wait_for_pending_transaction(struct pci_dev *dev); |
1030 | int pcix_get_max_mmrbc(struct pci_dev *dev); |
1013 | int pcix_get_max_mmrbc(struct pci_dev *dev); |
1031 | int pcix_get_mmrbc(struct pci_dev *dev); |
1014 | int pcix_get_mmrbc(struct pci_dev *dev); |
1032 | int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc); |
1015 | int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc); |
1033 | int pcie_get_readrq(struct pci_dev *dev); |
1016 | int pcie_get_readrq(struct pci_dev *dev); |
1034 | int pcie_set_readrq(struct pci_dev *dev, int rq); |
1017 | int pcie_set_readrq(struct pci_dev *dev, int rq); |
1035 | int pcie_get_mps(struct pci_dev *dev); |
1018 | int pcie_get_mps(struct pci_dev *dev); |
1036 | int pcie_set_mps(struct pci_dev *dev, int mps); |
1019 | int pcie_set_mps(struct pci_dev *dev, int mps); |
1037 | int pcie_get_minimum_link(struct pci_dev *dev, enum pci_bus_speed *speed, |
1020 | int pcie_get_minimum_link(struct pci_dev *dev, enum pci_bus_speed *speed, |
1038 | enum pcie_link_width *width); |
1021 | enum pcie_link_width *width); |
1039 | int __pci_reset_function(struct pci_dev *dev); |
1022 | int __pci_reset_function(struct pci_dev *dev); |
1040 | int __pci_reset_function_locked(struct pci_dev *dev); |
1023 | int __pci_reset_function_locked(struct pci_dev *dev); |
1041 | int pci_reset_function(struct pci_dev *dev); |
1024 | int pci_reset_function(struct pci_dev *dev); |
1042 | int pci_try_reset_function(struct pci_dev *dev); |
1025 | int pci_try_reset_function(struct pci_dev *dev); |
1043 | int pci_probe_reset_slot(struct pci_slot *slot); |
1026 | int pci_probe_reset_slot(struct pci_slot *slot); |
1044 | int pci_reset_slot(struct pci_slot *slot); |
1027 | int pci_reset_slot(struct pci_slot *slot); |
1045 | int pci_try_reset_slot(struct pci_slot *slot); |
1028 | int pci_try_reset_slot(struct pci_slot *slot); |
1046 | int pci_probe_reset_bus(struct pci_bus *bus); |
1029 | int pci_probe_reset_bus(struct pci_bus *bus); |
1047 | int pci_reset_bus(struct pci_bus *bus); |
1030 | int pci_reset_bus(struct pci_bus *bus); |
1048 | int pci_try_reset_bus(struct pci_bus *bus); |
1031 | int pci_try_reset_bus(struct pci_bus *bus); |
1049 | void pci_reset_secondary_bus(struct pci_dev *dev); |
1032 | void pci_reset_secondary_bus(struct pci_dev *dev); |
1050 | void pcibios_reset_secondary_bus(struct pci_dev *dev); |
1033 | void pcibios_reset_secondary_bus(struct pci_dev *dev); |
1051 | void pci_reset_bridge_secondary_bus(struct pci_dev *dev); |
1034 | void pci_reset_bridge_secondary_bus(struct pci_dev *dev); |
1052 | void pci_update_resource(struct pci_dev *dev, int resno); |
1035 | void pci_update_resource(struct pci_dev *dev, int resno); |
1053 | int __must_check pci_assign_resource(struct pci_dev *dev, int i); |
1036 | int __must_check pci_assign_resource(struct pci_dev *dev, int i); |
1054 | int __must_check pci_reassign_resource(struct pci_dev *dev, int i, resource_size_t add_size, resource_size_t align); |
1037 | int __must_check pci_reassign_resource(struct pci_dev *dev, int i, resource_size_t add_size, resource_size_t align); |
1055 | int pci_select_bars(struct pci_dev *dev, unsigned long flags); |
1038 | int pci_select_bars(struct pci_dev *dev, unsigned long flags); |
1056 | bool pci_device_is_present(struct pci_dev *pdev); |
1039 | bool pci_device_is_present(struct pci_dev *pdev); |
1057 | void pci_ignore_hotplug(struct pci_dev *dev); |
1040 | void pci_ignore_hotplug(struct pci_dev *dev); |
1058 | 1041 | ||
1059 | /* ROM control related routines */ |
1042 | /* ROM control related routines */ |
1060 | int pci_enable_rom(struct pci_dev *pdev); |
1043 | int pci_enable_rom(struct pci_dev *pdev); |
1061 | void pci_disable_rom(struct pci_dev *pdev); |
1044 | void pci_disable_rom(struct pci_dev *pdev); |
1062 | void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size); |
1045 | void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size); |
1063 | void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom); |
1046 | void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom); |
1064 | size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size); |
1047 | size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size); |
1065 | void __iomem __must_check *pci_platform_rom(struct pci_dev *pdev, size_t *size); |
1048 | void __iomem __must_check *pci_platform_rom(struct pci_dev *pdev, size_t *size); |
1066 | 1049 | ||
1067 | /* Power management related routines */ |
1050 | /* Power management related routines */ |
1068 | int pci_save_state(struct pci_dev *dev); |
1051 | int pci_save_state(struct pci_dev *dev); |
1069 | void pci_restore_state(struct pci_dev *dev); |
1052 | void pci_restore_state(struct pci_dev *dev); |
1070 | struct pci_saved_state *pci_store_saved_state(struct pci_dev *dev); |
1053 | struct pci_saved_state *pci_store_saved_state(struct pci_dev *dev); |
1071 | int pci_load_saved_state(struct pci_dev *dev, |
1054 | int pci_load_saved_state(struct pci_dev *dev, |
1072 | struct pci_saved_state *state); |
1055 | struct pci_saved_state *state); |
1073 | int pci_load_and_free_saved_state(struct pci_dev *dev, |
1056 | int pci_load_and_free_saved_state(struct pci_dev *dev, |
1074 | struct pci_saved_state **state); |
1057 | struct pci_saved_state **state); |
1075 | struct pci_cap_saved_state *pci_find_saved_cap(struct pci_dev *dev, char cap); |
1058 | struct pci_cap_saved_state *pci_find_saved_cap(struct pci_dev *dev, char cap); |
1076 | struct pci_cap_saved_state *pci_find_saved_ext_cap(struct pci_dev *dev, |
1059 | struct pci_cap_saved_state *pci_find_saved_ext_cap(struct pci_dev *dev, |
1077 | u16 cap); |
1060 | u16 cap); |
1078 | int pci_add_cap_save_buffer(struct pci_dev *dev, char cap, unsigned int size); |
1061 | int pci_add_cap_save_buffer(struct pci_dev *dev, char cap, unsigned int size); |
1079 | int pci_add_ext_cap_save_buffer(struct pci_dev *dev, |
1062 | int pci_add_ext_cap_save_buffer(struct pci_dev *dev, |
1080 | u16 cap, unsigned int size); |
1063 | u16 cap, unsigned int size); |
1081 | int __pci_complete_power_transition(struct pci_dev *dev, pci_power_t state); |
1064 | int __pci_complete_power_transition(struct pci_dev *dev, pci_power_t state); |
1082 | int pci_set_power_state(struct pci_dev *dev, pci_power_t state); |
1065 | int pci_set_power_state(struct pci_dev *dev, pci_power_t state); |
1083 | pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state); |
1066 | pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state); |
1084 | bool pci_pme_capable(struct pci_dev *dev, pci_power_t state); |
1067 | bool pci_pme_capable(struct pci_dev *dev, pci_power_t state); |
1085 | void pci_pme_active(struct pci_dev *dev, bool enable); |
1068 | void pci_pme_active(struct pci_dev *dev, bool enable); |
1086 | int __pci_enable_wake(struct pci_dev *dev, pci_power_t state, |
1069 | int __pci_enable_wake(struct pci_dev *dev, pci_power_t state, |
1087 | bool runtime, bool enable); |
1070 | bool runtime, bool enable); |
1088 | int pci_wake_from_d3(struct pci_dev *dev, bool enable); |
1071 | int pci_wake_from_d3(struct pci_dev *dev, bool enable); |
1089 | int pci_prepare_to_sleep(struct pci_dev *dev); |
1072 | int pci_prepare_to_sleep(struct pci_dev *dev); |
1090 | int pci_back_from_sleep(struct pci_dev *dev); |
1073 | int pci_back_from_sleep(struct pci_dev *dev); |
1091 | bool pci_dev_run_wake(struct pci_dev *dev); |
1074 | bool pci_dev_run_wake(struct pci_dev *dev); |
1092 | bool pci_check_pme_status(struct pci_dev *dev); |
1075 | bool pci_check_pme_status(struct pci_dev *dev); |
1093 | void pci_pme_wakeup_bus(struct pci_bus *bus); |
1076 | void pci_pme_wakeup_bus(struct pci_bus *bus); |
1094 | 1077 | ||
1095 | static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, |
1078 | static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, |
1096 | bool enable) |
1079 | bool enable) |
1097 | { |
1080 | { |
1098 | return __pci_enable_wake(dev, state, false, enable); |
1081 | return __pci_enable_wake(dev, state, false, enable); |
1099 | } |
1082 | } |
1100 | 1083 | ||
1101 | /* PCI Virtual Channel */ |
1084 | /* PCI Virtual Channel */ |
1102 | int pci_save_vc_state(struct pci_dev *dev); |
1085 | int pci_save_vc_state(struct pci_dev *dev); |
1103 | void pci_restore_vc_state(struct pci_dev *dev); |
1086 | void pci_restore_vc_state(struct pci_dev *dev); |
1104 | void pci_allocate_vc_save_buffers(struct pci_dev *dev); |
1087 | void pci_allocate_vc_save_buffers(struct pci_dev *dev); |
1105 | 1088 | ||
1106 | /* For use by arch with custom probe code */ |
1089 | /* For use by arch with custom probe code */ |
1107 | void set_pcie_port_type(struct pci_dev *pdev); |
1090 | void set_pcie_port_type(struct pci_dev *pdev); |
1108 | void set_pcie_hotplug_bridge(struct pci_dev *pdev); |
1091 | void set_pcie_hotplug_bridge(struct pci_dev *pdev); |
1109 | 1092 | ||
1110 | /* Functions for PCI Hotplug drivers to use */ |
1093 | /* Functions for PCI Hotplug drivers to use */ |
1111 | int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap); |
1094 | int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap); |
1112 | unsigned int pci_rescan_bus_bridge_resize(struct pci_dev *bridge); |
1095 | unsigned int pci_rescan_bus_bridge_resize(struct pci_dev *bridge); |
1113 | unsigned int pci_rescan_bus(struct pci_bus *bus); |
1096 | unsigned int pci_rescan_bus(struct pci_bus *bus); |
1114 | void pci_lock_rescan_remove(void); |
1097 | void pci_lock_rescan_remove(void); |
1115 | void pci_unlock_rescan_remove(void); |
1098 | void pci_unlock_rescan_remove(void); |
1116 | 1099 | ||
1117 | /* Vital product data routines */ |
1100 | /* Vital product data routines */ |
1118 | ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf); |
1101 | ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf); |
1119 | ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf); |
1102 | ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf); |
1120 | 1103 | ||
1121 | /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */ |
1104 | /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */ |
1122 | resource_size_t pcibios_retrieve_fw_addr(struct pci_dev *dev, int idx); |
1105 | resource_size_t pcibios_retrieve_fw_addr(struct pci_dev *dev, int idx); |
1123 | void pci_bus_assign_resources(const struct pci_bus *bus); |
1106 | void pci_bus_assign_resources(const struct pci_bus *bus); |
1124 | void pci_bus_size_bridges(struct pci_bus *bus); |
1107 | void pci_bus_size_bridges(struct pci_bus *bus); |
1125 | int pci_claim_resource(struct pci_dev *, int); |
1108 | int pci_claim_resource(struct pci_dev *, int); |
1126 | int pci_claim_bridge_resource(struct pci_dev *bridge, int i); |
1109 | int pci_claim_bridge_resource(struct pci_dev *bridge, int i); |
1127 | void pci_assign_unassigned_resources(void); |
1110 | void pci_assign_unassigned_resources(void); |
1128 | void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge); |
1111 | void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge); |
1129 | void pci_assign_unassigned_bus_resources(struct pci_bus *bus); |
1112 | void pci_assign_unassigned_bus_resources(struct pci_bus *bus); |
1130 | void pci_assign_unassigned_root_bus_resources(struct pci_bus *bus); |
1113 | void pci_assign_unassigned_root_bus_resources(struct pci_bus *bus); |
1131 | void pdev_enable_device(struct pci_dev *); |
1114 | void pdev_enable_device(struct pci_dev *); |
1132 | int pci_enable_resources(struct pci_dev *, int mask); |
1115 | int pci_enable_resources(struct pci_dev *, int mask); |
1133 | void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *), |
1116 | void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *), |
1134 | int (*)(const struct pci_dev *, u8, u8)); |
1117 | int (*)(const struct pci_dev *, u8, u8)); |
1135 | #define HAVE_PCI_REQ_REGIONS 2 |
1118 | #define HAVE_PCI_REQ_REGIONS 2 |
1136 | int __must_check pci_request_regions(struct pci_dev *, const char *); |
1119 | int __must_check pci_request_regions(struct pci_dev *, const char *); |
1137 | int __must_check pci_request_regions_exclusive(struct pci_dev *, const char *); |
1120 | int __must_check pci_request_regions_exclusive(struct pci_dev *, const char *); |
1138 | void pci_release_regions(struct pci_dev *); |
1121 | void pci_release_regions(struct pci_dev *); |
1139 | int __must_check pci_request_region(struct pci_dev *, int, const char *); |
1122 | int __must_check pci_request_region(struct pci_dev *, int, const char *); |
1140 | int __must_check pci_request_region_exclusive(struct pci_dev *, int, const char *); |
1123 | int __must_check pci_request_region_exclusive(struct pci_dev *, int, const char *); |
1141 | void pci_release_region(struct pci_dev *, int); |
1124 | void pci_release_region(struct pci_dev *, int); |
1142 | int pci_request_selected_regions(struct pci_dev *, int, const char *); |
1125 | int pci_request_selected_regions(struct pci_dev *, int, const char *); |
1143 | int pci_request_selected_regions_exclusive(struct pci_dev *, int, const char *); |
1126 | int pci_request_selected_regions_exclusive(struct pci_dev *, int, const char *); |
1144 | void pci_release_selected_regions(struct pci_dev *, int); |
1127 | void pci_release_selected_regions(struct pci_dev *, int); |
1145 | 1128 | ||
1146 | /* drivers/pci/bus.c */ |
1129 | /* drivers/pci/bus.c */ |
1147 | struct pci_bus *pci_bus_get(struct pci_bus *bus); |
1130 | struct pci_bus *pci_bus_get(struct pci_bus *bus); |
1148 | void pci_bus_put(struct pci_bus *bus); |
1131 | void pci_bus_put(struct pci_bus *bus); |
1149 | void pci_add_resource(struct list_head *resources, struct resource *res); |
1132 | void pci_add_resource(struct list_head *resources, struct resource *res); |
1150 | void pci_add_resource_offset(struct list_head *resources, struct resource *res, |
1133 | void pci_add_resource_offset(struct list_head *resources, struct resource *res, |
1151 | resource_size_t offset); |
1134 | resource_size_t offset); |
1152 | void pci_free_resource_list(struct list_head *resources); |
1135 | void pci_free_resource_list(struct list_head *resources); |
1153 | void pci_bus_add_resource(struct pci_bus *bus, struct resource *res, unsigned int flags); |
1136 | void pci_bus_add_resource(struct pci_bus *bus, struct resource *res, unsigned int flags); |
1154 | struct resource *pci_bus_resource_n(const struct pci_bus *bus, int n); |
1137 | struct resource *pci_bus_resource_n(const struct pci_bus *bus, int n); |
1155 | void pci_bus_remove_resources(struct pci_bus *bus); |
1138 | void pci_bus_remove_resources(struct pci_bus *bus); |
1156 | 1139 | ||
1157 | #define pci_bus_for_each_resource(bus, res, i) \ |
1140 | #define pci_bus_for_each_resource(bus, res, i) \ |
1158 | for (i = 0; \ |
1141 | for (i = 0; \ |
1159 | (res = pci_bus_resource_n(bus, i)) || i < PCI_BRIDGE_RESOURCE_NUM; \ |
1142 | (res = pci_bus_resource_n(bus, i)) || i < PCI_BRIDGE_RESOURCE_NUM; \ |
1160 | i++) |
1143 | i++) |
1161 | 1144 | ||
1162 | int __must_check pci_bus_alloc_resource(struct pci_bus *bus, |
1145 | int __must_check pci_bus_alloc_resource(struct pci_bus *bus, |
1163 | struct resource *res, resource_size_t size, |
1146 | struct resource *res, resource_size_t size, |
1164 | resource_size_t align, resource_size_t min, |
1147 | resource_size_t align, resource_size_t min, |
1165 | unsigned long type_mask, |
1148 | unsigned long type_mask, |
1166 | resource_size_t (*alignf)(void *, |
1149 | resource_size_t (*alignf)(void *, |
1167 | const struct resource *, |
1150 | const struct resource *, |
1168 | resource_size_t, |
1151 | resource_size_t, |
1169 | resource_size_t), |
1152 | resource_size_t), |
1170 | void *alignf_data); |
1153 | void *alignf_data); |
1171 | 1154 | ||
1172 | 1155 | ||
1173 | int pci_remap_iospace(const struct resource *res, phys_addr_t phys_addr); |
1156 | int pci_remap_iospace(const struct resource *res, phys_addr_t phys_addr); |
1174 | 1157 | ||
1175 | static inline void |
1158 | static inline void |
1176 | _pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, |
1159 | _pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, |
1177 | struct resource *res) |
1160 | struct resource *res) |
1178 | { |
1161 | { |
1179 | region->start = res->start; |
1162 | region->start = res->start; |
1180 | region->end = res->end; |
1163 | region->end = res->end; |
1181 | } |
1164 | } |
1182 | 1165 | ||
1183 | static inline pci_bus_addr_t pci_bus_address(struct pci_dev *pdev, int bar) |
1166 | static inline pci_bus_addr_t pci_bus_address(struct pci_dev *pdev, int bar) |
1184 | { |
1167 | { |
1185 | struct pci_bus_region region; |
1168 | struct pci_bus_region region; |
1186 | 1169 | ||
1187 | _pcibios_resource_to_bus(pdev, ®ion, &pdev->resource[bar]); |
1170 | _pcibios_resource_to_bus(pdev, ®ion, &pdev->resource[bar]); |
1188 | return region.start; |
1171 | return region.start; |
1189 | } |
1172 | } |
1190 | 1173 | ||
1191 | /* Proper probing supporting hot-pluggable devices */ |
1174 | /* Proper probing supporting hot-pluggable devices */ |
1192 | int __must_check __pci_register_driver(struct pci_driver *, struct module *, |
1175 | int __must_check __pci_register_driver(struct pci_driver *, struct module *, |
1193 | const char *mod_name); |
1176 | const char *mod_name); |
1194 | 1177 | ||
1195 | /* |
1178 | /* |
1196 | * pci_register_driver must be a macro so that KBUILD_MODNAME can be expanded |
1179 | * pci_register_driver must be a macro so that KBUILD_MODNAME can be expanded |
1197 | */ |
1180 | */ |
1198 | #define pci_register_driver(driver) \ |
1181 | #define pci_register_driver(driver) \ |
1199 | __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME) |
1182 | __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME) |
1200 | 1183 | ||
1201 | void pci_unregister_driver(struct pci_driver *dev); |
1184 | void pci_unregister_driver(struct pci_driver *dev); |
1202 | 1185 | ||
1203 | /** |
1186 | /** |
1204 | * module_pci_driver() - Helper macro for registering a PCI driver |
1187 | * module_pci_driver() - Helper macro for registering a PCI driver |
1205 | * @__pci_driver: pci_driver struct |
1188 | * @__pci_driver: pci_driver struct |
1206 | * |
1189 | * |
1207 | * Helper macro for PCI drivers which do not do anything special in module |
1190 | * Helper macro for PCI drivers which do not do anything special in module |
1208 | * init/exit. This eliminates a lot of boilerplate. Each module may only |
1191 | * init/exit. This eliminates a lot of boilerplate. Each module may only |
1209 | * use this macro once, and calling it replaces module_init() and module_exit() |
1192 | * use this macro once, and calling it replaces module_init() and module_exit() |
1210 | */ |
1193 | */ |
1211 | #define module_pci_driver(__pci_driver) \ |
1194 | #define module_pci_driver(__pci_driver) \ |
1212 | module_driver(__pci_driver, pci_register_driver, \ |
1195 | module_driver(__pci_driver, pci_register_driver, \ |
1213 | pci_unregister_driver) |
1196 | pci_unregister_driver) |
1214 | 1197 | ||
1215 | /** |
1198 | /** |
1216 | * builtin_pci_driver() - Helper macro for registering a PCI driver |
1199 | * builtin_pci_driver() - Helper macro for registering a PCI driver |
1217 | * @__pci_driver: pci_driver struct |
1200 | * @__pci_driver: pci_driver struct |
1218 | * |
1201 | * |
1219 | * Helper macro for PCI drivers which do not do anything special in their |
1202 | * Helper macro for PCI drivers which do not do anything special in their |
1220 | * init code. This eliminates a lot of boilerplate. Each driver may only |
1203 | * init code. This eliminates a lot of boilerplate. Each driver may only |
1221 | * use this macro once, and calling it replaces device_initcall(...) |
1204 | * use this macro once, and calling it replaces device_initcall(...) |
1222 | */ |
1205 | */ |
1223 | #define builtin_pci_driver(__pci_driver) \ |
1206 | #define builtin_pci_driver(__pci_driver) \ |
1224 | builtin_driver(__pci_driver, pci_register_driver) |
1207 | builtin_driver(__pci_driver, pci_register_driver) |
1225 | 1208 | ||
1226 | struct pci_driver *pci_dev_driver(const struct pci_dev *dev); |
1209 | struct pci_driver *pci_dev_driver(const struct pci_dev *dev); |
1227 | int pci_add_dynid(struct pci_driver *drv, |
1210 | int pci_add_dynid(struct pci_driver *drv, |
1228 | unsigned int vendor, unsigned int device, |
1211 | unsigned int vendor, unsigned int device, |
1229 | unsigned int subvendor, unsigned int subdevice, |
1212 | unsigned int subvendor, unsigned int subdevice, |
1230 | unsigned int class, unsigned int class_mask, |
1213 | unsigned int class, unsigned int class_mask, |
1231 | unsigned long driver_data); |
1214 | unsigned long driver_data); |
1232 | const struct pci_device_id *pci_match_id(const struct pci_device_id *ids, |
1215 | const struct pci_device_id *pci_match_id(const struct pci_device_id *ids, |
1233 | struct pci_dev *dev); |
1216 | struct pci_dev *dev); |
1234 | int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max, |
1217 | int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max, |
1235 | int pass); |
1218 | int pass); |
1236 | 1219 | ||
1237 | void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *), |
1220 | void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *), |
1238 | void *userdata); |
1221 | void *userdata); |
1239 | int pci_cfg_space_size(struct pci_dev *dev); |
1222 | int pci_cfg_space_size(struct pci_dev *dev); |
1240 | unsigned char pci_bus_max_busnr(struct pci_bus *bus); |
1223 | unsigned char pci_bus_max_busnr(struct pci_bus *bus); |
1241 | void pci_setup_bridge(struct pci_bus *bus); |
1224 | void pci_setup_bridge(struct pci_bus *bus); |
1242 | resource_size_t pcibios_window_alignment(struct pci_bus *bus, |
1225 | resource_size_t pcibios_window_alignment(struct pci_bus *bus, |
1243 | unsigned long type); |
1226 | unsigned long type); |
1244 | resource_size_t pcibios_iov_resource_alignment(struct pci_dev *dev, int resno); |
1227 | resource_size_t pcibios_iov_resource_alignment(struct pci_dev *dev, int resno); |
1245 | 1228 | ||
1246 | #define PCI_VGA_STATE_CHANGE_BRIDGE (1 << 0) |
1229 | #define PCI_VGA_STATE_CHANGE_BRIDGE (1 << 0) |
1247 | #define PCI_VGA_STATE_CHANGE_DECODES (1 << 1) |
1230 | #define PCI_VGA_STATE_CHANGE_DECODES (1 << 1) |
1248 | 1231 | ||
1249 | int pci_set_vga_state(struct pci_dev *pdev, bool decode, |
1232 | int pci_set_vga_state(struct pci_dev *pdev, bool decode, |
1250 | unsigned int command_bits, u32 flags); |
1233 | unsigned int command_bits, u32 flags); |
1251 | /* kmem_cache style wrapper around pci_alloc_consistent() */ |
1234 | /* kmem_cache style wrapper around pci_alloc_consistent() */ |
1252 | 1235 | ||
1253 | #include |
1236 | #include |
1254 | #include |
1237 | #include |
1255 | 1238 | ||
1256 | #define pci_pool dma_pool |
1239 | #define pci_pool dma_pool |
1257 | #define pci_pool_create(name, pdev, size, align, allocation) \ |
1240 | #define pci_pool_create(name, pdev, size, align, allocation) \ |
1258 | dma_pool_create(name, &pdev->dev, size, align, allocation) |
1241 | dma_pool_create(name, &pdev->dev, size, align, allocation) |
1259 | #define pci_pool_destroy(pool) dma_pool_destroy(pool) |
1242 | #define pci_pool_destroy(pool) dma_pool_destroy(pool) |
1260 | #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle) |
1243 | #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle) |
1261 | #define pci_pool_zalloc(pool, flags, handle) \ |
1244 | #define pci_pool_zalloc(pool, flags, handle) \ |
1262 | dma_pool_zalloc(pool, flags, handle) |
1245 | dma_pool_zalloc(pool, flags, handle) |
1263 | #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr) |
1246 | #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr) |
1264 | 1247 | ||
1265 | struct msix_entry { |
1248 | struct msix_entry { |
1266 | u32 vector; /* kernel uses to write allocated vector */ |
1249 | u32 vector; /* kernel uses to write allocated vector */ |
1267 | u16 entry; /* driver uses to specify entry, OS writes */ |
1250 | u16 entry; /* driver uses to specify entry, OS writes */ |
1268 | }; |
1251 | }; |
1269 | - | ||
1270 | void pci_msi_setup_pci_dev(struct pci_dev *dev); |
- | |
1271 | 1252 | ||
1272 | #ifdef CONFIG_PCI_MSI |
1253 | #ifdef CONFIG_PCI_MSI |
1273 | int pci_msi_vec_count(struct pci_dev *dev); |
1254 | int pci_msi_vec_count(struct pci_dev *dev); |
1274 | void pci_msi_shutdown(struct pci_dev *dev); |
1255 | void pci_msi_shutdown(struct pci_dev *dev); |
1275 | void pci_disable_msi(struct pci_dev *dev); |
1256 | void pci_disable_msi(struct pci_dev *dev); |
1276 | int pci_msix_vec_count(struct pci_dev *dev); |
1257 | int pci_msix_vec_count(struct pci_dev *dev); |
1277 | int pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, int nvec); |
1258 | int pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, int nvec); |
1278 | void pci_msix_shutdown(struct pci_dev *dev); |
1259 | void pci_msix_shutdown(struct pci_dev *dev); |
1279 | void pci_disable_msix(struct pci_dev *dev); |
1260 | void pci_disable_msix(struct pci_dev *dev); |
1280 | void pci_restore_msi_state(struct pci_dev *dev); |
1261 | void pci_restore_msi_state(struct pci_dev *dev); |
1281 | int pci_msi_enabled(void); |
1262 | int pci_msi_enabled(void); |
1282 | int pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec); |
1263 | int pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec); |
1283 | static inline int pci_enable_msi_exact(struct pci_dev *dev, int nvec) |
1264 | static inline int pci_enable_msi_exact(struct pci_dev *dev, int nvec) |
1284 | { |
1265 | { |
1285 | int rc = pci_enable_msi_range(dev, nvec, nvec); |
1266 | int rc = pci_enable_msi_range(dev, nvec, nvec); |
1286 | if (rc < 0) |
1267 | if (rc < 0) |
1287 | return rc; |
1268 | return rc; |
1288 | return 0; |
1269 | return 0; |
1289 | } |
1270 | } |
1290 | int pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries, |
1271 | int pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries, |
1291 | int minvec, int maxvec); |
1272 | int minvec, int maxvec); |
1292 | static inline int pci_enable_msix_exact(struct pci_dev *dev, |
1273 | static inline int pci_enable_msix_exact(struct pci_dev *dev, |
1293 | struct msix_entry *entries, int nvec) |
1274 | struct msix_entry *entries, int nvec) |
1294 | { |
1275 | { |
1295 | int rc = pci_enable_msix_range(dev, entries, nvec, nvec); |
1276 | int rc = pci_enable_msix_range(dev, entries, nvec, nvec); |
1296 | if (rc < 0) |
1277 | if (rc < 0) |
1297 | return rc; |
1278 | return rc; |
1298 | return 0; |
1279 | return 0; |
1299 | } |
1280 | } |
1300 | #else |
1281 | #else |
1301 | static inline int pci_msi_vec_count(struct pci_dev *dev) { return -ENOSYS; } |
1282 | static inline int pci_msi_vec_count(struct pci_dev *dev) { return -ENOSYS; } |
1302 | static inline void pci_msi_shutdown(struct pci_dev *dev) { } |
1283 | static inline void pci_msi_shutdown(struct pci_dev *dev) { } |
1303 | static inline void pci_disable_msi(struct pci_dev *dev) { } |
1284 | static inline void pci_disable_msi(struct pci_dev *dev) { } |
1304 | static inline int pci_msix_vec_count(struct pci_dev *dev) { return -ENOSYS; } |
1285 | static inline int pci_msix_vec_count(struct pci_dev *dev) { return -ENOSYS; } |
1305 | static inline int pci_enable_msix(struct pci_dev *dev, |
1286 | static inline int pci_enable_msix(struct pci_dev *dev, |
1306 | struct msix_entry *entries, int nvec) |
1287 | struct msix_entry *entries, int nvec) |
1307 | { return -ENOSYS; } |
1288 | { return -ENOSYS; } |
1308 | static inline void pci_msix_shutdown(struct pci_dev *dev) { } |
1289 | static inline void pci_msix_shutdown(struct pci_dev *dev) { } |
1309 | static inline void pci_disable_msix(struct pci_dev *dev) { } |
1290 | static inline void pci_disable_msix(struct pci_dev *dev) { } |
1310 | static inline void pci_restore_msi_state(struct pci_dev *dev) { } |
1291 | static inline void pci_restore_msi_state(struct pci_dev *dev) { } |
1311 | static inline int pci_msi_enabled(void) { return 0; } |
1292 | static inline int pci_msi_enabled(void) { return 0; } |
1312 | static inline int pci_enable_msi_range(struct pci_dev *dev, int minvec, |
1293 | static inline int pci_enable_msi_range(struct pci_dev *dev, int minvec, |
1313 | int maxvec) |
1294 | int maxvec) |
1314 | { return -ENOSYS; } |
1295 | { return -ENOSYS; } |
1315 | static inline int pci_enable_msi_exact(struct pci_dev *dev, int nvec) |
1296 | static inline int pci_enable_msi_exact(struct pci_dev *dev, int nvec) |
1316 | { return -ENOSYS; } |
1297 | { return -ENOSYS; } |
1317 | static inline int pci_enable_msix_range(struct pci_dev *dev, |
1298 | static inline int pci_enable_msix_range(struct pci_dev *dev, |
1318 | struct msix_entry *entries, int minvec, int maxvec) |
1299 | struct msix_entry *entries, int minvec, int maxvec) |
1319 | { return -ENOSYS; } |
1300 | { return -ENOSYS; } |
1320 | static inline int pci_enable_msix_exact(struct pci_dev *dev, |
1301 | static inline int pci_enable_msix_exact(struct pci_dev *dev, |
1321 | struct msix_entry *entries, int nvec) |
1302 | struct msix_entry *entries, int nvec) |
1322 | { return -ENOSYS; } |
1303 | { return -ENOSYS; } |
1323 | #endif |
1304 | #endif |
1324 | 1305 | ||
1325 | #ifdef CONFIG_PCIEPORTBUS |
1306 | #ifdef CONFIG_PCIEPORTBUS |
1326 | extern bool pcie_ports_disabled; |
1307 | extern bool pcie_ports_disabled; |
1327 | extern bool pcie_ports_auto; |
1308 | extern bool pcie_ports_auto; |
1328 | #else |
1309 | #else |
1329 | #define pcie_ports_disabled true |
1310 | #define pcie_ports_disabled true |
1330 | #define pcie_ports_auto false |
1311 | #define pcie_ports_auto false |
1331 | #endif |
1312 | #endif |
1332 | 1313 | ||
1333 | #ifdef CONFIG_PCIEASPM |
1314 | #ifdef CONFIG_PCIEASPM |
1334 | bool pcie_aspm_support_enabled(void); |
1315 | bool pcie_aspm_support_enabled(void); |
1335 | #else |
1316 | #else |
1336 | static inline bool pcie_aspm_support_enabled(void) { return false; } |
1317 | static inline bool pcie_aspm_support_enabled(void) { return false; } |
1337 | #endif |
1318 | #endif |
1338 | 1319 | ||
1339 | #ifdef CONFIG_PCIEAER |
1320 | #ifdef CONFIG_PCIEAER |
1340 | void pci_no_aer(void); |
1321 | void pci_no_aer(void); |
1341 | bool pci_aer_available(void); |
1322 | bool pci_aer_available(void); |
1342 | #else |
1323 | #else |
1343 | static inline void pci_no_aer(void) { } |
1324 | static inline void pci_no_aer(void) { } |
1344 | static inline bool pci_aer_available(void) { return false; } |
1325 | static inline bool pci_aer_available(void) { return false; } |
1345 | #endif |
1326 | #endif |
1346 | 1327 | ||
1347 | #ifdef CONFIG_PCIE_ECRC |
1328 | #ifdef CONFIG_PCIE_ECRC |
1348 | void pcie_set_ecrc_checking(struct pci_dev *dev); |
1329 | void pcie_set_ecrc_checking(struct pci_dev *dev); |
1349 | void pcie_ecrc_get_policy(char *str); |
1330 | void pcie_ecrc_get_policy(char *str); |
1350 | #else |
1331 | #else |
1351 | static inline void pcie_set_ecrc_checking(struct pci_dev *dev) { } |
1332 | static inline void pcie_set_ecrc_checking(struct pci_dev *dev) { } |
1352 | static inline void pcie_ecrc_get_policy(char *str) { } |
1333 | static inline void pcie_ecrc_get_policy(char *str) { } |
1353 | #endif |
1334 | #endif |
1354 | 1335 | ||
1355 | #define pci_enable_msi(pdev) pci_enable_msi_exact(pdev, 1) |
1336 | #define pci_enable_msi(pdev) pci_enable_msi_exact(pdev, 1) |
1356 | 1337 | ||
1357 | #ifdef CONFIG_HT_IRQ |
1338 | #ifdef CONFIG_HT_IRQ |
1358 | /* The functions a driver should call */ |
1339 | /* The functions a driver should call */ |
1359 | int ht_create_irq(struct pci_dev *dev, int idx); |
1340 | int ht_create_irq(struct pci_dev *dev, int idx); |
1360 | void ht_destroy_irq(unsigned int irq); |
1341 | void ht_destroy_irq(unsigned int irq); |
1361 | #endif /* CONFIG_HT_IRQ */ |
1342 | #endif /* CONFIG_HT_IRQ */ |
1362 | 1343 | ||
1363 | #ifdef CONFIG_PCI_ATS |
1344 | #ifdef CONFIG_PCI_ATS |
1364 | /* Address Translation Service */ |
1345 | /* Address Translation Service */ |
1365 | void pci_ats_init(struct pci_dev *dev); |
1346 | void pci_ats_init(struct pci_dev *dev); |
1366 | int pci_enable_ats(struct pci_dev *dev, int ps); |
1347 | int pci_enable_ats(struct pci_dev *dev, int ps); |
1367 | void pci_disable_ats(struct pci_dev *dev); |
1348 | void pci_disable_ats(struct pci_dev *dev); |
1368 | int pci_ats_queue_depth(struct pci_dev *dev); |
1349 | int pci_ats_queue_depth(struct pci_dev *dev); |
1369 | #else |
1350 | #else |
1370 | static inline void pci_ats_init(struct pci_dev *d) { } |
1351 | static inline void pci_ats_init(struct pci_dev *d) { } |
1371 | static inline int pci_enable_ats(struct pci_dev *d, int ps) { return -ENODEV; } |
1352 | static inline int pci_enable_ats(struct pci_dev *d, int ps) { return -ENODEV; } |
1372 | static inline void pci_disable_ats(struct pci_dev *d) { } |
1353 | static inline void pci_disable_ats(struct pci_dev *d) { } |
1373 | static inline int pci_ats_queue_depth(struct pci_dev *d) { return -ENODEV; } |
1354 | static inline int pci_ats_queue_depth(struct pci_dev *d) { return -ENODEV; } |
1374 | #endif |
1355 | #endif |
1375 | 1356 | ||
1376 | void pci_cfg_access_lock(struct pci_dev *dev); |
1357 | void pci_cfg_access_lock(struct pci_dev *dev); |
1377 | bool pci_cfg_access_trylock(struct pci_dev *dev); |
1358 | bool pci_cfg_access_trylock(struct pci_dev *dev); |
1378 | void pci_cfg_access_unlock(struct pci_dev *dev); |
1359 | void pci_cfg_access_unlock(struct pci_dev *dev); |
1379 | 1360 | ||
1380 | /* |
1361 | /* |
1381 | * PCI domain support. Sometimes called PCI segment (eg by ACPI), |
1362 | * PCI domain support. Sometimes called PCI segment (eg by ACPI), |
1382 | * a PCI domain is defined to be a set of PCI buses which share |
1363 | * a PCI domain is defined to be a set of PCI buses which share |
1383 | * configuration space. |
1364 | * configuration space. |
1384 | */ |
1365 | */ |
1385 | #ifdef CONFIG_PCI_DOMAINS |
1366 | #ifdef CONFIG_PCI_DOMAINS |
1386 | extern int pci_domains_supported; |
1367 | extern int pci_domains_supported; |
1387 | int pci_get_new_domain_nr(void); |
1368 | int pci_get_new_domain_nr(void); |
1388 | #else |
1369 | #else |
1389 | enum { pci_domains_supported = 0 }; |
1370 | enum { pci_domains_supported = 0 }; |
1390 | static inline int pci_domain_nr(struct pci_bus *bus) { return 0; } |
1371 | static inline int pci_domain_nr(struct pci_bus *bus) { return 0; } |
1391 | static inline int pci_proc_domain(struct pci_bus *bus) { return 0; } |
1372 | static inline int pci_proc_domain(struct pci_bus *bus) { return 0; } |
1392 | static inline int pci_get_new_domain_nr(void) { return -ENOSYS; } |
1373 | static inline int pci_get_new_domain_nr(void) { return -ENOSYS; } |
1393 | #endif /* CONFIG_PCI_DOMAINS */ |
1374 | #endif /* CONFIG_PCI_DOMAINS */ |
1394 | 1375 | ||
1395 | /* |
1376 | /* |
1396 | * Generic implementation for PCI domain support. If your |
1377 | * Generic implementation for PCI domain support. If your |
1397 | * architecture does not need custom management of PCI |
1378 | * architecture does not need custom management of PCI |
1398 | * domains then this implementation will be used |
1379 | * domains then this implementation will be used |
1399 | */ |
1380 | */ |
1400 | #ifdef CONFIG_PCI_DOMAINS_GENERIC |
1381 | #ifdef CONFIG_PCI_DOMAINS_GENERIC |
1401 | static inline int pci_domain_nr(struct pci_bus *bus) |
1382 | static inline int pci_domain_nr(struct pci_bus *bus) |
1402 | { |
1383 | { |
1403 | return bus->domain_nr; |
1384 | return bus->domain_nr; |
1404 | } |
1385 | } |
1405 | void pci_bus_assign_domain_nr(struct pci_bus *bus, struct device *parent); |
1386 | void pci_bus_assign_domain_nr(struct pci_bus *bus, struct device *parent); |
1406 | #else |
1387 | #else |
1407 | static inline void pci_bus_assign_domain_nr(struct pci_bus *bus, |
1388 | static inline void pci_bus_assign_domain_nr(struct pci_bus *bus, |
1408 | struct device *parent) |
1389 | struct device *parent) |
1409 | { |
1390 | { |
1410 | } |
1391 | } |
1411 | #endif |
1392 | #endif |
1412 | 1393 | ||
1413 | /* some architectures require additional setup to direct VGA traffic */ |
1394 | /* some architectures require additional setup to direct VGA traffic */ |
1414 | typedef int (*arch_set_vga_state_t)(struct pci_dev *pdev, bool decode, |
1395 | typedef int (*arch_set_vga_state_t)(struct pci_dev *pdev, bool decode, |
1415 | unsigned int command_bits, u32 flags); |
1396 | unsigned int command_bits, u32 flags); |
1416 | void pci_register_set_vga_state(arch_set_vga_state_t func); |
1397 | void pci_register_set_vga_state(arch_set_vga_state_t func); |
1417 | 1398 | ||
1418 | #else /* CONFIG_PCI is not enabled */ |
1399 | #else /* CONFIG_PCI is not enabled */ |
1419 | 1400 | ||
1420 | /* |
1401 | /* |
1421 | * If the system does not have PCI, clearly these return errors. Define |
1402 | * If the system does not have PCI, clearly these return errors. Define |
1422 | * these as simple inline functions to avoid hair in drivers. |
1403 | * these as simple inline functions to avoid hair in drivers. |
1423 | */ |
1404 | */ |
1424 | 1405 | ||
1425 | #define _PCI_NOP(o, s, t) \ |
1406 | #define _PCI_NOP(o, s, t) \ |
1426 | static inline int pci_##o##_config_##s(struct pci_dev *dev, \ |
1407 | static inline int pci_##o##_config_##s(struct pci_dev *dev, \ |
1427 | int where, t val) \ |
1408 | int where, t val) \ |
1428 | { return PCIBIOS_FUNC_NOT_SUPPORTED; } |
1409 | { return PCIBIOS_FUNC_NOT_SUPPORTED; } |
1429 | 1410 | ||
1430 | #define _PCI_NOP_ALL(o, x) _PCI_NOP(o, byte, u8 x) \ |
1411 | #define _PCI_NOP_ALL(o, x) _PCI_NOP(o, byte, u8 x) \ |
1431 | _PCI_NOP(o, word, u16 x) \ |
1412 | _PCI_NOP(o, word, u16 x) \ |
1432 | _PCI_NOP(o, dword, u32 x) |
1413 | _PCI_NOP(o, dword, u32 x) |
1433 | _PCI_NOP_ALL(read, *) |
1414 | _PCI_NOP_ALL(read, *) |
1434 | _PCI_NOP_ALL(write,) |
1415 | _PCI_NOP_ALL(write,) |
1435 | 1416 | ||
1436 | static inline struct pci_dev *pci_get_device(unsigned int vendor, |
1417 | static inline struct pci_dev *pci_get_device(unsigned int vendor, |
1437 | unsigned int device, |
1418 | unsigned int device, |
1438 | struct pci_dev *from) |
1419 | struct pci_dev *from) |
1439 | { return NULL; } |
1420 | { return NULL; } |
1440 | 1421 | ||
1441 | static inline struct pci_dev *pci_get_subsys(unsigned int vendor, |
1422 | static inline struct pci_dev *pci_get_subsys(unsigned int vendor, |
1442 | unsigned int device, |
1423 | unsigned int device, |
1443 | unsigned int ss_vendor, |
1424 | unsigned int ss_vendor, |
1444 | unsigned int ss_device, |
1425 | unsigned int ss_device, |
1445 | struct pci_dev *from) |
1426 | struct pci_dev *from) |
1446 | { return NULL; } |
1427 | { return NULL; } |
1447 | 1428 | ||
1448 | static inline struct pci_dev *pci_get_class(unsigned int class, |
1429 | static inline struct pci_dev *pci_get_class(unsigned int class, |
1449 | struct pci_dev *from) |
1430 | struct pci_dev *from) |
1450 | { return NULL; } |
1431 | { return NULL; } |
1451 | 1432 | ||
1452 | #define pci_dev_present(ids) (0) |
1433 | #define pci_dev_present(ids) (0) |
1453 | #define no_pci_devices() (1) |
1434 | #define no_pci_devices() (1) |
1454 | #define pci_dev_put(dev) do { } while (0) |
1435 | #define pci_dev_put(dev) do { } while (0) |
1455 | 1436 | ||
1456 | static inline void pci_set_master(struct pci_dev *dev) { } |
1437 | static inline void pci_set_master(struct pci_dev *dev) { } |
1457 | static inline int pci_enable_device(struct pci_dev *dev) { return -EIO; } |
1438 | static inline int pci_enable_device(struct pci_dev *dev) { return -EIO; } |
1458 | static inline void pci_disable_device(struct pci_dev *dev) { } |
1439 | static inline void pci_disable_device(struct pci_dev *dev) { } |
1459 | static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask) |
1440 | static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask) |
1460 | { return -EIO; } |
1441 | { return -EIO; } |
1461 | static inline int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask) |
1442 | static inline int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask) |
1462 | { return -EIO; } |
1443 | { return -EIO; } |
1463 | static inline int pci_set_dma_max_seg_size(struct pci_dev *dev, |
1444 | static inline int pci_set_dma_max_seg_size(struct pci_dev *dev, |
1464 | unsigned int size) |
1445 | unsigned int size) |
1465 | { return -EIO; } |
1446 | { return -EIO; } |
1466 | static inline int pci_set_dma_seg_boundary(struct pci_dev *dev, |
1447 | static inline int pci_set_dma_seg_boundary(struct pci_dev *dev, |
1467 | unsigned long mask) |
1448 | unsigned long mask) |
1468 | { return -EIO; } |
1449 | { return -EIO; } |
1469 | static inline int pci_assign_resource(struct pci_dev *dev, int i) |
1450 | static inline int pci_assign_resource(struct pci_dev *dev, int i) |
1470 | { return -EBUSY; } |
1451 | { return -EBUSY; } |
1471 | static inline int __pci_register_driver(struct pci_driver *drv, |
1452 | static inline int __pci_register_driver(struct pci_driver *drv, |
1472 | struct module *owner) |
1453 | struct module *owner) |
1473 | { return 0; } |
1454 | { return 0; } |
1474 | static inline int pci_register_driver(struct pci_driver *drv) |
1455 | static inline int pci_register_driver(struct pci_driver *drv) |
1475 | { return 0; } |
1456 | { return 0; } |
1476 | static inline void pci_unregister_driver(struct pci_driver *drv) { } |
1457 | static inline void pci_unregister_driver(struct pci_driver *drv) { } |
1477 | static inline int pci_find_capability(struct pci_dev *dev, int cap) |
1458 | static inline int pci_find_capability(struct pci_dev *dev, int cap) |
1478 | { return 0; } |
1459 | { return 0; } |
1479 | static inline int pci_find_next_capability(struct pci_dev *dev, u8 post, |
1460 | static inline int pci_find_next_capability(struct pci_dev *dev, u8 post, |
1480 | int cap) |
1461 | int cap) |
1481 | { return 0; } |
1462 | { return 0; } |
1482 | static inline int pci_find_ext_capability(struct pci_dev *dev, int cap) |
1463 | static inline int pci_find_ext_capability(struct pci_dev *dev, int cap) |
1483 | { return 0; } |
1464 | { return 0; } |
1484 | 1465 | ||
1485 | /* Power management related routines */ |
1466 | /* Power management related routines */ |
1486 | static inline int pci_save_state(struct pci_dev *dev) { return 0; } |
1467 | static inline int pci_save_state(struct pci_dev *dev) { return 0; } |
1487 | static inline void pci_restore_state(struct pci_dev *dev) { } |
1468 | static inline void pci_restore_state(struct pci_dev *dev) { } |
1488 | static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state) |
1469 | static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state) |
1489 | { return 0; } |
1470 | { return 0; } |
1490 | static inline int pci_wake_from_d3(struct pci_dev *dev, bool enable) |
1471 | static inline int pci_wake_from_d3(struct pci_dev *dev, bool enable) |
1491 | { return 0; } |
1472 | { return 0; } |
1492 | static inline pci_power_t pci_choose_state(struct pci_dev *dev, |
1473 | static inline pci_power_t pci_choose_state(struct pci_dev *dev, |
1493 | pm_message_t state) |
1474 | pm_message_t state) |
1494 | { return PCI_D0; } |
1475 | { return PCI_D0; } |
1495 | static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, |
1476 | static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, |
1496 | int enable) |
1477 | int enable) |
1497 | { return 0; } |
1478 | { return 0; } |
1498 | 1479 | ||
1499 | static inline int pci_request_regions(struct pci_dev *dev, const char *res_name) |
1480 | static inline int pci_request_regions(struct pci_dev *dev, const char *res_name) |
1500 | { return -EIO; } |
1481 | { return -EIO; } |
1501 | static inline void pci_release_regions(struct pci_dev *dev) { } |
1482 | static inline void pci_release_regions(struct pci_dev *dev) { } |
1502 | 1483 | ||
1503 | static inline void pci_block_cfg_access(struct pci_dev *dev) { } |
1484 | static inline void pci_block_cfg_access(struct pci_dev *dev) { } |
1504 | static inline int pci_block_cfg_access_in_atomic(struct pci_dev *dev) |
1485 | static inline int pci_block_cfg_access_in_atomic(struct pci_dev *dev) |
1505 | { return 0; } |
1486 | { return 0; } |
1506 | static inline void pci_unblock_cfg_access(struct pci_dev *dev) { } |
1487 | static inline void pci_unblock_cfg_access(struct pci_dev *dev) { } |
1507 | 1488 | ||
1508 | static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from) |
1489 | static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from) |
1509 | { return NULL; } |
1490 | { return NULL; } |
1510 | static inline struct pci_dev *pci_get_slot(struct pci_bus *bus, |
1491 | static inline struct pci_dev *pci_get_slot(struct pci_bus *bus, |
1511 | unsigned int devfn) |
1492 | unsigned int devfn) |
1512 | { return NULL; } |
1493 | { return NULL; } |
1513 | static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus, |
1494 | static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus, |
1514 | unsigned int devfn) |
1495 | unsigned int devfn) |
1515 | { return NULL; } |
1496 | { return NULL; } |
1516 | 1497 | ||
1517 | static inline int pci_domain_nr(struct pci_bus *bus) { return 0; } |
1498 | static inline int pci_domain_nr(struct pci_bus *bus) { return 0; } |
1518 | static inline struct pci_dev *pci_dev_get(struct pci_dev *dev) { return NULL; } |
1499 | static inline struct pci_dev *pci_dev_get(struct pci_dev *dev) { return NULL; } |
1519 | static inline int pci_get_new_domain_nr(void) { return -ENOSYS; } |
1500 | static inline int pci_get_new_domain_nr(void) { return -ENOSYS; } |
1520 | 1501 | ||
1521 | #define dev_is_pci(d) (false) |
1502 | #define dev_is_pci(d) (false) |
1522 | #define dev_is_pf(d) (false) |
1503 | #define dev_is_pf(d) (false) |
1523 | #define dev_num_vf(d) (0) |
1504 | #define dev_num_vf(d) (0) |
1524 | #endif /* CONFIG_PCI */ |
1505 | #endif /* CONFIG_PCI */ |
1525 | 1506 | ||
1526 | /* Include architecture-dependent settings and functions */ |
1507 | /* Include architecture-dependent settings and functions */ |
1527 | 1508 | ||
1528 | #include |
1509 | #include |
1529 | 1510 | ||
1530 | /* these helpers provide future and backwards compatibility |
1511 | /* these helpers provide future and backwards compatibility |
1531 | * for accessing popular PCI BAR info */ |
1512 | * for accessing popular PCI BAR info */ |
1532 | #define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start) |
1513 | #define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start) |
1533 | #define pci_resource_end(dev, bar) ((dev)->resource[(bar)].end) |
1514 | #define pci_resource_end(dev, bar) ((dev)->resource[(bar)].end) |
1534 | #define pci_resource_flags(dev, bar) ((dev)->resource[(bar)].flags) |
1515 | #define pci_resource_flags(dev, bar) ((dev)->resource[(bar)].flags) |
1535 | #define pci_resource_len(dev,bar) \ |
1516 | #define pci_resource_len(dev,bar) \ |
1536 | ((pci_resource_start((dev), (bar)) == 0 && \ |
1517 | ((pci_resource_start((dev), (bar)) == 0 && \ |
1537 | pci_resource_end((dev), (bar)) == \ |
1518 | pci_resource_end((dev), (bar)) == \ |
1538 | pci_resource_start((dev), (bar))) ? 0 : \ |
1519 | pci_resource_start((dev), (bar))) ? 0 : \ |
1539 | \ |
1520 | \ |
1540 | (pci_resource_end((dev), (bar)) - \ |
1521 | (pci_resource_end((dev), (bar)) - \ |
1541 | pci_resource_start((dev), (bar)) + 1)) |
1522 | pci_resource_start((dev), (bar)) + 1)) |
1542 | 1523 | ||
1543 | /* Similar to the helpers above, these manipulate per-pci_dev |
1524 | /* Similar to the helpers above, these manipulate per-pci_dev |
1544 | * driver-specific data. They are really just a wrapper around |
1525 | * driver-specific data. They are really just a wrapper around |
1545 | * the generic device structure functions of these calls. |
1526 | * the generic device structure functions of these calls. |
1546 | */ |
1527 | */ |
1547 | static inline void *pci_get_drvdata(struct pci_dev *pdev) |
1528 | static inline void *pci_get_drvdata(struct pci_dev *pdev) |
1548 | { |
1529 | { |
1549 | return dev_get_drvdata(&pdev->dev); |
1530 | return dev_get_drvdata(&pdev->dev); |
1550 | } |
1531 | } |
1551 | 1532 | ||
1552 | static inline void pci_set_drvdata(struct pci_dev *pdev, void *data) |
1533 | static inline void pci_set_drvdata(struct pci_dev *pdev, void *data) |
1553 | { |
1534 | { |
1554 | dev_set_drvdata(&pdev->dev, data); |
1535 | dev_set_drvdata(&pdev->dev, data); |
1555 | } |
1536 | } |
1556 | 1537 | ||
1557 | /* If you want to know what to call your pci_dev, ask this function. |
1538 | /* If you want to know what to call your pci_dev, ask this function. |
1558 | * Again, it's a wrapper around the generic device. |
1539 | * Again, it's a wrapper around the generic device. |
1559 | */ |
1540 | */ |
1560 | static inline const char *pci_name(const struct pci_dev *pdev) |
1541 | static inline const char *pci_name(const struct pci_dev *pdev) |
1561 | { |
1542 | { |
1562 | return dev_name(&pdev->dev); |
1543 | return dev_name(&pdev->dev); |
1563 | } |
1544 | } |
1564 | 1545 | ||
1565 | 1546 | ||
1566 | /* Some archs don't want to expose struct resource to userland as-is |
1547 | /* Some archs don't want to expose struct resource to userland as-is |
1567 | * in sysfs and /proc |
1548 | * in sysfs and /proc |
1568 | */ |
1549 | */ |
1569 | #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER |
1550 | #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER |
1570 | static inline void pci_resource_to_user(const struct pci_dev *dev, int bar, |
1551 | static inline void pci_resource_to_user(const struct pci_dev *dev, int bar, |
1571 | const struct resource *rsrc, resource_size_t *start, |
1552 | const struct resource *rsrc, resource_size_t *start, |
1572 | resource_size_t *end) |
1553 | resource_size_t *end) |
1573 | { |
1554 | { |
1574 | *start = rsrc->start; |
1555 | *start = rsrc->start; |
1575 | *end = rsrc->end; |
1556 | *end = rsrc->end; |
1576 | } |
1557 | } |
1577 | #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */ |
1558 | #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */ |
1578 | 1559 | ||
1579 | 1560 | ||
1580 | /* |
1561 | /* |
1581 | * The world is not perfect and supplies us with broken PCI devices. |
1562 | * The world is not perfect and supplies us with broken PCI devices. |
1582 | * For at least a part of these bugs we need a work-around, so both |
1563 | * For at least a part of these bugs we need a work-around, so both |
1583 | * generic (drivers/pci/quirks.c) and per-architecture code can define |
1564 | * generic (drivers/pci/quirks.c) and per-architecture code can define |
1584 | * fixup hooks to be called for particular buggy devices. |
1565 | * fixup hooks to be called for particular buggy devices. |
1585 | */ |
1566 | */ |
1586 | 1567 | ||
1587 | struct pci_fixup { |
1568 | struct pci_fixup { |
1588 | u16 vendor; /* You can use PCI_ANY_ID here of course */ |
1569 | u16 vendor; /* You can use PCI_ANY_ID here of course */ |
1589 | u16 device; /* You can use PCI_ANY_ID here of course */ |
1570 | u16 device; /* You can use PCI_ANY_ID here of course */ |
1590 | u32 class; /* You can use PCI_ANY_ID here too */ |
1571 | u32 class; /* You can use PCI_ANY_ID here too */ |
1591 | unsigned int class_shift; /* should be 0, 8, 16 */ |
1572 | unsigned int class_shift; /* should be 0, 8, 16 */ |
1592 | void (*hook)(struct pci_dev *dev); |
1573 | void (*hook)(struct pci_dev *dev); |
1593 | }; |
1574 | }; |
1594 | 1575 | ||
1595 | enum pci_fixup_pass { |
1576 | enum pci_fixup_pass { |
1596 | pci_fixup_early, /* Before probing BARs */ |
1577 | pci_fixup_early, /* Before probing BARs */ |
1597 | pci_fixup_header, /* After reading configuration header */ |
1578 | pci_fixup_header, /* After reading configuration header */ |
1598 | pci_fixup_final, /* Final phase of device fixups */ |
1579 | pci_fixup_final, /* Final phase of device fixups */ |
1599 | pci_fixup_enable, /* pci_enable_device() time */ |
1580 | pci_fixup_enable, /* pci_enable_device() time */ |
1600 | pci_fixup_resume, /* pci_device_resume() */ |
1581 | pci_fixup_resume, /* pci_device_resume() */ |
1601 | pci_fixup_suspend, /* pci_device_suspend() */ |
1582 | pci_fixup_suspend, /* pci_device_suspend() */ |
1602 | pci_fixup_resume_early, /* pci_device_resume_early() */ |
1583 | pci_fixup_resume_early, /* pci_device_resume_early() */ |
1603 | pci_fixup_suspend_late, /* pci_device_suspend_late() */ |
1584 | pci_fixup_suspend_late, /* pci_device_suspend_late() */ |
1604 | }; |
1585 | }; |
1605 | 1586 | ||
1606 | /* Anonymous variables would be nice... */ |
1587 | /* Anonymous variables would be nice... */ |
1607 | #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, class, \ |
1588 | #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, class, \ |
1608 | class_shift, hook) \ |
1589 | class_shift, hook) \ |
1609 | static const struct pci_fixup __PASTE(__pci_fixup_##name,__LINE__) __used \ |
1590 | static const struct pci_fixup __PASTE(__pci_fixup_##name,__LINE__) __used \ |
1610 | __attribute__((__section__(#section), aligned((sizeof(void *))))) \ |
1591 | __attribute__((__section__(#section), aligned((sizeof(void *))))) \ |
1611 | = { vendor, device, class, class_shift, hook }; |
1592 | = { vendor, device, class, class_shift, hook }; |
1612 | 1593 | ||
1613 | #define DECLARE_PCI_FIXUP_CLASS_EARLY(vendor, device, class, \ |
1594 | #define DECLARE_PCI_FIXUP_CLASS_EARLY(vendor, device, class, \ |
1614 | class_shift, hook) \ |
1595 | class_shift, hook) \ |
1615 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \ |
1596 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \ |
1616 | hook, vendor, device, class, class_shift, hook) |
1597 | hook, vendor, device, class, class_shift, hook) |
1617 | #define DECLARE_PCI_FIXUP_CLASS_HEADER(vendor, device, class, \ |
1598 | #define DECLARE_PCI_FIXUP_CLASS_HEADER(vendor, device, class, \ |
1618 | class_shift, hook) \ |
1599 | class_shift, hook) \ |
1619 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \ |
1600 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \ |
1620 | hook, vendor, device, class, class_shift, hook) |
1601 | hook, vendor, device, class, class_shift, hook) |
1621 | #define DECLARE_PCI_FIXUP_CLASS_FINAL(vendor, device, class, \ |
1602 | #define DECLARE_PCI_FIXUP_CLASS_FINAL(vendor, device, class, \ |
1622 | class_shift, hook) \ |
1603 | class_shift, hook) \ |
1623 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \ |
1604 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \ |
1624 | hook, vendor, device, class, class_shift, hook) |
1605 | hook, vendor, device, class, class_shift, hook) |
1625 | #define DECLARE_PCI_FIXUP_CLASS_ENABLE(vendor, device, class, \ |
1606 | #define DECLARE_PCI_FIXUP_CLASS_ENABLE(vendor, device, class, \ |
1626 | class_shift, hook) \ |
1607 | class_shift, hook) \ |
1627 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \ |
1608 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \ |
1628 | hook, vendor, device, class, class_shift, hook) |
1609 | hook, vendor, device, class, class_shift, hook) |
1629 | #define DECLARE_PCI_FIXUP_CLASS_RESUME(vendor, device, class, \ |
1610 | #define DECLARE_PCI_FIXUP_CLASS_RESUME(vendor, device, class, \ |
1630 | class_shift, hook) \ |
1611 | class_shift, hook) \ |
1631 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \ |
1612 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \ |
1632 | resume##hook, vendor, device, class, \ |
1613 | resume##hook, vendor, device, class, \ |
1633 | class_shift, hook) |
1614 | class_shift, hook) |
1634 | #define DECLARE_PCI_FIXUP_CLASS_RESUME_EARLY(vendor, device, class, \ |
1615 | #define DECLARE_PCI_FIXUP_CLASS_RESUME_EARLY(vendor, device, class, \ |
1635 | class_shift, hook) \ |
1616 | class_shift, hook) \ |
1636 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \ |
1617 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \ |
1637 | resume_early##hook, vendor, device, \ |
1618 | resume_early##hook, vendor, device, \ |
1638 | class, class_shift, hook) |
1619 | class, class_shift, hook) |
1639 | #define DECLARE_PCI_FIXUP_CLASS_SUSPEND(vendor, device, class, \ |
1620 | #define DECLARE_PCI_FIXUP_CLASS_SUSPEND(vendor, device, class, \ |
1640 | class_shift, hook) \ |
1621 | class_shift, hook) \ |
1641 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \ |
1622 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \ |
1642 | suspend##hook, vendor, device, class, \ |
1623 | suspend##hook, vendor, device, class, \ |
1643 | class_shift, hook) |
1624 | class_shift, hook) |
1644 | #define DECLARE_PCI_FIXUP_CLASS_SUSPEND_LATE(vendor, device, class, \ |
1625 | #define DECLARE_PCI_FIXUP_CLASS_SUSPEND_LATE(vendor, device, class, \ |
1645 | class_shift, hook) \ |
1626 | class_shift, hook) \ |
1646 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend_late, \ |
1627 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend_late, \ |
1647 | suspend_late##hook, vendor, device, \ |
1628 | suspend_late##hook, vendor, device, \ |
1648 | class, class_shift, hook) |
1629 | class, class_shift, hook) |
1649 | 1630 | ||
1650 | #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \ |
1631 | #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \ |
1651 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \ |
1632 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \ |
1652 | hook, vendor, device, PCI_ANY_ID, 0, hook) |
1633 | hook, vendor, device, PCI_ANY_ID, 0, hook) |
1653 | #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \ |
1634 | #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \ |
1654 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \ |
1635 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \ |
1655 | hook, vendor, device, PCI_ANY_ID, 0, hook) |
1636 | hook, vendor, device, PCI_ANY_ID, 0, hook) |
1656 | #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \ |
1637 | #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \ |
1657 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \ |
1638 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \ |
1658 | hook, vendor, device, PCI_ANY_ID, 0, hook) |
1639 | hook, vendor, device, PCI_ANY_ID, 0, hook) |
1659 | #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \ |
1640 | #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \ |
1660 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \ |
1641 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \ |
1661 | hook, vendor, device, PCI_ANY_ID, 0, hook) |
1642 | hook, vendor, device, PCI_ANY_ID, 0, hook) |
1662 | #define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \ |
1643 | #define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \ |
1663 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \ |
1644 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \ |
1664 | resume##hook, vendor, device, \ |
1645 | resume##hook, vendor, device, \ |
1665 | PCI_ANY_ID, 0, hook) |
1646 | PCI_ANY_ID, 0, hook) |
1666 | #define DECLARE_PCI_FIXUP_RESUME_EARLY(vendor, device, hook) \ |
1647 | #define DECLARE_PCI_FIXUP_RESUME_EARLY(vendor, device, hook) \ |
1667 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \ |
1648 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \ |
1668 | resume_early##hook, vendor, device, \ |
1649 | resume_early##hook, vendor, device, \ |
1669 | PCI_ANY_ID, 0, hook) |
1650 | PCI_ANY_ID, 0, hook) |
1670 | #define DECLARE_PCI_FIXUP_SUSPEND(vendor, device, hook) \ |
1651 | #define DECLARE_PCI_FIXUP_SUSPEND(vendor, device, hook) \ |
1671 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \ |
1652 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \ |
1672 | suspend##hook, vendor, device, \ |
1653 | suspend##hook, vendor, device, \ |
1673 | PCI_ANY_ID, 0, hook) |
1654 | PCI_ANY_ID, 0, hook) |
1674 | #define DECLARE_PCI_FIXUP_SUSPEND_LATE(vendor, device, hook) \ |
1655 | #define DECLARE_PCI_FIXUP_SUSPEND_LATE(vendor, device, hook) \ |
1675 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend_late, \ |
1656 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend_late, \ |
1676 | suspend_late##hook, vendor, device, \ |
1657 | suspend_late##hook, vendor, device, \ |
1677 | PCI_ANY_ID, 0, hook) |
1658 | PCI_ANY_ID, 0, hook) |
1678 | 1659 | ||
1679 | #ifdef CONFIG_PCI_QUIRKS |
1660 | #ifdef CONFIG_PCI_QUIRKS |
1680 | void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev); |
1661 | void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev); |
1681 | int pci_dev_specific_acs_enabled(struct pci_dev *dev, u16 acs_flags); |
1662 | int pci_dev_specific_acs_enabled(struct pci_dev *dev, u16 acs_flags); |
1682 | void pci_dev_specific_enable_acs(struct pci_dev *dev); |
1663 | void pci_dev_specific_enable_acs(struct pci_dev *dev); |
1683 | #else |
1664 | #else |
1684 | static inline void pci_fixup_device(enum pci_fixup_pass pass, |
1665 | static inline void pci_fixup_device(enum pci_fixup_pass pass, |
1685 | struct pci_dev *dev) { } |
1666 | struct pci_dev *dev) { } |
1686 | static inline int pci_dev_specific_acs_enabled(struct pci_dev *dev, |
1667 | static inline int pci_dev_specific_acs_enabled(struct pci_dev *dev, |
1687 | u16 acs_flags) |
1668 | u16 acs_flags) |
1688 | { |
1669 | { |
1689 | return -ENOTTY; |
1670 | return -ENOTTY; |
1690 | } |
1671 | } |
1691 | static inline void pci_dev_specific_enable_acs(struct pci_dev *dev) { } |
1672 | static inline void pci_dev_specific_enable_acs(struct pci_dev *dev) { } |
1692 | #endif |
1673 | #endif |
1693 | 1674 | ||
1694 | void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen); |
1675 | void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen); |
1695 | void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr); |
1676 | void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr); |
1696 | void __iomem * const *pcim_iomap_table(struct pci_dev *pdev); |
1677 | void __iomem * const *pcim_iomap_table(struct pci_dev *pdev); |
1697 | int pcim_iomap_regions(struct pci_dev *pdev, int mask, const char *name); |
1678 | int pcim_iomap_regions(struct pci_dev *pdev, int mask, const char *name); |
1698 | int pcim_iomap_regions_request_all(struct pci_dev *pdev, int mask, |
1679 | int pcim_iomap_regions_request_all(struct pci_dev *pdev, int mask, |
1699 | const char *name); |
1680 | const char *name); |
1700 | void pcim_iounmap_regions(struct pci_dev *pdev, int mask); |
1681 | void pcim_iounmap_regions(struct pci_dev *pdev, int mask); |
1701 | 1682 | ||
1702 | extern int pci_pci_problems; |
1683 | extern int pci_pci_problems; |
1703 | #define PCIPCI_FAIL 1 /* No PCI PCI DMA */ |
1684 | #define PCIPCI_FAIL 1 /* No PCI PCI DMA */ |
1704 | #define PCIPCI_TRITON 2 |
1685 | #define PCIPCI_TRITON 2 |
1705 | #define PCIPCI_NATOMA 4 |
1686 | #define PCIPCI_NATOMA 4 |
1706 | #define PCIPCI_VIAETBF 8 |
1687 | #define PCIPCI_VIAETBF 8 |
1707 | #define PCIPCI_VSFX 16 |
1688 | #define PCIPCI_VSFX 16 |
1708 | #define PCIPCI_ALIMAGIK 32 /* Need low latency setting */ |
1689 | #define PCIPCI_ALIMAGIK 32 /* Need low latency setting */ |
1709 | #define PCIAGP_FAIL 64 /* No PCI to AGP DMA */ |
1690 | #define PCIAGP_FAIL 64 /* No PCI to AGP DMA */ |
1710 | 1691 | ||
1711 | extern unsigned long pci_cardbus_io_size; |
1692 | extern unsigned long pci_cardbus_io_size; |
1712 | extern unsigned long pci_cardbus_mem_size; |
1693 | extern unsigned long pci_cardbus_mem_size; |
1713 | extern u8 pci_dfl_cache_line_size; |
1694 | extern u8 pci_dfl_cache_line_size; |
1714 | extern u8 pci_cache_line_size; |
1695 | extern u8 pci_cache_line_size; |
1715 | 1696 | ||
1716 | extern unsigned long pci_hotplug_io_size; |
1697 | extern unsigned long pci_hotplug_io_size; |
1717 | extern unsigned long pci_hotplug_mem_size; |
1698 | extern unsigned long pci_hotplug_mem_size; |
1718 | 1699 | ||
1719 | /* Architecture-specific versions may override these (weak) */ |
1700 | /* Architecture-specific versions may override these (weak) */ |
1720 | void pcibios_disable_device(struct pci_dev *dev); |
1701 | void pcibios_disable_device(struct pci_dev *dev); |
1721 | void pcibios_set_master(struct pci_dev *dev); |
1702 | void pcibios_set_master(struct pci_dev *dev); |
1722 | int pcibios_set_pcie_reset_state(struct pci_dev *dev, |
1703 | int pcibios_set_pcie_reset_state(struct pci_dev *dev, |
1723 | enum pcie_reset_state state); |
1704 | enum pcie_reset_state state); |
1724 | int pcibios_add_device(struct pci_dev *dev); |
1705 | int pcibios_add_device(struct pci_dev *dev); |
1725 | void pcibios_release_device(struct pci_dev *dev); |
1706 | void pcibios_release_device(struct pci_dev *dev); |
1726 | void pcibios_penalize_isa_irq(int irq, int active); |
1707 | void pcibios_penalize_isa_irq(int irq, int active); |
1727 | int pcibios_alloc_irq(struct pci_dev *dev); |
1708 | int pcibios_alloc_irq(struct pci_dev *dev); |
1728 | void pcibios_free_irq(struct pci_dev *dev); |
1709 | void pcibios_free_irq(struct pci_dev *dev); |
1729 | 1710 | ||
1730 | #ifdef CONFIG_HIBERNATE_CALLBACKS |
1711 | #ifdef CONFIG_HIBERNATE_CALLBACKS |
1731 | extern struct dev_pm_ops pcibios_pm_ops; |
1712 | extern struct dev_pm_ops pcibios_pm_ops; |
1732 | #endif |
1713 | #endif |
1733 | 1714 | ||
1734 | #ifdef CONFIG_PCI_MMCONFIG |
1715 | #ifdef CONFIG_PCI_MMCONFIG |
1735 | void __init pci_mmcfg_early_init(void); |
1716 | void __init pci_mmcfg_early_init(void); |
1736 | void __init pci_mmcfg_late_init(void); |
1717 | void __init pci_mmcfg_late_init(void); |
1737 | #else |
1718 | #else |
1738 | static inline void pci_mmcfg_early_init(void) { } |
1719 | static inline void pci_mmcfg_early_init(void) { } |
1739 | static inline void pci_mmcfg_late_init(void) { } |
1720 | static inline void pci_mmcfg_late_init(void) { } |
1740 | #endif |
1721 | #endif |
1741 | 1722 | ||
1742 | int pci_ext_cfg_avail(void); |
1723 | int pci_ext_cfg_avail(void); |
1743 | 1724 | ||
1744 | void __iomem *pci_ioremap_bar(struct pci_dev *pdev, int bar); |
1725 | void __iomem *pci_ioremap_bar(struct pci_dev *pdev, int bar); |
1745 | void __iomem *pci_ioremap_wc_bar(struct pci_dev *pdev, int bar); |
1726 | void __iomem *pci_ioremap_wc_bar(struct pci_dev *pdev, int bar); |
1746 | 1727 | ||
1747 | #ifdef CONFIG_PCI_IOV |
1728 | #ifdef CONFIG_PCI_IOV |
1748 | int pci_iov_virtfn_bus(struct pci_dev *dev, int id); |
1729 | int pci_iov_virtfn_bus(struct pci_dev *dev, int id); |
1749 | int pci_iov_virtfn_devfn(struct pci_dev *dev, int id); |
1730 | int pci_iov_virtfn_devfn(struct pci_dev *dev, int id); |
1750 | 1731 | ||
1751 | int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn); |
1732 | int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn); |
1752 | void pci_disable_sriov(struct pci_dev *dev); |
1733 | void pci_disable_sriov(struct pci_dev *dev); |
1753 | int pci_num_vf(struct pci_dev *dev); |
1734 | int pci_num_vf(struct pci_dev *dev); |
1754 | int pci_vfs_assigned(struct pci_dev *dev); |
1735 | int pci_vfs_assigned(struct pci_dev *dev); |
1755 | int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs); |
1736 | int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs); |
1756 | int pci_sriov_get_totalvfs(struct pci_dev *dev); |
1737 | int pci_sriov_get_totalvfs(struct pci_dev *dev); |
1757 | resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno); |
1738 | resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno); |
1758 | #else |
1739 | #else |
1759 | static inline int pci_iov_virtfn_bus(struct pci_dev *dev, int id) |
1740 | static inline int pci_iov_virtfn_bus(struct pci_dev *dev, int id) |
1760 | { |
1741 | { |
1761 | return -ENOSYS; |
1742 | return -ENOSYS; |
1762 | } |
1743 | } |
1763 | static inline int pci_iov_virtfn_devfn(struct pci_dev *dev, int id) |
1744 | static inline int pci_iov_virtfn_devfn(struct pci_dev *dev, int id) |
1764 | { |
1745 | { |
1765 | return -ENOSYS; |
1746 | return -ENOSYS; |
1766 | } |
1747 | } |
1767 | static inline int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn) |
1748 | static inline int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn) |
1768 | { return -ENODEV; } |
1749 | { return -ENODEV; } |
1769 | static inline void pci_disable_sriov(struct pci_dev *dev) { } |
1750 | static inline void pci_disable_sriov(struct pci_dev *dev) { } |
1770 | static inline int pci_num_vf(struct pci_dev *dev) { return 0; } |
1751 | static inline int pci_num_vf(struct pci_dev *dev) { return 0; } |
1771 | static inline int pci_vfs_assigned(struct pci_dev *dev) |
1752 | static inline int pci_vfs_assigned(struct pci_dev *dev) |
1772 | { return 0; } |
1753 | { return 0; } |
1773 | static inline int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs) |
1754 | static inline int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs) |
1774 | { return 0; } |
1755 | { return 0; } |
1775 | static inline int pci_sriov_get_totalvfs(struct pci_dev *dev) |
1756 | static inline int pci_sriov_get_totalvfs(struct pci_dev *dev) |
1776 | { return 0; } |
1757 | { return 0; } |
1777 | static inline resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno) |
1758 | static inline resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno) |
1778 | { return 0; } |
1759 | { return 0; } |
1779 | #endif |
1760 | #endif |
1780 | 1761 | ||
1781 | #if defined(CONFIG_HOTPLUG_PCI) || defined(CONFIG_HOTPLUG_PCI_MODULE) |
1762 | #if defined(CONFIG_HOTPLUG_PCI) || defined(CONFIG_HOTPLUG_PCI_MODULE) |
1782 | void pci_hp_create_module_link(struct pci_slot *pci_slot); |
1763 | void pci_hp_create_module_link(struct pci_slot *pci_slot); |
1783 | void pci_hp_remove_module_link(struct pci_slot *pci_slot); |
1764 | void pci_hp_remove_module_link(struct pci_slot *pci_slot); |
1784 | #endif |
1765 | #endif |
1785 | 1766 | ||
1786 | /** |
1767 | /** |
1787 | * pci_pcie_cap - get the saved PCIe capability offset |
1768 | * pci_pcie_cap - get the saved PCIe capability offset |
1788 | * @dev: PCI device |
1769 | * @dev: PCI device |
1789 | * |
1770 | * |
1790 | * PCIe capability offset is calculated at PCI device initialization |
1771 | * PCIe capability offset is calculated at PCI device initialization |
1791 | * time and saved in the data structure. This function returns saved |
1772 | * time and saved in the data structure. This function returns saved |
1792 | * PCIe capability offset. Using this instead of pci_find_capability() |
1773 | * PCIe capability offset. Using this instead of pci_find_capability() |
1793 | * reduces unnecessary search in the PCI configuration space. If you |
1774 | * reduces unnecessary search in the PCI configuration space. If you |
1794 | * need to calculate PCIe capability offset from raw device for some |
1775 | * need to calculate PCIe capability offset from raw device for some |
1795 | * reasons, please use pci_find_capability() instead. |
1776 | * reasons, please use pci_find_capability() instead. |
1796 | */ |
1777 | */ |
1797 | static inline int pci_pcie_cap(struct pci_dev *dev) |
1778 | static inline int pci_pcie_cap(struct pci_dev *dev) |
1798 | { |
1779 | { |
1799 | return dev->pcie_cap; |
1780 | return dev->pcie_cap; |
1800 | } |
1781 | } |
1801 | 1782 | ||
1802 | /** |
1783 | /** |
1803 | * pci_is_pcie - check if the PCI device is PCI Express capable |
1784 | * pci_is_pcie - check if the PCI device is PCI Express capable |
1804 | * @dev: PCI device |
1785 | * @dev: PCI device |
1805 | * |
1786 | * |
1806 | * Returns: true if the PCI device is PCI Express capable, false otherwise. |
1787 | * Returns: true if the PCI device is PCI Express capable, false otherwise. |
1807 | */ |
1788 | */ |
1808 | static inline bool pci_is_pcie(struct pci_dev *dev) |
1789 | static inline bool pci_is_pcie(struct pci_dev *dev) |
1809 | { |
1790 | { |
1810 | return pci_pcie_cap(dev); |
1791 | return pci_pcie_cap(dev); |
1811 | } |
1792 | } |
1812 | 1793 | ||
1813 | /** |
1794 | /** |
1814 | * pcie_caps_reg - get the PCIe Capabilities Register |
1795 | * pcie_caps_reg - get the PCIe Capabilities Register |
1815 | * @dev: PCI device |
1796 | * @dev: PCI device |
1816 | */ |
1797 | */ |
1817 | static inline u16 pcie_caps_reg(const struct pci_dev *dev) |
1798 | static inline u16 pcie_caps_reg(const struct pci_dev *dev) |
1818 | { |
1799 | { |
1819 | return dev->pcie_flags_reg; |
1800 | return dev->pcie_flags_reg; |
1820 | } |
1801 | } |
1821 | 1802 | ||
1822 | /** |
1803 | /** |
1823 | * pci_pcie_type - get the PCIe device/port type |
1804 | * pci_pcie_type - get the PCIe device/port type |
1824 | * @dev: PCI device |
1805 | * @dev: PCI device |
1825 | */ |
1806 | */ |
1826 | static inline int pci_pcie_type(const struct pci_dev *dev) |
1807 | static inline int pci_pcie_type(const struct pci_dev *dev) |
1827 | { |
1808 | { |
1828 | return (pcie_caps_reg(dev) & PCI_EXP_FLAGS_TYPE) >> 4; |
1809 | return (pcie_caps_reg(dev) & PCI_EXP_FLAGS_TYPE) >> 4; |
1829 | } |
1810 | } |
1830 | 1811 | ||
1831 | void pci_request_acs(void); |
1812 | void pci_request_acs(void); |
1832 | bool pci_acs_enabled(struct pci_dev *pdev, u16 acs_flags); |
1813 | bool pci_acs_enabled(struct pci_dev *pdev, u16 acs_flags); |
1833 | bool pci_acs_path_enabled(struct pci_dev *start, |
1814 | bool pci_acs_path_enabled(struct pci_dev *start, |
1834 | struct pci_dev *end, u16 acs_flags); |
1815 | struct pci_dev *end, u16 acs_flags); |
1835 | 1816 | ||
1836 | #define PCI_VPD_LRDT 0x80 /* Large Resource Data Type */ |
1817 | #define PCI_VPD_LRDT 0x80 /* Large Resource Data Type */ |
1837 | #define PCI_VPD_LRDT_ID(x) ((x) | PCI_VPD_LRDT) |
1818 | #define PCI_VPD_LRDT_ID(x) ((x) | PCI_VPD_LRDT) |
1838 | 1819 | ||
1839 | /* Large Resource Data Type Tag Item Names */ |
1820 | /* Large Resource Data Type Tag Item Names */ |
1840 | #define PCI_VPD_LTIN_ID_STRING 0x02 /* Identifier String */ |
1821 | #define PCI_VPD_LTIN_ID_STRING 0x02 /* Identifier String */ |
1841 | #define PCI_VPD_LTIN_RO_DATA 0x10 /* Read-Only Data */ |
1822 | #define PCI_VPD_LTIN_RO_DATA 0x10 /* Read-Only Data */ |
1842 | #define PCI_VPD_LTIN_RW_DATA 0x11 /* Read-Write Data */ |
1823 | #define PCI_VPD_LTIN_RW_DATA 0x11 /* Read-Write Data */ |
1843 | 1824 | ||
1844 | #define PCI_VPD_LRDT_ID_STRING PCI_VPD_LRDT_ID(PCI_VPD_LTIN_ID_STRING) |
1825 | #define PCI_VPD_LRDT_ID_STRING PCI_VPD_LRDT_ID(PCI_VPD_LTIN_ID_STRING) |
1845 | #define PCI_VPD_LRDT_RO_DATA PCI_VPD_LRDT_ID(PCI_VPD_LTIN_RO_DATA) |
1826 | #define PCI_VPD_LRDT_RO_DATA PCI_VPD_LRDT_ID(PCI_VPD_LTIN_RO_DATA) |
1846 | #define PCI_VPD_LRDT_RW_DATA PCI_VPD_LRDT_ID(PCI_VPD_LTIN_RW_DATA) |
1827 | #define PCI_VPD_LRDT_RW_DATA PCI_VPD_LRDT_ID(PCI_VPD_LTIN_RW_DATA) |
1847 | 1828 | ||
1848 | /* Small Resource Data Type Tag Item Names */ |
1829 | /* Small Resource Data Type Tag Item Names */ |
1849 | #define PCI_VPD_STIN_END 0x78 /* End */ |
1830 | #define PCI_VPD_STIN_END 0x78 /* End */ |
1850 | 1831 | ||
1851 | #define PCI_VPD_SRDT_END PCI_VPD_STIN_END |
1832 | #define PCI_VPD_SRDT_END PCI_VPD_STIN_END |
1852 | 1833 | ||
1853 | #define PCI_VPD_SRDT_TIN_MASK 0x78 |
1834 | #define PCI_VPD_SRDT_TIN_MASK 0x78 |
1854 | #define PCI_VPD_SRDT_LEN_MASK 0x07 |
1835 | #define PCI_VPD_SRDT_LEN_MASK 0x07 |
1855 | 1836 | ||
1856 | #define PCI_VPD_LRDT_TAG_SIZE 3 |
1837 | #define PCI_VPD_LRDT_TAG_SIZE 3 |
1857 | #define PCI_VPD_SRDT_TAG_SIZE 1 |
1838 | #define PCI_VPD_SRDT_TAG_SIZE 1 |
1858 | 1839 | ||
1859 | #define PCI_VPD_INFO_FLD_HDR_SIZE 3 |
1840 | #define PCI_VPD_INFO_FLD_HDR_SIZE 3 |
1860 | 1841 | ||
1861 | #define PCI_VPD_RO_KEYWORD_PARTNO "PN" |
1842 | #define PCI_VPD_RO_KEYWORD_PARTNO "PN" |
1862 | #define PCI_VPD_RO_KEYWORD_MFR_ID "MN" |
1843 | #define PCI_VPD_RO_KEYWORD_MFR_ID "MN" |
1863 | #define PCI_VPD_RO_KEYWORD_VENDOR0 "V0" |
1844 | #define PCI_VPD_RO_KEYWORD_VENDOR0 "V0" |
1864 | #define PCI_VPD_RO_KEYWORD_CHKSUM "RV" |
1845 | #define PCI_VPD_RO_KEYWORD_CHKSUM "RV" |
1865 | 1846 | ||
1866 | /** |
1847 | /** |
1867 | * pci_vpd_lrdt_size - Extracts the Large Resource Data Type length |
1848 | * pci_vpd_lrdt_size - Extracts the Large Resource Data Type length |
1868 | * @lrdt: Pointer to the beginning of the Large Resource Data Type tag |
1849 | * @lrdt: Pointer to the beginning of the Large Resource Data Type tag |
1869 | * |
1850 | * |
1870 | * Returns the extracted Large Resource Data Type length. |
1851 | * Returns the extracted Large Resource Data Type length. |
1871 | */ |
1852 | */ |
1872 | static inline u16 pci_vpd_lrdt_size(const u8 *lrdt) |
1853 | static inline u16 pci_vpd_lrdt_size(const u8 *lrdt) |
1873 | { |
1854 | { |
1874 | return (u16)lrdt[1] + ((u16)lrdt[2] << 8); |
1855 | return (u16)lrdt[1] + ((u16)lrdt[2] << 8); |
1875 | } |
1856 | } |
1876 | 1857 | ||
1877 | /** |
1858 | /** |
1878 | * pci_vpd_srdt_size - Extracts the Small Resource Data Type length |
1859 | * pci_vpd_srdt_size - Extracts the Small Resource Data Type length |
1879 | * @lrdt: Pointer to the beginning of the Small Resource Data Type tag |
1860 | * @lrdt: Pointer to the beginning of the Small Resource Data Type tag |
1880 | * |
1861 | * |
1881 | * Returns the extracted Small Resource Data Type length. |
1862 | * Returns the extracted Small Resource Data Type length. |
1882 | */ |
1863 | */ |
1883 | static inline u8 pci_vpd_srdt_size(const u8 *srdt) |
1864 | static inline u8 pci_vpd_srdt_size(const u8 *srdt) |
1884 | { |
1865 | { |
1885 | return (*srdt) & PCI_VPD_SRDT_LEN_MASK; |
1866 | return (*srdt) & PCI_VPD_SRDT_LEN_MASK; |
1886 | } |
1867 | } |
1887 | 1868 | ||
1888 | /** |
1869 | /** |
1889 | * pci_vpd_info_field_size - Extracts the information field length |
1870 | * pci_vpd_info_field_size - Extracts the information field length |
1890 | * @lrdt: Pointer to the beginning of an information field header |
1871 | * @lrdt: Pointer to the beginning of an information field header |
1891 | * |
1872 | * |
1892 | * Returns the extracted information field length. |
1873 | * Returns the extracted information field length. |
1893 | */ |
1874 | */ |
1894 | static inline u8 pci_vpd_info_field_size(const u8 *info_field) |
1875 | static inline u8 pci_vpd_info_field_size(const u8 *info_field) |
1895 | { |
1876 | { |
1896 | return info_field[2]; |
1877 | return info_field[2]; |
1897 | } |
1878 | } |
1898 | 1879 | ||
1899 | /** |
1880 | /** |
1900 | * pci_vpd_find_tag - Locates the Resource Data Type tag provided |
1881 | * pci_vpd_find_tag - Locates the Resource Data Type tag provided |
1901 | * @buf: Pointer to buffered vpd data |
1882 | * @buf: Pointer to buffered vpd data |
1902 | * @off: The offset into the buffer at which to begin the search |
1883 | * @off: The offset into the buffer at which to begin the search |
1903 | * @len: The length of the vpd buffer |
1884 | * @len: The length of the vpd buffer |
1904 | * @rdt: The Resource Data Type to search for |
1885 | * @rdt: The Resource Data Type to search for |
1905 | * |
1886 | * |
1906 | * Returns the index where the Resource Data Type was found or |
1887 | * Returns the index where the Resource Data Type was found or |
1907 | * -ENOENT otherwise. |
1888 | * -ENOENT otherwise. |
1908 | */ |
1889 | */ |
1909 | int pci_vpd_find_tag(const u8 *buf, unsigned int off, unsigned int len, u8 rdt); |
1890 | int pci_vpd_find_tag(const u8 *buf, unsigned int off, unsigned int len, u8 rdt); |
1910 | 1891 | ||
1911 | /** |
1892 | /** |
1912 | * pci_vpd_find_info_keyword - Locates an information field keyword in the VPD |
1893 | * pci_vpd_find_info_keyword - Locates an information field keyword in the VPD |
1913 | * @buf: Pointer to buffered vpd data |
1894 | * @buf: Pointer to buffered vpd data |
1914 | * @off: The offset into the buffer at which to begin the search |
1895 | * @off: The offset into the buffer at which to begin the search |
1915 | * @len: The length of the buffer area, relative to off, in which to search |
1896 | * @len: The length of the buffer area, relative to off, in which to search |
1916 | * @kw: The keyword to search for |
1897 | * @kw: The keyword to search for |
1917 | * |
1898 | * |
1918 | * Returns the index where the information field keyword was found or |
1899 | * Returns the index where the information field keyword was found or |
1919 | * -ENOENT otherwise. |
1900 | * -ENOENT otherwise. |
1920 | */ |
1901 | */ |
1921 | int pci_vpd_find_info_keyword(const u8 *buf, unsigned int off, |
1902 | int pci_vpd_find_info_keyword(const u8 *buf, unsigned int off, |
1922 | unsigned int len, const char *kw); |
1903 | unsigned int len, const char *kw); |
1923 | 1904 | ||
1924 | /* PCI <-> OF binding helpers */ |
1905 | /* PCI <-> OF binding helpers */ |
1925 | #ifdef CONFIG_OF |
1906 | #ifdef CONFIG_OF |
1926 | struct device_node; |
1907 | struct device_node; |
1927 | struct irq_domain; |
1908 | struct irq_domain; |
1928 | void pci_set_of_node(struct pci_dev *dev); |
1909 | void pci_set_of_node(struct pci_dev *dev); |
1929 | void pci_release_of_node(struct pci_dev *dev); |
1910 | void pci_release_of_node(struct pci_dev *dev); |
1930 | void pci_set_bus_of_node(struct pci_bus *bus); |
1911 | void pci_set_bus_of_node(struct pci_bus *bus); |
1931 | void pci_release_bus_of_node(struct pci_bus *bus); |
1912 | void pci_release_bus_of_node(struct pci_bus *bus); |
1932 | struct irq_domain *pci_host_bridge_of_msi_domain(struct pci_bus *bus); |
1913 | struct irq_domain *pci_host_bridge_of_msi_domain(struct pci_bus *bus); |
1933 | 1914 | ||
1934 | /* Arch may override this (weak) */ |
1915 | /* Arch may override this (weak) */ |
1935 | struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus); |
1916 | struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus); |
1936 | 1917 | ||
1937 | static inline struct device_node * |
1918 | static inline struct device_node * |
1938 | pci_device_to_OF_node(const struct pci_dev *pdev) |
1919 | pci_device_to_OF_node(const struct pci_dev *pdev) |
1939 | { |
1920 | { |
1940 | return pdev ? pdev->dev.of_node : NULL; |
1921 | return pdev ? pdev->dev.of_node : NULL; |
1941 | } |
1922 | } |
1942 | 1923 | ||
1943 | static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus) |
1924 | static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus) |
1944 | { |
1925 | { |
1945 | return bus ? bus->dev.of_node : NULL; |
1926 | return bus ? bus->dev.of_node : NULL; |
1946 | } |
1927 | } |
1947 | 1928 | ||
1948 | #else /* CONFIG_OF */ |
1929 | #else /* CONFIG_OF */ |
1949 | static inline void pci_set_of_node(struct pci_dev *dev) { } |
1930 | static inline void pci_set_of_node(struct pci_dev *dev) { } |
1950 | static inline void pci_release_of_node(struct pci_dev *dev) { } |
1931 | static inline void pci_release_of_node(struct pci_dev *dev) { } |
1951 | static inline void pci_set_bus_of_node(struct pci_bus *bus) { } |
1932 | static inline void pci_set_bus_of_node(struct pci_bus *bus) { } |
1952 | static inline void pci_release_bus_of_node(struct pci_bus *bus) { } |
1933 | static inline void pci_release_bus_of_node(struct pci_bus *bus) { } |
1953 | static inline struct device_node * |
1934 | static inline struct device_node * |
1954 | pci_device_to_OF_node(const struct pci_dev *pdev) { return NULL; } |
1935 | pci_device_to_OF_node(const struct pci_dev *pdev) { return NULL; } |
1955 | static inline struct irq_domain * |
1936 | static inline struct irq_domain * |
1956 | pci_host_bridge_of_msi_domain(struct pci_bus *bus) { return NULL; } |
1937 | pci_host_bridge_of_msi_domain(struct pci_bus *bus) { return NULL; } |
1957 | #endif /* CONFIG_OF */ |
1938 | #endif /* CONFIG_OF */ |
- | 1939 | ||
- | 1940 | #ifdef CONFIG_ACPI |
|
- | 1941 | struct irq_domain *pci_host_bridge_acpi_msi_domain(struct pci_bus *bus); |
|
- | 1942 | ||
- | 1943 | void |
|
- | 1944 | pci_msi_register_fwnode_provider(struct fwnode_handle *(*fn)(struct device *)); |
|
- | 1945 | #else |
|
- | 1946 | static inline struct irq_domain * |
|
- | 1947 | pci_host_bridge_acpi_msi_domain(struct pci_bus *bus) { return NULL; } |
|
- | 1948 | #endif |
|
1958 | 1949 | ||
1959 | #ifdef CONFIG_EEH |
1950 | #ifdef CONFIG_EEH |
1960 | static inline struct eeh_dev *pci_dev_to_eeh_dev(struct pci_dev *pdev) |
1951 | static inline struct eeh_dev *pci_dev_to_eeh_dev(struct pci_dev *pdev) |
1961 | { |
1952 | { |
1962 | return pdev->dev.archdata.edev; |
1953 | return pdev->dev.archdata.edev; |
1963 | } |
1954 | } |
1964 | #endif |
1955 | #endif |
1965 | 1956 | ||
1966 | int pci_for_each_dma_alias(struct pci_dev *pdev, |
1957 | int pci_for_each_dma_alias(struct pci_dev *pdev, |
1967 | int (*fn)(struct pci_dev *pdev, |
1958 | int (*fn)(struct pci_dev *pdev, |
1968 | u16 alias, void *data), void *data); |
1959 | u16 alias, void *data), void *data); |
1969 | 1960 | ||
1970 | /* helper functions for operation of device flag */ |
1961 | /* helper functions for operation of device flag */ |
1971 | static inline void pci_set_dev_assigned(struct pci_dev *pdev) |
1962 | static inline void pci_set_dev_assigned(struct pci_dev *pdev) |
1972 | { |
1963 | { |
1973 | pdev->dev_flags |= PCI_DEV_FLAGS_ASSIGNED; |
1964 | pdev->dev_flags |= PCI_DEV_FLAGS_ASSIGNED; |
1974 | } |
1965 | } |
1975 | static inline void pci_clear_dev_assigned(struct pci_dev *pdev) |
1966 | static inline void pci_clear_dev_assigned(struct pci_dev *pdev) |
1976 | { |
1967 | { |
1977 | pdev->dev_flags &= ~PCI_DEV_FLAGS_ASSIGNED; |
1968 | pdev->dev_flags &= ~PCI_DEV_FLAGS_ASSIGNED; |
1978 | } |
1969 | } |
1979 | static inline bool pci_is_dev_assigned(struct pci_dev *pdev) |
1970 | static inline bool pci_is_dev_assigned(struct pci_dev *pdev) |
1980 | { |
1971 | { |
1981 | return (pdev->dev_flags & PCI_DEV_FLAGS_ASSIGNED) == PCI_DEV_FLAGS_ASSIGNED; |
1972 | return (pdev->dev_flags & PCI_DEV_FLAGS_ASSIGNED) == PCI_DEV_FLAGS_ASSIGNED; |
1982 | } |
1973 | } |
1983 | 1974 | ||
1984 | /** |
1975 | /** |
1985 | * pci_ari_enabled - query ARI forwarding status |
1976 | * pci_ari_enabled - query ARI forwarding status |
1986 | * @bus: the PCI bus |
1977 | * @bus: the PCI bus |
1987 | * |
1978 | * |
1988 | * Returns true if ARI forwarding is enabled. |
1979 | * Returns true if ARI forwarding is enabled. |
1989 | */ |
1980 | */ |
1990 | static inline bool pci_ari_enabled(struct pci_bus *bus) |
1981 | static inline bool pci_ari_enabled(struct pci_bus *bus) |
1991 | { |
1982 | { |
1992 | return bus->self && bus->self->ari_enabled; |
1983 | return bus->self && bus->self->ari_enabled; |
1993 | } |
1984 | } |
1994 | 1985 | ||
1995 | typedef struct |
1986 | typedef struct |
1996 | { |
1987 | { |
1997 | struct list_head link; |
1988 | struct list_head link; |
1998 | struct pci_dev pci_dev; |
1989 | struct pci_dev pci_dev; |
1999 | }pci_dev_t; |
1990 | }pci_dev_t; |
2000 | 1991 | ||
2001 | int enum_pci_devices(void); |
1992 | int enum_pci_devices(void); |
2002 | 1993 | ||
2003 | const struct pci_device_id* |
1994 | const struct pci_device_id* |
2004 | find_pci_device(pci_dev_t* pdev, const struct pci_device_id *idlist); |
1995 | find_pci_device(pci_dev_t* pdev, const struct pci_device_id *idlist); |
- | 1996 | ||
- | 1997 | struct pci_dev * _pci_get_bus_and_slot(unsigned int bus, unsigned int devfn); |
|
2005 | 1998 | ||
2006 | #endif /* LINUX_PCI_H */->><>>>><>><>>=>><>><>><>><>><>><>><>><>><>><>><> |
1999 | #endif /* LINUX_PCI_H */->><>>>><>><>>=>><>><>><>><>><>><>><>><>><>><>><> |