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14 | * PCI System Design Guide |
14 | * PCI System Design Guide |
15 | */ |
15 | */ |
16 | #ifndef LINUX_PCI_H |
16 | #ifndef LINUX_PCI_H |
17 | #define LINUX_PCI_H |
17 | #define LINUX_PCI_H |
Line -... | Line 18... | ||
- | 18 | ||
- | 19 | ||
- | 20 | #include |
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18 | 21 | ||
- | 22 | #include |
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- | 23 | #include |
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19 | #include |
24 | #include |
20 | #include |
25 | #include |
21 | #include |
26 | #include |
- | 27 | #include |
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22 | #include |
28 | #include |
23 | #include |
- | |
24 | - | ||
25 | #include |
- | |
26 | #include |
- | |
27 | 29 | #include |
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- | 30 | #include |
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- | 31 | #include |
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- | 32 | #include |
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Line 28... | Line -... | ||
28 | #include |
- | |
29 | - | ||
30 | #if 0 |
- | |
31 | struct device |
- | |
32 | { |
- | |
33 | struct device *parent; |
- | |
34 | void *driver_data; |
- | |
35 | }; |
- | |
36 | - | ||
37 | #endif |
- | |
38 | - | ||
39 | #define PCI_CFG_SPACE_SIZE 256 |
- | |
40 | #define PCI_CFG_SPACE_EXP_SIZE 4096 |
- | |
41 | 33 | #include |
|
42 | - | ||
43 | #define PCI_ANY_ID (~0) |
- | |
44 | - | ||
45 | - | ||
46 | #define PCI_CLASS_NOT_DEFINED 0x0000 |
- | |
47 | #define PCI_CLASS_NOT_DEFINED_VGA 0x0001 |
- | |
48 | - | ||
49 | #define PCI_BASE_CLASS_STORAGE 0x01 |
- | |
50 | #define PCI_CLASS_STORAGE_SCSI 0x0100 |
- | |
51 | #define PCI_CLASS_STORAGE_IDE 0x0101 |
- | |
52 | #define PCI_CLASS_STORAGE_FLOPPY 0x0102 |
- | |
53 | #define PCI_CLASS_STORAGE_IPI 0x0103 |
- | |
54 | #define PCI_CLASS_STORAGE_RAID 0x0104 |
- | |
55 | #define PCI_CLASS_STORAGE_SATA 0x0106 |
- | |
56 | #define PCI_CLASS_STORAGE_SATA_AHCI 0x010601 |
- | |
57 | #define PCI_CLASS_STORAGE_SAS 0x0107 |
- | |
58 | #define PCI_CLASS_STORAGE_OTHER 0x0180 |
- | |
59 | - | ||
60 | #define PCI_BASE_CLASS_NETWORK 0x02 |
- | |
61 | #define PCI_CLASS_NETWORK_ETHERNET 0x0200 |
- | |
62 | #define PCI_CLASS_NETWORK_TOKEN_RING 0x0201 |
- | |
63 | #define PCI_CLASS_NETWORK_FDDI 0x0202 |
- | |
64 | #define PCI_CLASS_NETWORK_ATM 0x0203 |
- | |
65 | #define PCI_CLASS_NETWORK_OTHER 0x0280 |
- | |
66 | - | ||
67 | #define PCI_BASE_CLASS_DISPLAY 0x03 |
- | |
68 | #define PCI_CLASS_DISPLAY_VGA 0x0300 |
- | |
69 | #define PCI_CLASS_DISPLAY_XGA 0x0301 |
- | |
70 | #define PCI_CLASS_DISPLAY_3D 0x0302 |
- | |
71 | #define PCI_CLASS_DISPLAY_OTHER 0x0380 |
- | |
72 | - | ||
73 | #define PCI_BASE_CLASS_MULTIMEDIA 0x04 |
- | |
74 | #define PCI_CLASS_MULTIMEDIA_VIDEO 0x0400 |
- | |
75 | #define PCI_CLASS_MULTIMEDIA_AUDIO 0x0401 |
- | |
76 | #define PCI_CLASS_MULTIMEDIA_PHONE 0x0402 |
- | |
77 | #define PCI_CLASS_MULTIMEDIA_OTHER 0x0480 |
- | |
78 | - | ||
79 | #define PCI_BASE_CLASS_MEMORY 0x05 |
- | |
80 | #define PCI_CLASS_MEMORY_RAM 0x0500 |
- | |
81 | #define PCI_CLASS_MEMORY_FLASH 0x0501 |
- | |
82 | #define PCI_CLASS_MEMORY_OTHER 0x0580 |
- | |
83 | - | ||
84 | #define PCI_BASE_CLASS_BRIDGE 0x06 |
- | |
85 | #define PCI_CLASS_BRIDGE_HOST 0x0600 |
- | |
86 | #define PCI_CLASS_BRIDGE_ISA 0x0601 |
- | |
87 | #define PCI_CLASS_BRIDGE_EISA 0x0602 |
- | |
88 | #define PCI_CLASS_BRIDGE_MC 0x0603 |
- | |
89 | #define PCI_CLASS_BRIDGE_PCI 0x0604 |
- | |
90 | #define PCI_CLASS_BRIDGE_PCMCIA 0x0605 |
- | |
91 | #define PCI_CLASS_BRIDGE_NUBUS 0x0606 |
- | |
92 | #define PCI_CLASS_BRIDGE_CARDBUS 0x0607 |
- | |
93 | #define PCI_CLASS_BRIDGE_RACEWAY 0x0608 |
- | |
94 | #define PCI_CLASS_BRIDGE_OTHER 0x0680 |
- | |
95 | - | ||
96 | #define PCI_BASE_CLASS_COMMUNICATION 0x07 |
- | |
97 | #define PCI_CLASS_COMMUNICATION_SERIAL 0x0700 |
- | |
98 | #define PCI_CLASS_COMMUNICATION_PARALLEL 0x0701 |
- | |
99 | #define PCI_CLASS_COMMUNICATION_MULTISERIAL 0x0702 |
- | |
100 | #define PCI_CLASS_COMMUNICATION_MODEM 0x0703 |
- | |
101 | #define PCI_CLASS_COMMUNICATION_OTHER 0x0780 |
- | |
102 | - | ||
103 | #define PCI_BASE_CLASS_SYSTEM 0x08 |
- | |
104 | #define PCI_CLASS_SYSTEM_PIC 0x0800 |
- | |
105 | #define PCI_CLASS_SYSTEM_PIC_IOAPIC 0x080010 |
- | |
106 | #define PCI_CLASS_SYSTEM_PIC_IOXAPIC 0x080020 |
- | |
107 | #define PCI_CLASS_SYSTEM_DMA 0x0801 |
- | |
108 | #define PCI_CLASS_SYSTEM_TIMER 0x0802 |
- | |
109 | #define PCI_CLASS_SYSTEM_RTC 0x0803 |
- | |
110 | #define PCI_CLASS_SYSTEM_PCI_HOTPLUG 0x0804 |
- | |
111 | #define PCI_CLASS_SYSTEM_SDHCI 0x0805 |
- | |
112 | #define PCI_CLASS_SYSTEM_OTHER 0x0880 |
- | |
113 | - | ||
114 | #define PCI_BASE_CLASS_INPUT 0x09 |
- | |
115 | #define PCI_CLASS_INPUT_KEYBOARD 0x0900 |
- | |
116 | #define PCI_CLASS_INPUT_PEN 0x0901 |
- | |
117 | #define PCI_CLASS_INPUT_MOUSE 0x0902 |
- | |
118 | #define PCI_CLASS_INPUT_SCANNER 0x0903 |
- | |
119 | #define PCI_CLASS_INPUT_GAMEPORT 0x0904 |
- | |
120 | #define PCI_CLASS_INPUT_OTHER 0x0980 |
- | |
121 | - | ||
122 | #define PCI_BASE_CLASS_DOCKING 0x0a |
- | |
123 | #define PCI_CLASS_DOCKING_GENERIC 0x0a00 |
- | |
124 | #define PCI_CLASS_DOCKING_OTHER 0x0a80 |
- | |
125 | - | ||
126 | #define PCI_BASE_CLASS_PROCESSOR 0x0b |
- | |
127 | #define PCI_CLASS_PROCESSOR_386 0x0b00 |
- | |
128 | #define PCI_CLASS_PROCESSOR_486 0x0b01 |
- | |
129 | #define PCI_CLASS_PROCESSOR_PENTIUM 0x0b02 |
- | |
130 | #define PCI_CLASS_PROCESSOR_ALPHA 0x0b10 |
- | |
131 | #define PCI_CLASS_PROCESSOR_POWERPC 0x0b20 |
- | |
132 | #define PCI_CLASS_PROCESSOR_MIPS 0x0b30 |
- | |
133 | #define PCI_CLASS_PROCESSOR_CO 0x0b40 |
- | |
134 | - | ||
135 | #define PCI_BASE_CLASS_SERIAL 0x0c |
- | |
136 | #define PCI_CLASS_SERIAL_FIREWIRE 0x0c00 |
- | |
137 | #define PCI_CLASS_SERIAL_FIREWIRE_OHCI 0x0c0010 |
- | |
138 | #define PCI_CLASS_SERIAL_ACCESS 0x0c01 |
- | |
139 | #define PCI_CLASS_SERIAL_SSA 0x0c02 |
- | |
140 | #define PCI_CLASS_SERIAL_USB 0x0c03 |
- | |
141 | #define PCI_CLASS_SERIAL_USB_UHCI 0x0c0300 |
- | |
142 | #define PCI_CLASS_SERIAL_USB_OHCI 0x0c0310 |
- | |
143 | #define PCI_CLASS_SERIAL_USB_EHCI 0x0c0320 |
- | |
144 | #define PCI_CLASS_SERIAL_FIBER 0x0c04 |
- | |
145 | #define PCI_CLASS_SERIAL_SMBUS 0x0c05 |
- | |
146 | - | ||
147 | #define PCI_BASE_CLASS_WIRELESS 0x0d |
- | |
148 | #define PCI_CLASS_WIRELESS_RF_CONTROLLER 0x0d10 |
- | |
149 | #define PCI_CLASS_WIRELESS_WHCI 0x0d1010 |
- | |
150 | - | ||
151 | #define PCI_BASE_CLASS_INTELLIGENT 0x0e |
- | |
152 | #define PCI_CLASS_INTELLIGENT_I2O 0x0e00 |
- | |
153 | - | ||
154 | #define PCI_BASE_CLASS_SATELLITE 0x0f |
- | |
155 | #define PCI_CLASS_SATELLITE_TV 0x0f00 |
- | |
156 | #define PCI_CLASS_SATELLITE_AUDIO 0x0f01 |
- | |
157 | #define PCI_CLASS_SATELLITE_VOICE 0x0f03 |
- | |
158 | #define PCI_CLASS_SATELLITE_DATA 0x0f04 |
- | |
159 | - | ||
160 | #define PCI_BASE_CLASS_CRYPT 0x10 |
- | |
161 | #define PCI_CLASS_CRYPT_NETWORK 0x1000 |
- | |
162 | #define PCI_CLASS_CRYPT_ENTERTAINMENT 0x1001 |
- | |
163 | #define PCI_CLASS_CRYPT_OTHER 0x1080 |
- | |
164 | - | ||
165 | #define PCI_BASE_CLASS_SIGNAL_PROCESSING 0x11 |
- | |
166 | #define PCI_CLASS_SP_DPIO 0x1100 |
- | |
167 | #define PCI_CLASS_SP_OTHER 0x1180 |
- | |
168 | - | ||
169 | #define PCI_CLASS_OTHERS 0xff |
- | |
170 | - | ||
171 | - | ||
172 | - | ||
173 | - | ||
174 | - | ||
175 | #define PCI_MAP_IS_IO(b) ((b) & PCI_MAP_IO) |
- | |
176 | #define PCI_MAP_IS_MEM(b) (!PCI_MAP_IS_IO(b)) |
- | |
177 | - | ||
178 | #define PCI_MAP_IS64BITMEM(b) \ |
- | |
179 | (((b) & PCI_MAP_MEMORY_TYPE_MASK) == PCI_MAP_MEMORY_TYPE_64BIT) |
- | |
180 | - | ||
181 | #define PCIGETMEMORY(b) ((b) & PCI_MAP_MEMORY_ADDRESS_MASK) |
- | |
182 | #define PCIGETMEMORY64HIGH(b) (*((CARD32*)&b + 1)) |
- | |
183 | #define PCIGETMEMORY64(b) \ |
- | |
184 | (PCIGETMEMORY(b) | ((CARD64)PCIGETMEMORY64HIGH(b) << 32)) |
- | |
185 | - | ||
186 | #define PCI_MAP_IO_ADDRESS_MASK 0xfffffffc |
- | |
187 | - | ||
188 | #define PCIGETIO(b) ((b) & PCI_MAP_IO_ADDRESS_MASK) |
- | |
189 | - | ||
190 | #define PCI_MAP_ROM_DECODE_ENABLE 0x00000001 |
- | |
191 | #define PCI_MAP_ROM_ADDRESS_MASK 0xfffff800 |
- | |
192 | - | ||
193 | #define PCIGETROM(b) ((b) & PCI_MAP_ROM_ADDRESS_MASK) |
- | |
194 | 34 | ||
195 | - | ||
196 | #ifndef PCI_DOM_MASK |
- | |
197 | # define PCI_DOM_MASK 0x0ffu |
- | |
198 | #endif |
- | |
199 | #define PCI_DOMBUS_MASK (((PCI_DOM_MASK) << 8) | 0x0ffu) |
- | |
200 | - | ||
201 | #define PCI_MAKE_TAG(b,d,f) ((((b) & (PCI_DOMBUS_MASK)) << 16) | \ |
- | |
202 | (((d) & 0x00001fu) << 11) | \ |
- | |
203 | (((f) & 0x000007u) << 8)) |
- | |
204 | - | ||
205 | #define PCI_BUS_FROM_TAG(tag) (((tag) >> 16) & (PCI_DOMBUS_MASK)) |
- | |
206 | #define PCI_DEV_FROM_TAG(tag) (((tag) & 0x0000f800u) >> 11) |
- | |
207 | #define PCI_FUNC_FROM_TAG(tag) (((tag) & 0x00000700u) >> 8) |
- | |
208 | #define PCI_DFN_FROM_TAG(tag) (((tag) & 0x0000ff00u) >> 8) |
35 | #include |
209 | 36 | #include |
|
210 | /* |
37 | /* |
211 | * The PCI interface treats multi-function devices as independent |
38 | * The PCI interface treats multi-function devices as independent |
212 | * devices. The slot/function address of each device is encoded |
39 | * devices. The slot/function address of each device is encoded |
Line 217... | Line 44... | ||
217 | * |
44 | * |
218 | * PCI_DEVFN(), PCI_SLOT(), and PCI_FUNC() are defined in uapi/linux/pci.h. |
45 | * PCI_DEVFN(), PCI_SLOT(), and PCI_FUNC() are defined in uapi/linux/pci.h. |
219 | * In the interest of not exposing interfaces to user-space unnecessarily, |
46 | * In the interest of not exposing interfaces to user-space unnecessarily, |
220 | * the following kernel-only defines are being added here. |
47 | * the following kernel-only defines are being added here. |
221 | */ |
48 | */ |
222 | #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07)) |
49 | #define PCI_DEVID(bus, devfn) ((((u16)(bus)) << 8) | (devfn)) |
223 | #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f) |
50 | /* return bus from PCI devid = ((u16)bus_number) << 8) | devfn */ |
224 | #define PCI_FUNC(devfn) ((devfn) & 0x07) |
51 | #define PCI_BUS_NUM(x) (((x) >> 8) & 0xff) |
225 | - | ||
226 | - | ||
227 | - | ||
228 | typedef unsigned int PCITAG; |
- | |
229 | - | ||
230 | extern inline PCITAG |
- | |
231 | pciTag(int busnum, int devnum, int funcnum) |
- | |
232 | { |
- | |
233 | return(PCI_MAKE_TAG(busnum,devnum,funcnum)); |
- | |
234 | } |
- | |
Line 235... | Line 52... | ||
235 | 52 | ||
236 | /* pci_slot represents a physical slot */ |
53 | /* pci_slot represents a physical slot */ |
237 | struct pci_slot { |
54 | struct pci_slot { |
238 | struct pci_bus *bus; /* The bus this slot is on */ |
55 | struct pci_bus *bus; /* The bus this slot is on */ |
239 | struct list_head list; /* node in list of slots on this bus */ |
56 | struct list_head list; /* node in list of slots on this bus */ |
240 | struct hotplug_slot *hotplug; /* Hotplug info (migrate over time) */ |
57 | struct hotplug_slot *hotplug; /* Hotplug info (migrate over time) */ |
- | 58 | unsigned char number; /* PCI_SLOT(pci_dev->devfn) */ |
|
241 | unsigned char number; /* PCI_SLOT(pci_dev->devfn) */ |
59 | struct kobject kobj; |
Line 242... | Line 60... | ||
242 | }; |
60 | }; |
243 | 61 | ||
244 | /* File state for mmap()s on /proc/bus/pci/X/Y */ |
62 | /* File state for mmap()s on /proc/bus/pci/X/Y */ |
Line 321... | Line 139... | ||
321 | pci_channel_io_frozen = (__force pci_channel_state_t) 2, |
139 | pci_channel_io_frozen = (__force pci_channel_state_t) 2, |
Line 322... | Line 140... | ||
322 | 140 | ||
323 | /* PCI card is dead */ |
141 | /* PCI card is dead */ |
324 | pci_channel_io_perm_failure = (__force pci_channel_state_t) 3, |
142 | pci_channel_io_perm_failure = (__force pci_channel_state_t) 3, |
- | 143 | }; |
|
- | 144 | ||
- | 145 | typedef unsigned int __bitwise pcie_reset_state_t; |
|
- | 146 | ||
- | 147 | enum pcie_reset_state { |
|
- | 148 | /* Reset is NOT asserted (Use to deassert reset) */ |
|
- | 149 | pcie_deassert_reset = (__force pcie_reset_state_t) 1, |
|
- | 150 | ||
- | 151 | /* Use #PERST to reset PCIe device */ |
|
- | 152 | pcie_warm_reset = (__force pcie_reset_state_t) 2, |
|
- | 153 | ||
- | 154 | /* Use PCIe Hot Reset to reset device */ |
|
- | 155 | pcie_hot_reset = (__force pcie_reset_state_t) 3 |
|
- | 156 | }; |
|
- | 157 | ||
- | 158 | typedef unsigned short __bitwise pci_dev_flags_t; |
|
- | 159 | enum pci_dev_flags { |
|
- | 160 | /* INTX_DISABLE in PCI_COMMAND register disables MSI |
|
- | 161 | * generation too. |
|
- | 162 | */ |
|
- | 163 | PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) (1 << 0), |
|
- | 164 | /* Device configuration is irrevocably lost if disabled into D3 */ |
|
- | 165 | PCI_DEV_FLAGS_NO_D3 = (__force pci_dev_flags_t) (1 << 1), |
|
- | 166 | /* Provide indication device is assigned by a Virtual Machine Manager */ |
|
- | 167 | PCI_DEV_FLAGS_ASSIGNED = (__force pci_dev_flags_t) (1 << 2), |
|
- | 168 | /* Flag for quirk use to store if quirk-specific ACS is enabled */ |
|
- | 169 | PCI_DEV_FLAGS_ACS_ENABLED_QUIRK = (__force pci_dev_flags_t) (1 << 3), |
|
- | 170 | /* Flag to indicate the device uses dma_alias_devfn */ |
|
- | 171 | PCI_DEV_FLAGS_DMA_ALIAS_DEVFN = (__force pci_dev_flags_t) (1 << 4), |
|
- | 172 | /* Use a PCIe-to-PCI bridge alias even if !pci_is_pcie */ |
|
- | 173 | PCI_DEV_FLAG_PCIE_BRIDGE_ALIAS = (__force pci_dev_flags_t) (1 << 5), |
|
- | 174 | /* Do not use bus resets for device */ |
|
- | 175 | PCI_DEV_FLAGS_NO_BUS_RESET = (__force pci_dev_flags_t) (1 << 6), |
|
- | 176 | /* Do not use PM reset even if device advertises NoSoftRst- */ |
|
- | 177 | PCI_DEV_FLAGS_NO_PM_RESET = (__force pci_dev_flags_t) (1 << 7), |
|
- | 178 | /* Get VPD from function 0 VPD */ |
|
- | 179 | PCI_DEV_FLAGS_VPD_REF_F0 = (__force pci_dev_flags_t) (1 << 8), |
|
- | 180 | }; |
|
- | 181 | ||
- | 182 | enum pci_irq_reroute_variant { |
|
- | 183 | INTEL_IRQ_REROUTE_VARIANT = 1, |
|
- | 184 | MAX_IRQ_REROUTE_VARIANTS = 3 |
|
- | 185 | }; |
|
325 | }; |
186 | |
326 | typedef unsigned short __bitwise pci_bus_flags_t; |
187 | typedef unsigned short __bitwise pci_bus_flags_t; |
327 | enum pci_bus_flags { |
188 | enum pci_bus_flags { |
328 | PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1, |
189 | PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1, |
329 | PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2, |
190 | PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2, |
Line 404... | Line 265... | ||
404 | unsigned short subsystem_vendor; |
265 | unsigned short subsystem_vendor; |
405 | unsigned short subsystem_device; |
266 | unsigned short subsystem_device; |
406 | unsigned int class; /* 3 bytes: (base,sub,prog-if) */ |
267 | unsigned int class; /* 3 bytes: (base,sub,prog-if) */ |
407 | u8 revision; /* PCI revision, low byte of class word */ |
268 | u8 revision; /* PCI revision, low byte of class word */ |
408 | u8 hdr_type; /* PCI header type (`multi' flag masked out) */ |
269 | u8 hdr_type; /* PCI header type (`multi' flag masked out) */ |
409 | u8 pcie_cap; /* PCI-E capability offset */ |
270 | u8 pcie_cap; /* PCIe capability offset */ |
- | 271 | u8 msi_cap; /* MSI capability offset */ |
|
- | 272 | u8 msix_cap; /* MSI-X capability offset */ |
|
410 | u8 pcie_mpss:3; /* PCI-E Max Payload Size Supported */ |
273 | u8 pcie_mpss:3; /* PCIe Max Payload Size Supported */ |
411 | u8 rom_base_reg; /* which config register controls the ROM */ |
274 | u8 rom_base_reg; /* which config register controls the ROM */ |
412 | u8 pin; /* which interrupt pin this device uses */ |
275 | u8 pin; /* which interrupt pin this device uses */ |
413 | u16 pcie_flags_reg; /* cached PCI-E Capabilities Register */ |
276 | u16 pcie_flags_reg; /* cached PCIe Capabilities Register */ |
- | 277 | u8 dma_alias_devfn;/* devfn of DMA alias, if any */ |
|
Line 414... | Line -... | ||
414 | - | ||
415 | // struct pci_driver *driver; /* which driver has allocated this device */ |
278 | |
416 | u64 dma_mask; /* Mask of the bits of bus address this |
279 | u64 dma_mask; /* Mask of the bits of bus address this |
417 | device implements. Normally this is |
280 | device implements. Normally this is |
418 | 0xffffffff. You only need to change |
281 | 0xffffffff. You only need to change |
419 | this if your device has broken DMA |
282 | this if your device has broken DMA |
Line 420... | Line -... | ||
420 | or supports 64-bit transfers. */ |
- | |
Line 421... | Line 283... | ||
421 | 283 | or supports 64-bit transfers. */ |
|
422 | // struct device_dma_parameters dma_parms; |
284 | |
423 | 285 | ||
424 | pci_power_t current_state; /* Current operating state. In ACPI-speak, |
286 | pci_power_t current_state; /* Current operating state. In ACPI-speak, |
Line 474... | Line 336... | ||
474 | unsigned int broken_parity_status:1; /* Device generates false positive parity */ |
336 | unsigned int broken_parity_status:1; /* Device generates false positive parity */ |
475 | unsigned int irq_reroute_variant:2; /* device needs IRQ rerouting variant */ |
337 | unsigned int irq_reroute_variant:2; /* device needs IRQ rerouting variant */ |
476 | unsigned int msi_enabled:1; |
338 | unsigned int msi_enabled:1; |
477 | unsigned int msix_enabled:1; |
339 | unsigned int msix_enabled:1; |
478 | unsigned int ari_enabled:1; /* ARI forwarding */ |
340 | unsigned int ari_enabled:1; /* ARI forwarding */ |
- | 341 | unsigned int ats_enabled:1; /* Address Translation Service */ |
|
479 | unsigned int is_managed:1; |
342 | unsigned int is_managed:1; |
480 | unsigned int needs_freset:1; /* Dev requires fundamental reset */ |
343 | unsigned int needs_freset:1; /* Dev requires fundamental reset */ |
481 | unsigned int state_saved:1; |
344 | unsigned int state_saved:1; |
482 | unsigned int is_physfn:1; |
345 | unsigned int is_physfn:1; |
483 | unsigned int is_virtfn:1; |
346 | unsigned int is_virtfn:1; |
Line 485... | Line 348... | ||
485 | unsigned int is_hotplug_bridge:1; |
348 | unsigned int is_hotplug_bridge:1; |
486 | unsigned int __aer_firmware_first_valid:1; |
349 | unsigned int __aer_firmware_first_valid:1; |
487 | unsigned int __aer_firmware_first:1; |
350 | unsigned int __aer_firmware_first:1; |
488 | unsigned int broken_intx_masking:1; |
351 | unsigned int broken_intx_masking:1; |
489 | unsigned int io_window_1k:1; /* Intel P2P bridge 1K I/O windows */ |
352 | unsigned int io_window_1k:1; /* Intel P2P bridge 1K I/O windows */ |
- | 353 | unsigned int irq_managed:1; |
|
- | 354 | unsigned int has_secondary_link:1; |
|
490 | // pci_dev_flags_t dev_flags; |
355 | pci_dev_flags_t dev_flags; |
491 | atomic_t enable_cnt; /* pci_enable_device has been called */ |
356 | atomic_t enable_cnt; /* pci_enable_device has been called */ |
Line -... | Line 357... | ||
- | 357 | ||
- | 358 | u32 saved_config_space[16]; /* config space saved at suspend time */ |
|
- | 359 | struct hlist_head saved_cap_space; |
|
- | 360 | struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */ |
|
- | 361 | int rom_attr_enabled; /* has display of the rom attribute been enabled? */ |
|
- | 362 | #ifdef CONFIG_PCI_MSI |
|
- | 363 | const struct attribute_group **msi_irq_groups; |
|
- | 364 | #endif |
|
- | 365 | #ifdef CONFIG_PCI_ATS |
|
- | 366 | union { |
|
- | 367 | struct pci_sriov *sriov; /* SR-IOV capability related */ |
|
- | 368 | struct pci_dev *physfn; /* the PF this VF is associated with */ |
|
- | 369 | }; |
|
- | 370 | u16 ats_cap; /* ATS Capability offset */ |
|
- | 371 | u8 ats_stu; /* ATS Smallest Translation Unit */ |
|
- | 372 | atomic_t ats_ref_cnt; /* number of VFs with ATS enabled */ |
|
- | 373 | #endif |
|
- | 374 | phys_addr_t rom; /* Physical address of ROM if it's not from the BAR */ |
|
- | 375 | size_t romlen; /* Length of ROM if it's not from the BAR */ |
|
- | 376 | char *driver_override; /* Driver name to force a match */ |
|
Line -... | Line 377... | ||
- | 377 | }; |
|
- | 378 | ||
- | 379 | static inline struct pci_dev *pci_physfn(struct pci_dev *dev) |
|
- | 380 | { |
|
- | 381 | #ifdef CONFIG_PCI_IOV |
|
- | 382 | if (dev->is_virtfn) |
|
- | 383 | dev = dev->physfn; |
|
- | 384 | #endif |
|
- | 385 | return dev; |
|
- | 386 | } |
|
- | 387 | ||
- | 388 | struct pci_dev *pci_alloc_dev(struct pci_bus *bus); |
|
- | 389 | ||
- | 390 | #define to_pci_dev(n) container_of(n, struct pci_dev, dev) |
|
- | 391 | #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL) |
|
- | 392 | ||
- | 393 | static inline int pci_channel_offline(struct pci_dev *pdev) |
|
- | 394 | { |
|
Line -... | Line 395... | ||
- | 395 | return (pdev->error_state != pci_channel_io_normal); |
|
- | 396 | } |
|
- | 397 | ||
- | 398 | struct pci_host_bridge { |
|
- | 399 | struct device dev; |
|
- | 400 | struct pci_bus *bus; /* root bus */ |
|
- | 401 | struct list_head windows; /* resource_entry */ |
|
- | 402 | void (*release_fn)(struct pci_host_bridge *); |
|
- | 403 | void *release_data; |
|
- | 404 | unsigned int ignore_reset_delay:1; /* for entire hierarchy */ |
|
- | 405 | /* Resource alignment requirements */ |
|
- | 406 | resource_size_t (*align_resource)(struct pci_dev *dev, |
|
- | 407 | const struct resource *res, |
|
492 | 408 | resource_size_t start, |
|
Line 493... | Line 409... | ||
493 | 409 | resource_size_t size, |
|
- | 410 | resource_size_t align); |
|
494 | 411 | }; |
|
- | 412 | ||
495 | }; |
413 | #define to_pci_host_bridge(n) container_of(n, struct pci_host_bridge, dev) |
- | 414 | ||
496 | 415 | struct pci_host_bridge *pci_find_host_bridge(struct pci_bus *bus); |
|
- | 416 | ||
497 | #define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start) |
417 | void pci_set_host_bridge_release(struct pci_host_bridge *bridge, |
- | 418 | void (*release_fn)(struct pci_host_bridge *), |
|
- | 419 | void *release_data); |
|
- | 420 | ||
- | 421 | int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge); |
|
498 | #define pci_resource_end(dev, bar) ((dev)->resource[(bar)].end) |
422 | |
499 | #define pci_resource_flags(dev, bar) ((dev)->resource[(bar)].flags) |
423 | /* |
- | 424 | * The first PCI_BRIDGE_RESOURCE_NUM PCI bus resources (those that correspond |
|
- | 425 | * to P2P or CardBus bridge windows) go in a table. Additional ones (for |
|
- | 426 | * buses below host bridges or subtractive decode bridges) go in the list. |
|
- | 427 | * Use pci_bus_for_each_resource() to iterate through all the resources. |
|
500 | #define pci_resource_len(dev,bar) \ |
428 | */ |
501 | ((pci_resource_start((dev), (bar)) == 0 && \ |
429 | |
- | 430 | /* |
|
- | 431 | * PCI_SUBTRACTIVE_DECODE means the bridge forwards the window implicitly |
|
- | 432 | * and there's no way to program the bridge with the details of the window. |
|
- | 433 | * This does not apply to ACPI _CRS windows, even with the _DEC subtractive- |
|
502 | pci_resource_end((dev), (bar)) == \ |
434 | * decode bit set, because they are explicit and can be programmed with _SRS. |
- | 435 | */ |
|
- | 436 | #define PCI_SUBTRACTIVE_DECODE 0x1 |
|
- | 437 | ||
- | 438 | struct pci_bus_resource { |
|
Line 503... | Line 439... | ||
503 | pci_resource_start((dev), (bar))) ? 0 : \ |
439 | struct list_head list; |
Line 504... | Line 440... | ||
504 | \ |
440 | struct resource *res; |
505 | (pci_resource_end((dev), (bar)) - \ |
441 | unsigned int flags; |
506 | pci_resource_start((dev), (bar)) + 1)) |
442 | }; |
507 | 443 | ||
508 | #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */ |
444 | #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */ |
509 | 445 | ||
510 | struct pci_bus { |
446 | struct pci_bus { |
- | 447 | struct list_head node; /* node in list of buses */ |
|
511 | struct list_head node; /* node in list of buses */ |
448 | struct pci_bus *parent; /* parent bus this bridge is on */ |
512 | struct pci_bus *parent; /* parent bus this bridge is on */ |
449 | struct list_head children; /* list of child buses */ |
513 | struct list_head children; /* list of child buses */ |
450 | struct list_head devices; /* list of devices on this bus */ |
Line 514... | Line 451... | ||
514 | struct list_head devices; /* list of devices on this bus */ |
451 | struct pci_dev *self; /* bridge device as seen by parent */ |
- | 452 | struct list_head slots; /* list of slots on this bus; |
|
515 | struct pci_dev *self; /* bridge device as seen by parent */ |
453 | protected by pci_slot_mutex */ |
516 | struct list_head slots; /* list of slots on this bus */ |
454 | struct resource *resource[PCI_BRIDGE_RESOURCE_NUM]; |
Line 517... | Line 455... | ||
517 | struct resource *resource[PCI_BRIDGE_RESOURCE_NUM]; |
455 | struct list_head resources; /* address space routed to this bus */ |
518 | struct list_head resources; /* address space routed to this bus */ |
456 | struct resource busn_res; /* bus numbers routed to this bus */ |
519 | struct resource busn_res; /* bus numbers routed to this bus */ |
457 | |
520 | 458 | struct pci_ops *ops; /* configuration access functions */ |
|
- | 459 | struct msi_controller *msi; /* MSI controller */ |
|
- | 460 | void *sysdata; /* hook for sys-specific extension */ |
|
- | 461 | struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */ |
|
Line 521... | Line 462... | ||
521 | struct pci_ops *ops; /* configuration access functions */ |
462 | |
Line 522... | Line 463... | ||
522 | void *sysdata; /* hook for sys-specific extension */ |
463 | unsigned char number; /* bus number */ |
523 | struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */ |
464 | unsigned char primary; /* number of primary bridge */ |
Line 536... | Line 477... | ||
536 | struct bin_attribute *legacy_io; /* legacy I/O for this bus */ |
477 | struct bin_attribute *legacy_io; /* legacy I/O for this bus */ |
537 | struct bin_attribute *legacy_mem; /* legacy mem */ |
478 | struct bin_attribute *legacy_mem; /* legacy mem */ |
538 | unsigned int is_added:1; |
479 | unsigned int is_added:1; |
539 | }; |
480 | }; |
Line 540... | Line -... | ||
540 | - | ||
541 | - | ||
542 | #define pci_bus_b(n) list_entry(n, struct pci_bus, node) |
- | |
543 | #define to_pci_bus(n) container_of(n, struct pci_bus, dev) |
- | |
544 | #define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list) |
- | |
545 | #define to_pci_dev(n) container_of(n, struct pci_dev, dev) |
- | |
546 | #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL) |
- | |
547 | - | ||
548 | - | ||
549 | /* Low-level architecture-dependent routines */ |
- | |
550 | - | ||
551 | struct pci_sysdata { |
- | |
552 | int domain; /* PCI domain */ |
- | |
553 | int node; /* NUMA node */ |
- | |
554 | }; |
- | |
555 | - | ||
556 | - | ||
557 | #define pci_bus_b(n) list_entry(n, struct pci_bus, node) |
481 | |
Line 558... | Line 482... | ||
558 | #define to_pci_bus(n) container_of(n, struct pci_bus, dev) |
482 | #define to_pci_bus(n) container_of(n, struct pci_bus, dev) |
559 | 483 | ||
560 | /* |
484 | /* |
Line 568... | Line 492... | ||
568 | static inline bool pci_is_root_bus(struct pci_bus *pbus) |
492 | static inline bool pci_is_root_bus(struct pci_bus *pbus) |
569 | { |
493 | { |
570 | return !(pbus->parent); |
494 | return !(pbus->parent); |
571 | } |
495 | } |
Line -... | Line 496... | ||
- | 496 | ||
- | 497 | /** |
|
- | 498 | * pci_is_bridge - check if the PCI device is a bridge |
|
- | 499 | * @dev: PCI device |
|
- | 500 | * |
|
- | 501 | * Return true if the PCI device is bridge whether it has subordinate |
|
- | 502 | * or not. |
|
- | 503 | */ |
|
- | 504 | static inline bool pci_is_bridge(struct pci_dev *dev) |
|
- | 505 | { |
|
- | 506 | return dev->hdr_type == PCI_HEADER_TYPE_BRIDGE || |
|
- | 507 | dev->hdr_type == PCI_HEADER_TYPE_CARDBUS; |
|
- | 508 | } |
|
- | 509 | ||
- | 510 | static inline struct pci_dev *pci_upstream_bridge(struct pci_dev *dev) |
|
572 | 511 | { |
|
- | 512 | dev = pci_physfn(dev); |
|
- | 513 | if (pci_is_root_bus(dev->bus)) |
|
- | 514 | return NULL; |
|
- | 515 | ||
- | 516 | return dev->bus->self; |
|
- | 517 | } |
|
- | 518 | ||
573 | struct pci_bus * |
519 | struct device *pci_get_host_bridge_device(struct pci_dev *dev); |
Line -... | Line 520... | ||
- | 520 | void pci_put_host_bridge_device(struct device *dev); |
|
- | 521 | ||
- | 522 | #ifdef CONFIG_PCI_MSI |
|
- | 523 | static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) |
|
- | 524 | { |
|
- | 525 | return pci_dev->msi_enabled || pci_dev->msix_enabled; |
|
- | 526 | } |
|
- | 527 | #else |
|
Line 574... | Line 528... | ||
574 | pci_find_next_bus(const struct pci_bus *from); |
528 | static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) { return false; } |
575 | 529 | #endif |
|
576 | 530 | ||
577 | /* |
531 | /* |
Line 612... | Line 566... | ||
612 | } |
566 | } |
Line 613... | Line 567... | ||
613 | 567 | ||
Line 614... | Line 568... | ||
614 | /* Low-level architecture-dependent routines */ |
568 | /* Low-level architecture-dependent routines */ |
- | 569 | ||
615 | 570 | struct pci_ops { |
|
616 | struct pci_ops { |
571 | void __iomem *(*map_bus)(struct pci_bus *bus, unsigned int devfn, int where); |
617 | int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val); |
572 | int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val); |
Line 618... | Line 573... | ||
618 | int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val); |
573 | int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val); |
Line 625... | Line 580... | ||
625 | int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn, |
580 | int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn, |
626 | int reg, int len, u32 *val); |
581 | int reg, int len, u32 *val); |
627 | int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn, |
582 | int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn, |
628 | int reg, int len, u32 val); |
583 | int reg, int len, u32 val); |
Line -... | Line 584... | ||
- | 584 | ||
- | 585 | #ifdef CONFIG_PCI_BUS_ADDR_T_64BIT |
|
- | 586 | typedef u64 pci_bus_addr_t; |
|
- | 587 | #else |
|
- | 588 | typedef u32 pci_bus_addr_t; |
|
- | 589 | #endif |
|
629 | 590 | ||
630 | struct pci_bus_region { |
591 | struct pci_bus_region { |
631 | dma_addr_t start; |
592 | pci_bus_addr_t start; |
632 | dma_addr_t end; |
593 | pci_bus_addr_t end; |
Line 633... | Line 594... | ||
633 | }; |
594 | }; |
634 | - | ||
635 | enum pci_bar_type { |
- | |
636 | pci_bar_unknown, /* Standard PCI BAR probe */ |
595 | |
637 | pci_bar_io, /* An io port BAR */ |
596 | struct pci_dynids { |
638 | pci_bar_mem32, /* A 32-bit memory BAR */ |
597 | spinlock_t lock; /* protects list, index */ |
Line -... | Line 598... | ||
- | 598 | struct list_head list; /* for IDs added at runtime */ |
|
- | 599 | }; |
|
- | 600 | ||
- | 601 | ||
- | 602 | /* |
|
- | 603 | * PCI Error Recovery System (PCI-ERS). If a PCI device driver provides |
|
- | 604 | * a set of callbacks in struct pci_error_handlers, that device driver |
|
- | 605 | * will be notified of PCI bus errors, and will be driven to recovery |
|
- | 606 | * when an error occurs. |
|
- | 607 | */ |
|
- | 608 | ||
- | 609 | typedef unsigned int __bitwise pci_ers_result_t; |
|
- | 610 | ||
- | 611 | enum pci_ers_result { |
|
- | 612 | /* no result/none/not supported in device driver */ |
|
- | 613 | PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1, |
|
- | 614 | ||
- | 615 | /* Device driver can recover without slot reset */ |
|
- | 616 | PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2, |
|
- | 617 | ||
- | 618 | /* Device driver wants slot to be reset. */ |
|
- | 619 | PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3, |
|
- | 620 | ||
- | 621 | /* Device has completely failed, is unrecoverable */ |
|
- | 622 | PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4, |
|
- | 623 | ||
- | 624 | /* Device driver is fully recovered and operational */ |
|
- | 625 | PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5, |
|
- | 626 | ||
- | 627 | /* No AER capabilities registered for the driver */ |
|
- | 628 | PCI_ERS_RESULT_NO_AER_DRIVER = (__force pci_ers_result_t) 6, |
|
- | 629 | }; |
|
- | 630 | ||
- | 631 | /* PCI bus error event callbacks */ |
|
- | 632 | struct pci_error_handlers { |
|
- | 633 | /* PCI bus error detected on this device */ |
|
- | 634 | pci_ers_result_t (*error_detected)(struct pci_dev *dev, |
|
- | 635 | enum pci_channel_state error); |
|
- | 636 | ||
- | 637 | /* MMIO has been re-enabled, but not DMA */ |
|
- | 638 | pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev); |
|
- | 639 | ||
- | 640 | /* PCI Express link has been reset */ |
|
- | 641 | pci_ers_result_t (*link_reset)(struct pci_dev *dev); |
|
- | 642 | ||
- | 643 | /* PCI slot has been reset */ |
|
- | 644 | pci_ers_result_t (*slot_reset)(struct pci_dev *dev); |
|
- | 645 | ||
- | 646 | /* PCI function reset prepare or completed */ |
|
- | 647 | void (*reset_notify)(struct pci_dev *dev, bool prepare); |
|
- | 648 | ||
- | 649 | /* Device driver may resume normal operations */ |
|
- | 650 | void (*resume)(struct pci_dev *dev); |
|
- | 651 | }; |
|
- | 652 | ||
- | 653 | ||
- | 654 | struct module; |
|
- | 655 | struct pci_driver { |
|
- | 656 | struct list_head node; |
|
- | 657 | const char *name; |
|
- | 658 | const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */ |
|
- | 659 | int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */ |
|
- | 660 | void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */ |
|
- | 661 | int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */ |
|
- | 662 | int (*suspend_late) (struct pci_dev *dev, pm_message_t state); |
|
- | 663 | int (*resume_early) (struct pci_dev *dev); |
|
- | 664 | int (*resume) (struct pci_dev *dev); /* Device woken up */ |
|
- | 665 | void (*shutdown) (struct pci_dev *dev); |
|
- | 666 | int (*sriov_configure) (struct pci_dev *dev, int num_vfs); /* PF pdev */ |
|
- | 667 | const struct pci_error_handlers *err_handler; |
|
- | 668 | struct device_driver driver; |
|
- | 669 | struct pci_dynids dynids; |
|
- | 670 | }; |
|
- | 671 | ||
- | 672 | #define to_pci_driver(drv) container_of(drv, struct pci_driver, driver) |
|
- | 673 | ||
- | 674 | /** |
|
- | 675 | * DEFINE_PCI_DEVICE_TABLE - macro used to describe a pci device table |
|
- | 676 | * @_table: device table name |
|
- | 677 | * |
|
- | 678 | * This macro is deprecated and should not be used in new code. |
|
- | 679 | */ |
|
- | 680 | #define DEFINE_PCI_DEVICE_TABLE(_table) \ |
|
- | 681 | const struct pci_device_id _table[] |
|
- | 682 | ||
- | 683 | /** |
|
- | 684 | * PCI_DEVICE - macro used to describe a specific pci device |
|
- | 685 | * @vend: the 16 bit PCI Vendor ID |
|
- | 686 | * @dev: the 16 bit PCI Device ID |
|
- | 687 | * |
|
- | 688 | * This macro is used to create a struct pci_device_id that matches a |
|
- | 689 | * specific device. The subvendor and subdevice fields will be set to |
|
- | 690 | * PCI_ANY_ID. |
|
- | 691 | */ |
|
- | 692 | #define PCI_DEVICE(vend,dev) \ |
|
- | 693 | .vendor = (vend), .device = (dev), \ |
|
- | 694 | .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID |
|
- | 695 | ||
- | 696 | /** |
|
- | 697 | * PCI_DEVICE_SUB - macro used to describe a specific pci device with subsystem |
|
- | 698 | * @vend: the 16 bit PCI Vendor ID |
|
- | 699 | * @dev: the 16 bit PCI Device ID |
|
- | 700 | * @subvend: the 16 bit PCI Subvendor ID |
|
- | 701 | * @subdev: the 16 bit PCI Subdevice ID |
|
- | 702 | * |
|
- | 703 | * This macro is used to create a struct pci_device_id that matches a |
|
- | 704 | * specific device with subsystem information. |
|
- | 705 | */ |
|
- | 706 | #define PCI_DEVICE_SUB(vend, dev, subvend, subdev) \ |
|
- | 707 | .vendor = (vend), .device = (dev), \ |
|
- | 708 | .subvendor = (subvend), .subdevice = (subdev) |
|
- | 709 | ||
- | 710 | /** |
|
- | 711 | * PCI_DEVICE_CLASS - macro used to describe a specific pci device class |
|
- | 712 | * @dev_class: the class, subclass, prog-if triple for this device |
|
- | 713 | * @dev_class_mask: the class mask for this device |
|
- | 714 | * |
|
- | 715 | * This macro is used to create a struct pci_device_id that matches a |
|
- | 716 | * specific PCI class. The vendor, device, subvendor, and subdevice |
|
- | 717 | * fields will be set to PCI_ANY_ID. |
|
- | 718 | */ |
|
- | 719 | #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \ |
|
- | 720 | .class = (dev_class), .class_mask = (dev_class_mask), \ |
|
- | 721 | .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \ |
|
- | 722 | .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID |
|
- | 723 | ||
- | 724 | /** |
|
- | 725 | * PCI_VDEVICE - macro used to describe a specific pci device in short form |
|
- | 726 | * @vend: the vendor name |
|
- | 727 | * @dev: the 16 bit PCI Device ID |
|
- | 728 | * |
|
- | 729 | * This macro is used to create a struct pci_device_id that matches a |
|
- | 730 | * specific PCI device. The subvendor, and subdevice fields will be set |
|
- | 731 | * to PCI_ANY_ID. The macro allows the next field to follow as the device |
|
- | 732 | * private data. |
|
- | 733 | */ |
|
- | 734 | ||
- | 735 | #define PCI_VDEVICE(vend, dev) \ |
|
- | 736 | .vendor = PCI_VENDOR_ID_##vend, .device = (dev), \ |
|
- | 737 | .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, 0, 0 |
|
- | 738 | ||
- | 739 | /* these external functions are only available when PCI support is enabled */ |
|
- | 740 | #ifdef CONFIG_PCI |
|
- | 741 | ||
- | 742 | void pcie_bus_configure_settings(struct pci_bus *bus); |
|
- | 743 | ||
- | 744 | enum pcie_bus_config_types { |
|
- | 745 | PCIE_BUS_TUNE_OFF, /* don't touch MPS at all */ |
|
- | 746 | PCIE_BUS_DEFAULT, /* ensure MPS matches upstream bridge */ |
|
- | 747 | PCIE_BUS_SAFE, /* use largest MPS boot-time devices support */ |
|
- | 748 | PCIE_BUS_PERFORMANCE, /* use MPS and MRRS for best performance */ |
|
- | 749 | PCIE_BUS_PEER2PEER, /* set MPS = 128 for all devices */ |
|
- | 750 | }; |
|
- | 751 | ||
- | 752 | extern enum pcie_bus_config_types pcie_bus_config; |
|
- | 753 | ||
- | 754 | extern struct bus_type pci_bus_type; |
|
- | 755 | ||
- | 756 | /* Do NOT directly access these two variables, unless you are arch-specific PCI |
|
- | 757 | * code, or PCI core code. */ |
|
- | 758 | extern struct list_head pci_root_buses; /* list of all known PCI buses */ |
|
- | 759 | /* Some device drivers need know if PCI is initiated */ |
|
- | 760 | int no_pci_devices(void); |
|
- | 761 | ||
- | 762 | void pcibios_resource_survey_bus(struct pci_bus *bus); |
|
- | 763 | void pcibios_add_bus(struct pci_bus *bus); |
|
- | 764 | void pcibios_remove_bus(struct pci_bus *bus); |
|
- | 765 | void pcibios_fixup_bus(struct pci_bus *); |
|
- | 766 | int __must_check pcibios_enable_device(struct pci_dev *, int mask); |
|
- | 767 | /* Architecture-specific versions may override this (weak) */ |
|
- | 768 | char *pcibios_setup(char *str); |
|
- | 769 | ||
- | 770 | /* Used only when drivers/pci/setup.c is used */ |
|
- | 771 | resource_size_t pcibios_align_resource(void *, const struct resource *, |
|
- | 772 | resource_size_t, |
|
- | 773 | resource_size_t); |
|
- | 774 | void pcibios_update_irq(struct pci_dev *, int irq); |
|
- | 775 | ||
- | 776 | /* Weak but can be overriden by arch */ |
|
- | 777 | void pci_fixup_cardbus(struct pci_bus *); |
|
- | 778 | ||
- | 779 | /* Generic PCI functions used internally */ |
|
- | 780 | ||
- | 781 | void pcibios_resource_to_bus(struct pci_bus *bus, struct pci_bus_region *region, |
|
- | 782 | struct resource *res); |
|
- | 783 | void pcibios_bus_to_resource(struct pci_bus *bus, struct resource *res, |
|
- | 784 | struct pci_bus_region *region); |
|
- | 785 | void pcibios_scan_specific_bus(int busn); |
|
- | 786 | struct pci_bus *pci_find_bus(int domain, int busnr); |
|
- | 787 | void pci_bus_add_devices(const struct pci_bus *bus); |
|
- | 788 | struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata); |
|
- | 789 | struct pci_bus *pci_create_root_bus(struct device *parent, int bus, |
|
- | 790 | struct pci_ops *ops, void *sysdata, |
|
- | 791 | struct list_head *resources); |
|
- | 792 | int pci_bus_insert_busn_res(struct pci_bus *b, int bus, int busmax); |
|
- | 793 | int pci_bus_update_busn_res_end(struct pci_bus *b, int busmax); |
|
- | 794 | void pci_bus_release_busn_res(struct pci_bus *b); |
|
- | 795 | struct pci_bus *pci_scan_root_bus_msi(struct device *parent, int bus, |
|
- | 796 | struct pci_ops *ops, void *sysdata, |
|
- | 797 | struct list_head *resources, |
|
- | 798 | struct msi_controller *msi); |
|
- | 799 | struct pci_bus *pci_scan_root_bus(struct device *parent, int bus, |
|
- | 800 | struct pci_ops *ops, void *sysdata, |
|
- | 801 | struct list_head *resources); |
|
- | 802 | struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, |
|
- | 803 | int busnr); |
|
- | 804 | void pcie_update_link_speed(struct pci_bus *bus, u16 link_status); |
|
- | 805 | struct pci_slot *pci_create_slot(struct pci_bus *parent, int slot_nr, |
|
- | 806 | const char *name, |
|
- | 807 | struct hotplug_slot *hotplug); |
|
- | 808 | void pci_destroy_slot(struct pci_slot *slot); |
|
- | 809 | #ifdef CONFIG_SYSFS |
|
- | 810 | void pci_dev_assign_slot(struct pci_dev *dev); |
|
- | 811 | #else |
|
- | 812 | static inline void pci_dev_assign_slot(struct pci_dev *dev) { } |
|
- | 813 | #endif |
|
- | 814 | int pci_scan_slot(struct pci_bus *bus, int devfn); |
|
- | 815 | struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn); |
|
- | 816 | void pci_device_add(struct pci_dev *dev, struct pci_bus *bus); |
|
- | 817 | unsigned int pci_scan_child_bus(struct pci_bus *bus); |
|
- | 818 | void pci_bus_add_device(struct pci_dev *dev); |
|
- | 819 | void pci_read_bridge_bases(struct pci_bus *child); |
|
- | 820 | struct resource *pci_find_parent_resource(const struct pci_dev *dev, |
|
- | 821 | struct resource *res); |
|
- | 822 | struct pci_dev *pci_find_pcie_root_port(struct pci_dev *dev); |
|
- | 823 | u8 pci_swizzle_interrupt_pin(const struct pci_dev *dev, u8 pin); |
|
- | 824 | int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge); |
|
- | 825 | u8 pci_common_swizzle(struct pci_dev *dev, u8 *pinp); |
|
- | 826 | struct pci_dev *pci_dev_get(struct pci_dev *dev); |
|
- | 827 | void pci_dev_put(struct pci_dev *dev); |
|
- | 828 | void pci_remove_bus(struct pci_bus *b); |
|
- | 829 | void pci_stop_and_remove_bus_device(struct pci_dev *dev); |
|
- | 830 | void pci_stop_and_remove_bus_device_locked(struct pci_dev *dev); |
|
- | 831 | void pci_stop_root_bus(struct pci_bus *bus); |
|
- | 832 | void pci_remove_root_bus(struct pci_bus *bus); |
|
- | 833 | void pci_setup_cardbus(struct pci_bus *bus); |
|
- | 834 | void pci_sort_breadthfirst(void); |
|
- | 835 | #define dev_is_pci(d) ((d)->bus == &pci_bus_type) |
|
- | 836 | #define dev_is_pf(d) ((dev_is_pci(d) ? to_pci_dev(d)->is_physfn : false)) |
|
- | 837 | #define dev_num_vf(d) ((dev_is_pci(d) ? pci_num_vf(to_pci_dev(d)) : 0)) |
|
- | 838 | ||
- | 839 | /* Generic PCI functions exported to card drivers */ |
|
- | 840 | ||
- | 841 | enum pci_lost_interrupt_reason { |
|
- | 842 | PCI_LOST_IRQ_NO_INFORMATION = 0, |
|
- | 843 | PCI_LOST_IRQ_DISABLE_MSI, |
|
- | 844 | PCI_LOST_IRQ_DISABLE_MSIX, |
|
- | 845 | PCI_LOST_IRQ_DISABLE_ACPI, |
|
- | 846 | }; |
|
- | 847 | enum pci_lost_interrupt_reason pci_lost_interrupt(struct pci_dev *dev); |
|
- | 848 | int pci_find_capability(struct pci_dev *dev, int cap); |
|
- | 849 | int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap); |
|
- | 850 | int pci_find_ext_capability(struct pci_dev *dev, int cap); |
|
- | 851 | int pci_find_next_ext_capability(struct pci_dev *dev, int pos, int cap); |
|
- | 852 | int pci_find_ht_capability(struct pci_dev *dev, int ht_cap); |
|
- | 853 | int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap); |
|
- | 854 | struct pci_bus *pci_find_next_bus(const struct pci_bus *from); |
|
- | 855 | ||
- | 856 | struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device, |
|
- | 857 | struct pci_dev *from); |
|
- | 858 | struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device, |
|
- | 859 | unsigned int ss_vendor, unsigned int ss_device, |
|
- | 860 | struct pci_dev *from); |
|
- | 861 | struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn); |
|
- | 862 | struct pci_dev *pci_get_domain_bus_and_slot(int domain, unsigned int bus, |
|
- | 863 | unsigned int devfn); |
|
- | 864 | static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus, |
|
- | 865 | unsigned int devfn) |
|
- | 866 | { |
|
- | 867 | return pci_get_domain_bus_and_slot(0, bus, devfn); |
|
- | 868 | } |
|
- | 869 | struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from); |
|
- | 870 | int pci_dev_present(const struct pci_device_id *ids); |
|
- | 871 | ||
- | 872 | int pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn, |
|
- | 873 | int where, u8 *val); |
|
- | 874 | int pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn, |
|
- | 875 | int where, u16 *val); |
|
- | 876 | int pci_bus_read_config_dword(struct pci_bus *bus, unsigned int devfn, |
|
- | 877 | int where, u32 *val); |
|
- | 878 | int pci_bus_write_config_byte(struct pci_bus *bus, unsigned int devfn, |
|
- | 879 | int where, u8 val); |
|
- | 880 | int pci_bus_write_config_word(struct pci_bus *bus, unsigned int devfn, |
|
- | 881 | int where, u16 val); |
|
- | 882 | int pci_bus_write_config_dword(struct pci_bus *bus, unsigned int devfn, |
|
- | 883 | int where, u32 val); |
|
- | 884 | ||
- | 885 | int pci_generic_config_read(struct pci_bus *bus, unsigned int devfn, |
|
- | 886 | int where, int size, u32 *val); |
|
- | 887 | int pci_generic_config_write(struct pci_bus *bus, unsigned int devfn, |
|
- | 888 | int where, int size, u32 val); |
|
- | 889 | int pci_generic_config_read32(struct pci_bus *bus, unsigned int devfn, |
|
- | 890 | int where, int size, u32 *val); |
|
- | 891 | int pci_generic_config_write32(struct pci_bus *bus, unsigned int devfn, |
|
- | 892 | int where, int size, u32 val); |
|
- | 893 | ||
- | 894 | struct pci_ops *pci_bus_set_ops(struct pci_bus *bus, struct pci_ops *ops); |
|
- | 895 | ||
- | 896 | static inline int pci_read_config_byte(const struct pci_dev *dev, int where, u8 *val) |
|
- | 897 | { |
|
- | 898 | *val = PciRead8(dev->busnr, dev->devfn, where); |
|
- | 899 | return 1; |
|
- | 900 | } |
|
- | 901 | static inline int pci_read_config_word(const struct pci_dev *dev, int where, u16 *val) |
|
- | 902 | { |
|
- | 903 | *val = PciRead16(dev->busnr, dev->devfn, where); |
|
- | 904 | return 1; |
|
- | 905 | } |
|
- | 906 | static inline int pci_read_config_dword(const struct pci_dev *dev, int where, |
|
- | 907 | u32 *val) |
|
- | 908 | { |
|
- | 909 | *val = PciRead32(dev->busnr, dev->devfn, where); |
|
- | 910 | return 1; |
|
- | 911 | } |
|
- | 912 | static inline int pci_write_config_byte(const struct pci_dev *dev, int where, u8 val) |
|
- | 913 | { |
|
- | 914 | PciWrite8(dev->busnr, dev->devfn, where, val); |
|
- | 915 | return 1; |
|
- | 916 | } |
|
- | 917 | static inline int pci_write_config_word(const struct pci_dev *dev, int where, u16 val) |
|
- | 918 | { |
|
- | 919 | PciWrite16(dev->busnr, dev->devfn, where, val); |
|
- | 920 | return 1; |
|
- | 921 | } |
|
- | 922 | static inline int pci_write_config_dword(const struct pci_dev *dev, int where, |
|
- | 923 | u32 val) |
|
- | 924 | { |
|
- | 925 | PciWrite32(dev->busnr, dev->devfn, where, val); |
|
- | 926 | return 1; |
|
- | 927 | } |
|
- | 928 | ||
- | 929 | int pcie_capability_read_word(struct pci_dev *dev, int pos, u16 *val); |
|
- | 930 | int pcie_capability_read_dword(struct pci_dev *dev, int pos, u32 *val); |
|
- | 931 | int pcie_capability_write_word(struct pci_dev *dev, int pos, u16 val); |
|
- | 932 | int pcie_capability_write_dword(struct pci_dev *dev, int pos, u32 val); |
|
- | 933 | int pcie_capability_clear_and_set_word(struct pci_dev *dev, int pos, |
|
- | 934 | u16 clear, u16 set); |
|
- | 935 | int pcie_capability_clear_and_set_dword(struct pci_dev *dev, int pos, |
|
- | 936 | u32 clear, u32 set); |
|
- | 937 | ||
- | 938 | static inline int pcie_capability_set_word(struct pci_dev *dev, int pos, |
|
- | 939 | u16 set) |
|
- | 940 | { |
|
- | 941 | return pcie_capability_clear_and_set_word(dev, pos, 0, set); |
|
- | 942 | } |
|
- | 943 | ||
- | 944 | static inline int pcie_capability_set_dword(struct pci_dev *dev, int pos, |
|
- | 945 | u32 set) |
|
- | 946 | { |
|
- | 947 | return pcie_capability_clear_and_set_dword(dev, pos, 0, set); |
|
- | 948 | } |
|
- | 949 | ||
- | 950 | static inline int pcie_capability_clear_word(struct pci_dev *dev, int pos, |
|
- | 951 | u16 clear) |
|
- | 952 | { |
|
- | 953 | return pcie_capability_clear_and_set_word(dev, pos, clear, 0); |
|
- | 954 | } |
|
- | 955 | ||
- | 956 | static inline int pcie_capability_clear_dword(struct pci_dev *dev, int pos, |
|
- | 957 | u32 clear) |
|
- | 958 | { |
|
- | 959 | return pcie_capability_clear_and_set_dword(dev, pos, clear, 0); |
|
- | 960 | } |
|
- | 961 | ||
- | 962 | /* user-space driven config access */ |
|
- | 963 | int pci_user_read_config_byte(struct pci_dev *dev, int where, u8 *val); |
|
- | 964 | int pci_user_read_config_word(struct pci_dev *dev, int where, u16 *val); |
|
- | 965 | int pci_user_read_config_dword(struct pci_dev *dev, int where, u32 *val); |
|
- | 966 | int pci_user_write_config_byte(struct pci_dev *dev, int where, u8 val); |
|
- | 967 | int pci_user_write_config_word(struct pci_dev *dev, int where, u16 val); |
|
- | 968 | int pci_user_write_config_dword(struct pci_dev *dev, int where, u32 val); |
|
- | 969 | ||
- | 970 | int __must_check pci_enable_device(struct pci_dev *dev); |
|
- | 971 | int __must_check pci_enable_device_io(struct pci_dev *dev); |
|
- | 972 | int __must_check pci_enable_device_mem(struct pci_dev *dev); |
|
- | 973 | int __must_check pci_reenable_device(struct pci_dev *); |
|
- | 974 | int __must_check pcim_enable_device(struct pci_dev *pdev); |
|
- | 975 | void pcim_pin_device(struct pci_dev *pdev); |
|
- | 976 | ||
- | 977 | static inline int pci_is_enabled(struct pci_dev *pdev) |
|
- | 978 | { |
|
- | 979 | return (atomic_read(&pdev->enable_cnt) > 0); |
|
- | 980 | } |
|
- | 981 | ||
- | 982 | static inline int pci_is_managed(struct pci_dev *pdev) |
|
- | 983 | { |
|
- | 984 | return pdev->is_managed; |
|
- | 985 | } |
|
- | 986 | ||
- | 987 | static inline void pci_set_managed_irq(struct pci_dev *pdev, unsigned int irq) |
|
- | 988 | { |
|
- | 989 | pdev->irq = irq; |
|
- | 990 | pdev->irq_managed = 1; |
|
- | 991 | } |
|
- | 992 | ||
- | 993 | static inline void pci_reset_managed_irq(struct pci_dev *pdev) |
|
- | 994 | { |
|
- | 995 | pdev->irq = 0; |
|
- | 996 | pdev->irq_managed = 0; |
|
- | 997 | } |
|
- | 998 | ||
- | 999 | static inline bool pci_has_managed_irq(struct pci_dev *pdev) |
|
- | 1000 | { |
|
- | 1001 | return pdev->irq_managed && pdev->irq > 0; |
|
- | 1002 | } |
|
- | 1003 | ||
- | 1004 | void pci_disable_device(struct pci_dev *dev); |
|
- | 1005 | ||
- | 1006 | extern unsigned int pcibios_max_latency; |
|
- | 1007 | void pci_set_master(struct pci_dev *dev); |
|
- | 1008 | void pci_clear_master(struct pci_dev *dev); |
|
- | 1009 | ||
- | 1010 | int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state); |
|
- | 1011 | int pci_set_cacheline_size(struct pci_dev *dev); |
|
- | 1012 | #define HAVE_PCI_SET_MWI |
|
- | 1013 | int __must_check pci_set_mwi(struct pci_dev *dev); |
|
- | 1014 | int pci_try_set_mwi(struct pci_dev *dev); |
|
- | 1015 | void pci_clear_mwi(struct pci_dev *dev); |
|
- | 1016 | void pci_intx(struct pci_dev *dev, int enable); |
|
- | 1017 | bool pci_intx_mask_supported(struct pci_dev *dev); |
|
- | 1018 | bool pci_check_and_mask_intx(struct pci_dev *dev); |
|
- | 1019 | bool pci_check_and_unmask_intx(struct pci_dev *dev); |
|
- | 1020 | int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size); |
|
- | 1021 | int pci_set_dma_seg_boundary(struct pci_dev *dev, unsigned long mask); |
|
- | 1022 | int pci_wait_for_pending(struct pci_dev *dev, int pos, u16 mask); |
|
- | 1023 | int pci_wait_for_pending_transaction(struct pci_dev *dev); |
|
- | 1024 | int pcix_get_max_mmrbc(struct pci_dev *dev); |
|
- | 1025 | int pcix_get_mmrbc(struct pci_dev *dev); |
|
- | 1026 | int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc); |
|
- | 1027 | int pcie_get_readrq(struct pci_dev *dev); |
|
- | 1028 | int pcie_set_readrq(struct pci_dev *dev, int rq); |
|
- | 1029 | int pcie_get_mps(struct pci_dev *dev); |
|
- | 1030 | int pcie_set_mps(struct pci_dev *dev, int mps); |
|
- | 1031 | int pcie_get_minimum_link(struct pci_dev *dev, enum pci_bus_speed *speed, |
|
- | 1032 | enum pcie_link_width *width); |
|
- | 1033 | int __pci_reset_function(struct pci_dev *dev); |
|
- | 1034 | int __pci_reset_function_locked(struct pci_dev *dev); |
|
- | 1035 | int pci_reset_function(struct pci_dev *dev); |
|
- | 1036 | int pci_try_reset_function(struct pci_dev *dev); |
|
- | 1037 | int pci_probe_reset_slot(struct pci_slot *slot); |
|
- | 1038 | int pci_reset_slot(struct pci_slot *slot); |
|
- | 1039 | int pci_try_reset_slot(struct pci_slot *slot); |
|
- | 1040 | int pci_probe_reset_bus(struct pci_bus *bus); |
|
- | 1041 | int pci_reset_bus(struct pci_bus *bus); |
|
- | 1042 | int pci_try_reset_bus(struct pci_bus *bus); |
|
- | 1043 | void pci_reset_secondary_bus(struct pci_dev *dev); |
|
- | 1044 | void pcibios_reset_secondary_bus(struct pci_dev *dev); |
|
- | 1045 | void pci_reset_bridge_secondary_bus(struct pci_dev *dev); |
|
- | 1046 | void pci_update_resource(struct pci_dev *dev, int resno); |
|
- | 1047 | int __must_check pci_assign_resource(struct pci_dev *dev, int i); |
|
- | 1048 | int __must_check pci_reassign_resource(struct pci_dev *dev, int i, resource_size_t add_size, resource_size_t align); |
|
- | 1049 | int pci_select_bars(struct pci_dev *dev, unsigned long flags); |
|
- | 1050 | bool pci_device_is_present(struct pci_dev *pdev); |
|
- | 1051 | void pci_ignore_hotplug(struct pci_dev *dev); |
|
- | 1052 | ||
- | 1053 | /* ROM control related routines */ |
|
- | 1054 | int pci_enable_rom(struct pci_dev *pdev); |
|
- | 1055 | void pci_disable_rom(struct pci_dev *pdev); |
|
- | 1056 | void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size); |
|
- | 1057 | void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom); |
|
- | 1058 | size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size); |
|
- | 1059 | void __iomem __must_check *pci_platform_rom(struct pci_dev *pdev, size_t *size); |
|
- | 1060 | ||
- | 1061 | /* Power management related routines */ |
|
- | 1062 | int pci_save_state(struct pci_dev *dev); |
|
- | 1063 | void pci_restore_state(struct pci_dev *dev); |
|
- | 1064 | struct pci_saved_state *pci_store_saved_state(struct pci_dev *dev); |
|
- | 1065 | int pci_load_saved_state(struct pci_dev *dev, |
|
- | 1066 | struct pci_saved_state *state); |
|
- | 1067 | int pci_load_and_free_saved_state(struct pci_dev *dev, |
|
- | 1068 | struct pci_saved_state **state); |
|
- | 1069 | struct pci_cap_saved_state *pci_find_saved_cap(struct pci_dev *dev, char cap); |
|
- | 1070 | struct pci_cap_saved_state *pci_find_saved_ext_cap(struct pci_dev *dev, |
|
- | 1071 | u16 cap); |
|
- | 1072 | int pci_add_cap_save_buffer(struct pci_dev *dev, char cap, unsigned int size); |
|
- | 1073 | int pci_add_ext_cap_save_buffer(struct pci_dev *dev, |
|
- | 1074 | u16 cap, unsigned int size); |
|
- | 1075 | int __pci_complete_power_transition(struct pci_dev *dev, pci_power_t state); |
|
- | 1076 | int pci_set_power_state(struct pci_dev *dev, pci_power_t state); |
|
- | 1077 | pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state); |
|
- | 1078 | bool pci_pme_capable(struct pci_dev *dev, pci_power_t state); |
|
- | 1079 | void pci_pme_active(struct pci_dev *dev, bool enable); |
|
- | 1080 | int __pci_enable_wake(struct pci_dev *dev, pci_power_t state, |
|
- | 1081 | bool runtime, bool enable); |
|
- | 1082 | int pci_wake_from_d3(struct pci_dev *dev, bool enable); |
|
- | 1083 | int pci_prepare_to_sleep(struct pci_dev *dev); |
|
- | 1084 | int pci_back_from_sleep(struct pci_dev *dev); |
|
- | 1085 | bool pci_dev_run_wake(struct pci_dev *dev); |
|
- | 1086 | bool pci_check_pme_status(struct pci_dev *dev); |
|
- | 1087 | void pci_pme_wakeup_bus(struct pci_bus *bus); |
|
- | 1088 | ||
- | 1089 | static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, |
|
- | 1090 | bool enable) |
|
- | 1091 | { |
|
- | 1092 | return __pci_enable_wake(dev, state, false, enable); |
|
- | 1093 | } |
|
- | 1094 | ||
- | 1095 | /* PCI Virtual Channel */ |
|
- | 1096 | int pci_save_vc_state(struct pci_dev *dev); |
|
- | 1097 | void pci_restore_vc_state(struct pci_dev *dev); |
|
- | 1098 | void pci_allocate_vc_save_buffers(struct pci_dev *dev); |
|
- | 1099 | ||
- | 1100 | /* For use by arch with custom probe code */ |
|
- | 1101 | void set_pcie_port_type(struct pci_dev *pdev); |
|
- | 1102 | void set_pcie_hotplug_bridge(struct pci_dev *pdev); |
|
- | 1103 | ||
- | 1104 | /* Functions for PCI Hotplug drivers to use */ |
|
- | 1105 | int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap); |
|
- | 1106 | unsigned int pci_rescan_bus_bridge_resize(struct pci_dev *bridge); |
|
- | 1107 | unsigned int pci_rescan_bus(struct pci_bus *bus); |
|
- | 1108 | void pci_lock_rescan_remove(void); |
|
- | 1109 | void pci_unlock_rescan_remove(void); |
|
- | 1110 | ||
- | 1111 | /* Vital product data routines */ |
|
- | 1112 | ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf); |
|
- | 1113 | ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf); |
|
- | 1114 | ||
- | 1115 | /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */ |
|
- | 1116 | resource_size_t pcibios_retrieve_fw_addr(struct pci_dev *dev, int idx); |
|
- | 1117 | void pci_bus_assign_resources(const struct pci_bus *bus); |
|
- | 1118 | void pci_bus_size_bridges(struct pci_bus *bus); |
|
- | 1119 | int pci_claim_resource(struct pci_dev *, int); |
|
- | 1120 | int pci_claim_bridge_resource(struct pci_dev *bridge, int i); |
|
- | 1121 | void pci_assign_unassigned_resources(void); |
|
- | 1122 | void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge); |
|
- | 1123 | void pci_assign_unassigned_bus_resources(struct pci_bus *bus); |
|
- | 1124 | void pci_assign_unassigned_root_bus_resources(struct pci_bus *bus); |
|
- | 1125 | void pdev_enable_device(struct pci_dev *); |
|
- | 1126 | int pci_enable_resources(struct pci_dev *, int mask); |
|
- | 1127 | void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *), |
|
- | 1128 | int (*)(const struct pci_dev *, u8, u8)); |
|
- | 1129 | #define HAVE_PCI_REQ_REGIONS 2 |
|
- | 1130 | int __must_check pci_request_regions(struct pci_dev *, const char *); |
|
- | 1131 | int __must_check pci_request_regions_exclusive(struct pci_dev *, const char *); |
|
- | 1132 | void pci_release_regions(struct pci_dev *); |
|
- | 1133 | int __must_check pci_request_region(struct pci_dev *, int, const char *); |
|
- | 1134 | int __must_check pci_request_region_exclusive(struct pci_dev *, int, const char *); |
|
- | 1135 | void pci_release_region(struct pci_dev *, int); |
|
- | 1136 | int pci_request_selected_regions(struct pci_dev *, int, const char *); |
|
- | 1137 | int pci_request_selected_regions_exclusive(struct pci_dev *, int, const char *); |
|
- | 1138 | void pci_release_selected_regions(struct pci_dev *, int); |
|
- | 1139 | ||
- | 1140 | /* drivers/pci/bus.c */ |
|
- | 1141 | struct pci_bus *pci_bus_get(struct pci_bus *bus); |
|
- | 1142 | void pci_bus_put(struct pci_bus *bus); |
|
- | 1143 | void pci_add_resource(struct list_head *resources, struct resource *res); |
|
- | 1144 | void pci_add_resource_offset(struct list_head *resources, struct resource *res, |
|
- | 1145 | resource_size_t offset); |
|
- | 1146 | void pci_free_resource_list(struct list_head *resources); |
|
- | 1147 | void pci_bus_add_resource(struct pci_bus *bus, struct resource *res, unsigned int flags); |
|
- | 1148 | struct resource *pci_bus_resource_n(const struct pci_bus *bus, int n); |
|
- | 1149 | void pci_bus_remove_resources(struct pci_bus *bus); |
|
- | 1150 | ||
- | 1151 | #define pci_bus_for_each_resource(bus, res, i) \ |
|
- | 1152 | for (i = 0; \ |
|
- | 1153 | (res = pci_bus_resource_n(bus, i)) || i < PCI_BRIDGE_RESOURCE_NUM; \ |
|
- | 1154 | i++) |
|
- | 1155 | ||
- | 1156 | int __must_check pci_bus_alloc_resource(struct pci_bus *bus, |
|
- | 1157 | struct resource *res, resource_size_t size, |
|
- | 1158 | resource_size_t align, resource_size_t min, |
|
- | 1159 | unsigned long type_mask, |
|
- | 1160 | resource_size_t (*alignf)(void *, |
|
- | 1161 | const struct resource *, |
|
- | 1162 | resource_size_t, |
|
- | 1163 | resource_size_t), |
|
- | 1164 | void *alignf_data); |
|
- | 1165 | ||
- | 1166 | ||
- | 1167 | int pci_remap_iospace(const struct resource *res, phys_addr_t phys_addr); |
|
- | 1168 | ||
- | 1169 | static inline pci_bus_addr_t pci_bus_address(struct pci_dev *pdev, int bar) |
|
- | 1170 | { |
|
- | 1171 | struct pci_bus_region region; |
|
- | 1172 | ||
- | 1173 | pcibios_resource_to_bus(pdev->bus, ®ion, &pdev->resource[bar]); |
|
- | 1174 | return region.start; |
|
- | 1175 | } |
|
- | 1176 | ||
- | 1177 | /* Proper probing supporting hot-pluggable devices */ |
|
- | 1178 | int __must_check __pci_register_driver(struct pci_driver *, struct module *, |
|
- | 1179 | const char *mod_name); |
|
- | 1180 | ||
- | 1181 | /* |
|
- | 1182 | * pci_register_driver must be a macro so that KBUILD_MODNAME can be expanded |
|
- | 1183 | */ |
|
- | 1184 | #define pci_register_driver(driver) \ |
|
- | 1185 | __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME) |
|
- | 1186 | ||
- | 1187 | void pci_unregister_driver(struct pci_driver *dev); |
|
- | 1188 | ||
- | 1189 | /** |
|
- | 1190 | * module_pci_driver() - Helper macro for registering a PCI driver |
|
- | 1191 | * @__pci_driver: pci_driver struct |
|
- | 1192 | * |
|
- | 1193 | * Helper macro for PCI drivers which do not do anything special in module |
|
- | 1194 | * init/exit. This eliminates a lot of boilerplate. Each module may only |
|
- | 1195 | * use this macro once, and calling it replaces module_init() and module_exit() |
|
- | 1196 | */ |
|
- | 1197 | #define module_pci_driver(__pci_driver) \ |
|
- | 1198 | module_driver(__pci_driver, pci_register_driver, \ |
|
- | 1199 | pci_unregister_driver) |
|
- | 1200 | ||
- | 1201 | /** |
|
- | 1202 | * builtin_pci_driver() - Helper macro for registering a PCI driver |
|
- | 1203 | * @__pci_driver: pci_driver struct |
|
- | 1204 | * |
|
- | 1205 | * Helper macro for PCI drivers which do not do anything special in their |
|
- | 1206 | * init code. This eliminates a lot of boilerplate. Each driver may only |
|
- | 1207 | * use this macro once, and calling it replaces device_initcall(...) |
|
- | 1208 | */ |
|
- | 1209 | #define builtin_pci_driver(__pci_driver) \ |
|
- | 1210 | builtin_driver(__pci_driver, pci_register_driver) |
|
- | 1211 | ||
- | 1212 | struct pci_driver *pci_dev_driver(const struct pci_dev *dev); |
|
- | 1213 | int pci_add_dynid(struct pci_driver *drv, |
|
- | 1214 | unsigned int vendor, unsigned int device, |
|
- | 1215 | unsigned int subvendor, unsigned int subdevice, |
|
- | 1216 | unsigned int class, unsigned int class_mask, |
|
- | 1217 | unsigned long driver_data); |
|
- | 1218 | const struct pci_device_id *pci_match_id(const struct pci_device_id *ids, |
|
- | 1219 | struct pci_dev *dev); |
|
- | 1220 | int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max, |
|
- | 1221 | int pass); |
|
- | 1222 | ||
- | 1223 | void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *), |
|
- | 1224 | void *userdata); |
|
- | 1225 | int pci_cfg_space_size(struct pci_dev *dev); |
|
- | 1226 | unsigned char pci_bus_max_busnr(struct pci_bus *bus); |
|
- | 1227 | void pci_setup_bridge(struct pci_bus *bus); |
|
- | 1228 | resource_size_t pcibios_window_alignment(struct pci_bus *bus, |
|
- | 1229 | unsigned long type); |
|
- | 1230 | resource_size_t pcibios_iov_resource_alignment(struct pci_dev *dev, int resno); |
|
- | 1231 | ||
- | 1232 | #define PCI_VGA_STATE_CHANGE_BRIDGE (1 << 0) |
|
- | 1233 | #define PCI_VGA_STATE_CHANGE_DECODES (1 << 1) |
|
- | 1234 | ||
- | 1235 | int pci_set_vga_state(struct pci_dev *pdev, bool decode, |
|
- | 1236 | unsigned int command_bits, u32 flags); |
|
- | 1237 | /* kmem_cache style wrapper around pci_alloc_consistent() */ |
|
- | 1238 | ||
- | 1239 | #include |
|
- | 1240 | #include |
|
- | 1241 | ||
- | 1242 | #define pci_pool dma_pool |
|
- | 1243 | #define pci_pool_create(name, pdev, size, align, allocation) \ |
|
- | 1244 | dma_pool_create(name, &pdev->dev, size, align, allocation) |
|
- | 1245 | #define pci_pool_destroy(pool) dma_pool_destroy(pool) |
|
- | 1246 | #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle) |
|
- | 1247 | #define pci_pool_zalloc(pool, flags, handle) \ |
|
- | 1248 | dma_pool_zalloc(pool, flags, handle) |
|
- | 1249 | #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr) |
|
- | 1250 | ||
- | 1251 | struct msix_entry { |
|
- | 1252 | u32 vector; /* kernel uses to write allocated vector */ |
|
- | 1253 | u16 entry; /* driver uses to specify entry, OS writes */ |
|
- | 1254 | }; |
|
- | 1255 | ||
- | 1256 | void pci_msi_setup_pci_dev(struct pci_dev *dev); |
|
- | 1257 | ||
- | 1258 | #ifdef CONFIG_PCI_MSI |
|
- | 1259 | int pci_msi_vec_count(struct pci_dev *dev); |
|
- | 1260 | void pci_msi_shutdown(struct pci_dev *dev); |
|
- | 1261 | void pci_disable_msi(struct pci_dev *dev); |
|
- | 1262 | int pci_msix_vec_count(struct pci_dev *dev); |
|
- | 1263 | int pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, int nvec); |
|
- | 1264 | void pci_msix_shutdown(struct pci_dev *dev); |
|
- | 1265 | void pci_disable_msix(struct pci_dev *dev); |
|
- | 1266 | void pci_restore_msi_state(struct pci_dev *dev); |
|
- | 1267 | int pci_msi_enabled(void); |
|
- | 1268 | int pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec); |
|
- | 1269 | static inline int pci_enable_msi_exact(struct pci_dev *dev, int nvec) |
|
- | 1270 | { |
|
- | 1271 | int rc = pci_enable_msi_range(dev, nvec, nvec); |
|
- | 1272 | if (rc < 0) |
|
- | 1273 | return rc; |
|
- | 1274 | return 0; |
|
- | 1275 | } |
|
- | 1276 | int pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries, |
|
- | 1277 | int minvec, int maxvec); |
|
- | 1278 | static inline int pci_enable_msix_exact(struct pci_dev *dev, |
|
- | 1279 | struct msix_entry *entries, int nvec) |
|
- | 1280 | { |
|
- | 1281 | int rc = pci_enable_msix_range(dev, entries, nvec, nvec); |
|
- | 1282 | if (rc < 0) |
|
- | 1283 | return rc; |
|
- | 1284 | return 0; |
|
- | 1285 | } |
|
- | 1286 | #else |
|
- | 1287 | static inline int pci_msi_vec_count(struct pci_dev *dev) { return -ENOSYS; } |
|
- | 1288 | static inline void pci_msi_shutdown(struct pci_dev *dev) { } |
|
- | 1289 | static inline void pci_disable_msi(struct pci_dev *dev) { } |
|
- | 1290 | static inline int pci_msix_vec_count(struct pci_dev *dev) { return -ENOSYS; } |
|
- | 1291 | static inline int pci_enable_msix(struct pci_dev *dev, |
|
- | 1292 | struct msix_entry *entries, int nvec) |
|
- | 1293 | { return -ENOSYS; } |
|
- | 1294 | static inline void pci_msix_shutdown(struct pci_dev *dev) { } |
|
- | 1295 | static inline void pci_disable_msix(struct pci_dev *dev) { } |
|
- | 1296 | static inline void pci_restore_msi_state(struct pci_dev *dev) { } |
|
- | 1297 | static inline int pci_msi_enabled(void) { return 0; } |
|
- | 1298 | static inline int pci_enable_msi_range(struct pci_dev *dev, int minvec, |
|
- | 1299 | int maxvec) |
|
- | 1300 | { return -ENOSYS; } |
|
- | 1301 | static inline int pci_enable_msi_exact(struct pci_dev *dev, int nvec) |
|
- | 1302 | { return -ENOSYS; } |
|
- | 1303 | static inline int pci_enable_msix_range(struct pci_dev *dev, |
|
- | 1304 | struct msix_entry *entries, int minvec, int maxvec) |
|
- | 1305 | { return -ENOSYS; } |
|
- | 1306 | static inline int pci_enable_msix_exact(struct pci_dev *dev, |
|
- | 1307 | struct msix_entry *entries, int nvec) |
|
- | 1308 | { return -ENOSYS; } |
|
- | 1309 | #endif |
|
- | 1310 | ||
- | 1311 | #ifdef CONFIG_PCIEPORTBUS |
|
- | 1312 | extern bool pcie_ports_disabled; |
|
- | 1313 | extern bool pcie_ports_auto; |
|
- | 1314 | #else |
|
- | 1315 | #define pcie_ports_disabled true |
|
- | 1316 | #define pcie_ports_auto false |
|
- | 1317 | #endif |
|
- | 1318 | ||
- | 1319 | #ifdef CONFIG_PCIEASPM |
|
- | 1320 | bool pcie_aspm_support_enabled(void); |
|
- | 1321 | #else |
|
- | 1322 | static inline bool pcie_aspm_support_enabled(void) { return false; } |
|
- | 1323 | #endif |
|
- | 1324 | ||
- | 1325 | #ifdef CONFIG_PCIEAER |
|
- | 1326 | void pci_no_aer(void); |
|
- | 1327 | bool pci_aer_available(void); |
|
- | 1328 | #else |
|
- | 1329 | static inline void pci_no_aer(void) { } |
|
- | 1330 | static inline bool pci_aer_available(void) { return false; } |
|
- | 1331 | #endif |
|
- | 1332 | ||
- | 1333 | #ifdef CONFIG_PCIE_ECRC |
|
- | 1334 | void pcie_set_ecrc_checking(struct pci_dev *dev); |
|
- | 1335 | void pcie_ecrc_get_policy(char *str); |
|
- | 1336 | #else |
|
- | 1337 | static inline void pcie_set_ecrc_checking(struct pci_dev *dev) { } |
|
- | 1338 | static inline void pcie_ecrc_get_policy(char *str) { } |
|
- | 1339 | #endif |
|
- | 1340 | ||
- | 1341 | #define pci_enable_msi(pdev) pci_enable_msi_exact(pdev, 1) |
|
- | 1342 | ||
- | 1343 | #ifdef CONFIG_HT_IRQ |
|
- | 1344 | /* The functions a driver should call */ |
|
- | 1345 | int ht_create_irq(struct pci_dev *dev, int idx); |
|
- | 1346 | void ht_destroy_irq(unsigned int irq); |
|
- | 1347 | #endif /* CONFIG_HT_IRQ */ |
|
- | 1348 | ||
- | 1349 | #ifdef CONFIG_PCI_ATS |
|
- | 1350 | /* Address Translation Service */ |
|
- | 1351 | void pci_ats_init(struct pci_dev *dev); |
|
- | 1352 | int pci_enable_ats(struct pci_dev *dev, int ps); |
|
- | 1353 | void pci_disable_ats(struct pci_dev *dev); |
|
- | 1354 | int pci_ats_queue_depth(struct pci_dev *dev); |
|
- | 1355 | #else |
|
- | 1356 | static inline void pci_ats_init(struct pci_dev *d) { } |
|
- | 1357 | static inline int pci_enable_ats(struct pci_dev *d, int ps) { return -ENODEV; } |
|
- | 1358 | static inline void pci_disable_ats(struct pci_dev *d) { } |
|
- | 1359 | static inline int pci_ats_queue_depth(struct pci_dev *d) { return -ENODEV; } |
|
- | 1360 | #endif |
|
- | 1361 | ||
- | 1362 | void pci_cfg_access_lock(struct pci_dev *dev); |
|
639 | pci_bar_mem64, /* A 64-bit memory BAR */ |
1363 | bool pci_cfg_access_trylock(struct pci_dev *dev); |
640 | }; |
1364 | void pci_cfg_access_unlock(struct pci_dev *dev); |
641 | 1365 | ||
642 | /* |
1366 | /* |
643 | * PCI domain support. Sometimes called PCI segment (eg by ACPI), |
1367 | * PCI domain support. Sometimes called PCI segment (eg by ACPI), |
644 | * a PCI domain is defined to be a set of PCI busses which share |
1368 | * a PCI domain is defined to be a set of PCI buses which share |
645 | * configuration space. |
1369 | * configuration space. |
- | 1370 | */ |
|
646 | */ |
1371 | #ifdef CONFIG_PCI_DOMAINS |
647 | #ifdef CONFIG_PCI_DOMAINS |
1372 | extern int pci_domains_supported; |
- | 1373 | int pci_get_new_domain_nr(void); |
|
- | 1374 | #else |
|
- | 1375 | enum { pci_domains_supported = 0 }; |
|
- | 1376 | static inline int pci_domain_nr(struct pci_bus *bus) { return 0; } |
|
- | 1377 | static inline int pci_proc_domain(struct pci_bus *bus) { return 0; } |
|
- | 1378 | static inline int pci_get_new_domain_nr(void) { return -ENOSYS; } |
|
- | 1379 | #endif /* CONFIG_PCI_DOMAINS */ |
|
- | 1380 | ||
- | 1381 | /* |
|
- | 1382 | * Generic implementation for PCI domain support. If your |
|
- | 1383 | * architecture does not need custom management of PCI |
|
648 | extern int pci_domains_supported; |
1384 | * domains then this implementation will be used |
649 | #else |
1385 | */ |
650 | enum { pci_domains_supported = 0 }; |
1386 | #ifdef CONFIG_PCI_DOMAINS_GENERIC |
- | 1387 | static inline int pci_domain_nr(struct pci_bus *bus) |
|
- | 1388 | { |
|
- | 1389 | return bus->domain_nr; |
|
- | 1390 | } |
|
- | 1391 | void pci_bus_assign_domain_nr(struct pci_bus *bus, struct device *parent); |
|
- | 1392 | #else |
|
651 | static inline int pci_domain_nr(struct pci_bus *bus) |
1393 | static inline void pci_bus_assign_domain_nr(struct pci_bus *bus, |
- | 1394 | struct device *parent) |
|
- | 1395 | { |
|
- | 1396 | } |
|
- | 1397 | #endif |
|
- | 1398 | ||
- | 1399 | /* some architectures require additional setup to direct VGA traffic */ |
|
- | 1400 | typedef int (*arch_set_vga_state_t)(struct pci_dev *pdev, bool decode, |
|
- | 1401 | unsigned int command_bits, u32 flags); |
|
- | 1402 | void pci_register_set_vga_state(arch_set_vga_state_t func); |
|
- | 1403 | ||
- | 1404 | #else /* CONFIG_PCI is not enabled */ |
|
- | 1405 | ||
- | 1406 | /* |
|
Line -... | Line 1407... | ||
- | 1407 | * If the system does not have PCI, clearly these return errors. Define |
|
- | 1408 | * these as simple inline functions to avoid hair in drivers. |
|
- | 1409 | */ |
|
- | 1410 | ||
- | 1411 | #define _PCI_NOP(o, s, t) \ |
|
- | 1412 | static inline int pci_##o##_config_##s(struct pci_dev *dev, \ |
|
- | 1413 | int where, t val) \ |
|
- | 1414 | { return PCIBIOS_FUNC_NOT_SUPPORTED; } |
|
- | 1415 | ||
- | 1416 | #define _PCI_NOP_ALL(o, x) _PCI_NOP(o, byte, u8 x) \ |
|
- | 1417 | _PCI_NOP(o, word, u16 x) \ |
|
- | 1418 | _PCI_NOP(o, dword, u32 x) |
|
- | 1419 | _PCI_NOP_ALL(read, *) |
|
- | 1420 | _PCI_NOP_ALL(write,) |
|
- | 1421 | ||
- | 1422 | static inline struct pci_dev *pci_get_device(unsigned int vendor, |
|
- | 1423 | unsigned int device, |
|
- | 1424 | struct pci_dev *from) |
|
- | 1425 | { return NULL; } |
|
- | 1426 | ||
- | 1427 | static inline struct pci_dev *pci_get_subsys(unsigned int vendor, |
|
- | 1428 | unsigned int device, |
|
- | 1429 | unsigned int ss_vendor, |
|
- | 1430 | unsigned int ss_device, |
|
- | 1431 | struct pci_dev *from) |
|
- | 1432 | { return NULL; } |
|
- | 1433 | ||
- | 1434 | static inline struct pci_dev *pci_get_class(unsigned int class, |
|
- | 1435 | struct pci_dev *from) |
|
- | 1436 | { return NULL; } |
|
- | 1437 | ||
- | 1438 | #define pci_dev_present(ids) (0) |
|
- | 1439 | #define no_pci_devices() (1) |
|
- | 1440 | #define pci_dev_put(dev) do { } while (0) |
|
- | 1441 | ||
- | 1442 | static inline void pci_set_master(struct pci_dev *dev) { } |
|
- | 1443 | static inline int pci_enable_device(struct pci_dev *dev) { return -EIO; } |
|
- | 1444 | static inline void pci_disable_device(struct pci_dev *dev) { } |
|
- | 1445 | static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask) |
|
- | 1446 | { return -EIO; } |
|
- | 1447 | static inline int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask) |
|
- | 1448 | { return -EIO; } |
|
- | 1449 | static inline int pci_set_dma_max_seg_size(struct pci_dev *dev, |
|
- | 1450 | unsigned int size) |
|
- | 1451 | { return -EIO; } |
|
- | 1452 | static inline int pci_set_dma_seg_boundary(struct pci_dev *dev, |
|
- | 1453 | unsigned long mask) |
|
- | 1454 | { return -EIO; } |
|
- | 1455 | static inline int pci_assign_resource(struct pci_dev *dev, int i) |
|
- | 1456 | { return -EBUSY; } |
|
- | 1457 | static inline int __pci_register_driver(struct pci_driver *drv, |
|
- | 1458 | struct module *owner) |
|
- | 1459 | { return 0; } |
|
- | 1460 | static inline int pci_register_driver(struct pci_driver *drv) |
|
- | 1461 | { return 0; } |
|
- | 1462 | static inline void pci_unregister_driver(struct pci_driver *drv) { } |
|
- | 1463 | static inline int pci_find_capability(struct pci_dev *dev, int cap) |
|
- | 1464 | { return 0; } |
|
- | 1465 | static inline int pci_find_next_capability(struct pci_dev *dev, u8 post, |
|
- | 1466 | int cap) |
|
- | 1467 | { return 0; } |
|
- | 1468 | static inline int pci_find_ext_capability(struct pci_dev *dev, int cap) |
|
- | 1469 | { return 0; } |
|
- | 1470 | ||
- | 1471 | /* Power management related routines */ |
|
- | 1472 | static inline int pci_save_state(struct pci_dev *dev) { return 0; } |
|
- | 1473 | static inline void pci_restore_state(struct pci_dev *dev) { } |
|
- | 1474 | static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state) |
|
- | 1475 | { return 0; } |
|
- | 1476 | static inline int pci_wake_from_d3(struct pci_dev *dev, bool enable) |
|
- | 1477 | { return 0; } |
|
- | 1478 | static inline pci_power_t pci_choose_state(struct pci_dev *dev, |
|
- | 1479 | pm_message_t state) |
|
- | 1480 | { return PCI_D0; } |
|
- | 1481 | static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, |
|
- | 1482 | int enable) |
|
- | 1483 | { return 0; } |
|
- | 1484 | ||
- | 1485 | static inline int pci_request_regions(struct pci_dev *dev, const char *res_name) |
|
- | 1486 | { return -EIO; } |
|
- | 1487 | static inline void pci_release_regions(struct pci_dev *dev) { } |
|
- | 1488 | ||
- | 1489 | static inline void pci_block_cfg_access(struct pci_dev *dev) { } |
|
- | 1490 | static inline int pci_block_cfg_access_in_atomic(struct pci_dev *dev) |
|
- | 1491 | { return 0; } |
|
652 | { |
1492 | static inline void pci_unblock_cfg_access(struct pci_dev *dev) { } |
- | 1493 | ||
- | 1494 | static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from) |
|
- | 1495 | { return NULL; } |
|
- | 1496 | static inline struct pci_dev *pci_get_slot(struct pci_bus *bus, |
|
- | 1497 | unsigned int devfn) |
|
- | 1498 | { return NULL; } |
|
- | 1499 | static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus, |
|
- | 1500 | unsigned int devfn) |
|
- | 1501 | { return NULL; } |
|
- | 1502 | ||
- | 1503 | static inline int pci_domain_nr(struct pci_bus *bus) { return 0; } |
|
- | 1504 | static inline struct pci_dev *pci_dev_get(struct pci_dev *dev) { return NULL; } |
|
- | 1505 | static inline int pci_get_new_domain_nr(void) { return -ENOSYS; } |
|
- | 1506 | ||
- | 1507 | #define dev_is_pci(d) (false) |
|
- | 1508 | #define dev_is_pf(d) (false) |
|
- | 1509 | #define dev_num_vf(d) (0) |
|
- | 1510 | #endif /* CONFIG_PCI */ |
|
- | 1511 | ||
- | 1512 | /* Include architecture-dependent settings and functions */ |
|
- | 1513 | ||
- | 1514 | #include |
|
- | 1515 | ||
- | 1516 | /* these helpers provide future and backwards compatibility |
|
- | 1517 | * for accessing popular PCI BAR info */ |
|
- | 1518 | #define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start) |
|
- | 1519 | #define pci_resource_end(dev, bar) ((dev)->resource[(bar)].end) |
|
- | 1520 | #define pci_resource_flags(dev, bar) ((dev)->resource[(bar)].flags) |
|
- | 1521 | #define pci_resource_len(dev,bar) \ |
|
- | 1522 | ((pci_resource_start((dev), (bar)) == 0 && \ |
|
- | 1523 | pci_resource_end((dev), (bar)) == \ |
|
- | 1524 | pci_resource_start((dev), (bar))) ? 0 : \ |
|
- | 1525 | \ |
|
- | 1526 | (pci_resource_end((dev), (bar)) - \ |
|
- | 1527 | pci_resource_start((dev), (bar)) + 1)) |
|
- | 1528 | ||
- | 1529 | /* Similar to the helpers above, these manipulate per-pci_dev |
|
653 | return 0; |
1530 | * driver-specific data. They are really just a wrapper around |
654 | } |
1531 | * the generic device structure functions of these calls. |
655 | 1532 | */ |
|
- | 1533 | static inline void *pci_get_drvdata(struct pci_dev *pdev) |
|
- | 1534 | { |
|
- | 1535 | return dev_get_drvdata(&pdev->dev); |
|
- | 1536 | } |
|
- | 1537 | ||
- | 1538 | static inline void pci_set_drvdata(struct pci_dev *pdev, void *data) |
|
- | 1539 | { |
|
- | 1540 | dev_set_drvdata(&pdev->dev, data); |
|
- | 1541 | } |
|
- | 1542 | ||
- | 1543 | /* If you want to know what to call your pci_dev, ask this function. |
|
- | 1544 | * Again, it's a wrapper around the generic device. |
|
- | 1545 | */ |
|
- | 1546 | static inline const char *pci_name(const struct pci_dev *pdev) |
|
- | 1547 | { |
|
- | 1548 | return dev_name(&pdev->dev); |
|
- | 1549 | } |
|
- | 1550 | ||
- | 1551 | ||
- | 1552 | /* Some archs don't want to expose struct resource to userland as-is |
|
- | 1553 | * in sysfs and /proc |
|
- | 1554 | */ |
|
- | 1555 | #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER |
|
- | 1556 | static inline void pci_resource_to_user(const struct pci_dev *dev, int bar, |
|
- | 1557 | const struct resource *rsrc, resource_size_t *start, |
|
- | 1558 | resource_size_t *end) |
|
- | 1559 | { |
|
- | 1560 | *start = rsrc->start; |
|
- | 1561 | *end = rsrc->end; |
|
- | 1562 | } |
|
- | 1563 | #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */ |
|
- | 1564 | ||
- | 1565 | ||
- | 1566 | /* |
|
- | 1567 | * The world is not perfect and supplies us with broken PCI devices. |
|
- | 1568 | * For at least a part of these bugs we need a work-around, so both |
|
- | 1569 | * generic (drivers/pci/quirks.c) and per-architecture code can define |
|
- | 1570 | * fixup hooks to be called for particular buggy devices. |
|
- | 1571 | */ |
|
- | 1572 | ||
- | 1573 | struct pci_fixup { |
|
- | 1574 | u16 vendor; /* You can use PCI_ANY_ID here of course */ |
|
- | 1575 | u16 device; /* You can use PCI_ANY_ID here of course */ |
|
- | 1576 | u32 class; /* You can use PCI_ANY_ID here too */ |
|
- | 1577 | unsigned int class_shift; /* should be 0, 8, 16 */ |
|
- | 1578 | void (*hook)(struct pci_dev *dev); |
|
- | 1579 | }; |
|
- | 1580 | ||
- | 1581 | enum pci_fixup_pass { |
|
- | 1582 | pci_fixup_early, /* Before probing BARs */ |
|
- | 1583 | pci_fixup_header, /* After reading configuration header */ |
|
- | 1584 | pci_fixup_final, /* Final phase of device fixups */ |
|
- | 1585 | pci_fixup_enable, /* pci_enable_device() time */ |
|
- | 1586 | pci_fixup_resume, /* pci_device_resume() */ |
|
- | 1587 | pci_fixup_suspend, /* pci_device_suspend() */ |
|
- | 1588 | pci_fixup_resume_early, /* pci_device_resume_early() */ |
|
- | 1589 | pci_fixup_suspend_late, /* pci_device_suspend_late() */ |
|
- | 1590 | }; |
|
- | 1591 | ||
- | 1592 | /* Anonymous variables would be nice... */ |
|
- | 1593 | #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, class, \ |
|
- | 1594 | class_shift, hook) \ |
|
- | 1595 | static const struct pci_fixup __PASTE(__pci_fixup_##name,__LINE__) __used \ |
|
- | 1596 | __attribute__((__section__(#section), aligned((sizeof(void *))))) \ |
|
- | 1597 | = { vendor, device, class, class_shift, hook }; |
|
- | 1598 | ||
- | 1599 | #define DECLARE_PCI_FIXUP_CLASS_EARLY(vendor, device, class, \ |
|
- | 1600 | class_shift, hook) \ |
|
- | 1601 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \ |
|
- | 1602 | hook, vendor, device, class, class_shift, hook) |
|
- | 1603 | #define DECLARE_PCI_FIXUP_CLASS_HEADER(vendor, device, class, \ |
|
- | 1604 | class_shift, hook) \ |
|
- | 1605 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \ |
|
- | 1606 | hook, vendor, device, class, class_shift, hook) |
|
- | 1607 | #define DECLARE_PCI_FIXUP_CLASS_FINAL(vendor, device, class, \ |
|
- | 1608 | class_shift, hook) \ |
|
- | 1609 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \ |
|
- | 1610 | hook, vendor, device, class, class_shift, hook) |
|
- | 1611 | #define DECLARE_PCI_FIXUP_CLASS_ENABLE(vendor, device, class, \ |
|
- | 1612 | class_shift, hook) \ |
|
- | 1613 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \ |
|
- | 1614 | hook, vendor, device, class, class_shift, hook) |
|
- | 1615 | #define DECLARE_PCI_FIXUP_CLASS_RESUME(vendor, device, class, \ |
|
- | 1616 | class_shift, hook) \ |
|
- | 1617 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \ |
|
- | 1618 | resume##hook, vendor, device, class, \ |
|
- | 1619 | class_shift, hook) |
|
- | 1620 | #define DECLARE_PCI_FIXUP_CLASS_RESUME_EARLY(vendor, device, class, \ |
|
- | 1621 | class_shift, hook) \ |
|
- | 1622 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \ |
|
- | 1623 | resume_early##hook, vendor, device, \ |
|
- | 1624 | class, class_shift, hook) |
|
- | 1625 | #define DECLARE_PCI_FIXUP_CLASS_SUSPEND(vendor, device, class, \ |
|
- | 1626 | class_shift, hook) \ |
|
- | 1627 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \ |
|
- | 1628 | suspend##hook, vendor, device, class, \ |
|
- | 1629 | class_shift, hook) |
|
- | 1630 | #define DECLARE_PCI_FIXUP_CLASS_SUSPEND_LATE(vendor, device, class, \ |
|
- | 1631 | class_shift, hook) \ |
|
- | 1632 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend_late, \ |
|
- | 1633 | suspend_late##hook, vendor, device, \ |
|
- | 1634 | class, class_shift, hook) |
|
- | 1635 | ||
- | 1636 | #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \ |
|
- | 1637 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \ |
|
- | 1638 | hook, vendor, device, PCI_ANY_ID, 0, hook) |
|
- | 1639 | #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \ |
|
- | 1640 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \ |
|
- | 1641 | hook, vendor, device, PCI_ANY_ID, 0, hook) |
|
- | 1642 | #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \ |
|
- | 1643 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \ |
|
- | 1644 | hook, vendor, device, PCI_ANY_ID, 0, hook) |
|
- | 1645 | #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \ |
|
- | 1646 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \ |
|
- | 1647 | hook, vendor, device, PCI_ANY_ID, 0, hook) |
|
- | 1648 | #define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \ |
|
- | 1649 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \ |
|
- | 1650 | resume##hook, vendor, device, \ |
|
- | 1651 | PCI_ANY_ID, 0, hook) |
|
- | 1652 | #define DECLARE_PCI_FIXUP_RESUME_EARLY(vendor, device, hook) \ |
|
- | 1653 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \ |
|
- | 1654 | resume_early##hook, vendor, device, \ |
|
- | 1655 | PCI_ANY_ID, 0, hook) |
|
- | 1656 | #define DECLARE_PCI_FIXUP_SUSPEND(vendor, device, hook) \ |
|
- | 1657 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \ |
|
- | 1658 | suspend##hook, vendor, device, \ |
|
- | 1659 | PCI_ANY_ID, 0, hook) |
|
- | 1660 | #define DECLARE_PCI_FIXUP_SUSPEND_LATE(vendor, device, hook) \ |
|
- | 1661 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend_late, \ |
|
- | 1662 | suspend_late##hook, vendor, device, \ |
|
- | 1663 | PCI_ANY_ID, 0, hook) |
|
- | 1664 | ||
- | 1665 | #ifdef CONFIG_PCI_QUIRKS |
|
- | 1666 | void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev); |
|
- | 1667 | int pci_dev_specific_acs_enabled(struct pci_dev *dev, u16 acs_flags); |
|
- | 1668 | void pci_dev_specific_enable_acs(struct pci_dev *dev); |
|
- | 1669 | #else |
|
- | 1670 | static inline void pci_fixup_device(enum pci_fixup_pass pass, |
|
- | 1671 | struct pci_dev *dev) { } |
|
- | 1672 | static inline int pci_dev_specific_acs_enabled(struct pci_dev *dev, |
|
- | 1673 | u16 acs_flags) |
|
- | 1674 | { |
|
- | 1675 | return -ENOTTY; |
|
- | 1676 | } |
|
- | 1677 | static inline void pci_dev_specific_enable_acs(struct pci_dev *dev) { } |
|
- | 1678 | #endif |
|
- | 1679 | ||
- | 1680 | void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen); |
|
- | 1681 | void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr); |
|
- | 1682 | void __iomem * const *pcim_iomap_table(struct pci_dev *pdev); |
|
- | 1683 | int pcim_iomap_regions(struct pci_dev *pdev, int mask, const char *name); |
|
- | 1684 | int pcim_iomap_regions_request_all(struct pci_dev *pdev, int mask, |
|
- | 1685 | const char *name); |
|
- | 1686 | void pcim_iounmap_regions(struct pci_dev *pdev, int mask); |
|
- | 1687 | ||
- | 1688 | extern int pci_pci_problems; |
|
- | 1689 | #define PCIPCI_FAIL 1 /* No PCI PCI DMA */ |
|
- | 1690 | #define PCIPCI_TRITON 2 |
|
- | 1691 | #define PCIPCI_NATOMA 4 |
|
- | 1692 | #define PCIPCI_VIAETBF 8 |
|
- | 1693 | #define PCIPCI_VSFX 16 |
|
- | 1694 | #define PCIPCI_ALIMAGIK 32 /* Need low latency setting */ |
|
- | 1695 | #define PCIAGP_FAIL 64 /* No PCI to AGP DMA */ |
|
- | 1696 | ||
- | 1697 | extern unsigned long pci_cardbus_io_size; |
|
- | 1698 | extern unsigned long pci_cardbus_mem_size; |
|
- | 1699 | extern u8 pci_dfl_cache_line_size; |
|
- | 1700 | extern u8 pci_cache_line_size; |
|
- | 1701 | ||
- | 1702 | extern unsigned long pci_hotplug_io_size; |
|
- | 1703 | extern unsigned long pci_hotplug_mem_size; |
|
- | 1704 | ||
- | 1705 | /* Architecture-specific versions may override these (weak) */ |
|
- | 1706 | void pcibios_disable_device(struct pci_dev *dev); |
|
- | 1707 | void pcibios_set_master(struct pci_dev *dev); |
|
- | 1708 | int pcibios_set_pcie_reset_state(struct pci_dev *dev, |
|
- | 1709 | enum pcie_reset_state state); |
|
- | 1710 | int pcibios_add_device(struct pci_dev *dev); |
|
- | 1711 | void pcibios_release_device(struct pci_dev *dev); |
|
- | 1712 | void pcibios_penalize_isa_irq(int irq, int active); |
|
- | 1713 | int pcibios_alloc_irq(struct pci_dev *dev); |
|
- | 1714 | void pcibios_free_irq(struct pci_dev *dev); |
|
- | 1715 | ||
656 | static inline int pci_proc_domain(struct pci_bus *bus) |
1716 | #ifdef CONFIG_HIBERNATE_CALLBACKS |
- | 1717 | extern struct dev_pm_ops pcibios_pm_ops; |
|
- | 1718 | #endif |
|
- | 1719 | ||
- | 1720 | #ifdef CONFIG_PCI_MMCONFIG |
|
- | 1721 | void __init pci_mmcfg_early_init(void); |
|
- | 1722 | void __init pci_mmcfg_late_init(void); |
|
- | 1723 | #else |
|
- | 1724 | static inline void pci_mmcfg_early_init(void) { } |
|
- | 1725 | static inline void pci_mmcfg_late_init(void) { } |
|
- | 1726 | #endif |
|
- | 1727 | ||
- | 1728 | int pci_ext_cfg_avail(void); |
|
- | 1729 | ||
- | 1730 | void __iomem *pci_ioremap_bar(struct pci_dev *pdev, int bar); |
|
- | 1731 | void __iomem *pci_ioremap_wc_bar(struct pci_dev *pdev, int bar); |
|
- | 1732 | ||
- | 1733 | #ifdef CONFIG_PCI_IOV |
|
- | 1734 | int pci_iov_virtfn_bus(struct pci_dev *dev, int id); |
|
- | 1735 | int pci_iov_virtfn_devfn(struct pci_dev *dev, int id); |
|
- | 1736 | ||
- | 1737 | int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn); |
|
- | 1738 | void pci_disable_sriov(struct pci_dev *dev); |
|
- | 1739 | int pci_num_vf(struct pci_dev *dev); |
|
- | 1740 | int pci_vfs_assigned(struct pci_dev *dev); |
|
- | 1741 | int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs); |
|
- | 1742 | int pci_sriov_get_totalvfs(struct pci_dev *dev); |
|
- | 1743 | resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno); |
|
- | 1744 | #else |
|
- | 1745 | static inline int pci_iov_virtfn_bus(struct pci_dev *dev, int id) |
|
- | 1746 | { |
|
- | 1747 | return -ENOSYS; |
|
- | 1748 | } |
|
- | 1749 | static inline int pci_iov_virtfn_devfn(struct pci_dev *dev, int id) |
|
- | 1750 | { |
|
- | 1751 | return -ENOSYS; |
|
- | 1752 | } |
|
- | 1753 | static inline int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn) |
|
- | 1754 | { return -ENODEV; } |
|
- | 1755 | static inline void pci_disable_sriov(struct pci_dev *dev) { } |
|
- | 1756 | static inline int pci_num_vf(struct pci_dev *dev) { return 0; } |
|
- | 1757 | static inline int pci_vfs_assigned(struct pci_dev *dev) |
|
- | 1758 | { return 0; } |
|
- | 1759 | static inline int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs) |
|
- | 1760 | { return 0; } |
|
- | 1761 | static inline int pci_sriov_get_totalvfs(struct pci_dev *dev) |
|
- | 1762 | { return 0; } |
|
- | 1763 | static inline resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno) |
|
- | 1764 | { return 0; } |
|
- | 1765 | #endif |
|
- | 1766 | ||
Line 657... | Line 1767... | ||
657 | { |
1767 | #if defined(CONFIG_HOTPLUG_PCI) || defined(CONFIG_HOTPLUG_PCI_MODULE) |
658 | return 0; |
1768 | void pci_hp_create_module_link(struct pci_slot *pci_slot); |
659 | } |
1769 | void pci_hp_remove_module_link(struct pci_slot *pci_slot); |
660 | #endif /* CONFIG_PCI_DOMAINS */ |
1770 | #endif |
Line 681... | Line 1791... | ||
681 | * |
1791 | * |
682 | * Returns: true if the PCI device is PCI Express capable, false otherwise. |
1792 | * Returns: true if the PCI device is PCI Express capable, false otherwise. |
683 | */ |
1793 | */ |
684 | static inline bool pci_is_pcie(struct pci_dev *dev) |
1794 | static inline bool pci_is_pcie(struct pci_dev *dev) |
685 | { |
1795 | { |
686 | return !!pci_pcie_cap(dev); |
1796 | return pci_pcie_cap(dev); |
- | 1797 | } |
|
- | 1798 | ||
- | 1799 | /** |
|
- | 1800 | * pcie_caps_reg - get the PCIe Capabilities Register |
|
- | 1801 | * @dev: PCI device |
|
- | 1802 | */ |
|
- | 1803 | static inline u16 pcie_caps_reg(const struct pci_dev *dev) |
|
- | 1804 | { |
|
- | 1805 | return dev->pcie_flags_reg; |
|
687 | } |
1806 | } |
Line 688... | Line 1807... | ||
688 | 1807 | ||
689 | /** |
1808 | /** |
690 | * pci_pcie_type - get the PCIe device/port type |
1809 | * pci_pcie_type - get the PCIe device/port type |
691 | * @dev: PCI device |
1810 | * @dev: PCI device |
692 | */ |
1811 | */ |
693 | static inline int pci_pcie_type(const struct pci_dev *dev) |
1812 | static inline int pci_pcie_type(const struct pci_dev *dev) |
694 | { |
1813 | { |
695 | return (dev->pcie_flags_reg & PCI_EXP_FLAGS_TYPE) >> 4; |
1814 | return (pcie_caps_reg(dev) & PCI_EXP_FLAGS_TYPE) >> 4; |
Line -... | Line 1815... | ||
- | 1815 | } |
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- | 1816 | ||
- | 1817 | void pci_request_acs(void); |
|
- | 1818 | bool pci_acs_enabled(struct pci_dev *pdev, u16 acs_flags); |
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- | 1819 | bool pci_acs_path_enabled(struct pci_dev *start, |
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- | 1820 | struct pci_dev *end, u16 acs_flags); |
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- | 1821 | ||
- | 1822 | #define PCI_VPD_LRDT 0x80 /* Large Resource Data Type */ |
|
- | 1823 | #define PCI_VPD_LRDT_ID(x) ((x) | PCI_VPD_LRDT) |
|
- | 1824 | ||
- | 1825 | /* Large Resource Data Type Tag Item Names */ |
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- | 1826 | #define PCI_VPD_LTIN_ID_STRING 0x02 /* Identifier String */ |
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- | 1827 | #define PCI_VPD_LTIN_RO_DATA 0x10 /* Read-Only Data */ |
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- | 1828 | #define PCI_VPD_LTIN_RW_DATA 0x11 /* Read-Write Data */ |
|
- | 1829 | ||
- | 1830 | #define PCI_VPD_LRDT_ID_STRING PCI_VPD_LRDT_ID(PCI_VPD_LTIN_ID_STRING) |
|
- | 1831 | #define PCI_VPD_LRDT_RO_DATA PCI_VPD_LRDT_ID(PCI_VPD_LTIN_RO_DATA) |
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- | 1832 | #define PCI_VPD_LRDT_RW_DATA PCI_VPD_LRDT_ID(PCI_VPD_LTIN_RW_DATA) |
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- | 1833 | ||
- | 1834 | /* Small Resource Data Type Tag Item Names */ |
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- | 1835 | #define PCI_VPD_STIN_END 0x78 /* End */ |
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Line -... | Line 1836... | ||
- | 1836 | ||
- | 1837 | #define PCI_VPD_SRDT_END PCI_VPD_STIN_END |
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- | 1838 | ||
- | 1839 | #define PCI_VPD_SRDT_TIN_MASK 0x78 |
|
- | 1840 | #define PCI_VPD_SRDT_LEN_MASK 0x07 |
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- | 1841 | ||
- | 1842 | #define PCI_VPD_LRDT_TAG_SIZE 3 |
|
- | 1843 | #define PCI_VPD_SRDT_TAG_SIZE 1 |
|
- | 1844 | ||
- | 1845 | #define PCI_VPD_INFO_FLD_HDR_SIZE 3 |
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- | 1846 | ||
- | 1847 | #define PCI_VPD_RO_KEYWORD_PARTNO "PN" |
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- | 1848 | #define PCI_VPD_RO_KEYWORD_MFR_ID "MN" |
|
- | 1849 | #define PCI_VPD_RO_KEYWORD_VENDOR0 "V0" |
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- | 1850 | #define PCI_VPD_RO_KEYWORD_CHKSUM "RV" |
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- | 1851 | ||
- | 1852 | /** |
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- | 1853 | * pci_vpd_lrdt_size - Extracts the Large Resource Data Type length |
|
- | 1854 | * @lrdt: Pointer to the beginning of the Large Resource Data Type tag |
|
696 | } |
1855 | * |
697 | 1856 | * Returns the extracted Large Resource Data Type length. |
|
698 | 1857 | */ |
|
699 | static inline int pci_iov_init(struct pci_dev *dev) |
1858 | static inline u16 pci_vpd_lrdt_size(const u8 *lrdt) |
700 | { |
- | |
Line -... | Line 1859... | ||
- | 1859 | { |
|
- | 1860 | return (u16)lrdt[1] + ((u16)lrdt[2] << 8); |
|
- | 1861 | } |
|
- | 1862 | ||
- | 1863 | /** |
|
- | 1864 | * pci_vpd_srdt_size - Extracts the Small Resource Data Type length |
|
- | 1865 | * @lrdt: Pointer to the beginning of the Small Resource Data Type tag |
|
701 | return -ENODEV; |
1866 | * |
- | 1867 | * Returns the extracted Small Resource Data Type length. |
|
- | 1868 | */ |
|
Line -... | Line 1869... | ||
- | 1869 | static inline u8 pci_vpd_srdt_size(const u8 *srdt) |
|
702 | } |
1870 | { |
- | 1871 | return (*srdt) & PCI_VPD_SRDT_LEN_MASK; |
|
- | 1872 | } |
|
703 | static inline void pci_iov_release(struct pci_dev *dev) |
1873 | |
- | 1874 | /** |
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- | 1875 | * pci_vpd_info_field_size - Extracts the information field length |
|
704 | 1876 | * @lrdt: Pointer to the beginning of an information field header |
|
705 | {} |
1877 | * |
706 | 1878 | * Returns the extracted information field length. |
|
- | 1879 | */ |
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- | 1880 | static inline u8 pci_vpd_info_field_size(const u8 *info_field) |
|
- | 1881 | { |
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- | 1882 | return info_field[2]; |
|
- | 1883 | } |
|
- | 1884 | ||
- | 1885 | /** |
|
- | 1886 | * pci_vpd_find_tag - Locates the Resource Data Type tag provided |
|
- | 1887 | * @buf: Pointer to buffered vpd data |
|
- | 1888 | * @off: The offset into the buffer at which to begin the search |
|
- | 1889 | * @len: The length of the vpd buffer |
|
- | 1890 | * @rdt: The Resource Data Type to search for |
|
- | 1891 | * |
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- | 1892 | * Returns the index where the Resource Data Type was found or |
|
- | 1893 | * -ENOENT otherwise. |
|
- | 1894 | */ |
|
- | 1895 | int pci_vpd_find_tag(const u8 *buf, unsigned int off, unsigned int len, u8 rdt); |
|
- | 1896 | ||
- | 1897 | /** |
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- | 1898 | * pci_vpd_find_info_keyword - Locates an information field keyword in the VPD |
|
- | 1899 | * @buf: Pointer to buffered vpd data |
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- | 1900 | * @off: The offset into the buffer at which to begin the search |
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- | 1901 | * @len: The length of the buffer area, relative to off, in which to search |
|
- | 1902 | * @kw: The keyword to search for |
|
- | 1903 | * |
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- | 1904 | * Returns the index where the information field keyword was found or |
|
- | 1905 | * -ENOENT otherwise. |
|
- | 1906 | */ |
|
- | 1907 | int pci_vpd_find_info_keyword(const u8 *buf, unsigned int off, |
|
- | 1908 | unsigned int len, const char *kw); |
|
- | 1909 | ||
707 | static inline int pci_iov_resource_bar(struct pci_dev *dev, int resno, |
1910 | /* PCI <-> OF binding helpers */ |
- | 1911 | #ifdef CONFIG_OF |
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- | 1912 | struct device_node; |
|
- | 1913 | struct irq_domain; |
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- | 1914 | void pci_set_of_node(struct pci_dev *dev); |
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- | 1915 | void pci_release_of_node(struct pci_dev *dev); |
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- | 1916 | void pci_set_bus_of_node(struct pci_bus *bus); |
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- | 1917 | void pci_release_bus_of_node(struct pci_bus *bus); |
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- | 1918 | struct irq_domain *pci_host_bridge_of_msi_domain(struct pci_bus *bus); |
|
- | 1919 | ||
708 | enum pci_bar_type *type) |
1920 | /* Arch may override this (weak) */ |
- | 1921 | struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus); |
|
709 | { |
1922 | |
- | 1923 | static inline struct device_node * |
|
710 | return 0; |
1924 | pci_device_to_OF_node(const struct pci_dev *pdev) |
711 | } |
1925 | { |
712 | static inline void pci_restore_iov_state(struct pci_dev *dev) |
1926 | return pdev ? pdev->dev.of_node : NULL; |
713 | { |
1927 | } |
Line -... | Line 1928... | ||
- | 1928 | ||
714 | } |
1929 | static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus) |
- | 1930 | { |
|
- | 1931 | return bus ? bus->dev.of_node : NULL; |
|
- | 1932 | } |
|
- | 1933 | ||
- | 1934 | #else /* CONFIG_OF */ |
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- | 1935 | static inline void pci_set_of_node(struct pci_dev *dev) { } |
|
- | 1936 | static inline void pci_release_of_node(struct pci_dev *dev) { } |
|
- | 1937 | static inline void pci_set_bus_of_node(struct pci_bus *bus) { } |
|
- | 1938 | static inline void pci_release_bus_of_node(struct pci_bus *bus) { } |
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- | 1939 | static inline struct device_node * |
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- | 1940 | pci_device_to_OF_node(const struct pci_dev *pdev) { return NULL; } |
|
715 | static inline int pci_iov_bus_range(struct pci_bus *bus) |
1941 | static inline struct irq_domain * |
716 | { |
1942 | pci_host_bridge_of_msi_domain(struct pci_bus *bus) { return NULL; } |
717 | return 0; |
1943 | #endif /* CONFIG_OF */ |
- | 1944 | ||
- | 1945 | #ifdef CONFIG_EEH |
|
- | 1946 | static inline struct eeh_dev *pci_dev_to_eeh_dev(struct pci_dev *pdev) |
|
- | 1947 | { |
|
- | 1948 | return pdev->dev.archdata.edev; |
|
- | 1949 | } |
|
- | 1950 | #endif |
|
718 | } |
1951 | |
719 | 1952 | int pci_for_each_dma_alias(struct pci_dev *pdev, |
|
- | 1953 | int (*fn)(struct pci_dev *pdev, |
|
720 | static inline int pci_enable_ats(struct pci_dev *dev, int ps) |
1954 | u16 alias, void *data), void *data); |
721 | { |
1955 | |
722 | return -ENODEV; |
1956 | /* helper functions for operation of device flag */ |
723 | } |
1957 | static inline void pci_set_dev_assigned(struct pci_dev *pdev) |
724 | static inline void pci_disable_ats(struct pci_dev *dev) |
1958 | { |
725 | { |
1959 | pdev->dev_flags |= PCI_DEV_FLAGS_ASSIGNED; |
726 | } |
1960 | } |
727 | static inline int pci_ats_queue_depth(struct pci_dev *dev) |
1961 | static inline void pci_clear_dev_assigned(struct pci_dev *pdev) |
728 | { |
1962 | { |
Line -... | Line 1963... | ||
- | 1963 | pdev->dev_flags &= ~PCI_DEV_FLAGS_ASSIGNED; |
|
729 | return -ENODEV; |
1964 | } |
730 | } |
- | |
731 | static inline int pci_ats_enabled(struct pci_dev *dev) |
1965 | static inline bool pci_is_dev_assigned(struct pci_dev *pdev) |
- | 1966 | { |
|
732 | { |
1967 | return (pdev->dev_flags & PCI_DEV_FLAGS_ASSIGNED) == PCI_DEV_FLAGS_ASSIGNED; |
733 | return 0; |
1968 | } |
734 | } |
1969 | |
- | 1970 | /** |
|
735 | 1971 | * pci_ari_enabled - query ARI forwarding status |
|
736 | int pci_setup_device(struct pci_dev *dev); |
1972 | * @bus: the PCI bus |
Line 737... | Line 1973... | ||
737 | int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type, |
1973 | * |
738 | struct resource *res, unsigned int reg); |
1974 | * Returns true if ARI forwarding is enabled. |
739 | int pci_resource_bar(struct pci_dev *dev, int resno, |
1975 | */ |
740 | enum pci_bar_type *type); |
1976 | static inline bool pci_ari_enabled(struct pci_bus *bus) |
Line 751... | Line 1987... | ||
751 | int enum_pci_devices(void); |
1987 | int enum_pci_devices(void); |
Line 752... | Line 1988... | ||
752 | 1988 | ||
753 | const struct pci_device_id* |
1989 | const struct pci_device_id* |
Line 754... | Line -... | ||
754 | find_pci_device(pci_dev_t* pdev, const struct pci_device_id *idlist); |
- | |
755 | - | ||
756 | #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1)) |
- | |
757 | - | ||
758 | #define pci_set_dma_mask(a, b) 0 |
- | |
759 | #define pci_set_consistent_dma_mask(a, b) |
- | |
760 | - | ||
761 | struct pci_dev *pci_get_bus_and_slot(unsigned int bus, unsigned int devfn); |
- | |
762 | struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from); |
- | |
763 | - | ||
764 | void __iomem *pci_map_rom(struct pci_dev *pdev, size_t *size); |
- | |
765 | - | ||
766 | #define pci_name(x) "radeon" |
- | |
767 | - | ||
768 | static inline dma_addr_t pci_bus_address(struct pci_dev *pdev, int bar) |
- | |
769 | { |
- | |
770 | return pdev->resource[bar].start; |
- | |
771 | } |
1990 | find_pci_device(pci_dev_t* pdev, const struct pci_device_id *idlist); |
772 | - | ||
773 | #endif //__PCI__H__(n))-1)) |
- |