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| Rev 1430 | Rev 1964 | ||
|---|---|---|---|
| Line 545... | Line 545... | ||
| 545 | #define DRM_IOCTL_RADEON_GEM_PWRITE DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_PWRITE, struct drm_radeon_gem_pwrite) |
545 | #define DRM_IOCTL_RADEON_GEM_PWRITE DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_PWRITE, struct drm_radeon_gem_pwrite) |
| 546 | #define DRM_IOCTL_RADEON_GEM_SET_DOMAIN DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_SET_DOMAIN, struct drm_radeon_gem_set_domain) |
546 | #define DRM_IOCTL_RADEON_GEM_SET_DOMAIN DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_SET_DOMAIN, struct drm_radeon_gem_set_domain) |
| 547 | #define DRM_IOCTL_RADEON_GEM_WAIT_IDLE DRM_IOW(DRM_COMMAND_BASE + DRM_RADEON_GEM_WAIT_IDLE, struct drm_radeon_gem_wait_idle) |
547 | #define DRM_IOCTL_RADEON_GEM_WAIT_IDLE DRM_IOW(DRM_COMMAND_BASE + DRM_RADEON_GEM_WAIT_IDLE, struct drm_radeon_gem_wait_idle) |
| 548 | #define DRM_IOCTL_RADEON_CS DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_CS, struct drm_radeon_cs) |
548 | #define DRM_IOCTL_RADEON_CS DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_CS, struct drm_radeon_cs) |
| 549 | #define DRM_IOCTL_RADEON_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_INFO, struct drm_radeon_info) |
549 | #define DRM_IOCTL_RADEON_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_INFO, struct drm_radeon_info) |
| 550 | #define DRM_IOCTL_RADEON_SET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_SET_TILING, struct drm_radeon_gem_set_tiling) |
550 | #define DRM_IOCTL_RADEON_GEM_SET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_SET_TILING, struct drm_radeon_gem_set_tiling) |
| 551 | #define DRM_IOCTL_RADEON_GET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_GET_TILING, struct drm_radeon_gem_get_tiling) |
551 | #define DRM_IOCTL_RADEON_GEM_GET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_GET_TILING, struct drm_radeon_gem_get_tiling) |
| 552 | #define DRM_IOCTL_RADEON_GEM_BUSY DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_BUSY, struct drm_radeon_gem_busy) |
552 | #define DRM_IOCTL_RADEON_GEM_BUSY DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_BUSY, struct drm_radeon_gem_busy) |
| Line 553... | Line 553... | ||
| 553 | 553 | ||
| 554 | typedef struct drm_radeon_init { |
554 | typedef struct drm_radeon_init { |
| 555 | enum { |
555 | enum { |
| Line 639... | Line 639... | ||
| 639 | int nr_prims; |
639 | int nr_prims; |
| 640 | // drm_radeon_prim_t __user *prim; |
640 | // drm_radeon_prim_t __user *prim; |
| 641 | } drm_radeon_vertex2_t; |
641 | } drm_radeon_vertex2_t; |
| Line 642... | Line 642... | ||
| 642 | 642 | ||
| 643 | /* v1.3 - obsoletes drm_radeon_vertex2 |
643 | /* v1.3 - obsoletes drm_radeon_vertex2 |
| 644 | * - allows arbitarily large cliprect list |
644 | * - allows arbitrarily large cliprect list |
| 645 | * - allows updating of tcl packet, vector and scalar state |
645 | * - allows updating of tcl packet, vector and scalar state |
| 646 | * - allows memory-efficient description of state updates |
646 | * - allows memory-efficient description of state updates |
| 647 | * - allows state to be emitted without a primitive |
647 | * - allows state to be emitted without a primitive |
| 648 | * (for clears, ctx switches) |
648 | * (for clears, ctx switches) |
| Line 900... | Line 900... | ||
| 900 | 900 | ||
| 901 | #define RADEON_INFO_DEVICE_ID 0x00 |
901 | #define RADEON_INFO_DEVICE_ID 0x00 |
| 902 | #define RADEON_INFO_NUM_GB_PIPES 0x01 |
902 | #define RADEON_INFO_NUM_GB_PIPES 0x01 |
| 903 | #define RADEON_INFO_NUM_Z_PIPES 0x02 |
903 | #define RADEON_INFO_NUM_Z_PIPES 0x02 |
| - | 904 | #define RADEON_INFO_ACCEL_WORKING 0x03 |
|
| - | 905 | #define RADEON_INFO_CRTC_FROM_ID 0x04 |
|
| - | 906 | #define RADEON_INFO_ACCEL_WORKING2 0x05 |
|
| - | 907 | #define RADEON_INFO_TILING_CONFIG 0x06 |
|
| - | 908 | #define RADEON_INFO_WANT_HYPERZ 0x07 |
|
| - | 909 | #define RADEON_INFO_WANT_CMASK 0x08 /* get access to CMASK on r300 */ |
|
| - | 910 | #define RADEON_INFO_CLOCK_CRYSTAL_FREQ 0x09 /* clock crystal frequency */ |
|
| - | 911 | #define RADEON_INFO_NUM_BACKENDS 0x0a /* DB/backends for r600+ - need for OQ */ |
|
| - | 912 | #define RADEON_INFO_NUM_TILE_PIPES 0x0b /* tile pipes for r600+ */ |
|
| Line 904... | Line 913... | ||
| 904 | #define RADEON_INFO_ACCEL_WORKING 0x03 |
913 | #define RADEON_INFO_FUSION_GART_WORKING 0x0c /* fusion writes to GTT were broken before this */ |
| 905 | 914 | ||
| 906 | struct drm_radeon_info { |
915 | struct drm_radeon_info { |
| 907 | uint32_t request; |
916 | uint32_t request; |