Rev 6082 | Only display areas with differences | Regard whitespace | Details | Blame | Last modification | View Log | RSS feed
Rev 6082 | Rev 7143 | ||
---|---|---|---|
1 | /* |
1 | /* |
2 | * Copyright © 2007-2008 Intel Corporation |
2 | * Copyright © 2007-2008 Intel Corporation |
3 | * Jesse Barnes |
3 | * Jesse Barnes |
4 | * |
4 | * |
5 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * Permission is hereby granted, free of charge, to any person obtaining a |
6 | * copy of this software and associated documentation files (the "Software"), |
6 | * copy of this software and associated documentation files (the "Software"), |
7 | * to deal in the Software without restriction, including without limitation |
7 | * to deal in the Software without restriction, including without limitation |
8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
9 | * and/or sell copies of the Software, and to permit persons to whom the |
9 | * and/or sell copies of the Software, and to permit persons to whom the |
10 | * Software is furnished to do so, subject to the following conditions: |
10 | * Software is furnished to do so, subject to the following conditions: |
11 | * |
11 | * |
12 | * The above copyright notice and this permission notice shall be included in |
12 | * The above copyright notice and this permission notice shall be included in |
13 | * all copies or substantial portions of the Software. |
13 | * all copies or substantial portions of the Software. |
14 | * |
14 | * |
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
18 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
18 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
19 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
19 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
20 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
20 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
21 | * OTHER DEALINGS IN THE SOFTWARE. |
21 | * OTHER DEALINGS IN THE SOFTWARE. |
22 | */ |
22 | */ |
23 | #ifndef __DRM_EDID_H__ |
23 | #ifndef __DRM_EDID_H__ |
24 | #define __DRM_EDID_H__ |
24 | #define __DRM_EDID_H__ |
25 | 25 | ||
26 | #include |
26 | #include |
27 | 27 | ||
28 | #define EDID_LENGTH 128 |
28 | #define EDID_LENGTH 128 |
29 | #define DDC_ADDR 0x50 |
29 | #define DDC_ADDR 0x50 |
30 | #define DDC_ADDR2 0x52 /* E-DDC 1.2 - where DisplayID can hide */ |
30 | #define DDC_ADDR2 0x52 /* E-DDC 1.2 - where DisplayID can hide */ |
31 | 31 | ||
32 | #define CEA_EXT 0x02 |
32 | #define CEA_EXT 0x02 |
33 | #define VTB_EXT 0x10 |
33 | #define VTB_EXT 0x10 |
34 | #define DI_EXT 0x40 |
34 | #define DI_EXT 0x40 |
35 | #define LS_EXT 0x50 |
35 | #define LS_EXT 0x50 |
36 | #define MI_EXT 0x60 |
36 | #define MI_EXT 0x60 |
37 | #define DISPLAYID_EXT 0x70 |
37 | #define DISPLAYID_EXT 0x70 |
38 | 38 | ||
39 | struct est_timings { |
39 | struct est_timings { |
40 | u8 t1; |
40 | u8 t1; |
41 | u8 t2; |
41 | u8 t2; |
42 | u8 mfg_rsvd; |
42 | u8 mfg_rsvd; |
43 | } __attribute__((packed)); |
43 | } __attribute__((packed)); |
44 | 44 | ||
45 | /* 00=16:10, 01=4:3, 10=5:4, 11=16:9 */ |
45 | /* 00=16:10, 01=4:3, 10=5:4, 11=16:9 */ |
46 | #define EDID_TIMING_ASPECT_SHIFT 6 |
46 | #define EDID_TIMING_ASPECT_SHIFT 6 |
47 | #define EDID_TIMING_ASPECT_MASK (0x3 << EDID_TIMING_ASPECT_SHIFT) |
47 | #define EDID_TIMING_ASPECT_MASK (0x3 << EDID_TIMING_ASPECT_SHIFT) |
48 | 48 | ||
49 | /* need to add 60 */ |
49 | /* need to add 60 */ |
50 | #define EDID_TIMING_VFREQ_SHIFT 0 |
50 | #define EDID_TIMING_VFREQ_SHIFT 0 |
51 | #define EDID_TIMING_VFREQ_MASK (0x3f << EDID_TIMING_VFREQ_SHIFT) |
51 | #define EDID_TIMING_VFREQ_MASK (0x3f << EDID_TIMING_VFREQ_SHIFT) |
52 | 52 | ||
53 | struct std_timing { |
53 | struct std_timing { |
54 | u8 hsize; /* need to multiply by 8 then add 248 */ |
54 | u8 hsize; /* need to multiply by 8 then add 248 */ |
55 | u8 vfreq_aspect; |
55 | u8 vfreq_aspect; |
56 | } __attribute__((packed)); |
56 | } __attribute__((packed)); |
57 | 57 | ||
58 | #define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) |
58 | #define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) |
59 | #define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) |
59 | #define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) |
60 | #define DRM_EDID_PT_SEPARATE_SYNC (3 << 3) |
60 | #define DRM_EDID_PT_SEPARATE_SYNC (3 << 3) |
61 | #define DRM_EDID_PT_STEREO (1 << 5) |
61 | #define DRM_EDID_PT_STEREO (1 << 5) |
62 | #define DRM_EDID_PT_INTERLACED (1 << 7) |
62 | #define DRM_EDID_PT_INTERLACED (1 << 7) |
63 | 63 | ||
64 | /* If detailed data is pixel timing */ |
64 | /* If detailed data is pixel timing */ |
65 | struct detailed_pixel_timing { |
65 | struct detailed_pixel_timing { |
66 | u8 hactive_lo; |
66 | u8 hactive_lo; |
67 | u8 hblank_lo; |
67 | u8 hblank_lo; |
68 | u8 hactive_hblank_hi; |
68 | u8 hactive_hblank_hi; |
69 | u8 vactive_lo; |
69 | u8 vactive_lo; |
70 | u8 vblank_lo; |
70 | u8 vblank_lo; |
71 | u8 vactive_vblank_hi; |
71 | u8 vactive_vblank_hi; |
72 | u8 hsync_offset_lo; |
72 | u8 hsync_offset_lo; |
73 | u8 hsync_pulse_width_lo; |
73 | u8 hsync_pulse_width_lo; |
74 | u8 vsync_offset_pulse_width_lo; |
74 | u8 vsync_offset_pulse_width_lo; |
75 | u8 hsync_vsync_offset_pulse_width_hi; |
75 | u8 hsync_vsync_offset_pulse_width_hi; |
76 | u8 width_mm_lo; |
76 | u8 width_mm_lo; |
77 | u8 height_mm_lo; |
77 | u8 height_mm_lo; |
78 | u8 width_height_mm_hi; |
78 | u8 width_height_mm_hi; |
79 | u8 hborder; |
79 | u8 hborder; |
80 | u8 vborder; |
80 | u8 vborder; |
81 | u8 misc; |
81 | u8 misc; |
82 | } __attribute__((packed)); |
82 | } __attribute__((packed)); |
83 | 83 | ||
84 | /* If it's not pixel timing, it'll be one of the below */ |
84 | /* If it's not pixel timing, it'll be one of the below */ |
85 | struct detailed_data_string { |
85 | struct detailed_data_string { |
86 | u8 str[13]; |
86 | u8 str[13]; |
87 | } __attribute__((packed)); |
87 | } __attribute__((packed)); |
88 | 88 | ||
89 | struct detailed_data_monitor_range { |
89 | struct detailed_data_monitor_range { |
90 | u8 min_vfreq; |
90 | u8 min_vfreq; |
91 | u8 max_vfreq; |
91 | u8 max_vfreq; |
92 | u8 min_hfreq_khz; |
92 | u8 min_hfreq_khz; |
93 | u8 max_hfreq_khz; |
93 | u8 max_hfreq_khz; |
94 | u8 pixel_clock_mhz; /* need to multiply by 10 */ |
94 | u8 pixel_clock_mhz; /* need to multiply by 10 */ |
95 | u8 flags; |
95 | u8 flags; |
96 | union { |
96 | union { |
97 | struct { |
97 | struct { |
98 | u8 reserved; |
98 | u8 reserved; |
99 | u8 hfreq_start_khz; /* need to multiply by 2 */ |
99 | u8 hfreq_start_khz; /* need to multiply by 2 */ |
100 | u8 c; /* need to divide by 2 */ |
100 | u8 c; /* need to divide by 2 */ |
101 | __le16 m; |
101 | __le16 m; |
102 | u8 k; |
102 | u8 k; |
103 | u8 j; /* need to divide by 2 */ |
103 | u8 j; /* need to divide by 2 */ |
104 | } __attribute__((packed)) gtf2; |
104 | } __attribute__((packed)) gtf2; |
105 | struct { |
105 | struct { |
106 | u8 version; |
106 | u8 version; |
107 | u8 data1; /* high 6 bits: extra clock resolution */ |
107 | u8 data1; /* high 6 bits: extra clock resolution */ |
108 | u8 data2; /* plus low 2 of above: max hactive */ |
108 | u8 data2; /* plus low 2 of above: max hactive */ |
109 | u8 supported_aspects; |
109 | u8 supported_aspects; |
110 | u8 flags; /* preferred aspect and blanking support */ |
110 | u8 flags; /* preferred aspect and blanking support */ |
111 | u8 supported_scalings; |
111 | u8 supported_scalings; |
112 | u8 preferred_refresh; |
112 | u8 preferred_refresh; |
113 | } __attribute__((packed)) cvt; |
113 | } __attribute__((packed)) cvt; |
114 | } formula; |
114 | } formula; |
115 | } __attribute__((packed)); |
115 | } __attribute__((packed)); |
116 | 116 | ||
117 | struct detailed_data_wpindex { |
117 | struct detailed_data_wpindex { |
118 | u8 white_yx_lo; /* Lower 2 bits each */ |
118 | u8 white_yx_lo; /* Lower 2 bits each */ |
119 | u8 white_x_hi; |
119 | u8 white_x_hi; |
120 | u8 white_y_hi; |
120 | u8 white_y_hi; |
121 | u8 gamma; /* need to divide by 100 then add 1 */ |
121 | u8 gamma; /* need to divide by 100 then add 1 */ |
122 | } __attribute__((packed)); |
122 | } __attribute__((packed)); |
123 | 123 | ||
124 | struct detailed_data_color_point { |
124 | struct detailed_data_color_point { |
125 | u8 windex1; |
125 | u8 windex1; |
126 | u8 wpindex1[3]; |
126 | u8 wpindex1[3]; |
127 | u8 windex2; |
127 | u8 windex2; |
128 | u8 wpindex2[3]; |
128 | u8 wpindex2[3]; |
129 | } __attribute__((packed)); |
129 | } __attribute__((packed)); |
130 | 130 | ||
131 | struct cvt_timing { |
131 | struct cvt_timing { |
132 | u8 code[3]; |
132 | u8 code[3]; |
133 | } __attribute__((packed)); |
133 | } __attribute__((packed)); |
134 | 134 | ||
135 | struct detailed_non_pixel { |
135 | struct detailed_non_pixel { |
136 | u8 pad1; |
136 | u8 pad1; |
137 | u8 type; /* ff=serial, fe=string, fd=monitor range, fc=monitor name |
137 | u8 type; /* ff=serial, fe=string, fd=monitor range, fc=monitor name |
138 | fb=color point data, fa=standard timing data, |
138 | fb=color point data, fa=standard timing data, |
139 | f9=undefined, f8=mfg. reserved */ |
139 | f9=undefined, f8=mfg. reserved */ |
140 | u8 pad2; |
140 | u8 pad2; |
141 | union { |
141 | union { |
142 | struct detailed_data_string str; |
142 | struct detailed_data_string str; |
143 | struct detailed_data_monitor_range range; |
143 | struct detailed_data_monitor_range range; |
144 | struct detailed_data_wpindex color; |
144 | struct detailed_data_wpindex color; |
145 | struct std_timing timings[6]; |
145 | struct std_timing timings[6]; |
146 | struct cvt_timing cvt[4]; |
146 | struct cvt_timing cvt[4]; |
147 | } data; |
147 | } data; |
148 | } __attribute__((packed)); |
148 | } __attribute__((packed)); |
149 | 149 | ||
150 | #define EDID_DETAIL_EST_TIMINGS 0xf7 |
150 | #define EDID_DETAIL_EST_TIMINGS 0xf7 |
151 | #define EDID_DETAIL_CVT_3BYTE 0xf8 |
151 | #define EDID_DETAIL_CVT_3BYTE 0xf8 |
152 | #define EDID_DETAIL_COLOR_MGMT_DATA 0xf9 |
152 | #define EDID_DETAIL_COLOR_MGMT_DATA 0xf9 |
153 | #define EDID_DETAIL_STD_MODES 0xfa |
153 | #define EDID_DETAIL_STD_MODES 0xfa |
154 | #define EDID_DETAIL_MONITOR_CPDATA 0xfb |
154 | #define EDID_DETAIL_MONITOR_CPDATA 0xfb |
155 | #define EDID_DETAIL_MONITOR_NAME 0xfc |
155 | #define EDID_DETAIL_MONITOR_NAME 0xfc |
156 | #define EDID_DETAIL_MONITOR_RANGE 0xfd |
156 | #define EDID_DETAIL_MONITOR_RANGE 0xfd |
157 | #define EDID_DETAIL_MONITOR_STRING 0xfe |
157 | #define EDID_DETAIL_MONITOR_STRING 0xfe |
158 | #define EDID_DETAIL_MONITOR_SERIAL 0xff |
158 | #define EDID_DETAIL_MONITOR_SERIAL 0xff |
159 | 159 | ||
160 | struct detailed_timing { |
160 | struct detailed_timing { |
161 | __le16 pixel_clock; /* need to multiply by 10 KHz */ |
161 | __le16 pixel_clock; /* need to multiply by 10 KHz */ |
162 | union { |
162 | union { |
163 | struct detailed_pixel_timing pixel_data; |
163 | struct detailed_pixel_timing pixel_data; |
164 | struct detailed_non_pixel other_data; |
164 | struct detailed_non_pixel other_data; |
165 | } data; |
165 | } data; |
166 | } __attribute__((packed)); |
166 | } __attribute__((packed)); |
167 | 167 | ||
168 | #define DRM_EDID_INPUT_SERRATION_VSYNC (1 << 0) |
168 | #define DRM_EDID_INPUT_SERRATION_VSYNC (1 << 0) |
169 | #define DRM_EDID_INPUT_SYNC_ON_GREEN (1 << 1) |
169 | #define DRM_EDID_INPUT_SYNC_ON_GREEN (1 << 1) |
170 | #define DRM_EDID_INPUT_COMPOSITE_SYNC (1 << 2) |
170 | #define DRM_EDID_INPUT_COMPOSITE_SYNC (1 << 2) |
171 | #define DRM_EDID_INPUT_SEPARATE_SYNCS (1 << 3) |
171 | #define DRM_EDID_INPUT_SEPARATE_SYNCS (1 << 3) |
172 | #define DRM_EDID_INPUT_BLANK_TO_BLACK (1 << 4) |
172 | #define DRM_EDID_INPUT_BLANK_TO_BLACK (1 << 4) |
173 | #define DRM_EDID_INPUT_VIDEO_LEVEL (3 << 5) |
173 | #define DRM_EDID_INPUT_VIDEO_LEVEL (3 << 5) |
174 | #define DRM_EDID_INPUT_DIGITAL (1 << 7) |
174 | #define DRM_EDID_INPUT_DIGITAL (1 << 7) |
175 | #define DRM_EDID_DIGITAL_DEPTH_MASK (7 << 4) |
175 | #define DRM_EDID_DIGITAL_DEPTH_MASK (7 << 4) |
176 | #define DRM_EDID_DIGITAL_DEPTH_UNDEF (0 << 4) |
176 | #define DRM_EDID_DIGITAL_DEPTH_UNDEF (0 << 4) |
177 | #define DRM_EDID_DIGITAL_DEPTH_6 (1 << 4) |
177 | #define DRM_EDID_DIGITAL_DEPTH_6 (1 << 4) |
178 | #define DRM_EDID_DIGITAL_DEPTH_8 (2 << 4) |
178 | #define DRM_EDID_DIGITAL_DEPTH_8 (2 << 4) |
179 | #define DRM_EDID_DIGITAL_DEPTH_10 (3 << 4) |
179 | #define DRM_EDID_DIGITAL_DEPTH_10 (3 << 4) |
180 | #define DRM_EDID_DIGITAL_DEPTH_12 (4 << 4) |
180 | #define DRM_EDID_DIGITAL_DEPTH_12 (4 << 4) |
181 | #define DRM_EDID_DIGITAL_DEPTH_14 (5 << 4) |
181 | #define DRM_EDID_DIGITAL_DEPTH_14 (5 << 4) |
182 | #define DRM_EDID_DIGITAL_DEPTH_16 (6 << 4) |
182 | #define DRM_EDID_DIGITAL_DEPTH_16 (6 << 4) |
183 | #define DRM_EDID_DIGITAL_DEPTH_RSVD (7 << 4) |
183 | #define DRM_EDID_DIGITAL_DEPTH_RSVD (7 << 4) |
184 | #define DRM_EDID_DIGITAL_TYPE_UNDEF (0) |
184 | #define DRM_EDID_DIGITAL_TYPE_UNDEF (0) |
185 | #define DRM_EDID_DIGITAL_TYPE_DVI (1) |
185 | #define DRM_EDID_DIGITAL_TYPE_DVI (1) |
186 | #define DRM_EDID_DIGITAL_TYPE_HDMI_A (2) |
186 | #define DRM_EDID_DIGITAL_TYPE_HDMI_A (2) |
187 | #define DRM_EDID_DIGITAL_TYPE_HDMI_B (3) |
187 | #define DRM_EDID_DIGITAL_TYPE_HDMI_B (3) |
188 | #define DRM_EDID_DIGITAL_TYPE_MDDI (4) |
188 | #define DRM_EDID_DIGITAL_TYPE_MDDI (4) |
189 | #define DRM_EDID_DIGITAL_TYPE_DP (5) |
189 | #define DRM_EDID_DIGITAL_TYPE_DP (5) |
190 | 190 | ||
191 | #define DRM_EDID_FEATURE_DEFAULT_GTF (1 << 0) |
191 | #define DRM_EDID_FEATURE_DEFAULT_GTF (1 << 0) |
192 | #define DRM_EDID_FEATURE_PREFERRED_TIMING (1 << 1) |
192 | #define DRM_EDID_FEATURE_PREFERRED_TIMING (1 << 1) |
193 | #define DRM_EDID_FEATURE_STANDARD_COLOR (1 << 2) |
193 | #define DRM_EDID_FEATURE_STANDARD_COLOR (1 << 2) |
194 | /* If analog */ |
194 | /* If analog */ |
195 | #define DRM_EDID_FEATURE_DISPLAY_TYPE (3 << 3) /* 00=mono, 01=rgb, 10=non-rgb, 11=unknown */ |
195 | #define DRM_EDID_FEATURE_DISPLAY_TYPE (3 << 3) /* 00=mono, 01=rgb, 10=non-rgb, 11=unknown */ |
196 | /* If digital */ |
196 | /* If digital */ |
197 | #define DRM_EDID_FEATURE_COLOR_MASK (3 << 3) |
197 | #define DRM_EDID_FEATURE_COLOR_MASK (3 << 3) |
198 | #define DRM_EDID_FEATURE_RGB (0 << 3) |
198 | #define DRM_EDID_FEATURE_RGB (0 << 3) |
199 | #define DRM_EDID_FEATURE_RGB_YCRCB444 (1 << 3) |
199 | #define DRM_EDID_FEATURE_RGB_YCRCB444 (1 << 3) |
200 | #define DRM_EDID_FEATURE_RGB_YCRCB422 (2 << 3) |
200 | #define DRM_EDID_FEATURE_RGB_YCRCB422 (2 << 3) |
201 | #define DRM_EDID_FEATURE_RGB_YCRCB (3 << 3) /* both 4:4:4 and 4:2:2 */ |
201 | #define DRM_EDID_FEATURE_RGB_YCRCB (3 << 3) /* both 4:4:4 and 4:2:2 */ |
202 | 202 | ||
203 | #define DRM_EDID_FEATURE_PM_ACTIVE_OFF (1 << 5) |
203 | #define DRM_EDID_FEATURE_PM_ACTIVE_OFF (1 << 5) |
204 | #define DRM_EDID_FEATURE_PM_SUSPEND (1 << 6) |
204 | #define DRM_EDID_FEATURE_PM_SUSPEND (1 << 6) |
205 | #define DRM_EDID_FEATURE_PM_STANDBY (1 << 7) |
205 | #define DRM_EDID_FEATURE_PM_STANDBY (1 << 7) |
206 | 206 | ||
207 | #define DRM_EDID_HDMI_DC_48 (1 << 6) |
207 | #define DRM_EDID_HDMI_DC_48 (1 << 6) |
208 | #define DRM_EDID_HDMI_DC_36 (1 << 5) |
208 | #define DRM_EDID_HDMI_DC_36 (1 << 5) |
209 | #define DRM_EDID_HDMI_DC_30 (1 << 4) |
209 | #define DRM_EDID_HDMI_DC_30 (1 << 4) |
210 | #define DRM_EDID_HDMI_DC_Y444 (1 << 3) |
210 | #define DRM_EDID_HDMI_DC_Y444 (1 << 3) |
211 | 211 | ||
212 | /* ELD Header Block */ |
212 | /* ELD Header Block */ |
213 | #define DRM_ELD_HEADER_BLOCK_SIZE 4 |
213 | #define DRM_ELD_HEADER_BLOCK_SIZE 4 |
214 | 214 | ||
215 | #define DRM_ELD_VER 0 |
215 | #define DRM_ELD_VER 0 |
216 | # define DRM_ELD_VER_SHIFT 3 |
216 | # define DRM_ELD_VER_SHIFT 3 |
217 | # define DRM_ELD_VER_MASK (0x1f << 3) |
217 | # define DRM_ELD_VER_MASK (0x1f << 3) |
218 | # define DRM_ELD_VER_CEA861D (2 << 3) /* supports 861D or below */ |
218 | # define DRM_ELD_VER_CEA861D (2 << 3) /* supports 861D or below */ |
219 | # define DRM_ELD_VER_CANNED (0x1f << 3) |
219 | # define DRM_ELD_VER_CANNED (0x1f << 3) |
220 | 220 | ||
221 | #define DRM_ELD_BASELINE_ELD_LEN 2 /* in dwords! */ |
221 | #define DRM_ELD_BASELINE_ELD_LEN 2 /* in dwords! */ |
222 | 222 | ||
223 | /* ELD Baseline Block for ELD_Ver == 2 */ |
223 | /* ELD Baseline Block for ELD_Ver == 2 */ |
224 | #define DRM_ELD_CEA_EDID_VER_MNL 4 |
224 | #define DRM_ELD_CEA_EDID_VER_MNL 4 |
225 | # define DRM_ELD_CEA_EDID_VER_SHIFT 5 |
225 | # define DRM_ELD_CEA_EDID_VER_SHIFT 5 |
226 | # define DRM_ELD_CEA_EDID_VER_MASK (7 << 5) |
226 | # define DRM_ELD_CEA_EDID_VER_MASK (7 << 5) |
227 | # define DRM_ELD_CEA_EDID_VER_NONE (0 << 5) |
227 | # define DRM_ELD_CEA_EDID_VER_NONE (0 << 5) |
228 | # define DRM_ELD_CEA_EDID_VER_CEA861 (1 << 5) |
228 | # define DRM_ELD_CEA_EDID_VER_CEA861 (1 << 5) |
229 | # define DRM_ELD_CEA_EDID_VER_CEA861A (2 << 5) |
229 | # define DRM_ELD_CEA_EDID_VER_CEA861A (2 << 5) |
230 | # define DRM_ELD_CEA_EDID_VER_CEA861BCD (3 << 5) |
230 | # define DRM_ELD_CEA_EDID_VER_CEA861BCD (3 << 5) |
231 | # define DRM_ELD_MNL_SHIFT 0 |
231 | # define DRM_ELD_MNL_SHIFT 0 |
232 | # define DRM_ELD_MNL_MASK (0x1f << 0) |
232 | # define DRM_ELD_MNL_MASK (0x1f << 0) |
233 | 233 | ||
234 | #define DRM_ELD_SAD_COUNT_CONN_TYPE 5 |
234 | #define DRM_ELD_SAD_COUNT_CONN_TYPE 5 |
235 | # define DRM_ELD_SAD_COUNT_SHIFT 4 |
235 | # define DRM_ELD_SAD_COUNT_SHIFT 4 |
236 | # define DRM_ELD_SAD_COUNT_MASK (0xf << 4) |
236 | # define DRM_ELD_SAD_COUNT_MASK (0xf << 4) |
237 | # define DRM_ELD_CONN_TYPE_SHIFT 2 |
237 | # define DRM_ELD_CONN_TYPE_SHIFT 2 |
238 | # define DRM_ELD_CONN_TYPE_MASK (3 << 2) |
238 | # define DRM_ELD_CONN_TYPE_MASK (3 << 2) |
239 | # define DRM_ELD_CONN_TYPE_HDMI (0 << 2) |
239 | # define DRM_ELD_CONN_TYPE_HDMI (0 << 2) |
240 | # define DRM_ELD_CONN_TYPE_DP (1 << 2) |
240 | # define DRM_ELD_CONN_TYPE_DP (1 << 2) |
241 | # define DRM_ELD_SUPPORTS_AI (1 << 1) |
241 | # define DRM_ELD_SUPPORTS_AI (1 << 1) |
242 | # define DRM_ELD_SUPPORTS_HDCP (1 << 0) |
242 | # define DRM_ELD_SUPPORTS_HDCP (1 << 0) |
243 | 243 | ||
244 | #define DRM_ELD_AUD_SYNCH_DELAY 6 /* in units of 2 ms */ |
244 | #define DRM_ELD_AUD_SYNCH_DELAY 6 /* in units of 2 ms */ |
245 | # define DRM_ELD_AUD_SYNCH_DELAY_MAX 0xfa /* 500 ms */ |
245 | # define DRM_ELD_AUD_SYNCH_DELAY_MAX 0xfa /* 500 ms */ |
246 | 246 | ||
247 | #define DRM_ELD_SPEAKER 7 |
247 | #define DRM_ELD_SPEAKER 7 |
248 | # define DRM_ELD_SPEAKER_RLRC (1 << 6) |
248 | # define DRM_ELD_SPEAKER_RLRC (1 << 6) |
249 | # define DRM_ELD_SPEAKER_FLRC (1 << 5) |
249 | # define DRM_ELD_SPEAKER_FLRC (1 << 5) |
250 | # define DRM_ELD_SPEAKER_RC (1 << 4) |
250 | # define DRM_ELD_SPEAKER_RC (1 << 4) |
251 | # define DRM_ELD_SPEAKER_RLR (1 << 3) |
251 | # define DRM_ELD_SPEAKER_RLR (1 << 3) |
252 | # define DRM_ELD_SPEAKER_FC (1 << 2) |
252 | # define DRM_ELD_SPEAKER_FC (1 << 2) |
253 | # define DRM_ELD_SPEAKER_LFE (1 << 1) |
253 | # define DRM_ELD_SPEAKER_LFE (1 << 1) |
254 | # define DRM_ELD_SPEAKER_FLR (1 << 0) |
254 | # define DRM_ELD_SPEAKER_FLR (1 << 0) |
255 | 255 | ||
256 | #define DRM_ELD_PORT_ID 8 /* offsets 8..15 inclusive */ |
256 | #define DRM_ELD_PORT_ID 8 /* offsets 8..15 inclusive */ |
257 | # define DRM_ELD_PORT_ID_LEN 8 |
257 | # define DRM_ELD_PORT_ID_LEN 8 |
258 | 258 | ||
259 | #define DRM_ELD_MANUFACTURER_NAME0 16 |
259 | #define DRM_ELD_MANUFACTURER_NAME0 16 |
260 | #define DRM_ELD_MANUFACTURER_NAME1 17 |
260 | #define DRM_ELD_MANUFACTURER_NAME1 17 |
261 | 261 | ||
262 | #define DRM_ELD_PRODUCT_CODE0 18 |
262 | #define DRM_ELD_PRODUCT_CODE0 18 |
263 | #define DRM_ELD_PRODUCT_CODE1 19 |
263 | #define DRM_ELD_PRODUCT_CODE1 19 |
264 | 264 | ||
265 | #define DRM_ELD_MONITOR_NAME_STRING 20 /* offsets 20..(20+mnl-1) inclusive */ |
265 | #define DRM_ELD_MONITOR_NAME_STRING 20 /* offsets 20..(20+mnl-1) inclusive */ |
266 | 266 | ||
267 | #define DRM_ELD_CEA_SAD(mnl, sad) (20 + (mnl) + 3 * (sad)) |
267 | #define DRM_ELD_CEA_SAD(mnl, sad) (20 + (mnl) + 3 * (sad)) |
268 | 268 | ||
269 | struct edid { |
269 | struct edid { |
270 | u8 header[8]; |
270 | u8 header[8]; |
271 | /* Vendor & product info */ |
271 | /* Vendor & product info */ |
272 | u8 mfg_id[2]; |
272 | u8 mfg_id[2]; |
273 | u8 prod_code[2]; |
273 | u8 prod_code[2]; |
274 | u32 serial; /* FIXME: byte order */ |
274 | u32 serial; /* FIXME: byte order */ |
275 | u8 mfg_week; |
275 | u8 mfg_week; |
276 | u8 mfg_year; |
276 | u8 mfg_year; |
277 | /* EDID version */ |
277 | /* EDID version */ |
278 | u8 version; |
278 | u8 version; |
279 | u8 revision; |
279 | u8 revision; |
280 | /* Display info: */ |
280 | /* Display info: */ |
281 | u8 input; |
281 | u8 input; |
282 | u8 width_cm; |
282 | u8 width_cm; |
283 | u8 height_cm; |
283 | u8 height_cm; |
284 | u8 gamma; |
284 | u8 gamma; |
285 | u8 features; |
285 | u8 features; |
286 | /* Color characteristics */ |
286 | /* Color characteristics */ |
287 | u8 red_green_lo; |
287 | u8 red_green_lo; |
288 | u8 black_white_lo; |
288 | u8 black_white_lo; |
289 | u8 red_x; |
289 | u8 red_x; |
290 | u8 red_y; |
290 | u8 red_y; |
291 | u8 green_x; |
291 | u8 green_x; |
292 | u8 green_y; |
292 | u8 green_y; |
293 | u8 blue_x; |
293 | u8 blue_x; |
294 | u8 blue_y; |
294 | u8 blue_y; |
295 | u8 white_x; |
295 | u8 white_x; |
296 | u8 white_y; |
296 | u8 white_y; |
297 | /* Est. timings and mfg rsvd timings*/ |
297 | /* Est. timings and mfg rsvd timings*/ |
298 | struct est_timings established_timings; |
298 | struct est_timings established_timings; |
299 | /* Standard timings 1-8*/ |
299 | /* Standard timings 1-8*/ |
300 | struct std_timing standard_timings[8]; |
300 | struct std_timing standard_timings[8]; |
301 | /* Detailing timings 1-4 */ |
301 | /* Detailing timings 1-4 */ |
302 | struct detailed_timing detailed_timings[4]; |
302 | struct detailed_timing detailed_timings[4]; |
303 | /* Number of 128 byte ext. blocks */ |
303 | /* Number of 128 byte ext. blocks */ |
304 | u8 extensions; |
304 | u8 extensions; |
305 | /* Checksum */ |
305 | /* Checksum */ |
306 | u8 checksum; |
306 | u8 checksum; |
307 | } __attribute__((packed)); |
307 | } __attribute__((packed)); |
308 | 308 | ||
309 | #define EDID_PRODUCT_ID(e) ((e)->prod_code[0] | ((e)->prod_code[1] << 8)) |
309 | #define EDID_PRODUCT_ID(e) ((e)->prod_code[0] | ((e)->prod_code[1] << 8)) |
310 | 310 | ||
311 | /* Short Audio Descriptor */ |
311 | /* Short Audio Descriptor */ |
312 | struct cea_sad { |
312 | struct cea_sad { |
313 | u8 format; |
313 | u8 format; |
314 | u8 channels; /* max number of channels - 1 */ |
314 | u8 channels; /* max number of channels - 1 */ |
315 | u8 freq; |
315 | u8 freq; |
316 | u8 byte2; /* meaning depends on format */ |
316 | u8 byte2; /* meaning depends on format */ |
317 | }; |
317 | }; |
318 | 318 | ||
319 | struct drm_encoder; |
319 | struct drm_encoder; |
320 | struct drm_connector; |
320 | struct drm_connector; |
321 | struct drm_display_mode; |
321 | struct drm_display_mode; |
322 | struct hdmi_avi_infoframe; |
322 | struct hdmi_avi_infoframe; |
323 | struct hdmi_vendor_infoframe; |
323 | struct hdmi_vendor_infoframe; |
324 | 324 | ||
325 | void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid); |
325 | void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid); |
326 | int drm_edid_to_sad(struct edid *edid, struct cea_sad **sads); |
326 | int drm_edid_to_sad(struct edid *edid, struct cea_sad **sads); |
327 | int drm_edid_to_speaker_allocation(struct edid *edid, u8 **sadb); |
327 | int drm_edid_to_speaker_allocation(struct edid *edid, u8 **sadb); |
328 | int drm_av_sync_delay(struct drm_connector *connector, |
328 | int drm_av_sync_delay(struct drm_connector *connector, |
329 | const struct drm_display_mode *mode); |
329 | const struct drm_display_mode *mode); |
330 | struct drm_connector *drm_select_eld(struct drm_encoder *encoder); |
330 | struct drm_connector *drm_select_eld(struct drm_encoder *encoder); |
331 | int drm_load_edid_firmware(struct drm_connector *connector); |
331 | int drm_load_edid_firmware(struct drm_connector *connector); |
332 | 332 | ||
333 | int |
333 | int |
334 | drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame, |
334 | drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame, |
335 | const struct drm_display_mode *mode); |
335 | const struct drm_display_mode *mode); |
336 | int |
336 | int |
337 | drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame, |
337 | drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame, |
338 | const struct drm_display_mode *mode); |
338 | const struct drm_display_mode *mode); |
339 | 339 | ||
340 | /** |
340 | /** |
341 | * drm_eld_mnl - Get ELD monitor name length in bytes. |
341 | * drm_eld_mnl - Get ELD monitor name length in bytes. |
342 | * @eld: pointer to an eld memory structure with mnl set |
342 | * @eld: pointer to an eld memory structure with mnl set |
343 | */ |
343 | */ |
344 | static inline int drm_eld_mnl(const uint8_t *eld) |
344 | static inline int drm_eld_mnl(const uint8_t *eld) |
345 | { |
345 | { |
346 | return (eld[DRM_ELD_CEA_EDID_VER_MNL] & DRM_ELD_MNL_MASK) >> DRM_ELD_MNL_SHIFT; |
346 | return (eld[DRM_ELD_CEA_EDID_VER_MNL] & DRM_ELD_MNL_MASK) >> DRM_ELD_MNL_SHIFT; |
347 | } |
347 | } |
348 | 348 | ||
349 | /** |
349 | /** |
350 | * drm_eld_sad - Get ELD SAD structures. |
350 | * drm_eld_sad - Get ELD SAD structures. |
351 | * @eld: pointer to an eld memory structure with sad_count set |
351 | * @eld: pointer to an eld memory structure with sad_count set |
352 | */ |
352 | */ |
353 | static inline const uint8_t *drm_eld_sad(const uint8_t *eld) |
353 | static inline const uint8_t *drm_eld_sad(const uint8_t *eld) |
354 | { |
354 | { |
355 | unsigned int ver, mnl; |
355 | unsigned int ver, mnl; |
356 | 356 | ||
357 | ver = (eld[DRM_ELD_VER] & DRM_ELD_VER_MASK) >> DRM_ELD_VER_SHIFT; |
357 | ver = (eld[DRM_ELD_VER] & DRM_ELD_VER_MASK) >> DRM_ELD_VER_SHIFT; |
358 | if (ver != 2 && ver != 31) |
358 | if (ver != 2 && ver != 31) |
359 | return NULL; |
359 | return NULL; |
360 | 360 | ||
361 | mnl = drm_eld_mnl(eld); |
361 | mnl = drm_eld_mnl(eld); |
362 | if (mnl > 16) |
362 | if (mnl > 16) |
363 | return NULL; |
363 | return NULL; |
364 | 364 | ||
365 | return eld + DRM_ELD_CEA_SAD(mnl, 0); |
365 | return eld + DRM_ELD_CEA_SAD(mnl, 0); |
366 | } |
366 | } |
367 | 367 | ||
368 | /** |
368 | /** |
369 | * drm_eld_sad_count - Get ELD SAD count. |
369 | * drm_eld_sad_count - Get ELD SAD count. |
370 | * @eld: pointer to an eld memory structure with sad_count set |
370 | * @eld: pointer to an eld memory structure with sad_count set |
371 | */ |
371 | */ |
372 | static inline int drm_eld_sad_count(const uint8_t *eld) |
372 | static inline int drm_eld_sad_count(const uint8_t *eld) |
373 | { |
373 | { |
374 | return (eld[DRM_ELD_SAD_COUNT_CONN_TYPE] & DRM_ELD_SAD_COUNT_MASK) >> |
374 | return (eld[DRM_ELD_SAD_COUNT_CONN_TYPE] & DRM_ELD_SAD_COUNT_MASK) >> |
375 | DRM_ELD_SAD_COUNT_SHIFT; |
375 | DRM_ELD_SAD_COUNT_SHIFT; |
376 | } |
376 | } |
377 | 377 | ||
378 | /** |
378 | /** |
379 | * drm_eld_calc_baseline_block_size - Calculate baseline block size in bytes |
379 | * drm_eld_calc_baseline_block_size - Calculate baseline block size in bytes |
380 | * @eld: pointer to an eld memory structure with mnl and sad_count set |
380 | * @eld: pointer to an eld memory structure with mnl and sad_count set |
381 | * |
381 | * |
382 | * This is a helper for determining the payload size of the baseline block, in |
382 | * This is a helper for determining the payload size of the baseline block, in |
383 | * bytes, for e.g. setting the Baseline_ELD_Len field in the ELD header block. |
383 | * bytes, for e.g. setting the Baseline_ELD_Len field in the ELD header block. |
384 | */ |
384 | */ |
385 | static inline int drm_eld_calc_baseline_block_size(const uint8_t *eld) |
385 | static inline int drm_eld_calc_baseline_block_size(const uint8_t *eld) |
386 | { |
386 | { |
387 | return DRM_ELD_MONITOR_NAME_STRING - DRM_ELD_HEADER_BLOCK_SIZE + |
387 | return DRM_ELD_MONITOR_NAME_STRING - DRM_ELD_HEADER_BLOCK_SIZE + |
388 | drm_eld_mnl(eld) + drm_eld_sad_count(eld) * 3; |
388 | drm_eld_mnl(eld) + drm_eld_sad_count(eld) * 3; |
389 | } |
389 | } |
390 | 390 | ||
391 | /** |
391 | /** |
392 | * drm_eld_size - Get ELD size in bytes |
392 | * drm_eld_size - Get ELD size in bytes |
393 | * @eld: pointer to a complete eld memory structure |
393 | * @eld: pointer to a complete eld memory structure |
394 | * |
394 | * |
395 | * The returned value does not include the vendor block. It's vendor specific, |
395 | * The returned value does not include the vendor block. It's vendor specific, |
396 | * and comprises of the remaining bytes in the ELD memory buffer after |
396 | * and comprises of the remaining bytes in the ELD memory buffer after |
397 | * drm_eld_size() bytes of header and baseline block. |
397 | * drm_eld_size() bytes of header and baseline block. |
398 | * |
398 | * |
399 | * The returned value is guaranteed to be a multiple of 4. |
399 | * The returned value is guaranteed to be a multiple of 4. |
400 | */ |
400 | */ |
401 | static inline int drm_eld_size(const uint8_t *eld) |
401 | static inline int drm_eld_size(const uint8_t *eld) |
402 | { |
402 | { |
403 | return DRM_ELD_HEADER_BLOCK_SIZE + eld[DRM_ELD_BASELINE_ELD_LEN] * 4; |
403 | return DRM_ELD_HEADER_BLOCK_SIZE + eld[DRM_ELD_BASELINE_ELD_LEN] * 4; |
404 | } |
404 | } |
- | 405 | ||
- | 406 | /** |
|
- | 407 | * drm_eld_get_conn_type - Get device type hdmi/dp connected |
|
- | 408 | * @eld: pointer to an ELD memory structure |
|
- | 409 | * |
|
- | 410 | * The caller need to use %DRM_ELD_CONN_TYPE_HDMI or %DRM_ELD_CONN_TYPE_DP to |
|
- | 411 | * identify the display type connected. |
|
- | 412 | */ |
|
- | 413 | static inline u8 drm_eld_get_conn_type(const uint8_t *eld) |
|
- | 414 | { |
|
- | 415 | return eld[DRM_ELD_SAD_COUNT_CONN_TYPE] & DRM_ELD_CONN_TYPE_MASK; |
|
- | 416 | } |
|
405 | 417 | ||
406 | struct edid *drm_do_get_edid(struct drm_connector *connector, |
418 | struct edid *drm_do_get_edid(struct drm_connector *connector, |
407 | int (*get_edid_block)(void *data, u8 *buf, unsigned int block, |
419 | int (*get_edid_block)(void *data, u8 *buf, unsigned int block, |
408 | size_t len), |
420 | size_t len), |
409 | void *data); |
421 | void *data); |
410 | 422 | ||
411 | #endif /* __DRM_EDID_H__ */><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><> |
423 | #endif /* __DRM_EDID_H__ */><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><> |