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Line 188... | Line 188... | ||
188 | #define DP_TRAINING_LANE3_SET 0x106 |
188 | #define DP_TRAINING_LANE3_SET 0x106 |
Line 189... | Line 189... | ||
189 | 189 | ||
190 | # define DP_TRAIN_VOLTAGE_SWING_MASK 0x3 |
190 | # define DP_TRAIN_VOLTAGE_SWING_MASK 0x3 |
191 | # define DP_TRAIN_VOLTAGE_SWING_SHIFT 0 |
191 | # define DP_TRAIN_VOLTAGE_SWING_SHIFT 0 |
192 | # define DP_TRAIN_MAX_SWING_REACHED (1 << 2) |
192 | # define DP_TRAIN_MAX_SWING_REACHED (1 << 2) |
193 | # define DP_TRAIN_VOLTAGE_SWING_400 (0 << 0) |
193 | # define DP_TRAIN_VOLTAGE_SWING_LEVEL_0 (0 << 0) |
194 | # define DP_TRAIN_VOLTAGE_SWING_600 (1 << 0) |
194 | # define DP_TRAIN_VOLTAGE_SWING_LEVEL_1 (1 << 0) |
195 | # define DP_TRAIN_VOLTAGE_SWING_800 (2 << 0) |
195 | # define DP_TRAIN_VOLTAGE_SWING_LEVEL_2 (2 << 0) |
Line 196... | Line 196... | ||
196 | # define DP_TRAIN_VOLTAGE_SWING_1200 (3 << 0) |
196 | # define DP_TRAIN_VOLTAGE_SWING_LEVEL_3 (3 << 0) |
197 | 197 | ||
198 | # define DP_TRAIN_PRE_EMPHASIS_MASK (3 << 3) |
198 | # define DP_TRAIN_PRE_EMPHASIS_MASK (3 << 3) |
199 | # define DP_TRAIN_PRE_EMPHASIS_0 (0 << 3) |
199 | # define DP_TRAIN_PRE_EMPH_LEVEL_0 (0 << 3) |
200 | # define DP_TRAIN_PRE_EMPHASIS_3_5 (1 << 3) |
200 | # define DP_TRAIN_PRE_EMPH_LEVEL_1 (1 << 3) |
Line 201... | Line 201... | ||
201 | # define DP_TRAIN_PRE_EMPHASIS_6 (2 << 3) |
201 | # define DP_TRAIN_PRE_EMPH_LEVEL_2 (2 << 3) |
202 | # define DP_TRAIN_PRE_EMPHASIS_9_5 (3 << 3) |
202 | # define DP_TRAIN_PRE_EMPH_LEVEL_3 (3 << 3) |
Line 203... | Line 203... | ||
203 | 203 | ||
Line 302... | Line 302... | ||
302 | #define DP_TEST_CRC_G_Y 0x242 |
302 | #define DP_TEST_CRC_G_Y 0x242 |
303 | #define DP_TEST_CRC_B_CB 0x244 |
303 | #define DP_TEST_CRC_B_CB 0x244 |
Line 304... | Line 304... | ||
304 | 304 | ||
305 | #define DP_TEST_SINK_MISC 0x246 |
305 | #define DP_TEST_SINK_MISC 0x246 |
- | 306 | # define DP_TEST_CRC_SUPPORTED (1 << 5) |
|
Line 306... | Line 307... | ||
306 | #define DP_TEST_CRC_SUPPORTED (1 << 5) |
307 | # define DP_TEST_COUNT_MASK 0x7 |
307 | 308 | ||
308 | #define DP_TEST_RESPONSE 0x260 |
309 | #define DP_TEST_RESPONSE 0x260 |
309 | # define DP_TEST_ACK (1 << 0) |
310 | # define DP_TEST_ACK (1 << 0) |
Line 402... | Line 403... | ||
402 | #define MODE_I2C_START 1 |
403 | #define MODE_I2C_START 1 |
403 | #define MODE_I2C_WRITE 2 |
404 | #define MODE_I2C_WRITE 2 |
404 | #define MODE_I2C_READ 4 |
405 | #define MODE_I2C_READ 4 |
405 | #define MODE_I2C_STOP 8 |
406 | #define MODE_I2C_STOP 8 |
Line 406... | Line -... | ||
406 | - | ||
407 | /** |
- | |
408 | * struct i2c_algo_dp_aux_data - driver interface structure for i2c over dp |
- | |
409 | * aux algorithm |
- | |
410 | * @running: set by the algo indicating whether an i2c is ongoing or whether |
- | |
411 | * the i2c bus is quiescent |
- | |
412 | * @address: i2c target address for the currently ongoing transfer |
- | |
413 | * @aux_ch: driver callback to transfer a single byte of the i2c payload |
- | |
414 | */ |
- | |
415 | struct i2c_algo_dp_aux_data { |
- | |
416 | bool running; |
- | |
417 | u16 address; |
- | |
418 | int (*aux_ch) (struct i2c_adapter *adapter, |
- | |
419 | int mode, uint8_t write_byte, |
- | |
420 | uint8_t *read_byte); |
- | |
421 | }; |
- | |
422 | - | ||
423 | int |
- | |
424 | i2c_dp_aux_add_bus(struct i2c_adapter *adapter); |
- | |
425 | - | ||
426 | 407 | ||
427 | #define DP_LINK_STATUS_SIZE 6 |
408 | #define DP_LINK_STATUS_SIZE 6 |
428 | bool drm_dp_channel_eq_ok(const u8 link_status[DP_LINK_STATUS_SIZE], |
409 | bool drm_dp_channel_eq_ok(const u8 link_status[DP_LINK_STATUS_SIZE], |
429 | int lane_count); |
410 | int lane_count); |
430 | bool drm_dp_clock_recovery_ok(const u8 link_status[DP_LINK_STATUS_SIZE], |
411 | bool drm_dp_clock_recovery_ok(const u8 link_status[DP_LINK_STATUS_SIZE], |
Line 548... | Line 529... | ||
548 | struct i2c_adapter ddc; |
529 | struct i2c_adapter ddc; |
549 | struct device *dev; |
530 | struct device *dev; |
550 | struct mutex hw_mutex; |
531 | struct mutex hw_mutex; |
551 | ssize_t (*transfer)(struct drm_dp_aux *aux, |
532 | ssize_t (*transfer)(struct drm_dp_aux *aux, |
552 | struct drm_dp_aux_msg *msg); |
533 | struct drm_dp_aux_msg *msg); |
- | 534 | unsigned i2c_nack_count, i2c_defer_count; |
|
553 | }; |
535 | }; |
Line 554... | Line 536... | ||
554 | 536 | ||
555 | ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset, |
537 | ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset, |
556 | void *buffer, size_t size); |
538 | void *buffer, size_t size); |