WebSVN – Kolibri OS – Diff – /drivers/ethernet/sis900.asm


;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;                                                                    ;;
;; Copyright (C) KolibriOS team 2004-2014. All rights reserved.       ;;
;; Distributed under terms of the GNU General Public License          ;;
;;                                                                    ;;
;;  Ethernet driver for KolibriOS                                     ;;
;;  This is an adaptation of MenuetOS driver with minimal changes.    ;;
;;  Changes were made by CleverMouse. Original copyright follows.     ;;
;;                                                                    ;;
;;  This driver is based on the SIS900 driver from                    ;;
;;  the etherboot 5.0.6 project. The copyright statement is           ;;
;;                                                                    ;;
;;          GNU GENERAL PUBLIC LICENSE                                ;;
;;             Version 2, June 1991                                   ;;
;;                                                                    ;;
;;  remaining parts Copyright 2004 Jason Delozier,                    ;;
;;   cordata51@hotmail.com                                            ;;
;;                                                                    ;;
;;  See file COPYING for details                                      ;;
;;                                                                    ;;
;;  Updates:                                                          ;;
;;    Revision Look up table and SIS635 Mac Address by Jarek Pelczar  ;;
;;                                                                    ;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
format PE DLL native
entry START
 
        CURRENT_API             = 0x0200
        COMPATIBLE_API          = 0x0100
        API_VERSION             = (COMPATIBLE_API shl 16) + CURRENT_API
 
        NUM_RX_DESC             = 4             ; Number of RX descriptors
        NUM_TX_DESC             = 4             ; Number of TX descriptors
        RX_BUFF_SZ              = 1520          ; Buffer size for each Rx buffer
 
        MAX_DEVICES             = 16
 
        __DEBUG__               = 1
        __DEBUG_LEVEL__         = 2             ; 1 = verbose, 2 = errors only
 
        DSIZE                   = 0x00000fff
        CRC_SIZE                = 4
        RFADDR_shift            = 16
 
; If you are having problems sending/receiving packet try changing the
; Max DMA Burst, Possible settings are as follows:
;
; 0x00000000 = 512 bytes
; 0x00100000 = 4 bytes
; 0x00200000 = 8 bytes
; 0x00300000 = 16 bytes
; 0x00400000 = 32 bytes
; 0x00500000 = 64 bytes
; 0x00600000 = 128 bytes
; 0x00700000 = 256 bytes
 
        RX_DMA                  = 0x00600000
        TX_DMA                  = 0x00600000
 
;-------------------------------------------------------------------------------------------------
; Symbolic offsets to registers.
        cr              = 0x0           ; Command Register
        cfg             = 0x4           ; Configuration Register
        mear            = 0x8           ; EEPROM Access Register
        ptscr           = 0xc           ; PCI Test Control Register
        isr             = 0x10          ; Interrupt Status Register
        imr             = 0x14          ; Interrupt Mask Register
        ier             = 0x18          ; Interrupt Enable Register
        epar            = 0x18          ; Enhanced PHY Access Register
        txdp            = 0x20          ; Transmit Descriptor Pointer Register
        txcfg           = 0x24          ; Transmit Configuration Register
        rxdp            = 0x30          ; Receive Descriptor Pointer Register
        rxcfg           = 0x34          ; Receive Configuration Register
        flctrl          = 0x38          ; Flow Control Register
        rxlen           = 0x3c          ; Receive Packet Length Register
        rfcr            = 0x48          ; Receive Filter Control Register
        rfdr            = 0x4C          ; Receive Filter Data Register
        pmctrl          = 0xB0          ; Power Management Control Register
        pmer            = 0xB4          ; Power Management Wake-up Event Register
 
; Command Register Bits
        RELOAD          = 0x00000400
        ACCESSMODE      = 0x00000200
        RESET           = 0x00000100
        SWI             = 0x00000080
        RxRESET         = 0x00000020
        TxRESET         = 0x00000010
        RxDIS           = 0x00000008
        RxENA           = 0x00000004
        TxDIS           = 0x00000002
        TxENA           = 0x00000001
 
; Configuration Register Bits
        DESCRFMT        = 0x00000100    ; 7016 specific
        REQALG          = 0x00000080
        SB              = 0x00000040
        POW             = 0x00000020
        EXD             = 0x00000010
        PESEL           = 0x00000008
        LPM             = 0x00000004
        BEM             = 0x00000001
        RND_CNT         = 0x00000400
        FAIR_BACKOFF    = 0x00000200
        EDB_MASTER_EN   = 0x00002000
 
; Eeprom Access Reigster Bits
        MDC             = 0x00000040
        MDDIR           = 0x00000020
        MDIO            = 0x00000010    ; 7016 specific
        EECS            = 0x00000008
        EECLK           = 0x00000004
        EEDO            = 0x00000002
        EEDI            = 0x00000001
 
; TX Configuration Register Bits
        ATP             = 0x10000000    ; Automatic Transmit Padding
        MLB             = 0x20000000    ; Mac Loopback Enable
        HBI             = 0x40000000    ; HeartBeat Ignore (Req for full-dup)
        CSI             = 0x80000000    ; CarrierSenseIgnore (Req for full-du
 
; RX Configuration Register Bits
        AJAB            = 0x08000000    ;
        ATX             = 0x10000000    ; Accept Transmit Packets
        ARP             = 0x40000000    ; accept runt packets (<64bytes)
        AEP             = 0x80000000    ; accept error packets
 
; Interrupt Register Bits
        WKEVT           = 0x10000000
        TxPAUSEEND      = 0x08000000
        TxPAUSE         = 0x04000000
        TxRCMP          = 0x02000000    ; Transmit Reset Complete
        RxRCMP          = 0x01000000    ; Receive Reset Complete
        DPERR           = 0x00800000
        SSERR           = 0x00400000
        RMABT           = 0x00200000
        RTABT           = 0x00100000
        RxSOVR          = 0x00010000
        HIBERR          = 0x00008000
        SWINT           = 0x00001000
        MIBINT          = 0x00000800
        TxURN           = 0x00000400
        TxIDLE          = 0x00000200
        TxERR           = 0x00000100
        TxDESC          = 0x00000080
        TxOK            = 0x00000040
        RxORN           = 0x00000020
        RxIDLE          = 0x00000010
        RxEARLY         = 0x00000008
        RxERR           = 0x00000004
        RxDESC          = 0x00000002
        RxOK            = 0x00000001
 
; Interrupt Enable Register Bits
        IE              = RxOK + TxOK
 
; Revision ID
        SIS900B_900_REV         = 0x03
        SIS630A_900_REV         = 0x80
        SIS630E_900_REV         = 0x81
        SIS630S_900_REV         = 0x82
        SIS630EA1_900_REV       = 0x83
        SIS630ET_900_REV        = 0x84
        SIS635A_900_REV         = 0x90
        SIS900_960_REV          = 0x91
 
; Receive Filter Control Register Bits
        RFEN            = 0x80000000            ; enable
        RFAAB           = 0x40000000            ; accept all broadcasts
        RFAAM           = 0x20000000            ; accept all multicasts
        RFAAP           = 0x10000000            ; accept all packets
 
; Reveive Filter Data Mask
        RFDAT           = 0x0000FFFF
 
; Eeprom Address
        EEPROMSignature = 0x00
        EEPROMVendorID  = 0x02
        EEPROMDeviceID  = 0x03
        EEPROMMACAddr   = 0x08
        EEPROMChecksum  = 0x0b
 
; The EEPROM commands include the alway-set leading bit.
        EEread          = 0x0180
        EEwrite         = 0x0140
        EEerase         = 0x01C0
        EEwriteEnable   = 0x0130
        EEwriteDisable  = 0x0100
        EEeraseAll      = 0x0120
        EEwriteAll      = 0x0110
        EEaddrMask      = 0x013F
        EEcmdShift      = 16
 
; For SiS962 or SiS963, request the eeprom software access
        EEREQ           = 0x00000400
        EEDONE          = 0x00000200
        EEGNT           = 0x00000100
 
section '.flat' readable writable executable
 
include '../proc32.inc'
include '../struct.inc'
include '../macros.inc'
include '../fdo.inc'
include '../netdrv.inc'
 
 
struct  device          ETH_DEVICE
 
        io_addr         dd ?
        pci_bus         dd ?
        pci_dev         dd ?
        irq_line        db ?
        cur_rx          db ?
        cur_tx          db ?
        last_tx         db ?
        pci_revision    db ?
        table_entries   db ?
 
        rb 0x100 - ($ and 0xff) ; align 256
        txd             rd (4 * NUM_TX_DESC)
        rxd             rd (4 * NUM_RX_DESC)
 
ends
 
macro   ee_delay {
        push    eax
        in      eax, dx
        in      eax, dx
        in      eax, dx
        in      eax, dx
        in      eax, dx
        in      eax, dx
        in      eax, dx
        in      eax, dx
        in      eax, dx
        in      eax, dx
        pop     eax
}
 
;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;                        ;;
;; proc START             ;;
;;                        ;;
;; (standard driver proc) ;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
; Driver entry point - register our service when the driver is loading.
; TODO: add needed operations when unloading
 
proc START c, reason:dword, cmdline:dword
 
        cmp     [reason], DRV_ENTRY
        jne     .fail
 
        DEBUGF  2,"Loading driver\n"
        invoke  RegService, my_service, service_proc
        ret
 
  .fail:
        xor     eax, eax
        ret
 
endp
 
 
;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;                        ;;
;; proc SERVICE_PROC      ;;
;;                        ;;
;; (standard driver proc) ;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
; Service procedure for the driver - handle all I/O requests for the driver.
; Currently handled requests are: SRV_GETVERSION = 0 and SRV_HOOK = 1.
service_proc:
; 1. Get parameter from the stack: [esp+4] is the first parameter,
;       pointer to IOCTL structure.
        mov     edx, [esp+4]    ; edx -> IOCTL
; 2. Get request code and select a handler for the code.
        mov     eax, [edx + IOCTL.io_code]
        test    eax, eax        ; check for SRV_GETVERSION
        jnz     @f
; 3. This is SRV_GETVERSION request, no input, 4 bytes output, API_VERSION.
; 3a. Output size must be at least 4 bytes.
        cmp     [edx + IOCTL.out_size], 4
        jb      .fail
; 3b. Write result to the output buffer.
        mov     eax, [edx + IOCTL.output]
        mov     [eax], dword API_VERSION
; 3c. Return success.
        xor     eax, eax
        ret     4
  @@:
        dec     eax     ; check for SRV_HOOK
        jnz     .fail
; 4. This is SRV_HOOK request, input defines the device to hook, no output.
; 4a. The driver works only with PCI devices,
;       so input must be at least 3 bytes long.
        cmp     [edx + IOCTL.inp_size], 3
        jb      .fail
; 4b. First byte of input is bus type, 1 stands for PCI.
        mov     eax, [edx + IOCTL.input]
        cmp     byte [eax], 1
        jne     .fail
; 4c. Second and third bytes of the input define the device: bus and dev.
;       Word in bx holds both bytes.
        mov     bx, [eax+1]
; 4d. Check if the device was already hooked,
;       scan through the list of known devices.
; check if the device is already listed
        mov     esi, device_list
        mov     ecx, [devices]
        test    ecx, ecx
        jz      .firstdevice
 
;        mov     eax, [edx + IOCTL.input]                ; get the pci bus and device numbers
        mov     ax, [eax+1]                             ;
  .nextdevice:
        mov     ebx, [esi]
        cmp     al, byte[ebx + device.pci_bus]
        jne     @f
        cmp     ah, byte[ebx + device.pci_dev]
        je      .find_devicenum                         ; Device is already loaded, let's find it's device number
       @@:
        add     esi, 4
        loop    .nextdevice
; 4e. This device doesn't have its own eth_device structure yet, let's create one
  .firstdevice:
; 4f. Check that we have place for new device.
        cmp     [devices], MAX_DEVICES
        jae     .fail
; 4g. Allocate memory for device descriptor and receive+transmit buffers.
; 4h. Zero the structure.
        allocate_and_clear ebx, sizeof.device, .fail
; 4i. Save PCI coordinates
        mov     eax, [edx + IOCTL.input]
        movzx   ecx, byte[eax+1]
        mov     [ebx + device.pci_bus], ecx
        movzx   ecx, byte[eax+2]
        mov     [ebx + device.pci_dev], ecx
; 4j. Fill in the direct call addresses into the struct.
        mov     [ebx + device.reset], reset
        mov     [ebx + device.transmit], transmit
        mov     [ebx + device.unload], unload
        mov     [ebx + device.name], my_service
 
; 4k. Now, it's time to find the base io addres of the PCI device
; TODO: implement check if bus and dev exist on this machine
 
; Now, it's time to find the base io addres of the PCI device
        stdcall PCI_find_io, [ebx + device.pci_bus], [ebx + device.pci_dev]
        mov     [ebx + device.io_addr], eax
 
; We've found the io address, find IRQ now
 
        invoke  PciRead8, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.interrupt_line
        mov     [ebx + device.irq_line], al
 
; 4m. Add new device to the list (required for int_handler).
        mov     eax, [devices]
        mov     [device_list+4*eax], ebx
        inc     [devices]
 
; 4m. Ok, the eth_device structure is ready, let's probe the device
        call    probe
        test    eax, eax
        jnz     .destroy
; 4n. If device was successfully initialized, register it for the kernel.
 
        mov     [ebx + device.type], NET_TYPE_ETH
        invoke  NetRegDev
 
        cmp     eax, -1
        je      .destroy
 
        ret     4
 
; 5. If the device was already loaded, find the device number and return it in eax
 
  .find_devicenum:
        invoke  NetPtrToNum                             ; This kernel procedure converts a pointer to device struct in ebx
                                                        ; into a device number in edi
        mov     eax, edi                                ; Application wants it in eax instead
        ret     4
 
; If an error occured, remove all allocated data and exit (returning -1 in eax)
 
  .destroy:
        dec     [devices]
        ; todo: reset device into virgin state
 
  .err:
        invoke  KernelFree, ebx
 
  .fail:
        xor     eax, eax
        ret     4
 
 
;;/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\;;
;;                                                                        ;;
;;        Actual Hardware dependent code starts here                      ;;
;;                                                                        ;;
;;/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\;;
 
unload:
        ; TODO: (in this particular order)
        ;
        ; - Stop the device
        ; - Detach int handler
        ; - Remove device from local list
        ; - call unregister function in kernel
        ; - Remove all allocated structures and buffers the card used
 
        or      eax, -1
 
ret
 
;***************************************************************************
;
; probe
;
; checks the card and enables it
;
; TODO: probe mii transceivers
;
;***************************************************************************
align 4
probe:
        DEBUGF  1, "Probe\n"
 
; wake up device
; TODO: check capabilities pointer instead of using hardcoded offset.
        invoke  PciWrite8, [ebx + device.pci_bus], [ebx + device.pci_dev], 0x40, 0
 
; Make the device a bus master
        invoke  PciRead32, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.command
        or      al, PCI_CMD_MASTER
        invoke  PciWrite32, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.command, eax
 
; Adjust PCI latency to be at least 64
        invoke  PciRead8, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.max_latency
        cmp     al, 64
        jae     @f
        mov     al, 64
        invoke  PciWrite8, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.max_latency, eax
  @@:
 
; Get Card Revision
        invoke  PciRead8, [ebx + device.pci_bus], [ebx + device.pci_dev], 0x08
        mov     [ebx + device.pci_revision], al         ; save the revision for later use
 
; Look up through the specific_table
        mov     esi, specific_table
  .tableloop:
        cmp     dword[esi], 0                           ; Check if we reached end of the list
        je      .notsupported
        cmp     al, [esi]                               ; Check if revision is OK
        je      .ok
        add     esi, 12                                 ; Advance to next entry
        jmp     .tableloop
  .ok:
        call     dword[esi + 4]                         ; "get MAC" function
 
; Set table entries
        mov      [ebx + device.table_entries], 16
        cmp      [ebx + device.pci_revision], SIS635A_900_REV
        jae      @f
        cmp      [ebx + device.pci_revision], SIS900B_900_REV
        je       @f
        mov      [ebx + device.table_entries], 8
       @@:
 
; TODO: Probe for mii transceiver
        jmp     reset
 
  .notsupported:
        DEBUGF  2, "Device not supported\n"
        or      eax, -1
 
        ret
 
reset:
 
        DEBUGF  1, "reset\n"
 
        movzx   eax, [ebx + device.irq_line]
        invoke  AttachIntHandler, eax, int_handler, ebx
        test    eax, eax
        jnz     @f
        DEBUGF  2,"Could not attach int handler!\n"
        or      eax, -1
        ret
       @@:   
 
;--------------------------------------------
; Disable Interrupts and reset Receive Filter
 
        set_io  [ebx + device.io_addr], 0
        set_io  [ebx + device.io_addr], ier
        xor     eax, eax
        out     dx, eax
 
        set_io  [ebx + device.io_addr], imr
        out     dx, eax
 
        set_io  [ebx + device.io_addr], rfcr
        out     dx, eax
 
;-----------
; Reset Card
 
        set_io  [ebx + device.io_addr], cr
        in      eax, dx                                 ; Get current Command Register
        or      eax, RESET + RxRESET + TxRESET          ; set flags
        out     dx, eax                                 ; Write new Command Register
 
;----------
; Wait loop
 
        set_io  [ebx + device.io_addr], isr
        mov     ecx, 1000
  .loop:
        dec     ecx
        jz      .fail
        in      eax, dx                                 ; read interrupt status
        test    eax, TxRCMP + RxRCMP
        jz      .loop
        DEBUGF  1, "status=%x\n", eax
 
;------------------------------------------------------
; Set Configuration Register depending on Card Revision
 
        set_io  [ebx + device.io_addr], cfg
        mov     eax, PESEL                              ; Configuration Register Bit
        cmp     [ebx + device.pci_revision], SIS635A_900_REV
        je      .match
        cmp     [ebx + device.pci_revision], SIS900B_900_REV ; Check card revision
        jne     .done
  .match:                                               ; Revision match
        or      eax, RND_CNT                            ; Configuration Register Bit
  .done:
        out     dx, eax
 
        DEBUGF  1, "Initialising RX Filter\n"
 
; Get Receive Filter Control Register
        set_io  [ebx + device.io_addr], rfcr
        in      eax, dx
        push    eax
 
; disable packet filtering before setting filter
        and     eax, not RFEN
        out     dx, eax
 
; load MAC addr to filter data register
        xor     ecx, ecx
  .macloop:
        mov     eax, ecx
        set_io  [ebx + device.io_addr], 0
        set_io  [ebx + device.io_addr], rfcr
        shl     eax, 16                                 ; high word of eax tells card which mac byte to write
        out     dx, eax                                 ;
        set_io  [ebx + device.io_addr], rfdr
        mov     ax, word [ebx + device.mac + ecx*2]     ; Get Mac ID word
        out     dx, ax                                  ; Send Mac ID
        inc     cl                                      ; send next word
        cmp     cl, 3                                   ; more to send?
        jne     .macloop
 
; enable packet filtering
        pop     eax                                     ; old register value
        set_io  [ebx + device.io_addr], rfcr
        or      eax, RFEN                               ; enable filtering
        out     dx, eax                                 ; set register
 
        DEBUGF  1, "Initialising TX Descriptors\n"
 
        mov     ecx, NUM_TX_DESC
        lea     esi, [ebx + device.txd]
  .txdescloop:
        lea     eax, [esi + 16]                         ; next ptr
        invoke  GetPhysAddr
        mov     dword[esi], eax                         ; link to next desc
        mov     dword[esi + 4], 0                       ; status field
        mov     dword[esi + 8], 0                       ; ptr to buffer
        add     esi, 16
        dec     ecx
        jnz     .txdescloop
 
        lea     eax, [ebx + device.txd]
        invoke  GetPhysAddr
        mov     dword[esi - 16], eax                    ; correct last descriptor link ptr
 
        set_io  [ebx + device.io_addr], txdp            ; TX Descriptor Pointer
;        lea     eax, [ebx + device.txd]
;        invoke  GetPhysAddr
        out     dx, eax
 
        mov     [ebx + device.cur_tx], 0                ; Set current tx descriptor to 0
        mov     [ebx + device.last_tx], 0
 
        DEBUGF  1, "Initialising RX Descriptors\n"
 
        mov     ecx, NUM_RX_DESC
        lea     esi, [ebx + device.rxd]
  .rxdescloop:
        lea     eax, [esi + 16]                         ; next ptr
        invoke  GetPhysAddr
        mov     dword [esi], eax
        mov     dword [esi + 4], RX_BUFF_SZ             ; size
 
        push    ecx esi
        invoke  KernelAlloc, RX_BUFF_SZ
        pop     esi ecx
        test    eax, eax
        jz      .fail
        mov     dword [esi + 12], eax                   ; address
        invoke  GetPhysAddr
        mov     dword [esi + 8], eax                    ; real address
        add     esi, 16
        dec     ecx
        jnz     .rxdescloop
 
        lea     eax, [ebx + device.rxd]
        invoke  GetPhysAddr
        mov     dword [esi - 16], eax                   ; correct last descriptor link ptr
 
        set_io  [ebx + device.io_addr], 0
        set_io  [ebx + device.io_addr], rxdp
;        lea     eax, [ebx + device.rxd]
;        invoke  GetPhysAddr
        out     dx, eax
 
        mov     [ebx + device.cur_rx], 0                ; Set current rx descriptor to 0
 
        DEBUGF  1, "setting RX mode\n"
 
        xor     cl, cl
  .rxfilterloop:
        set_io  [ebx + device.io_addr], 0
        set_io  [ebx + device.io_addr], rfcr            ; Receive Filter Control Reg offset
        mov     eax, 4                                  ; determine table entry
        add     al, cl
        shl     eax, 16
        out     dx, eax                                 ; tell card which entry to modify
 
        set_io  [ebx + device.io_addr], rfdr            ; Receive Filter Control Reg offset
        mov     eax, 0xffff                             ; entry value
        out     dx, ax                                  ; write value to table in card
 
        inc     cl                                      ; next entry
        cmp     cl, [ebx + device.table_entries]
        jb      .rxfilterloop
 
        set_io  [ebx + device.io_addr], rfcr            ; Receive Filter Control Register offset
        mov     eax, RFAAB + RFAAM + RFAAP + RFEN
        out     dx, eax
 
        set_io  [ebx + device.io_addr], rxcfg           ; Receive Config Register offset
        mov     eax, ATX + RX_DMA + 2                   ; 0x2 : RX Drain Threshold = 8*8=64 bytes
        out     dx, eax
 
        DEBUGF  1, "setting TX mode\n"
 
        set_io  [ebx + device.io_addr], txcfg           ; Transmit config Register offset
        mov     eax, ATP + HBI + CSI + TX_DMA + 0x120   ; TX Fill threshold = 0x100
                                                        ; TX Drain Threshold = 0x20
        out     dx, eax
 
        DEBUGF  1, "Enabling interrupts\n"
 
        set_io  [ebx + device.io_addr], imr
        mov     eax, IE                                 ; Interrupt enable mask
        out     dx, eax
 
        set_io  [ebx + device.io_addr], cr
        in      eax, dx
        or      eax, RxENA                              ; Enable Receive
        out     dx, eax
 
        set_io  [ebx + device.io_addr], ier             ; Interrupt enable
        mov     eax, 1
        out     dx, eax
 
        mov     [ebx + device.mtu], 1514
 
; Set link state to unknown
        mov     [ebx + device.state], ETH_LINK_UNKNOWN
 
        xor     eax, eax
        ret
 
  .fail:
        DEBUGF  2, "Resetting device failed\n"
        or      eax, -1
 
        ret
 
 
;***************************************************************************
;
; SIS960_get_mac_addr: - Get MAC address for SiS962 or SiS963 model
;
; SiS962 or SiS963 model, use EEPROM to store MAC address.
; EEPROM is shared by LAN and 1394.
; When access EEPROM, send EEREQ signal to hardware first, and wait for EEGNT.
; If EEGNT is ON, EEPROM is permitted to be accessed by LAN, otherwise is not.
; After MAC address is read from EEPROM, send
; EEDONE signal to refuse EEPROM access by LAN.
; The EEPROM map of SiS962 or SiS963 is different to SiS900.
; The signature field in SiS962 or SiS963 spec is meaningless.
;
; Return 0 is EAX = failure
;
;***************************************************************************
align 4
SIS960_get_mac_addr:
        DEBUGF  1, "SIS960 - get mac:\n"
 
;-------------------------------
; Send Request for eeprom access
 
        set_io  [ebx + device.io_addr], 0
        set_io  [ebx + device.io_addr], mear            ; Eeprom access register
        mov     eax, EEREQ                              ; Request access to eeprom
        out     dx, eax                                 ; Send request
 
;-----------------------------------------------------
; Loop 4000 times and if access not granted, error out
 
        mov     ecx, 4000
  .loop:
        in      eax, dx                                 ; get eeprom status
        test    eax, EEGNT                              ; see if eeprom access granted flag is set
        jnz     .got_access                             ; if it is, go access the eeprom
        loop    .loop                                   ; else keep waiting
 
        DEBUGF  2, "Access to EEprom failed!\n", 0
 
        set_io  [ebx + device.io_addr], mear            ; Eeprom access register
        mov     eax, EEDONE                             ; tell eeprom we are done
        out     dx, eax
 
        or      eax, -1                                 ; error
        ret
 
  .got_access:
 
;------------------------------------------
; EEprom access granted, read MAC from card
 
    ; zero based so 3-16 bit reads will take place
 
        mov     ecx, 2
  .read_loop:
        mov     eax, EEPROMMACAddr                      ; Base Mac Address
        add     eax, ecx                                ; Current Mac Byte Offset
        push    ecx
        call    read_eeprom                             ; try to read 16 bits
        pop     ecx
        mov     word [ebx + device.mac+ecx*2], ax       ; save 16 bits to the MAC ID varible
        dec     ecx                                     ; one less word to read
        jns     .read_loop                              ; if more read more
        mov     eax, 1                                  ; return non-zero indicating success
 
        DEBUGF  1,"%x-%x-%x-%x-%x-%x\n",\
        [ebx + device.mac]:2,[ebx + device.mac+1]:2,[ebx + device.mac+2]:2,[ebx + device.mac+3]:2,[ebx + device.mac+4]:2,[ebx + device.mac+5]:2
 
;-------------------------------------
; Tell EEPROM We are Done Accessing It
 
  .done:
        set_io  [ebx + device.io_addr], 0
        set_io  [ebx + device.io_addr], mear            ; Eeprom access register
        mov     eax, EEDONE                             ; tell eeprom we are done
        out     dx, eax
 
        xor     eax, eax                                ; ok
        ret
 
 
 
 
;***************************************************************************
;
; get_mac_addr: - Get MAC address for stand alone SiS900 model
;
; Older SiS900 and friends, use EEPROM to store MAC address.
;
;***************************************************************************
align 4
SIS900_get_mac_addr:
        DEBUGF  1, "SIS900 - get mac:\n"
 
;------------------------------------
; check to see if we have sane EEPROM
 
        mov     eax, EEPROMSignature                    ; Base Eeprom Signature
        call    read_eeprom                             ; try to read 16 bits
        cmp     ax, 0xffff
        je      .err
        test    ax, ax
        je      .err
 
;-----------
; Read MacID
 
; zero based so 3-16 bit reads will take place
 
        mov     ecx, 2
  .loop:
        mov     eax, EEPROMMACAddr                      ; Base Mac Address
        add     eax, ecx                                ; Current Mac Byte Offset
        push    ecx
        call    read_eeprom                             ; try to read 16 bits
        pop     ecx
        mov     word [ebx + device.mac+ecx*2], ax       ; save 16 bits to the MAC ID storage
        dec     ecx                                     ; one less word to read
        jns     .loop                                   ; if more read more
 
        DEBUGF  1,"%x-%x-%x-%x-%x-%x\n",\
        [ebx + device.mac]:2,[ebx + device.mac+1]:2,[ebx + device.mac+2]:2,[ebx + device.mac+3]:2,[ebx + device.mac+4]:2,[ebx + device.mac+5]:2
 
        xor     eax, eax
        ret
 
 
  .err:
        DEBUGF  1, "Access to EEprom failed!\n", 0
 
        or      eax, -1
        ret
 
 
;***************************************************************************
;
; Get_Mac_SIS635_900_REV: - Get MAC address for model 635
;
;***************************************************************************
align 4
Get_Mac_SIS635_900_REV:
        DEBUGF  1, "SIS635 - get mac:\n"
 
        set_io  [ebx + device.io_addr], 0
        set_io  [ebx + device.io_addr], rfcr
        in      eax, dx
        mov     esi, eax
 
        set_io  [ebx + device.io_addr], cr
        or      eax, RELOAD
        out     dx, eax
 
        xor     eax, eax
        out     dx, eax
 
;-----------------------------------------------
; Disable packet filtering before setting filter
 
        set_io  [ebx + device.io_addr], rfcr
        mov     eax, esi
        and     eax, not RFEN
        out     dx, eax
 
;---------------------------------
; Load MAC to filter data register
 
        xor     ecx, ecx
        lea     edi, [ebx + device.mac]
  .loop:
        set_io  [ebx + device.io_addr], 0
        set_io  [ebx + device.io_addr], rfcr
        mov     eax, ecx
        shl     eax, RFADDR_shift
        out     dx, eax
 
        set_io  [ebx + device.io_addr], rfdr
        in      ax, dx
        stosw
        inc     ecx
        cmp     ecx, 3
        jb      .loop
 
;------------------------
; Enable packet filtering
 
        set_io  [ebx + device.io_addr], rfcr
        mov     eax, esi
        or      eax, RFEN
        out     dx, eax
 
        DEBUGF  1,"%x-%x-%x-%x-%x-%x\n",\
        [ebx + device.mac]:2,[ebx + device.mac+1]:2,[ebx + device.mac+2]:2,[ebx + device.mac+3]:2,[ebx + device.mac+4]:2,[ebx + device.mac+5]:2
 
        xor     eax, eax
        ret
 
;***************************************************************************
;
; read_eeprom
;
; reads and returns a given location from EEPROM
;
; IN:  si = addr
; OUT: ax = data
;
;***************************************************************************
align 4
read_eeprom:
 
        set_io  [ebx + device.io_addr], 0
        set_io  [ebx + device.io_addr], mear
 
        xor     eax, eax                                ; start send
        out     dx, eax
        ee_delay
 
        or      eax, EECLK
        out     dx, eax
        ee_delay
 
;------------------------------------
; Send the read command
 
        or      esi, EEread
        mov     ecx, 1 shl 9
 
  .loop:
        mov     eax, EECS
        test    esi, ecx
        jz      @f
        or      eax, EEDI
       @@:
        out     dx, eax
        ee_delay
 
        or      eax, EECLK
        out     dx, eax
        ee_delay
 
        shr     esi, 1
        jnc     .loop
 
        mov     eax, EECS
        out     dx, eax
        ee_delay
 
;------------------------
; Read 16-bits of data in
 
        xor     esi, esi
        mov     cx, 16
  .loop2:
        mov     eax, EECS
        out     dx, eax
        ee_delay
 
        or      eax, EECLK
        out     dx, eax
        ee_delay
 
        in      eax, dx
        shl     esi, 1
        test    eax, EEDO
        jz      @f
        inc     esi
       @@:
        loop    .loop2
 
;----------------------------
; Terminate the EEPROM access
 
        xor     eax, eax
        out     dx, eax
        ee_delay
 
        mov     eax, EECLK
        out     dx, eax
        ee_delay
 
        movzx   eax, si
 
        ret
 
 
 
align 4
write_mac:
        DEBUGF  2,'Setting MAC is not supported for SIS900 card.\n'
        add     esp, 6
        ret
 
 
 
 
;***************************************************************************
;   Function
;      transmit
;   Description
;      Transmits a packet of data via the ethernet card
;         buffer pointer in [esp+4]
;         size of buffer in [esp+8]
;         pointer to device structure in ebx
;
;***************************************************************************
align 4
 
proc transmit stdcall bufferptr, buffersize
 
        pushf
        cli
 
        DEBUGF  1,"Transmitting packet, buffer:%x, size:%u\n", [bufferptr], [buffersize]
        mov     eax, [bufferptr]
        DEBUGF  1,"To: %x-%x-%x-%x-%x-%x From: %x-%x-%x-%x-%x-%x Type:%x%x\n",\
        [eax+00]:2,[eax+01]:2,[eax+02]:2,[eax+03]:2,[eax+04]:2,[eax+05]:2,\
        [eax+06]:2,[eax+07]:2,[eax+08]:2,[eax+09]:2,[eax+10]:2,[eax+11]:2,\
        [eax+13]:2,[eax+12]:2
 
        cmp     [buffersize], 1514
        ja      .fail
        cmp     [buffersize], 60
        jb      .fail
 
        movzx   ecx, [ebx + device.cur_tx]
        shl     ecx, 4                                  ; *16
        lea     ecx, [ebx + device.txd + ecx]
 
        test    dword[ecx + 4], 0x80000000              ; card owns descriptor ?
        jnz     .fail
 
        mov     eax, [bufferptr]
        mov     dword[ecx + 12], eax
        invoke  GetPhysAddr
        mov     dword[ecx + 8], eax                     ; buffer address
 
        mov     eax, [buffersize]
        and     eax, DSIZE
        or      eax, 0x80000000                         ; card owns descriptor
        mov     dword[ecx + 4], eax                     ; status field
 
        set_io  [ebx + device.io_addr], 0
        set_io  [ebx + device.io_addr], cr
        in      eax, dx
        or      eax, TxENA                              ; Enable the transmit state machine
        out     dx, eax
 
        inc     [ebx + device.cur_tx]
        and     [ebx + device.cur_tx], NUM_TX_DESC-1
 
; update stats
        mov     ecx, [buffersize]
        inc     [ebx + device.packets_tx]
        add     dword [ebx + device.bytes_tx], ecx
        adc     dword [ebx + device.bytes_tx + 4], 0
 
        DEBUGF  1,"Transmit OK\n"
        popf
        xor     eax, eax
        ret
 
  .fail:
        DEBUGF  2,"Transmit failed\n"
        invoke  KernelFree, [bufferptr]
        popf
        or      eax, -1
        ret
 
endp
 
 
;***************************************************************************
;
; int_handler
;
; handles received IRQs, which signal received packets
;
; Currently only supports one descriptor per packet, if packet is fragmented
; between multiple descriptors you will lose part of the packet
;
;***************************************************************************
 
align 4
int_handler:
 
        push    ebx esi edi
 
        DEBUGF  1,"INT\n"
 
; find pointer of device which made IRQ occur
 
        mov     ecx, [devices]
        test    ecx, ecx
        jz      .nothing
        mov     esi, device_list
  .nextdevice:
        mov     ebx, [esi]
 
        set_io  [ebx + device.io_addr], 0
        set_io  [ebx + device.io_addr], isr
        in      eax, dx                                 ; note that this clears all interrupts
        test    ax, IE
        jnz     .got_it
  .continue:
        add     esi, 4
        dec     ecx
        jnz     .nextdevice
  .nothing:
        pop     edi esi ebx
        xor     eax, eax
 
        ret
 
  .got_it:
 
        DEBUGF  1,"Device: %x Status: %x\n", ebx, ax
 
        test    ax, RxOK
        jz      .no_rx_
 
        push    ax
 
  .rx_loop:
 
;-----------
; Get Status
        movzx   eax, [ebx + device.cur_rx]              ; find current descriptor
        shl     eax, 4                                  ; * 16
        mov     ecx, dword[ebx + device.rxd + eax + 4]  ; get receive status
 
;-------------------------------------------
; Check RX_Status to see if packet is waiting
        test    ecx, 0x80000000
        jz      .no_rx
 
;----------------------------------------------
; There is a packet waiting check it for errors
        test    ecx, 0x67C0000                          ; see if there are any errors
        jnz     .error_status
 
;---------------------
; Check size of packet
        and     ecx, DSIZE                              ; get packet size minus CRC
        sub     ecx, CRC_SIZE                           ; make sure packet contains data
        jbe     .error_size
 
; update statistics
        inc     dword [ebx + device.packets_rx]
        add     dword [ebx + device.bytes_rx], ecx
        adc     dword [ebx + device.bytes_rx + 4], 0
 
        push    ebx
        push    .return
        push    ecx                                     ; packet size
        pushd   [ebx + device.rxd + eax + 12]           ; packet ptr
        DEBUGF  1, "Packet received OK\n"
        jmp     [Eth_input]
  .return:
        pop     ebx
 
; Reset status, allow ethernet card access to descriptor
        invoke  KernelAlloc, RX_BUFF_SZ
        test    eax, eax
        jz      .fail
        movzx   ecx, [ebx + device.cur_rx]
        shl     ecx, 4                                  ; *16
        lea     ecx, [ebx + device.rxd + ecx]
        mov     dword [ecx + 12], eax
        invoke  GetPhysAddr
        mov     dword [ecx + 8], eax
        mov     dword [ecx + 4], RX_BUFF_SZ
 
        inc     [ebx + device.cur_rx]                   ; get next descriptor
        and     [ebx + device.cur_rx], NUM_RX_DESC-1    ; only 4 descriptors 0-3
 
        jmp     .rx_loop
 
  .no_rx:
        set_io  [ebx + device.io_addr], 0
        set_io  [ebx + device.io_addr], cr
        in      eax, dx
        or      eax, RxENA                              ; Re-Enable the Receive state machine
        out     dx, eax
 
        pop     ax
 
  .no_rx_:
        test    ax, TxOK
        jz      .no_tx
 
        DEBUGF  1, "TX ok!\n"
 
  .tx_loop:
        movzx   ecx, [ebx + device.last_tx]
        shl     ecx, 4                  ; *16
        lea     ecx, [ebx + device.txd + ecx]
 
        test    dword[ecx + 4], 0x80000000              ; card owns descr
        jnz     .no_tx
        cmp     dword[ecx + 12], 0
        je      .no_tx
 
        DEBUGF  1, "Freeing packet = %x\n", [ecx + 12]:8
        push    dword[ecx + 12]
        mov     dword[ecx + 12], 0
        invoke  KernelFree
 
        inc     [ebx + device.last_tx]
        and     [ebx + device.last_tx], NUM_TX_DESC-1
        jmp     .tx_loop
 
  .no_tx:
  .fail:
        pop     edi esi ebx
        xor     eax, eax
        inc     eax
 
        ret
 
        ret
 
  .error_status:
        DEBUGF  2, "Packet error: %x\n", ecx
        jmp     .fail
 
  .error_size:
        DEBUGF  2, "Packet too large/small\n"
        jmp     .fail
 
 
 
 
 
; End of code
 
data fixups
end data
 
include '../peimport.inc'
 
my_service      db 'SIS900',0                           ; max 16 chars include zero
 
specific_table:
;    dd SIS630A_900_REV, Get_Mac_SIS630A_900_REV, 0
;    dd SIS630E_900_REV, Get_Mac_SIS630E_900_REV, 0
    dd SIS630S_900_REV, Get_Mac_SIS635_900_REV, 0
    dd SIS630EA1_900_REV, Get_Mac_SIS635_900_REV, 0
    dd SIS630ET_900_REV, Get_Mac_SIS635_900_REV, 0      ; SIS630ET_900_REV_SpecialFN
    dd SIS635A_900_REV, Get_Mac_SIS635_900_REV, 0
    dd SIS900_960_REV, SIS960_get_mac_addr, 0
    dd SIS900B_900_REV, SIS900_get_mac_addr, 0
    dd 0                                                ; end of list
 
include_debug_strings                                   ; All data wich FDO uses will be included here
 
align 4
devices         dd 0
device_list     rd MAX_DEVICES                          ; This list contains all pointers to device structures the driver is handling
>

Rev 5006	Rev 5074
1	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;	1	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2	;; ;;	2	;; ;;
3	;; Copyright (C) KolibriOS team 2004-2014. All rights reserved. ;;	3	;; Copyright (C) KolibriOS team 2004-2014. All rights reserved. ;;
4	;; Distributed under terms of the GNU General Public License ;;	4	;; Distributed under terms of the GNU General Public License ;;
5	;; ;;	5	;; ;;
6	;; Ethernet driver for KolibriOS ;;	6	;; Ethernet driver for KolibriOS ;;
7	;; This is an adaptation of MenuetOS driver with minimal changes. ;;	7	;; This is an adaptation of MenuetOS driver with minimal changes. ;;
8	;; Changes were made by CleverMouse. Original copyright follows. ;;	8	;; Changes were made by CleverMouse. Original copyright follows. ;;
9	;; ;;	9	;; ;;
10	;; This driver is based on the SIS900 driver from ;;	10	;; This driver is based on the SIS900 driver from ;;
11	;; the etherboot 5.0.6 project. The copyright statement is ;;	11	;; the etherboot 5.0.6 project. The copyright statement is ;;
12	;; ;;	12	;; ;;
13	;; GNU GENERAL PUBLIC LICENSE ;;	13	;; GNU GENERAL PUBLIC LICENSE ;;
14	;; Version 2, June 1991 ;;	14	;; Version 2, June 1991 ;;
15	;; ;;	15	;; ;;
16	;; remaining parts Copyright 2004 Jason Delozier, ;;	16	;; remaining parts Copyright 2004 Jason Delozier, ;;
17	;; cordata51@hotmail.com ;;	17	;; cordata51@hotmail.com ;;
18	;; ;;	18	;; ;;
19	;; See file COPYING for details ;;	19	;; See file COPYING for details ;;
20	;; ;;	20	;; ;;
21	;; Updates: ;;	21	;; Updates: ;;
22	;; Revision Look up table and SIS635 Mac Address by Jarek Pelczar ;;	22	;; Revision Look up table and SIS635 Mac Address by Jarek Pelczar ;;
23	;; ;;	23	;; ;;
24	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;	24	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
25		25
26	format PE DLL native	26	format PE DLL native
27	entry START	27	entry START
28		28
29	CURRENT_API = 0x0200	29	CURRENT_API = 0x0200
30	COMPATIBLE_API = 0x0100	30	COMPATIBLE_API = 0x0100
31	API_VERSION = (COMPATIBLE_API shl 16) + CURRENT_API	31	API_VERSION = (COMPATIBLE_API shl 16) + CURRENT_API
32		32
33	NUM_RX_DESC = 4 ; Number of RX descriptors	33	NUM_RX_DESC = 4 ; Number of RX descriptors
34	NUM_TX_DESC = 4 ; Number of TX descriptors	34	NUM_TX_DESC = 4 ; Number of TX descriptors
35	RX_BUFF_SZ = 1520 ; Buffer size for each Rx buffer	35	RX_BUFF_SZ = 1520 ; Buffer size for each Rx buffer
36		36
37	MAX_DEVICES = 16	37	MAX_DEVICES = 16
38		38
39	__DEBUG__ = 1	39	__DEBUG__ = 1
40	__DEBUG_LEVEL__ = 2 ; 1 = verbose, 2 = errors only	40	__DEBUG_LEVEL__ = 2 ; 1 = verbose, 2 = errors only
41		41
42	DSIZE = 0x00000fff	42	DSIZE = 0x00000fff
43	CRC_SIZE = 4	43	CRC_SIZE = 4
44	RFADDR_shift = 16	44	RFADDR_shift = 16
45		45
46	; If you are having problems sending/receiving packet try changing the	46	; If you are having problems sending/receiving packet try changing the
47	; Max DMA Burst, Possible settings are as follows:	47	; Max DMA Burst, Possible settings are as follows:
48	;	48	;
49	; 0x00000000 = 512 bytes	49	; 0x00000000 = 512 bytes
50	; 0x00100000 = 4 bytes	50	; 0x00100000 = 4 bytes
51	; 0x00200000 = 8 bytes	51	; 0x00200000 = 8 bytes
52	; 0x00300000 = 16 bytes	52	; 0x00300000 = 16 bytes
53	; 0x00400000 = 32 bytes	53	; 0x00400000 = 32 bytes
54	; 0x00500000 = 64 bytes	54	; 0x00500000 = 64 bytes
55	; 0x00600000 = 128 bytes	55	; 0x00600000 = 128 bytes
56	; 0x00700000 = 256 bytes	56	; 0x00700000 = 256 bytes
57		57
58	RX_DMA = 0x00600000	58	RX_DMA = 0x00600000
59	TX_DMA = 0x00600000	59	TX_DMA = 0x00600000
60		60
61	;-------------------------------------------------------------------------------------------------	61	;-------------------------------------------------------------------------------------------------
62	; Symbolic offsets to registers.	62	; Symbolic offsets to registers.
63	cr = 0x0 ; Command Register	63	cr = 0x0 ; Command Register
64	cfg = 0x4 ; Configuration Register	64	cfg = 0x4 ; Configuration Register
65	mear = 0x8 ; EEPROM Access Register	65	mear = 0x8 ; EEPROM Access Register
66	ptscr = 0xc ; PCI Test Control Register	66	ptscr = 0xc ; PCI Test Control Register
67	isr = 0x10 ; Interrupt Status Register	67	isr = 0x10 ; Interrupt Status Register
68	imr = 0x14 ; Interrupt Mask Register	68	imr = 0x14 ; Interrupt Mask Register
69	ier = 0x18 ; Interrupt Enable Register	69	ier = 0x18 ; Interrupt Enable Register
70	epar = 0x18 ; Enhanced PHY Access Register	70	epar = 0x18 ; Enhanced PHY Access Register
71	txdp = 0x20 ; Transmit Descriptor Pointer Register	71	txdp = 0x20 ; Transmit Descriptor Pointer Register
72	txcfg = 0x24 ; Transmit Configuration Register	72	txcfg = 0x24 ; Transmit Configuration Register
73	rxdp = 0x30 ; Receive Descriptor Pointer Register	73	rxdp = 0x30 ; Receive Descriptor Pointer Register
74	rxcfg = 0x34 ; Receive Configuration Register	74	rxcfg = 0x34 ; Receive Configuration Register
75	flctrl = 0x38 ; Flow Control Register	75	flctrl = 0x38 ; Flow Control Register
76	rxlen = 0x3c ; Receive Packet Length Register	76	rxlen = 0x3c ; Receive Packet Length Register
77	rfcr = 0x48 ; Receive Filter Control Register	77	rfcr = 0x48 ; Receive Filter Control Register
78	rfdr = 0x4C ; Receive Filter Data Register	78	rfdr = 0x4C ; Receive Filter Data Register
79	pmctrl = 0xB0 ; Power Management Control Register	79	pmctrl = 0xB0 ; Power Management Control Register
80	pmer = 0xB4 ; Power Management Wake-up Event Register	80	pmer = 0xB4 ; Power Management Wake-up Event Register
81		81
82	; Command Register Bits	82	; Command Register Bits
83	RELOAD = 0x00000400	83	RELOAD = 0x00000400
84	ACCESSMODE = 0x00000200	84	ACCESSMODE = 0x00000200
85	RESET = 0x00000100	85	RESET = 0x00000100
86	SWI = 0x00000080	86	SWI = 0x00000080
87	RxRESET = 0x00000020	87	RxRESET = 0x00000020
88	TxRESET = 0x00000010	88	TxRESET = 0x00000010
89	RxDIS = 0x00000008	89	RxDIS = 0x00000008
90	RxENA = 0x00000004	90	RxENA = 0x00000004
91	TxDIS = 0x00000002	91	TxDIS = 0x00000002
92	TxENA = 0x00000001	92	TxENA = 0x00000001
93		93
94	; Configuration Register Bits	94	; Configuration Register Bits
95	DESCRFMT = 0x00000100 ; 7016 specific	95	DESCRFMT = 0x00000100 ; 7016 specific
96	REQALG = 0x00000080	96	REQALG = 0x00000080
97	SB = 0x00000040	97	SB = 0x00000040
98	POW = 0x00000020	98	POW = 0x00000020
99	EXD = 0x00000010	99	EXD = 0x00000010
100	PESEL = 0x00000008	100	PESEL = 0x00000008
101	LPM = 0x00000004	101	LPM = 0x00000004
102	BEM = 0x00000001	102	BEM = 0x00000001
103	RND_CNT = 0x00000400	103	RND_CNT = 0x00000400
104	FAIR_BACKOFF = 0x00000200	104	FAIR_BACKOFF = 0x00000200
105	EDB_MASTER_EN = 0x00002000	105	EDB_MASTER_EN = 0x00002000
106		106
107	; Eeprom Access Reigster Bits	107	; Eeprom Access Reigster Bits
108	MDC = 0x00000040	108	MDC = 0x00000040
109	MDDIR = 0x00000020	109	MDDIR = 0x00000020
110	MDIO = 0x00000010 ; 7016 specific	110	MDIO = 0x00000010 ; 7016 specific
111	EECS = 0x00000008	111	EECS = 0x00000008
112	EECLK = 0x00000004	112	EECLK = 0x00000004
113	EEDO = 0x00000002	113	EEDO = 0x00000002
114	EEDI = 0x00000001	114	EEDI = 0x00000001
115		115
116	; TX Configuration Register Bits	116	; TX Configuration Register Bits
117	ATP = 0x10000000 ; Automatic Transmit Padding	117	ATP = 0x10000000 ; Automatic Transmit Padding
118	MLB = 0x20000000 ; Mac Loopback Enable	118	MLB = 0x20000000 ; Mac Loopback Enable
119	HBI = 0x40000000 ; HeartBeat Ignore (Req for full-dup)	119	HBI = 0x40000000 ; HeartBeat Ignore (Req for full-dup)
120	CSI = 0x80000000 ; CarrierSenseIgnore (Req for full-du	120	CSI = 0x80000000 ; CarrierSenseIgnore (Req for full-du
121		121
122	; RX Configuration Register Bits	122	; RX Configuration Register Bits
123	AJAB = 0x08000000 ;	123	AJAB = 0x08000000 ;
124	ATX = 0x10000000 ; Accept Transmit Packets	124	ATX = 0x10000000 ; Accept Transmit Packets
125	ARP = 0x40000000 ; accept runt packets (<64bytes)	125	ARP = 0x40000000 ; accept runt packets (<64bytes)
126	AEP = 0x80000000 ; accept error packets	126	AEP = 0x80000000 ; accept error packets
127		127
128	; Interrupt Register Bits	128	; Interrupt Register Bits
129	WKEVT = 0x10000000	129	WKEVT = 0x10000000
130	TxPAUSEEND = 0x08000000	130	TxPAUSEEND = 0x08000000
131	TxPAUSE = 0x04000000	131	TxPAUSE = 0x04000000
132	TxRCMP = 0x02000000 ; Transmit Reset Complete	132	TxRCMP = 0x02000000 ; Transmit Reset Complete
133	RxRCMP = 0x01000000 ; Receive Reset Complete	133	RxRCMP = 0x01000000 ; Receive Reset Complete
134	DPERR = 0x00800000	134	DPERR = 0x00800000
135	SSERR = 0x00400000	135	SSERR = 0x00400000
136	RMABT = 0x00200000	136	RMABT = 0x00200000
137	RTABT = 0x00100000	137	RTABT = 0x00100000
138	RxSOVR = 0x00010000	138	RxSOVR = 0x00010000
139	HIBERR = 0x00008000	139	HIBERR = 0x00008000
140	SWINT = 0x00001000	140	SWINT = 0x00001000
141	MIBINT = 0x00000800	141	MIBINT = 0x00000800
142	TxURN = 0x00000400	142	TxURN = 0x00000400
143	TxIDLE = 0x00000200	143	TxIDLE = 0x00000200
144	TxERR = 0x00000100	144	TxERR = 0x00000100
145	TxDESC = 0x00000080	145	TxDESC = 0x00000080
146	TxOK = 0x00000040	146	TxOK = 0x00000040
147	RxORN = 0x00000020	147	RxORN = 0x00000020
148	RxIDLE = 0x00000010	148	RxIDLE = 0x00000010
149	RxEARLY = 0x00000008	149	RxEARLY = 0x00000008
150	RxERR = 0x00000004	150	RxERR = 0x00000004
151	RxDESC = 0x00000002	151	RxDESC = 0x00000002
152	RxOK = 0x00000001	152	RxOK = 0x00000001
153		153
154	; Interrupt Enable Register Bits	154	; Interrupt Enable Register Bits
155	IE = RxOK + TxOK	155	IE = RxOK + TxOK
156		156
157	; Revision ID	157	; Revision ID
158	SIS900B_900_REV = 0x03	158	SIS900B_900_REV = 0x03
159	SIS630A_900_REV = 0x80	159	SIS630A_900_REV = 0x80
160	SIS630E_900_REV = 0x81	160	SIS630E_900_REV = 0x81
161	SIS630S_900_REV = 0x82	161	SIS630S_900_REV = 0x82
162	SIS630EA1_900_REV = 0x83	162	SIS630EA1_900_REV = 0x83
163	SIS630ET_900_REV = 0x84	163	SIS630ET_900_REV = 0x84
164	SIS635A_900_REV = 0x90	164	SIS635A_900_REV = 0x90
165	SIS900_960_REV = 0x91	165	SIS900_960_REV = 0x91
166		166
167	; Receive Filter Control Register Bits	167	; Receive Filter Control Register Bits
168	RFEN = 0x80000000 ; enable	168	RFEN = 0x80000000 ; enable
169	RFAAB = 0x40000000 ; accept all broadcasts	169	RFAAB = 0x40000000 ; accept all broadcasts
170	RFAAM = 0x20000000 ; accept all multicasts	170	RFAAM = 0x20000000 ; accept all multicasts
171	RFAAP = 0x10000000 ; accept all packets	171	RFAAP = 0x10000000 ; accept all packets
172		172
173	; Reveive Filter Data Mask	173	; Reveive Filter Data Mask
174	RFDAT = 0x0000FFFF	174	RFDAT = 0x0000FFFF
175		175
176	; Eeprom Address	176	; Eeprom Address
177	EEPROMSignature = 0x00	177	EEPROMSignature = 0x00
178	EEPROMVendorID = 0x02	178	EEPROMVendorID = 0x02
179	EEPROMDeviceID = 0x03	179	EEPROMDeviceID = 0x03
180	EEPROMMACAddr = 0x08	180	EEPROMMACAddr = 0x08
181	EEPROMChecksum = 0x0b	181	EEPROMChecksum = 0x0b
182		182
183	; The EEPROM commands include the alway-set leading bit.	183	; The EEPROM commands include the alway-set leading bit.
184	EEread = 0x0180	184	EEread = 0x0180
185	EEwrite = 0x0140	185	EEwrite = 0x0140
186	EEerase = 0x01C0	186	EEerase = 0x01C0
187	EEwriteEnable = 0x0130	187	EEwriteEnable = 0x0130
188	EEwriteDisable = 0x0100	188	EEwriteDisable = 0x0100
189	EEeraseAll = 0x0120	189	EEeraseAll = 0x0120
190	EEwriteAll = 0x0110	190	EEwriteAll = 0x0110
191	EEaddrMask = 0x013F	191	EEaddrMask = 0x013F
192	EEcmdShift = 16	192	EEcmdShift = 16
193		193
194	; For SiS962 or SiS963, request the eeprom software access	194	; For SiS962 or SiS963, request the eeprom software access
195	EEREQ = 0x00000400	195	EEREQ = 0x00000400
196	EEDONE = 0x00000200	196	EEDONE = 0x00000200
197	EEGNT = 0x00000100	197	EEGNT = 0x00000100
198		198
199	section '.flat' readable writable executable	199	section '.flat' readable writable executable
200		200
201	include '../proc32.inc'	201	include '../proc32.inc'
202	include '../struct.inc'	202	include '../struct.inc'
203	include '../macros.inc'	203	include '../macros.inc'
204	include '../fdo.inc'	204	include '../fdo.inc'
205	include '../netdrv_pe.inc'	205	include '../netdrv.inc'
206		206
207		207
208	struct device ETH_DEVICE	208	struct device ETH_DEVICE
209		209
210	io_addr dd ?	210	io_addr dd ?
211	pci_bus dd ?	211	pci_bus dd ?
212	pci_dev dd ?	212	pci_dev dd ?
213	irq_line db ?	213	irq_line db ?
214	cur_rx db ?	214	cur_rx db ?
215	cur_tx db ?	215	cur_tx db ?
216	last_tx db ?	216	last_tx db ?
217	pci_revision db ?	217	pci_revision db ?
218	table_entries db ?	218	table_entries db ?
219		219
220	rb 0x100 - ($ and 0xff) ; align 256	220	rb 0x100 - ($ and 0xff) ; align 256
221	txd rd (4 * NUM_TX_DESC)	221	txd rd (4 * NUM_TX_DESC)
222	rxd rd (4 * NUM_RX_DESC)	222	rxd rd (4 * NUM_RX_DESC)
223		223
224	ends	224	ends
225		225
226	macro ee_delay {	226	macro ee_delay {
227	push eax	227	push eax
228	in eax, dx	228	in eax, dx
229	in eax, dx	229	in eax, dx
230	in eax, dx	230	in eax, dx
231	in eax, dx	231	in eax, dx
232	in eax, dx	232	in eax, dx
233	in eax, dx	233	in eax, dx
234	in eax, dx	234	in eax, dx
235	in eax, dx	235	in eax, dx
236	in eax, dx	236	in eax, dx
237	in eax, dx	237	in eax, dx
238	pop eax	238	pop eax
239	}	239	}
240		240
241	;;;;;;;;;;;;;;;;;;;;;;;;;;;;	241	;;;;;;;;;;;;;;;;;;;;;;;;;;;;
242	;; ;;	242	;; ;;
243	;; proc START ;;	243	;; proc START ;;
244	;; ;;	244	;; ;;
245	;; (standard driver proc) ;;	245	;; (standard driver proc) ;;
246	;;;;;;;;;;;;;;;;;;;;;;;;;;;;	246	;;;;;;;;;;;;;;;;;;;;;;;;;;;;
247		247
248	; Driver entry point - register our service when the driver is loading.	248	; Driver entry point - register our service when the driver is loading.
249	; TODO: add needed operations when unloading	249	; TODO: add needed operations when unloading
250		250
251	proc START c, reason:dword, cmdline:dword	251	proc START c, reason:dword, cmdline:dword
252		252
253	cmp [reason], DRV_ENTRY	253	cmp [reason], DRV_ENTRY
254	jne .fail	254	jne .fail
255		255
256	DEBUGF 2,"Loading driver\n"	256	DEBUGF 2,"Loading driver\n"
257	invoke RegService, my_service, service_proc	257	invoke RegService, my_service, service_proc
258	ret	258	ret
259		259
260	.fail:	260	.fail:
261	xor eax, eax	261	xor eax, eax
262	ret	262	ret
263		263
264	endp	264	endp
265		265
266		266
267	;;;;;;;;;;;;;;;;;;;;;;;;;;;;	267	;;;;;;;;;;;;;;;;;;;;;;;;;;;;
268	;; ;;	268	;; ;;
269	;; proc SERVICE_PROC ;;	269	;; proc SERVICE_PROC ;;
270	;; ;;	270	;; ;;
271	;; (standard driver proc) ;;	271	;; (standard driver proc) ;;
272	;;;;;;;;;;;;;;;;;;;;;;;;;;;;	272	;;;;;;;;;;;;;;;;;;;;;;;;;;;;
273		273
274	; Service procedure for the driver - handle all I/O requests for the driver.	274	; Service procedure for the driver - handle all I/O requests for the driver.
275	; Currently handled requests are: SRV_GETVERSION = 0 and SRV_HOOK = 1.	275	; Currently handled requests are: SRV_GETVERSION = 0 and SRV_HOOK = 1.
276	service_proc:	276	service_proc:
277	; 1. Get parameter from the stack: [esp+4] is the first parameter,	277	; 1. Get parameter from the stack: [esp+4] is the first parameter,
278	; pointer to IOCTL structure.	278	; pointer to IOCTL structure.
279	mov edx, [esp+4] ; edx -> IOCTL	279	mov edx, [esp+4] ; edx -> IOCTL
280	; 2. Get request code and select a handler for the code.	280	; 2. Get request code and select a handler for the code.
281	mov eax, [edx + IOCTL.io_code]	281	mov eax, [edx + IOCTL.io_code]
282	test eax, eax ; check for SRV_GETVERSION	282	test eax, eax ; check for SRV_GETVERSION
283	jnz @f	283	jnz @f
284	; 3. This is SRV_GETVERSION request, no input, 4 bytes output, API_VERSION.	284	; 3. This is SRV_GETVERSION request, no input, 4 bytes output, API_VERSION.
285	; 3a. Output size must be at least 4 bytes.	285	; 3a. Output size must be at least 4 bytes.
286	cmp [edx + IOCTL.out_size], 4	286	cmp [edx + IOCTL.out_size], 4
287	jb .fail	287	jb .fail
288	; 3b. Write result to the output buffer.	288	; 3b. Write result to the output buffer.
289	mov eax, [edx + IOCTL.output]	289	mov eax, [edx + IOCTL.output]
290	mov [eax], dword API_VERSION	290	mov [eax], dword API_VERSION
291	; 3c. Return success.	291	; 3c. Return success.
292	xor eax, eax	292	xor eax, eax
293	ret 4	293	ret 4
294	@@:	294	@@:
295	dec eax ; check for SRV_HOOK	295	dec eax ; check for SRV_HOOK
296	jnz .fail	296	jnz .fail
297	; 4. This is SRV_HOOK request, input defines the device to hook, no output.	297	; 4. This is SRV_HOOK request, input defines the device to hook, no output.
298	; 4a. The driver works only with PCI devices,	298	; 4a. The driver works only with PCI devices,
299	; so input must be at least 3 bytes long.	299	; so input must be at least 3 bytes long.
300	cmp [edx + IOCTL.inp_size], 3	300	cmp [edx + IOCTL.inp_size], 3
301	jb .fail	301	jb .fail
302	; 4b. First byte of input is bus type, 1 stands for PCI.	302	; 4b. First byte of input is bus type, 1 stands for PCI.
303	mov eax, [edx + IOCTL.input]	303	mov eax, [edx + IOCTL.input]
304	cmp byte [eax], 1	304	cmp byte [eax], 1
305	jne .fail	305	jne .fail
306	; 4c. Second and third bytes of the input define the device: bus and dev.	306	; 4c. Second and third bytes of the input define the device: bus and dev.
307	; Word in bx holds both bytes.	307	; Word in bx holds both bytes.
308	mov bx, [eax+1]	308	mov bx, [eax+1]
309	; 4d. Check if the device was already hooked,	309	; 4d. Check if the device was already hooked,
310	; scan through the list of known devices.	310	; scan through the list of known devices.
311	; check if the device is already listed	311	; check if the device is already listed
312	mov esi, device_list	312	mov esi, device_list
313	mov ecx, [devices]	313	mov ecx, [devices]
314	test ecx, ecx	314	test ecx, ecx
315	jz .firstdevice	315	jz .firstdevice
316		316
317	; mov eax, [edx + IOCTL.input] ; get the pci bus and device numbers	317	; mov eax, [edx + IOCTL.input] ; get the pci bus and device numbers
318	mov ax, [eax+1] ;	318	mov ax, [eax+1] ;
319	.nextdevice:	319	.nextdevice:
320	mov ebx, [esi]	320	mov ebx, [esi]
321	cmp al, byte[ebx + device.pci_bus]	321	cmp al, byte[ebx + device.pci_bus]
322	jne @f	322	jne @f
323	cmp ah, byte[ebx + device.pci_dev]	323	cmp ah, byte[ebx + device.pci_dev]
324	je .find_devicenum ; Device is already loaded, let's find it's device number	324	je .find_devicenum ; Device is already loaded, let's find it's device number
325	@@:	325	@@:
326	add esi, 4	326	add esi, 4
327	loop .nextdevice	327	loop .nextdevice
328	; 4e. This device doesn't have its own eth_device structure yet, let's create one	328	; 4e. This device doesn't have its own eth_device structure yet, let's create one
329	.firstdevice:	329	.firstdevice:
330	; 4f. Check that we have place for new device.	330	; 4f. Check that we have place for new device.
331	cmp [devices], MAX_DEVICES	331	cmp [devices], MAX_DEVICES
332	jae .fail	332	jae .fail
333	; 4g. Allocate memory for device descriptor and receive+transmit buffers.	333	; 4g. Allocate memory for device descriptor and receive+transmit buffers.
334	; 4h. Zero the structure.	334	; 4h. Zero the structure.
335	allocate_and_clear ebx, sizeof.device, .fail	335	allocate_and_clear ebx, sizeof.device, .fail
336	; 4i. Save PCI coordinates	336	; 4i. Save PCI coordinates
337	mov eax, [edx + IOCTL.input]	337	mov eax, [edx + IOCTL.input]
338	movzx ecx, byte[eax+1]	338	movzx ecx, byte[eax+1]
339	mov [ebx + device.pci_bus], ecx	339	mov [ebx + device.pci_bus], ecx
340	movzx ecx, byte[eax+2]	340	movzx ecx, byte[eax+2]
341	mov [ebx + device.pci_dev], ecx	341	mov [ebx + device.pci_dev], ecx
342	; 4j. Fill in the direct call addresses into the struct.	342	; 4j. Fill in the direct call addresses into the struct.
343	mov [ebx + device.reset], reset	343	mov [ebx + device.reset], reset
344	mov [ebx + device.transmit], transmit	344	mov [ebx + device.transmit], transmit
345	mov [ebx + device.unload], unload	345	mov [ebx + device.unload], unload
346	mov [ebx + device.name], my_service	346	mov [ebx + device.name], my_service
347		347
348	; 4k. Now, it's time to find the base io addres of the PCI device	348	; 4k. Now, it's time to find the base io addres of the PCI device
349	; TODO: implement check if bus and dev exist on this machine	349	; TODO: implement check if bus and dev exist on this machine
350		350
351	; Now, it's time to find the base io addres of the PCI device	351	; Now, it's time to find the base io addres of the PCI device
352	stdcall PCI_find_io, [ebx + device.pci_bus], [ebx + device.pci_dev]	352	stdcall PCI_find_io, [ebx + device.pci_bus], [ebx + device.pci_dev]
353	mov [ebx + device.io_addr], eax	353	mov [ebx + device.io_addr], eax
354		354
355	; We've found the io address, find IRQ now	355	; We've found the io address, find IRQ now
356		356
357	invoke PciRead8, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.interrupt_line	357	invoke PciRead8, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.interrupt_line
358	mov [ebx + device.irq_line], al	358	mov [ebx + device.irq_line], al
359		359
360	; 4m. Add new device to the list (required for int_handler).	360	; 4m. Add new device to the list (required for int_handler).
361	mov eax, [devices]	361	mov eax, [devices]
362	mov [device_list+4*eax], ebx	362	mov [device_list+4*eax], ebx
363	inc [devices]	363	inc [devices]
364		364
365	; 4m. Ok, the eth_device structure is ready, let's probe the device	365	; 4m. Ok, the eth_device structure is ready, let's probe the device
366	call probe	366	call probe
367	test eax, eax	367	test eax, eax
368	jnz .destroy	368	jnz .destroy
369	; 4n. If device was successfully initialized, register it for the kernel.	369	; 4n. If device was successfully initialized, register it for the kernel.
370		370
371	mov [ebx + device.type], NET_TYPE_ETH	371	mov [ebx + device.type], NET_TYPE_ETH
372	invoke NetRegDev	372	invoke NetRegDev
373		373
374	cmp eax, -1	374	cmp eax, -1
375	je .destroy	375	je .destroy
376		376
377	ret 4	377	ret 4
378		378
379	; 5. If the device was already loaded, find the device number and return it in eax	379	; 5. If the device was already loaded, find the device number and return it in eax
380		380
381	.find_devicenum:	381	.find_devicenum:
382	invoke NetPtrToNum ; This kernel procedure converts a pointer to device struct in ebx	382	invoke NetPtrToNum ; This kernel procedure converts a pointer to device struct in ebx
383	; into a device number in edi	383	; into a device number in edi
384	mov eax, edi ; Application wants it in eax instead	384	mov eax, edi ; Application wants it in eax instead
385	ret 4	385	ret 4
386		386
387	; If an error occured, remove all allocated data and exit (returning -1 in eax)	387	; If an error occured, remove all allocated data and exit (returning -1 in eax)
388		388
389	.destroy:	389	.destroy:
390	dec [devices]	390	dec [devices]
391	; todo: reset device into virgin state	391	; todo: reset device into virgin state
392		392
393	.err:	393	.err:
394	invoke KernelFree, ebx	394	invoke KernelFree, ebx
395		395
396	.fail:	396	.fail:
397	xor eax, eax	397	xor eax, eax
398	ret 4	398	ret 4
399		399
400		400
401	;;/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\;;	401	;;/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\;;
402	;; ;;	402	;; ;;
403	;; Actual Hardware dependent code starts here ;;	403	;; Actual Hardware dependent code starts here ;;
404	;; ;;	404	;; ;;
405	;;/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\;;	405	;;/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\;;
406		406
407	unload:	407	unload:
408	; TODO: (in this particular order)	408	; TODO: (in this particular order)
409	;	409	;
410	; - Stop the device	410	; - Stop the device
411	; - Detach int handler	411	; - Detach int handler
412	; - Remove device from local list	412	; - Remove device from local list
413	; - call unregister function in kernel	413	; - call unregister function in kernel
414	; - Remove all allocated structures and buffers the card used	414	; - Remove all allocated structures and buffers the card used
415		415
416	or eax, -1	416	or eax, -1
417		417
418	ret	418	ret
419		419
420	;***************************************************************************	420	;***************************************************************************
421	;	421	;
422	; probe	422	; probe
423	;	423	;
424	; checks the card and enables it	424	; checks the card and enables it
425	;	425	;
426	; TODO: probe mii transceivers	426	; TODO: probe mii transceivers
427	;	427	;
428	;***************************************************************************	428	;***************************************************************************
429	align 4	429	align 4
430	probe:	430	probe:
431	DEBUGF 1, "Probe\n"	431	DEBUGF 1, "Probe\n"
432		432
433	; wake up device	433	; wake up device
434	; TODO: check capabilities pointer instead of using hardcoded offset.	434	; TODO: check capabilities pointer instead of using hardcoded offset.
435	invoke PciWrite8, [ebx + device.pci_bus], [ebx + device.pci_dev], 0x40, 0	435	invoke PciWrite8, [ebx + device.pci_bus], [ebx + device.pci_dev], 0x40, 0
436		436
437	; Make the device a bus master	437	; Make the device a bus master
438	invoke PciRead32, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.command	438	invoke PciRead32, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.command
439	or al, PCI_CMD_MASTER	439	or al, PCI_CMD_MASTER
440	invoke PciWrite32, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.command, eax	440	invoke PciWrite32, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.command, eax
441		441
442	; Adjust PCI latency to be at least 64	442	; Adjust PCI latency to be at least 64
443	invoke PciRead8, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.max_latency	443	invoke PciRead8, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.max_latency
444	cmp al, 64	444	cmp al, 64
445	jae @f	445	jae @f
446	mov al, 64	446	mov al, 64
447	invoke PciWrite8, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.max_latency, eax	447	invoke PciWrite8, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.max_latency, eax
448	@@:	448	@@:
449		449
450	; Get Card Revision	450	; Get Card Revision
451	invoke PciRead8, [ebx + device.pci_bus], [ebx + device.pci_dev], 0x08	451	invoke PciRead8, [ebx + device.pci_bus], [ebx + device.pci_dev], 0x08
452	mov [ebx + device.pci_revision], al ; save the revision for later use	452	mov [ebx + device.pci_revision], al ; save the revision for later use
453		453
454	; Look up through the specific_table	454	; Look up through the specific_table
455	mov esi, specific_table	455	mov esi, specific_table
456	.tableloop:	456	.tableloop:
457	cmp dword[esi], 0 ; Check if we reached end of the list	457	cmp dword[esi], 0 ; Check if we reached end of the list
458	je .notsupported	458	je .notsupported
459	cmp al, [esi] ; Check if revision is OK	459	cmp al, [esi] ; Check if revision is OK
460	je .ok	460	je .ok
461	add esi, 12 ; Advance to next entry	461	add esi, 12 ; Advance to next entry
462	jmp .tableloop	462	jmp .tableloop
463	.ok:	463	.ok:
464	call dword[esi + 4] ; "get MAC" function	464	call dword[esi + 4] ; "get MAC" function
465		465
466	; Set table entries	466	; Set table entries
467	mov [ebx + device.table_entries], 16	467	mov [ebx + device.table_entries], 16
468	cmp [ebx + device.pci_revision], SIS635A_900_REV	468	cmp [ebx + device.pci_revision], SIS635A_900_REV
469	jae @f	469	jae @f
470	cmp [ebx + device.pci_revision], SIS900B_900_REV	470	cmp [ebx + device.pci_revision], SIS900B_900_REV
471	je @f	471	je @f
472	mov [ebx + device.table_entries], 8	472	mov [ebx + device.table_entries], 8
473	@@:	473	@@:
474		474
475	; TODO: Probe for mii transceiver	475	; TODO: Probe for mii transceiver
476	jmp reset	476	jmp reset
477		477
478	.notsupported:	478	.notsupported:
479	DEBUGF 2, "Device not supported\n"	479	DEBUGF 2, "Device not supported\n"
480	or eax, -1	480	or eax, -1
481		481
482	ret	482	ret
483		483
484	reset:	484	reset:
485		485
486	DEBUGF 1, "reset\n"	486	DEBUGF 1, "reset\n"
487		487
488	movzx eax, [ebx + device.irq_line]	488	movzx eax, [ebx + device.irq_line]
489	invoke AttachIntHandler, eax, int_handler, ebx	489	invoke AttachIntHandler, eax, int_handler, ebx
490	test eax, eax	490	test eax, eax
491	jnz @f	491	jnz @f
492	DEBUGF 2,"Could not attach int handler!\n"	492	DEBUGF 2,"Could not attach int handler!\n"
493	or eax, -1	493	or eax, -1
494	ret	494	ret
495	@@:	495	@@:
496		496
497	;--------------------------------------------	497	;--------------------------------------------
498	; Disable Interrupts and reset Receive Filter	498	; Disable Interrupts and reset Receive Filter
499		499
500	set_io [ebx + device.io_addr], 0	500	set_io [ebx + device.io_addr], 0

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(root)/drivers/ethernet/sis900.asm – Rev 5006 → 5074