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1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
2 | ;; ;; |
2 | ;; ;; |
3 | ;; Copyright (C) KolibriOS team 2004-2015. All rights reserved. ;; |
3 | ;; Copyright (C) KolibriOS team 2004-2018. All rights reserved. ;; |
4 | ;; Distributed under terms of the GNU General Public License ;; |
4 | ;; Distributed under terms of the GNU General Public License ;; |
5 | ;; ;; |
5 | ;; ;; |
6 | ;; FORCEDETH.INC ;; |
6 | ;; FORCEDETH.INC ;; |
7 | ;; ;; |
7 | ;; ;; |
8 | ;; Ethernet driver for Kolibri OS ;; |
8 | ;; Ethernet driver for Kolibri OS ;; |
9 | ;; ;; |
9 | ;; ;; |
10 | ;; Driver for chips of NVIDIA nForce2 ;; |
10 | ;; Driver for chips of NVIDIA nForce2 ;; |
11 | ;; References: ;; |
11 | ;; References: ;; |
12 | ;; forcedeth.c - linux driver (etherboot project) ;; |
12 | ;; forcedeth.c - linux driver (etherboot project) ;; |
13 | ;; ethernet driver template by Mike Hibbett ;; |
13 | ;; ethernet driver template by Mike Hibbett ;; |
14 | ;; ;; |
14 | ;; ;; |
15 | ;; The copyright statement is ;; |
15 | ;; The copyright statement is ;; |
16 | ;; ;; |
16 | ;; ;; |
17 | ;; GNU GENERAL PUBLIC LICENSE ;; |
17 | ;; GNU GENERAL PUBLIC LICENSE ;; |
18 | ;; Version 2, June 1991 ;; |
18 | ;; Version 2, June 1991 ;; |
19 | ;; ;; |
19 | ;; ;; |
20 | ;; Copyright 2008 shurf, ;; |
20 | ;; Copyright 2008 shurf, ;; |
21 | ;; cit.utc@gmail.com ;; |
21 | ;; cit.utc@gmail.com ;; |
22 | ;; ;; |
22 | ;; ;; |
23 | ;; See file COPYING for details ;; |
23 | ;; See file COPYING for details ;; |
24 | ;; ;; |
24 | ;; ;; |
25 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
25 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
26 | 26 | ||
27 | 27 | ||
28 | format PE DLL native |
28 | format PE DLL native |
29 | entry START |
29 | entry START |
30 | 30 | ||
31 | CURRENT_API = 0x0200 |
31 | CURRENT_API = 0x0200 |
32 | COMPATIBLE_API = 0x0100 |
32 | COMPATIBLE_API = 0x0100 |
33 | API_VERSION = (COMPATIBLE_API shl 16) + CURRENT_API |
33 | API_VERSION = (COMPATIBLE_API shl 16) + CURRENT_API |
34 | 34 | ||
35 | MAX_DEVICES = 16 |
35 | MAX_DEVICES = 16 |
36 | 36 | ||
37 | RBLEN = 0 ; Receive buffer size: 0=4K 1=8k 2=16k 3=32k 4=64k |
37 | RBLEN = 0 ; Receive buffer size: 0=4K 1=8k 2=16k 3=32k 4=64k |
38 | ; FIXME: option 1 and 2 may allocate a non contiguous buffer causing data loss! |
38 | ; FIXME: option 1 and 2 may allocate a non contiguous buffer causing data loss! |
39 | 39 | ||
40 | DEBUG = 1 |
40 | DEBUG = 1 |
41 | __DEBUG__ = 1 |
41 | __DEBUG__ = 1 |
42 | __DEBUG_LEVEL__ = 2 |
42 | __DEBUG_LEVEL__ = 2 |
43 | 43 | ||
44 | RX_RING = 4 |
44 | RX_RING = 4 |
45 | TX_RING = 4 |
45 | TX_RING = 4 |
46 | 46 | ||
47 | section '.flat' readable writable executable |
47 | section '.flat' readable writable executable |
48 | 48 | ||
49 | include '../proc32.inc' |
49 | include '../proc32.inc' |
50 | include '../struct.inc' |
50 | include '../struct.inc' |
51 | include '../macros.inc' |
51 | include '../macros.inc' |
52 | include '../fdo.inc' |
52 | include '../fdo.inc' |
53 | include '../netdrv.inc' |
53 | include '../netdrv.inc' |
54 | include '../mii.inc' |
54 | include '../mii.inc' |
55 | 55 | ||
56 | ;************************************************************************** |
56 | ;************************************************************************** |
57 | ; forcedeth Register Definitions |
57 | ; forcedeth Register Definitions |
58 | ;************************************************************************** |
58 | ;************************************************************************** |
59 | 59 | ||
60 | PCI_DEVICE_ID_NVIDIA_NVENET_1 = 0x01c3 |
60 | PCI_DEVICE_ID_NVIDIA_NVENET_1 = 0x01c3 |
61 | PCI_DEVICE_ID_NVIDIA_NVENET_2 = 0x0066 |
61 | PCI_DEVICE_ID_NVIDIA_NVENET_2 = 0x0066 |
62 | PCI_DEVICE_ID_NVIDIA_NVENET_4 = 0x0086 |
62 | PCI_DEVICE_ID_NVIDIA_NVENET_4 = 0x0086 |
63 | PCI_DEVICE_ID_NVIDIA_NVENET_5 = 0x008c |
63 | PCI_DEVICE_ID_NVIDIA_NVENET_5 = 0x008c |
64 | PCI_DEVICE_ID_NVIDIA_NVENET_3 = 0x00d6 |
64 | PCI_DEVICE_ID_NVIDIA_NVENET_3 = 0x00d6 |
65 | PCI_DEVICE_ID_NVIDIA_NVENET_7 = 0x00df |
65 | PCI_DEVICE_ID_NVIDIA_NVENET_7 = 0x00df |
66 | PCI_DEVICE_ID_NVIDIA_NVENET_6 = 0x00e6 |
66 | PCI_DEVICE_ID_NVIDIA_NVENET_6 = 0x00e6 |
67 | PCI_DEVICE_ID_NVIDIA_NVENET_8 = 0x0056 |
67 | PCI_DEVICE_ID_NVIDIA_NVENET_8 = 0x0056 |
68 | PCI_DEVICE_ID_NVIDIA_NVENET_9 = 0x0057 |
68 | PCI_DEVICE_ID_NVIDIA_NVENET_9 = 0x0057 |
69 | PCI_DEVICE_ID_NVIDIA_NVENET_10 = 0x0037 |
69 | PCI_DEVICE_ID_NVIDIA_NVENET_10 = 0x0037 |
70 | PCI_DEVICE_ID_NVIDIA_NVENET_11 = 0x0038 |
70 | PCI_DEVICE_ID_NVIDIA_NVENET_11 = 0x0038 |
71 | PCI_DEVICE_ID_NVIDIA_NVENET_12 = 0x0268 |
71 | PCI_DEVICE_ID_NVIDIA_NVENET_12 = 0x0268 |
72 | PCI_DEVICE_ID_NVIDIA_NVENET_13 = 0x0269 |
72 | PCI_DEVICE_ID_NVIDIA_NVENET_13 = 0x0269 |
73 | PCI_DEVICE_ID_NVIDIA_NVENET_14 = 0x0372 |
73 | PCI_DEVICE_ID_NVIDIA_NVENET_14 = 0x0372 |
74 | PCI_DEVICE_ID_NVIDIA_NVENET_15 = 0x0373 |
74 | PCI_DEVICE_ID_NVIDIA_NVENET_15 = 0x0373 |
75 | 75 | ||
76 | UNKSETUP1_VAL = 0x16070f |
76 | UNKSETUP1_VAL = 0x16070f |
77 | UNKSETUP2_VAL = 0x16 |
77 | UNKSETUP2_VAL = 0x16 |
78 | UNKSETUP3_VAL1 = 0x200010 |
78 | UNKSETUP3_VAL1 = 0x200010 |
79 | UNKSETUP4_VAL = 8 |
79 | UNKSETUP4_VAL = 8 |
80 | UNKSETUP5_BIT31 = (1 shl 31) |
80 | UNKSETUP5_BIT31 = (1 shl 31) |
81 | UNKSETUP6_VAL = 3 |
81 | UNKSETUP6_VAL = 3 |
82 | 82 | ||
83 | TXRXCTL_RXCHECK = 0x0400 |
83 | TXRXCTL_RXCHECK = 0x0400 |
84 | MIISTAT_ERROR = 0x0001 |
84 | MIISTAT_ERROR = 0x0001 |
85 | MIISTAT_MASK = 0x000f |
85 | MIISTAT_MASK = 0x000f |
86 | MIISTAT_MASK2 = 0x000f |
86 | MIISTAT_MASK2 = 0x000f |
87 | MIICTL_INUSE = 0x08000 |
87 | MIICTL_INUSE = 0x08000 |
88 | MIICTL_WRITE = 0x00400 |
88 | MIICTL_WRITE = 0x00400 |
89 | MIICTL_ADDRSHIFT = 5 |
89 | MIICTL_ADDRSHIFT = 5 |
90 | 90 | ||
91 | MIISPEED_BIT8 = (1 shl 8) |
91 | MIISPEED_BIT8 = (1 shl 8) |
92 | MIIDELAY = 5 |
92 | MIIDELAY = 5 |
93 | 93 | ||
94 | IRQ_RX_ERROR = 0x0001 |
94 | IRQ_RX_ERROR = 0x0001 |
95 | IRQ_RX = 0x0002 |
95 | IRQ_RX = 0x0002 |
96 | IRQ_RX_NOBUF = 0x0004 |
96 | IRQ_RX_NOBUF = 0x0004 |
97 | IRQ_TX_ERROR = 0x0008 |
97 | IRQ_TX_ERROR = 0x0008 |
98 | IRQ_TX_OK = 0x0010 |
98 | IRQ_TX_OK = 0x0010 |
99 | IRQ_TIMER = 0x0020 |
99 | IRQ_TIMER = 0x0020 |
100 | IRQ_LINK = 0x0040 |
100 | IRQ_LINK = 0x0040 |
101 | IRQ_RX_FORCED = 0x0080 |
101 | IRQ_RX_FORCED = 0x0080 |
102 | IRQ_TX_FORCED = 0x0100 |
102 | IRQ_TX_FORCED = 0x0100 |
103 | IRQ_RECOVER_ERROR = 0x8200 ; |
103 | IRQ_RECOVER_ERROR = 0x8200 ; |
104 | IRQMASK_WANTED_2 = IRQ_TX_FORCED + IRQ_LINK + IRQ_RX_ERROR + IRQ_RX + IRQ_TX_OK + IRQ_TX_ERROR |
104 | IRQMASK_WANTED_2 = IRQ_TX_FORCED + IRQ_LINK + IRQ_RX_ERROR + IRQ_RX + IRQ_TX_OK + IRQ_TX_ERROR |
105 | 105 | ||
106 | IRQ_RX_ALL = IRQ_RX_ERROR or IRQ_RX or IRQ_RX_NOBUF or IRQ_RX_FORCED |
106 | IRQ_RX_ALL = IRQ_RX_ERROR or IRQ_RX or IRQ_RX_NOBUF or IRQ_RX_FORCED |
107 | IRQ_TX_ALL = IRQ_TX_ERROR or IRQ_TX_OK or IRQ_TX_FORCED |
107 | IRQ_TX_ALL = IRQ_TX_ERROR or IRQ_TX_OK or IRQ_TX_FORCED |
108 | IRQ_OTHER = IRQ_LINK or IRQ_TIMER or IRQ_RECOVER_ERROR |
108 | IRQ_OTHER = IRQ_LINK or IRQ_TIMER or IRQ_RECOVER_ERROR |
109 | 109 | ||
110 | IRQSTAT_MASK = 0x1ff |
110 | IRQSTAT_MASK = 0x1ff |
111 | 111 | ||
112 | TXRXCTL_KICK = 0x0001 |
112 | TXRXCTL_KICK = 0x0001 |
113 | TXRXCTL_BIT1 = 0x0002 |
113 | TXRXCTL_BIT1 = 0x0002 |
114 | TXRXCTL_BIT2 = 0x0004 |
114 | TXRXCTL_BIT2 = 0x0004 |
115 | TXRXCTL_IDLE = 0x0008 |
115 | TXRXCTL_IDLE = 0x0008 |
116 | TXRXCTL_RESET = 0x0010 |
116 | TXRXCTL_RESET = 0x0010 |
117 | TXRXCTL_RXCHECK = 0x0400 |
117 | TXRXCTL_RXCHECK = 0x0400 |
118 | 118 | ||
119 | MCASTADDRA_FORCE = 0x01 |
119 | MCASTADDRA_FORCE = 0x01 |
120 | 120 | ||
121 | MAC_RESET_ASSERT = 0x0F3 |
121 | MAC_RESET_ASSERT = 0x0F3 |
122 | 122 | ||
123 | MISC1_HD = 0x02 |
123 | MISC1_HD = 0x02 |
124 | MISC1_FORCE = 0x3b0f3c |
124 | MISC1_FORCE = 0x3b0f3c |
125 | 125 | ||
126 | PFF_ALWAYS = 0x7F0008 |
126 | PFF_ALWAYS = 0x7F0008 |
127 | PFF_PROMISC = 0x80 |
127 | PFF_PROMISC = 0x80 |
128 | PFF_MYADDR = 0x20 |
128 | PFF_MYADDR = 0x20 |
129 | 129 | ||
130 | OFFLOAD_HOMEPHY = 0x601 |
130 | OFFLOAD_HOMEPHY = 0x601 |
131 | OFFLOAD_NORMAL = 4096 shl RBLEN |
131 | OFFLOAD_NORMAL = 4096 shl RBLEN |
132 | 132 | ||
133 | RNDSEED_MASK = 0x00ff |
133 | RNDSEED_MASK = 0x00ff |
134 | RNDSEED_FORCE = 0x7f00 |
134 | RNDSEED_FORCE = 0x7f00 |
135 | RNDSEED_FORCE2 = 0x2d00 |
135 | RNDSEED_FORCE2 = 0x2d00 |
136 | RNDSEED_FORCE3 = 0x7400 |
136 | RNDSEED_FORCE3 = 0x7400 |
137 | 137 | ||
138 | ; POLL_DEFAULT is the interval length of the timer source on the nic |
138 | ; POLL_DEFAULT is the interval length of the timer source on the nic |
139 | ; POLL_DEFAULT=97 would result in an interval length of 1 ms |
139 | ; POLL_DEFAULT=97 would result in an interval length of 1 ms |
140 | POLL_DEFAULT = 970 |
140 | POLL_DEFAULT = 970 |
141 | 141 | ||
142 | ADAPTCTL_START = 0x02 |
142 | ADAPTCTL_START = 0x02 |
143 | ADAPTCTL_LINKUP = 0x04 |
143 | ADAPTCTL_LINKUP = 0x04 |
144 | ADAPTCTL_PHYVALID = 0x40000 |
144 | ADAPTCTL_PHYVALID = 0x40000 |
145 | ADAPTCTL_RUNNING = 0x100000 |
145 | ADAPTCTL_RUNNING = 0x100000 |
146 | ADAPTCTL_PHYSHIFT = 24 |
146 | ADAPTCTL_PHYSHIFT = 24 |
147 | 147 | ||
148 | WAKEUPFLAGS_VAL = 0x7770 |
148 | WAKEUPFLAGS_VAL = 0x7770 |
149 | 149 | ||
150 | POWERSTATE_POWEREDUP = 0x8000 |
150 | POWERSTATE_POWEREDUP = 0x8000 |
151 | POWERSTATE_VALID = 0x0100 |
151 | POWERSTATE_VALID = 0x0100 |
152 | POWERSTATE_MASK = 0x0003 |
152 | POWERSTATE_MASK = 0x0003 |
153 | POWERSTATE_D0 = 0x0000 |
153 | POWERSTATE_D0 = 0x0000 |
154 | POWERSTATE_D1 = 0x0001 |
154 | POWERSTATE_D1 = 0x0001 |
155 | POWERSTATE_D2 = 0x0002 |
155 | POWERSTATE_D2 = 0x0002 |
156 | POWERSTATE_D3 = 0x0003 |
156 | POWERSTATE_D3 = 0x0003 |
157 | 157 | ||
158 | POWERSTATE2_POWERUP_MASK = 0x0F11 |
158 | POWERSTATE2_POWERUP_MASK = 0x0F11 |
159 | POWERSTATE2_POWERUP_REV_A3= 0x0001 |
159 | POWERSTATE2_POWERUP_REV_A3= 0x0001 |
160 | 160 | ||
161 | RCVCTL_START = 0x01 |
161 | RCVCTL_START = 0x01 |
162 | RCVSTAT_BUSY = 0x01 |
162 | RCVSTAT_BUSY = 0x01 |
163 | 163 | ||
164 | XMITCTL_START = 0x01 |
164 | XMITCTL_START = 0x01 |
165 | 165 | ||
166 | LINKSPEED_FORCE = 0x10000 |
166 | LINKSPEED_FORCE = 0x10000 |
167 | LINKSPEED_10 = 1000 |
167 | LINKSPEED_10 = 1000 |
168 | LINKSPEED_100 = 100 |
168 | LINKSPEED_100 = 100 |
169 | LINKSPEED_1000 = 50 |
169 | LINKSPEED_1000 = 50 |
170 | 170 | ||
171 | RINGSZ_TXSHIFT = 0 |
171 | RINGSZ_TXSHIFT = 0 |
172 | RINGSZ_RXSHIFT = 16 |
172 | RINGSZ_RXSHIFT = 16 |
173 | 173 | ||
174 | LPA_1000FULL = 0x0800 |
174 | LPA_1000FULL = 0x0800 |
175 | 175 | ||
176 | ; Link partner ability register. |
176 | ; Link partner ability register. |
177 | LPA_SLCT = 0x001f ; Same as advertise selector |
177 | LPA_SLCT = 0x001f ; Same as advertise selector |
178 | LPA_10HALF = 0x0020 ; Can do 10mbps half-duplex |
178 | LPA_10HALF = 0x0020 ; Can do 10mbps half-duplex |
179 | LPA_10FULL = 0x0040 ; Can do 10mbps full-duplex |
179 | LPA_10FULL = 0x0040 ; Can do 10mbps full-duplex |
180 | LPA_100HALF = 0x0080 ; Can do 100mbps half-duplex |
180 | LPA_100HALF = 0x0080 ; Can do 100mbps half-duplex |
181 | LPA_100FULL = 0x0100 ; Can do 100mbps full-duplex |
181 | LPA_100FULL = 0x0100 ; Can do 100mbps full-duplex |
182 | LPA_100BASE4 = 0x0200 ; Can do 100mbps 4k packets |
182 | LPA_100BASE4 = 0x0200 ; Can do 100mbps 4k packets |
183 | LPA_RESV = 0x1c00 ; Unused... |
183 | LPA_RESV = 0x1c00 ; Unused... |
184 | LPA_RFAULT = 0x2000 ; Link partner faulted |
184 | LPA_RFAULT = 0x2000 ; Link partner faulted |
185 | LPA_LPACK = 0x4000 ; Link partner acked us |
185 | LPA_LPACK = 0x4000 ; Link partner acked us |
186 | LPA_NPAGE = 0x8000 ; Next page bit |
186 | LPA_NPAGE = 0x8000 ; Next page bit |
187 | 187 | ||
188 | MII_READ = (-1) |
188 | MII_READ = (-1) |
189 | MII_PHYSID1 = 0x02 ; PHYS ID 1 |
189 | MII_PHYSID1 = 0x02 ; PHYS ID 1 |
190 | MII_PHYSID2 = 0x03 ; PHYS ID 2 |
190 | MII_PHYSID2 = 0x03 ; PHYS ID 2 |
191 | MII_BMCR = 0x00 ; Basic mode control register |
191 | MII_BMCR = 0x00 ; Basic mode control register |
192 | MII_BMSR = 0x01 ; Basic mode status register |
192 | MII_BMSR = 0x01 ; Basic mode status register |
193 | MII_ADVERTISE = 0x04 ; Advertisement control reg |
193 | MII_ADVERTISE = 0x04 ; Advertisement control reg |
194 | MII_LPA = 0x05 ; Link partner ability reg |
194 | MII_LPA = 0x05 ; Link partner ability reg |
195 | MII_SREVISION = 0x16 ; Silicon revision |
195 | MII_SREVISION = 0x16 ; Silicon revision |
196 | MII_RESV1 = 0x17 ; Reserved... |
196 | MII_RESV1 = 0x17 ; Reserved... |
197 | MII_NCONFIG = 0x1c ; Network interface config |
197 | MII_NCONFIG = 0x1c ; Network interface config |
198 | 198 | ||
199 | ; PHY defines |
199 | ; PHY defines |
200 | PHY_OUI_MARVELL = 0x5043 |
200 | PHY_OUI_MARVELL = 0x5043 |
201 | PHY_OUI_CICADA = 0x03f1 |
201 | PHY_OUI_CICADA = 0x03f1 |
202 | PHYID1_OUI_MASK = 0x03ff |
202 | PHYID1_OUI_MASK = 0x03ff |
203 | PHYID1_OUI_SHFT = 6 |
203 | PHYID1_OUI_SHFT = 6 |
204 | PHYID2_OUI_MASK = 0xfc00 |
204 | PHYID2_OUI_MASK = 0xfc00 |
205 | PHYID2_OUI_SHFT = 10 |
205 | PHYID2_OUI_SHFT = 10 |
206 | PHY_INIT1 = 0x0f000 |
206 | PHY_INIT1 = 0x0f000 |
207 | PHY_INIT2 = 0x0e00 |
207 | PHY_INIT2 = 0x0e00 |
208 | PHY_INIT3 = 0x01000 |
208 | PHY_INIT3 = 0x01000 |
209 | PHY_INIT4 = 0x0200 |
209 | PHY_INIT4 = 0x0200 |
210 | PHY_INIT5 = 0x0004 |
210 | PHY_INIT5 = 0x0004 |
211 | PHY_INIT6 = 0x02000 |
211 | PHY_INIT6 = 0x02000 |
212 | PHY_GIGABIT = 0x0100 |
212 | PHY_GIGABIT = 0x0100 |
213 | 213 | ||
214 | PHY_TIMEOUT = 0x1 |
214 | PHY_TIMEOUT = 0x1 |
215 | PHY_ERROR = 0x2 |
215 | PHY_ERROR = 0x2 |
216 | 216 | ||
217 | PHY_100 = 0x1 |
217 | PHY_100 = 0x1 |
218 | PHY_1000 = 0x2 |
218 | PHY_1000 = 0x2 |
219 | PHY_HALF = 0x100 |
219 | PHY_HALF = 0x100 |
220 | 220 | ||
221 | PHY_RGMII = 0x10000000 |
221 | PHY_RGMII = 0x10000000 |
222 | 222 | ||
223 | ; desc_ver values: |
223 | ; desc_ver values: |
224 | ; This field has two purposes: |
224 | ; This field has two purposes: |
225 | ; - Newer nics uses a different ring layout. The layout is selected by |
225 | ; - Newer nics uses a different ring layout. The layout is selected by |
226 | ; comparing np->desc_ver with DESC_VER_xy. |
226 | ; comparing np->desc_ver with DESC_VER_xy. |
227 | ; - It contains bits that are forced on when writing to TxRxControl. |
227 | ; - It contains bits that are forced on when writing to TxRxControl. |
228 | DESC_VER_1 = 0x0 |
228 | DESC_VER_1 = 0x0 |
229 | DESC_VER_2 = (0x02100 or TXRXCTL_RXCHECK) |
229 | DESC_VER_2 = (0x02100 or TXRXCTL_RXCHECK) |
230 | 230 | ||
231 | NV_TX_LASTPACKET = (1 shl 16) |
231 | NV_TX_LASTPACKET = (1 shl 16) |
232 | NV_TX_RETRYERROR = (1 shl 19) |
232 | NV_TX_RETRYERROR = (1 shl 19) |
233 | NV_TX_LASTPACKET1 = (1 shl 24) |
233 | NV_TX_LASTPACKET1 = (1 shl 24) |
234 | NV_TX_DEFERRED = (1 shl 26) |
234 | NV_TX_DEFERRED = (1 shl 26) |
235 | NV_TX_CARRIERLOST = (1 shl 27) |
235 | NV_TX_CARRIERLOST = (1 shl 27) |
236 | NV_TX_LATECOLLISION = (1 shl 28) |
236 | NV_TX_LATECOLLISION = (1 shl 28) |
237 | NV_TX_UNDERFLOW = (1 shl 29) |
237 | NV_TX_UNDERFLOW = (1 shl 29) |
238 | NV_TX_ERROR = (1 shl 30) |
238 | NV_TX_ERROR = (1 shl 30) |
239 | NV_TX_VALID = (1 shl 31) |
239 | NV_TX_VALID = (1 shl 31) |
240 | 240 | ||
241 | NV_TX2_LASTPACKET = (1 shl 29) |
241 | NV_TX2_LASTPACKET = (1 shl 29) |
242 | NV_TX2_RETRYERROR = (1 shl 18) |
242 | NV_TX2_RETRYERROR = (1 shl 18) |
243 | NV_TX2_LASTPACKET1 = (1 shl 23) |
243 | NV_TX2_LASTPACKET1 = (1 shl 23) |
244 | NV_TX2_DEFERRED = (1 shl 25) |
244 | NV_TX2_DEFERRED = (1 shl 25) |
245 | NV_TX2_CARRIERLOST = (1 shl 26) |
245 | NV_TX2_CARRIERLOST = (1 shl 26) |
246 | NV_TX2_LATECOLLISION = (1 shl 27) |
246 | NV_TX2_LATECOLLISION = (1 shl 27) |
247 | NV_TX2_UNDERFLOW = (1 shl 28) |
247 | NV_TX2_UNDERFLOW = (1 shl 28) |
248 | ; error and valid are the same for both |
248 | ; error and valid are the same for both |
249 | NV_TX2_ERROR = (1 shl 30) |
249 | NV_TX2_ERROR = (1 shl 30) |
250 | NV_TX2_VALID = (1 shl 31) |
250 | NV_TX2_VALID = (1 shl 31) |
251 | 251 | ||
252 | NV_RX_DESCRIPTORVALID = (1 shl 16) |
252 | NV_RX_DESCRIPTORVALID = (1 shl 16) |
253 | NV_RX_AVAIL = (1 shl 31) |
253 | NV_RX_AVAIL = (1 shl 31) |
254 | 254 | ||
255 | NV_RX2_DESCRIPTORVALID = (1 shl 29) |
255 | NV_RX2_DESCRIPTORVALID = (1 shl 29) |
256 | 256 | ||
257 | FLAG_MASK_V1 = 0xffff0000 |
257 | FLAG_MASK_V1 = 0xffff0000 |
258 | FLAG_MASK_V2 = 0xffffc000 |
258 | FLAG_MASK_V2 = 0xffffc000 |
259 | LEN_MASK_V1 = (0xffffffff xor FLAG_MASK_V1) |
259 | LEN_MASK_V1 = (0xffffffff xor FLAG_MASK_V1) |
260 | LEN_MASK_V2 = (0xffffffff xor FLAG_MASK_V2) |
260 | LEN_MASK_V2 = (0xffffffff xor FLAG_MASK_V2) |
261 | 261 | ||
262 | ; Miscelaneous hardware related defines: |
262 | ; Miscelaneous hardware related defines: |
263 | NV_PCI_REGSZ_VER1 = 0x270 |
263 | NV_PCI_REGSZ_VER1 = 0x270 |
264 | NV_PCI_REGSZ_VER2 = 0x604 |
264 | NV_PCI_REGSZ_VER2 = 0x604 |
265 | ; various timeout delays: all in usec |
265 | ; various timeout delays: all in usec |
266 | NV_TXRX_RESET_DELAY = 4 |
266 | NV_TXRX_RESET_DELAY = 4 |
267 | NV_TXSTOP_DELAY1 = 10 |
267 | NV_TXSTOP_DELAY1 = 10 |
268 | NV_TXSTOP_DELAY1MAX = 500000 |
268 | NV_TXSTOP_DELAY1MAX = 500000 |
269 | NV_TXSTOP_DELAY2 = 100 |
269 | NV_TXSTOP_DELAY2 = 100 |
270 | NV_RXSTOP_DELAY1 = 10 |
270 | NV_RXSTOP_DELAY1 = 10 |
271 | NV_RXSTOP_DELAY1MAX = 500000 |
271 | NV_RXSTOP_DELAY1MAX = 500000 |
272 | NV_RXSTOP_DELAY2 = 100 |
272 | NV_RXSTOP_DELAY2 = 100 |
273 | NV_SETUP5_DELAY = 5 |
273 | NV_SETUP5_DELAY = 5 |
274 | NV_SETUP5_DELAYMAX = 50000 |
274 | NV_SETUP5_DELAYMAX = 50000 |
275 | NV_POWERUP_DELAY = 5 |
275 | NV_POWERUP_DELAY = 5 |
276 | NV_POWERUP_DELAYMAX = 5000 |
276 | NV_POWERUP_DELAYMAX = 5000 |
277 | NV_MIIBUSY_DELAY = 50 |
277 | NV_MIIBUSY_DELAY = 50 |
278 | NV_MIIPHY_DELAY = 10 |
278 | NV_MIIPHY_DELAY = 10 |
279 | NV_MIIPHY_DELAYMAX = 10000 |
279 | NV_MIIPHY_DELAYMAX = 10000 |
280 | NV_MAC_RESET_DELAY = 64 |
280 | NV_MAC_RESET_DELAY = 64 |
281 | NV_WAKEUPPATTERNS = 5 |
281 | NV_WAKEUPPATTERNS = 5 |
282 | NV_WAKEUPMASKENTRIES = 4 |
282 | NV_WAKEUPMASKENTRIES = 4 |
283 | 283 | ||
284 | struct TxDesc |
284 | struct TxDesc |
285 | PacketBuffer dd ? |
285 | PacketBuffer dd ? |
286 | FlagLen dd ? |
286 | FlagLen dd ? |
287 | ends |
287 | ends |
288 | 288 | ||
289 | struct RxDesc |
289 | struct RxDesc |
290 | PacketBuffer dd ? |
290 | PacketBuffer dd ? |
291 | FlagLen dd ? |
291 | FlagLen dd ? |
292 | ends |
292 | ends |
293 | 293 | ||
294 | struct device ETH_DEVICE |
294 | struct device ETH_DEVICE |
295 | 295 | ||
296 | pci_bus dd ? |
296 | pci_bus dd ? |
297 | pci_dev dd ? |
297 | pci_dev dd ? |
298 | 298 | ||
299 | mmio_addr dd ? |
299 | mmio_addr dd ? |
300 | vendor_id dw ? |
300 | vendor_id dw ? |
301 | device_id dw ? |
301 | device_id dw ? |
302 | txflags dd ? |
302 | txflags dd ? |
303 | desc_ver dd ? |
303 | desc_ver dd ? |
304 | irqmask dd ? |
304 | irqmask dd ? |
305 | wolenabled dd ? |
305 | wolenabled dd ? |
306 | in_shutdown dd ? |
306 | in_shutdown dd ? |
307 | cur_rx dd ? |
307 | cur_rx dd ? |
308 | cur_tx dd ? |
308 | cur_tx dd ? |
309 | last_tx dd ? |
309 | last_tx dd ? |
310 | phyaddr dd ? |
310 | phyaddr dd ? |
311 | phy_oui dd ? |
311 | phy_oui dd ? |
312 | gigabit dd ? |
312 | gigabit dd ? |
313 | needs_mac_reset dd ? |
313 | needs_mac_reset dd ? |
314 | linkspeed dd ? |
314 | linkspeed dd ? |
315 | duplex dd ? |
315 | duplex dd ? |
316 | nocable dd ? |
316 | nocable dd ? |
317 | 317 | ||
318 | rb 0x100 - ($ and 0xff) |
318 | rb 0x100 - ($ and 0xff) |
319 | tx_ring rd (TX_RING * sizeof.TxDesc) /4*2 |
319 | tx_ring rd (TX_RING * sizeof.TxDesc) /4*2 |
320 | 320 | ||
321 | rb 0x100 - ($ and 0xff) |
321 | rb 0x100 - ($ and 0xff) |
322 | rx_ring rd (RX_RING * sizeof.RxDesc) /4*2 |
322 | rx_ring rd (RX_RING * sizeof.RxDesc) /4*2 |
323 | 323 | ||
324 | ends |
324 | ends |
325 | 325 | ||
326 | 326 | ||
327 | 327 | ||
328 | virtual at edi |
328 | virtual at edi |
329 | IrqStatus dd ? |
329 | IrqStatus dd ? |
330 | IrqMask dd ? |
330 | IrqMask dd ? |
331 | UnknownSetupReg6 dd ? |
331 | UnknownSetupReg6 dd ? |
332 | PollingInterval dd ? |
332 | PollingInterval dd ? |
333 | end virtual |
333 | end virtual |
334 | 334 | ||
335 | virtual at edi + 0x3c |
335 | virtual at edi + 0x3c |
336 | MacReset dd ? |
336 | MacReset dd ? |
337 | end virtual |
337 | end virtual |
338 | 338 | ||
339 | virtual at edi + 0x80 |
339 | virtual at edi + 0x80 |
340 | Misc1 dd ? |
340 | Misc1 dd ? |
341 | TransmitterControl dd ? |
341 | TransmitterControl dd ? |
342 | TransmitterStatus dd ? |
342 | TransmitterStatus dd ? |
343 | PacketFilterFlags dd ? |
343 | PacketFilterFlags dd ? |
344 | OffloadConfig dd ? |
344 | OffloadConfig dd ? |
345 | ReceiverControl dd ? |
345 | ReceiverControl dd ? |
346 | ReceiverStatus dd ? |
346 | ReceiverStatus dd ? |
347 | RandomSeed dd ? |
347 | RandomSeed dd ? |
348 | UnknownSetupReg1 dd ? |
348 | UnknownSetupReg1 dd ? |
349 | UnknownSetupReg2 dd ? |
349 | UnknownSetupReg2 dd ? |
350 | MacAddrA dd ? |
350 | MacAddrA dd ? |
351 | MacAddrB dd ? |
351 | MacAddrB dd ? |
352 | MulticastAddrA dd ? |
352 | MulticastAddrA dd ? |
353 | MulticastAddrB dd ? |
353 | MulticastAddrB dd ? |
354 | MulticastMaskA dd ? |
354 | MulticastMaskA dd ? |
355 | MulticastMaskB dd ? |
355 | MulticastMaskB dd ? |
356 | PhyInterface dd ? |
356 | PhyInterface dd ? |
357 | end virtual |
357 | end virtual |
358 | 358 | ||
359 | virtual at edi + 0x100 |
359 | virtual at edi + 0x100 |
360 | TxRingPhysAddr dd ? |
360 | TxRingPhysAddr dd ? |
361 | RxRingPhysAddr dd ? |
361 | RxRingPhysAddr dd ? |
362 | RingSizes dd ? |
362 | RingSizes dd ? |
363 | UnknownTransmitterReg dd ? |
363 | UnknownTransmitterReg dd ? |
364 | LinkSpeed dd ? |
364 | LinkSpeed dd ? |
365 | end virtual |
365 | end virtual |
366 | 366 | ||
367 | virtual at edi + 0x130 |
367 | virtual at edi + 0x130 |
368 | UnknownSetupReg5 dd ? |
368 | UnknownSetupReg5 dd ? |
369 | end virtual |
369 | end virtual |
370 | 370 | ||
371 | virtual at edi + 0x13c |
371 | virtual at edi + 0x13c |
372 | UnknownSetupReg3 dd ? |
372 | UnknownSetupReg3 dd ? |
373 | end virtual |
373 | end virtual |
374 | 374 | ||
375 | virtual at edi + 0x144 |
375 | virtual at edi + 0x144 |
376 | TxRxControl dd ? |
376 | TxRxControl dd ? |
377 | end virtual |
377 | end virtual |
378 | 378 | ||
379 | virtual at edi + 0x180 |
379 | virtual at edi + 0x180 |
380 | MIIStatus dd ? |
380 | MIIStatus dd ? |
381 | UnknownSetupReg4 dd ? |
381 | UnknownSetupReg4 dd ? |
382 | AdapterControl dd ? |
382 | AdapterControl dd ? |
383 | MIISpeed dd ? |
383 | MIISpeed dd ? |
384 | MIIControl dd ? |
384 | MIIControl dd ? |
385 | MIIData dd ? |
385 | MIIData dd ? |
386 | end virtual |
386 | end virtual |
387 | 387 | ||
388 | virtual at edi + 0x200 |
388 | virtual at edi + 0x200 |
389 | WakeUpFlags dd ? |
389 | WakeUpFlags dd ? |
390 | end virtual |
390 | end virtual |
391 | 391 | ||
392 | virtual at edi + 0x26c |
392 | virtual at edi + 0x26c |
393 | PowerState dd ? |
393 | PowerState dd ? |
394 | end virtual |
394 | end virtual |
395 | 395 | ||
396 | virtual at edi + 0x600 |
396 | virtual at edi + 0x600 |
397 | PowerState2 dd ? |
397 | PowerState2 dd ? |
398 | end virtual |
398 | end virtual |
399 | 399 | ||
400 | 400 | ||
401 | 401 | ||
402 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
402 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
403 | ;; ;; |
403 | ;; ;; |
404 | ;; proc START ;; |
404 | ;; proc START ;; |
405 | ;; ;; |
405 | ;; ;; |
406 | ;; (standard driver proc) ;; |
406 | ;; (standard driver proc) ;; |
407 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
407 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
408 | 408 | ||
409 | proc START c, reason:dword, cmdline:dword |
409 | proc START c, reason:dword, cmdline:dword |
410 | 410 | ||
411 | cmp [reason], DRV_ENTRY |
411 | cmp [reason], DRV_ENTRY |
412 | jne .fail |
412 | jne .fail |
413 | 413 | ||
414 | DEBUGF 2,"Loading driver\n" |
414 | DEBUGF 2,"Loading driver\n" |
415 | invoke RegService, my_service, service_proc |
415 | invoke RegService, my_service, service_proc |
416 | ret |
416 | ret |
417 | 417 | ||
418 | .fail: |
418 | .fail: |
419 | xor eax, eax |
419 | xor eax, eax |
420 | ret |
420 | ret |
421 | 421 | ||
422 | endp |
422 | endp |
423 | 423 | ||
424 | 424 | ||
425 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
425 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
426 | ;; ;; |
426 | ;; ;; |
427 | ;; proc SERVICE_PROC ;; |
427 | ;; proc SERVICE_PROC ;; |
428 | ;; ;; |
428 | ;; ;; |
429 | ;; (standard driver proc) ;; |
429 | ;; (standard driver proc) ;; |
430 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
430 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
431 | 431 | ||
432 | proc service_proc stdcall, ioctl:dword |
432 | proc service_proc stdcall, ioctl:dword |
433 | 433 | ||
434 | mov edx, [ioctl] |
434 | mov edx, [ioctl] |
435 | mov eax, [edx + IOCTL.io_code] |
435 | mov eax, [edx + IOCTL.io_code] |
436 | 436 | ||
437 | ;------------------------------------------------------ |
437 | ;------------------------------------------------------ |
438 | 438 | ||
439 | cmp eax, 0 ;SRV_GETVERSION |
439 | cmp eax, 0 ;SRV_GETVERSION |
440 | jne @F |
440 | jne @F |
441 | 441 | ||
442 | cmp [edx + IOCTL.out_size], 4 |
442 | cmp [edx + IOCTL.out_size], 4 |
443 | jb .fail |
443 | jb .fail |
444 | mov eax, [edx + IOCTL.output] |
444 | mov eax, [edx + IOCTL.output] |
445 | mov [eax], dword API_VERSION |
445 | mov [eax], dword API_VERSION |
446 | 446 | ||
447 | xor eax, eax |
447 | xor eax, eax |
448 | ret |
448 | ret |
449 | 449 | ||
450 | ;------------------------------------------------------ |
450 | ;------------------------------------------------------ |
451 | @@: |
451 | @@: |
452 | cmp eax, 1 ;SRV_HOOK |
452 | cmp eax, 1 ;SRV_HOOK |
453 | jne .fail |
453 | jne .fail |
454 | 454 | ||
455 | cmp [edx + IOCTL.inp_size], 3 ; Data input must be at least 3 bytes |
455 | cmp [edx + IOCTL.inp_size], 3 ; Data input must be at least 3 bytes |
456 | jb .fail |
456 | jb .fail |
457 | 457 | ||
458 | mov eax, [edx + IOCTL.input] |
458 | mov eax, [edx + IOCTL.input] |
459 | cmp byte [eax], 1 ; 1 means device number and bus number (pci) are given |
459 | cmp byte [eax], 1 ; 1 means device number and bus number (pci) are given |
460 | jne .fail ; other types arent supported for this card yet |
460 | jne .fail ; other types arent supported for this card yet |
461 | 461 | ||
462 | ; check if the device is already listed |
462 | ; check if the device is already listed |
463 | 463 | ||
464 | mov esi, device_list |
464 | mov esi, device_list |
465 | mov ecx, [devices] |
465 | mov ecx, [devices] |
466 | test ecx, ecx |
466 | test ecx, ecx |
467 | jz .firstdevice |
467 | jz .firstdevice |
468 | 468 | ||
469 | ; mov eax, [edx + IOCTL.input] ; get the pci bus and device numbers |
469 | ; mov eax, [edx + IOCTL.input] ; get the pci bus and device numbers |
470 | mov ax, [eax+1] |
470 | mov ax, [eax+1] |
471 | .nextdevice: |
471 | .nextdevice: |
472 | mov ebx, [esi] |
472 | mov ebx, [esi] |
473 | cmp al, byte [ebx + device.pci_bus] ; compare with pci and device num in device list (notice the usage of word instead of byte) |
473 | cmp al, byte [ebx + device.pci_bus] ; compare with pci and device num in device list (notice the usage of word instead of byte) |
474 | jne @f |
474 | jne @f |
475 | cmp ah, byte [ebx + device.pci_dev] |
475 | cmp ah, byte [ebx + device.pci_dev] |
476 | je .find_devicenum ; Device is already loaded, let's find it's device number |
476 | je .find_devicenum ; Device is already loaded, let's find it's device number |
477 | @@: |
477 | @@: |
478 | add esi, 4 |
478 | add esi, 4 |
479 | loop .nextdevice |
479 | loop .nextdevice |
480 | 480 | ||
481 | 481 | ||
482 | ; This device doesnt have its own eth_device structure yet, lets create one |
482 | ; This device doesnt have its own eth_device structure yet, lets create one |
483 | .firstdevice: |
483 | .firstdevice: |
484 | cmp [devices], MAX_DEVICES ; First check if the driver can handle one more card |
484 | cmp [devices], MAX_DEVICES ; First check if the driver can handle one more card |
485 | jae .fail |
485 | jae .fail |
486 | 486 | ||
487 | allocate_and_clear ebx, sizeof.device, .fail ; Allocate the buffer for device structure |
487 | allocate_and_clear ebx, sizeof.device, .fail ; Allocate the buffer for device structure |
488 | 488 | ||
489 | ; Fill in the direct call addresses into the struct |
489 | ; Fill in the direct call addresses into the struct |
490 | 490 | ||
491 | mov [ebx + device.reset], reset |
491 | mov [ebx + device.reset], reset |
492 | mov [ebx + device.transmit], transmit |
492 | mov [ebx + device.transmit], transmit |
493 | mov [ebx + device.unload], .fail |
493 | mov [ebx + device.unload], .fail |
494 | mov [ebx + device.name], my_service |
494 | mov [ebx + device.name], my_service |
495 | 495 | ||
496 | ; save the pci bus and device numbers |
496 | ; save the pci bus and device numbers |
497 | 497 | ||
498 | mov eax, [edx + IOCTL.input] |
498 | mov eax, [edx + IOCTL.input] |
499 | movzx ecx, byte [eax+1] |
499 | movzx ecx, byte [eax+1] |
500 | mov [ebx + device.pci_bus], ecx |
500 | mov [ebx + device.pci_bus], ecx |
501 | movzx ecx, byte [eax+2] |
501 | movzx ecx, byte [eax+2] |
502 | mov [ebx + device.pci_dev], ecx |
502 | mov [ebx + device.pci_dev], ecx |
503 | 503 | ||
504 | DEBUGF 1,"Hooking into device, dev:%x, bus:%x\n", [ebx + device.pci_dev], [ebx + device.pci_bus] |
504 | DEBUGF 1,"Hooking into device, dev:%x, bus:%x\n", [ebx + device.pci_dev], [ebx + device.pci_bus] |
505 | 505 | ||
506 | ; Ok, the eth_device structure is ready, let's probe the device |
506 | ; Ok, the eth_device structure is ready, let's probe the device |
507 | call probe ; this function will output in eax |
507 | call probe ; this function will output in eax |
508 | test eax, eax |
508 | test eax, eax |
509 | jnz .err ; If an error occured, exit |
509 | jnz .err ; If an error occured, exit |
510 | 510 | ||
511 | mov eax, [devices] ; Add the device structure to our device list |
511 | mov eax, [devices] ; Add the device structure to our device list |
512 | mov [device_list+4*eax], ebx ; (IRQ handler uses this list to find device) |
512 | mov [device_list+4*eax], ebx ; (IRQ handler uses this list to find device) |
513 | inc [devices] ; |
513 | inc [devices] ; |
514 | 514 | ||
515 | mov [ebx + device.type], NET_TYPE_ETH |
515 | mov [ebx + device.type], NET_TYPE_ETH |
516 | invoke NetRegDev |
516 | invoke NetRegDev |
517 | 517 | ||
518 | cmp eax, -1 |
518 | cmp eax, -1 |
519 | je .destroy |
519 | je .destroy |
520 | 520 | ||
521 | ret |
521 | ret |
522 | 522 | ||
523 | ; If the device was already loaded, find the device number and return it in eax |
523 | ; If the device was already loaded, find the device number and return it in eax |
524 | 524 | ||
525 | .find_devicenum: |
525 | .find_devicenum: |
526 | DEBUGF 1,"Trying to find device number of already registered device\n" |
526 | DEBUGF 1,"Trying to find device number of already registered device\n" |
527 | invoke NetPtrToNum ; This kernel procedure converts a pointer to device struct in ebx |
527 | invoke NetPtrToNum ; This kernel procedure converts a pointer to device struct in ebx |
528 | ; into a device number in edi |
528 | ; into a device number in edi |
529 | mov eax, edi ; Application wants it in eax instead |
529 | mov eax, edi ; Application wants it in eax instead |
530 | DEBUGF 1,"Kernel says: %u\n", eax |
530 | DEBUGF 1,"Kernel says: %u\n", eax |
531 | ret |
531 | ret |
532 | 532 | ||
533 | ; If an error occured, remove all allocated data and exit (returning -1 in eax) |
533 | ; If an error occured, remove all allocated data and exit (returning -1 in eax) |
534 | 534 | ||
535 | .destroy: |
535 | .destroy: |
536 | ; todo: reset device into virgin state |
536 | ; todo: reset device into virgin state |
537 | 537 | ||
538 | .err: |
538 | .err: |
539 | invoke KernelFree, ebx |
539 | invoke KernelFree, ebx |
540 | .fail: |
540 | .fail: |
541 | 541 | ||
542 | ret |
542 | ret |
543 | 543 | ||
544 | ;------------------------------------------------------ |
544 | ;------------------------------------------------------ |
545 | endp |
545 | endp |
546 | 546 | ||
547 | 547 | ||
548 | ;;/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\;; |
548 | ;;/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\;; |
549 | ;; ;; |
549 | ;; ;; |
550 | ;; Actual Hardware dependent code starts here ;; |
550 | ;; Actual Hardware dependent code starts here ;; |
551 | ;; ;; |
551 | ;; ;; |
552 | ;;/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\;; |
552 | ;;/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\;; |
553 | 553 | ||
554 | 554 | ||
555 | 555 | ||
556 | 556 | ||
557 | ;*************************************************************************** |
557 | ;*************************************************************************** |
558 | ; Function |
558 | ; Function |
559 | ; probe |
559 | ; probe |
560 | ; Description |
560 | ; Description |
561 | ; Searches for an ethernet card, enables it and clears the rx buffer |
561 | ; Searches for an ethernet card, enables it and clears the rx buffer |
562 | ; |
562 | ; |
563 | ;*************************************************************************** |
563 | ;*************************************************************************** |
564 | align 4 |
564 | align 4 |
565 | probe: |
565 | probe: |
566 | 566 | ||
567 | DEBUGF 1,"probe\n" |
567 | DEBUGF 1,"probe\n" |
568 | 568 | ||
569 | mov [ebx + device.needs_mac_reset], 0 |
569 | mov [ebx + device.needs_mac_reset], 0 |
570 | 570 | ||
571 | ; Make the device a bus master and enable response in I/O space |
571 | ; Make the device a bus master and enable response in I/O space |
572 | invoke PciRead32, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.command |
572 | invoke PciRead32, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.command |
573 | or al, PCI_CMD_MASTER + PCI_CMD_PIO ; + PCI_CMD_MMIO |
573 | or al, PCI_CMD_MASTER + PCI_CMD_PIO ; + PCI_CMD_MMIO |
574 | invoke PciWrite32, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.command, eax |
574 | invoke PciWrite32, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.command, eax |
575 | 575 | ||
576 | ; Adjust PCI latency to be at least 32 |
576 | ; Adjust PCI latency to be at least 32 |
577 | invoke PciRead8, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.max_latency |
577 | invoke PciRead8, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.max_latency |
578 | cmp al, 32 |
578 | cmp al, 32 |
579 | jae @f |
579 | jae @f |
580 | mov al, 32 |
580 | mov al, 32 |
581 | invoke PciWrite8, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.max_latency, eax |
581 | invoke PciWrite8, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.max_latency, eax |
582 | @@: |
582 | @@: |
583 | 583 | ||
584 | ; Now, it's time to find the base mmio addres of the PCI device |
584 | ; Now, it's time to find the base mmio addres of the PCI device |
585 | stdcall PCI_find_mmio32, [ebx + device.pci_bus], [ebx + device.pci_dev] ; returns in eax |
585 | stdcall PCI_find_mmio, [ebx + device.pci_bus], [ebx + device.pci_dev] ; returns in eax |
- | 586 | test eax, eax |
|
- | 587 | jnz @f |
|
- | 588 | DEBUGF 1, "No useable MMIO addresses found!\n" |
|
- | 589 | dec eax |
|
- | 590 | ret |
|
- | 591 | @@: |
|
586 | DEBUGF 1,"mmio_addr= 0x%x\n", eax |
592 | DEBUGF 1,"mmio_addr= 0x%x\n", eax |
587 | 593 | ||
588 | ; Create virtual mapping of the physical memory |
594 | ; Create virtual mapping of the physical memory |
589 | invoke MapIoMem, eax, 10000h, PG_SW + PG_NOCACHE |
595 | invoke MapIoMem, eax, 10000h, PG_SW + PG_NOCACHE |
590 | test eax, eax |
596 | test eax, eax |
591 | jz fail |
597 | jz fail |
592 | mov [ebx + device.mmio_addr], eax |
598 | mov [ebx + device.mmio_addr], eax |
593 | DEBUGF 1,"mapped mmio_addr= 0x%x\n", eax |
599 | DEBUGF 1,"mapped mmio_addr= 0x%x\n", eax |
594 | 600 | ||
595 | ; Read PCI vendor/device ID |
601 | ; Read PCI vendor/device ID |
596 | invoke PciRead32, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.vendor_id |
602 | invoke PciRead32, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.vendor_id |
597 | mov dword[ebx + device.vendor_id], eax |
603 | mov dword[ebx + device.vendor_id], eax |
598 | DEBUGF 1,"vendor = 0x%x\n", [ebx + device.vendor_id]:4 |
604 | DEBUGF 1,"vendor = 0x%x\n", [ebx + device.vendor_id]:4 |
599 | DEBUGF 1,"device = 0x%x\n", [ebx + device.device_id]:4 |
605 | DEBUGF 1,"device = 0x%x\n", [ebx + device.device_id]:4 |
600 | 606 | ||
601 | ;------------------------------------- |
607 | ;------------------------------------- |
602 | ; handle different descriptor versions |
608 | ; handle different descriptor versions |
603 | mov [ebx + device.desc_ver], DESC_VER_1 |
609 | mov [ebx + device.desc_ver], DESC_VER_1 |
604 | mov ax, [ebx + device.device_id] |
610 | mov ax, [ebx + device.device_id] |
605 | cmp ax, PCI_DEVICE_ID_NVIDIA_NVENET_1 |
611 | cmp ax, PCI_DEVICE_ID_NVIDIA_NVENET_1 |
606 | je .ver1 |
612 | je .ver1 |
607 | cmp ax, PCI_DEVICE_ID_NVIDIA_NVENET_2 |
613 | cmp ax, PCI_DEVICE_ID_NVIDIA_NVENET_2 |
608 | je .ver1 |
614 | je .ver1 |
609 | cmp ax, PCI_DEVICE_ID_NVIDIA_NVENET_3 |
615 | cmp ax, PCI_DEVICE_ID_NVIDIA_NVENET_3 |
610 | je .ver1 |
616 | je .ver1 |
611 | mov [ebx + device.desc_ver], DESC_VER_2 |
617 | mov [ebx + device.desc_ver], DESC_VER_2 |
612 | .ver1: |
618 | .ver1: |
613 | 619 | ||
614 | call read_mac |
620 | call read_mac |
615 | 621 | ||
616 | ; disable WOL |
622 | ; disable WOL |
617 | mov [WakeUpFlags], 0 |
623 | mov [WakeUpFlags], 0 |
618 | mov [ebx + device.wolenabled], 0 |
624 | mov [ebx + device.wolenabled], 0 |
619 | 625 | ||
620 | mov [ebx + device.txflags], (NV_TX2_LASTPACKET or NV_TX2_VALID) |
626 | mov [ebx + device.txflags], (NV_TX2_LASTPACKET or NV_TX2_VALID) |
621 | cmp [ebx + device.desc_ver], DESC_VER_1 |
627 | cmp [ebx + device.desc_ver], DESC_VER_1 |
622 | jne @f |
628 | jne @f |
623 | mov [ebx + device.txflags], (NV_TX_LASTPACKET or NV_TX_VALID) |
629 | mov [ebx + device.txflags], (NV_TX_LASTPACKET or NV_TX_VALID) |
624 | @@: |
630 | @@: |
625 | 631 | ||
626 | ; BEGIN of switch (pci->dev_id) |
632 | ; BEGIN of switch (pci->dev_id) |
627 | 633 | ||
628 | cmp [ebx + device.device_id], 0x01C3 |
634 | cmp [ebx + device.device_id], 0x01C3 |
629 | jne .not_0x01c3 |
635 | jne .not_0x01c3 |
630 | ; nforce |
636 | ; nforce |
631 | mov [ebx + device.irqmask], (IRQMASK_WANTED_2 or IRQ_TIMER) ;;; Was 0 |
637 | mov [ebx + device.irqmask], (IRQMASK_WANTED_2 or IRQ_TIMER) ;;; Was 0 |
632 | jmp .find_phy |
638 | jmp .find_phy |
633 | .not_0x01c3: |
639 | .not_0x01c3: |
634 | 640 | ||
635 | cmp [ebx + device.device_id], 0x0066 |
641 | cmp [ebx + device.device_id], 0x0066 |
636 | je @f |
642 | je @f |
637 | cmp [ebx + device.device_id], 0x00D6 |
643 | cmp [ebx + device.device_id], 0x00D6 |
638 | jne .not_0x0066 |
644 | jne .not_0x0066 |
639 | @@: |
645 | @@: |
640 | mov [ebx + device.irqmask], (IRQMASK_WANTED_2 or IRQ_TIMER) ;;;; was 0 |
646 | mov [ebx + device.irqmask], (IRQMASK_WANTED_2 or IRQ_TIMER) ;;;; was 0 |
641 | cmp [ebx + device.desc_ver], DESC_VER_1 |
647 | cmp [ebx + device.desc_ver], DESC_VER_1 |
642 | jne @f |
648 | jne @f |
643 | or [ebx + device.txflags], NV_TX_LASTPACKET1 |
649 | or [ebx + device.txflags], NV_TX_LASTPACKET1 |
644 | jmp .find_phy |
650 | jmp .find_phy |
645 | @@: |
651 | @@: |
646 | or [ebx + device.txflags], NV_TX2_LASTPACKET1 |
652 | or [ebx + device.txflags], NV_TX2_LASTPACKET1 |
647 | jmp .find_phy |
653 | jmp .find_phy |
648 | .not_0x0066: |
654 | .not_0x0066: |
649 | 655 | ||
650 | cmp [ebx + device.device_id], 0x0086 |
656 | cmp [ebx + device.device_id], 0x0086 |
651 | je @f |
657 | je @f |
652 | cmp [ebx + device.device_id], 0x008c |
658 | cmp [ebx + device.device_id], 0x008c |
653 | je @f |
659 | je @f |
654 | cmp [ebx + device.device_id], 0x00e6 |
660 | cmp [ebx + device.device_id], 0x00e6 |
655 | je @f |
661 | je @f |
656 | cmp [ebx + device.device_id], 0x00df |
662 | cmp [ebx + device.device_id], 0x00df |
657 | je @f |
663 | je @f |
658 | cmp [ebx + device.device_id], 0x0056 |
664 | cmp [ebx + device.device_id], 0x0056 |
659 | je @f |
665 | je @f |
660 | cmp [ebx + device.device_id], 0x0057 |
666 | cmp [ebx + device.device_id], 0x0057 |
661 | je @f |
667 | je @f |
662 | cmp [ebx + device.device_id], 0x0037 |
668 | cmp [ebx + device.device_id], 0x0037 |
663 | je @f |
669 | je @f |
664 | cmp [ebx + device.device_id], 0x0038 |
670 | cmp [ebx + device.device_id], 0x0038 |
665 | jne .not_0x0086 |
671 | jne .not_0x0086 |
666 | 672 | ||
667 | @@: |
673 | @@: |
668 | mov [ebx + device.irqmask], (IRQMASK_WANTED_2 or IRQ_TIMER) ;;; was 0 |
674 | mov [ebx + device.irqmask], (IRQMASK_WANTED_2 or IRQ_TIMER) ;;; was 0 |
669 | 675 | ||
670 | cmp [ebx + device.desc_ver], DESC_VER_1 |
676 | cmp [ebx + device.desc_ver], DESC_VER_1 |
671 | jne @f |
677 | jne @f |
672 | or [ebx + device.txflags], NV_TX_LASTPACKET1 |
678 | or [ebx + device.txflags], NV_TX_LASTPACKET1 |
673 | jmp .find_phy |
679 | jmp .find_phy |
674 | @@: |
680 | @@: |
675 | or [ebx + device.txflags], NV_TX2_LASTPACKET1 |
681 | or [ebx + device.txflags], NV_TX2_LASTPACKET1 |
676 | jmp .find_phy |
682 | jmp .find_phy |
677 | .not_0x0086: |
683 | .not_0x0086: |
678 | 684 | ||
679 | ; cmp word [device_id], 0x0268 |
685 | ; cmp word [device_id], 0x0268 |
680 | ; je @f |
686 | ; je @f |
681 | ; cmp word [device_id], 0x0269 |
687 | ; cmp word [device_id], 0x0269 |
682 | ; je @f |
688 | ; je @f |
683 | ; cmp word [device_id], 0x0372 |
689 | ; cmp word [device_id], 0x0372 |
684 | ; je @f |
690 | ; je @f |
685 | ; cmp word [device_id], 0x0373 |
691 | ; cmp word [device_id], 0x0373 |
686 | ; je @f |
692 | ; je @f |
687 | ; jmp .default_switch |
693 | ; jmp .default_switch |
688 | ;@@: |
694 | ;@@: |
689 | cmp [ebx + device.device_id], 0x0268 |
695 | cmp [ebx + device.device_id], 0x0268 |
690 | jb .undefined |
696 | jb .undefined |
691 | 697 | ||
692 | ; Get device revision |
698 | ; Get device revision |
693 | invoke PciRead8, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header.revision_id |
699 | invoke PciRead8, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header.revision_id |
694 | mov edi, [ebx + device.mmio_addr] ;;;;; |
700 | mov edi, [ebx + device.mmio_addr] ;;;;; |
695 | 701 | ||
696 | ; take phy and nic out of low power mode |
702 | ; take phy and nic out of low power mode |
697 | mov ecx, [PowerState2] |
703 | mov ecx, [PowerState2] |
698 | and ecx, not POWERSTATE2_POWERUP_MASK |
704 | and ecx, not POWERSTATE2_POWERUP_MASK |
699 | cmp [ebx + device.device_id], PCI_DEVICE_ID_NVIDIA_NVENET_12 |
705 | cmp [ebx + device.device_id], PCI_DEVICE_ID_NVIDIA_NVENET_12 |
700 | je @f |
706 | je @f |
701 | cmp [ebx + device.device_id], PCI_DEVICE_ID_NVIDIA_NVENET_13 |
707 | cmp [ebx + device.device_id], PCI_DEVICE_ID_NVIDIA_NVENET_13 |
702 | jne .set_powerstate |
708 | jne .set_powerstate |
703 | @@: |
709 | @@: |
704 | cmp al, 0xA3 |
710 | cmp al, 0xA3 |
705 | jb .set_powerstate |
711 | jb .set_powerstate |
706 | or ecx, POWERSTATE2_POWERUP_REV_A3 |
712 | or ecx, POWERSTATE2_POWERUP_REV_A3 |
707 | .set_powerstate: |
713 | .set_powerstate: |
708 | mov [PowerState2], ecx |
714 | mov [PowerState2], ecx |
709 | 715 | ||
710 | ; DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ |
716 | ; DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ |
711 | mov [ebx + device.irqmask], (IRQMASK_WANTED_2 or IRQ_TIMER) ; was 0 |
717 | mov [ebx + device.irqmask], (IRQMASK_WANTED_2 or IRQ_TIMER) ; was 0 |
712 | 718 | ||
713 | mov [ebx + device.needs_mac_reset], 1 |
719 | mov [ebx + device.needs_mac_reset], 1 |
714 | cmp [ebx + device.desc_ver], DESC_VER_1 |
720 | cmp [ebx + device.desc_ver], DESC_VER_1 |
715 | jne @f |
721 | jne @f |
716 | or [ebx + device.txflags], NV_TX_LASTPACKET1 |
722 | or [ebx + device.txflags], NV_TX_LASTPACKET1 |
717 | jmp .find_phy |
723 | jmp .find_phy |
718 | 724 | ||
719 | @@: |
725 | @@: |
720 | cmp [ebx + device.desc_ver], DESC_VER_2 |
726 | cmp [ebx + device.desc_ver], DESC_VER_2 |
721 | jne .undefined |
727 | jne .undefined |
722 | or [ebx + device.txflags], NV_TX2_LASTPACKET1 |
728 | or [ebx + device.txflags], NV_TX2_LASTPACKET1 |
723 | jmp .find_phy |
729 | jmp .find_phy |
724 | 730 | ||
725 | .undefined: |
731 | .undefined: |
726 | DEBUGF 2,"Your card was undefined in this driver.\n" |
732 | DEBUGF 2,"Your card was undefined in this driver.\n" |
727 | or eax, -1 |
733 | or eax, -1 |
728 | ret |
734 | ret |
729 | 735 | ||
730 | ; Find a suitable phy |
736 | ; Find a suitable phy |
731 | ; Start with address 1 to 31, then do 0, then fail |
737 | ; Start with address 1 to 31, then do 0, then fail |
732 | 738 | ||
733 | .find_phy: |
739 | .find_phy: |
734 | xor edx, edx |
740 | xor edx, edx |
735 | .phy_loop: |
741 | .phy_loop: |
736 | inc edx |
742 | inc edx |
737 | and edx, 0x1f ; phyaddr = i & 0x1f |
743 | and edx, 0x1f ; phyaddr = i & 0x1f |
738 | mov eax, MII_PHYSID1 |
744 | mov eax, MII_PHYSID1 |
739 | mov ecx, MII_READ |
745 | mov ecx, MII_READ |
740 | call mii_rw ; EDX - addr, EAX - miireg, ECX - value |
746 | call mii_rw ; EDX - addr, EAX - miireg, ECX - value |
741 | 747 | ||
742 | cmp eax, 0x0000ffff |
748 | cmp eax, 0x0000ffff |
743 | je .try_next |
749 | je .try_next |
744 | test eax, 0x80000000 |
750 | test eax, 0x80000000 |
745 | jnz .try_next |
751 | jnz .try_next |
746 | mov esi, eax |
752 | mov esi, eax |
747 | 753 | ||
748 | mov eax, MII_PHYSID2 |
754 | mov eax, MII_PHYSID2 |
749 | mov ecx, MII_READ |
755 | mov ecx, MII_READ |
750 | call mii_rw |
756 | call mii_rw |
751 | 757 | ||
752 | cmp eax, 0x0000ffff |
758 | cmp eax, 0x0000ffff |
753 | je .try_next |
759 | je .try_next |
754 | test eax, 0x80000000 |
760 | test eax, 0x80000000 |
755 | jnz .try_next |
761 | jnz .try_next |
756 | jmp .got_it |
762 | jmp .got_it |
757 | 763 | ||
758 | .try_next: |
764 | .try_next: |
759 | test edx, edx |
765 | test edx, edx |
760 | jnz .phy_loop |
766 | jnz .phy_loop |
761 | 767 | ||
762 | ; PHY in isolate mode? No phy attached and user wants to test loopback? |
768 | ; PHY in isolate mode? No phy attached and user wants to test loopback? |
763 | ; Very odd, but can be correct. |
769 | ; Very odd, but can be correct. |
764 | 770 | ||
765 | DEBUGF 2,"Could not find a valid PHY.\n" |
771 | DEBUGF 2,"Could not find a valid PHY.\n" |
766 | jmp .no_phy |
772 | jmp .no_phy |
767 | 773 | ||
768 | .got_it: |
774 | .got_it: |
769 | and esi, PHYID1_OUI_MASK |
775 | and esi, PHYID1_OUI_MASK |
770 | shl esi, PHYID1_OUI_SHFT |
776 | shl esi, PHYID1_OUI_SHFT |
771 | and eax, PHYID2_OUI_MASK |
777 | and eax, PHYID2_OUI_MASK |
772 | shr eax, PHYID2_OUI_SHFT |
778 | shr eax, PHYID2_OUI_SHFT |
773 | or eax, esi |
779 | or eax, esi |
774 | 780 | ||
775 | mov [ebx + device.phyaddr], edx |
781 | mov [ebx + device.phyaddr], edx |
776 | mov [ebx + device.phy_oui], eax |
782 | mov [ebx + device.phy_oui], eax |
777 | 783 | ||
778 | DEBUGF 1,"Found PHY with OUI:0x%x at address:0x%x\n", eax, edx |
784 | DEBUGF 1,"Found PHY with OUI:0x%x at address:0x%x\n", eax, edx |
779 | 785 | ||
780 | call phy_init |
786 | call phy_init |
781 | 787 | ||
782 | .no_phy: |
788 | .no_phy: |
783 | 789 | ||
784 | cmp [ebx + device.needs_mac_reset], 0 |
790 | cmp [ebx + device.needs_mac_reset], 0 |
785 | je @f |
791 | je @f |
786 | call mac_reset |
792 | call mac_reset |
787 | @@: |
793 | @@: |
788 | 794 | ||
789 | ;*************************************************************************** |
795 | ;*************************************************************************** |
790 | ; Function |
796 | ; Function |
791 | ; reset |
797 | ; reset |
792 | ; Description |
798 | ; Description |
793 | ; Place the chip (ie, the ethernet card) into a virgin state |
799 | ; Place the chip (ie, the ethernet card) into a virgin state |
794 | ; No inputs |
800 | ; No inputs |
795 | ; All registers destroyed |
801 | ; All registers destroyed |
796 | ; |
802 | ; |
797 | ;*************************************************************************** |
803 | ;*************************************************************************** |
798 | reset: |
804 | reset: |
799 | 805 | ||
800 | DEBUGF 1,"Resetting\n" |
806 | DEBUGF 1,"Resetting\n" |
801 | 807 | ||
802 | invoke PciRead8, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.interrupt_line |
808 | invoke PciRead8, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.interrupt_line |
803 | movzx eax, al |
809 | movzx eax, al |
804 | invoke AttachIntHandler, eax, int_handler, ebx |
810 | invoke AttachIntHandler, eax, int_handler, ebx |
805 | test eax, eax |
811 | test eax, eax |
806 | jnz @f |
812 | jnz @f |
807 | DEBUGF 2,"Could not attach int handler!\n" |
813 | DEBUGF 2,"Could not attach int handler!\n" |
808 | or eax, -1 |
814 | or eax, -1 |
809 | ret |
815 | ret |
810 | @@: |
816 | @@: |
811 | 817 | ||
812 | ; erase previous misconfiguration |
818 | ; erase previous misconfiguration |
813 | 819 | ||
814 | mov edi, [ebx + device.mmio_addr] |
820 | mov edi, [ebx + device.mmio_addr] |
815 | mov [MulticastAddrA], MCASTADDRA_FORCE |
821 | mov [MulticastAddrA], MCASTADDRA_FORCE |
816 | mov [MulticastAddrB], 0 |
822 | mov [MulticastAddrB], 0 |
817 | mov [MulticastMaskA], 0 |
823 | mov [MulticastMaskA], 0 |
818 | mov [MulticastMaskB], 0 |
824 | mov [MulticastMaskB], 0 |
819 | mov [PacketFilterFlags], 0 |
825 | mov [PacketFilterFlags], 0 |
820 | mov [TransmitterControl], 0 |
826 | mov [TransmitterControl], 0 |
821 | mov [ReceiverControl], 0 |
827 | mov [ReceiverControl], 0 |
822 | mov [AdapterControl], 0 |
828 | mov [AdapterControl], 0 |
823 | 829 | ||
824 | ; initialize descriptor rings |
830 | ; initialize descriptor rings |
825 | 831 | ||
826 | call init_ring |
832 | call init_ring |
827 | 833 | ||
828 | mov [LinkSpeed], 0 |
834 | mov [LinkSpeed], 0 |
829 | mov [UnknownTransmitterReg], 0 |
835 | mov [UnknownTransmitterReg], 0 |
830 | 836 | ||
831 | call txrx_reset |
837 | call txrx_reset |
832 | 838 | ||
833 | mov [UnknownSetupReg6], 0 |
839 | mov [UnknownSetupReg6], 0 |
834 | mov [ebx + device.in_shutdown], 0 |
840 | mov [ebx + device.in_shutdown], 0 |
835 | 841 | ||
836 | ; give hw rings |
842 | ; give hw rings |
837 | 843 | ||
838 | lea eax, [ebx + device.rx_ring] |
844 | lea eax, [ebx + device.rx_ring] |
839 | invoke GetPhysAddr |
845 | invoke GetPhysAddr |
840 | mov [RxRingPhysAddr], eax |
846 | mov [RxRingPhysAddr], eax |
841 | 847 | ||
842 | lea eax, [ebx + device.tx_ring] |
848 | lea eax, [ebx + device.tx_ring] |
843 | invoke GetPhysAddr |
849 | invoke GetPhysAddr |
844 | mov [TxRingPhysAddr], eax |
850 | mov [TxRingPhysAddr], eax |
845 | 851 | ||
846 | mov [RingSizes], (((RX_RING - 1) shl RINGSZ_RXSHIFT) + ((TX_RING - 1) shl RINGSZ_TXSHIFT)) |
852 | mov [RingSizes], (((RX_RING - 1) shl RINGSZ_RXSHIFT) + ((TX_RING - 1) shl RINGSZ_TXSHIFT)) |
847 | 853 | ||
848 | ; |
854 | ; |
849 | 855 | ||
850 | mov [ebx + device.linkspeed], (LINKSPEED_FORCE or LINKSPEED_10) |
856 | mov [ebx + device.linkspeed], (LINKSPEED_FORCE or LINKSPEED_10) |
851 | mov [ebx + device.duplex], 0 |
857 | mov [ebx + device.duplex], 0 |
852 | mov [LinkSpeed], (LINKSPEED_FORCE or LINKSPEED_10) |
858 | mov [LinkSpeed], (LINKSPEED_FORCE or LINKSPEED_10) |
853 | mov [UnknownSetupReg3], UNKSETUP3_VAL1 |
859 | mov [UnknownSetupReg3], UNKSETUP3_VAL1 |
854 | 860 | ||
855 | mov eax, [ebx + device.desc_ver] |
861 | mov eax, [ebx + device.desc_ver] |
856 | mov [TxRxControl], eax |
862 | mov [TxRxControl], eax |
857 | call pci_push |
863 | call pci_push |
858 | or eax, TXRXCTL_BIT1 |
864 | or eax, TXRXCTL_BIT1 |
859 | mov [TxRxControl], eax |
865 | mov [TxRxControl], eax |
860 | 866 | ||
861 | stdcall reg_delay, UnknownSetupReg5-edi, UNKSETUP5_BIT31, UNKSETUP5_BIT31, NV_SETUP5_DELAY, NV_SETUP5_DELAYMAX, 0 |
867 | stdcall reg_delay, UnknownSetupReg5-edi, UNKSETUP5_BIT31, UNKSETUP5_BIT31, NV_SETUP5_DELAY, NV_SETUP5_DELAYMAX, 0 |
862 | 868 | ||
863 | mov [UnknownSetupReg4], 0 |
869 | mov [UnknownSetupReg4], 0 |
864 | mov [MIIStatus], MIISTAT_MASK2 |
870 | mov [MIIStatus], MIISTAT_MASK2 |
865 | 871 | ||
866 | ; |
872 | ; |
867 | 873 | ||
868 | mov [Misc1], (MISC1_FORCE or MISC1_HD) |
874 | mov [Misc1], (MISC1_FORCE or MISC1_HD) |
869 | 875 | ||
870 | mov eax, [TransmitterStatus] |
876 | mov eax, [TransmitterStatus] |
871 | mov [TransmitterStatus], eax |
877 | mov [TransmitterStatus], eax |
872 | 878 | ||
873 | mov [PacketFilterFlags], PFF_ALWAYS |
879 | mov [PacketFilterFlags], PFF_ALWAYS |
874 | 880 | ||
875 | mov [OffloadConfig], OFFLOAD_NORMAL |
881 | mov [OffloadConfig], OFFLOAD_NORMAL |
876 | 882 | ||
877 | mov eax, [ReceiverStatus] |
883 | mov eax, [ReceiverStatus] |
878 | mov [ReceiverStatus], eax |
884 | mov [ReceiverStatus], eax |
879 | 885 | ||
880 | ; set random seed |
886 | ; set random seed |
881 | push ebx |
887 | push ebx |
882 | invoke GetTimerTicks ; bad idea, driver is started at system startup in 90% of cases.. |
888 | invoke GetTimerTicks ; bad idea, driver is started at system startup in 90% of cases.. |
883 | pop ebx |
889 | pop ebx |
884 | 890 | ||
885 | mov edi, [ebx + device.mmio_addr] |
891 | mov edi, [ebx + device.mmio_addr] |
886 | 892 | ||
887 | and eax, RNDSEED_MASK |
893 | and eax, RNDSEED_MASK |
888 | or eax, RNDSEED_FORCE |
894 | or eax, RNDSEED_FORCE |
889 | mov [RandomSeed], eax |
895 | mov [RandomSeed], eax |
890 | 896 | ||
891 | mov [UnknownSetupReg1], UNKSETUP1_VAL |
897 | mov [UnknownSetupReg1], UNKSETUP1_VAL |
892 | mov [UnknownSetupReg2], UNKSETUP2_VAL |
898 | mov [UnknownSetupReg2], UNKSETUP2_VAL |
893 | mov [PollingInterval], POLL_DEFAULT |
899 | mov [PollingInterval], POLL_DEFAULT |
894 | mov [UnknownSetupReg6], UNKSETUP6_VAL |
900 | mov [UnknownSetupReg6], UNKSETUP6_VAL |
895 | 901 | ||
896 | mov eax, [ebx + device.phyaddr] |
902 | mov eax, [ebx + device.phyaddr] |
897 | shl eax, ADAPTCTL_PHYSHIFT |
903 | shl eax, ADAPTCTL_PHYSHIFT |
898 | or eax, (ADAPTCTL_PHYVALID or ADAPTCTL_RUNNING) |
904 | or eax, (ADAPTCTL_PHYVALID or ADAPTCTL_RUNNING) |
899 | mov [AdapterControl], eax |
905 | mov [AdapterControl], eax |
900 | 906 | ||
901 | mov [MIISpeed], (MIISPEED_BIT8 or MIIDELAY) |
907 | mov [MIISpeed], (MIISPEED_BIT8 or MIIDELAY) |
902 | mov [UnknownSetupReg4], UNKSETUP4_VAL |
908 | mov [UnknownSetupReg4], UNKSETUP4_VAL |
903 | mov [WakeUpFlags], WAKEUPFLAGS_VAL |
909 | mov [WakeUpFlags], WAKEUPFLAGS_VAL |
904 | 910 | ||
905 | or [PowerState], POWERSTATE_POWEREDUP |
911 | or [PowerState], POWERSTATE_POWEREDUP |
906 | call pci_push |
912 | call pci_push |
907 | 913 | ||
908 | mov esi, 10 |
914 | mov esi, 10 |
909 | invoke Sleep |
915 | invoke Sleep |
910 | 916 | ||
911 | or [PowerState], POWERSTATE_VALID |
917 | or [PowerState], POWERSTATE_VALID |
912 | mov [IrqMask], 0 |
918 | mov [IrqMask], 0 |
913 | 919 | ||
914 | ;;; ; ??? Mask RX interrupts |
920 | ;;; ; ??? Mask RX interrupts |
915 | mov [IrqMask], IRQ_RX_ALL + IRQ_TX_ALL |
921 | mov [IrqMask], IRQ_RX_ALL + IRQ_TX_ALL |
916 | ;;; ; ??? Mask TX interrupts |
922 | ;;; ; ??? Mask TX interrupts |
917 | ;;; mov [IrqMask], IRQ_TX_ALL |
923 | ;;; mov [IrqMask], IRQ_TX_ALL |
918 | ;;; ; ??? Mask OTHER interrupts |
924 | ;;; ; ??? Mask OTHER interrupts |
919 | ;;; mov [IrqMask], IRQ_OTHER_ALL |
925 | ;;; mov [IrqMask], IRQ_OTHER_ALL |
920 | call pci_push |
926 | call pci_push |
921 | 927 | ||
922 | mov [MIIStatus], MIISTAT_MASK2 |
928 | mov [MIIStatus], MIISTAT_MASK2 |
923 | mov [IrqStatus], IRQSTAT_MASK |
929 | mov [IrqStatus], IRQSTAT_MASK |
924 | call pci_push |
930 | call pci_push |
925 | 931 | ||
926 | mov [MulticastAddrA], MCASTADDRA_FORCE |
932 | mov [MulticastAddrA], MCASTADDRA_FORCE |
927 | mov [MulticastAddrB], 0 |
933 | mov [MulticastAddrB], 0 |
928 | mov [MulticastMaskA], 0 |
934 | mov [MulticastMaskA], 0 |
929 | mov [MulticastMaskB], 0 |
935 | mov [MulticastMaskB], 0 |
930 | 936 | ||
931 | mov [PacketFilterFlags], (PFF_ALWAYS or PFF_MYADDR) |
937 | mov [PacketFilterFlags], (PFF_ALWAYS or PFF_MYADDR) |
932 | 938 | ||
933 | call set_multicast |
939 | call set_multicast |
934 | 940 | ||
935 | ; One manual link speed update: Interrupts are enabled, future link |
941 | ; One manual link speed update: Interrupts are enabled, future link |
936 | ; speed changes cause interrupts and are handled by nv_link_irq(). |
942 | ; speed changes cause interrupts and are handled by nv_link_irq(). |
937 | 943 | ||
938 | mov eax, [MIIStatus] |
944 | mov eax, [MIIStatus] |
939 | mov [MIIStatus], MIISTAT_MASK |
945 | mov [MIIStatus], MIISTAT_MASK |
940 | DEBUGF 1,"startup: got 0x%x\n", eax |
946 | DEBUGF 1,"startup: got 0x%x\n", eax |
941 | 947 | ||
942 | call update_linkspeed |
948 | call update_linkspeed |
943 | 949 | ||
944 | mov [TransmitterControl], XMITCTL_START ; start TX |
950 | mov [TransmitterControl], XMITCTL_START ; start TX |
945 | call pci_push |
951 | call pci_push |
946 | 952 | ||
947 | mov [ebx + device.nocable], 0 |
953 | mov [ebx + device.nocable], 0 |
948 | test eax, eax |
954 | test eax, eax |
949 | jnz .return |
955 | jnz .return |
950 | DEBUGF 1,"no link during initialization.\n" |
956 | DEBUGF 1,"no link during initialization.\n" |
951 | mov [ebx + device.nocable], 1 |
957 | mov [ebx + device.nocable], 1 |
952 | 958 | ||
953 | .return: |
959 | .return: |
954 | xor eax, eax ; Indicate that we have successfully reset the card |
960 | xor eax, eax ; Indicate that we have successfully reset the card |
955 | mov [ebx + device.mtu], 1514 ;;; FIXME |
961 | mov [ebx + device.mtu], 1514 ;;; FIXME |
956 | ret |
962 | ret |
957 | 963 | ||
958 | 964 | ||
959 | fail: |
965 | fail: |
960 | or eax, -1 |
966 | or eax, -1 |
961 | ret |
967 | ret |
962 | 968 | ||
963 | ;-------------------------------------------------------- |
969 | ;-------------------------------------------------------- |
964 | ; |
970 | ; |
965 | ; MII_RW |
971 | ; MII_RW |
966 | ; |
972 | ; |
967 | ; read/write a register on the PHY. |
973 | ; read/write a register on the PHY. |
968 | ; Caller must guarantee serialization |
974 | ; Caller must guarantee serialization |
969 | ; Input: EAX - miireg, EDX - phy addr, ECX - value to write (or -1 to read) |
975 | ; Input: EAX - miireg, EDX - phy addr, ECX - value to write (or -1 to read) |
970 | ; Output: EAX - retval (lower 16 bits) |
976 | ; Output: EAX - retval (lower 16 bits) |
971 | ; |
977 | ; |
972 | ;-------------------------------------------------------- |
978 | ;-------------------------------------------------------- |
973 | 979 | ||
974 | mii_rw: |
980 | mii_rw: |
975 | 981 | ||
976 | DEBUGF 1,"mii_rw: 0x%x to reg %d at PHY %d\n", ecx, eax, edx |
982 | DEBUGF 1,"mii_rw: 0x%x to reg %d at PHY %d\n", ecx, eax, edx |
977 | 983 | ||
978 | push edx |
984 | push edx |
979 | 985 | ||
980 | mov edi, [ebx + device.mmio_addr] |
986 | mov edi, [ebx + device.mmio_addr] |
981 | 987 | ||
982 | ; Check if MII interface is busy |
988 | ; Check if MII interface is busy |
983 | mov [MIIStatus], MIISTAT_MASK |
989 | mov [MIIStatus], MIISTAT_MASK |
984 | @@: |
990 | @@: |
985 | test [MIIControl], MIICTL_INUSE |
991 | test [MIIControl], MIICTL_INUSE |
986 | jz @f |
992 | jz @f |
987 | mov [MIIControl], MIICTL_INUSE |
993 | mov [MIIControl], MIICTL_INUSE |
988 | 994 | ||
989 | DEBUGF 1,"mii_rw: in use!\n" |
995 | DEBUGF 1,"mii_rw: in use!\n" |
990 | pusha |
996 | pusha |
991 | mov esi, NV_MIIBUSY_DELAY |
997 | mov esi, NV_MIIBUSY_DELAY |
992 | invoke Sleep |
998 | invoke Sleep |
993 | popa |
999 | popa |
994 | jmp @r |
1000 | jmp @r |
995 | @@: |
1001 | @@: |
996 | 1002 | ||
997 | ; Set the address we want to access |
1003 | ; Set the address we want to access |
998 | shl edx, MIICTL_ADDRSHIFT |
1004 | shl edx, MIICTL_ADDRSHIFT |
999 | or edx, eax |
1005 | or edx, eax |
1000 | 1006 | ||
1001 | ; When writing, write the data first. |
1007 | ; When writing, write the data first. |
1002 | cmp ecx, MII_READ |
1008 | cmp ecx, MII_READ |
1003 | je @f |
1009 | je @f |
1004 | mov [MIIData], ecx |
1010 | mov [MIIData], ecx |
1005 | or edx, MIICTL_WRITE |
1011 | or edx, MIICTL_WRITE |
1006 | @@: |
1012 | @@: |
1007 | 1013 | ||
1008 | mov [MIIControl], edx |
1014 | mov [MIIControl], edx |
1009 | 1015 | ||
1010 | ; Wait for read/write to complete |
1016 | ; Wait for read/write to complete |
1011 | stdcall reg_delay, MIIControl-edi, MIICTL_INUSE, 0, NV_MIIPHY_DELAY, NV_MIIPHY_DELAYMAX, 0 |
1017 | stdcall reg_delay, MIIControl-edi, MIICTL_INUSE, 0, NV_MIIPHY_DELAY, NV_MIIPHY_DELAYMAX, 0 |
1012 | 1018 | ||
1013 | test eax, eax |
1019 | test eax, eax |
1014 | jz @f |
1020 | jz @f |
1015 | DEBUGF 1,"mii_rw timed out.\n" |
1021 | DEBUGF 1,"mii_rw timed out.\n" |
1016 | or eax, -1 |
1022 | or eax, -1 |
1017 | jmp .return |
1023 | jmp .return |
1018 | 1024 | ||
1019 | @@: |
1025 | @@: |
1020 | cmp ecx, MII_READ |
1026 | cmp ecx, MII_READ |
1021 | je .read |
1027 | je .read |
1022 | ; it was a write operation - fewer failures are detectable |
1028 | ; it was a write operation - fewer failures are detectable |
1023 | DEBUGF 1,"mii_rw write: ok\n" |
1029 | DEBUGF 1,"mii_rw write: ok\n" |
1024 | xor eax, eax |
1030 | xor eax, eax |
1025 | jmp .return |
1031 | jmp .return |
1026 | 1032 | ||
1027 | .read: |
1033 | .read: |
1028 | mov eax, [MIIStatus] |
1034 | mov eax, [MIIStatus] |
1029 | test eax, MIISTAT_ERROR |
1035 | test eax, MIISTAT_ERROR |
1030 | jz @f |
1036 | jz @f |
1031 | DEBUGF 1,"mii read: failed.\n" |
1037 | DEBUGF 1,"mii read: failed.\n" |
1032 | or eax, -1 |
1038 | or eax, -1 |
1033 | jmp .return |
1039 | jmp .return |
1034 | 1040 | ||
1035 | @@: |
1041 | @@: |
1036 | mov eax, [MIIData] |
1042 | mov eax, [MIIData] |
1037 | DEBUGF 1,"mii read: 0x%x.\n", eax |
1043 | DEBUGF 1,"mii read: 0x%x.\n", eax |
1038 | 1044 | ||
1039 | .return: |
1045 | .return: |
1040 | pop edx |
1046 | pop edx |
1041 | ret |
1047 | ret |
1042 | 1048 | ||
1043 | 1049 | ||
1044 | 1050 | ||
1045 | 1051 | ||
1046 | 1052 | ||
1047 | ; Input: offset:word, mask:dword, target:dword, delay:word, delaymax:word, msg:dword |
1053 | ; Input: offset:word, mask:dword, target:dword, delay:word, delaymax:word, msg:dword |
1048 | ; Output: EAX - 0|1 |
1054 | ; Output: EAX - 0|1 |
1049 | 1055 | ||
1050 | proc reg_delay, offset:dword, mask:dword, target:dword, delay:dword, delaymax:dword, msg:dword |
1056 | proc reg_delay, offset:dword, mask:dword, target:dword, delay:dword, delaymax:dword, msg:dword |
1051 | 1057 | ||
1052 | ; DEBUGF 1,"reg_delay\n" |
1058 | ; DEBUGF 1,"reg_delay\n" |
1053 | 1059 | ||
1054 | push esi |
1060 | push esi |
1055 | call pci_push |
1061 | call pci_push |
1056 | 1062 | ||
1057 | .loop: |
1063 | .loop: |
1058 | mov esi, [delay] |
1064 | mov esi, [delay] |
1059 | invoke Sleep |
1065 | invoke Sleep |
1060 | mov eax, [delaymax] |
1066 | mov eax, [delaymax] |
1061 | sub eax, [delay] |
1067 | sub eax, [delay] |
1062 | mov [delaymax], eax |
1068 | mov [delaymax], eax |
1063 | 1069 | ||
1064 | cmp eax, 0 |
1070 | cmp eax, 0 |
1065 | jl .fail |
1071 | jl .fail |
1066 | 1072 | ||
1067 | mov eax, [offset] |
1073 | mov eax, [offset] |
1068 | mov eax, [edi + eax] |
1074 | mov eax, [edi + eax] |
1069 | and eax, [mask] |
1075 | and eax, [mask] |
1070 | cmp eax, [target] |
1076 | cmp eax, [target] |
1071 | jne .loop |
1077 | jne .loop |
1072 | 1078 | ||
1073 | pop esi |
1079 | pop esi |
1074 | xor eax, eax |
1080 | xor eax, eax |
1075 | ret |
1081 | ret |
1076 | 1082 | ||
1077 | .fail: |
1083 | .fail: |
1078 | pop esi |
1084 | pop esi |
1079 | xor eax, eax |
1085 | xor eax, eax |
1080 | inc eax |
1086 | inc eax |
1081 | ret |
1087 | ret |
1082 | 1088 | ||
1083 | endp |
1089 | endp |
1084 | 1090 | ||
1085 | 1091 | ||
1086 | 1092 | ||
1087 | 1093 | ||
1088 | 1094 | ||
1089 | ; Input: none |
1095 | ; Input: none |
1090 | ; Output: EAX - result (0 = OK, other = error) |
1096 | ; Output: EAX - result (0 = OK, other = error) |
1091 | phy_init: |
1097 | phy_init: |
1092 | 1098 | ||
1093 | push ebx ecx |
1099 | push ebx ecx |
1094 | 1100 | ||
1095 | ; set advertise register |
1101 | ; set advertise register |
1096 | mov edx, [ebx + device.phyaddr] |
1102 | mov edx, [ebx + device.phyaddr] |
1097 | mov eax, MII_ADVERTISE |
1103 | mov eax, MII_ADVERTISE |
1098 | mov ecx, MII_READ |
1104 | mov ecx, MII_READ |
1099 | call mii_rw |
1105 | call mii_rw |
1100 | 1106 | ||
1101 | or eax, (ADVERTISE_10HALF or ADVERTISE_10FULL or ADVERTISE_100HALF or ADVERTISE_100FULL or 0x800 or 0x400) |
1107 | or eax, (ADVERTISE_10HALF or ADVERTISE_10FULL or ADVERTISE_100HALF or ADVERTISE_100FULL or 0x800 or 0x400) |
1102 | 1108 | ||
1103 | mov ecx, eax |
1109 | mov ecx, eax |
1104 | mov eax, MII_ADVERTISE |
1110 | mov eax, MII_ADVERTISE |
1105 | call mii_rw |
1111 | call mii_rw |
1106 | 1112 | ||
1107 | test eax, eax |
1113 | test eax, eax |
1108 | jz @f |
1114 | jz @f |
1109 | 1115 | ||
1110 | DEBUGF 2,"phy write to advertise failed.\n" |
1116 | DEBUGF 2,"phy write to advertise failed.\n" |
1111 | 1117 | ||
1112 | mov eax, PHY_ERROR |
1118 | mov eax, PHY_ERROR |
1113 | jmp .return |
1119 | jmp .return |
1114 | @@: |
1120 | @@: |
1115 | 1121 | ||
1116 | ; get phy interface type |
1122 | ; get phy interface type |
1117 | mov edi, [ebx + device.mmio_addr] |
1123 | mov edi, [ebx + device.mmio_addr] |
1118 | mov eax, [PhyInterface] |
1124 | mov eax, [PhyInterface] |
1119 | DEBUGF 1,"phy interface type = 0x%x\n", eax:8 |
1125 | DEBUGF 1,"phy interface type = 0x%x\n", eax:8 |
1120 | 1126 | ||
1121 | ; see if gigabit phy |
1127 | ; see if gigabit phy |
1122 | mov eax, MII_BMSR |
1128 | mov eax, MII_BMSR |
1123 | mov ecx, MII_READ |
1129 | mov ecx, MII_READ |
1124 | call mii_rw |
1130 | call mii_rw |
1125 | 1131 | ||
1126 | test eax, PHY_GIGABIT |
1132 | test eax, PHY_GIGABIT |
1127 | jnz .gigabit |
1133 | jnz .gigabit |
1128 | mov [ebx + device.gigabit], 0 |
1134 | mov [ebx + device.gigabit], 0 |
1129 | jmp .next_if |
1135 | jmp .next_if |
1130 | 1136 | ||
1131 | .gigabit: |
1137 | .gigabit: |
1132 | mov [ebx + device.gigabit], PHY_GIGABIT |
1138 | mov [ebx + device.gigabit], PHY_GIGABIT |
1133 | 1139 | ||
1134 | mov eax, MII_CTRL1000 |
1140 | mov eax, MII_CTRL1000 |
1135 | mov ecx, MII_READ |
1141 | mov ecx, MII_READ |
1136 | call mii_rw |
1142 | call mii_rw |
1137 | 1143 | ||
1138 | and eax, (not ADVERTISE_1000HALF) |
1144 | and eax, (not ADVERTISE_1000HALF) |
1139 | 1145 | ||
1140 | test [PhyInterface], PHY_RGMII |
1146 | test [PhyInterface], PHY_RGMII |
1141 | jz @f |
1147 | jz @f |
1142 | or eax, ADVERTISE_1000FULL |
1148 | or eax, ADVERTISE_1000FULL |
1143 | jmp .next |
1149 | jmp .next |
1144 | @@: |
1150 | @@: |
1145 | 1151 | ||
1146 | and eax, (not ADVERTISE_1000FULL) |
1152 | and eax, (not ADVERTISE_1000FULL) |
1147 | 1153 | ||
1148 | .next: |
1154 | .next: |
1149 | mov ecx, eax |
1155 | mov ecx, eax |
1150 | mov eax, MII_CTRL1000 |
1156 | mov eax, MII_CTRL1000 |
1151 | call mii_rw |
1157 | call mii_rw |
1152 | 1158 | ||
1153 | test eax, eax |
1159 | test eax, eax |
1154 | jz .next_if |
1160 | jz .next_if |
1155 | 1161 | ||
1156 | DEBUGF 2,"phy init failed.\n" |
1162 | DEBUGF 2,"phy init failed.\n" |
1157 | 1163 | ||
1158 | mov eax, PHY_ERROR |
1164 | mov eax, PHY_ERROR |
1159 | jmp .return |
1165 | jmp .return |
1160 | 1166 | ||
1161 | .next_if: |
1167 | .next_if: |
1162 | 1168 | ||
1163 | call phy_reset |
1169 | call phy_reset |
1164 | test eax, eax |
1170 | test eax, eax |
1165 | jz @f |
1171 | jz @f |
1166 | 1172 | ||
1167 | DEBUGF 2,"phy reset failed.\n" |
1173 | DEBUGF 2,"phy reset failed.\n" |
1168 | 1174 | ||
1169 | mov eax, PHY_ERROR |
1175 | mov eax, PHY_ERROR |
1170 | jmp .return |
1176 | jmp .return |
1171 | @@: |
1177 | @@: |
1172 | 1178 | ||
1173 | ; phy vendor specific configuration |
1179 | ; phy vendor specific configuration |
1174 | cmp [ebx + device.phy_oui], PHY_OUI_CICADA |
1180 | cmp [ebx + device.phy_oui], PHY_OUI_CICADA |
1175 | jne .next_if2 |
1181 | jne .next_if2 |
1176 | test [PhyInterface], PHY_RGMII |
1182 | test [PhyInterface], PHY_RGMII |
1177 | jz .next_if2 |
1183 | jz .next_if2 |
1178 | 1184 | ||
1179 | mov eax, MII_RESV1 |
1185 | mov eax, MII_RESV1 |
1180 | mov ecx, MII_READ |
1186 | mov ecx, MII_READ |
1181 | call mii_rw |
1187 | call mii_rw |
1182 | 1188 | ||
1183 | and eax, (not (PHY_INIT1 or PHY_INIT2)) |
1189 | and eax, (not (PHY_INIT1 or PHY_INIT2)) |
1184 | or eax, (PHY_INIT3 or PHY_INIT4) |
1190 | or eax, (PHY_INIT3 or PHY_INIT4) |
1185 | mov ecx, eax |
1191 | mov ecx, eax |
1186 | mov eax, MII_RESV1 |
1192 | mov eax, MII_RESV1 |
1187 | call mii_rw |
1193 | call mii_rw |
1188 | 1194 | ||
1189 | test eax, eax |
1195 | test eax, eax |
1190 | jz @f |
1196 | jz @f |
1191 | 1197 | ||
1192 | DEBUGF 2,"phy init failed.\n" |
1198 | DEBUGF 2,"phy init failed.\n" |
1193 | 1199 | ||
1194 | mov eax, PHY_ERROR |
1200 | mov eax, PHY_ERROR |
1195 | jmp .return |
1201 | jmp .return |
1196 | @@: |
1202 | @@: |
1197 | 1203 | ||
1198 | mov eax, MII_NCONFIG |
1204 | mov eax, MII_NCONFIG |
1199 | mov ecx, MII_READ |
1205 | mov ecx, MII_READ |
1200 | call mii_rw |
1206 | call mii_rw |
1201 | 1207 | ||
1202 | or eax, PHY_INIT5 |
1208 | or eax, PHY_INIT5 |
1203 | mov ecx, eax |
1209 | mov ecx, eax |
1204 | mov eax, MII_NCONFIG |
1210 | mov eax, MII_NCONFIG |
1205 | call mii_rw |
1211 | call mii_rw |
1206 | test eax, eax |
1212 | test eax, eax |
1207 | jz .next_if2 |
1213 | jz .next_if2 |
1208 | 1214 | ||
1209 | DEBUGF 2,"phy init failed.\n" |
1215 | DEBUGF 2,"phy init failed.\n" |
1210 | 1216 | ||
1211 | mov eax, PHY_ERROR |
1217 | mov eax, PHY_ERROR |
1212 | jmp .return |
1218 | jmp .return |
1213 | 1219 | ||
1214 | 1220 | ||
1215 | 1221 | ||
1216 | .next_if2: |
1222 | .next_if2: |
1217 | 1223 | ||
1218 | cmp [ebx + device.phy_oui], PHY_OUI_CICADA |
1224 | cmp [ebx + device.phy_oui], PHY_OUI_CICADA |
1219 | jne .restart |
1225 | jne .restart |
1220 | 1226 | ||
1221 | mov eax, MII_SREVISION |
1227 | mov eax, MII_SREVISION |
1222 | mov ecx, MII_READ |
1228 | mov ecx, MII_READ |
1223 | call mii_rw |
1229 | call mii_rw |
1224 | 1230 | ||
1225 | or eax, PHY_INIT6 |
1231 | or eax, PHY_INIT6 |
1226 | mov ecx, eax |
1232 | mov ecx, eax |
1227 | mov eax, MII_SREVISION |
1233 | mov eax, MII_SREVISION |
1228 | call mii_rw |
1234 | call mii_rw |
1229 | test eax, eax |
1235 | test eax, eax |
1230 | jz .restart |
1236 | jz .restart |
1231 | 1237 | ||
1232 | DEBUGF 2,"phy init failed.\n" |
1238 | DEBUGF 2,"phy init failed.\n" |
1233 | 1239 | ||
1234 | jmp .return |
1240 | jmp .return |
1235 | 1241 | ||
1236 | .restart: |
1242 | .restart: |
1237 | ; restart auto negotiation |
1243 | ; restart auto negotiation |
1238 | 1244 | ||
1239 | mov eax, MII_BMCR |
1245 | mov eax, MII_BMCR |
1240 | mov ecx, MII_READ |
1246 | mov ecx, MII_READ |
1241 | call mii_rw |
1247 | call mii_rw |
1242 | 1248 | ||
1243 | or eax, (BMCR_ANRESTART or BMCR_ANENABLE) |
1249 | or eax, (BMCR_ANRESTART or BMCR_ANENABLE) |
1244 | mov ecx, eax |
1250 | mov ecx, eax |
1245 | mov eax, MII_BMCR |
1251 | mov eax, MII_BMCR |
1246 | call mii_rw |
1252 | call mii_rw |
1247 | test eax, eax |
1253 | test eax, eax |
1248 | jz .ok |
1254 | jz .ok |
1249 | 1255 | ||
1250 | mov eax, PHY_ERROR |
1256 | mov eax, PHY_ERROR |
1251 | jmp .return |
1257 | jmp .return |
1252 | 1258 | ||
1253 | .ok: |
1259 | .ok: |
1254 | xor eax, eax |
1260 | xor eax, eax |
1255 | .return: |
1261 | .return: |
1256 | pop ecx ebx |
1262 | pop ecx ebx |
1257 | 1263 | ||
1258 | ret |
1264 | ret |
1259 | 1265 | ||
1260 | 1266 | ||
1261 | ; Input: none |
1267 | ; Input: none |
1262 | ; Output: EAX - result (0 = OK, other = error) |
1268 | ; Output: EAX - result (0 = OK, other = error) |
1263 | phy_reset: |
1269 | phy_reset: |
1264 | 1270 | ||
1265 | DEBUGF 1,"phy_reset\n" |
1271 | DEBUGF 1,"phy_reset\n" |
1266 | 1272 | ||
1267 | push ebx ecx edx |
1273 | push ebx ecx edx |
1268 | 1274 | ||
1269 | mov edx, [ebx + device.phyaddr] |
1275 | mov edx, [ebx + device.phyaddr] |
1270 | mov eax, MII_BMCR |
1276 | mov eax, MII_BMCR |
1271 | mov ecx, MII_READ |
1277 | mov ecx, MII_READ |
1272 | call mii_rw |
1278 | call mii_rw |
1273 | 1279 | ||
1274 | or eax, BMCR_RESET |
1280 | or eax, BMCR_RESET |
1275 | push eax |
1281 | push eax |
1276 | mov ecx, eax |
1282 | mov ecx, eax |
1277 | mov eax, MII_BMCR |
1283 | mov eax, MII_BMCR |
1278 | call mii_rw |
1284 | call mii_rw |
1279 | 1285 | ||
1280 | test eax, eax |
1286 | test eax, eax |
1281 | jz @f |
1287 | jz @f |
1282 | 1288 | ||
1283 | pop eax |
1289 | pop eax |
1284 | mov eax, 0xffffffff |
1290 | mov eax, 0xffffffff |
1285 | jmp .return |
1291 | jmp .return |
1286 | @@: |
1292 | @@: |
1287 | 1293 | ||
1288 | pop eax |
1294 | pop eax |
1289 | 1295 | ||
1290 | mov esi, 500 |
1296 | mov esi, 500 |
1291 | invoke Sleep |
1297 | invoke Sleep |
1292 | 1298 | ||
1293 | ; must wait till reset is deasserted |
1299 | ; must wait till reset is deasserted |
1294 | mov esi, 100 ; FIXME: 100 tries seem excessive |
1300 | mov esi, 100 ; FIXME: 100 tries seem excessive |
1295 | .while_loop: |
1301 | .while_loop: |
1296 | test eax, BMCR_RESET |
1302 | test eax, BMCR_RESET |
1297 | jz .while_loop_exit |
1303 | jz .while_loop_exit |
1298 | 1304 | ||
1299 | push esi |
1305 | push esi |
1300 | mov esi, 10 |
1306 | mov esi, 10 |
1301 | invoke Sleep |
1307 | invoke Sleep |
1302 | pop esi |
1308 | pop esi |
1303 | 1309 | ||
1304 | mov eax, MII_BMCR |
1310 | mov eax, MII_BMCR |
1305 | mov ecx, MII_READ |
1311 | mov ecx, MII_READ |
1306 | call mii_rw |
1312 | call mii_rw |
1307 | 1313 | ||
1308 | dec esi |
1314 | dec esi |
1309 | jnz .while_loop |
1315 | jnz .while_loop |
1310 | 1316 | ||
1311 | mov eax, 0xffffffff |
1317 | mov eax, 0xffffffff |
1312 | jmp .return |
1318 | jmp .return |
1313 | 1319 | ||
1314 | .while_loop_exit: |
1320 | .while_loop_exit: |
1315 | xor eax, eax |
1321 | xor eax, eax |
1316 | .return: |
1322 | .return: |
1317 | pop edx ecx ebx |
1323 | pop edx ecx ebx |
1318 | 1324 | ||
1319 | ret |
1325 | ret |
1320 | 1326 | ||
1321 | 1327 | ||
1322 | align 4 |
1328 | align 4 |
1323 | pci_push: |
1329 | pci_push: |
1324 | 1330 | ||
1325 | push eax |
1331 | push eax |
1326 | mov eax, [edi] |
1332 | mov eax, [edi] |
1327 | pop eax |
1333 | pop eax |
1328 | 1334 | ||
1329 | ret |
1335 | ret |
1330 | 1336 | ||
1331 | 1337 | ||
1332 | 1338 | ||
1333 | 1339 | ||
1334 | align 4 |
1340 | align 4 |
1335 | mac_reset: |
1341 | mac_reset: |
1336 | 1342 | ||
1337 | push esi edi |
1343 | push esi edi |
1338 | 1344 | ||
1339 | DEBUGF 1,"mac_reset.\n" |
1345 | DEBUGF 1,"mac_reset.\n" |
1340 | 1346 | ||
1341 | mov edi, [ebx + device.mmio_addr] |
1347 | mov edi, [ebx + device.mmio_addr] |
1342 | mov eax, [ebx + device.desc_ver] |
1348 | mov eax, [ebx + device.desc_ver] |
1343 | or eax, (TXRXCTL_BIT2 or TXRXCTL_RESET) |
1349 | or eax, (TXRXCTL_BIT2 or TXRXCTL_RESET) |
1344 | mov [TxRxControl], eax |
1350 | mov [TxRxControl], eax |
1345 | call pci_push |
1351 | call pci_push |
1346 | 1352 | ||
1347 | mov [MacReset], MAC_RESET_ASSERT |
1353 | mov [MacReset], MAC_RESET_ASSERT |
1348 | call pci_push |
1354 | call pci_push |
1349 | 1355 | ||
1350 | mov esi, NV_MAC_RESET_DELAY |
1356 | mov esi, NV_MAC_RESET_DELAY |
1351 | invoke Sleep |
1357 | invoke Sleep |
1352 | 1358 | ||
1353 | mov [MacReset], 0 |
1359 | mov [MacReset], 0 |
1354 | call pci_push |
1360 | call pci_push |
1355 | 1361 | ||
1356 | mov esi, NV_MAC_RESET_DELAY |
1362 | mov esi, NV_MAC_RESET_DELAY |
1357 | invoke Sleep |
1363 | invoke Sleep |
1358 | 1364 | ||
1359 | mov eax, [ebx + device.desc_ver] |
1365 | mov eax, [ebx + device.desc_ver] |
1360 | or eax, TXRXCTL_BIT2 |
1366 | or eax, TXRXCTL_BIT2 |
1361 | mov [TxRxControl], eax |
1367 | mov [TxRxControl], eax |
1362 | call pci_push |
1368 | call pci_push |
1363 | 1369 | ||
1364 | pop edi esi |
1370 | pop edi esi |
1365 | 1371 | ||
1366 | ret |
1372 | ret |
1367 | 1373 | ||
1368 | 1374 | ||
1369 | 1375 | ||
1370 | align 4 |
1376 | align 4 |
1371 | init_ring: |
1377 | init_ring: |
1372 | 1378 | ||
1373 | DEBUGF 1,"init rings\n" |
1379 | DEBUGF 1,"init rings\n" |
1374 | push esi ecx |
1380 | push esi ecx |
1375 | 1381 | ||
1376 | mov [ebx + device.cur_tx], 0 |
1382 | mov [ebx + device.cur_tx], 0 |
1377 | mov [ebx + device.last_tx], 0 |
1383 | mov [ebx + device.last_tx], 0 |
1378 | 1384 | ||
1379 | mov ecx, TX_RING |
1385 | mov ecx, TX_RING |
1380 | lea esi, [ebx + device.tx_ring] |
1386 | lea esi, [ebx + device.tx_ring] |
1381 | .tx_loop: |
1387 | .tx_loop: |
1382 | mov [esi + TxDesc.FlagLen], 0 |
1388 | mov [esi + TxDesc.FlagLen], 0 |
1383 | mov [esi + TxDesc.PacketBuffer], 0 |
1389 | mov [esi + TxDesc.PacketBuffer], 0 |
1384 | add esi, sizeof.TxDesc |
1390 | add esi, sizeof.TxDesc |
1385 | dec ecx |
1391 | dec ecx |
1386 | jnz .tx_loop |
1392 | jnz .tx_loop |
1387 | 1393 | ||
1388 | 1394 | ||
1389 | mov [ebx + device.cur_rx], 0 |
1395 | mov [ebx + device.cur_rx], 0 |
1390 | 1396 | ||
1391 | mov ecx, RX_RING |
1397 | mov ecx, RX_RING |
1392 | lea esi, [ebx + device.rx_ring] |
1398 | lea esi, [ebx + device.rx_ring] |
1393 | .rx_loop: |
1399 | .rx_loop: |
1394 | push ecx esi |
1400 | push ecx esi |
1395 | invoke NetAlloc, (4096 shl RBLEN) + NET_BUFF.data ; push/pop esi not needed, but just in case... |
1401 | invoke NetAlloc, (4096 shl RBLEN) + NET_BUFF.data ; push/pop esi not needed, but just in case... |
1396 | pop esi |
1402 | pop esi |
1397 | test eax, eax |
1403 | test eax, eax |
1398 | jz .out_of_mem |
1404 | jz .out_of_mem |
1399 | mov [esi + RX_RING*sizeof.RxDesc], eax |
1405 | mov [esi + RX_RING*sizeof.RxDesc], eax |
1400 | invoke GetPhysAddr |
1406 | invoke GetPhysAddr |
1401 | add eax, NET_BUFF.data |
1407 | add eax, NET_BUFF.data |
1402 | mov [esi + RxDesc.PacketBuffer], eax |
1408 | mov [esi + RxDesc.PacketBuffer], eax |
1403 | mov [esi + RxDesc.FlagLen], (4096 shl RBLEN or NV_RX_AVAIL) |
1409 | mov [esi + RxDesc.FlagLen], (4096 shl RBLEN or NV_RX_AVAIL) |
1404 | add esi, sizeof.RxDesc |
1410 | add esi, sizeof.RxDesc |
1405 | pop ecx |
1411 | pop ecx |
1406 | dec ecx |
1412 | dec ecx |
1407 | jnz .rx_loop |
1413 | jnz .rx_loop |
1408 | 1414 | ||
1409 | pop ecx esi |
1415 | pop ecx esi |
1410 | 1416 | ||
1411 | xor eax, eax |
1417 | xor eax, eax |
1412 | ret |
1418 | ret |
1413 | 1419 | ||
1414 | .out_of_mem: |
1420 | .out_of_mem: |
1415 | add esp, 12 |
1421 | add esp, 12 |
1416 | or eax, -1 |
1422 | or eax, -1 |
1417 | ret |
1423 | ret |
1418 | 1424 | ||
1419 | 1425 | ||
1420 | 1426 | ||
1421 | 1427 | ||
1422 | 1428 | ||
1423 | ; Input: none |
1429 | ; Input: none |
1424 | ; Output: none |
1430 | ; Output: none |
1425 | align 4 |
1431 | align 4 |
1426 | txrx_reset: |
1432 | txrx_reset: |
1427 | 1433 | ||
1428 | push eax esi |
1434 | push eax esi |
1429 | 1435 | ||
1430 | DEBUGF 1,"txrx_reset\n" |
1436 | DEBUGF 1,"txrx_reset\n" |
1431 | 1437 | ||
1432 | mov edi, [ebx + device.mmio_addr] |
1438 | mov edi, [ebx + device.mmio_addr] |
1433 | mov eax, [ebx + device.desc_ver] |
1439 | mov eax, [ebx + device.desc_ver] |
1434 | or eax, (TXRXCTL_BIT2 or TXRXCTL_RESET) |
1440 | or eax, (TXRXCTL_BIT2 or TXRXCTL_RESET) |
1435 | mov [TxRxControl], eax |
1441 | mov [TxRxControl], eax |
1436 | call pci_push |
1442 | call pci_push |
1437 | 1443 | ||
1438 | mov esi, NV_TXRX_RESET_DELAY |
1444 | mov esi, NV_TXRX_RESET_DELAY |
1439 | invoke Sleep |
1445 | invoke Sleep |
1440 | 1446 | ||
1441 | mov eax, [ebx + device.desc_ver] |
1447 | mov eax, [ebx + device.desc_ver] |
1442 | or eax, TXRXCTL_BIT2 |
1448 | or eax, TXRXCTL_BIT2 |
1443 | mov [TxRxControl], eax |
1449 | mov [TxRxControl], eax |
1444 | call pci_push |
1450 | call pci_push |
1445 | 1451 | ||
1446 | pop esi eax |
1452 | pop esi eax |
1447 | 1453 | ||
1448 | ret |
1454 | ret |
1449 | 1455 | ||
1450 | 1456 | ||
1451 | 1457 | ||
1452 | 1458 | ||
1453 | 1459 | ||
1454 | ; Input: none |
1460 | ; Input: none |
1455 | ; Output: none |
1461 | ; Output: none |
1456 | set_multicast: |
1462 | set_multicast: |
1457 | 1463 | ||
1458 | ; u32 addr[2]; |
1464 | ; u32 addr[2]; |
1459 | ; u32 mask[2]; |
1465 | ; u32 mask[2]; |
1460 | ; u32 pff; |
1466 | ; u32 pff; |
1461 | ; u32 alwaysOff[2]; |
1467 | ; u32 alwaysOff[2]; |
1462 | ; u32 alwaysOn[2]; |
1468 | ; u32 alwaysOn[2]; |
1463 | ; |
1469 | ; |
1464 | ; memset(addr, 0, sizeof(addr)); |
1470 | ; memset(addr, 0, sizeof(addr)); |
1465 | ; memset(mask, 0, sizeof(mask)); |
1471 | ; memset(mask, 0, sizeof(mask)); |
1466 | ; |
1472 | ; |
1467 | ; pff = PFF_MYADDR; |
1473 | ; pff = PFF_MYADDR; |
1468 | ; |
1474 | ; |
1469 | ; alwaysOn[0] = alwaysOn[1] = alwaysOff[0] = alwaysOff[1] = 0; |
1475 | ; alwaysOn[0] = alwaysOn[1] = alwaysOff[0] = alwaysOff[1] = 0; |
1470 | ; |
1476 | ; |
1471 | ; addr[0] = alwaysOn[0]; |
1477 | ; addr[0] = alwaysOn[0]; |
1472 | ; addr[1] = alwaysOn[1]; |
1478 | ; addr[1] = alwaysOn[1]; |
1473 | ; mask[0] = alwaysOn[0] | alwaysOff[0]; |
1479 | ; mask[0] = alwaysOn[0] | alwaysOff[0]; |
1474 | ; mask[1] = alwaysOn[1] | alwaysOff[1]; |
1480 | ; mask[1] = alwaysOn[1] | alwaysOff[1]; |
1475 | ; |
1481 | ; |
1476 | ; addr[0] |= MCASTADDRA_FORCE; |
1482 | ; addr[0] |= MCASTADDRA_FORCE; |
1477 | ; pff |= PFF_ALWAYS; |
1483 | ; pff |= PFF_ALWAYS; |
1478 | 1484 | ||
1479 | call stop_rx |
1485 | call stop_rx |
1480 | 1486 | ||
1481 | mov edi, [ebx + device.mmio_addr] |
1487 | mov edi, [ebx + device.mmio_addr] |
1482 | mov [MulticastAddrA], MCASTADDRA_FORCE |
1488 | mov [MulticastAddrA], MCASTADDRA_FORCE |
1483 | 1489 | ||
1484 | mov [MulticastAddrB], 0 |
1490 | mov [MulticastAddrB], 0 |
1485 | mov [MulticastMaskA], 0 |
1491 | mov [MulticastMaskA], 0 |
1486 | mov [MulticastMaskB], 0 |
1492 | mov [MulticastMaskB], 0 |
1487 | mov [PacketFilterFlags], (PFF_MYADDR or PFF_ALWAYS) |
1493 | mov [PacketFilterFlags], (PFF_MYADDR or PFF_ALWAYS) |
1488 | 1494 | ||
1489 | call start_rx |
1495 | call start_rx |
1490 | 1496 | ||
1491 | ret |
1497 | ret |
1492 | 1498 | ||
1493 | 1499 | ||
1494 | 1500 | ||
1495 | 1501 | ||
1496 | 1502 | ||
1497 | ; Input: none |
1503 | ; Input: none |
1498 | ; Output: none |
1504 | ; Output: none |
1499 | start_rx: |
1505 | start_rx: |
1500 | 1506 | ||
1501 | push edi |
1507 | push edi |
1502 | 1508 | ||
1503 | DEBUGF 1,"start_rx\n" |
1509 | DEBUGF 1,"start_rx\n" |
1504 | 1510 | ||
1505 | ; Already running? Stop it. |
1511 | ; Already running? Stop it. |
1506 | mov edi, [ebx + device.mmio_addr] |
1512 | mov edi, [ebx + device.mmio_addr] |
1507 | mov eax, [ReceiverControl] |
1513 | mov eax, [ReceiverControl] |
1508 | test eax, RCVCTL_START |
1514 | test eax, RCVCTL_START |
1509 | jz @f |
1515 | jz @f |
1510 | mov [ReceiverControl], 0 |
1516 | mov [ReceiverControl], 0 |
1511 | call pci_push |
1517 | call pci_push |
1512 | @@: |
1518 | @@: |
1513 | 1519 | ||
1514 | mov eax, [ebx + device.linkspeed] |
1520 | mov eax, [ebx + device.linkspeed] |
1515 | mov [LinkSpeed], eax |
1521 | mov [LinkSpeed], eax |
1516 | call pci_push |
1522 | call pci_push |
1517 | 1523 | ||
1518 | mov [ReceiverControl], RCVCTL_START |
1524 | mov [ReceiverControl], RCVCTL_START |
1519 | call pci_push |
1525 | call pci_push |
1520 | 1526 | ||
1521 | pop edi |
1527 | pop edi |
1522 | 1528 | ||
1523 | ret |
1529 | ret |
1524 | 1530 | ||
1525 | 1531 | ||
1526 | 1532 | ||
1527 | 1533 | ||
1528 | ; Input: none |
1534 | ; Input: none |
1529 | ; Output: none |
1535 | ; Output: none |
1530 | stop_rx: |
1536 | stop_rx: |
1531 | 1537 | ||
1532 | push esi edi |
1538 | push esi edi |
1533 | 1539 | ||
1534 | DEBUGF 1,"stop_rx.\n" |
1540 | DEBUGF 1,"stop_rx.\n" |
1535 | 1541 | ||
1536 | mov edi, [ebx + device.mmio_addr] |
1542 | mov edi, [ebx + device.mmio_addr] |
1537 | mov [ReceiverControl], 0 |
1543 | mov [ReceiverControl], 0 |
1538 | 1544 | ||
1539 | push ebx edx edi |
1545 | push ebx edx edi |
1540 | stdcall reg_delay, ReceiverStatus-edi, RCVSTAT_BUSY, 0, NV_RXSTOP_DELAY1, NV_RXSTOP_DELAY1MAX, 0 |
1546 | stdcall reg_delay, ReceiverStatus-edi, RCVSTAT_BUSY, 0, NV_RXSTOP_DELAY1, NV_RXSTOP_DELAY1MAX, 0 |
1541 | pop edi edx ebx |
1547 | pop edi edx ebx |
1542 | 1548 | ||
1543 | mov esi, NV_RXSTOP_DELAY2 |
1549 | mov esi, NV_RXSTOP_DELAY2 |
1544 | invoke Sleep |
1550 | invoke Sleep |
1545 | 1551 | ||
1546 | mov [LinkSpeed], 0 |
1552 | mov [LinkSpeed], 0 |
1547 | 1553 | ||
1548 | pop edi esi |
1554 | pop edi esi |
1549 | 1555 | ||
1550 | ret |
1556 | ret |
1551 | 1557 | ||
1552 | 1558 | ||
1553 | 1559 | ||
1554 | 1560 | ||
1555 | ; Input: none |
1561 | ; Input: none |
1556 | ; Output: EAX |
1562 | ; Output: EAX |
1557 | update_linkspeed: |
1563 | update_linkspeed: |
1558 | 1564 | ||
1559 | DEBUGF 1,"update linkspeed\n" |
1565 | DEBUGF 1,"update linkspeed\n" |
1560 | 1566 | ||
1561 | ; BMSR_LSTATUS is latched, read it twice: we want the current value. |
1567 | ; BMSR_LSTATUS is latched, read it twice: we want the current value. |
1562 | 1568 | ||
1563 | mov edx, [ebx + device.phyaddr] |
1569 | mov edx, [ebx + device.phyaddr] |
1564 | mov eax, MII_BMSR |
1570 | mov eax, MII_BMSR |
1565 | mov ecx, MII_READ |
1571 | mov ecx, MII_READ |
1566 | call mii_rw |
1572 | call mii_rw |
1567 | 1573 | ||
1568 | mov eax, MII_BMSR |
1574 | mov eax, MII_BMSR |
1569 | mov ecx, MII_READ |
1575 | mov ecx, MII_READ |
1570 | call mii_rw |
1576 | call mii_rw |
1571 | 1577 | ||
1572 | test ax, BMSR_LSTATUS ; Link up? |
1578 | test ax, BMSR_LSTATUS ; Link up? |
1573 | jz .no_link |
1579 | jz .no_link |
1574 | 1580 | ||
1575 | DEBUGF 1,"link is up\n" |
1581 | DEBUGF 1,"link is up\n" |
1576 | 1582 | ||
1577 | test ax, BMSR_ANEGCOMPLETE ; still in autonegotiation? |
1583 | test ax, BMSR_ANEGCOMPLETE ; still in autonegotiation? |
1578 | jz .10mbit_hd |
1584 | jz .10mbit_hd |
1579 | 1585 | ||
1580 | DEBUGF 1,"autonegotiation is complete\n" |
1586 | DEBUGF 1,"autonegotiation is complete\n" |
1581 | 1587 | ||
1582 | cmp [ebx + device.gigabit], PHY_GIGABIT |
1588 | cmp [ebx + device.gigabit], PHY_GIGABIT |
1583 | jne .no_gigabit |
1589 | jne .no_gigabit |
1584 | 1590 | ||
1585 | ;mov edx, [ebx + device.phyaddr] |
1591 | ;mov edx, [ebx + device.phyaddr] |
1586 | mov eax, MII_CTRL1000 |
1592 | mov eax, MII_CTRL1000 |
1587 | mov ecx, MII_READ |
1593 | mov ecx, MII_READ |
1588 | call mii_rw |
1594 | call mii_rw |
1589 | push eax |
1595 | push eax |
1590 | 1596 | ||
1591 | ;mov edx, [ebx + device.phyaddr] |
1597 | ;mov edx, [ebx + device.phyaddr] |
1592 | mov eax, MII_STAT1000 |
1598 | mov eax, MII_STAT1000 |
1593 | mov ecx, MII_READ |
1599 | mov ecx, MII_READ |
1594 | call mii_rw |
1600 | call mii_rw |
1595 | pop ecx |
1601 | pop ecx |
1596 | 1602 | ||
1597 | test eax, LPA_1000FULL |
1603 | test eax, LPA_1000FULL |
1598 | jz .no_gigabit |
1604 | jz .no_gigabit |
1599 | test ecx, ADVERTISE_1000FULL |
1605 | test ecx, ADVERTISE_1000FULL |
1600 | jz .no_gigabit |
1606 | jz .no_gigabit |
1601 | 1607 | ||
1602 | DEBUGF 1,"update_linkspeed: GBit ethernet detected.\n" |
1608 | DEBUGF 1,"update_linkspeed: GBit ethernet detected.\n" |
1603 | mov [ebx + device.state], ETH_LINK_1G |
1609 | mov [ebx + device.state], ETH_LINK_1G |
1604 | mov ecx, (LINKSPEED_FORCE or LINKSPEED_1000) |
1610 | mov ecx, (LINKSPEED_FORCE or LINKSPEED_1000) |
1605 | xor eax, eax |
1611 | xor eax, eax |
1606 | inc eax |
1612 | inc eax |
1607 | jmp set_speed |
1613 | jmp set_speed |
1608 | .no_gigabit: |
1614 | .no_gigabit: |
1609 | 1615 | ||
1610 | ;mov edx, [ebx + device.phyaddr] |
1616 | ;mov edx, [ebx + device.phyaddr] |
1611 | mov eax, MII_ADVERTISE |
1617 | mov eax, MII_ADVERTISE |
1612 | mov ecx, MII_READ |
1618 | mov ecx, MII_READ |
1613 | call mii_rw ; adv = eax |
1619 | call mii_rw ; adv = eax |
1614 | push eax |
1620 | push eax |
1615 | 1621 | ||
1616 | ;mov edx, [ebx + device.phyaddr] |
1622 | ;mov edx, [ebx + device.phyaddr] |
1617 | mov eax, MII_LPA |
1623 | mov eax, MII_LPA |
1618 | mov ecx, MII_READ |
1624 | mov ecx, MII_READ |
1619 | call mii_rw ; lpa = eax |
1625 | call mii_rw ; lpa = eax |
1620 | pop ecx |
1626 | pop ecx |
1621 | 1627 | ||
1622 | DEBUGF 1,"PHY advertises 0x%x, lpa 0x%x\n", cx, ax |
1628 | DEBUGF 1,"PHY advertises 0x%x, lpa 0x%x\n", cx, ax |
1623 | and eax, ecx ; FIXME: handle parallel detection properly, handle gigabit ethernet |
1629 | and eax, ecx ; FIXME: handle parallel detection properly, handle gigabit ethernet |
1624 | 1630 | ||
1625 | test eax, LPA_100FULL |
1631 | test eax, LPA_100FULL |
1626 | jz @f |
1632 | jz @f |
1627 | DEBUGF 1,"update_linkspeed: 100 mbit full duplex\n" |
1633 | DEBUGF 1,"update_linkspeed: 100 mbit full duplex\n" |
1628 | mov [ebx + device.state], ETH_LINK_100M + ETH_LINK_FD |
1634 | mov [ebx + device.state], ETH_LINK_100M + ETH_LINK_FD |
1629 | mov ecx, (LINKSPEED_FORCE or LINKSPEED_100) |
1635 | mov ecx, (LINKSPEED_FORCE or LINKSPEED_100) |
1630 | xor eax, eax |
1636 | xor eax, eax |
1631 | inc eax |
1637 | inc eax |
1632 | jmp set_speed |
1638 | jmp set_speed |
1633 | @@: |
1639 | @@: |
1634 | 1640 | ||
1635 | test eax, LPA_100HALF |
1641 | test eax, LPA_100HALF |
1636 | jz @f |
1642 | jz @f |
1637 | DEBUGF 1,"update_linkspeed: 100 mbit half duplex\n" |
1643 | DEBUGF 1,"update_linkspeed: 100 mbit half duplex\n" |
1638 | mov [ebx + device.state], ETH_LINK_100M |
1644 | mov [ebx + device.state], ETH_LINK_100M |
1639 | mov ecx, (LINKSPEED_FORCE or LINKSPEED_100) |
1645 | mov ecx, (LINKSPEED_FORCE or LINKSPEED_100) |
1640 | xor eax, eax |
1646 | xor eax, eax |
1641 | jmp set_speed |
1647 | jmp set_speed |
1642 | @@: |
1648 | @@: |
1643 | 1649 | ||
1644 | test eax, LPA_10FULL |
1650 | test eax, LPA_10FULL |
1645 | jz @f |
1651 | jz @f |
1646 | DEBUGF 1,"update_linkspeed: 10 mbit full duplex\n" |
1652 | DEBUGF 1,"update_linkspeed: 10 mbit full duplex\n" |
1647 | mov [ebx + device.state], ETH_LINK_10M + ETH_LINK_FD |
1653 | mov [ebx + device.state], ETH_LINK_10M + ETH_LINK_FD |
1648 | mov ecx, (LINKSPEED_FORCE or LINKSPEED_10) |
1654 | mov ecx, (LINKSPEED_FORCE or LINKSPEED_10) |
1649 | xor eax, eax |
1655 | xor eax, eax |
1650 | inc eax |
1656 | inc eax |
1651 | jmp set_speed |
1657 | jmp set_speed |
1652 | @@: |
1658 | @@: |
1653 | 1659 | ||
1654 | .10mbit_hd: |
1660 | .10mbit_hd: |
1655 | DEBUGF 1,"update_linkspeed: 10 mbit half duplex\n" |
1661 | DEBUGF 1,"update_linkspeed: 10 mbit half duplex\n" |
1656 | mov [ebx + device.state], ETH_LINK_10M |
1662 | mov [ebx + device.state], ETH_LINK_10M |
1657 | mov ecx, (LINKSPEED_FORCE or LINKSPEED_10) |
1663 | mov ecx, (LINKSPEED_FORCE or LINKSPEED_10) |
1658 | xor eax, eax |
1664 | xor eax, eax |
1659 | jmp set_speed |
1665 | jmp set_speed |
1660 | 1666 | ||
1661 | .no_link: |
1667 | .no_link: |
1662 | DEBUGF 1,"update_linkspeed: link is down\n" |
1668 | DEBUGF 1,"update_linkspeed: link is down\n" |
1663 | mov [ebx + device.state], ETH_LINK_DOWN |
1669 | mov [ebx + device.state], ETH_LINK_DOWN |
1664 | mov ecx, (LINKSPEED_FORCE or LINKSPEED_10) |
1670 | mov ecx, (LINKSPEED_FORCE or LINKSPEED_10) |
1665 | xor eax, eax |
1671 | xor eax, eax |
1666 | jmp set_speed |
1672 | jmp set_speed |
1667 | 1673 | ||
1668 | 1674 | ||
1669 | align 4 |
1675 | align 4 |
1670 | set_speed: |
1676 | set_speed: |
1671 | 1677 | ||
1672 | cmp eax, [ebx + device.duplex] |
1678 | cmp eax, [ebx + device.duplex] |
1673 | jne .update |
1679 | jne .update |
1674 | cmp ecx, [ebx + device.linkspeed] |
1680 | cmp ecx, [ebx + device.linkspeed] |
1675 | jne .update |
1681 | jne .update |
1676 | 1682 | ||
1677 | ret |
1683 | ret |
1678 | 1684 | ||
1679 | .update: |
1685 | .update: |
1680 | DEBUGF 1,"update_linkspeed: changing link to 0x%x/XD.\n", ecx |
1686 | DEBUGF 1,"update_linkspeed: changing link to 0x%x/XD.\n", ecx |
1681 | 1687 | ||
1682 | mov [ebx + device.duplex], eax |
1688 | mov [ebx + device.duplex], eax |
1683 | mov [ebx + device.linkspeed], ecx |
1689 | mov [ebx + device.linkspeed], ecx |
1684 | 1690 | ||
1685 | cmp [ebx + device.gigabit], PHY_GIGABIT |
1691 | cmp [ebx + device.gigabit], PHY_GIGABIT |
1686 | jne .no_gigabit |
1692 | jne .no_gigabit |
1687 | 1693 | ||
1688 | mov edi, [ebx + device.mmio_addr] |
1694 | mov edi, [ebx + device.mmio_addr] |
1689 | mov eax, [RandomSeed] |
1695 | mov eax, [RandomSeed] |
1690 | 1696 | ||
1691 | and eax, not (0x3FF00) |
1697 | and eax, not (0x3FF00) |
1692 | mov ecx, eax ; phyreg = ecx |
1698 | mov ecx, eax ; phyreg = ecx |
1693 | 1699 | ||
1694 | mov eax, [ebx + device.linkspeed] |
1700 | mov eax, [ebx + device.linkspeed] |
1695 | and eax, 0xFFF |
1701 | and eax, 0xFFF |
1696 | cmp eax, LINKSPEED_10 |
1702 | cmp eax, LINKSPEED_10 |
1697 | jne @f |
1703 | jne @f |
1698 | or ecx, RNDSEED_FORCE3 |
1704 | or ecx, RNDSEED_FORCE3 |
1699 | jmp .end_if4 |
1705 | jmp .end_if4 |
1700 | @@: |
1706 | @@: |
1701 | 1707 | ||
1702 | cmp eax, LINKSPEED_100 |
1708 | cmp eax, LINKSPEED_100 |
1703 | jne @f |
1709 | jne @f |
1704 | or ecx, RNDSEED_FORCE2 |
1710 | or ecx, RNDSEED_FORCE2 |
1705 | jmp .end_if4 |
1711 | jmp .end_if4 |
1706 | @@: |
1712 | @@: |
1707 | 1713 | ||
1708 | cmp eax, LINKSPEED_1000 |
1714 | cmp eax, LINKSPEED_1000 |
1709 | jne .end_if4 |
1715 | jne .end_if4 |
1710 | or ecx, RNDSEED_FORCE |
1716 | or ecx, RNDSEED_FORCE |
1711 | .end_if4: |
1717 | .end_if4: |
1712 | mov [RandomSeed], ecx |
1718 | mov [RandomSeed], ecx |
1713 | .no_gigabit: |
1719 | .no_gigabit: |
1714 | 1720 | ||
1715 | mov ecx, [PhyInterface] |
1721 | mov ecx, [PhyInterface] |
1716 | and ecx, not (PHY_HALF or PHY_100 or PHY_1000) |
1722 | and ecx, not (PHY_HALF or PHY_100 or PHY_1000) |
1717 | 1723 | ||
1718 | cmp [ebx + device.duplex], 0 |
1724 | cmp [ebx + device.duplex], 0 |
1719 | jne @f |
1725 | jne @f |
1720 | or ecx, PHY_HALF |
1726 | or ecx, PHY_HALF |
1721 | @@: |
1727 | @@: |
1722 | 1728 | ||
1723 | mov eax, [ebx + device.linkspeed] |
1729 | mov eax, [ebx + device.linkspeed] |
1724 | and eax, 0xFFF |
1730 | and eax, 0xFFF |
1725 | cmp eax, LINKSPEED_100 |
1731 | cmp eax, LINKSPEED_100 |
1726 | jne @f |
1732 | jne @f |
1727 | or ecx, PHY_100 |
1733 | or ecx, PHY_100 |
1728 | jmp .end_if5 |
1734 | jmp .end_if5 |
1729 | @@: |
1735 | @@: |
1730 | 1736 | ||
1731 | cmp eax, LINKSPEED_1000 |
1737 | cmp eax, LINKSPEED_1000 |
1732 | jne .end_if5 |
1738 | jne .end_if5 |
1733 | or ecx, PHY_1000 |
1739 | or ecx, PHY_1000 |
1734 | 1740 | ||
1735 | .end_if5: |
1741 | .end_if5: |
1736 | mov [PhyInterface], ecx |
1742 | mov [PhyInterface], ecx |
1737 | 1743 | ||
1738 | cmp [ebx + device.duplex], 0 |
1744 | cmp [ebx + device.duplex], 0 |
1739 | je @f |
1745 | je @f |
1740 | xor ecx, ecx |
1746 | xor ecx, ecx |
1741 | jmp .next |
1747 | jmp .next |
1742 | @@: |
1748 | @@: |
1743 | 1749 | ||
1744 | mov ecx, MISC1_HD |
1750 | mov ecx, MISC1_HD |
1745 | .next: |
1751 | .next: |
1746 | or ecx, MISC1_FORCE |
1752 | or ecx, MISC1_FORCE |
1747 | mov [Misc1], ecx |
1753 | mov [Misc1], ecx |
1748 | 1754 | ||
1749 | call pci_push |
1755 | call pci_push |
1750 | 1756 | ||
1751 | mov eax, [ebx + device.linkspeed] |
1757 | mov eax, [ebx + device.linkspeed] |
1752 | mov [LinkSpeed], eax |
1758 | mov [LinkSpeed], eax |
1753 | 1759 | ||
1754 | call pci_push |
1760 | call pci_push |
1755 | 1761 | ||
1756 | ret |
1762 | ret |
1757 | 1763 | ||
1758 | 1764 | ||
1759 | 1765 | ||
1760 | 1766 | ||
1761 | 1767 | ||
1762 | 1768 | ||
1763 | align 4 |
1769 | align 4 |
1764 | read_mac: |
1770 | read_mac: |
1765 | 1771 | ||
1766 | mov edi, [ebx + device.mmio_addr] |
1772 | mov edi, [ebx + device.mmio_addr] |
1767 | mov eax, [MacAddrA] |
1773 | mov eax, [MacAddrA] |
1768 | mov ecx, [MacAddrB] |
1774 | mov ecx, [MacAddrB] |
1769 | 1775 | ||
1770 | mov dword [ebx + device.mac], eax |
1776 | mov dword [ebx + device.mac], eax |
1771 | mov word [ebx + device.mac + 4], cx |
1777 | mov word [ebx + device.mac + 4], cx |
1772 | 1778 | ||
1773 | cmp [ebx + device.device_id], 0x03E5 |
1779 | cmp [ebx + device.device_id], 0x03E5 |
1774 | jae @f |
1780 | jae @f |
1775 | bswap eax |
1781 | bswap eax |
1776 | xchg cl, ch |
1782 | xchg cl, ch |
1777 | mov dword [ebx + device.mac + 2], eax |
1783 | mov dword [ebx + device.mac + 2], eax |
1778 | mov word [ebx + device.mac], cx |
1784 | mov word [ebx + device.mac], cx |
1779 | @@: |
1785 | @@: |
1780 | 1786 | ||
1781 | DEBUGF 1,"MAC = %x-%x-%x-%x-%x-%x\n", \ |
1787 | DEBUGF 1,"MAC = %x-%x-%x-%x-%x-%x\n", \ |
1782 | [ebx + device.mac+0]:2,[ebx + device.mac+1]:2,[ebx + device.mac+2]:2,[ebx + device.mac+3]:2,[ebx + device.mac+4]:2,[ebx + device.mac+5]:2 |
1788 | [ebx + device.mac+0]:2,[ebx + device.mac+1]:2,[ebx + device.mac+2]:2,[ebx + device.mac+3]:2,[ebx + device.mac+4]:2,[ebx + device.mac+5]:2 |
1783 | 1789 | ||
1784 | ret |
1790 | ret |
1785 | 1791 | ||
1786 | 1792 | ||
1787 | 1793 | ||
1788 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
1794 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
1789 | ;; ;; |
1795 | ;; ;; |
1790 | ;; Transmit ;; |
1796 | ;; Transmit ;; |
1791 | ;; ;; |
1797 | ;; ;; |
1792 | ;; In: buffer pointer in [esp+4] ;; |
1798 | ;; In: buffer pointer in [esp+4] ;; |
1793 | ;; pointer to device structure in ebx ;; |
1799 | ;; pointer to device structure in ebx ;; |
1794 | ;; ;; |
1800 | ;; ;; |
1795 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
1801 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
1796 | 1802 | ||
1797 | proc transmit stdcall bufferptr |
1803 | proc transmit stdcall bufferptr |
1798 | 1804 | ||
1799 | pushf |
1805 | pushf |
1800 | cli |
1806 | cli |
1801 | 1807 | ||
1802 | mov esi, [bufferptr] |
1808 | mov esi, [bufferptr] |
1803 | DEBUGF 1,"Transmitting packet, buffer:%x, size:%u\n", [bufferptr], [esi + NET_BUFF.length] |
1809 | DEBUGF 1,"Transmitting packet, buffer:%x, size:%u\n", [bufferptr], [esi + NET_BUFF.length] |
1804 | lea eax, [esi + NET_BUFF.data] |
1810 | lea eax, [esi + NET_BUFF.data] |
1805 | DEBUGF 1,"To: %x-%x-%x-%x-%x-%x From: %x-%x-%x-%x-%x-%x Type:%x%x\n",\ |
1811 | DEBUGF 1,"To: %x-%x-%x-%x-%x-%x From: %x-%x-%x-%x-%x-%x Type:%x%x\n",\ |
1806 | [eax+00]:2,[eax+01]:2,[eax+02]:2,[eax+03]:2,[eax+04]:2,[eax+05]:2,\ |
1812 | [eax+00]:2,[eax+01]:2,[eax+02]:2,[eax+03]:2,[eax+04]:2,[eax+05]:2,\ |
1807 | [eax+06]:2,[eax+07]:2,[eax+08]:2,[eax+09]:2,[eax+10]:2,[eax+11]:2,\ |
1813 | [eax+06]:2,[eax+07]:2,[eax+08]:2,[eax+09]:2,[eax+10]:2,[eax+11]:2,\ |
1808 | [eax+13]:2,[eax+12]:2 |
1814 | [eax+13]:2,[eax+12]:2 |
1809 | 1815 | ||
1810 | cmp [esi + NET_BUFF.length], 1514 |
1816 | cmp [esi + NET_BUFF.length], 1514 |
1811 | ja .fail |
1817 | ja .fail |
1812 | cmp [esi + NET_BUFF.length], 60 |
1818 | cmp [esi + NET_BUFF.length], 60 |
1813 | jb .fail |
1819 | jb .fail |
1814 | 1820 | ||
1815 | ; get the descriptor address |
1821 | ; get the descriptor address |
1816 | mov eax, [ebx + device.cur_tx] |
1822 | mov eax, [ebx + device.cur_tx] |
1817 | shl eax, 3 ; TX descriptor is 8 bytes. |
1823 | shl eax, 3 ; TX descriptor is 8 bytes. |
1818 | lea edi, [ebx + device.tx_ring + eax] |
1824 | lea edi, [ebx + device.tx_ring + eax] |
1819 | 1825 | ||
1820 | mov eax, [bufferptr] |
1826 | mov eax, [bufferptr] |
1821 | mov [edi + TX_RING*sizeof.TxDesc], eax |
1827 | mov [edi + TX_RING*sizeof.TxDesc], eax |
1822 | add eax, [eax + NET_BUFF.offset] |
1828 | add eax, [eax + NET_BUFF.offset] |
1823 | invoke GetPhysAddr ; Does not change esi/ebx :) |
1829 | invoke GetPhysAddr ; Does not change esi/ebx :) |
1824 | mov [edi + TxDesc.PacketBuffer], eax |
1830 | mov [edi + TxDesc.PacketBuffer], eax |
1825 | 1831 | ||
1826 | mov ecx, [esi + NET_BUFF.length] |
1832 | mov ecx, [esi + NET_BUFF.length] |
1827 | or ecx, [ebx + device.txflags] |
1833 | or ecx, [ebx + device.txflags] |
1828 | mov [edi + TxDesc.FlagLen], ecx |
1834 | mov [edi + TxDesc.FlagLen], ecx |
1829 | 1835 | ||
1830 | mov edi, [ebx + device.mmio_addr] |
1836 | mov edi, [ebx + device.mmio_addr] |
1831 | mov eax, [ebx + device.desc_ver] |
1837 | mov eax, [ebx + device.desc_ver] |
1832 | or eax, TXRXCTL_KICK |
1838 | or eax, TXRXCTL_KICK |
1833 | mov [TxRxControl], eax |
1839 | mov [TxRxControl], eax |
1834 | 1840 | ||
1835 | call pci_push |
1841 | call pci_push |
1836 | 1842 | ||
1837 | inc [ebx + device.cur_tx] |
1843 | inc [ebx + device.cur_tx] |
1838 | and [ebx + device.cur_tx], (TX_RING-1) |
1844 | and [ebx + device.cur_tx], (TX_RING-1) |
1839 | 1845 | ||
1840 | ; Update stats |
1846 | ; Update stats |
1841 | inc [ebx + device.packets_tx] |
1847 | inc [ebx + device.packets_tx] |
1842 | add dword[ebx + device.bytes_tx], ecx |
1848 | add dword[ebx + device.bytes_tx], ecx |
1843 | adc dword[ebx + device.bytes_tx + 4], 0 |
1849 | adc dword[ebx + device.bytes_tx + 4], 0 |
1844 | 1850 | ||
1845 | popf |
1851 | popf |
1846 | xor eax, eax |
1852 | xor eax, eax |
1847 | ret |
1853 | ret |
1848 | 1854 | ||
1849 | .fail: |
1855 | .fail: |
1850 | DEBUGF 2,"Send failed\n" |
1856 | DEBUGF 2,"Send failed\n" |
1851 | invoke NetFree, [bufferptr] |
1857 | invoke NetFree, [bufferptr] |
1852 | popf |
1858 | popf |
1853 | or eax, -1 |
1859 | or eax, -1 |
1854 | ret |
1860 | ret |
1855 | 1861 | ||
1856 | endp |
1862 | endp |
1857 | 1863 | ||
1858 | 1864 | ||
1859 | 1865 | ||
1860 | 1866 | ||
1861 | 1867 | ||
1862 | 1868 | ||
1863 | ; Interrupt handler |
1869 | ; Interrupt handler |
1864 | align 4 |
1870 | align 4 |
1865 | int_handler: |
1871 | int_handler: |
1866 | 1872 | ||
1867 | push ebx esi edi |
1873 | push ebx esi edi |
1868 | 1874 | ||
1869 | DEBUGF 1,"INT\n" |
1875 | DEBUGF 1,"INT\n" |
1870 | 1876 | ||
1871 | ;------------------------------------------- |
1877 | ;------------------------------------------- |
1872 | ; Find pointer of device wich made IRQ occur |
1878 | ; Find pointer of device wich made IRQ occur |
1873 | 1879 | ||
1874 | mov esi, device_list |
1880 | mov esi, device_list |
1875 | mov ecx, [devices] |
1881 | mov ecx, [devices] |
1876 | test ecx, ecx |
1882 | test ecx, ecx |
1877 | jz .fail |
1883 | jz .fail |
1878 | .nextdevice: |
1884 | .nextdevice: |
1879 | mov ebx, dword [esi] |
1885 | mov ebx, dword [esi] |
1880 | add esi, 4 |
1886 | add esi, 4 |
1881 | 1887 | ||
1882 | mov edi, [ebx + device.mmio_addr] |
1888 | mov edi, [ebx + device.mmio_addr] |
1883 | mov eax, [IrqStatus] |
1889 | mov eax, [IrqStatus] |
1884 | test eax, eax |
1890 | test eax, eax |
1885 | jnz .got_it |
1891 | jnz .got_it |
1886 | dec ecx |
1892 | dec ecx |
1887 | jnz .nextdevice |
1893 | jnz .nextdevice |
1888 | .nothing: |
1894 | .nothing: |
1889 | pop edi esi ebx |
1895 | pop edi esi ebx |
1890 | xor eax, eax |
1896 | xor eax, eax |
1891 | 1897 | ||
1892 | ret |
1898 | ret |
1893 | 1899 | ||
1894 | .got_it: |
1900 | .got_it: |
1895 | mov [IrqStatus], eax |
1901 | mov [IrqStatus], eax |
1896 | DEBUGF 1,"IrqStatus = %x\n", eax |
1902 | DEBUGF 1,"IrqStatus = %x\n", eax |
1897 | 1903 | ||
1898 | test eax, IRQ_RX ;+ IRQ_TIMER ;;;; |
1904 | test eax, IRQ_RX ;+ IRQ_TIMER ;;;; |
1899 | jz .no_rx |
1905 | jz .no_rx |
1900 | 1906 | ||
1901 | push ebx |
1907 | push ebx |
1902 | .more_rx: |
1908 | .more_rx: |
1903 | pop ebx |
1909 | pop ebx |
1904 | mov eax, [ebx + device.cur_rx] |
1910 | mov eax, [ebx + device.cur_rx] |
1905 | mov cx, sizeof.RxDesc |
1911 | mov cx, sizeof.RxDesc |
1906 | mul cx |
1912 | mul cx |
1907 | lea esi, [ebx + device.rx_ring + eax] |
1913 | lea esi, [ebx + device.rx_ring + eax] |
1908 | mov ecx, [esi + RxDesc.FlagLen] |
1914 | mov ecx, [esi + RxDesc.FlagLen] |
1909 | 1915 | ||
1910 | test ecx, NV_RX_AVAIL ; still owned by hardware |
1916 | test ecx, NV_RX_AVAIL ; still owned by hardware |
1911 | jnz .no_rx |
1917 | jnz .no_rx |
1912 | 1918 | ||
1913 | cmp [ebx + device.desc_ver], DESC_VER_1 |
1919 | cmp [ebx + device.desc_ver], DESC_VER_1 |
1914 | jne @f |
1920 | jne @f |
1915 | test ecx, NV_RX_DESCRIPTORVALID |
1921 | test ecx, NV_RX_DESCRIPTORVALID |
1916 | jz .no_rx |
1922 | jz .no_rx |
1917 | jmp .next |
1923 | jmp .next |
1918 | @@: |
1924 | @@: |
1919 | test ecx, NV_RX2_DESCRIPTORVALID |
1925 | test ecx, NV_RX2_DESCRIPTORVALID |
1920 | jz .no_rx |
1926 | jz .no_rx |
1921 | 1927 | ||
1922 | .next: |
1928 | .next: |
1923 | cmp dword[ebx + device.desc_ver], DESC_VER_1 |
1929 | cmp dword[ebx + device.desc_ver], DESC_VER_1 |
1924 | jne @f |
1930 | jne @f |
1925 | and ecx, LEN_MASK_V1 |
1931 | and ecx, LEN_MASK_V1 |
1926 | jmp .next2 |
1932 | jmp .next2 |
1927 | @@: |
1933 | @@: |
1928 | and ecx, LEN_MASK_V2 |
1934 | and ecx, LEN_MASK_V2 |
1929 | 1935 | ||
1930 | .next2: |
1936 | .next2: |
1931 | DEBUGF 1,"Received %u bytes\n", ecx |
1937 | DEBUGF 1,"Received %u bytes\n", ecx |
1932 | 1938 | ||
1933 | ; Update stats |
1939 | ; Update stats |
1934 | add dword[ebx + device.bytes_rx], ecx |
1940 | add dword[ebx + device.bytes_rx], ecx |
1935 | adc dword[ebx + device.bytes_rx + 4], 0 |
1941 | adc dword[ebx + device.bytes_rx + 4], 0 |
1936 | inc dword[ebx + device.packets_rx] |
1942 | inc dword[ebx + device.packets_rx] |
1937 | 1943 | ||
1938 | ; Prepare to give packet to kernel |
1944 | ; Prepare to give packet to kernel |
1939 | push ebx |
1945 | push ebx |
1940 | push .more_rx |
1946 | push .more_rx |
1941 | 1947 | ||
1942 | mov eax, [esi + RX_RING*sizeof.RxDesc] |
1948 | mov eax, [esi + RX_RING*sizeof.RxDesc] |
1943 | push eax |
1949 | push eax |
1944 | mov [eax + NET_BUFF.device], ebx |
1950 | mov [eax + NET_BUFF.device], ebx |
1945 | mov [eax + NET_BUFF.length], ecx |
1951 | mov [eax + NET_BUFF.length], ecx |
1946 | mov [eax + NET_BUFF.offset], NET_BUFF.data |
1952 | mov [eax + NET_BUFF.offset], NET_BUFF.data |
1947 | DEBUGF 1,"packet ptr=0x%x\n", [esi + RX_RING*sizeof.RxDesc] |
1953 | DEBUGF 1,"packet ptr=0x%x\n", [esi + RX_RING*sizeof.RxDesc] |
1948 | 1954 | ||
1949 | ; Allocate new buffer for this descriptor |
1955 | ; Allocate new buffer for this descriptor |
1950 | invoke NetAlloc, (4096 shl RBLEN) + NET_BUFF.data |
1956 | invoke NetAlloc, (4096 shl RBLEN) + NET_BUFF.data |
1951 | mov [esi + RX_RING*sizeof.RxDesc], eax |
1957 | mov [esi + RX_RING*sizeof.RxDesc], eax |
1952 | invoke GetPhysAddr |
1958 | invoke GetPhysAddr |
1953 | add eax, NET_BUFF.data |
1959 | add eax, NET_BUFF.data |
1954 | mov [esi + RxDesc.PacketBuffer], eax |
1960 | mov [esi + RxDesc.PacketBuffer], eax |
1955 | mov [esi + RxDesc.FlagLen], (4096 shl RBLEN or NV_RX_AVAIL) |
1961 | mov [esi + RxDesc.FlagLen], (4096 shl RBLEN or NV_RX_AVAIL) |
1956 | 1962 | ||
1957 | ; update current RX descriptor |
1963 | ; update current RX descriptor |
1958 | inc [ebx + device.cur_rx] |
1964 | inc [ebx + device.cur_rx] |
1959 | and [ebx + device.cur_rx], (RX_RING-1) |
1965 | and [ebx + device.cur_rx], (RX_RING-1) |
1960 | 1966 | ||
1961 | jmp [EthInput] |
1967 | jmp [EthInput] |
1962 | 1968 | ||
1963 | .no_rx: |
1969 | .no_rx: |
1964 | test eax, IRQ_RX_ERROR |
1970 | test eax, IRQ_RX_ERROR |
1965 | jz .no_rx_err |
1971 | jz .no_rx_err |
1966 | 1972 | ||
1967 | push eax |
1973 | push eax |
1968 | DEBUGF 2,"RX error!\n" |
1974 | DEBUGF 2,"RX error!\n" |
1969 | 1975 | ||
1970 | mov eax, [ebx + device.cur_rx] |
1976 | mov eax, [ebx + device.cur_rx] |
1971 | mov cx, sizeof.RxDesc |
1977 | mov cx, sizeof.RxDesc |
1972 | mul cx |
1978 | mul cx |
1973 | lea esi, [ebx + device.rx_ring + eax] |
1979 | lea esi, [ebx + device.rx_ring + eax] |
1974 | mov eax, [esi + RxDesc.FlagLen] |
1980 | mov eax, [esi + RxDesc.FlagLen] |
1975 | 1981 | ||
1976 | DEBUGF 1,"Flaglen=%x\n", eax |
1982 | DEBUGF 1,"Flaglen=%x\n", eax |
1977 | 1983 | ||
1978 | ; TODO: allocate new buff ? |
1984 | ; TODO: allocate new buff ? |
1979 | pop eax |
1985 | pop eax |
1980 | 1986 | ||
1981 | .no_rx_err: |
1987 | .no_rx_err: |
1982 | test eax, IRQ_TX_ERROR |
1988 | test eax, IRQ_TX_ERROR |
1983 | jz .no_tx_err |
1989 | jz .no_tx_err |
1984 | 1990 | ||
1985 | DEBUGF 2,"TX error!\n" |
1991 | DEBUGF 2,"TX error!\n" |
1986 | ; TODO |
1992 | ; TODO |
1987 | 1993 | ||
1988 | .no_tx_err: |
1994 | .no_tx_err: |
1989 | test eax, IRQ_LINK |
1995 | test eax, IRQ_LINK |
1990 | jz .no_link |
1996 | jz .no_link |
1991 | 1997 | ||
1992 | push eax |
1998 | push eax |
1993 | call update_linkspeed |
1999 | call update_linkspeed |
1994 | pop eax |
2000 | pop eax |
1995 | 2001 | ||
1996 | .no_link: |
2002 | .no_link: |
1997 | test eax, IRQ_TX_OK |
2003 | test eax, IRQ_TX_OK |
1998 | jz .no_tx |
2004 | jz .no_tx |
1999 | 2005 | ||
2000 | DEBUGF 1, "TX completed\n" |
2006 | DEBUGF 1, "TX completed\n" |
2001 | .loop_tx: |
2007 | .loop_tx: |
2002 | mov esi, [ebx + device.last_tx] |
2008 | mov esi, [ebx + device.last_tx] |
2003 | shl esi, 3 ; TX descriptor is 8 bytes. |
2009 | shl esi, 3 ; TX descriptor is 8 bytes. |
2004 | lea esi, [ebx + device.tx_ring + esi] |
2010 | lea esi, [ebx + device.tx_ring + esi] |
2005 | 2011 | ||
2006 | DEBUGF 1,"Flaglen = 0x%x\n", [esi + TxDesc.FlagLen] |
2012 | DEBUGF 1,"Flaglen = 0x%x\n", [esi + TxDesc.FlagLen] |
2007 | test [esi + TxDesc.FlagLen], NV_TX_VALID |
2013 | test [esi + TxDesc.FlagLen], NV_TX_VALID |
2008 | jnz .no_tx |
2014 | jnz .no_tx |
2009 | cmp dword[esi + TX_RING*sizeof.TxDesc], 0 |
2015 | cmp dword[esi + TX_RING*sizeof.TxDesc], 0 |
2010 | je .no_tx |
2016 | je .no_tx |
2011 | 2017 | ||
2012 | DEBUGF 1,"Freeing buffer 0x%x\n", [esi + TX_RING*sizeof.TxDesc]:8 |
2018 | DEBUGF 1,"Freeing buffer 0x%x\n", [esi + TX_RING*sizeof.TxDesc]:8 |
2013 | push dword[esi + TX_RING*sizeof.TxDesc] |
2019 | push dword[esi + TX_RING*sizeof.TxDesc] |
2014 | mov dword[esi + TX_RING*sizeof.TxDesc], 0 |
2020 | mov dword[esi + TX_RING*sizeof.TxDesc], 0 |
2015 | invoke NetFree |
2021 | invoke NetFree |
2016 | 2022 | ||
2017 | inc [ebx + device.last_tx] |
2023 | inc [ebx + device.last_tx] |
2018 | and [ebx + device.last_tx], TX_RING - 1 |
2024 | and [ebx + device.last_tx], TX_RING - 1 |
2019 | 2025 | ||
2020 | jmp .loop_tx |
2026 | jmp .loop_tx |
2021 | 2027 | ||
2022 | .no_tx: |
2028 | .no_tx: |
2023 | .fail: |
2029 | .fail: |
2024 | pop edi esi ebx |
2030 | pop edi esi ebx |
2025 | xor eax, eax |
2031 | xor eax, eax |
2026 | inc eax |
2032 | inc eax |
2027 | 2033 | ||
2028 | ret |
2034 | ret |
2029 | 2035 | ||
2030 | 2036 | ||
2031 | ; End of code |
2037 | ; End of code |
2032 | 2038 | ||
2033 | data fixups |
2039 | data fixups |
2034 | end data |
2040 | end data |
2035 | 2041 | ||
2036 | include '../peimport.inc' |
2042 | include '../peimport.inc' |
2037 | 2043 | ||
2038 | my_service db 'FORCEDETH',0 ; max 16 chars include zero |
2044 | my_service db 'FORCEDETH',0 ; max 16 chars include zero |
2039 | 2045 | ||
2040 | include_debug_strings |
2046 | include_debug_strings |
2041 | 2047 | ||
2042 | align 4 |
2048 | align 4 |
2043 | devices dd 0 |
2049 | devices dd 0 |
2044 | device_list rd MAX_DEVICES ; This list contains all pointers to device structures the driver is handling |
2050 | device_list rd MAX_DEVICES ; This list contains all pointers to device structures the driver is handling |