Rev 7827 | Rev 9150 | Go to most recent revision | Show entire file | Regard whitespace | Details | Blame | Last modification | View Log | RSS feed
| Rev 7827 | Rev 9146 | ||
|---|---|---|---|
| Line 7... | Line 7... | ||
| 7 | ALX_DEV_ID_E2500 = 0xe0b1 |
7 | ALX_DEV_ID_E2500 = 0xe0b1 |
| 8 | ALX_DEV_ID_AR8162 = 0x1090 |
8 | ALX_DEV_ID_AR8162 = 0x1090 |
| 9 | ALX_DEV_ID_AR8171 = 0x10A1 |
9 | ALX_DEV_ID_AR8171 = 0x10A1 |
| 10 | ALX_DEV_ID_AR8172 = 0x10A0 |
10 | ALX_DEV_ID_AR8172 = 0x10A0 |
| Line 11... | Line -... | ||
| 11 | - | ||
| 12 | ; rev definition, |
11 | |
| 13 | ; bit0: with xD support |
12 | ALX_PCI_REVID_WITH_XD = 1 shl 0 |
| 14 | ; bit1: with Card Reader function |
- | |
| 15 | ; bit(7:2): real revision |
- | |
| 16 | 13 | ALX_PCI_REVID_WITH_CR = 1 shl 1 ; With Card Reader |
|
| 17 | ALX_PCI_REVID_SHIFT = 3 |
14 | ALX_PCI_REVID_SHIFT = 3 |
| 18 | ALX_REV_A0 = 0 |
15 | ALX_REV_A0 = 0 |
| 19 | ALX_REV_A1 = 1 |
16 | ALX_REV_A1 = 1 |
| 20 | ALX_REV_B0 = 2 |
17 | ALX_REV_B0 = 2 |
| Line 91... | Line 88... | ||
| 91 | ; bit0: MAC & DMA reset |
88 | ; bit0: MAC & DMA reset |
| 92 | ALX_MASTER_DMA_MAC_RST = (1 shl 0) |
89 | ALX_MASTER_DMA_MAC_RST = (1 shl 0) |
| 93 | ALX_DMA_MAC_RST_TO = 50 |
90 | ALX_DMA_MAC_RST_TO = 50 |
| Line 94... | Line 91... | ||
| 94 | 91 | ||
| 95 | ALX_IRQ_MODU_TIMER = 0x1408 |
92 | ALX_IRQ_MODU_TIMER = 0x1408 |
| 96 | ALX_IRQ_MODU_TIMER1_MASK = 0xFFFF |
93 | ALX_IRQ_MODU_TIMER1_MASK = 0x0000FFFF |
| - | 94 | ALX_IRQ_MODU_TIMER1_SHIFT = 0 |
|
| - | 95 | ALX_IRQ_MODU_TIMER2_MASK = 0xFFFF0000 |
|
| Line 97... | Line 96... | ||
| 97 | ALX_IRQ_MODU_TIMER1_SHIFT = 0 |
96 | ALX_IRQ_MODU_TIMER2_SHIFT = 16 |
| 98 | 97 | ||
| 99 | ALX_PHY_CTRL = 0x140C |
98 | ALX_PHY_CTRL = 0x140C |
| 100 | ALX_PHY_CTRL_100AB_EN = (1 shl 17) |
99 | ALX_PHY_CTRL_100AB_EN = (1 shl 17) |