WebSVN – Kolibri OS – Diff – /drivers/ethernet/ar81xx.asm

 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;;                                                                 ;;
-;; Copyright (C) KolibriOS team 2018-2020. All rights reserved.    ;;
+;; Copyright (C) KolibriOS team 2018-2021. All rights reserved.    ;;
 ;; Distributed under terms of the GNU General Public License       ;;
 ;;                                                                 ;;
 ;;  AR81XX driver for KolibriOS                                    ;;
 ;;                                                                 ;;
 ;;  based on alx driver from TI-OpenLink                           ;;
         CURRENT_API             = 0x0200
         COMPATIBLE_API          = 0x0100
         API_VERSION             = (COMPATIBLE_API shl 16) + CURRENT_API
-        MAX_DEVICES             = 16
+; configureable area
+        MAX_DEVICES             = 16    ; Maximum number of devices this driver may handle
-        __DEBUG__               = 1
+        __DEBUG__               = 1     ; 1 = on, 0 = off
-        __DEBUG_LEVEL__         = 2
+        __DEBUG_LEVEL__         = 2     ; 1 = verbose, 2 = errors only
-        TX_RING_SIZE            = 128             ; RING sizes must be a power of 2
+        TX_RING_SIZE            = 128   ; Number of packets in send ring buffer
-        RX_RING_SIZE            = 128
+        RX_RING_SIZE            = 128   ; Number of packets in receive ring buffer
+        RX_BUFFER_SIZE          = 1536
-        RX_BUFFER_SIZE          = 1536
+        SMB_TIMER               = 400
         IMT                     = 200                   ; IRQ Modulo Timer
 include '../fdo.inc'
 include '../netdrv.inc'
+include 'ar81xx.inc'
+if (bsr TX_RING_SIZE)>(bsf TX_RING_SIZE)
+  display 'TX_RING_SIZE must be a power of two'
+  err
+end if
-include 'ar81xx.inc'
+if (bsr RX_RING_SIZE)>(bsf RX_RING_SIZE)
+  display 'RX_RING_SIZE must be a power of two'
+  err
 end if
 ; Transmit Packet Descriptor
 ; Transmit Packet Descriptor
 struct alx_tpd
         length          dw ?
         vlan_tag        dw ?
         word1           dd ?
         addr_l          dd ?
-        addr_h          dd ?
-ends
+        addr_h          dd ?
 ends
 ; Receive Return Descriptor
 ; Receive Return Descriptor
 struct alx_rrd
         word0           dd ?    ; IP payload cksum + number of RFDs + start index of RFD-ring
         rss_hash        dd ?
-        word2           dd ?    ; VLAN tag + Protocol ID + RSS Q num + RSS Hash algorithm
-        word3           dd ?    ; Packet length + status
+        word2           dd ?    ; VLAN tag + Protocol ID + RSS Q num + RSS Hash algorithm
-ends
+        word3           dd ?    ; Packet length + status
 ends
 ; Receive Free Descriptor
-struct alx_rfd
+; Receive Free Descriptor
-        addr_l          dd ?
+struct alx_rfd
-        addr_h          dd ?
+        addr_l          dd ?
-ends
+        addr_h          dd ?
         irq_line        dd ?
         pci_rev         dd ?
         chip_rev        dd ?
         mmio_addr       dd ?
 ;        dma_chnl        dd ?
         max_dma_chnl    dd ?
         tpd_ring_virt   rd TX_RING_SIZE
         rfd_ring_virt   rd RX_RING_SIZE
-ends
 ends
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;;                        ;;
 ;; proc START             ;;
         xor     eax, eax
         ret
-endp
 endp
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;;                        ;;
 ;; proc SERVICE_PROC      ;;
         je      .find_devicenum                         ; Device is already loaded, let's find it's device number
        @@:
         add     esi, 4
         loop    .nextdevice
 ; This device doesnt have its own eth_device structure yet, lets create one
   .firstdevice:
         cmp     [devices], MAX_DEVICES                  ; First check if the driver can handle one more card
         ret
 ;------------------------------------------------------
-endp
 endp
 ;;/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\;;
 ;;                                                                        ;;
 ;;        Actual Hardware dependent code starts here                      ;;
-;;                                                                        ;;
-;;/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\;;
+;;                                                                        ;;
 ;;/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\;;
 align 4
 unload:
         ; - Remove all allocated structures and buffers the card used
         or      eax, -1
-        ret
         ret
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;;
 ;;  probe: enables the device (if it really is AR81XX)
 align 4
 probe:
         DEBUGF  1,"Probing\n"
 ; Make the device a bus master
-        invoke  PciRead16, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.command
+        invoke  PciRead16, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header.command
         or      al, PCI_CMD_MASTER + PCI_CMD_MMIO + PCI_CMD_PIO
         and     ax, not(PCI_CMD_INTX_DISABLE)
-        invoke  PciWrite16, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.command, eax
+        invoke  PciWrite16, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header.command, eax
-; get device id
+; get device ID
-        invoke  PciRead16, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.device_id
+        invoke  PciRead16, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header.device_id
         mov     [ebx + device.pci_did], ax
         mov     eax, dword[esi+4]
         mov     [ebx + device.name], eax
         DEBUGF  1, "Chip type = %s\n", eax
   .done:
-; get revision id.
+; get revision ID
-        invoke  PciRead8, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.revision_id
+        invoke  PciRead8, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header.revision_id
+        and     eax, 0xff
-        and     eax, 0xff
+        DEBUGF  1,"PCI Revision: %u\n", eax
         mov     [ebx + device.pci_rev], eax
         shr     al, ALX_PCI_REVID_SHIFT
+        mov     [ebx + device.chip_rev], eax
-        mov     [ebx + device.chip_rev], eax
-        DEBUGF  1,"Revision: %u\n", al
+        DEBUGF  1,"ALX Revision: %u\n", eax
-;;;        call    alx_reset_pcie
+        stdcall alx_reset_pcie
+        mov     ecx, (ALX_PMCTRL_L0S_EN or ALX_PMCTRL_L1_EN or ALX_PMCTRL_ASPM_FCEN)
+        stdcall alx_enable_aspm
+        stdcall alx_reset_phy
+        stdcall alx_reset_mac
+; Setup link to put it in a known good starting state
+        stdcall alx_write_phy_reg, ALX_MII_DBG_ADDR, 0
+        mov     esi, [ebx + device.mmio_addr]
+        mov     eax, dword[esi + ALX_DRV]
+        stdcall alx_write_phy_reg, MII_ADVERTISE, ADVERTISE_CSMA or ADVERTISE_10HALF or ADVERTISE_10FULL or ADVERTISE_100HALF or ADVERTISE_100FULL or ADVERTISE_PAUSE_CAP
+        xor     eax, eax
+        test    [ebx + device.pci_did], 1       ;;; FIXME: is gigabit device?
-        mov     ecx, (ALX_PMCTRL_L0S_EN or ALX_PMCTRL_L1_EN or ALX_PMCTRL_ASPM_FCEN)
+        jz      @f
-        call    alx_enable_aspm
+        mov     eax, ADVERTISE_1000XFULL
   @@:
-        call    alx_reset_phy
+        stdcall alx_write_phy_reg, MII_CTRL1000, eax
-        call    alx_reset_mac
+        stdcall alx_write_phy_reg, MII_BMCR, BMCR_RESET or BMCR_ANENABLE or BMCR_ANRESTART
-        call    alx_get_perm_macaddr
-align 4
-reset:
+        stdcall alx_get_perm_macaddr
-        DEBUGF  1,"Resetting\n"
+align 4
+reset:
-; alx init_sw
         DEBUGF  1,"Resetting\n"
         call    alx_identify_hw
 ; alx init_sw
 ; Clear old interrupts
         mov     edi, [ebx + device.mmio_addr]
         mov     eax, not ALX_ISR_DIS
         mov     [edi + ALX_ISR], eax
-        call    alx_irq_enable
+        stdcall alx_irq_enable
-; Set the mtu, kernel will be able to send now
+; Set the MTU, kernel will be able to send now
         mov     [ebx + device.mtu], 1514
-        call    alx_check_link
+        stdcall alx_check_link
-        DEBUGF  1,"Reset ok\n"
         xor     eax, eax
-        ret
+        DEBUGF  1,"Reset ok\n"
         xor     eax, eax
         ret
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;                                         ;;
-;;                                         ;;
+;; Transmit                                ;;
-;; Transmit                                ;;
-;;                                         ;;
-;; In: pointer to device structure in ebx  ;;
+;;                                         ;;
-;;                                         ;;
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;; In: pointer to device structure in ebx  ;;
+;; Out: eax = 0 on success                 ;;
-;; alx_start_xmit
-;; alx_map_tx_skb
+;;                                         ;;
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-proc transmit stdcall bufferptr
+align 16
 proc transmit stdcall bufferptr
         pushf
-        cli
+        spin_lock_irqsave
         mov     esi, [bufferptr]
         DEBUGF  1,"Transmitting packet, buffer:%x, size:%u\n", [bufferptr], [esi + NET_BUFF.length]
         lea     eax, [esi + NET_BUFF.data]
         DEBUGF  1,"To: %x-%x-%x-%x-%x-%x From: %x-%x-%x-%x-%x-%x Type:%x%x\n",\
         [eax+00]:2,[eax+01]:2,[eax+02]:2,[eax+03]:2,[eax+04]:2,[eax+05]:2,\
         [eax+06]:2,[eax+07]:2,[eax+08]:2,[eax+09]:2,[eax+10]:2,[eax+11]:2,\
         [eax+13]:2,[eax+12]:2
+        cmp     [esi + NET_BUFF.length], 1514
         ja      .error
-        cmp     [esi + NET_BUFF.length], 1514
+        cmp     [esi + NET_BUFF.length], 60
-        ja      .fail
+        jb      .error
         cmp     [esi + NET_BUFF.length], 60
-        jb      .fail
+; Program the descriptor
         popf
         xor     eax, eax
         ret
+  .error:
-  .fail:
+        DEBUGF  2, "TX packet error\n"
+        inc     [ebx + device.packets_tx_err]
-        DEBUGF  2,"Send failed\n"
+        invoke  NetFree, [bufferptr]
         invoke  NetFree, [bufferptr]
-        popf
+        spin_unlock_irqrestore
         or      eax, -1
+        ret
+  .overrun:
+        DEBUGF  2, "TX overrun\n"
+        inc     [ebx + device.packets_tx_ovr]
+        invoke  NetFree, [bufferptr]
-        ret
+        spin_unlock_irqrestore
         or      eax, -1
-endp
+        ret
 endp
-;;;;;;;;;;;;;;;;;;;;;;;
-;;                   ;;
+;;;;;;;;;;;;;;;;;;;;;;;
-;; Interrupt handler ;;
+;;                   ;;
+;; Interrupt handler ;;
 ;;                   ;;
 ;;;;;;;;;;;;;;;;;;;;;;;
-align 4
-int_handler:
-        push    ebx esi edi
-        DEBUGF  1,"int\n"
+align 16
 int_handler:
 ; Find pointer of device wich made IRQ occur
+        push    ebx esi edi
-        mov     ecx, [devices]
-        test    ecx, ecx
-        jz      .nothing
-        mov     esi, device_list
-  .nextdevice:
-        mov     ebx, [esi]
-        mov     edi, [ebx + device.mmio_addr]
-        mov     eax, [edi + ALX_ISR]
-        test    eax, eax
-        jnz     .got_it
-  .continue:
-        add     esi, 4
         dec     ecx
-        jnz     .nextdevice
+        mov     ebx, [esp+4*4]
-  .nothing:
+        DEBUGF  1,"INT for 0x%x\n", ebx
         pop     edi esi ebx
-        xor     eax, eax
+; TODO? if we are paranoid, we can check that the value from ebx is present in the current device_list
-        ret                             ; If no device was found, abort
+        mov     edi, [ebx + device.mmio_addr]
+        mov     eax, [edi + ALX_ISR]
-; At this point, test for all possible reasons, and handle accordingly
+        test    eax, eax
         jz      .nothing
   .got_it:
         or      eax, ALX_ISR_DIS
         mov     [edi + ALX_ISR], eax    ; ACK interrupt
-        DEBUGF  1,"Device: %x Status: %x\n", ebx, eax
+        DEBUGF  1,"Status: %x\n", eax
         test    eax, ALX_ISR_TX_Q0
         jz      .no_tx
         DEBUGF  1,"TX interrupt\n"
         pusha
-        call    alx_clean_tx_irq
+        stdcall alx_clean_tx_irq
         popa
   .no_tx:
         test    eax, ALX_ISR_RX_Q0
         jz      .no_rx
         DEBUGF  1,"RX interrupt\n"
         pusha
+        stdcall alx_clean_rx_irq
+        popa
-        call    alx_clean_rx_irq
+  .no_rx:
+        test    eax, ALX_ISR_PHY
+        jz      .no_phy
+        DEBUGF  1,"PHY interrupt\n"
-        popa
+        pusha
+; TODO: queue link check and disable this interrupt cause meanwhile??
+        stdcall alx_check_link
+        popa
+  .no_phy:
-  .no_rx:
+        mov     dword[edi + ALX_ISR], 0
-        test    eax, ALX_ISR_PHY
+        pop     edi esi ebx
-        jz      .no_phy
+        xor     eax, eax
         xor     eax, eax
         dec     eax
+        ret
+  .alc:
+        mov     [ebx + device.max_dma_chnl], 2
+        xor     eax, eax
+        ret
-        ret
+endp
+proc udelay stdcall microseconds
+; FIXME
+        push    esi ecx edx
+        xor     esi, esi
+        inc     esi
+        invoke  Sleep
+        pop     edx ecx esi
+        ret
+endp
+proc alx_reset_pcie stdcall
+        DEBUGF  1,"alx_reset_pcie\n"
+; Make the device a bus master
+        invoke  PciRead16, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.command
+        or      al, PCI_CMD_MASTER or PCI_CMD_MMIO or PCI_CMD_PIO
+        and     ax, not(PCI_CMD_INTX_DISABLE)
+        invoke  PciWrite16, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.command, eax
+; Clear any powersaving setting
+        invoke  PciWrite16, [ebx + device.pci_bus], [ebx + device.pci_dev], 0x44, 0x0000        ;; FIXME
+; Mask some pcie error bits
+        mov     esi, [ebx + device.mmio_addr]
+        mov     eax, [esi + ALX_UE_SVRT]
+        and     eax, not(ALX_UE_SVRT_DLPROTERR or ALX_UE_SVRT_FCPROTERR)
+        mov     [esi + ALX_UE_SVRT], eax
+; pclk
+        mov     eax, [esi + ALX_MASTER]
+        or      eax, ALX_MASTER_WAKEN_25M
+        and     eax, not (ALX_MASTER_PCLKSEL_SRDS)
+        cmp     [ebx + device.chip_rev], ALX_REV_A1
+        ja      @f
+        test    [ebx + device.pci_rev], ALX_PCI_REVID_WITH_CR
+        jz      @f
+        or      eax, ALX_MASTER_PCLKSEL_SRDS
+  @@:
+        mov     [esi + ALX_MASTER], eax
+        xor     eax, eax
+        ret
 endp
 align 16
         DEBUGF  1,"Cleaning TX desc %u buffer 0x%x\n", eax, [ebx + device.tpd_ring_virt + eax*4]
         push    eax ecx
         invoke  NetFree, [ebx + device.tpd_ring_virt + eax*4]
+        pop     ecx eax
-        pop     ecx eax
+        mov     [ebx + device.tpd_ring_virt + eax*4], 0
         inc     eax
         and     eax, TX_RING_SIZE-1
         jmp     .loop
   .done:
+        mov     [ebx + device.txq_read_idx], eax
-        mov     [ebx + device.txq_read_idx], eax
         ret
 endp
 align 16
 ; Allocate new descriptor
         push    esi ecx edx
         invoke  NetAlloc, RX_BUFFER_SIZE+NET_BUFF.data
         pop     edx ecx esi
         test    eax, eax
-;        jz      .out_of_mem
+        jz      .rx_overrun
         mov     [ebx + device.rfd_ring_virt + ecx], eax
         add     eax, NET_BUFF.data
         invoke  GetPhysAddr
         mov     dword[ebx + device.rfd_ring + ecx*2], eax
         shr     ecx, 2
         inc     ecx
         and     ecx, RX_RING_SIZE-1
         jmp     .loop
+  .rx_overrun:
+        DEBUGF  2,"RX FIFO overrun\n"
+        inc     [ebx + device.packets_rx_ovr]
+        shr     ecx, 2
+        inc     ecx
+        and     ecx, RX_RING_SIZE-1
+        jmp     .loop
   .done:
         shr     ecx, 2
         mov     [ebx + device.rxq_read_idx], ecx
 ; Update producer index
         mov     esi, [ebx + device.mmio_addr]
+        mov     [esi + ALX_RFD_PIDX], cx
-        mov     [esi + ALX_RFD_PIDX], cx
         ret
 endp
-align 16
-; ecx = additional bit flags (ALX_PMCTRL_L0S_EN, ALX_PMCTRL_L1_EN, ALX_PMCTRL_ASPM_FCEN)
-alx_enable_aspm:
-        DEBUGF  1,"alx_enable_aspm (0x%x)\n", ecx
-        mov     esi, [ebx + device.mmio_addr]
-        mov     eax, dword[esi + ALX_PMCTRL]
-        and     eax, not(ALX_PMCTRL_LCKDET_TIMER_MASK shl ALX_PMCTRL_LCKDET_TIMER_SHIFT)
-        or      eax, (ALX_PMCTRL_LCKDET_TIMER_DEF shl ALX_PMCTRL_LCKDET_TIMER_SHIFT)
-        or      eax, (ALX_PMCTRL_RCVR_WT_1US or ALX_PMCTRL_L1_CLKSW_EN or ALX_PMCTRL_L1_SRDSRX_PWD)
+; IN: ecx = additional bit flags (ALX_PMCTRL_L0S_EN, ALX_PMCTRL_L1_EN, ALX_PMCTRL_ASPM_FCEN)
 proc alx_enable_aspm stdcall
         and     eax, not(ALX_PMCTRL_L1REQ_TO_MASK shl ALX_PMCTRL_L1REQ_TO_SHIFT)
-        or      eax, (ALX_PMCTRL_L1REG_TO_DEF shl ALX_PMCTRL_L1REQ_TO_SHIFT)
+        DEBUGF  1,"alx_enable_aspm (0x%x)\n", ecx
-        and     eax, not(ALX_PMCTRL_L1_TIMER_MASK shl ALX_PMCTRL_L1_TIMER_SHIFT)
+        mov     esi, [ebx + device.mmio_addr]
         or      eax, (ALX_PMCTRL_L1_TIMER_16US shl ALX_PMCTRL_L1_TIMER_SHIFT)
+        cmp     [ebx + device.pci_did], ALX_DEV_ID_AR8131
+        je      .alc_l1c
+        cmp     [ebx + device.chip_rev], ALX_REV_A1
+        ja      @f
+        test    [ebx + device.pci_rev], ALX_PCI_REVID_WITH_CR
+        jz      @f
+        or      ecx, ALX_PMCTRL_L1_SRDS_EN or ALX_PMCTRL_L1_SRDSPLL_EN
+  @@:
+        mov     eax, dword[esi + ALX_PMCTRL]
+        and     eax, not((ALX_PMCTRL_LCKDET_TIMER_MASK shl ALX_PMCTRL_LCKDET_TIMER_SHIFT) or \
+                         (ALX_PMCTRL_L1REQ_TO_MASK shl ALX_PMCTRL_L1REQ_TO_SHIFT) or \
+                         (ALX_PMCTRL_L1_TIMER_MASK shl ALX_PMCTRL_L1_TIMER_SHIFT) or \
+                         ALX_PMCTRL_L1_SRDS_EN or \
+                         ALX_PMCTRL_L1_SRDSPLL_EN or \
+                         ALX_PMCTRL_L1_BUFSRX_EN or \
+                         ALX_PMCTRL_SADLY_EN or \
                          ALX_PMCTRL_HOTRST_WTEN or \
-        and     eax, not(ALX_PMCTRL_L1_SRDS_EN  or ALX_PMCTRL_L1_SRDSPLL_EN or ALX_PMCTRL_L1_BUFSRX_EN or ALX_PMCTRL_SADLY_EN or ALX_PMCTRL_HOTRST_WTEN or ALX_PMCTRL_L0S_EN  or ALX_PMCTRL_L1_EN  or ALX_PMCTRL_ASPM_FCEN  or ALX_PMCTRL_TXL1_AFTER_L0S  or ALX_PMCTRL_RXL1_AFTER_L0S)
+                         ALX_PMCTRL_L0S_EN or \
                          ALX_PMCTRL_L1_EN or \
-        cmp     [ebx + device.chip_rev], ALX_REV_A1
+                         ALX_PMCTRL_ASPM_FCEN or \
+                         ALX_PMCTRL_TXL1_AFTER_L0S or \
+                         ALX_PMCTRL_RXL1_AFTER_L0S)
+        or      eax, (ALX_PMCTRL_LCKDET_TIMER_DEF shl ALX_PMCTRL_LCKDET_TIMER_SHIFT) or \
+                     (ALX_PMCTRL_RCVR_WT_1US or ALX_PMCTRL_L1_CLKSW_EN or ALX_PMCTRL_L1_SRDSRX_PWD) or \
+                     (ALX_PMCTRL_L1REG_TO_DEF shl ALX_PMCTRL_L1REQ_TO_SHIFT) or \
+                     (ALX_PMCTRL_L1_TIMER_16US shl ALX_PMCTRL_L1_TIMER_SHIFT)
+        or      eax, ecx
+        mov     dword[esi + ALX_PMCTRL], eax
+        ret
+  .alc_l1c:
+        DEBUGF  1, "aspm for L1C\n"
+        mov     esi, [ebx + device.mmio_addr]
+        mov     eax, dword[esi + ALX_PMCTRL]
+        and     eax, not(ALX_PMCTRL_L0S_EN or ALX_PMCTRL_L1_EN or ALX_PMCTRL_ASPM_FCEN)
+        or      eax, (ALX_PMCTRL_LCKDET_TIMER_DEF shl ALX_PMCTRL_LCKDET_TIMER_SHIFT) ;\
+                ;     or (0 shl ALX_PMCTRL_L1_TIMER_SHIFT)
+        or      eax, ecx
+;;; FIXME if(linkon)
-        ja      @f
-        test    [ebx + device.pci_rev], 1
+        or      eax, (ALX_PMCTRL_L1_SRDS_EN or ALX_PMCTRL_L1_SRDSPLL_EN or ALX_PMCTRL_L1_BUFSRX_EN)
-        jz      @f
+        and     eax, not(ALX_PMCTRL_L1_SRDSRX_PWD or ALX_PMCTRL_L1_CLKSW_EN or ALX_PMCTRL_L0S_EN or ALX_PMCTRL_L1_EN)
         or      eax, ALX_PMCTRL_L1_SRDS_EN or ALX_PMCTRL_L1_SRDSPLL_EN
-  @@:
+;;
-        or      eax, ecx
+        mov     dword[esi + ALX_PMCTRL], eax
-        mov     dword[esi + ALX_PMCTRL], eax
         ret
         ret
+endp
 align 16
-alx_reset_mac:
+proc alx_reset_mac stdcall
         DEBUGF  1, "reset mac\n"
 ; disable all interrupts, RXQ/TXQ
+        mov     esi, [ebx + device.mmio_addr]
+        mov     dword[esi + ALX_MSIX_MASK], 0xffffffff
-        mov     esi, [ebx + device.mmio_addr]
+        mov     dword[esi + ALX_IMR], 0x0
-        mov     dword[esi + ALX_MSIX_MASK], 0xffffffff
+        mov     dword[esi + ALX_ISR], ALX_ISR_DIS
         mov     dword[esi + ALX_IMR], 0x0
-        mov     dword[esi + ALX_ISR], ALX_ISR_DIS
+        stdcall alx_stop_mac
-        call    alx_stop_mac
+; mac reset workaround
         mov     dword[esi + ALX_RFD_PIDX], 1
 ; mac reset workaround
-        mov     dword[esi + ALX_RFD_PIDX], 1
+; disable l0s/l1 before MAC reset on some chips
-; disable l0s/l1 before mac reset on some chips
-        cmp     [ebx + device.chip_rev], ALX_REV_A1
-        ja      @f
-        test    [ebx + device.pci_rev], 1       ; Card reader function? FIXME: according register definitions, this should be bit 1 ISO 0
+        cmp     [ebx + device.chip_rev], ALX_REV_A1
-        jz      @f
+        ja      @f
-        mov     eax, [esi + ALX_PMCTRL]
+        test    [ebx + device.pci_rev], ALX_PCI_REVID_WITH_CR
-        mov     edx, eax
+        jz      @f
-        and     eax, not(ALX_PMCTRL_L1_EN or ALX_PMCTRL_L0S_EN)
+        mov     eax, [esi + ALX_PMCTRL]
+        mov     edx, eax
+        test    eax, ALX_PMCTRL_L1_EN or ALX_PMCTRL_L0S_EN
+        jz      @f
-        mov     [esi + ALX_PMCTRL], eax
+        and     eax, not(ALX_PMCTRL_L1_EN or ALX_PMCTRL_L0S_EN)
-  @@:
+        mov     [esi + ALX_PMCTRL], eax
   @@:
 ; reset whole mac safely
+; reset whole MAC safely
         mov     eax, [esi + ALX_MASTER]
-        or      eax, ALX_MASTER_DMA_MAC_RST + ALX_MASTER_OOB_DIS
+        or      eax, ALX_MASTER_DMA_MAC_RST or ALX_MASTER_OOB_DIS
         mov     [esi + ALX_MASTER], eax
+; make sure it's real idle
+        stdcall udelay, 10
-; make sure it's real idle
+        mov     ecx, ALX_DMA_MAC_RST_TO ; timeout
-        push    esi ecx edx
+  .loop1:
-        xor     esi, esi
+        mov     eax, dword[esi + ALX_RFD_PIDX]
-        inc     esi
+        test    eax, eax
-        invoke  Sleep           ; FIXME
+        jz      @f
         pop     edx ecx esi
         stdcall udelay, 10
-        mov     ecx, ALX_DMA_MAC_RST_TO
-  .loop1:
+        dec     ecx
-        mov     eax, dword[esi + ALX_RFD_PIDX]
+        jnz     .loop1
-        test    eax, eax
+        jmp     .error
-        jz      @f
-        dec     ecx
+  @@:
         jnz     .loop1
-        jmp     .error
+  .loop2:
-  @@:
+        mov     eax, dword[esi + ALX_MASTER]
-  .loop2:
+        test    eax, ALX_MASTER_DMA_MAC_RST
-        mov     eax, dword[esi + ALX_MASTER]
+        jz      @f
         ja      @f
         and     eax, not ALX_MISC_ISO_EN
   @@:
         mov     [esi + ALX_MISC], eax
-        push    esi
-        xor     esi, esi
-        inc     esi
-        invoke  Sleep           ;; FIXME: udelay(20);
-        pop     esi
+        stdcall udelay, 20
 ; driver control speed/duplex, hash-alg
+        mov     eax, [ebx + device.rx_ctrl]
-        mov     eax, [ebx + device.rx_ctrl]
+        mov     [esi + ALX_MAC_CTRL], eax
         mov     [esi + ALX_MAC_CTRL], eax
 ; clk sw
         mov     eax, dword[esi + ALX_SERDES]
         DEBUGF  1, "error\n"
         xor     eax, eax
         dec     eax
         ret
+endp
 align 16
-alx_reset_phy:
+proc alx_reset_phy stdcall
+        DEBUGF  1, "Reset phy\n"
+        mov     esi, [ebx + device.mmio_addr]
+        mov     eax, dword [esi + ALX_PHY_CTRL]
+        DEBUGF 1, "read ALX_PHY_CTRL = %x\n", eax
+        and     eax, not (ALX_PHY_CTRL_DSPRST_OUT or ALX_PHY_CTRL_IDDQ or ALX_PHY_CTRL_GATE_25M or ALX_PHY_CTRL_POWER_DOWN or ALX_PHY_CTRL_CLS)
+        or      eax, ALX_PHY_CTRL_RST_ANALOG
+        or      eax, ALX_PHY_CTRL_HIB_PULSE or ALX_PHY_CTRL_HIB_EN ; assume pws is enabled
+        DEBUGF 1, "write ALX_PHY_CTRL = %x\n", eax
+        mov     [esi + ALX_PHY_CTRL], eax
+        stdcall udelay, 5
+        or      eax, ALX_PHY_CTRL_DSPRST_OUT
+        mov     [esi + ALX_PHY_CTRL], eax
+        stdcall udelay, 10
+        or      eax, ALX_PHY_CTRL_DSPRST_OUT
+        DEBUGF 1, "write ALX_PHY_CTRL = %x\n", eax
+        mov     dword [esi + ALX_PHY_CTRL], eax
+        stdcall udelay, 800
+; PHY power saving & hibernate
+        stdcall alx_write_phy_dbg, ALX_MIIDBG_LEGCYPS, ALX_LEGCYPS_DEF
+        stdcall alx_write_phy_dbg, ALX_MIIDBG_SYSMODCTRL, ALX_SYSMODCTRL_IECHOADJ_DEF
+        stdcall alx_write_phy_ext, ALX_MIIEXT_PCS, ALX_MIIEXT_VDRVBIAS, ALX_VDRVBIAS_DEF
+; EEE advertisement
+        mov     eax, [esi + ALX_LPI_CTRL]
+        and     eax, not (ALX_LPI_CTRL_EN)
+        mov     [esi + ALX_LPI_CTRL], eax
+        stdcall alx_write_phy_ext, ALX_MIIEXT_ANEG, ALX_MIIEXT_LOCAL_EEEADV, 0
+; PHY power saving
+        stdcall alx_write_phy_dbg, ALX_MIIDBG_TST10BTCFG, ALX_TST10BTCFG_DEF
+        stdcall alx_write_phy_dbg, ALX_MIIDBG_SRDSYSMOD, ALX_SRDSYSMOD_DEF
+        stdcall alx_write_phy_dbg, ALX_MIIDBG_TST100BTCFG, ALX_TST100BTCFG_DEF
+        stdcall alx_write_phy_dbg, ALX_MIIDBG_ANACTRL, ALX_ANACTRL_DEF
+        stdcall alx_read_phy_dbg, ALX_MIIDBG_GREENCFG2
+        and     eax, not ALX_GREENCFG2_GATE_DFSE_EN
+        stdcall alx_write_phy_dbg, ALX_MIIDBG_GREENCFG2, eax
-        DEBUGF  1, "Reset phy\n"
+; rtl8139c, 120m issue */
+        stdcall alx_write_phy_ext, ALX_MIIEXT_ANEG, ALX_MIIEXT_NLP78, ALX_MIIEXT_NLP78_120M_DEF
-        mov     esi, [ebx + device.mmio_addr]
+        stdcall alx_write_phy_ext, ALX_MIIEXT_ANEG, ALX_MIIEXT_S3DIG10, ALX_MIIEXT_S3DIG10_DEF
-;; TODO
+; TODO: link patch ?
-; set phy interrupt mask
+; set PHY interrupt mask
         DEBUGF  1, "error\n"
         xor     eax, eax
         dec     eax
         ret
+endp
-;align 16
-;alx_enable_osc:
-;
-;        mov     esi, [ebx + device.mmio_addr]
-;
-;; rising edge
-;        mov     eax, dword[esi + ALX_MISC]
-;        and     eax, not ALX_MISC_INTNLOSC_OPEN
-;        mov     dword[esi + ALX_MISC], eax
-;        or      eax, ALX_MISC_INTNLOSC_OPEN
-;        mov     dword[esi + ALX_MISC], eax
+proc alx_set_macaddr stdcall
+        mov     esi, [ebx + device.mmio_addr]
+        mov     eax, dword[ebx + device.mac+2]
+        bswap   eax
+        mov     [esi + ALX_STAD0], eax
+        mov     ax, word[ebx + device.mac]
+        xchg    al, ah
+        mov     [esi + ALX_STAD1], ax
+        ret
+endp
-;
+proc alx_enable_osc stdcall
+        mov     esi, [ebx + device.mmio_addr]
+; rising edge
+        mov     eax, dword[esi + ALX_MISC]
+        and     eax, not ALX_MISC_INTNLOSC_OPEN
+        mov     dword[esi + ALX_MISC], eax
+        or      eax, ALX_MISC_INTNLOSC_OPEN
+        mov     dword[esi + ALX_MISC], eax
-;        ret
+        ret
 endp
 align 16
 ; clk from chipset may be unstable 1s after de-assert of
 ; PERST, driver need re-calibrate before enter Sleep for WoL
         mov     eax, dword[esi + ALX_MISC]
         cmp     [ebx + device.chip_rev], ALX_REV_B0
-        jb      .rev_a
+        jb      .rev_A
 ; restore over current protection def-val, this val could be reset by MAC-RST
         and     eax, not (ALX_MISC_PSW_OCP_MASK shl ALX_MISC_PSW_OCP_SHIFT)
         and     eax, not ALX_MSIC2_CALB_START
         mov     dword[esi + ALX_MSIC2], eax
         or      eax, ALX_MSIC2_CALB_START
         mov     dword[esi + ALX_MSIC2], eax
-        push    esi ecx
-        xor     esi, esi
-        inc     esi
-        invoke  Sleep           ;; FIXME: udelay(20)
-        pop     ecx esi
+        stdcall udelay, 20
         ret
-  .rev_a:
+  .rev_A:
 ;  disable isolate for rev A devices
-        and     eax, not ( ALX_MISC_ISO_EN)
+        and     eax, not (ALX_MISC_ISO_EN)
-        or      eax, ALX_MISC_INTNLOSC_OPEN
-        mov     dword[esi + ALX_MISC], eax
+        or      eax, ALX_MISC_INTNLOSC_OPEN
-        and     eax, not ALX_MISC_INTNLOSC_OPEN
-        mov     dword[esi + ALX_MISC], eax
-        push    esi ecx
+        mov     dword[esi + ALX_MISC], eax
-        xor     esi, esi
+        and     eax, not ALX_MISC_INTNLOSC_OPEN
+        mov     dword[esi + ALX_MISC], eax
-        inc     esi
-        invoke  Sleep           ;; FIXME: udelay(20)
+        stdcall udelay, 20
         pop     ecx esi
         ret
         ret
         cmp     dword[ebx + device.mac], 0xffffffff
         jne     @f
         cmp     word[ebx + device.mac + 4], 0xffff
         je      .invalid
   @@:
+        test    byte[ebx + device.mac + 5], 0x01        ; Multicast
-; TODO: check if it's not a multicast
+        jnz     .invalid
+  @@:
         xor     eax, eax
         ret
   .invalid:
         DEBUGF  1, "Invalid MAC!\n"
         xor     eax, eax
         inc     eax
+        ret
-        ret
 endp
-align 16
-alx_get_perm_macaddr:
+proc alx_get_perm_macaddr stdcall
 ; try to get it from register first
-        call    alx_read_macaddr
+        stdcall alx_read_macaddr
         invoke  Sleep
         pop     ecx esi
         jmp     .loop2
   @@:
-        call    alx_read_macaddr
+        stdcall alx_read_macaddr
         test    eax, eax
         jz      .done
         invoke  Sleep
         pop     ecx edx esi
         jmp     .loop4
   @@:
-        call    alx_read_macaddr
+        stdcall alx_read_macaddr
         test    eax, eax
         jz      .done
   .done:
         DEBUGF  1, "MAC OK\n"
         xor     eax, eax
         ret
+endp
-align 16
-alx_stop_mac:
+proc alx_stop_mac stdcall
         mov     eax, dword[esi + ALX_TXQ0]
         and     eax, not ALX_TXQ0_EN
-        mov     dword[esi + ALX_TXQ0], eax
+        mov     dword[esi + ALX_TXQ0], eax
-        push    esi
-        xor     esi, esi
-        inc     esi
         invoke  Sleep   ; FIME: udelay(40)
-        pop     esi
+        stdcall udelay, 40
         mov     eax, [ebx + device.rx_ctrl]
   .loop:
         mov     eax, [esi + ALX_MAC_STS]
         test    eax, ALX_MAC_STS_IDLE
         jz      .done
-        push    esi
-        xor     esi, esi
-        inc     esi
-        invoke  Sleep   ; FIME: udelay(10)
-        pop     esi
+        stdcall udelay, 10
         dec     ecx
   .done:
         DEBUGF  1,"alx_stop_mac ok\n"
         xor     eax, eax
         ret
+endp
 align 16
-alx_start_mac:
+proc alx_start_mac stdcall
         mov     dword[esi + ALX_TXQ0], eax
         mov     eax, [ebx + device.rx_ctrl]
         or      eax, ALX_MAC_CTRL_TX_EN or ALX_MAC_CTRL_RX_EN
         and     eax, not ALX_MAC_CTRL_FULLD
-        test    [ebx + device.state], ETH_LINK_FD
+        test    [ebx + device.state], ETH_LINK_FULL_DUPLEX
-        jz      @f
+        jz      .no_fd
         or      eax, ALX_MAC_CTRL_FULLD
-  @@:
+  .no_fd:
         and     eax, not (ALX_MAC_CTRL_SPEED_MASK shl ALX_MAC_CTRL_SPEED_SHIFT)
+        mov     ecx, [ebx + device.state]
+        and     ecx, ETH_LINK_SPEED_MASK
-        test    [ebx + device.state], ETH_LINK_1G
+        cmp     ecx, ETH_LINK_SPEED_1G
-        jz      .10_100
+        jne      .10_100
-        or      eax, (ALX_MAC_CTRL_SPEED_1000 shl ALX_MAC_CTRL_SPEED_SHIFT)
-        mov     [ebx + device.rx_ctrl], eax
-        mov     [esi + ALX_MAC_CTRL], eax
+        or      eax, (ALX_MAC_CTRL_SPEED_1000 shl ALX_MAC_CTRL_SPEED_SHIFT)
-        ret
+        jmp     .done
+  .10_100:
+        or      eax, (ALX_MAC_CTRL_SPEED_10_100 shl ALX_MAC_CTRL_SPEED_SHIFT)
   .10_100:
-        or      eax, (ALX_MAC_CTRL_SPEED_10_100 shl ALX_MAC_CTRL_SPEED_SHIFT)
+  .done:
         DEBUGF  1,"mac ctrl=0x%x\n", eax
+        mov     [ebx + device.rx_ctrl], eax
-        mov     [ebx + device.rx_ctrl], eax
-        mov     [esi + ALX_MAC_CTRL], eax
+        mov     [esi + ALX_MAC_CTRL], eax
         ret
         ret
         xor     eax, eax
-        ret
-align 16
-alx_alloc_descriptors:
-        DEBUGF  1,"alx_alloc_descriptors\n"
-; physical tx/rx ring descriptors
-;        alx->descmem.size = sizeof.tx_desc * TX_RING_SIZE + sizeof.rx_desc * RX_RING_SIZE + sizeof(struct alx_rfd) * RX_RING_SIZE;
-;        alx->descmem.virt = dma_zalloc_coherent(&alx->hw.pdev->dev, alx->descmem.size, &alx->descmem.dma, GFP_KERNEL);
-;        if (!alx->descmem.virt)
-;                goto out_free;
-;
-;        alx->txq.tpd = (void *)alx->descmem.virt;
-;        alx->txq.tpd_dma = alx->descmem.dma;
-; alignment requirement for next block
-;        BUILD_BUG_ON(tx_desc.sizeof % 8);
-;
-;        alx->rxq.rrd = (void *)((u8 *)alx->descmem.virt + tx_desc.sizeof * TX_RING_SIZE);
-;        alx->rxq.rrd_dma = alx->descmem.dma + sizeof.tx_desc * TX_RING_SIZE;
-;
-; alignment requirement for next block
-;        BUILD_BUG_ON(rx_desc.sizeof % 8);
-;
-;        alx->rxq.rfd = (void *)((u8 *)alx->descmem.virt + sizeof.tx_desx * TX_RING_SIZE + sizeof.rx_desc * RX_RING_SIZE);
-;        alx->rxq.rfd_dma = alx->descmem.dma + sizeof.tx_desc * TX_RING_SIZE + sizeof.rx_desc * RX_RING_SIZE;
-        xor     eax, eax
         ret
-align 16
-alx_alloc_rings:
-        DEBUGF  1,"alx_alloc_rings\n"
+endp
-        call    alx_alloc_descriptors
+proc alx_alloc_rings stdcall
-        test    eax, eax
-        jnz     .ret_err
+        DEBUGF  1,"alx_alloc_rings\n"
-        and     [ebx + device.int_mask], not ALX_ISR_ALL_QUEUES
-        or      [ebx + device.int_mask], ALX_ISR_TX_Q0 or ALX_ISR_RX_Q0
-;        netif_napi_add(alx->dev, &alx->napi, alx_poll, 64);
+        and     [ebx + device.int_mask], not ALX_ISR_ALL_QUEUES
+        or      [ebx + device.int_mask], ALX_ISR_TX_Q0 or ALX_ISR_RX_Q0
-        call    alx_reinit_rings
+        stdcall alx_reinit_rings
-  .ret_err:
         ret
+endp
 align 16
-alx_reinit_rings:
+proc alx_reinit_rings stdcall
   .none:
         xor     eax, eax
+        ret
-        ret
 endp
 align 16
-alx_free_rx_ring:
+proc alx_free_rx_ring stdcall
         cmp     ecx, RX_RING_SIZE
         jb      .loop
+        ret
-        ret
 endp
-align 16
-alx_configure:
+proc alx_configure stdcall
         DEBUGF  1,"alx_configure\n"
-        call    alx_configure_basic
+        stdcall alx_configure_basic
-        call    alx_disable_rss
+        stdcall alx_disable_rss
-        call    __alx_set_rx_mode
+        call    alx_set_rx_mode
         mov     esi, [ebx + device.mmio_addr]
         mov     eax, [ebx + device.rx_ctrl]
         mov     [esi + ALX_MAC_CTRL], eax
         xor     eax, eax
         ret
 endp
-align 16
+proc alx_irq_enable stdcall
-alx_irq_enable:
         DEBUGF  1,"alx_irq_enable\n"
         DEBUGF  1,"alx_irq_enable\n"
         mov     esi, [ebx + device.mmio_addr]
-        mov     esi, [ebx + device.mmio_addr]
+        mov     dword[esi + ALX_ISR], 0
-        mov     dword[esi + ALX_ISR], 0
+        mov     eax, [ebx + device.int_mask]
-        mov     eax, [ebx + device.int_mask]
+        mov     [esi + ALX_IMR], eax
-        mov     [esi + ALX_IMR], eax
+        stdcall alx_post_write
         call    alx_post_write
         ret
         ret
 endp
 align 16
+proc alx_irq_disable stdcall
-alx_irq_disable:
         DEBUGF  1,"alx_irq_disable\n"
         mov     esi, [ebx + device.mmio_addr]
         mov     dword[esi + ALX_ISR], ALX_ISR_DIS
         mov     dword[esi + ALX_IMR], 0
         call    alx_post_write
         stdcall alx_post_write
         ret
         ret
+endp
 align 16
-alx_post_write:
+proc alx_post_write stdcall
+        push    eax
-        push    eax
+        mov     esi, [ebx + device.mmio_addr]
-        mov     esi, [ebx + device.mmio_addr]
+        mov     eax, [esi]
-        mov     eax, [esi]
+        pop     eax
         pop     eax
         ret
         ret
         test    [ebx + device.pci_did], 1       ;;; FIXME: is gigabit device?
         jz      @f
         or      eax, ALX_RXQ0_ASPM_THRESH_100M shl ALX_RXQ0_ASPM_THRESH_SHIFT
   @@:
+        mov     [esi + ALX_RXQ0], eax
+; DMA
-        mov     dword[esi + ALX_RXQ0], eax
+        max_payload equ 2               ;;;; FIXME
-; TODO: DMA
-;        mov     eax, [esi + ALX_DMA]    ; read and ignore?
-;        mov     eax, [ebx + device.dma_chnl]
-;        dec     eax
+        mov     eax, [esi + ALX_DMA]            ; Read and ignore?
-;        shl     eax, ALX_DMA_RCHNL_SEL_SHIFT
+        ; Pre-B0 devices have 2 DMA channels
-;        or      eax, (ALX_DMA_RORDER_MODE_OUT shl ALX_DMA_RORDER_MODE_SHIFT) \
+        mov     eax, (ALX_DMA_RORDER_MODE_OUT shl ALX_DMA_RORDER_MODE_SHIFT) \
-;                or ALX_DMA_RREQ_PRI_DATA \
+                or ALX_DMA_RREQ_PRI_DATA \
-;                or (max_payload shl ALX_DMA_RREQ_BLEN_SHIFT ) \
+                or (max_payload shl ALX_DMA_RREQ_BLEN_SHIFT) \
-;                or (ALX_DMA_WDLY_CNT_DEF shl ALX_DMA_WDLY_CNT_SHIFT ) \
+                or (ALX_DMA_WDLY_CNT_DEF shl ALX_DMA_WDLY_CNT_SHIFT ) \
+                or (ALX_DMA_RDLY_CNT_DEF shl ALX_DMA_RDLY_CNT_SHIFT ) \
+                or ((2-1) shl ALX_DMA_RCHNL_SEL_SHIFT)
+        cmp     [ebx + device.chip_rev], ALX_REV_B0
+        jb      @f
+        ; B0 and newer have 4 DMA channels
+        mov     eax, (ALX_DMA_RORDER_MODE_OUT shl ALX_DMA_RORDER_MODE_SHIFT) \
+                or ALX_DMA_RREQ_PRI_DATA \
+                or (max_payload shl ALX_DMA_RREQ_BLEN_SHIFT) \
+                or (ALX_DMA_WDLY_CNT_DEF shl ALX_DMA_WDLY_CNT_SHIFT ) \
+                or (ALX_DMA_RDLY_CNT_DEF shl ALX_DMA_RDLY_CNT_SHIFT ) \
-;                or (ALX_DMA_RDLY_CNT_DEF shl ALX_DMA_RDLY_CNT_SHIFT )
+                or ((4-1) shl ALX_DMA_RCHNL_SEL_SHIFT)
-;        mov     [esi + ALX_DMA], eax
+  @@:
         mov     [esi + ALX_DMA], eax
                  or (4 shl ALX_WRR_PRI3_SHIFT)
         mov      [esi + ALX_WRR], eax
+        ret
-        ret
 endp
 align 16
         and     eax, not (ALX_RXQ0_RSS_HASH_EN)
         mov     [esi + ALX_RXQ0] , eax
         ret
+endp
 align 16
-__alx_set_rx_mode:
+proc alx_set_rx_mode stdcall
+        DEBUGF  1,"__alx_set_rx_mode\n"
-        DEBUGF  1,"__alx_set_rx_mode\n"
+        mov     esi, [ebx + device.mmio_addr]
-        mov     esi, [ebx + device.mmio_addr]
+; TODO: proper multicast
 ;        if (!(netdev->flags & IFF_ALLMULTI)) {
 ;                netdev_for_each_mc_addr(ha, netdev)
 ;                        alx_add_mc_addr(hw, ha->addr, mc_hash);
 ;
 ;                alx_write_mem32(hw, ALX_HASH_TBL0, mc_hash[0]);
 ;                alx_write_mem32(hw, ALX_HASH_TBL1, mc_hash[1]);
 ;        }
         mov     eax, [ebx + device.rx_ctrl]
-        or      eax, ALX_MAC_CTRL_PROMISC_EN or ALX_MAC_CTRL_MULTIALL_EN
+        or      eax, ALX_MAC_CTRL_PROMISC_EN or ALX_MAC_CTRL_MULTIALL_EN        ; FIXME: dont force promiscous mode..
         mov     [ebx + device.rx_ctrl], eax
         mov     dword[esi + ALX_MAC_CTRL], eax
         ret
         je      .no_change
         cmp     [ebx + device.state], ETH_LINK_DOWN
         je      .link_down
-        call    alx_post_phy_link
+        stdcall alx_post_phy_link
         mov     ecx, (ALX_PMCTRL_L0S_EN or ALX_PMCTRL_L1_EN or ALX_PMCTRL_ASPM_FCEN)
-        call    alx_enable_aspm
+        stdcall alx_enable_aspm
-        call    alx_start_mac
+        stdcall alx_start_mac
         ret
   .link_down:
 ; Link is now down
-        call    alx_reset_mac
+        stdcall alx_reset_mac
         test    eax, eax
         jnz     .reset
-        call    alx_irq_disable
+        stdcall alx_irq_disable
 ; MAC reset causes all HW settings to be lost, restore all
-        call    alx_reinit_rings
+        stdcall alx_reinit_rings
         test    eax, eax
         jnz     .reset
-        call    alx_configure
+        stdcall alx_configure
         mov     ecx, (ALX_PMCTRL_L1_EN or ALX_PMCTRL_ASPM_FCEN)
-        call    alx_enable_aspm
+        stdcall alx_enable_aspm
-        call    alx_post_phy_link
+        stdcall alx_post_phy_link
-        call    alx_irq_enable
+        stdcall alx_irq_enable
+        invoke  NetLinkChanged
+        ret
-        invoke  NetLinkChanged
-        ret
+  .reset:
         DEBUGF  1, "alx_schedule_reset\n"
-  .reset:
+;;;        stdcall alx_schedule_reset
         DEBUGF  1, "alx_schedule_reset"
-;;;        call    alx_schedule_reset
+        ret
+endp
-        ret
+proc alx_post_phy_link stdcall
-align 16
+        DEBUGF  1, "alx_post_phy_link\n"
 alx_post_phy_link:
         cmp     [ebx + device.chip_rev], ALX_REV_B0
+        ja      .done
-        cmp     [ebx + device.chip_rev], ALX_REV_B0
-        ja      .done
+        cmp     [ebx + device.state], ETH_LINK_UNKNOWN
+        jae     @f
         cmp     [ebx + device.state], ETH_LINK_UNKNOWN
+; TODO: vendor hocus-pocus to tune the PHY according the detected cable length
-        jae     @f
+        stdcall alx_write_phy_dbg, ALX_MIIDBG_AZ_ANADECT, ALX_AZ_ANADECT_DEF
-; TODO
+        stdcall alx_read_phy_ext, ALX_MIIEXT_AFE, ALX_MIIEXT_ANEG
-;        stdcall alx_read_phy_ext, ALX_MIIEXT_AFE, ALX_MIIEXT_ANEG
+        and     eax, not (ALX_AFE_10BT_100M_TH)
-;        and     eax, not (ALX_AFE_10BT_100M_TH)
+        stdcall alx_write_phy_ext, ALX_MIIEXT_AFE, ALX_MIIEXT_ANEG, eax
 ;        stdcall alx_write_phy_ext, ALX_MIIEXT_AFE, ALX_MIIEXT_ANEG, eax
         ret
-        ret
+  @@:
   @@:
   .done:
   .done:
         ret
-        ret
 endp
-align 16
+proc alx_clear_phy_intr stdcall
 alx_clear_phy_intr:
         DEBUGF  1,"alx_clear_phy_intr\n"
-        stdcall alx_read_phy_reg, 0, ALX_MII_ISR
+        stdcall alx_read_phy_reg, ALX_MII_ISR
         ret
 endp
 align 16
-alx_get_phy_link:
+proc alx_get_phy_link stdcall
         DEBUGF  1,"alx_get_phy_link\n"
-        stdcall alx_read_phy_reg, 0, MII_BMSR
+        stdcall alx_read_phy_reg, MII_BMSR
-        stdcall alx_read_phy_reg, 0, MII_BMSR
+        stdcall alx_read_phy_reg, MII_BMSR
         mov     [ebx + device.state], ETH_LINK_DOWN
         test    ax, BMSR_LSTATUS
         jnz     @f
         DEBUGF  1,"link is down\n"
         xor     eax, eax
         ret
   @@:
-        stdcall alx_read_phy_reg, 0, ALX_MII_GIGA_PSSR
+        stdcall alx_read_phy_reg, ALX_MII_GIGA_PSSR
         test    ax, ALX_GIGA_PSSR_SPD_DPLX_RESOLVED
         jz      .wrong_speed
         DEBUGF  1,"wrong speed\n"
         xor     eax, eax
         dec     eax
         ret
+endp
-align 16
-proc  alx_read_phy_reg stdcall, phy_addr:dword, reg:dword
+proc alx_read_phy_reg stdcall, reg:dword
-; FIXME: Only internal PHY for now, fixed clock
+; FIXME: fixed clock
   .loop:
         mov     eax, dword[esi + ALX_MDIO]
         test    eax, ALX_MDIO_BUSY
         jz      .ready
-        push    esi ecx
-        xor     esi, esi
-        inc     esi
-        invoke  Sleep           ;; FIXME: udelay(10)
-        pop     ecx esi
+        stdcall udelay, 10
         dec     ecx
         jnz     .loop
-        DEBUGF  1,"PHY read timeout!\n"
+        DEBUGF  1,"alx_read_phy_reg read timeout!\n"
         xor     eax, eax
         dec     eax
         ret
   .ready:
 ;        shr     eax, ALX_MDIO_DATA_SHIFT
+        and     eax, ALX_MDIO_DATA_MASK
+        DEBUGF  1,"alx_read_phy_reg data=0x%x\n", eax:4
+        ret
+endp
+proc  alx_read_phy_ext stdcall, dev:dword, reg:dword
+; FIXME: fixed clock
+        DEBUGF  1,"alx_read_phy_ext dev=0x%x reg=0x%x\n", [dev]:4, [reg]:4
+        mov     esi, [ebx + device.mmio_addr]
-        and     eax, ALX_MDIO_DATA_MASK
+        mov     eax, [dev]
+        shl     eax, ALX_MDIO_EXTN_DEVAD_SHIFT
+        mov     ax, word[reg]
+;        shl     eax, ALX_MDIO_EXTN_REG_SHIFT
+        mov     dword[esi + ALX_MDIO_EXTN], eax
-        DEBUGF  1,"PHY read, val=0x%x\n", eax:4
+        mov     eax, ALX_MDIO_SPRES_PRMBL or (ALX_MDIO_CLK_SEL_25MD4 shl ALX_MDIO_CLK_SEL_SHIFT) or ALX_MDIO_START or ALX_MDIO_OP_READ or ALX_MDIO_MODE_EXT
+        mov     dword[esi + ALX_MDIO], eax
+        mov     ecx, ALX_MDIO_MAX_AC_TO
+  .loop:
+        mov     eax, dword[esi + ALX_MDIO]
+        test    eax, ALX_MDIO_BUSY
+        jz      .ready
+        stdcall udelay, 10
+        dec     ecx
+        jnz     .loop
+        DEBUGF  1,"alx_read_phy_ext read timeout!\n"
+        xor     eax, eax
+        dec     eax
+        ret
+  .ready:
+;        shr     eax, ALX_MDIO_DATA_SHIFT
-        ret
+        and     eax, ALX_MDIO_DATA_MASK
-endp
+        DEBUGF  1,"alx_read_phy_ext data=0x%x\n", eax:4
   .loop:
         mov     eax, dword[esi + ALX_MDIO]
         test    eax, ALX_MDIO_BUSY
         jz      .ready
-        push    esi ecx
-        xor     esi, esi
-        inc     esi
-        invoke  Sleep           ;; FIXME: udelay(10)
-        pop     ecx esi
+        stdcall udelay, 10
         dec     ecx
         jnz     .loop
-        DEBUGF  1,"PHY write timeout!\n"
+        DEBUGF  1,"alx_write_phy_reg timeout!\n"
         xor     eax, eax
+        dec     eax
+        ret
+  .ready:
+        DEBUGF  1,"alx_write_phy_reg OK\n"
+        xor     eax, eax
+        ret
+endp
+proc  alx_write_phy_dbg stdcall, reg:dword, val:dword
+        DEBUGF  1,"alx_write_phy_dbg\n"
+        stdcall alx_write_phy_reg, ALX_MII_DBG_ADDR, [reg]
+        test    eax, eax
+        jnz     @f
+        stdcall alx_write_phy_reg, ALX_MII_DBG_DATA, [val]
+        ret
+  @@:
+        DEBUGF  1,"alx_write_phy_dbg ERROR\n"
+        ret
+endp
+proc  alx_read_phy_dbg stdcall, reg:dword
+        DEBUGF  1,"alx_read_phy_dbg\n"
+        stdcall alx_write_phy_reg, ALX_MII_DBG_ADDR, [reg]
+        test    eax, eax
+        jnz     @f
+        stdcall alx_read_phy_reg, ALX_MII_DBG_DATA
+        ret
+  @@:
+        DEBUGF  1,"alx_read_phy_dbg ERROR\n"
+        ret
+endp
+proc  alx_write_phy_ext stdcall, dev:dword, reg:dword, val:dword
+; FIXME: fixed clock
+        DEBUGF  1,"alx_write_phy_ext dev=0x%x reg=0x%x, data=0x%x\n", [dev]:4, [reg]:4, [val]:4
+        mov     esi, [ebx + device.mmio_addr]
+        mov     eax, [dev]
+        shl     eax, ALX_MDIO_EXTN_DEVAD_SHIFT
+        mov     ax, word[reg]
+;        shl     eax, ALX_MDIO_EXTN_REG_SHIFT
+        mov     dword[esi + ALX_MDIO_EXTN], eax
+        movzx   eax, word[val]                   ; data must be in 16 lower bits :)
+        or      eax, ALX_MDIO_SPRES_PRMBL or (ALX_MDIO_CLK_SEL_25MD4 shl ALX_MDIO_CLK_SEL_SHIFT) or ALX_MDIO_START or ALX_MDIO_MODE_EXT
+        mov     dword[esi + ALX_MDIO], eax
+        mov     ecx, ALX_MDIO_MAX_AC_TO
+  .loop:
+        mov     eax, dword[esi + ALX_MDIO]
+        test    eax, ALX_MDIO_BUSY
+        jz      .ready
+        stdcall udelay, 10
+        dec     ecx
+        jnz     .loop
+        DEBUGF  1,"alx_write_phy_ext timeout!\n"
+        xor     eax, eax
         dec     eax
         ret
   .ready:
-        DEBUGF  1,"PHY write OK\n"
-        xor     eax, eax
+        DEBUGF  1,"alx_write_phy_ext OK\n"
         xor     eax, eax
         ret
 ; Only legacy interrupts supported for now.
         mov     dword[esi + ALX_MSI_RETRANS_TIMER], 0
-        ret
         ret
 ; End of code
 data fixups
-end data
 end data
 include '../peimport.inc'
 include '../peimport.inc'
 my_service      db 'AR81XX',0                    ; max 16 chars include zero
 my_service      db 'AR81XX',0                    ; max 16 chars include zero

Subversion Repositories Kolibri OS

(root)/drivers/ethernet/ar81xx.asm – Rev 7827 → 9146