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| 1 | /****************************************************************************** |
1 | /****************************************************************************** |
| 2 | * |
2 | * |
| 3 | * Module Name: dmtbinfo - Table info for non-AML tables |
3 | * Module Name: dmtbinfo - Table info for non-AML tables |
| 4 | * |
4 | * |
| 5 | *****************************************************************************/ |
5 | *****************************************************************************/ |
| 6 | 6 | ||
| 7 | /****************************************************************************** |
7 | /****************************************************************************** |
| 8 | * |
8 | * |
| 9 | * 1. Copyright Notice |
9 | * 1. Copyright Notice |
| 10 | * |
10 | * |
| 11 | * Some or all of this work - Copyright (c) 1999 - 2010, Intel Corp. |
11 | * Some or all of this work - Copyright (c) 1999 - 2011, Intel Corp. |
| 12 | * All rights reserved. |
12 | * All rights reserved. |
| 13 | * |
13 | * |
| 14 | * 2. License |
14 | * 2. License |
| 15 | * |
15 | * |
| 16 | * 2.1. This is your license from Intel Corp. under its intellectual property |
16 | * 2.1. This is your license from Intel Corp. under its intellectual property |
| 17 | * rights. You may have additional license terms from the party that provided |
17 | * rights. You may have additional license terms from the party that provided |
| 18 | * you this software, covering your right to use that party's intellectual |
18 | * you this software, covering your right to use that party's intellectual |
| 19 | * property rights. |
19 | * property rights. |
| 20 | * |
20 | * |
| 21 | * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a |
21 | * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a |
| 22 | * copy of the source code appearing in this file ("Covered Code") an |
22 | * copy of the source code appearing in this file ("Covered Code") an |
| 23 | * irrevocable, perpetual, worldwide license under Intel's copyrights in the |
23 | * irrevocable, perpetual, worldwide license under Intel's copyrights in the |
| 24 | * base code distributed originally by Intel ("Original Intel Code") to copy, |
24 | * base code distributed originally by Intel ("Original Intel Code") to copy, |
| 25 | * make derivatives, distribute, use and display any portion of the Covered |
25 | * make derivatives, distribute, use and display any portion of the Covered |
| 26 | * Code in any form, with the right to sublicense such rights; and |
26 | * Code in any form, with the right to sublicense such rights; and |
| 27 | * |
27 | * |
| 28 | * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent |
28 | * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent |
| 29 | * license (with the right to sublicense), under only those claims of Intel |
29 | * license (with the right to sublicense), under only those claims of Intel |
| 30 | * patents that are infringed by the Original Intel Code, to make, use, sell, |
30 | * patents that are infringed by the Original Intel Code, to make, use, sell, |
| 31 | * offer to sell, and import the Covered Code and derivative works thereof |
31 | * offer to sell, and import the Covered Code and derivative works thereof |
| 32 | * solely to the minimum extent necessary to exercise the above copyright |
32 | * solely to the minimum extent necessary to exercise the above copyright |
| 33 | * license, and in no event shall the patent license extend to any additions |
33 | * license, and in no event shall the patent license extend to any additions |
| 34 | * to or modifications of the Original Intel Code. No other license or right |
34 | * to or modifications of the Original Intel Code. No other license or right |
| 35 | * is granted directly or by implication, estoppel or otherwise; |
35 | * is granted directly or by implication, estoppel or otherwise; |
| 36 | * |
36 | * |
| 37 | * The above copyright and patent license is granted only if the following |
37 | * The above copyright and patent license is granted only if the following |
| 38 | * conditions are met: |
38 | * conditions are met: |
| 39 | * |
39 | * |
| 40 | * 3. Conditions |
40 | * 3. Conditions |
| 41 | * |
41 | * |
| 42 | * 3.1. Redistribution of Source with Rights to Further Distribute Source. |
42 | * 3.1. Redistribution of Source with Rights to Further Distribute Source. |
| 43 | * Redistribution of source code of any substantial portion of the Covered |
43 | * Redistribution of source code of any substantial portion of the Covered |
| 44 | * Code or modification with rights to further distribute source must include |
44 | * Code or modification with rights to further distribute source must include |
| 45 | * the above Copyright Notice, the above License, this list of Conditions, |
45 | * the above Copyright Notice, the above License, this list of Conditions, |
| 46 | * and the following Disclaimer and Export Compliance provision. In addition, |
46 | * and the following Disclaimer and Export Compliance provision. In addition, |
| 47 | * Licensee must cause all Covered Code to which Licensee contributes to |
47 | * Licensee must cause all Covered Code to which Licensee contributes to |
| 48 | * contain a file documenting the changes Licensee made to create that Covered |
48 | * contain a file documenting the changes Licensee made to create that Covered |
| 49 | * Code and the date of any change. Licensee must include in that file the |
49 | * Code and the date of any change. Licensee must include in that file the |
| 50 | * documentation of any changes made by any predecessor Licensee. Licensee |
50 | * documentation of any changes made by any predecessor Licensee. Licensee |
| 51 | * must include a prominent statement that the modification is derived, |
51 | * must include a prominent statement that the modification is derived, |
| 52 | * directly or indirectly, from Original Intel Code. |
52 | * directly or indirectly, from Original Intel Code. |
| 53 | * |
53 | * |
| 54 | * 3.2. Redistribution of Source with no Rights to Further Distribute Source. |
54 | * 3.2. Redistribution of Source with no Rights to Further Distribute Source. |
| 55 | * Redistribution of source code of any substantial portion of the Covered |
55 | * Redistribution of source code of any substantial portion of the Covered |
| 56 | * Code or modification without rights to further distribute source must |
56 | * Code or modification without rights to further distribute source must |
| 57 | * include the following Disclaimer and Export Compliance provision in the |
57 | * include the following Disclaimer and Export Compliance provision in the |
| 58 | * documentation and/or other materials provided with distribution. In |
58 | * documentation and/or other materials provided with distribution. In |
| 59 | * addition, Licensee may not authorize further sublicense of source of any |
59 | * addition, Licensee may not authorize further sublicense of source of any |
| 60 | * portion of the Covered Code, and must include terms to the effect that the |
60 | * portion of the Covered Code, and must include terms to the effect that the |
| 61 | * license from Licensee to its licensee is limited to the intellectual |
61 | * license from Licensee to its licensee is limited to the intellectual |
| 62 | * property embodied in the software Licensee provides to its licensee, and |
62 | * property embodied in the software Licensee provides to its licensee, and |
| 63 | * not to intellectual property embodied in modifications its licensee may |
63 | * not to intellectual property embodied in modifications its licensee may |
| 64 | * make. |
64 | * make. |
| 65 | * |
65 | * |
| 66 | * 3.3. Redistribution of Executable. Redistribution in executable form of any |
66 | * 3.3. Redistribution of Executable. Redistribution in executable form of any |
| 67 | * substantial portion of the Covered Code or modification must reproduce the |
67 | * substantial portion of the Covered Code or modification must reproduce the |
| 68 | * above Copyright Notice, and the following Disclaimer and Export Compliance |
68 | * above Copyright Notice, and the following Disclaimer and Export Compliance |
| 69 | * provision in the documentation and/or other materials provided with the |
69 | * provision in the documentation and/or other materials provided with the |
| 70 | * distribution. |
70 | * distribution. |
| 71 | * |
71 | * |
| 72 | * 3.4. Intel retains all right, title, and interest in and to the Original |
72 | * 3.4. Intel retains all right, title, and interest in and to the Original |
| 73 | * Intel Code. |
73 | * Intel Code. |
| 74 | * |
74 | * |
| 75 | * 3.5. Neither the name Intel nor any other trademark owned or controlled by |
75 | * 3.5. Neither the name Intel nor any other trademark owned or controlled by |
| 76 | * Intel shall be used in advertising or otherwise to promote the sale, use or |
76 | * Intel shall be used in advertising or otherwise to promote the sale, use or |
| 77 | * other dealings in products derived from or relating to the Covered Code |
77 | * other dealings in products derived from or relating to the Covered Code |
| 78 | * without prior written authorization from Intel. |
78 | * without prior written authorization from Intel. |
| 79 | * |
79 | * |
| 80 | * 4. Disclaimer and Export Compliance |
80 | * 4. Disclaimer and Export Compliance |
| 81 | * |
81 | * |
| 82 | * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED |
82 | * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED |
| 83 | * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE |
83 | * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE |
| 84 | * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, |
84 | * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, |
| 85 | * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY |
85 | * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY |
| 86 | * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY |
86 | * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY |
| 87 | * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A |
87 | * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A |
| 88 | * PARTICULAR PURPOSE. |
88 | * PARTICULAR PURPOSE. |
| 89 | * |
89 | * |
| 90 | * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES |
90 | * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES |
| 91 | * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR |
91 | * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR |
| 92 | * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, |
92 | * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, |
| 93 | * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY |
93 | * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY |
| 94 | * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL |
94 | * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL |
| 95 | * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS |
95 | * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS |
| 96 | * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY |
96 | * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY |
| 97 | * LIMITED REMEDY. |
97 | * LIMITED REMEDY. |
| 98 | * |
98 | * |
| 99 | * 4.3. Licensee shall not export, either directly or indirectly, any of this |
99 | * 4.3. Licensee shall not export, either directly or indirectly, any of this |
| 100 | * software or system incorporating such software without first obtaining any |
100 | * software or system incorporating such software without first obtaining any |
| 101 | * required license or other approval from the U. S. Department of Commerce or |
101 | * required license or other approval from the U. S. Department of Commerce or |
| 102 | * any other agency or department of the United States Government. In the |
102 | * any other agency or department of the United States Government. In the |
| 103 | * event Licensee exports any such software from the United States or |
103 | * event Licensee exports any such software from the United States or |
| 104 | * re-exports any such software from a foreign destination, Licensee shall |
104 | * re-exports any such software from a foreign destination, Licensee shall |
| 105 | * ensure that the distribution and export/re-export of the software is in |
105 | * ensure that the distribution and export/re-export of the software is in |
| 106 | * compliance with all laws, regulations, orders, or other restrictions of the |
106 | * compliance with all laws, regulations, orders, or other restrictions of the |
| 107 | * U.S. Export Administration Regulations. Licensee agrees that neither it nor |
107 | * U.S. Export Administration Regulations. Licensee agrees that neither it nor |
| 108 | * any of its subsidiaries will export/re-export any technical data, process, |
108 | * any of its subsidiaries will export/re-export any technical data, process, |
| 109 | * software, or service, directly or indirectly, to any country for which the |
109 | * software, or service, directly or indirectly, to any country for which the |
| 110 | * United States government or any agency thereof requires an export license, |
110 | * United States government or any agency thereof requires an export license, |
| 111 | * other governmental approval, or letter of assurance, without first obtaining |
111 | * other governmental approval, or letter of assurance, without first obtaining |
| 112 | * such license, approval or letter. |
112 | * such license, approval or letter. |
| 113 | * |
113 | * |
| 114 | *****************************************************************************/ |
114 | *****************************************************************************/ |
| 115 | 115 | ||
| 116 | #include "acpi.h" |
116 | #include "acpi.h" |
| 117 | #include "accommon.h" |
117 | #include "accommon.h" |
| 118 | #include "acdisasm.h" |
118 | #include "acdisasm.h" |
| 119 | 119 | ||
| 120 | /* This module used for application-level code only */ |
120 | /* This module used for application-level code only */ |
| 121 | 121 | ||
| 122 | #define _COMPONENT ACPI_CA_DISASSEMBLER |
122 | #define _COMPONENT ACPI_CA_DISASSEMBLER |
| 123 | ACPI_MODULE_NAME ("dmtbinfo") |
123 | ACPI_MODULE_NAME ("dmtbinfo") |
| 124 | 124 | ||
| 125 | /* |
125 | /* |
| - | 126 | * How to add a new table: |
|
| - | 127 | * |
|
| - | 128 | * - Add the C table definition to the actbl1.h or actbl2.h header. |
|
| - | 129 | * - Add ACPI_xxxx_OFFSET macro(s) for the table (and subtables) to list below. |
|
| - | 130 | * - Define the table in this file (for the disassembler). If any |
|
| - | 131 | * new data types are required (ACPI_DMT_*), see below. |
|
| - | 132 | * - Add an external declaration for the new table definition (AcpiDmTableInfo*) |
|
| - | 133 | * in acdisam.h |
|
| - | 134 | * - Add new table definition to the dispatch table in dmtable.c (AcpiDmTableData) |
|
| - | 135 | * If a simple table (with no subtables), no disassembly code is needed. |
|
| - | 136 | * Otherwise, create the AcpiDmDump* function for to disassemble the table |
|
| - | 137 | * and add it to the dmtbdump.c file. |
|
| - | 138 | * - Add an external declaration for the new AcpiDmDump* function in acdisasm.h |
|
| - | 139 | * - Add the new AcpiDmDump* function to the dispatch table in dmtable.c |
|
| - | 140 | * - Create a template for the new table |
|
| - | 141 | * - Add data table compiler support |
|
| - | 142 | * |
|
| - | 143 | * How to add a new data type (ACPI_DMT_*): |
|
| - | 144 | * |
|
| - | 145 | * - Add new type at the end of the ACPI_DMT list in acdisasm.h |
|
| - | 146 | * - Add length and implementation cases in dmtable.c (disassembler) |
|
| - | 147 | * - Add type and length cases in dtutils.c (DT compiler) |
|
| - | 148 | */ |
|
| - | 149 | ||
| - | 150 | /* |
|
| 126 | * Macros used to generate offsets to specific table fields |
151 | * Macros used to generate offsets to specific table fields |
| 127 | */ |
152 | */ |
| 128 | #define ACPI_FACS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_FACS,f) |
153 | #define ACPI_FACS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_FACS,f) |
| 129 | #define ACPI_GAS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_GENERIC_ADDRESS,f) |
154 | #define ACPI_GAS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_GENERIC_ADDRESS,f) |
| 130 | #define ACPI_HDR_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_HEADER,f) |
155 | #define ACPI_HDR_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_HEADER,f) |
| 131 | #define ACPI_RSDP_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_RSDP,f) |
156 | #define ACPI_RSDP_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_RSDP,f) |
| 132 | #define ACPI_BOOT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_BOOT,f) |
157 | #define ACPI_BOOT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_BOOT,f) |
| 133 | #define ACPI_BERT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_BERT,f) |
158 | #define ACPI_BERT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_BERT,f) |
| 134 | #define ACPI_CPEP_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_CPEP,f) |
159 | #define ACPI_CPEP_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_CPEP,f) |
| 135 | #define ACPI_DBGP_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_DBGP,f) |
160 | #define ACPI_DBGP_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_DBGP,f) |
| 136 | #define ACPI_DMAR_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_DMAR,f) |
161 | #define ACPI_DMAR_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_DMAR,f) |
| 137 | #define ACPI_ECDT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_ECDT,f) |
162 | #define ACPI_ECDT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_ECDT,f) |
| 138 | #define ACPI_EINJ_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_EINJ,f) |
163 | #define ACPI_EINJ_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_EINJ,f) |
| 139 | #define ACPI_ERST_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_ERST,f) |
164 | #define ACPI_ERST_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_ERST,f) |
| 140 | #define ACPI_HEST_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_HEST,f) |
165 | #define ACPI_HEST_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_HEST,f) |
| 141 | #define ACPI_HPET_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_HPET,f) |
166 | #define ACPI_HPET_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_HPET,f) |
| 142 | #define ACPI_IVRS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_IVRS,f) |
167 | #define ACPI_IVRS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_IVRS,f) |
| 143 | #define ACPI_MADT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_MADT,f) |
168 | #define ACPI_MADT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_MADT,f) |
| 144 | #define ACPI_MCFG_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_MCFG,f) |
169 | #define ACPI_MCFG_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_MCFG,f) |
| 145 | #define ACPI_MCHI_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_MCHI,f) |
170 | #define ACPI_MCHI_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_MCHI,f) |
| 146 | #define ACPI_MSCT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_MSCT,f) |
171 | #define ACPI_MSCT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_MSCT,f) |
| 147 | #define ACPI_SBST_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SBST,f) |
172 | #define ACPI_SBST_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SBST,f) |
| 148 | #define ACPI_SLIT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SLIT,f) |
173 | #define ACPI_SLIT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SLIT,f) |
| 149 | #define ACPI_SPCR_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SPCR,f) |
174 | #define ACPI_SPCR_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SPCR,f) |
| 150 | #define ACPI_SPMI_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SPMI,f) |
175 | #define ACPI_SPMI_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SPMI,f) |
| 151 | #define ACPI_SRAT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SRAT,f) |
176 | #define ACPI_SRAT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SRAT,f) |
| 152 | #define ACPI_TCPA_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_TCPA,f) |
177 | #define ACPI_TCPA_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_TCPA,f) |
| 153 | #define ACPI_UEFI_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_UEFI,f) |
178 | #define ACPI_UEFI_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_UEFI,f) |
| 154 | #define ACPI_WAET_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_WAET,f) |
179 | #define ACPI_WAET_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_WAET,f) |
| 155 | #define ACPI_WDAT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_WDAT,f) |
180 | #define ACPI_WDAT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_WDAT,f) |
| - | 181 | #define ACPI_WDDT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_WDDT,f) |
|
| 156 | #define ACPI_WDRT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_WDRT,f) |
182 | #define ACPI_WDRT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_WDRT,f) |
| 157 | 183 | ||
| 158 | /* Subtables */ |
184 | /* Subtables */ |
| 159 | 185 | ||
| 160 | #define ACPI_ASF0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_INFO,f) |
186 | #define ACPI_ASF0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_INFO,f) |
| 161 | #define ACPI_ASF1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_ALERT,f) |
187 | #define ACPI_ASF1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_ALERT,f) |
| 162 | #define ACPI_ASF1a_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_ALERT_DATA,f) |
188 | #define ACPI_ASF1a_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_ALERT_DATA,f) |
| 163 | #define ACPI_ASF2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_REMOTE,f) |
189 | #define ACPI_ASF2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_REMOTE,f) |
| 164 | #define ACPI_ASF2a_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_CONTROL_DATA,f) |
190 | #define ACPI_ASF2a_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_CONTROL_DATA,f) |
| 165 | #define ACPI_ASF3_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_RMCP,f) |
191 | #define ACPI_ASF3_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_RMCP,f) |
| 166 | #define ACPI_ASF4_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_ADDRESS,f) |
192 | #define ACPI_ASF4_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_ADDRESS,f) |
| 167 | #define ACPI_CPEP0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_CPEP_POLLING,f) |
193 | #define ACPI_CPEP0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_CPEP_POLLING,f) |
| 168 | #define ACPI_DMARS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_DEVICE_SCOPE,f) |
194 | #define ACPI_DMARS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_DEVICE_SCOPE,f) |
| 169 | #define ACPI_DMAR0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_HARDWARE_UNIT,f) |
195 | #define ACPI_DMAR0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_HARDWARE_UNIT,f) |
| 170 | #define ACPI_DMAR1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_RESERVED_MEMORY,f) |
196 | #define ACPI_DMAR1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_RESERVED_MEMORY,f) |
| 171 | #define ACPI_DMAR2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_ATSR,f) |
197 | #define ACPI_DMAR2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_ATSR,f) |
| 172 | #define ACPI_DMAR3_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_RHSA,f) |
198 | #define ACPI_DMAR3_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_RHSA,f) |
| 173 | #define ACPI_EINJ0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_WHEA_HEADER,f) |
199 | #define ACPI_EINJ0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_WHEA_HEADER,f) |
| - | 200 | #define ACPI_ERST0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_WHEA_HEADER,f) |
|
| 174 | #define ACPI_HEST0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_IA_MACHINE_CHECK,f) |
201 | #define ACPI_HEST0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_IA_MACHINE_CHECK,f) |
| 175 | #define ACPI_HEST1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_IA_CORRECTED,f) |
202 | #define ACPI_HEST1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_IA_CORRECTED,f) |
| 176 | #define ACPI_HEST2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_IA_NMI,f) |
203 | #define ACPI_HEST2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_IA_NMI,f) |
| 177 | #define ACPI_HEST6_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_AER_ROOT,f) |
204 | #define ACPI_HEST6_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_AER_ROOT,f) |
| 178 | #define ACPI_HEST7_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_AER,f) |
205 | #define ACPI_HEST7_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_AER,f) |
| 179 | #define ACPI_HEST8_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_AER_BRIDGE,f) |
206 | #define ACPI_HEST8_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_AER_BRIDGE,f) |
| 180 | #define ACPI_HEST9_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_GENERIC,f) |
207 | #define ACPI_HEST9_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_GENERIC,f) |
| 181 | #define ACPI_HESTN_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_NOTIFY,f) |
208 | #define ACPI_HESTN_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_NOTIFY,f) |
| 182 | #define ACPI_HESTB_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_IA_ERROR_BANK,f) |
209 | #define ACPI_HESTB_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_IA_ERROR_BANK,f) |
| 183 | #define ACPI_IVRSH_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_HEADER,f) |
210 | #define ACPI_IVRSH_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_HEADER,f) |
| 184 | #define ACPI_IVRS0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_HARDWARE,f) |
211 | #define ACPI_IVRS0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_HARDWARE,f) |
| 185 | #define ACPI_IVRS1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_MEMORY,f) |
212 | #define ACPI_IVRS1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_MEMORY,f) |
| 186 | #define ACPI_IVRSD_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_DE_HEADER,f) |
213 | #define ACPI_IVRSD_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_DE_HEADER,f) |
| 187 | #define ACPI_IVRS8A_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_DEVICE8A,f) |
214 | #define ACPI_IVRS8A_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_DEVICE8A,f) |
| 188 | #define ACPI_IVRS8B_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_DEVICE8B,f) |
215 | #define ACPI_IVRS8B_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_DEVICE8B,f) |
| 189 | #define ACPI_IVRS8C_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_DEVICE8C,f) |
216 | #define ACPI_IVRS8C_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_DEVICE8C,f) |
| 190 | #define ACPI_MADT0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC,f) |
217 | #define ACPI_MADT0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC,f) |
| 191 | #define ACPI_MADT1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_IO_APIC,f) |
218 | #define ACPI_MADT1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_IO_APIC,f) |
| 192 | #define ACPI_MADT2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_INTERRUPT_OVERRIDE,f) |
219 | #define ACPI_MADT2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_INTERRUPT_OVERRIDE,f) |
| 193 | #define ACPI_MADT3_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_NMI_SOURCE,f) |
220 | #define ACPI_MADT3_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_NMI_SOURCE,f) |
| 194 | #define ACPI_MADT4_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC_NMI,f) |
221 | #define ACPI_MADT4_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC_NMI,f) |
| 195 | #define ACPI_MADT5_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC_OVERRIDE,f) |
222 | #define ACPI_MADT5_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC_OVERRIDE,f) |
| 196 | #define ACPI_MADT6_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_IO_SAPIC,f) |
223 | #define ACPI_MADT6_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_IO_SAPIC,f) |
| 197 | #define ACPI_MADT7_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_SAPIC,f) |
224 | #define ACPI_MADT7_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_SAPIC,f) |
| 198 | #define ACPI_MADT8_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_INTERRUPT_SOURCE,f) |
225 | #define ACPI_MADT8_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_INTERRUPT_SOURCE,f) |
| 199 | #define ACPI_MADT9_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_X2APIC,f) |
226 | #define ACPI_MADT9_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_X2APIC,f) |
| 200 | #define ACPI_MADT10_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_X2APIC_NMI,f) |
227 | #define ACPI_MADT10_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_X2APIC_NMI,f) |
| 201 | #define ACPI_MADTH_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SUBTABLE_HEADER,f) |
228 | #define ACPI_MADTH_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SUBTABLE_HEADER,f) |
| 202 | #define ACPI_MCFG0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MCFG_ALLOCATION,f) |
229 | #define ACPI_MCFG0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MCFG_ALLOCATION,f) |
| 203 | #define ACPI_MSCT0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MSCT_PROXIMITY,f) |
230 | #define ACPI_MSCT0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MSCT_PROXIMITY,f) |
| - | 231 | #define ACPI_SLICH_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SLIC_HEADER,f) |
|
| - | 232 | #define ACPI_SLIC0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SLIC_KEY,f) |
|
| - | 233 | #define ACPI_SLIC1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SLIC_MARKER,f) |
|
| 204 | #define ACPI_SRATH_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SUBTABLE_HEADER,f) |
234 | #define ACPI_SRATH_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SUBTABLE_HEADER,f) |
| 205 | #define ACPI_SRAT0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SRAT_CPU_AFFINITY,f) |
235 | #define ACPI_SRAT0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SRAT_CPU_AFFINITY,f) |
| 206 | #define ACPI_SRAT1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SRAT_MEM_AFFINITY,f) |
236 | #define ACPI_SRAT1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SRAT_MEM_AFFINITY,f) |
| 207 | #define ACPI_SRAT2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SRAT_X2APIC_CPU_AFFINITY,f) |
237 | #define ACPI_SRAT2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SRAT_X2APIC_CPU_AFFINITY,f) |
| 208 | #define ACPI_WDAT0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_WDAT_ENTRY,f) |
238 | #define ACPI_WDAT0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_WDAT_ENTRY,f) |
| 209 | 239 | ||
| 210 | /* |
240 | /* |
| 211 | * Simplify access to flag fields by breaking them up into bytes |
241 | * Simplify access to flag fields by breaking them up into bytes |
| 212 | */ |
242 | */ |
| 213 | #define ACPI_FLAG_OFFSET(d,f,o) (UINT8) (ACPI_OFFSET (d,f) + o) |
243 | #define ACPI_FLAG_OFFSET(d,f,o) (UINT8) (ACPI_OFFSET (d,f) + o) |
| 214 | 244 | ||
| 215 | /* Flags */ |
245 | /* Flags */ |
| 216 | 246 | ||
| 217 | #define ACPI_FADT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_FADT,f,o) |
247 | #define ACPI_FADT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_FADT,f,o) |
| 218 | #define ACPI_FACS_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_FACS,f,o) |
248 | #define ACPI_FACS_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_FACS,f,o) |
| 219 | #define ACPI_HPET_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_HPET,f,o) |
249 | #define ACPI_HPET_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_HPET,f,o) |
| 220 | #define ACPI_SRAT0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_CPU_AFFINITY,f,o) |
250 | #define ACPI_SRAT0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_CPU_AFFINITY,f,o) |
| 221 | #define ACPI_SRAT1_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_MEM_AFFINITY,f,o) |
251 | #define ACPI_SRAT1_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_MEM_AFFINITY,f,o) |
| 222 | #define ACPI_SRAT2_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_X2APIC_CPU_AFFINITY,f,o) |
252 | #define ACPI_SRAT2_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_X2APIC_CPU_AFFINITY,f,o) |
| 223 | #define ACPI_MADT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_MADT,f,o) |
253 | #define ACPI_MADT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_MADT,f,o) |
| 224 | #define ACPI_MADT0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_APIC,f,o) |
254 | #define ACPI_MADT0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_APIC,f,o) |
| 225 | #define ACPI_MADT2_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_INTERRUPT_OVERRIDE,f,o) |
255 | #define ACPI_MADT2_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_INTERRUPT_OVERRIDE,f,o) |
| 226 | #define ACPI_MADT3_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_NMI_SOURCE,f,o) |
256 | #define ACPI_MADT3_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_NMI_SOURCE,f,o) |
| 227 | #define ACPI_MADT4_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_APIC_NMI,f,o) |
257 | #define ACPI_MADT4_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_APIC_NMI,f,o) |
| 228 | #define ACPI_MADT7_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_SAPIC,f,o) |
258 | #define ACPI_MADT7_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_SAPIC,f,o) |
| 229 | #define ACPI_MADT8_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_INTERRUPT_SOURCE,f,o) |
259 | #define ACPI_MADT8_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_INTERRUPT_SOURCE,f,o) |
| 230 | #define ACPI_MADT9_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_X2APIC,f,o) |
260 | #define ACPI_MADT9_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_X2APIC,f,o) |
| 231 | #define ACPI_MADT10_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_X2APIC_NMI,f,o) |
261 | #define ACPI_MADT10_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_X2APIC_NMI,f,o) |
| - | 262 | #define ACPI_WDDT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_WDDT,f,o) |
|
| - | 263 | #define ACPI_EINJ0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_WHEA_HEADER,f,o) |
|
| - | 264 | #define ACPI_ERST0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_WHEA_HEADER,f,o) |
|
| - | 265 | #define ACPI_HEST0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_HEST_IA_MACHINE_CHECK,f,o) |
|
| - | 266 | #define ACPI_HEST1_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_HEST_IA_CORRECTED,f,o) |
|
| - | 267 | #define ACPI_HEST6_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_HEST_AER_ROOT,f,o) |
|
| 232 | 268 | ||
| 233 | /* |
269 | /* |
| 234 | * Required terminator for all tables below |
270 | * Required terminator for all tables below |
| 235 | */ |
271 | */ |
| 236 | #define ACPI_DMT_TERMINATOR {ACPI_DMT_EXIT, 0, NULL, 0} |
272 | #define ACPI_DMT_TERMINATOR {ACPI_DMT_EXIT, 0, NULL, 0} |
| 237 | 273 | ||
| 238 | 274 | ||
| 239 | /* |
275 | /* |
| 240 | * ACPI Table Information, used to dump formatted ACPI tables |
276 | * ACPI Table Information, used to dump formatted ACPI tables |
| 241 | * |
277 | * |
| 242 | * Each entry is of the form: |
278 | * Each entry is of the form: |
| 243 | */ |
279 | */ |
| 244 | 280 | ||
| 245 | /******************************************************************************* |
281 | /******************************************************************************* |
| 246 | * |
282 | * |
| 247 | * Common ACPI table header |
283 | * Common ACPI table header |
| 248 | * |
284 | * |
| 249 | ******************************************************************************/ |
285 | ******************************************************************************/ |
| 250 | 286 | ||
| 251 | ACPI_DMTABLE_INFO AcpiDmTableInfoHeader[] = |
287 | ACPI_DMTABLE_INFO AcpiDmTableInfoHeader[] = |
| 252 | { |
288 | { |
| 253 | {ACPI_DMT_SIG, ACPI_HDR_OFFSET (Signature[0]), "Signature", 0}, |
289 | {ACPI_DMT_SIG, ACPI_HDR_OFFSET (Signature[0]), "Signature", 0}, |
| 254 | {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (Length), "Table Length", DT_LENGTH}, |
290 | {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (Length), "Table Length", DT_LENGTH}, |
| 255 | {ACPI_DMT_UINT8, ACPI_HDR_OFFSET (Revision), "Revision", 0}, |
291 | {ACPI_DMT_UINT8, ACPI_HDR_OFFSET (Revision), "Revision", 0}, |
| 256 | {ACPI_DMT_CHKSUM, ACPI_HDR_OFFSET (Checksum), "Checksum", 0}, |
292 | {ACPI_DMT_CHKSUM, ACPI_HDR_OFFSET (Checksum), "Checksum", 0}, |
| 257 | {ACPI_DMT_NAME6, ACPI_HDR_OFFSET (OemId[0]), "Oem ID", 0}, |
293 | {ACPI_DMT_NAME6, ACPI_HDR_OFFSET (OemId[0]), "Oem ID", 0}, |
| 258 | {ACPI_DMT_NAME8, ACPI_HDR_OFFSET (OemTableId[0]), "Oem Table ID", 0}, |
294 | {ACPI_DMT_NAME8, ACPI_HDR_OFFSET (OemTableId[0]), "Oem Table ID", 0}, |
| 259 | {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (OemRevision), "Oem Revision", 0}, |
295 | {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (OemRevision), "Oem Revision", 0}, |
| 260 | {ACPI_DMT_NAME4, ACPI_HDR_OFFSET (AslCompilerId[0]), "Asl Compiler ID", 0}, |
296 | {ACPI_DMT_NAME4, ACPI_HDR_OFFSET (AslCompilerId[0]), "Asl Compiler ID", 0}, |
| 261 | {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (AslCompilerRevision), "Asl Compiler Revision", 0}, |
297 | {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (AslCompilerRevision), "Asl Compiler Revision", 0}, |
| 262 | ACPI_DMT_TERMINATOR |
298 | ACPI_DMT_TERMINATOR |
| 263 | }; |
299 | }; |
| 264 | 300 | ||
| 265 | 301 | ||
| 266 | /******************************************************************************* |
302 | /******************************************************************************* |
| 267 | * |
303 | * |
| 268 | * GAS - Generic Address Structure |
304 | * GAS - Generic Address Structure |
| 269 | * |
305 | * |
| 270 | ******************************************************************************/ |
306 | ******************************************************************************/ |
| 271 | 307 | ||
| 272 | ACPI_DMTABLE_INFO AcpiDmTableInfoGas[] = |
308 | ACPI_DMTABLE_INFO AcpiDmTableInfoGas[] = |
| 273 | { |
309 | { |
| 274 | {ACPI_DMT_SPACEID, ACPI_GAS_OFFSET (SpaceId), "Space ID", 0}, |
310 | {ACPI_DMT_SPACEID, ACPI_GAS_OFFSET (SpaceId), "Space ID", 0}, |
| 275 | {ACPI_DMT_UINT8, ACPI_GAS_OFFSET (BitWidth), "Bit Width", 0}, |
311 | {ACPI_DMT_UINT8, ACPI_GAS_OFFSET (BitWidth), "Bit Width", 0}, |
| 276 | {ACPI_DMT_UINT8, ACPI_GAS_OFFSET (BitOffset), "Bit Offset", 0}, |
312 | {ACPI_DMT_UINT8, ACPI_GAS_OFFSET (BitOffset), "Bit Offset", 0}, |
| 277 | {ACPI_DMT_UINT8, ACPI_GAS_OFFSET (AccessWidth), "Access Width", 0}, |
313 | {ACPI_DMT_ACCWIDTH, ACPI_GAS_OFFSET (AccessWidth), "Encoded Access Width", 0}, |
| 278 | {ACPI_DMT_UINT64, ACPI_GAS_OFFSET (Address), "Address", 0}, |
314 | {ACPI_DMT_UINT64, ACPI_GAS_OFFSET (Address), "Address", 0}, |
| 279 | ACPI_DMT_TERMINATOR |
315 | ACPI_DMT_TERMINATOR |
| 280 | }; |
316 | }; |
| 281 | 317 | ||
| 282 | 318 | ||
| 283 | /******************************************************************************* |
319 | /******************************************************************************* |
| 284 | * |
320 | * |
| 285 | * RSDP - Root System Description Pointer (Signature is "RSD PTR ") |
321 | * RSDP - Root System Description Pointer (Signature is "RSD PTR ") |
| 286 | * |
322 | * |
| 287 | ******************************************************************************/ |
323 | ******************************************************************************/ |
| 288 | 324 | ||
| 289 | ACPI_DMTABLE_INFO AcpiDmTableInfoRsdp1[] = |
325 | ACPI_DMTABLE_INFO AcpiDmTableInfoRsdp1[] = |
| 290 | { |
326 | { |
| 291 | {ACPI_DMT_NAME8, ACPI_RSDP_OFFSET (Signature[0]), "Signature", 0}, |
327 | {ACPI_DMT_NAME8, ACPI_RSDP_OFFSET (Signature[0]), "Signature", 0}, |
| 292 | {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (Checksum), "Checksum", 0}, |
328 | {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (Checksum), "Checksum", 0}, |
| 293 | {ACPI_DMT_NAME6, ACPI_RSDP_OFFSET (OemId[0]), "Oem ID", 0}, |
329 | {ACPI_DMT_NAME6, ACPI_RSDP_OFFSET (OemId[0]), "Oem ID", 0}, |
| 294 | {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (Revision), "Revision", 0}, |
330 | {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (Revision), "Revision", 0}, |
| 295 | {ACPI_DMT_UINT32, ACPI_RSDP_OFFSET (RsdtPhysicalAddress), "RSDT Address", 0}, |
331 | {ACPI_DMT_UINT32, ACPI_RSDP_OFFSET (RsdtPhysicalAddress), "RSDT Address", 0}, |
| 296 | ACPI_DMT_TERMINATOR |
332 | ACPI_DMT_TERMINATOR |
| 297 | }; |
333 | }; |
| 298 | 334 | ||
| 299 | /* ACPI 2.0+ Extensions */ |
335 | /* ACPI 2.0+ Extensions */ |
| 300 | 336 | ||
| 301 | ACPI_DMTABLE_INFO AcpiDmTableInfoRsdp2[] = |
337 | ACPI_DMTABLE_INFO AcpiDmTableInfoRsdp2[] = |
| 302 | { |
338 | { |
| 303 | {ACPI_DMT_UINT32, ACPI_RSDP_OFFSET (Length), "Length", DT_LENGTH}, |
339 | {ACPI_DMT_UINT32, ACPI_RSDP_OFFSET (Length), "Length", DT_LENGTH}, |
| 304 | {ACPI_DMT_UINT64, ACPI_RSDP_OFFSET (XsdtPhysicalAddress), "XSDT Address", 0}, |
340 | {ACPI_DMT_UINT64, ACPI_RSDP_OFFSET (XsdtPhysicalAddress), "XSDT Address", 0}, |
| 305 | {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (ExtendedChecksum), "Extended Checksum", 0}, |
341 | {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (ExtendedChecksum), "Extended Checksum", 0}, |
| 306 | {ACPI_DMT_UINT24, ACPI_RSDP_OFFSET (Reserved[0]), "Reserved", 0}, |
342 | {ACPI_DMT_UINT24, ACPI_RSDP_OFFSET (Reserved[0]), "Reserved", 0}, |
| 307 | ACPI_DMT_TERMINATOR |
343 | ACPI_DMT_TERMINATOR |
| 308 | }; |
344 | }; |
| 309 | 345 | ||
| 310 | 346 | ||
| 311 | /******************************************************************************* |
347 | /******************************************************************************* |
| 312 | * |
348 | * |
| 313 | * FACS - Firmware ACPI Control Structure |
349 | * FACS - Firmware ACPI Control Structure |
| 314 | * |
350 | * |
| 315 | ******************************************************************************/ |
351 | ******************************************************************************/ |
| 316 | 352 | ||
| 317 | ACPI_DMTABLE_INFO AcpiDmTableInfoFacs[] = |
353 | ACPI_DMTABLE_INFO AcpiDmTableInfoFacs[] = |
| 318 | { |
354 | { |
| 319 | {ACPI_DMT_NAME4, ACPI_FACS_OFFSET (Signature[0]), "Signature", 0}, |
355 | {ACPI_DMT_NAME4, ACPI_FACS_OFFSET (Signature[0]), "Signature", 0}, |
| 320 | {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (Length), "Length", DT_LENGTH}, |
356 | {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (Length), "Length", DT_LENGTH}, |
| 321 | {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (HardwareSignature), "Hardware Signature", 0}, |
357 | {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (HardwareSignature), "Hardware Signature", 0}, |
| 322 | {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (FirmwareWakingVector), "32 Firmware Waking Vector", 0}, |
358 | {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (FirmwareWakingVector), "32 Firmware Waking Vector", 0}, |
| 323 | {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (GlobalLock), "Global Lock", 0}, |
359 | {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (GlobalLock), "Global Lock", 0}, |
| 324 | {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, |
360 | {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, |
| 325 | {ACPI_DMT_FLAG0, ACPI_FACS_FLAG_OFFSET (Flags,0), "S4BIOS Support Present", 0}, |
361 | {ACPI_DMT_FLAG0, ACPI_FACS_FLAG_OFFSET (Flags,0), "S4BIOS Support Present", 0}, |
| 326 | {ACPI_DMT_FLAG1, ACPI_FACS_FLAG_OFFSET (Flags,0), "64-bit Wake Supported (V2)", 0}, |
362 | {ACPI_DMT_FLAG1, ACPI_FACS_FLAG_OFFSET (Flags,0), "64-bit Wake Supported (V2)", 0}, |
| 327 | {ACPI_DMT_UINT64, ACPI_FACS_OFFSET (XFirmwareWakingVector), "64 Firmware Waking Vector", 0}, |
363 | {ACPI_DMT_UINT64, ACPI_FACS_OFFSET (XFirmwareWakingVector), "64 Firmware Waking Vector", 0}, |
| 328 | {ACPI_DMT_UINT8, ACPI_FACS_OFFSET (Version), "Version", 0}, |
364 | {ACPI_DMT_UINT8, ACPI_FACS_OFFSET (Version), "Version", 0}, |
| 329 | {ACPI_DMT_UINT24, ACPI_FACS_OFFSET (Reserved[0]), "Reserved", 0}, |
365 | {ACPI_DMT_UINT24, ACPI_FACS_OFFSET (Reserved[0]), "Reserved", 0}, |
| 330 | {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (OspmFlags), "OspmFlags (decoded below)", DT_FLAG}, |
366 | {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (OspmFlags), "OspmFlags (decoded below)", DT_FLAG}, |
| 331 | {ACPI_DMT_FLAG0, ACPI_FACS_FLAG_OFFSET (OspmFlags,0), "64-bit Wake Env Required (V2)", 0}, |
367 | {ACPI_DMT_FLAG0, ACPI_FACS_FLAG_OFFSET (OspmFlags,0), "64-bit Wake Env Required (V2)", 0}, |
| 332 | ACPI_DMT_TERMINATOR |
368 | ACPI_DMT_TERMINATOR |
| 333 | }; |
369 | }; |
| 334 | 370 | ||
| 335 | 371 | ||
| 336 | /******************************************************************************* |
372 | /******************************************************************************* |
| 337 | * |
373 | * |
| 338 | * FADT - Fixed ACPI Description Table (Signature is FACP) |
374 | * FADT - Fixed ACPI Description Table (Signature is FACP) |
| 339 | * |
375 | * |
| 340 | ******************************************************************************/ |
376 | ******************************************************************************/ |
| 341 | 377 | ||
| 342 | /* ACPI 1.0 FADT (Version 1) */ |
378 | /* ACPI 1.0 FADT (Version 1) */ |
| 343 | 379 | ||
| 344 | ACPI_DMTABLE_INFO AcpiDmTableInfoFadt1[] = |
380 | ACPI_DMTABLE_INFO AcpiDmTableInfoFadt1[] = |
| 345 | { |
381 | { |
| 346 | {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Facs), "FACS Address", 0}, |
382 | {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Facs), "FACS Address", 0}, |
| 347 | {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Dsdt), "DSDT Address", DT_NON_ZERO}, |
383 | {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Dsdt), "DSDT Address", DT_NON_ZERO}, |
| 348 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Model), "Model", 0}, |
384 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Model), "Model", 0}, |
| 349 | {ACPI_DMT_FADTPM, ACPI_FADT_OFFSET (PreferredProfile), "PM Profile", 0}, |
385 | {ACPI_DMT_FADTPM, ACPI_FADT_OFFSET (PreferredProfile), "PM Profile", 0}, |
| 350 | {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (SciInterrupt), "SCI Interrupt", 0}, |
386 | {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (SciInterrupt), "SCI Interrupt", 0}, |
| 351 | {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (SmiCommand), "SMI Command Port", 0}, |
387 | {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (SmiCommand), "SMI Command Port", 0}, |
| 352 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (AcpiEnable), "ACPI Enable Value", 0}, |
388 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (AcpiEnable), "ACPI Enable Value", 0}, |
| 353 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (AcpiDisable), "ACPI Disable Value", 0}, |
389 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (AcpiDisable), "ACPI Disable Value", 0}, |
| 354 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (S4BiosRequest), "S4BIOS Command", 0}, |
390 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (S4BiosRequest), "S4BIOS Command", 0}, |
| 355 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (PstateControl), "P-State Control", 0}, |
391 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (PstateControl), "P-State Control", 0}, |
| 356 | {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1aEventBlock), "PM1A Event Block Address", 0}, |
392 | {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1aEventBlock), "PM1A Event Block Address", 0}, |
| 357 | {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1bEventBlock), "PM1B Event Block Address", 0}, |
393 | {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1bEventBlock), "PM1B Event Block Address", 0}, |
| 358 | {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1aControlBlock), "PM1A Control Block Address", 0}, |
394 | {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1aControlBlock), "PM1A Control Block Address", 0}, |
| 359 | {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1bControlBlock), "PM1B Control Block Address", 0}, |
395 | {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1bControlBlock), "PM1B Control Block Address", 0}, |
| 360 | {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm2ControlBlock), "PM2 Control Block Address", 0}, |
396 | {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm2ControlBlock), "PM2 Control Block Address", 0}, |
| 361 | {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (PmTimerBlock), "PM Timer Block Address", 0}, |
397 | {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (PmTimerBlock), "PM Timer Block Address", 0}, |
| 362 | {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Gpe0Block), "GPE0 Block Address", 0}, |
398 | {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Gpe0Block), "GPE0 Block Address", 0}, |
| 363 | {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Gpe1Block), "GPE1 Block Address", 0}, |
399 | {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Gpe1Block), "GPE1 Block Address", 0}, |
| 364 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm1EventLength), "PM1 Event Block Length", 0}, |
400 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm1EventLength), "PM1 Event Block Length", 0}, |
| 365 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm1ControlLength), "PM1 Control Block Length", 0}, |
401 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm1ControlLength), "PM1 Control Block Length", 0}, |
| 366 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm2ControlLength), "PM2 Control Block Length", 0}, |
402 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm2ControlLength), "PM2 Control Block Length", 0}, |
| 367 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (PmTimerLength), "PM Timer Block Length", 0}, |
403 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (PmTimerLength), "PM Timer Block Length", 0}, |
| 368 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe0BlockLength), "GPE0 Block Length", 0}, |
404 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe0BlockLength), "GPE0 Block Length", 0}, |
| 369 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe1BlockLength), "GPE1 Block Length", 0}, |
405 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe1BlockLength), "GPE1 Block Length", 0}, |
| 370 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe1Base), "GPE1 Base Offset", 0}, |
406 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe1Base), "GPE1 Base Offset", 0}, |
| 371 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (CstControl), "_CST Support", 0}, |
407 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (CstControl), "_CST Support", 0}, |
| 372 | {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (C2Latency), "C2 Latency", 0}, |
408 | {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (C2Latency), "C2 Latency", 0}, |
| 373 | {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (C3Latency), "C3 Latency", 0}, |
409 | {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (C3Latency), "C3 Latency", 0}, |
| 374 | {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (FlushSize), "CPU Cache Size", 0}, |
410 | {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (FlushSize), "CPU Cache Size", 0}, |
| 375 | {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (FlushStride), "Cache Flush Stride", 0}, |
411 | {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (FlushStride), "Cache Flush Stride", 0}, |
| 376 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DutyOffset), "Duty Cycle Offset", 0}, |
412 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DutyOffset), "Duty Cycle Offset", 0}, |
| 377 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DutyWidth), "Duty Cycle Width", 0}, |
413 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DutyWidth), "Duty Cycle Width", 0}, |
| 378 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DayAlarm), "RTC Day Alarm Index", 0}, |
414 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DayAlarm), "RTC Day Alarm Index", 0}, |
| 379 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (MonthAlarm), "RTC Month Alarm Index", 0}, |
415 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (MonthAlarm), "RTC Month Alarm Index", 0}, |
| 380 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Century), "RTC Century Index", 0}, |
416 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Century), "RTC Century Index", 0}, |
| 381 | {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (BootFlags), "Boot Flags (decoded below)", DT_FLAG}, |
417 | {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (BootFlags), "Boot Flags (decoded below)", DT_FLAG}, |
| 382 | 418 | ||
| 383 | /* Boot Architecture Flags byte 0 */ |
419 | /* Boot Architecture Flags byte 0 */ |
| 384 | 420 | ||
| 385 | {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "Legacy Devices Supported (V2)", 0}, |
421 | {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "Legacy Devices Supported (V2)", 0}, |
| 386 | {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "8042 Present on ports 60/64 (V2)", 0}, |
422 | {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "8042 Present on ports 60/64 (V2)", 0}, |
| 387 | {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "VGA Not Present (V4)", 0}, |
423 | {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "VGA Not Present (V4)", 0}, |
| 388 | {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "MSI Not Supported (V4)", 0}, |
424 | {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "MSI Not Supported (V4)", 0}, |
| 389 | {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "PCIe ASPM Not Supported (V4)", 0}, |
425 | {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "PCIe ASPM Not Supported (V4)", 0}, |
| 390 | 426 | ||
| 391 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Reserved), "Reserved", 0}, |
427 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Reserved), "Reserved", 0}, |
| 392 | {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, |
428 | {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, |
| 393 | 429 | ||
| 394 | /* Flags byte 0 */ |
430 | /* Flags byte 0 */ |
| 395 | 431 | ||
| 396 | {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,0), "WBINVD instruction is operational (V1)", 0}, |
432 | {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,0), "WBINVD instruction is operational (V1)", 0}, |
| 397 | {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,0), "WBINVD flushes all caches (V1)", 0}, |
433 | {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,0), "WBINVD flushes all caches (V1)", 0}, |
| 398 | {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,0), "All CPUs support C1 (V1)", 0}, |
434 | {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,0), "All CPUs support C1 (V1)", 0}, |
| 399 | {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,0), "C2 works on MP system (V1)", 0}, |
435 | {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,0), "C2 works on MP system (V1)", 0}, |
| 400 | {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (Flags,0), "Control Method Power Button (V1)", 0}, |
436 | {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (Flags,0), "Control Method Power Button (V1)", 0}, |
| 401 | {ACPI_DMT_FLAG5, ACPI_FADT_FLAG_OFFSET (Flags,0), "Control Method Sleep Button (V1)", 0}, |
437 | {ACPI_DMT_FLAG5, ACPI_FADT_FLAG_OFFSET (Flags,0), "Control Method Sleep Button (V1)", 0}, |
| 402 | {ACPI_DMT_FLAG6, ACPI_FADT_FLAG_OFFSET (Flags,0), "RTC wake not in fixed reg space (V1)", 0}, |
438 | {ACPI_DMT_FLAG6, ACPI_FADT_FLAG_OFFSET (Flags,0), "RTC wake not in fixed reg space (V1)", 0}, |
| 403 | {ACPI_DMT_FLAG7, ACPI_FADT_FLAG_OFFSET (Flags,0), "RTC can wake system from S4 (V1)", 0}, |
439 | {ACPI_DMT_FLAG7, ACPI_FADT_FLAG_OFFSET (Flags,0), "RTC can wake system from S4 (V1)", 0}, |
| 404 | 440 | ||
| 405 | /* Flags byte 1 */ |
441 | /* Flags byte 1 */ |
| 406 | 442 | ||
| 407 | {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,1), "32-bit PM Timer (V1)", 0}, |
443 | {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,1), "32-bit PM Timer (V1)", 0}, |
| 408 | {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,1), "Docking Supported (V1)", 0}, |
444 | {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,1), "Docking Supported (V1)", 0}, |
| 409 | {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,1), "Reset Register Supported (V2)", 0}, |
445 | {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,1), "Reset Register Supported (V2)", 0}, |
| 410 | {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,1), "Sealed Case (V3)", 0}, |
446 | {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,1), "Sealed Case (V3)", 0}, |
| 411 | {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (Flags,1), "Headless - No Video (V3)", 0}, |
447 | {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (Flags,1), "Headless - No Video (V3)", 0}, |
| 412 | {ACPI_DMT_FLAG5, ACPI_FADT_FLAG_OFFSET (Flags,1), "Use native instr after SLP_TYPx (V3)", 0}, |
448 | {ACPI_DMT_FLAG5, ACPI_FADT_FLAG_OFFSET (Flags,1), "Use native instr after SLP_TYPx (V3)", 0}, |
| 413 | {ACPI_DMT_FLAG6, ACPI_FADT_FLAG_OFFSET (Flags,1), "PCIEXP_WAK Bits Supported (V4)", 0}, |
449 | {ACPI_DMT_FLAG6, ACPI_FADT_FLAG_OFFSET (Flags,1), "PCIEXP_WAK Bits Supported (V4)", 0}, |
| 414 | {ACPI_DMT_FLAG7, ACPI_FADT_FLAG_OFFSET (Flags,1), "Use Platform Timer (V4)", 0}, |
450 | {ACPI_DMT_FLAG7, ACPI_FADT_FLAG_OFFSET (Flags,1), "Use Platform Timer (V4)", 0}, |
| 415 | 451 | ||
| 416 | /* Flags byte 2 */ |
452 | /* Flags byte 2 */ |
| 417 | 453 | ||
| 418 | {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,2), "RTC_STS valid on S4 wake (V4)", 0}, |
454 | {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,2), "RTC_STS valid on S4 wake (V4)", 0}, |
| 419 | {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,2), "Remote Power-on capable (V4)", 0}, |
455 | {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,2), "Remote Power-on capable (V4)", 0}, |
| 420 | {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,2), "Use APIC Cluster Model (V4)", 0}, |
456 | {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,2), "Use APIC Cluster Model (V4)", 0}, |
| 421 | {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,2), "Use APIC Physical Destination Mode (V4)", 0}, |
457 | {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,2), "Use APIC Physical Destination Mode (V4)", 0}, |
| 422 | ACPI_DMT_TERMINATOR |
458 | ACPI_DMT_TERMINATOR |
| 423 | }; |
459 | }; |
| 424 | 460 | ||
| 425 | /* ACPI 1.0 MS Extensions (FADT version 2) */ |
461 | /* ACPI 1.0 MS Extensions (FADT version 2) */ |
| 426 | 462 | ||
| 427 | ACPI_DMTABLE_INFO AcpiDmTableInfoFadt2[] = |
463 | ACPI_DMTABLE_INFO AcpiDmTableInfoFadt2[] = |
| 428 | { |
464 | { |
| 429 | {ACPI_DMT_GAS, ACPI_FADT_OFFSET (ResetRegister), "Reset Register", 0}, |
465 | {ACPI_DMT_GAS, ACPI_FADT_OFFSET (ResetRegister), "Reset Register", 0}, |
| 430 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (ResetValue), "Value to cause reset", 0}, |
466 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (ResetValue), "Value to cause reset", 0}, |
| 431 | {ACPI_DMT_UINT24, ACPI_FADT_OFFSET (Reserved4[0]), "Reserved", 0}, |
467 | {ACPI_DMT_UINT24, ACPI_FADT_OFFSET (Reserved4[0]), "Reserved", 0}, |
| 432 | ACPI_DMT_TERMINATOR |
468 | ACPI_DMT_TERMINATOR |
| 433 | }; |
469 | }; |
| 434 | 470 | ||
| 435 | /* ACPI 2.0+ Extensions (FADT version 3+) */ |
471 | /* ACPI 2.0+ Extensions (FADT version 3+) */ |
| 436 | 472 | ||
| 437 | ACPI_DMTABLE_INFO AcpiDmTableInfoFadt3[] = |
473 | ACPI_DMTABLE_INFO AcpiDmTableInfoFadt3[] = |
| 438 | { |
474 | { |
| 439 | {ACPI_DMT_GAS, ACPI_FADT_OFFSET (ResetRegister), "Reset Register", 0}, |
475 | {ACPI_DMT_GAS, ACPI_FADT_OFFSET (ResetRegister), "Reset Register", 0}, |
| 440 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (ResetValue), "Value to cause reset", 0}, |
476 | {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (ResetValue), "Value to cause reset", 0}, |
| 441 | {ACPI_DMT_UINT24, ACPI_FADT_OFFSET (Reserved4[0]), "Reserved", 0}, |
477 | {ACPI_DMT_UINT24, ACPI_FADT_OFFSET (Reserved4[0]), "Reserved", 0}, |
| 442 | {ACPI_DMT_UINT64, ACPI_FADT_OFFSET (XFacs), "FACS Address", 0}, |
478 | {ACPI_DMT_UINT64, ACPI_FADT_OFFSET (XFacs), "FACS Address", 0}, |
| 443 | {ACPI_DMT_UINT64, ACPI_FADT_OFFSET (XDsdt), "DSDT Address", 0}, |
479 | {ACPI_DMT_UINT64, ACPI_FADT_OFFSET (XDsdt), "DSDT Address", 0}, |
| 444 | {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1aEventBlock), "PM1A Event Block", 0}, |
480 | {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1aEventBlock), "PM1A Event Block", 0}, |
| 445 | {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1bEventBlock), "PM1B Event Block", 0}, |
481 | {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1bEventBlock), "PM1B Event Block", 0}, |
| 446 | {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1aControlBlock), "PM1A Control Block", 0}, |
482 | {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1aControlBlock), "PM1A Control Block", 0}, |
| 447 | {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1bControlBlock), "PM1B Control Block", 0}, |
483 | {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1bControlBlock), "PM1B Control Block", 0}, |
| 448 | {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm2ControlBlock), "PM2 Control Block", 0}, |
484 | {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm2ControlBlock), "PM2 Control Block", 0}, |
| 449 | {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPmTimerBlock), "PM Timer Block", 0}, |
485 | {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPmTimerBlock), "PM Timer Block", 0}, |
| 450 | {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XGpe0Block), "GPE0 Block", 0}, |
486 | {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XGpe0Block), "GPE0 Block", 0}, |
| 451 | {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XGpe1Block), "GPE1 Block", 0}, |
487 | {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XGpe1Block), "GPE1 Block", 0}, |
| 452 | ACPI_DMT_TERMINATOR |
488 | ACPI_DMT_TERMINATOR |
| 453 | }; |
489 | }; |
| 454 | 490 | ||
| 455 | 491 | ||
| 456 | /* |
492 | /* |
| 457 | * Remaining tables are not consumed directly by the ACPICA subsystem |
493 | * Remaining tables are not consumed directly by the ACPICA subsystem |
| 458 | */ |
494 | */ |
| 459 | 495 | ||
| 460 | /******************************************************************************* |
496 | /******************************************************************************* |
| 461 | * |
497 | * |
| 462 | * ASF - Alert Standard Format table (Signature "ASF!") |
498 | * ASF - Alert Standard Format table (Signature "ASF!") |
| 463 | * |
499 | * |
| 464 | ******************************************************************************/ |
500 | ******************************************************************************/ |
| 465 | 501 | ||
| 466 | /* Common Subtable header (one per Subtable) */ |
502 | /* Common Subtable header (one per Subtable) */ |
| 467 | 503 | ||
| 468 | ACPI_DMTABLE_INFO AcpiDmTableInfoAsfHdr[] = |
504 | ACPI_DMTABLE_INFO AcpiDmTableInfoAsfHdr[] = |
| 469 | { |
505 | { |
| 470 | {ACPI_DMT_ASF, ACPI_ASF0_OFFSET (Header.Type), "Subtable Type", 0}, |
506 | {ACPI_DMT_ASF, ACPI_ASF0_OFFSET (Header.Type), "Subtable Type", 0}, |
| 471 | {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (Header.Reserved), "Reserved", 0}, |
507 | {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (Header.Reserved), "Reserved", 0}, |
| 472 | {ACPI_DMT_UINT16, ACPI_ASF0_OFFSET (Header.Length), "Length", DT_LENGTH}, |
508 | {ACPI_DMT_UINT16, ACPI_ASF0_OFFSET (Header.Length), "Length", DT_LENGTH}, |
| 473 | ACPI_DMT_TERMINATOR |
509 | ACPI_DMT_TERMINATOR |
| 474 | }; |
510 | }; |
| 475 | 511 | ||
| 476 | /* 0: ASF Information */ |
512 | /* 0: ASF Information */ |
| 477 | 513 | ||
| 478 | ACPI_DMTABLE_INFO AcpiDmTableInfoAsf0[] = |
514 | ACPI_DMTABLE_INFO AcpiDmTableInfoAsf0[] = |
| 479 | { |
515 | { |
| 480 | {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (MinResetValue), "Minimum Reset Value", 0}, |
516 | {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (MinResetValue), "Minimum Reset Value", 0}, |
| 481 | {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (MinPollInterval), "Minimum Polling Interval", 0}, |
517 | {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (MinPollInterval), "Minimum Polling Interval", 0}, |
| 482 | {ACPI_DMT_UINT16, ACPI_ASF0_OFFSET (SystemId), "System ID", 0}, |
518 | {ACPI_DMT_UINT16, ACPI_ASF0_OFFSET (SystemId), "System ID", 0}, |
| 483 | {ACPI_DMT_UINT32, ACPI_ASF0_OFFSET (MfgId), "Manufacturer ID", 0}, |
519 | {ACPI_DMT_UINT32, ACPI_ASF0_OFFSET (MfgId), "Manufacturer ID", 0}, |
| 484 | {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (Flags), "Flags", 0}, |
520 | {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (Flags), "Flags", 0}, |
| 485 | {ACPI_DMT_UINT24, ACPI_ASF0_OFFSET (Reserved2[0]), "Reserved", 0}, |
521 | {ACPI_DMT_UINT24, ACPI_ASF0_OFFSET (Reserved2[0]), "Reserved", 0}, |
| 486 | ACPI_DMT_TERMINATOR |
522 | ACPI_DMT_TERMINATOR |
| 487 | }; |
523 | }; |
| 488 | 524 | ||
| 489 | /* 1: ASF Alerts */ |
525 | /* 1: ASF Alerts */ |
| 490 | 526 | ||
| 491 | ACPI_DMTABLE_INFO AcpiDmTableInfoAsf1[] = |
527 | ACPI_DMTABLE_INFO AcpiDmTableInfoAsf1[] = |
| 492 | { |
528 | { |
| 493 | {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (AssertMask), "AssertMask", 0}, |
529 | {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (AssertMask), "AssertMask", 0}, |
| 494 | {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (DeassertMask), "DeassertMask", 0}, |
530 | {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (DeassertMask), "DeassertMask", 0}, |
| 495 | {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (Alerts), "Alert Count", 0}, |
531 | {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (Alerts), "Alert Count", 0}, |
| 496 | {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (DataLength), "Alert Data Length", 0}, |
532 | {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (DataLength), "Alert Data Length", 0}, |
| 497 | ACPI_DMT_TERMINATOR |
533 | ACPI_DMT_TERMINATOR |
| 498 | }; |
534 | }; |
| 499 | 535 | ||
| 500 | /* 1a: ASF Alert data */ |
536 | /* 1a: ASF Alert data */ |
| 501 | 537 | ||
| 502 | ACPI_DMTABLE_INFO AcpiDmTableInfoAsf1a[] = |
538 | ACPI_DMTABLE_INFO AcpiDmTableInfoAsf1a[] = |
| 503 | { |
539 | { |
| 504 | {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Address), "Address", 0}, |
540 | {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Address), "Address", 0}, |
| 505 | {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Command), "Command", 0}, |
541 | {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Command), "Command", 0}, |
| 506 | {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Mask), "Mask", 0}, |
542 | {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Mask), "Mask", 0}, |
| 507 | {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Value), "Value", 0}, |
543 | {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Value), "Value", 0}, |
| 508 | {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SensorType), "SensorType", 0}, |
544 | {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SensorType), "SensorType", 0}, |
| 509 | {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Type), "Type", 0}, |
545 | {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Type), "Type", 0}, |
| 510 | {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Offset), "Offset", 0}, |
546 | {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Offset), "Offset", 0}, |
| 511 | {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SourceType), "SourceType", 0}, |
547 | {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SourceType), "SourceType", 0}, |
| 512 | {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Severity), "Severity", 0}, |
548 | {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Severity), "Severity", 0}, |
| 513 | {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SensorNumber), "SensorNumber", 0}, |
549 | {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SensorNumber), "SensorNumber", 0}, |
| 514 | {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Entity), "Entity", 0}, |
550 | {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Entity), "Entity", 0}, |
| 515 | {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Instance), "Instance", 0}, |
551 | {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Instance), "Instance", 0}, |
| 516 | ACPI_DMT_TERMINATOR |
552 | ACPI_DMT_TERMINATOR |
| 517 | }; |
553 | }; |
| 518 | 554 | ||
| 519 | /* 2: ASF Remote Control */ |
555 | /* 2: ASF Remote Control */ |
| 520 | 556 | ||
| 521 | ACPI_DMTABLE_INFO AcpiDmTableInfoAsf2[] = |
557 | ACPI_DMTABLE_INFO AcpiDmTableInfoAsf2[] = |
| 522 | { |
558 | { |
| 523 | {ACPI_DMT_UINT8, ACPI_ASF2_OFFSET (Controls), "Control Count", 0}, |
559 | {ACPI_DMT_UINT8, ACPI_ASF2_OFFSET (Controls), "Control Count", 0}, |
| 524 | {ACPI_DMT_UINT8, ACPI_ASF2_OFFSET (DataLength), "Control Data Length", 0}, |
560 | {ACPI_DMT_UINT8, ACPI_ASF2_OFFSET (DataLength), "Control Data Length", 0}, |
| 525 | {ACPI_DMT_UINT16, ACPI_ASF2_OFFSET (Reserved2), "Reserved", 0}, |
561 | {ACPI_DMT_UINT16, ACPI_ASF2_OFFSET (Reserved2), "Reserved", 0}, |
| 526 | ACPI_DMT_TERMINATOR |
562 | ACPI_DMT_TERMINATOR |
| 527 | }; |
563 | }; |
| 528 | 564 | ||
| 529 | /* 2a: ASF Control data */ |
565 | /* 2a: ASF Control data */ |
| 530 | 566 | ||
| 531 | ACPI_DMTABLE_INFO AcpiDmTableInfoAsf2a[] = |
567 | ACPI_DMTABLE_INFO AcpiDmTableInfoAsf2a[] = |
| 532 | { |
568 | { |
| 533 | {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Function), "Function", 0}, |
569 | {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Function), "Function", 0}, |
| 534 | {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Address), "Address", 0}, |
570 | {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Address), "Address", 0}, |
| 535 | {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Command), "Command", 0}, |
571 | {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Command), "Command", 0}, |
| 536 | {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Value), "Value", 0}, |
572 | {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Value), "Value", 0}, |
| 537 | ACPI_DMT_TERMINATOR |
573 | ACPI_DMT_TERMINATOR |
| 538 | }; |
574 | }; |
| 539 | 575 | ||
| 540 | /* 3: ASF RMCP Boot Options */ |
576 | /* 3: ASF RMCP Boot Options */ |
| 541 | 577 | ||
| 542 | ACPI_DMTABLE_INFO AcpiDmTableInfoAsf3[] = |
578 | ACPI_DMTABLE_INFO AcpiDmTableInfoAsf3[] = |
| 543 | { |
579 | { |
| 544 | {ACPI_DMT_UINT56, ACPI_ASF3_OFFSET (Capabilities[0]), "Capabilities", 0}, |
580 | {ACPI_DMT_BUF7, ACPI_ASF3_OFFSET (Capabilities[0]), "Capabilities", 0}, |
| 545 | {ACPI_DMT_UINT8, ACPI_ASF3_OFFSET (CompletionCode), "Completion Code", 0}, |
581 | {ACPI_DMT_UINT8, ACPI_ASF3_OFFSET (CompletionCode), "Completion Code", 0}, |
| 546 | {ACPI_DMT_UINT32, ACPI_ASF3_OFFSET (EnterpriseId), "Enterprise ID", 0}, |
582 | {ACPI_DMT_UINT32, ACPI_ASF3_OFFSET (EnterpriseId), "Enterprise ID", 0}, |
| 547 | {ACPI_DMT_UINT8, ACPI_ASF3_OFFSET (Command), "Command", 0}, |
583 | {ACPI_DMT_UINT8, ACPI_ASF3_OFFSET (Command), "Command", 0}, |
| 548 | {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (Parameter), "Parameter", 0}, |
584 | {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (Parameter), "Parameter", 0}, |
| 549 | {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (BootOptions), "Boot Options", 0}, |
585 | {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (BootOptions), "Boot Options", 0}, |
| 550 | {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (OemParameters), "Oem Parameters", 0}, |
586 | {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (OemParameters), "Oem Parameters", 0}, |
| 551 | ACPI_DMT_TERMINATOR |
587 | ACPI_DMT_TERMINATOR |
| 552 | }; |
588 | }; |
| 553 | 589 | ||
| 554 | /* 4: ASF Address */ |
590 | /* 4: ASF Address */ |
| 555 | 591 | ||
| 556 | ACPI_DMTABLE_INFO AcpiDmTableInfoAsf4[] = |
592 | ACPI_DMTABLE_INFO AcpiDmTableInfoAsf4[] = |
| 557 | { |
593 | { |
| 558 | {ACPI_DMT_UINT8, ACPI_ASF4_OFFSET (EpromAddress), "Eprom Address", 0}, |
594 | {ACPI_DMT_UINT8, ACPI_ASF4_OFFSET (EpromAddress), "Eprom Address", 0}, |
| 559 | {ACPI_DMT_UINT8, ACPI_ASF4_OFFSET (Devices), "Device Count", DT_COUNT}, |
595 | {ACPI_DMT_UINT8, ACPI_ASF4_OFFSET (Devices), "Device Count", DT_COUNT}, |
| 560 | ACPI_DMT_TERMINATOR |
596 | ACPI_DMT_TERMINATOR |
| 561 | }; |
597 | }; |
| 562 | 598 | ||
| 563 | 599 | ||
| 564 | /******************************************************************************* |
600 | /******************************************************************************* |
| 565 | * |
601 | * |
| 566 | * BERT - Boot Error Record table |
602 | * BERT - Boot Error Record table |
| 567 | * |
603 | * |
| 568 | ******************************************************************************/ |
604 | ******************************************************************************/ |
| 569 | 605 | ||
| 570 | ACPI_DMTABLE_INFO AcpiDmTableInfoBert[] = |
606 | ACPI_DMTABLE_INFO AcpiDmTableInfoBert[] = |
| 571 | { |
607 | { |
| 572 | {ACPI_DMT_UINT32, ACPI_BERT_OFFSET (RegionLength), "Boot Error Region Length", 0}, |
608 | {ACPI_DMT_UINT32, ACPI_BERT_OFFSET (RegionLength), "Boot Error Region Length", 0}, |
| 573 | {ACPI_DMT_UINT64, ACPI_BERT_OFFSET (Address), "Boot Error Region Address", 0}, |
609 | {ACPI_DMT_UINT64, ACPI_BERT_OFFSET (Address), "Boot Error Region Address", 0}, |
| 574 | ACPI_DMT_TERMINATOR |
610 | ACPI_DMT_TERMINATOR |
| 575 | }; |
611 | }; |
| 576 | 612 | ||
| 577 | 613 | ||
| 578 | /******************************************************************************* |
614 | /******************************************************************************* |
| 579 | * |
615 | * |
| 580 | * BOOT - Simple Boot Flag Table |
616 | * BOOT - Simple Boot Flag Table |
| 581 | * |
617 | * |
| 582 | ******************************************************************************/ |
618 | ******************************************************************************/ |
| 583 | 619 | ||
| 584 | ACPI_DMTABLE_INFO AcpiDmTableInfoBoot[] = |
620 | ACPI_DMTABLE_INFO AcpiDmTableInfoBoot[] = |
| 585 | { |
621 | { |
| 586 | {ACPI_DMT_UINT8, ACPI_BOOT_OFFSET (CmosIndex), "Boot Register Index", 0}, |
622 | {ACPI_DMT_UINT8, ACPI_BOOT_OFFSET (CmosIndex), "Boot Register Index", 0}, |
| 587 | {ACPI_DMT_UINT24, ACPI_BOOT_OFFSET (Reserved[0]), "Reserved", 0}, |
623 | {ACPI_DMT_UINT24, ACPI_BOOT_OFFSET (Reserved[0]), "Reserved", 0}, |
| 588 | ACPI_DMT_TERMINATOR |
624 | ACPI_DMT_TERMINATOR |
| 589 | }; |
625 | }; |
| 590 | 626 | ||
| 591 | 627 | ||
| 592 | /******************************************************************************* |
628 | /******************************************************************************* |
| 593 | * |
629 | * |
| 594 | * CPEP - Corrected Platform Error Polling table |
630 | * CPEP - Corrected Platform Error Polling table |
| 595 | * |
631 | * |
| 596 | ******************************************************************************/ |
632 | ******************************************************************************/ |
| 597 | 633 | ||
| 598 | ACPI_DMTABLE_INFO AcpiDmTableInfoCpep[] = |
634 | ACPI_DMTABLE_INFO AcpiDmTableInfoCpep[] = |
| 599 | { |
635 | { |
| 600 | {ACPI_DMT_UINT64, ACPI_CPEP_OFFSET (Reserved), "Reserved", 0}, |
636 | {ACPI_DMT_UINT64, ACPI_CPEP_OFFSET (Reserved), "Reserved", 0}, |
| 601 | ACPI_DMT_TERMINATOR |
637 | ACPI_DMT_TERMINATOR |
| 602 | }; |
638 | }; |
| 603 | 639 | ||
| 604 | ACPI_DMTABLE_INFO AcpiDmTableInfoCpep0[] = |
640 | ACPI_DMTABLE_INFO AcpiDmTableInfoCpep0[] = |
| 605 | { |
641 | { |
| 606 | {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Header.Type), "Subtable Type", 0}, |
642 | {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Header.Type), "Subtable Type", 0}, |
| 607 | {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Header.Length), "Length", DT_LENGTH}, |
643 | {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Header.Length), "Length", DT_LENGTH}, |
| 608 | {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Id), "Processor ID", 0}, |
644 | {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Id), "Processor ID", 0}, |
| 609 | {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Eid), "Processor EID", 0}, |
645 | {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Eid), "Processor EID", 0}, |
| 610 | {ACPI_DMT_UINT32, ACPI_CPEP0_OFFSET (Interval), "Polling Interval", 0}, |
646 | {ACPI_DMT_UINT32, ACPI_CPEP0_OFFSET (Interval), "Polling Interval", 0}, |
| 611 | ACPI_DMT_TERMINATOR |
647 | ACPI_DMT_TERMINATOR |
| 612 | }; |
648 | }; |
| 613 | 649 | ||
| 614 | 650 | ||
| 615 | /******************************************************************************* |
651 | /******************************************************************************* |
| 616 | * |
652 | * |
| 617 | * DBGP - Debug Port |
653 | * DBGP - Debug Port |
| 618 | * |
654 | * |
| 619 | ******************************************************************************/ |
655 | ******************************************************************************/ |
| 620 | 656 | ||
| 621 | ACPI_DMTABLE_INFO AcpiDmTableInfoDbgp[] = |
657 | ACPI_DMTABLE_INFO AcpiDmTableInfoDbgp[] = |
| 622 | { |
658 | { |
| 623 | {ACPI_DMT_UINT8, ACPI_DBGP_OFFSET (Type), "Interface Type", 0}, |
659 | {ACPI_DMT_UINT8, ACPI_DBGP_OFFSET (Type), "Interface Type", 0}, |
| 624 | {ACPI_DMT_UINT24, ACPI_DBGP_OFFSET (Reserved[0]), "Reserved", 0}, |
660 | {ACPI_DMT_UINT24, ACPI_DBGP_OFFSET (Reserved[0]), "Reserved", 0}, |
| 625 | {ACPI_DMT_GAS, ACPI_DBGP_OFFSET (DebugPort), "Debug Port Register", 0}, |
661 | {ACPI_DMT_GAS, ACPI_DBGP_OFFSET (DebugPort), "Debug Port Register", 0}, |
| 626 | ACPI_DMT_TERMINATOR |
662 | ACPI_DMT_TERMINATOR |
| 627 | }; |
663 | }; |
| 628 | 664 | ||
| 629 | 665 | ||
| 630 | /******************************************************************************* |
666 | /******************************************************************************* |
| 631 | * |
667 | * |
| 632 | * DMAR - DMA Remapping table |
668 | * DMAR - DMA Remapping table |
| 633 | * |
669 | * |
| 634 | ******************************************************************************/ |
670 | ******************************************************************************/ |
| 635 | 671 | ||
| 636 | ACPI_DMTABLE_INFO AcpiDmTableInfoDmar[] = |
672 | ACPI_DMTABLE_INFO AcpiDmTableInfoDmar[] = |
| 637 | { |
673 | { |
| 638 | {ACPI_DMT_UINT8, ACPI_DMAR_OFFSET (Width), "Host Address Width", 0}, |
674 | {ACPI_DMT_UINT8, ACPI_DMAR_OFFSET (Width), "Host Address Width", 0}, |
| 639 | {ACPI_DMT_UINT8, ACPI_DMAR_OFFSET (Flags), "Flags", 0}, |
675 | {ACPI_DMT_UINT8, ACPI_DMAR_OFFSET (Flags), "Flags", 0}, |
| 640 | ACPI_DMT_TERMINATOR |
676 | ACPI_DMT_TERMINATOR |
| 641 | }; |
677 | }; |
| 642 | 678 | ||
| 643 | /* Common Subtable header (one per Subtable) */ |
679 | /* Common Subtable header (one per Subtable) */ |
| 644 | 680 | ||
| 645 | ACPI_DMTABLE_INFO AcpiDmTableInfoDmarHdr[] = |
681 | ACPI_DMTABLE_INFO AcpiDmTableInfoDmarHdr[] = |
| 646 | { |
682 | { |
| 647 | {ACPI_DMT_DMAR, ACPI_DMAR0_OFFSET (Header.Type), "Subtable Type", 0}, |
683 | {ACPI_DMT_DMAR, ACPI_DMAR0_OFFSET (Header.Type), "Subtable Type", 0}, |
| 648 | {ACPI_DMT_UINT16, ACPI_DMAR0_OFFSET (Header.Length), "Length", DT_LENGTH}, |
684 | {ACPI_DMT_UINT16, ACPI_DMAR0_OFFSET (Header.Length), "Length", DT_LENGTH}, |
| 649 | ACPI_DMT_TERMINATOR |
685 | ACPI_DMT_TERMINATOR |
| 650 | }; |
686 | }; |
| 651 | 687 | ||
| 652 | /* Common device scope entry */ |
688 | /* Common device scope entry */ |
| 653 | 689 | ||
| 654 | ACPI_DMTABLE_INFO AcpiDmTableInfoDmarScope[] = |
690 | ACPI_DMTABLE_INFO AcpiDmTableInfoDmarScope[] = |
| 655 | { |
691 | { |
| 656 | {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (EntryType), "Device Scope Entry Type", 0}, |
692 | {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (EntryType), "Device Scope Entry Type", 0}, |
| 657 | {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (Length), "Entry Length", DT_LENGTH}, |
693 | {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (Length), "Entry Length", DT_LENGTH}, |
| 658 | {ACPI_DMT_UINT16, ACPI_DMARS_OFFSET (Reserved), "Reserved", 0}, |
694 | {ACPI_DMT_UINT16, ACPI_DMARS_OFFSET (Reserved), "Reserved", 0}, |
| 659 | {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (EnumerationId), "Enumeration ID", 0}, |
695 | {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (EnumerationId), "Enumeration ID", 0}, |
| 660 | {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (Bus), "PCI Bus Number", 0}, |
696 | {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (Bus), "PCI Bus Number", 0}, |
| 661 | ACPI_DMT_TERMINATOR |
697 | ACPI_DMT_TERMINATOR |
| 662 | }; |
698 | }; |
| 663 | 699 | ||
| 664 | /* DMAR Subtables */ |
700 | /* DMAR Subtables */ |
| 665 | 701 | ||
| 666 | /* 0: Hardware Unit Definition */ |
702 | /* 0: Hardware Unit Definition */ |
| 667 | 703 | ||
| 668 | ACPI_DMTABLE_INFO AcpiDmTableInfoDmar0[] = |
704 | ACPI_DMTABLE_INFO AcpiDmTableInfoDmar0[] = |
| 669 | { |
705 | { |
| 670 | {ACPI_DMT_UINT8, ACPI_DMAR0_OFFSET (Flags), "Flags", 0}, |
706 | {ACPI_DMT_UINT8, ACPI_DMAR0_OFFSET (Flags), "Flags", 0}, |
| 671 | {ACPI_DMT_UINT8, ACPI_DMAR0_OFFSET (Reserved), "Reserved", 0}, |
707 | {ACPI_DMT_UINT8, ACPI_DMAR0_OFFSET (Reserved), "Reserved", 0}, |
| 672 | {ACPI_DMT_UINT16, ACPI_DMAR0_OFFSET (Segment), "PCI Segment Number", 0}, |
708 | {ACPI_DMT_UINT16, ACPI_DMAR0_OFFSET (Segment), "PCI Segment Number", 0}, |
| 673 | {ACPI_DMT_UINT64, ACPI_DMAR0_OFFSET (Address), "Register Base Address", 0}, |
709 | {ACPI_DMT_UINT64, ACPI_DMAR0_OFFSET (Address), "Register Base Address", 0}, |
| 674 | ACPI_DMT_TERMINATOR |
710 | ACPI_DMT_TERMINATOR |
| 675 | }; |
711 | }; |
| 676 | 712 | ||
| 677 | /* 1: Reserved Memory Definition */ |
713 | /* 1: Reserved Memory Definition */ |
| 678 | 714 | ||
| 679 | ACPI_DMTABLE_INFO AcpiDmTableInfoDmar1[] = |
715 | ACPI_DMTABLE_INFO AcpiDmTableInfoDmar1[] = |
| 680 | { |
716 | { |
| 681 | {ACPI_DMT_UINT16, ACPI_DMAR1_OFFSET (Reserved), "Reserved", 0}, |
717 | {ACPI_DMT_UINT16, ACPI_DMAR1_OFFSET (Reserved), "Reserved", 0}, |
| 682 | {ACPI_DMT_UINT16, ACPI_DMAR1_OFFSET (Segment), "PCI Segment Number", 0}, |
718 | {ACPI_DMT_UINT16, ACPI_DMAR1_OFFSET (Segment), "PCI Segment Number", 0}, |
| 683 | {ACPI_DMT_UINT64, ACPI_DMAR1_OFFSET (BaseAddress), "Base Address", 0}, |
719 | {ACPI_DMT_UINT64, ACPI_DMAR1_OFFSET (BaseAddress), "Base Address", 0}, |
| 684 | {ACPI_DMT_UINT64, ACPI_DMAR1_OFFSET (EndAddress), "End Address (limit)", 0}, |
720 | {ACPI_DMT_UINT64, ACPI_DMAR1_OFFSET (EndAddress), "End Address (limit)", 0}, |
| 685 | ACPI_DMT_TERMINATOR |
721 | ACPI_DMT_TERMINATOR |
| 686 | }; |
722 | }; |
| 687 | 723 | ||
| 688 | /* 2: Root Port ATS Capability Definition */ |
724 | /* 2: Root Port ATS Capability Definition */ |
| 689 | 725 | ||
| 690 | ACPI_DMTABLE_INFO AcpiDmTableInfoDmar2[] = |
726 | ACPI_DMTABLE_INFO AcpiDmTableInfoDmar2[] = |
| 691 | { |
727 | { |
| 692 | {ACPI_DMT_UINT8, ACPI_DMAR2_OFFSET (Flags), "Flags", 0}, |
728 | {ACPI_DMT_UINT8, ACPI_DMAR2_OFFSET (Flags), "Flags", 0}, |
| 693 | {ACPI_DMT_UINT8, ACPI_DMAR2_OFFSET (Reserved), "Reserved", 0}, |
729 | {ACPI_DMT_UINT8, ACPI_DMAR2_OFFSET (Reserved), "Reserved", 0}, |
| 694 | {ACPI_DMT_UINT16, ACPI_DMAR2_OFFSET (Segment), "PCI Segment Number", 0}, |
730 | {ACPI_DMT_UINT16, ACPI_DMAR2_OFFSET (Segment), "PCI Segment Number", 0}, |
| 695 | ACPI_DMT_TERMINATOR |
731 | ACPI_DMT_TERMINATOR |
| 696 | }; |
732 | }; |
| 697 | 733 | ||
| 698 | /* 3: Remapping Hardware Static Affinity Structure */ |
734 | /* 3: Remapping Hardware Static Affinity Structure */ |
| 699 | 735 | ||
| 700 | ACPI_DMTABLE_INFO AcpiDmTableInfoDmar3[] = |
736 | ACPI_DMTABLE_INFO AcpiDmTableInfoDmar3[] = |
| 701 | { |
737 | { |
| 702 | {ACPI_DMT_UINT32, ACPI_DMAR3_OFFSET (Reserved), "Reserved", 0}, |
738 | {ACPI_DMT_UINT32, ACPI_DMAR3_OFFSET (Reserved), "Reserved", 0}, |
| 703 | {ACPI_DMT_UINT64, ACPI_DMAR3_OFFSET (BaseAddress), "Base Address", 0}, |
739 | {ACPI_DMT_UINT64, ACPI_DMAR3_OFFSET (BaseAddress), "Base Address", 0}, |
| 704 | {ACPI_DMT_UINT32, ACPI_DMAR3_OFFSET (ProximityDomain), "Proximity Domain", 0}, |
740 | {ACPI_DMT_UINT32, ACPI_DMAR3_OFFSET (ProximityDomain), "Proximity Domain", 0}, |
| 705 | ACPI_DMT_TERMINATOR |
741 | ACPI_DMT_TERMINATOR |
| 706 | }; |
742 | }; |
| 707 | 743 | ||
| 708 | 744 | ||
| 709 | /******************************************************************************* |
745 | /******************************************************************************* |
| 710 | * |
746 | * |
| 711 | * ECDT - Embedded Controller Boot Resources Table |
747 | * ECDT - Embedded Controller Boot Resources Table |
| 712 | * |
748 | * |
| 713 | ******************************************************************************/ |
749 | ******************************************************************************/ |
| 714 | 750 | ||
| 715 | ACPI_DMTABLE_INFO AcpiDmTableInfoEcdt[] = |
751 | ACPI_DMTABLE_INFO AcpiDmTableInfoEcdt[] = |
| 716 | { |
752 | { |
| 717 | {ACPI_DMT_GAS, ACPI_ECDT_OFFSET (Control), "Command/Status Register", 0}, |
753 | {ACPI_DMT_GAS, ACPI_ECDT_OFFSET (Control), "Command/Status Register", 0}, |
| 718 | {ACPI_DMT_GAS, ACPI_ECDT_OFFSET (Data), "Data Register", 0}, |
754 | {ACPI_DMT_GAS, ACPI_ECDT_OFFSET (Data), "Data Register", 0}, |
| 719 | {ACPI_DMT_UINT32, ACPI_ECDT_OFFSET (Uid), "UID", 0}, |
755 | {ACPI_DMT_UINT32, ACPI_ECDT_OFFSET (Uid), "UID", 0}, |
| 720 | {ACPI_DMT_UINT8, ACPI_ECDT_OFFSET (Gpe), "GPE Number", 0}, |
756 | {ACPI_DMT_UINT8, ACPI_ECDT_OFFSET (Gpe), "GPE Number", 0}, |
| 721 | {ACPI_DMT_STRING, ACPI_ECDT_OFFSET (Id[0]), "Namepath", 0}, |
757 | {ACPI_DMT_STRING, ACPI_ECDT_OFFSET (Id[0]), "Namepath", 0}, |
| 722 | ACPI_DMT_TERMINATOR |
758 | ACPI_DMT_TERMINATOR |
| 723 | }; |
759 | }; |
| 724 | 760 | ||
| 725 | 761 | ||
| 726 | /******************************************************************************* |
762 | /******************************************************************************* |
| 727 | * |
763 | * |
| 728 | * EINJ - Error Injection table |
764 | * EINJ - Error Injection table |
| 729 | * |
765 | * |
| 730 | ******************************************************************************/ |
766 | ******************************************************************************/ |
| 731 | 767 | ||
| 732 | ACPI_DMTABLE_INFO AcpiDmTableInfoEinj[] = |
768 | ACPI_DMTABLE_INFO AcpiDmTableInfoEinj[] = |
| 733 | { |
769 | { |
| 734 | {ACPI_DMT_UINT32, ACPI_EINJ_OFFSET (HeaderLength), "Injection Header Length", DT_LENGTH}, |
770 | {ACPI_DMT_UINT32, ACPI_EINJ_OFFSET (HeaderLength), "Injection Header Length", 0}, |
| 735 | {ACPI_DMT_UINT8, ACPI_EINJ_OFFSET (Flags), "Flags", 0}, |
771 | {ACPI_DMT_UINT8, ACPI_EINJ_OFFSET (Flags), "Flags", 0}, |
| 736 | {ACPI_DMT_UINT24, ACPI_EINJ_OFFSET (Reserved[0]), "Reserved", 0}, |
772 | {ACPI_DMT_UINT24, ACPI_EINJ_OFFSET (Reserved[0]), "Reserved", 0}, |
| 737 | {ACPI_DMT_UINT32, ACPI_EINJ_OFFSET (Entries), "Injection Entry Count", 0}, |
773 | {ACPI_DMT_UINT32, ACPI_EINJ_OFFSET (Entries), "Injection Entry Count", 0}, |
| 738 | ACPI_DMT_TERMINATOR |
774 | ACPI_DMT_TERMINATOR |
| 739 | }; |
775 | }; |
| 740 | 776 | ||
| 741 | ACPI_DMTABLE_INFO AcpiDmTableInfoEinj0[] = |
777 | ACPI_DMTABLE_INFO AcpiDmTableInfoEinj0[] = |
| 742 | { |
778 | { |
| 743 | {ACPI_DMT_UINT8, ACPI_EINJ0_OFFSET (Action), "Action", 0}, |
779 | {ACPI_DMT_EINJACT, ACPI_EINJ0_OFFSET (Action), "Action", 0}, |
| 744 | {ACPI_DMT_UINT8, ACPI_EINJ0_OFFSET (Instruction), "Instruction", 0}, |
780 | {ACPI_DMT_EINJINST, ACPI_EINJ0_OFFSET (Instruction), "Instruction", 0}, |
| 745 | {ACPI_DMT_UINT8, ACPI_EINJ0_OFFSET (Flags), "Flags", 0}, |
781 | {ACPI_DMT_UINT8, ACPI_EINJ0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, |
| - | 782 | {ACPI_DMT_FLAG0, ACPI_EINJ0_FLAG_OFFSET (Flags,0), "Preserve Register Bits", 0}, |
|
| - | 783 | ||
| 746 | {ACPI_DMT_UINT8, ACPI_EINJ0_OFFSET (Reserved), "Reserved", 0}, |
784 | {ACPI_DMT_UINT8, ACPI_EINJ0_OFFSET (Reserved), "Reserved", 0}, |
| 747 | {ACPI_DMT_GAS, ACPI_EINJ0_OFFSET (RegisterRegion), "Register Region", 0}, |
785 | {ACPI_DMT_GAS, ACPI_EINJ0_OFFSET (RegisterRegion), "Register Region", 0}, |
| 748 | {ACPI_DMT_UINT64, ACPI_EINJ0_OFFSET (Value), "Value", 0}, |
786 | {ACPI_DMT_UINT64, ACPI_EINJ0_OFFSET (Value), "Value", 0}, |
| 749 | {ACPI_DMT_UINT64, ACPI_EINJ0_OFFSET (Mask), "Mask", 0}, |
787 | {ACPI_DMT_UINT64, ACPI_EINJ0_OFFSET (Mask), "Mask", 0}, |
| 750 | ACPI_DMT_TERMINATOR |
788 | ACPI_DMT_TERMINATOR |
| 751 | }; |
789 | }; |
| 752 | 790 | ||
| 753 | 791 | ||
| 754 | /******************************************************************************* |
792 | /******************************************************************************* |
| 755 | * |
793 | * |
| 756 | * ERST - Error Record Serialization table |
794 | * ERST - Error Record Serialization table |
| 757 | * |
795 | * |
| 758 | ******************************************************************************/ |
796 | ******************************************************************************/ |
| 759 | 797 | ||
| 760 | ACPI_DMTABLE_INFO AcpiDmTableInfoErst[] = |
798 | ACPI_DMTABLE_INFO AcpiDmTableInfoErst[] = |
| 761 | { |
799 | { |
| 762 | {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (HeaderLength), "Serialization Header Length", DT_LENGTH}, |
800 | {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (HeaderLength), "Serialization Header Length", 0}, |
| 763 | {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (Reserved), "Reserved", 0}, |
801 | {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (Reserved), "Reserved", 0}, |
| 764 | {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (Entries), "Instruction Entry Count", 0}, |
802 | {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (Entries), "Instruction Entry Count", 0}, |
| 765 | ACPI_DMT_TERMINATOR |
803 | ACPI_DMT_TERMINATOR |
| 766 | }; |
804 | }; |
| - | 805 | ||
| - | 806 | ACPI_DMTABLE_INFO AcpiDmTableInfoErst0[] = |
|
| - | 807 | { |
|
| - | 808 | {ACPI_DMT_ERSTACT, ACPI_ERST0_OFFSET (Action), "Action", 0}, |
|
| - | 809 | {ACPI_DMT_ERSTINST, ACPI_ERST0_OFFSET (Instruction), "Instruction", 0}, |
|
| - | 810 | {ACPI_DMT_UINT8, ACPI_ERST0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, |
|
| - | 811 | {ACPI_DMT_FLAG0, ACPI_ERST0_FLAG_OFFSET (Flags,0), "Preserve Register Bits", 0}, |
|
| - | 812 | ||
| - | 813 | {ACPI_DMT_UINT8, ACPI_ERST0_OFFSET (Reserved), "Reserved", 0}, |
|
| - | 814 | {ACPI_DMT_GAS, ACPI_ERST0_OFFSET (RegisterRegion), "Register Region", 0}, |
|
| - | 815 | {ACPI_DMT_UINT64, ACPI_ERST0_OFFSET (Value), "Value", 0}, |
|
| - | 816 | {ACPI_DMT_UINT64, ACPI_ERST0_OFFSET (Mask), "Mask", 0}, |
|
| - | 817 | ACPI_DMT_TERMINATOR |
|
| - | 818 | }; |
|
| 767 | 819 | ||
| 768 | 820 | ||
| 769 | /******************************************************************************* |
821 | /******************************************************************************* |
| 770 | * |
822 | * |
| 771 | * HEST - Hardware Error Source table |
823 | * HEST - Hardware Error Source table |
| 772 | * |
824 | * |
| 773 | ******************************************************************************/ |
825 | ******************************************************************************/ |
| 774 | 826 | ||
| 775 | ACPI_DMTABLE_INFO AcpiDmTableInfoHest[] = |
827 | ACPI_DMTABLE_INFO AcpiDmTableInfoHest[] = |
| 776 | { |
828 | { |
| 777 | {ACPI_DMT_UINT32, ACPI_HEST_OFFSET (ErrorSourceCount), "Error Source Count", 0}, |
829 | {ACPI_DMT_UINT32, ACPI_HEST_OFFSET (ErrorSourceCount), "Error Source Count", 0}, |
| 778 | ACPI_DMT_TERMINATOR |
830 | ACPI_DMT_TERMINATOR |
| 779 | }; |
831 | }; |
| 780 | 832 | ||
| 781 | /* Common HEST structures for subtables */ |
833 | /* Common HEST structures for subtables */ |
| 782 | 834 | ||
| 783 | #define ACPI_DM_HEST_HEADER \ |
835 | #define ACPI_DM_HEST_HEADER \ |
| 784 | {ACPI_DMT_HEST, ACPI_HEST0_OFFSET (Header.Type), "Subtable Type", 0}, \ |
836 | {ACPI_DMT_HEST, ACPI_HEST0_OFFSET (Header.Type), "Subtable Type", 0}, \ |
| 785 | {ACPI_DMT_UINT16, ACPI_HEST0_OFFSET (Header.SourceId), "Source Id", 0} |
837 | {ACPI_DMT_UINT16, ACPI_HEST0_OFFSET (Header.SourceId), "Source Id", 0} |
| 786 | 838 | ||
| 787 | #define ACPI_DM_HEST_AER \ |
839 | #define ACPI_DM_HEST_AER \ |
| 788 | {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Reserved1), "Reserved", 0}, \ |
840 | {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Reserved1), "Reserved", 0}, \ |
| 789 | {ACPI_DMT_UINT8, ACPI_HEST6_OFFSET (Aer.Flags), "Flags", 0}, \ |
841 | {ACPI_DMT_UINT8, ACPI_HEST6_OFFSET (Aer.Flags), "Flags (decoded below)", DT_FLAG}, \ |
| - | 842 | {ACPI_DMT_FLAG0, ACPI_HEST6_FLAG_OFFSET (Aer.Flags,0), "Firmware First", 0}, \ |
|
| 790 | {ACPI_DMT_UINT8, ACPI_HEST6_OFFSET (Aer.Enabled), "Enabled", 0}, \ |
843 | {ACPI_DMT_UINT8, ACPI_HEST6_OFFSET (Aer.Enabled), "Enabled", 0}, \ |
| 791 | {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.RecordsToPreallocate), "Records To Preallocate", 0}, \ |
844 | {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.RecordsToPreallocate), "Records To Preallocate", 0}, \ |
| 792 | {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.MaxSectionsPerRecord), "Max Sections Per Record", 0}, \ |
845 | {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.MaxSectionsPerRecord), "Max Sections Per Record", 0}, \ |
| 793 | {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.Bus), "Bus", 0}, \ |
846 | {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.Bus), "Bus", 0}, \ |
| 794 | {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Device), "Device", 0}, \ |
847 | {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Device), "Device", 0}, \ |
| 795 | {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Function), "Function", 0}, \ |
848 | {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Function), "Function", 0}, \ |
| 796 | {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.DeviceControl), "DeviceControl", 0}, \ |
849 | {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.DeviceControl), "DeviceControl", 0}, \ |
| 797 | {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Reserved2), "Reserved", 0}, \ |
850 | {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Reserved2), "Reserved", 0}, \ |
| 798 | {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.UncorrectableMask), "Uncorrectable Mask", 0}, \ |
851 | {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.UncorrectableMask), "Uncorrectable Mask", 0}, \ |
| 799 | {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.UncorrectableSeverity), "Uncorrectable Severity", 0}, \ |
852 | {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.UncorrectableSeverity), "Uncorrectable Severity", 0}, \ |
| 800 | {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.CorrectableMask), "Correctable Mask", 0}, \ |
853 | {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.CorrectableMask), "Correctable Mask", 0}, \ |
| 801 | {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.AdvancedCapabilities), "Advanced Capabilities", 0} |
854 | {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.AdvancedCapabilities), "Advanced Capabilities", 0} |
| 802 | 855 | ||
| 803 | 856 | ||
| 804 | /* HEST Subtables */ |
857 | /* HEST Subtables */ |
| 805 | 858 | ||
| 806 | /* 0: IA32 Machine Check Exception */ |
859 | /* 0: IA32 Machine Check Exception */ |
| 807 | 860 | ||
| 808 | ACPI_DMTABLE_INFO AcpiDmTableInfoHest0[] = |
861 | ACPI_DMTABLE_INFO AcpiDmTableInfoHest0[] = |
| 809 | { |
862 | { |
| 810 | ACPI_DM_HEST_HEADER, |
863 | ACPI_DM_HEST_HEADER, |
| 811 | {ACPI_DMT_UINT16, ACPI_HEST0_OFFSET (Reserved1), "Reserved", 0}, |
864 | {ACPI_DMT_UINT16, ACPI_HEST0_OFFSET (Reserved1), "Reserved1", 0}, |
| 812 | {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (Flags), "Flags", 0}, |
865 | {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, |
| - | 866 | {ACPI_DMT_FLAG0, ACPI_HEST0_FLAG_OFFSET (Flags,0), "Firmware First", 0}, |
|
| - | 867 | ||
| 813 | {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (Enabled), "Enabled", 0}, |
868 | {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (Enabled), "Enabled", 0}, |
| 814 | {ACPI_DMT_UINT32, ACPI_HEST0_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0}, |
869 | {ACPI_DMT_UINT32, ACPI_HEST0_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0}, |
| 815 | {ACPI_DMT_UINT32, ACPI_HEST0_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0}, |
870 | {ACPI_DMT_UINT32, ACPI_HEST0_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0}, |
| 816 | {ACPI_DMT_UINT64, ACPI_HEST0_OFFSET (GlobalCapabilityData), "Global Capability Data", 0}, |
871 | {ACPI_DMT_UINT64, ACPI_HEST0_OFFSET (GlobalCapabilityData), "Global Capability Data", 0}, |
| 817 | {ACPI_DMT_UINT64, ACPI_HEST0_OFFSET (GlobalControlData), "Global Control Data", 0}, |
872 | {ACPI_DMT_UINT64, ACPI_HEST0_OFFSET (GlobalControlData), "Global Control Data", 0}, |
| 818 | {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (NumHardwareBanks), "Num Hardware Banks", 0}, |
873 | {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (NumHardwareBanks), "Num Hardware Banks", 0}, |
| 819 | {ACPI_DMT_UINT56, ACPI_HEST0_OFFSET (Reserved3[0]), "Reserved", 0}, |
874 | {ACPI_DMT_UINT56, ACPI_HEST0_OFFSET (Reserved3[0]), "Reserved2", 0}, |
| 820 | ACPI_DMT_TERMINATOR |
875 | ACPI_DMT_TERMINATOR |
| 821 | }; |
876 | }; |
| 822 | 877 | ||
| 823 | /* 1: IA32 Corrected Machine Check */ |
878 | /* 1: IA32 Corrected Machine Check */ |
| 824 | 879 | ||
| 825 | ACPI_DMTABLE_INFO AcpiDmTableInfoHest1[] = |
880 | ACPI_DMTABLE_INFO AcpiDmTableInfoHest1[] = |
| 826 | { |
881 | { |
| 827 | ACPI_DM_HEST_HEADER, |
882 | ACPI_DM_HEST_HEADER, |
| 828 | {ACPI_DMT_UINT16, ACPI_HEST1_OFFSET (Reserved1), "Reserved", 0}, |
883 | {ACPI_DMT_UINT16, ACPI_HEST1_OFFSET (Reserved1), "Reserved1", 0}, |
| 829 | {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (Flags), "Flags", 0}, |
884 | {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, |
| - | 885 | {ACPI_DMT_FLAG0, ACPI_HEST1_FLAG_OFFSET (Flags,0), "Firmware First", 0}, |
|
| - | 886 | ||
| 830 | {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (Enabled), "Enabled", 0}, |
887 | {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (Enabled), "Enabled", 0}, |
| 831 | {ACPI_DMT_UINT32, ACPI_HEST1_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0}, |
888 | {ACPI_DMT_UINT32, ACPI_HEST1_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0}, |
| 832 | {ACPI_DMT_UINT32, ACPI_HEST1_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0}, |
889 | {ACPI_DMT_UINT32, ACPI_HEST1_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0}, |
| 833 | {ACPI_DMT_HESTNTFY, ACPI_HEST1_OFFSET (Notify), "Notify", 0}, |
890 | {ACPI_DMT_HESTNTFY, ACPI_HEST1_OFFSET (Notify), "Notify", 0}, |
| 834 | {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (NumHardwareBanks), "Num Hardware Banks", 0}, |
891 | {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (NumHardwareBanks), "Num Hardware Banks", 0}, |
| 835 | {ACPI_DMT_UINT24, ACPI_HEST1_OFFSET (Reserved2[0]), "Reserved", 0}, |
892 | {ACPI_DMT_UINT24, ACPI_HEST1_OFFSET (Reserved2[0]), "Reserved2", 0}, |
| 836 | ACPI_DMT_TERMINATOR |
893 | ACPI_DMT_TERMINATOR |
| 837 | }; |
894 | }; |
| 838 | 895 | ||
| 839 | /* 2: IA32 Non-Maskable Interrupt */ |
896 | /* 2: IA32 Non-Maskable Interrupt */ |
| 840 | 897 | ||
| 841 | ACPI_DMTABLE_INFO AcpiDmTableInfoHest2[] = |
898 | ACPI_DMTABLE_INFO AcpiDmTableInfoHest2[] = |
| 842 | { |
899 | { |
| 843 | ACPI_DM_HEST_HEADER, |
900 | ACPI_DM_HEST_HEADER, |
| 844 | {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (Reserved), "Reserved", 0}, |
901 | {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (Reserved), "Reserved", 0}, |
| 845 | {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0}, |
902 | {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0}, |
| 846 | {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0}, |
903 | {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0}, |
| 847 | {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (MaxRawDataLength), "Max Raw Data Length", 0}, |
904 | {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (MaxRawDataLength), "Max Raw Data Length", 0}, |
| 848 | ACPI_DMT_TERMINATOR |
905 | ACPI_DMT_TERMINATOR |
| 849 | }; |
906 | }; |
| 850 | - | ||
| 851 | 907 | ||
| 852 | /* 6: PCI Express Root Port AER */ |
908 | /* 6: PCI Express Root Port AER */ |
| 853 | 909 | ||
| 854 | ACPI_DMTABLE_INFO AcpiDmTableInfoHest6[] = |
910 | ACPI_DMTABLE_INFO AcpiDmTableInfoHest6[] = |
| 855 | { |
911 | { |
| 856 | ACPI_DM_HEST_HEADER, |
912 | ACPI_DM_HEST_HEADER, |
| 857 | ACPI_DM_HEST_AER, |
913 | ACPI_DM_HEST_AER, |
| 858 | {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (RootErrorCommand), "Root Error Command", 0}, |
914 | {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (RootErrorCommand), "Root Error Command", 0}, |
| 859 | ACPI_DMT_TERMINATOR |
915 | ACPI_DMT_TERMINATOR |
| 860 | }; |
916 | }; |
| 861 | 917 | ||
| 862 | /* 7: PCI Express AER (AER Endpoint) */ |
918 | /* 7: PCI Express AER (AER Endpoint) */ |
| 863 | 919 | ||
| 864 | ACPI_DMTABLE_INFO AcpiDmTableInfoHest7[] = |
920 | ACPI_DMTABLE_INFO AcpiDmTableInfoHest7[] = |
| 865 | { |
921 | { |
| 866 | ACPI_DM_HEST_HEADER, |
922 | ACPI_DM_HEST_HEADER, |
| 867 | ACPI_DM_HEST_AER, |
923 | ACPI_DM_HEST_AER, |
| 868 | ACPI_DMT_TERMINATOR |
924 | ACPI_DMT_TERMINATOR |
| 869 | }; |
925 | }; |
| 870 | 926 | ||
| 871 | /* 8: PCI Express/PCI-X Bridge AER */ |
927 | /* 8: PCI Express/PCI-X Bridge AER */ |
| 872 | 928 | ||
| 873 | ACPI_DMTABLE_INFO AcpiDmTableInfoHest8[] = |
929 | ACPI_DMTABLE_INFO AcpiDmTableInfoHest8[] = |
| 874 | { |
930 | { |
| 875 | ACPI_DM_HEST_HEADER, |
931 | ACPI_DM_HEST_HEADER, |
| 876 | ACPI_DM_HEST_AER, |
932 | ACPI_DM_HEST_AER, |
| 877 | {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (UncorrectableMask2), "2nd Uncorrectable Mask", 0}, |
933 | {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (UncorrectableMask2), "2nd Uncorrectable Mask", 0}, |
| 878 | {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (UncorrectableSeverity2), "2nd Uncorrectable Severity", 0}, |
934 | {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (UncorrectableSeverity2), "2nd Uncorrectable Severity", 0}, |
| 879 | {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (AdvancedCapabilities2), "2nd Advanced Capabilities", 0}, |
935 | {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (AdvancedCapabilities2), "2nd Advanced Capabilities", 0}, |
| 880 | ACPI_DMT_TERMINATOR |
936 | ACPI_DMT_TERMINATOR |
| 881 | }; |
937 | }; |
| 882 | 938 | ||
| 883 | /* 9: Generic Hardware Error Source */ |
939 | /* 9: Generic Hardware Error Source */ |
| 884 | 940 | ||
| 885 | ACPI_DMTABLE_INFO AcpiDmTableInfoHest9[] = |
941 | ACPI_DMTABLE_INFO AcpiDmTableInfoHest9[] = |
| 886 | { |
942 | { |
| 887 | ACPI_DM_HEST_HEADER, |
943 | ACPI_DM_HEST_HEADER, |
| 888 | {ACPI_DMT_UINT16, ACPI_HEST9_OFFSET (RelatedSourceId), "Related Source Id", 0}, |
944 | {ACPI_DMT_UINT16, ACPI_HEST9_OFFSET (RelatedSourceId), "Related Source Id", 0}, |
| 889 | {ACPI_DMT_UINT8, ACPI_HEST9_OFFSET (Reserved), "Reserved", 0}, |
945 | {ACPI_DMT_UINT8, ACPI_HEST9_OFFSET (Reserved), "Reserved", 0}, |
| 890 | {ACPI_DMT_UINT8, ACPI_HEST9_OFFSET (Enabled), "Enabled", 0}, |
946 | {ACPI_DMT_UINT8, ACPI_HEST9_OFFSET (Enabled), "Enabled", 0}, |
| 891 | {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0}, |
947 | {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0}, |
| 892 | {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0}, |
948 | {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0}, |
| 893 | {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (MaxRawDataLength), "Max Raw Data Length", 0}, |
949 | {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (MaxRawDataLength), "Max Raw Data Length", 0}, |
| 894 | {ACPI_DMT_GAS, ACPI_HEST9_OFFSET (ErrorStatusAddress), "Error Status Address", 0}, |
950 | {ACPI_DMT_GAS, ACPI_HEST9_OFFSET (ErrorStatusAddress), "Error Status Address", 0}, |
| 895 | {ACPI_DMT_HESTNTFY, ACPI_HEST9_OFFSET (Notify), "Notify", 0}, |
951 | {ACPI_DMT_HESTNTFY, ACPI_HEST9_OFFSET (Notify), "Notify", 0}, |
| 896 | {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (ErrorBlockLength), "Error Status Block Length", 0}, |
952 | {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (ErrorBlockLength), "Error Status Block Length", 0}, |
| 897 | ACPI_DMT_TERMINATOR |
953 | ACPI_DMT_TERMINATOR |
| 898 | }; |
954 | }; |
| 899 | 955 | ||
| 900 | ACPI_DMTABLE_INFO AcpiDmTableInfoHestNotify[] = |
956 | ACPI_DMTABLE_INFO AcpiDmTableInfoHestNotify[] = |
| 901 | { |
957 | { |
| 902 | {ACPI_DMT_HESTNTYP, ACPI_HESTN_OFFSET (Type), "Notify Type", 0}, |
958 | {ACPI_DMT_HESTNTYP, ACPI_HESTN_OFFSET (Type), "Notify Type", 0}, |
| 903 | {ACPI_DMT_UINT8, ACPI_HESTN_OFFSET (Length), "Notify Length", DT_LENGTH}, |
959 | {ACPI_DMT_UINT8, ACPI_HESTN_OFFSET (Length), "Notify Length", DT_LENGTH}, |
| 904 | {ACPI_DMT_UINT16, ACPI_HESTN_OFFSET (ConfigWriteEnable), "Configuration Write Enable", 0}, |
960 | {ACPI_DMT_UINT16, ACPI_HESTN_OFFSET (ConfigWriteEnable), "Configuration Write Enable", 0}, |
| 905 | {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollInterval), "PollInterval", 0}, |
961 | {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollInterval), "PollInterval", 0}, |
| 906 | {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (Vector), "Vector", 0}, |
962 | {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (Vector), "Vector", 0}, |
| 907 | {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollingThresholdValue), "Polling Threshold Value", 0}, |
963 | {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollingThresholdValue), "Polling Threshold Value", 0}, |
| 908 | {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollingThresholdWindow), "Polling Threshold Window", 0}, |
964 | {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollingThresholdWindow), "Polling Threshold Window", 0}, |
| 909 | {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (ErrorThresholdValue), "Error Threshold Value", 0}, |
965 | {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (ErrorThresholdValue), "Error Threshold Value", 0}, |
| 910 | {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (ErrorThresholdWindow), "Error Threshold Window", 0}, |
966 | {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (ErrorThresholdWindow), "Error Threshold Window", 0}, |
| 911 | ACPI_DMT_TERMINATOR |
967 | ACPI_DMT_TERMINATOR |
| 912 | }; |
968 | }; |
| 913 | 969 | ||
| 914 | 970 | ||
| 915 | /* |
971 | /* |
| 916 | * IA32 Error Bank(s) - Follows the ACPI_HEST_IA_MACHINE_CHECK and |
972 | * IA32 Error Bank(s) - Follows the ACPI_HEST_IA_MACHINE_CHECK and |
| 917 | * ACPI_HEST_IA_CORRECTED structures. |
973 | * ACPI_HEST_IA_CORRECTED structures. |
| 918 | */ |
974 | */ |
| 919 | ACPI_DMTABLE_INFO AcpiDmTableInfoHestBank[] = |
975 | ACPI_DMTABLE_INFO AcpiDmTableInfoHestBank[] = |
| 920 | { |
976 | { |
| 921 | {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (BankNumber), "Bank Number", 0}, |
977 | {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (BankNumber), "Bank Number", 0}, |
| 922 | {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (ClearStatusOnInit), "Clear Status On Init", 0}, |
978 | {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (ClearStatusOnInit), "Clear Status On Init", 0}, |
| 923 | {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (StatusFormat), "Status Format", 0}, |
979 | {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (StatusFormat), "Status Format", 0}, |
| 924 | {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (Reserved), "Reserved", 0}, |
980 | {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (Reserved), "Reserved", 0}, |
| 925 | {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (ControlRegister), "Control Register", 0}, |
981 | {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (ControlRegister), "Control Register", 0}, |
| 926 | {ACPI_DMT_UINT64, ACPI_HESTB_OFFSET (ControlData), "Control Data", 0}, |
982 | {ACPI_DMT_UINT64, ACPI_HESTB_OFFSET (ControlData), "Control Data", 0}, |
| 927 | {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (StatusRegister), "Status Register", 0}, |
983 | {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (StatusRegister), "Status Register", 0}, |
| 928 | {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (AddressRegister), "Address Register", 0}, |
984 | {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (AddressRegister), "Address Register", 0}, |
| 929 | {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (MiscRegister), "Misc Register", 0}, |
985 | {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (MiscRegister), "Misc Register", 0}, |
| 930 | ACPI_DMT_TERMINATOR |
986 | ACPI_DMT_TERMINATOR |
| 931 | }; |
987 | }; |
| 932 | 988 | ||
| 933 | 989 | ||
| 934 | /******************************************************************************* |
990 | /******************************************************************************* |
| 935 | * |
991 | * |
| 936 | * HPET - High Precision Event Timer table |
992 | * HPET - High Precision Event Timer table |
| 937 | * |
993 | * |
| 938 | ******************************************************************************/ |
994 | ******************************************************************************/ |
| 939 | 995 | ||
| 940 | ACPI_DMTABLE_INFO AcpiDmTableInfoHpet[] = |
996 | ACPI_DMTABLE_INFO AcpiDmTableInfoHpet[] = |
| 941 | { |
997 | { |
| 942 | {ACPI_DMT_UINT32, ACPI_HPET_OFFSET (Id), "Hardware Block ID", 0}, |
998 | {ACPI_DMT_UINT32, ACPI_HPET_OFFSET (Id), "Hardware Block ID", 0}, |
| 943 | {ACPI_DMT_GAS, ACPI_HPET_OFFSET (Address), "Timer Block Register", 0}, |
999 | {ACPI_DMT_GAS, ACPI_HPET_OFFSET (Address), "Timer Block Register", 0}, |
| 944 | {ACPI_DMT_UINT8, ACPI_HPET_OFFSET (Sequence), "Sequence Number", 0}, |
1000 | {ACPI_DMT_UINT8, ACPI_HPET_OFFSET (Sequence), "Sequence Number", 0}, |
| 945 | {ACPI_DMT_UINT16, ACPI_HPET_OFFSET (MinimumTick), "Minimum Clock Ticks", 0}, |
1001 | {ACPI_DMT_UINT16, ACPI_HPET_OFFSET (MinimumTick), "Minimum Clock Ticks", 0}, |
| 946 | {ACPI_DMT_UINT8, ACPI_HPET_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, |
1002 | {ACPI_DMT_UINT8, ACPI_HPET_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, |
| 947 | {ACPI_DMT_FLAG0, ACPI_HPET_FLAG_OFFSET (Flags,0), "4K Page Protect", 0}, |
1003 | {ACPI_DMT_FLAG0, ACPI_HPET_FLAG_OFFSET (Flags,0), "4K Page Protect", 0}, |
| 948 | {ACPI_DMT_FLAG1, ACPI_HPET_FLAG_OFFSET (Flags,0), "64K Page Protect", 0}, |
1004 | {ACPI_DMT_FLAG1, ACPI_HPET_FLAG_OFFSET (Flags,0), "64K Page Protect", 0}, |
| 949 | ACPI_DMT_TERMINATOR |
1005 | ACPI_DMT_TERMINATOR |
| 950 | }; |
1006 | }; |
| 951 | 1007 | ||
| 952 | 1008 | ||
| 953 | /******************************************************************************* |
1009 | /******************************************************************************* |
| 954 | * |
1010 | * |
| 955 | * IVRS - I/O Virtualization Reporting Structure |
1011 | * IVRS - I/O Virtualization Reporting Structure |
| 956 | * |
1012 | * |
| 957 | ******************************************************************************/ |
1013 | ******************************************************************************/ |
| 958 | 1014 | ||
| 959 | ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs[] = |
1015 | ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs[] = |
| 960 | { |
1016 | { |
| 961 | {ACPI_DMT_UINT32, ACPI_IVRS_OFFSET (Info), "Virtualization Info", 0}, |
1017 | {ACPI_DMT_UINT32, ACPI_IVRS_OFFSET (Info), "Virtualization Info", 0}, |
| 962 | {ACPI_DMT_UINT64, ACPI_IVRS_OFFSET (Reserved), "Reserved", 0}, |
1018 | {ACPI_DMT_UINT64, ACPI_IVRS_OFFSET (Reserved), "Reserved", 0}, |
| 963 | ACPI_DMT_TERMINATOR |
1019 | ACPI_DMT_TERMINATOR |
| 964 | }; |
1020 | }; |
| 965 | 1021 | ||
| 966 | /* Common Subtable header (one per Subtable) */ |
1022 | /* Common Subtable header (one per Subtable) */ |
| 967 | 1023 | ||
| 968 | ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsHdr[] = |
1024 | ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsHdr[] = |
| 969 | { |
1025 | { |
| 970 | {ACPI_DMT_IVRS, ACPI_IVRSH_OFFSET (Type), "Subtable Type", 0}, |
1026 | {ACPI_DMT_IVRS, ACPI_IVRSH_OFFSET (Type), "Subtable Type", 0}, |
| 971 | {ACPI_DMT_UINT8, ACPI_IVRSH_OFFSET (Flags), "Flags", 0}, |
1027 | {ACPI_DMT_UINT8, ACPI_IVRSH_OFFSET (Flags), "Flags", 0}, |
| 972 | {ACPI_DMT_UINT16, ACPI_IVRSH_OFFSET (Length), "Length", DT_LENGTH}, |
1028 | {ACPI_DMT_UINT16, ACPI_IVRSH_OFFSET (Length), "Length", DT_LENGTH}, |
| 973 | {ACPI_DMT_UINT16, ACPI_IVRSH_OFFSET (DeviceId), "DeviceId", 0}, |
1029 | {ACPI_DMT_UINT16, ACPI_IVRSH_OFFSET (DeviceId), "DeviceId", 0}, |
| 974 | ACPI_DMT_TERMINATOR |
1030 | ACPI_DMT_TERMINATOR |
| 975 | }; |
1031 | }; |
| 976 | 1032 | ||
| 977 | /* IVRS subtables */ |
1033 | /* IVRS subtables */ |
| 978 | 1034 | ||
| 979 | /* 0x10: I/O Virtualization Hardware Definition (IVHD) Block */ |
1035 | /* 0x10: I/O Virtualization Hardware Definition (IVHD) Block */ |
| 980 | 1036 | ||
| 981 | ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs0[] = |
1037 | ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs0[] = |
| 982 | { |
1038 | { |
| 983 | {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (CapabilityOffset), "Capability Offset", 0}, |
1039 | {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (CapabilityOffset), "Capability Offset", 0}, |
| 984 | {ACPI_DMT_UINT64, ACPI_IVRS0_OFFSET (BaseAddress), "Base Address", 0}, |
1040 | {ACPI_DMT_UINT64, ACPI_IVRS0_OFFSET (BaseAddress), "Base Address", 0}, |
| 985 | {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (PciSegmentGroup), "PCI Segment Group", 0}, |
1041 | {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (PciSegmentGroup), "PCI Segment Group", 0}, |
| 986 | {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (Info), "Virtualization Info", 0}, |
1042 | {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (Info), "Virtualization Info", 0}, |
| 987 | {ACPI_DMT_UINT32, ACPI_IVRS0_OFFSET (Reserved), "Reserved", 0}, |
1043 | {ACPI_DMT_UINT32, ACPI_IVRS0_OFFSET (Reserved), "Reserved", 0}, |
| 988 | ACPI_DMT_TERMINATOR |
1044 | ACPI_DMT_TERMINATOR |
| 989 | }; |
1045 | }; |
| 990 | 1046 | ||
| 991 | /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition (IVMD) Block */ |
1047 | /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition (IVMD) Block */ |
| 992 | 1048 | ||
| 993 | ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs1[] = |
1049 | ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs1[] = |
| 994 | { |
1050 | { |
| 995 | {ACPI_DMT_UINT16, ACPI_IVRS1_OFFSET (AuxData), "Auxiliary Data", 0}, |
1051 | {ACPI_DMT_UINT16, ACPI_IVRS1_OFFSET (AuxData), "Auxiliary Data", 0}, |
| 996 | {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (Reserved), "Reserved", 0}, |
1052 | {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (Reserved), "Reserved", 0}, |
| 997 | {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (StartAddress), "Start Address", 0}, |
1053 | {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (StartAddress), "Start Address", 0}, |
| 998 | {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (MemoryLength), "Memory Length", 0}, |
1054 | {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (MemoryLength), "Memory Length", 0}, |
| 999 | ACPI_DMT_TERMINATOR |
1055 | ACPI_DMT_TERMINATOR |
| 1000 | }; |
1056 | }; |
| 1001 | 1057 | ||
| 1002 | /* Device entry header for IVHD block */ |
1058 | /* Device entry header for IVHD block */ |
| 1003 | 1059 | ||
| 1004 | #define ACPI_DMT_IVRS_DE_HEADER \ |
1060 | #define ACPI_DMT_IVRS_DE_HEADER \ |
| 1005 | {ACPI_DMT_UINT8, ACPI_IVRSD_OFFSET (Type), "Entry Type", 0}, \ |
1061 | {ACPI_DMT_UINT8, ACPI_IVRSD_OFFSET (Type), "Entry Type", 0}, \ |
| 1006 | {ACPI_DMT_UINT16, ACPI_IVRSD_OFFSET (Id), "Device ID", 0}, \ |
1062 | {ACPI_DMT_UINT16, ACPI_IVRSD_OFFSET (Id), "Device ID", 0}, \ |
| 1007 | {ACPI_DMT_UINT8, ACPI_IVRSD_OFFSET (DataSetting), "Data Setting", 0} |
1063 | {ACPI_DMT_UINT8, ACPI_IVRSD_OFFSET (DataSetting), "Data Setting", 0} |
| 1008 | 1064 | ||
| 1009 | /* 4-byte device entry */ |
1065 | /* 4-byte device entry */ |
| 1010 | 1066 | ||
| 1011 | ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs4[] = |
1067 | ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs4[] = |
| 1012 | { |
1068 | { |
| 1013 | ACPI_DMT_IVRS_DE_HEADER, |
1069 | ACPI_DMT_IVRS_DE_HEADER, |
| 1014 | {ACPI_DMT_EXIT, 0, NULL, 0}, |
1070 | {ACPI_DMT_EXIT, 0, NULL, 0}, |
| 1015 | }; |
1071 | }; |
| 1016 | 1072 | ||
| 1017 | /* 8-byte device entry */ |
1073 | /* 8-byte device entry */ |
| 1018 | 1074 | ||
| 1019 | ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8a[] = |
1075 | ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8a[] = |
| 1020 | { |
1076 | { |
| 1021 | ACPI_DMT_IVRS_DE_HEADER, |
1077 | ACPI_DMT_IVRS_DE_HEADER, |
| 1022 | {ACPI_DMT_UINT8, ACPI_IVRS8A_OFFSET (Reserved1), "Reserved", 0}, |
1078 | {ACPI_DMT_UINT8, ACPI_IVRS8A_OFFSET (Reserved1), "Reserved", 0}, |
| 1023 | {ACPI_DMT_UINT16, ACPI_IVRS8A_OFFSET (UsedId), "Source Used Device ID", 0}, |
1079 | {ACPI_DMT_UINT16, ACPI_IVRS8A_OFFSET (UsedId), "Source Used Device ID", 0}, |
| 1024 | {ACPI_DMT_UINT8, ACPI_IVRS8A_OFFSET (Reserved2), "Reserved", 0}, |
1080 | {ACPI_DMT_UINT8, ACPI_IVRS8A_OFFSET (Reserved2), "Reserved", 0}, |
| 1025 | ACPI_DMT_TERMINATOR |
1081 | ACPI_DMT_TERMINATOR |
| 1026 | }; |
1082 | }; |
| 1027 | 1083 | ||
| 1028 | /* 8-byte device entry */ |
1084 | /* 8-byte device entry */ |
| 1029 | 1085 | ||
| 1030 | ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8b[] = |
1086 | ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8b[] = |
| 1031 | { |
1087 | { |
| 1032 | ACPI_DMT_IVRS_DE_HEADER, |
1088 | ACPI_DMT_IVRS_DE_HEADER, |
| 1033 | {ACPI_DMT_UINT32, ACPI_IVRS8B_OFFSET (ExtendedData), "Extended Data", 0}, |
1089 | {ACPI_DMT_UINT32, ACPI_IVRS8B_OFFSET (ExtendedData), "Extended Data", 0}, |
| 1034 | ACPI_DMT_TERMINATOR |
1090 | ACPI_DMT_TERMINATOR |
| 1035 | }; |
1091 | }; |
| 1036 | 1092 | ||
| 1037 | /* 8-byte device entry */ |
1093 | /* 8-byte device entry */ |
| 1038 | 1094 | ||
| 1039 | ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8c[] = |
1095 | ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8c[] = |
| 1040 | { |
1096 | { |
| 1041 | ACPI_DMT_IVRS_DE_HEADER, |
1097 | ACPI_DMT_IVRS_DE_HEADER, |
| 1042 | {ACPI_DMT_UINT8, ACPI_IVRS8C_OFFSET (Handle), "Handle", 0}, |
1098 | {ACPI_DMT_UINT8, ACPI_IVRS8C_OFFSET (Handle), "Handle", 0}, |
| 1043 | {ACPI_DMT_UINT16, ACPI_IVRS8C_OFFSET (UsedId), "Source Used Device ID", 0}, |
1099 | {ACPI_DMT_UINT16, ACPI_IVRS8C_OFFSET (UsedId), "Source Used Device ID", 0}, |
| 1044 | {ACPI_DMT_UINT8, ACPI_IVRS8C_OFFSET (Variety), "Variety", 0}, |
1100 | {ACPI_DMT_UINT8, ACPI_IVRS8C_OFFSET (Variety), "Variety", 0}, |
| 1045 | ACPI_DMT_TERMINATOR |
1101 | ACPI_DMT_TERMINATOR |
| 1046 | }; |
1102 | }; |
| 1047 | 1103 | ||
| 1048 | 1104 | ||
| 1049 | /******************************************************************************* |
1105 | /******************************************************************************* |
| 1050 | * |
1106 | * |
| 1051 | * MADT - Multiple APIC Description Table and subtables |
1107 | * MADT - Multiple APIC Description Table and subtables |
| 1052 | * |
1108 | * |
| 1053 | ******************************************************************************/ |
1109 | ******************************************************************************/ |
| 1054 | 1110 | ||
| 1055 | ACPI_DMTABLE_INFO AcpiDmTableInfoMadt[] = |
1111 | ACPI_DMTABLE_INFO AcpiDmTableInfoMadt[] = |
| 1056 | { |
1112 | { |
| 1057 | {ACPI_DMT_UINT32, ACPI_MADT_OFFSET (Address), "Local Apic Address", 0}, |
1113 | {ACPI_DMT_UINT32, ACPI_MADT_OFFSET (Address), "Local Apic Address", 0}, |
| 1058 | {ACPI_DMT_UINT32, ACPI_MADT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, |
1114 | {ACPI_DMT_UINT32, ACPI_MADT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, |
| 1059 | {ACPI_DMT_FLAG0, ACPI_MADT_FLAG_OFFSET (Flags,0), "PC-AT Compatibility", 0}, |
1115 | {ACPI_DMT_FLAG0, ACPI_MADT_FLAG_OFFSET (Flags,0), "PC-AT Compatibility", 0}, |
| 1060 | ACPI_DMT_TERMINATOR |
1116 | ACPI_DMT_TERMINATOR |
| 1061 | }; |
1117 | }; |
| 1062 | 1118 | ||
| 1063 | /* Common Subtable header (one per Subtable) */ |
1119 | /* Common Subtable header (one per Subtable) */ |
| 1064 | 1120 | ||
| 1065 | ACPI_DMTABLE_INFO AcpiDmTableInfoMadtHdr[] = |
1121 | ACPI_DMTABLE_INFO AcpiDmTableInfoMadtHdr[] = |
| 1066 | { |
1122 | { |
| 1067 | {ACPI_DMT_MADT, ACPI_MADTH_OFFSET (Type), "Subtable Type", 0}, |
1123 | {ACPI_DMT_MADT, ACPI_MADTH_OFFSET (Type), "Subtable Type", 0}, |
| 1068 | {ACPI_DMT_UINT8, ACPI_MADTH_OFFSET (Length), "Length", DT_LENGTH}, |
1124 | {ACPI_DMT_UINT8, ACPI_MADTH_OFFSET (Length), "Length", DT_LENGTH}, |
| 1069 | ACPI_DMT_TERMINATOR |
1125 | ACPI_DMT_TERMINATOR |
| 1070 | }; |
1126 | }; |
| 1071 | 1127 | ||
| 1072 | /* MADT Subtables */ |
1128 | /* MADT Subtables */ |
| 1073 | 1129 | ||
| 1074 | /* 0: processor APIC */ |
1130 | /* 0: processor APIC */ |
| 1075 | 1131 | ||
| 1076 | ACPI_DMTABLE_INFO AcpiDmTableInfoMadt0[] = |
1132 | ACPI_DMTABLE_INFO AcpiDmTableInfoMadt0[] = |
| 1077 | { |
1133 | { |
| 1078 | {ACPI_DMT_UINT8, ACPI_MADT0_OFFSET (ProcessorId), "Processor ID", 0}, |
1134 | {ACPI_DMT_UINT8, ACPI_MADT0_OFFSET (ProcessorId), "Processor ID", 0}, |
| 1079 | {ACPI_DMT_UINT8, ACPI_MADT0_OFFSET (Id), "Local Apic ID", 0}, |
1135 | {ACPI_DMT_UINT8, ACPI_MADT0_OFFSET (Id), "Local Apic ID", 0}, |
| 1080 | {ACPI_DMT_UINT32, ACPI_MADT0_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG}, |
1136 | {ACPI_DMT_UINT32, ACPI_MADT0_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG}, |
| 1081 | {ACPI_DMT_FLAG0, ACPI_MADT0_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0}, |
1137 | {ACPI_DMT_FLAG0, ACPI_MADT0_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0}, |
| 1082 | ACPI_DMT_TERMINATOR |
1138 | ACPI_DMT_TERMINATOR |
| 1083 | }; |
1139 | }; |
| 1084 | 1140 | ||
| 1085 | /* 1: IO APIC */ |
1141 | /* 1: IO APIC */ |
| 1086 | 1142 | ||
| 1087 | ACPI_DMTABLE_INFO AcpiDmTableInfoMadt1[] = |
1143 | ACPI_DMTABLE_INFO AcpiDmTableInfoMadt1[] = |
| 1088 | { |
1144 | { |
| 1089 | {ACPI_DMT_UINT8, ACPI_MADT1_OFFSET (Id), "I/O Apic ID", 0}, |
1145 | {ACPI_DMT_UINT8, ACPI_MADT1_OFFSET (Id), "I/O Apic ID", 0}, |
| 1090 | {ACPI_DMT_UINT8, ACPI_MADT1_OFFSET (Reserved), "Reserved", 0}, |
1146 | {ACPI_DMT_UINT8, ACPI_MADT1_OFFSET (Reserved), "Reserved", 0}, |
| 1091 | {ACPI_DMT_UINT32, ACPI_MADT1_OFFSET (Address), "Address", 0}, |
1147 | {ACPI_DMT_UINT32, ACPI_MADT1_OFFSET (Address), "Address", 0}, |
| 1092 | {ACPI_DMT_UINT32, ACPI_MADT1_OFFSET (GlobalIrqBase), "Interrupt", 0}, |
1148 | {ACPI_DMT_UINT32, ACPI_MADT1_OFFSET (GlobalIrqBase), "Interrupt", 0}, |
| 1093 | ACPI_DMT_TERMINATOR |
1149 | ACPI_DMT_TERMINATOR |
| 1094 | }; |
1150 | }; |
| 1095 | 1151 | ||
| 1096 | /* 2: Interrupt Override */ |
1152 | /* 2: Interrupt Override */ |
| 1097 | 1153 | ||
| 1098 | ACPI_DMTABLE_INFO AcpiDmTableInfoMadt2[] = |
1154 | ACPI_DMTABLE_INFO AcpiDmTableInfoMadt2[] = |
| 1099 | { |
1155 | { |
| 1100 | {ACPI_DMT_UINT8, ACPI_MADT2_OFFSET (Bus), "Bus", 0}, |
1156 | {ACPI_DMT_UINT8, ACPI_MADT2_OFFSET (Bus), "Bus", 0}, |
| 1101 | {ACPI_DMT_UINT8, ACPI_MADT2_OFFSET (SourceIrq), "Source", 0}, |
1157 | {ACPI_DMT_UINT8, ACPI_MADT2_OFFSET (SourceIrq), "Source", 0}, |
| 1102 | {ACPI_DMT_UINT32, ACPI_MADT2_OFFSET (GlobalIrq), "Interrupt", 0}, |
1158 | {ACPI_DMT_UINT32, ACPI_MADT2_OFFSET (GlobalIrq), "Interrupt", 0}, |
| 1103 | {ACPI_DMT_UINT16, ACPI_MADT2_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, |
1159 | {ACPI_DMT_UINT16, ACPI_MADT2_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, |
| 1104 | {ACPI_DMT_FLAGS0, ACPI_MADT2_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, |
1160 | {ACPI_DMT_FLAGS0, ACPI_MADT2_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, |
| 1105 | {ACPI_DMT_FLAGS2, ACPI_MADT2_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, |
1161 | {ACPI_DMT_FLAGS2, ACPI_MADT2_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, |
| 1106 | ACPI_DMT_TERMINATOR |
1162 | ACPI_DMT_TERMINATOR |
| 1107 | }; |
1163 | }; |
| 1108 | 1164 | ||
| 1109 | /* 3: NMI Sources */ |
1165 | /* 3: NMI Sources */ |
| 1110 | 1166 | ||
| 1111 | ACPI_DMTABLE_INFO AcpiDmTableInfoMadt3[] = |
1167 | ACPI_DMTABLE_INFO AcpiDmTableInfoMadt3[] = |
| 1112 | { |
1168 | { |
| 1113 | {ACPI_DMT_UINT16, ACPI_MADT3_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, |
1169 | {ACPI_DMT_UINT16, ACPI_MADT3_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, |
| 1114 | {ACPI_DMT_FLAGS0, ACPI_MADT3_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, |
1170 | {ACPI_DMT_FLAGS0, ACPI_MADT3_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, |
| 1115 | {ACPI_DMT_FLAGS2, ACPI_MADT3_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, |
1171 | {ACPI_DMT_FLAGS2, ACPI_MADT3_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, |
| 1116 | {ACPI_DMT_UINT32, ACPI_MADT3_OFFSET (GlobalIrq), "Interrupt", 0}, |
1172 | {ACPI_DMT_UINT32, ACPI_MADT3_OFFSET (GlobalIrq), "Interrupt", 0}, |
| 1117 | ACPI_DMT_TERMINATOR |
1173 | ACPI_DMT_TERMINATOR |
| 1118 | }; |
1174 | }; |
| 1119 | 1175 | ||
| 1120 | /* 4: Local APIC NMI */ |
1176 | /* 4: Local APIC NMI */ |
| 1121 | 1177 | ||
| 1122 | ACPI_DMTABLE_INFO AcpiDmTableInfoMadt4[] = |
1178 | ACPI_DMTABLE_INFO AcpiDmTableInfoMadt4[] = |
| 1123 | { |
1179 | { |
| 1124 | {ACPI_DMT_UINT8, ACPI_MADT4_OFFSET (ProcessorId), "Processor ID", 0}, |
1180 | {ACPI_DMT_UINT8, ACPI_MADT4_OFFSET (ProcessorId), "Processor ID", 0}, |
| 1125 | {ACPI_DMT_UINT16, ACPI_MADT4_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, |
1181 | {ACPI_DMT_UINT16, ACPI_MADT4_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, |
| 1126 | {ACPI_DMT_FLAGS0, ACPI_MADT4_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, |
1182 | {ACPI_DMT_FLAGS0, ACPI_MADT4_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, |
| 1127 | {ACPI_DMT_FLAGS2, ACPI_MADT4_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, |
1183 | {ACPI_DMT_FLAGS2, ACPI_MADT4_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, |
| 1128 | {ACPI_DMT_UINT8, ACPI_MADT4_OFFSET (Lint), "Interrupt Input LINT", 0}, |
1184 | {ACPI_DMT_UINT8, ACPI_MADT4_OFFSET (Lint), "Interrupt Input LINT", 0}, |
| 1129 | ACPI_DMT_TERMINATOR |
1185 | ACPI_DMT_TERMINATOR |
| 1130 | }; |
1186 | }; |
| 1131 | 1187 | ||
| 1132 | /* 5: Address Override */ |
1188 | /* 5: Address Override */ |
| 1133 | 1189 | ||
| 1134 | ACPI_DMTABLE_INFO AcpiDmTableInfoMadt5[] = |
1190 | ACPI_DMTABLE_INFO AcpiDmTableInfoMadt5[] = |
| 1135 | { |
1191 | { |
| 1136 | {ACPI_DMT_UINT16, ACPI_MADT5_OFFSET (Reserved), "Reserved", 0}, |
1192 | {ACPI_DMT_UINT16, ACPI_MADT5_OFFSET (Reserved), "Reserved", 0}, |
| 1137 | {ACPI_DMT_UINT64, ACPI_MADT5_OFFSET (Address), "APIC Address", 0}, |
1193 | {ACPI_DMT_UINT64, ACPI_MADT5_OFFSET (Address), "APIC Address", 0}, |
| 1138 | ACPI_DMT_TERMINATOR |
1194 | ACPI_DMT_TERMINATOR |
| 1139 | }; |
1195 | }; |
| 1140 | 1196 | ||
| 1141 | /* 6: I/O Sapic */ |
1197 | /* 6: I/O Sapic */ |
| 1142 | 1198 | ||
| 1143 | ACPI_DMTABLE_INFO AcpiDmTableInfoMadt6[] = |
1199 | ACPI_DMTABLE_INFO AcpiDmTableInfoMadt6[] = |
| 1144 | { |
1200 | { |
| 1145 | {ACPI_DMT_UINT8, ACPI_MADT6_OFFSET (Id), "I/O Sapic ID", 0}, |
1201 | {ACPI_DMT_UINT8, ACPI_MADT6_OFFSET (Id), "I/O Sapic ID", 0}, |
| 1146 | {ACPI_DMT_UINT8, ACPI_MADT6_OFFSET (Reserved), "Reserved", 0}, |
1202 | {ACPI_DMT_UINT8, ACPI_MADT6_OFFSET (Reserved), "Reserved", 0}, |
| 1147 | {ACPI_DMT_UINT32, ACPI_MADT6_OFFSET (GlobalIrqBase), "Interrupt Base", 0}, |
1203 | {ACPI_DMT_UINT32, ACPI_MADT6_OFFSET (GlobalIrqBase), "Interrupt Base", 0}, |
| 1148 | {ACPI_DMT_UINT64, ACPI_MADT6_OFFSET (Address), "Address", 0}, |
1204 | {ACPI_DMT_UINT64, ACPI_MADT6_OFFSET (Address), "Address", 0}, |
| 1149 | ACPI_DMT_TERMINATOR |
1205 | ACPI_DMT_TERMINATOR |
| 1150 | }; |
1206 | }; |
| 1151 | 1207 | ||
| 1152 | /* 7: Local Sapic */ |
1208 | /* 7: Local Sapic */ |
| 1153 | 1209 | ||
| 1154 | ACPI_DMTABLE_INFO AcpiDmTableInfoMadt7[] = |
1210 | ACPI_DMTABLE_INFO AcpiDmTableInfoMadt7[] = |
| 1155 | { |
1211 | { |
| 1156 | {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (ProcessorId), "Processor ID", 0}, |
1212 | {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (ProcessorId), "Processor ID", 0}, |
| 1157 | {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (Id), "Local Sapic ID", 0}, |
1213 | {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (Id), "Local Sapic ID", 0}, |
| 1158 | {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (Eid), "Local Sapic EID", 0}, |
1214 | {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (Eid), "Local Sapic EID", 0}, |
| 1159 | {ACPI_DMT_UINT24, ACPI_MADT7_OFFSET (Reserved[0]), "Reserved", 0}, |
1215 | {ACPI_DMT_UINT24, ACPI_MADT7_OFFSET (Reserved[0]), "Reserved", 0}, |
| 1160 | {ACPI_DMT_UINT32, ACPI_MADT7_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG}, |
1216 | {ACPI_DMT_UINT32, ACPI_MADT7_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG}, |
| 1161 | {ACPI_DMT_FLAG0, ACPI_MADT7_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0}, |
1217 | {ACPI_DMT_FLAG0, ACPI_MADT7_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0}, |
| 1162 | {ACPI_DMT_UINT32, ACPI_MADT7_OFFSET (Uid), "Processor UID", 0}, |
1218 | {ACPI_DMT_UINT32, ACPI_MADT7_OFFSET (Uid), "Processor UID", 0}, |
| 1163 | {ACPI_DMT_STRING, ACPI_MADT7_OFFSET (UidString[0]), "Processor UID String", 0}, |
1219 | {ACPI_DMT_STRING, ACPI_MADT7_OFFSET (UidString[0]), "Processor UID String", 0}, |
| 1164 | ACPI_DMT_TERMINATOR |
1220 | ACPI_DMT_TERMINATOR |
| 1165 | }; |
1221 | }; |
| 1166 | 1222 | ||
| 1167 | /* 8: Platform Interrupt Source */ |
1223 | /* 8: Platform Interrupt Source */ |
| 1168 | 1224 | ||
| 1169 | ACPI_DMTABLE_INFO AcpiDmTableInfoMadt8[] = |
1225 | ACPI_DMTABLE_INFO AcpiDmTableInfoMadt8[] = |
| 1170 | { |
1226 | { |
| 1171 | {ACPI_DMT_UINT16, ACPI_MADT8_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, |
1227 | {ACPI_DMT_UINT16, ACPI_MADT8_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, |
| 1172 | {ACPI_DMT_FLAGS0, ACPI_MADT8_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, |
1228 | {ACPI_DMT_FLAGS0, ACPI_MADT8_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, |
| 1173 | {ACPI_DMT_FLAGS2, ACPI_MADT8_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, |
1229 | {ACPI_DMT_FLAGS2, ACPI_MADT8_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, |
| 1174 | {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Type), "InterruptType", 0}, |
1230 | {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Type), "InterruptType", 0}, |
| 1175 | {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Id), "Processor ID", 0}, |
1231 | {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Id), "Processor ID", 0}, |
| 1176 | {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Eid), "Processor EID", 0}, |
1232 | {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Eid), "Processor EID", 0}, |
| 1177 | {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (IoSapicVector), "I/O Sapic Vector", 0}, |
1233 | {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (IoSapicVector), "I/O Sapic Vector", 0}, |
| 1178 | {ACPI_DMT_UINT32, ACPI_MADT8_OFFSET (GlobalIrq), "Interrupt", 0}, |
1234 | {ACPI_DMT_UINT32, ACPI_MADT8_OFFSET (GlobalIrq), "Interrupt", 0}, |
| 1179 | {ACPI_DMT_UINT32, ACPI_MADT8_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, |
1235 | {ACPI_DMT_UINT32, ACPI_MADT8_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, |
| 1180 | {ACPI_DMT_FLAG0, ACPI_MADT8_OFFSET (Flags), "CPEI Override", 0}, |
1236 | {ACPI_DMT_FLAG0, ACPI_MADT8_OFFSET (Flags), "CPEI Override", 0}, |
| 1181 | ACPI_DMT_TERMINATOR |
1237 | ACPI_DMT_TERMINATOR |
| 1182 | }; |
1238 | }; |
| 1183 | 1239 | ||
| 1184 | /* 9: Processor Local X2_APIC (ACPI 4.0) */ |
1240 | /* 9: Processor Local X2_APIC (ACPI 4.0) */ |
| 1185 | 1241 | ||
| 1186 | ACPI_DMTABLE_INFO AcpiDmTableInfoMadt9[] = |
1242 | ACPI_DMTABLE_INFO AcpiDmTableInfoMadt9[] = |
| 1187 | { |
1243 | { |
| 1188 | {ACPI_DMT_UINT16, ACPI_MADT9_OFFSET (Reserved), "Reserved", 0}, |
1244 | {ACPI_DMT_UINT16, ACPI_MADT9_OFFSET (Reserved), "Reserved", 0}, |
| 1189 | {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (LocalApicId), "Processor x2Apic ID", 0}, |
1245 | {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (LocalApicId), "Processor x2Apic ID", 0}, |
| 1190 | {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG}, |
1246 | {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG}, |
| 1191 | {ACPI_DMT_FLAG0, ACPI_MADT9_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0}, |
1247 | {ACPI_DMT_FLAG0, ACPI_MADT9_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0}, |
| 1192 | {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (Uid), "Processor UID", 0}, |
1248 | {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (Uid), "Processor UID", 0}, |
| 1193 | ACPI_DMT_TERMINATOR |
1249 | ACPI_DMT_TERMINATOR |
| 1194 | }; |
1250 | }; |
| 1195 | 1251 | ||
| 1196 | /* 10: Local X2_APIC NMI (ACPI 4.0) */ |
1252 | /* 10: Local X2_APIC NMI (ACPI 4.0) */ |
| 1197 | 1253 | ||
| 1198 | ACPI_DMTABLE_INFO AcpiDmTableInfoMadt10[] = |
1254 | ACPI_DMTABLE_INFO AcpiDmTableInfoMadt10[] = |
| 1199 | { |
1255 | { |
| 1200 | {ACPI_DMT_UINT16, ACPI_MADT10_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, |
1256 | {ACPI_DMT_UINT16, ACPI_MADT10_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, |
| 1201 | {ACPI_DMT_FLAGS0, ACPI_MADT10_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, |
1257 | {ACPI_DMT_FLAGS0, ACPI_MADT10_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, |
| 1202 | {ACPI_DMT_FLAGS2, ACPI_MADT10_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, |
1258 | {ACPI_DMT_FLAGS2, ACPI_MADT10_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, |
| 1203 | {ACPI_DMT_UINT32, ACPI_MADT10_OFFSET (Uid), "Processor UID", 0}, |
1259 | {ACPI_DMT_UINT32, ACPI_MADT10_OFFSET (Uid), "Processor UID", 0}, |
| 1204 | {ACPI_DMT_UINT8, ACPI_MADT10_OFFSET (Lint), "Interrupt Input LINT", 0}, |
1260 | {ACPI_DMT_UINT8, ACPI_MADT10_OFFSET (Lint), "Interrupt Input LINT", 0}, |
| 1205 | {ACPI_DMT_UINT24, ACPI_MADT10_OFFSET (Reserved[0]), "Reserved", 0}, |
1261 | {ACPI_DMT_UINT24, ACPI_MADT10_OFFSET (Reserved[0]), "Reserved", 0}, |
| 1206 | ACPI_DMT_TERMINATOR |
1262 | ACPI_DMT_TERMINATOR |
| 1207 | }; |
1263 | }; |
| 1208 | 1264 | ||
| 1209 | 1265 | ||
| 1210 | /******************************************************************************* |
1266 | /******************************************************************************* |
| 1211 | * |
1267 | * |
| 1212 | * MCFG - PCI Memory Mapped Configuration table and Subtable |
1268 | * MCFG - PCI Memory Mapped Configuration table and Subtable |
| 1213 | * |
1269 | * |
| 1214 | ******************************************************************************/ |
1270 | ******************************************************************************/ |
| 1215 | 1271 | ||
| 1216 | ACPI_DMTABLE_INFO AcpiDmTableInfoMcfg[] = |
1272 | ACPI_DMTABLE_INFO AcpiDmTableInfoMcfg[] = |
| 1217 | { |
1273 | { |
| 1218 | {ACPI_DMT_UINT64, ACPI_MCFG_OFFSET (Reserved[0]), "Reserved", 0}, |
1274 | {ACPI_DMT_UINT64, ACPI_MCFG_OFFSET (Reserved[0]), "Reserved", 0}, |
| 1219 | ACPI_DMT_TERMINATOR |
1275 | ACPI_DMT_TERMINATOR |
| 1220 | }; |
1276 | }; |
| 1221 | 1277 | ||
| 1222 | ACPI_DMTABLE_INFO AcpiDmTableInfoMcfg0[] = |
1278 | ACPI_DMTABLE_INFO AcpiDmTableInfoMcfg0[] = |
| 1223 | { |
1279 | { |
| 1224 | {ACPI_DMT_UINT64, ACPI_MCFG0_OFFSET (Address), "Base Address", 0}, |
1280 | {ACPI_DMT_UINT64, ACPI_MCFG0_OFFSET (Address), "Base Address", 0}, |
| 1225 | {ACPI_DMT_UINT16, ACPI_MCFG0_OFFSET (PciSegment), "Segment Group Number", 0}, |
1281 | {ACPI_DMT_UINT16, ACPI_MCFG0_OFFSET (PciSegment), "Segment Group Number", 0}, |
| 1226 | {ACPI_DMT_UINT8, ACPI_MCFG0_OFFSET (StartBusNumber), "Start Bus Number", 0}, |
1282 | {ACPI_DMT_UINT8, ACPI_MCFG0_OFFSET (StartBusNumber), "Start Bus Number", 0}, |
| 1227 | {ACPI_DMT_UINT8, ACPI_MCFG0_OFFSET (EndBusNumber), "End Bus Number", 0}, |
1283 | {ACPI_DMT_UINT8, ACPI_MCFG0_OFFSET (EndBusNumber), "End Bus Number", 0}, |
| 1228 | {ACPI_DMT_UINT32, ACPI_MCFG0_OFFSET (Reserved), "Reserved", 0}, |
1284 | {ACPI_DMT_UINT32, ACPI_MCFG0_OFFSET (Reserved), "Reserved", 0}, |
| 1229 | ACPI_DMT_TERMINATOR |
1285 | ACPI_DMT_TERMINATOR |
| 1230 | }; |
1286 | }; |
| 1231 | 1287 | ||
| 1232 | 1288 | ||
| 1233 | /******************************************************************************* |
1289 | /******************************************************************************* |
| 1234 | * |
1290 | * |
| 1235 | * MCHI - Management Controller Host Interface table |
1291 | * MCHI - Management Controller Host Interface table |
| 1236 | * |
1292 | * |
| 1237 | ******************************************************************************/ |
1293 | ******************************************************************************/ |
| 1238 | 1294 | ||
| 1239 | ACPI_DMTABLE_INFO AcpiDmTableInfoMchi[] = |
1295 | ACPI_DMTABLE_INFO AcpiDmTableInfoMchi[] = |
| 1240 | { |
1296 | { |
| 1241 | {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (InterfaceType), "Interface Type", 0}, |
1297 | {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (InterfaceType), "Interface Type", 0}, |
| 1242 | {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (Protocol), "Protocol", 0}, |
1298 | {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (Protocol), "Protocol", 0}, |
| 1243 | {ACPI_DMT_UINT64, ACPI_MCHI_OFFSET (ProtocolData), "Protocol Data", 0}, |
1299 | {ACPI_DMT_UINT64, ACPI_MCHI_OFFSET (ProtocolData), "Protocol Data", 0}, |
| 1244 | {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (InterruptType), "Interrupt Type", 0}, |
1300 | {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (InterruptType), "Interrupt Type", 0}, |
| 1245 | {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (Gpe), "Gpe", 0}, |
1301 | {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (Gpe), "Gpe", 0}, |
| 1246 | {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciDeviceFlag), "Pci Device Flag", 0}, |
1302 | {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciDeviceFlag), "Pci Device Flag", 0}, |
| 1247 | {ACPI_DMT_UINT32, ACPI_MCHI_OFFSET (GlobalInterrupt), "Global Interrupt", 0}, |
1303 | {ACPI_DMT_UINT32, ACPI_MCHI_OFFSET (GlobalInterrupt), "Global Interrupt", 0}, |
| 1248 | {ACPI_DMT_GAS, ACPI_MCHI_OFFSET (ControlRegister), "Control Register", 0}, |
1304 | {ACPI_DMT_GAS, ACPI_MCHI_OFFSET (ControlRegister), "Control Register", 0}, |
| 1249 | {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciSegment), "Pci Segment", 0}, |
1305 | {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciSegment), "Pci Segment", 0}, |
| 1250 | {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciBus), "Pci Bus", 0}, |
1306 | {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciBus), "Pci Bus", 0}, |
| 1251 | {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciDevice), "Pci Device", 0}, |
1307 | {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciDevice), "Pci Device", 0}, |
| 1252 | {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciFunction), "Pci Function", 0}, |
1308 | {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciFunction), "Pci Function", 0}, |
| 1253 | ACPI_DMT_TERMINATOR |
1309 | ACPI_DMT_TERMINATOR |
| 1254 | }; |
1310 | }; |
| 1255 | 1311 | ||
| 1256 | 1312 | ||
| 1257 | /******************************************************************************* |
1313 | /******************************************************************************* |
| 1258 | * |
1314 | * |
| 1259 | * MSCT - Maximum System Characteristics Table (ACPI 4.0) |
1315 | * MSCT - Maximum System Characteristics Table (ACPI 4.0) |
| 1260 | * |
1316 | * |
| 1261 | ******************************************************************************/ |
1317 | ******************************************************************************/ |
| 1262 | 1318 | ||
| 1263 | ACPI_DMTABLE_INFO AcpiDmTableInfoMsct[] = |
1319 | ACPI_DMTABLE_INFO AcpiDmTableInfoMsct[] = |
| 1264 | { |
1320 | { |
| 1265 | {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (ProximityOffset), "Proximity Offset", 0}, |
1321 | {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (ProximityOffset), "Proximity Offset", 0}, |
| 1266 | {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (MaxProximityDomains), "Max Proximity Domains", 0}, |
1322 | {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (MaxProximityDomains), "Max Proximity Domains", 0}, |
| 1267 | {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (MaxClockDomains), "Max Clock Domains", 0}, |
1323 | {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (MaxClockDomains), "Max Clock Domains", 0}, |
| 1268 | {ACPI_DMT_UINT64, ACPI_MSCT_OFFSET (MaxAddress), "Max Physical Address", 0}, |
1324 | {ACPI_DMT_UINT64, ACPI_MSCT_OFFSET (MaxAddress), "Max Physical Address", 0}, |
| 1269 | ACPI_DMT_TERMINATOR |
1325 | ACPI_DMT_TERMINATOR |
| 1270 | }; |
1326 | }; |
| 1271 | 1327 | ||
| 1272 | /* Subtable - Maximum Proximity Domain Information. Version 1 */ |
1328 | /* Subtable - Maximum Proximity Domain Information. Version 1 */ |
| 1273 | 1329 | ||
| 1274 | ACPI_DMTABLE_INFO AcpiDmTableInfoMsct0[] = |
1330 | ACPI_DMTABLE_INFO AcpiDmTableInfoMsct0[] = |
| 1275 | { |
1331 | { |
| 1276 | {ACPI_DMT_UINT8, ACPI_MSCT0_OFFSET (Revision), "Revision", 0}, |
1332 | {ACPI_DMT_UINT8, ACPI_MSCT0_OFFSET (Revision), "Revision", 0}, |
| 1277 | {ACPI_DMT_UINT8, ACPI_MSCT0_OFFSET (Length), "Length", DT_LENGTH}, |
1333 | {ACPI_DMT_UINT8, ACPI_MSCT0_OFFSET (Length), "Length", DT_LENGTH}, |
| 1278 | {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (RangeStart), "Domain Range Start", 0}, |
1334 | {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (RangeStart), "Domain Range Start", 0}, |
| 1279 | {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (RangeEnd), "Domain Range End", 0}, |
1335 | {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (RangeEnd), "Domain Range End", 0}, |
| 1280 | {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (ProcessorCapacity), "Processor Capacity", 0}, |
1336 | {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (ProcessorCapacity), "Processor Capacity", 0}, |
| 1281 | {ACPI_DMT_UINT64, ACPI_MSCT0_OFFSET (MemoryCapacity), "Memory Capacity", 0}, |
1337 | {ACPI_DMT_UINT64, ACPI_MSCT0_OFFSET (MemoryCapacity), "Memory Capacity", 0}, |
| 1282 | ACPI_DMT_TERMINATOR |
1338 | ACPI_DMT_TERMINATOR |
| 1283 | }; |
1339 | }; |
| 1284 | 1340 | ||
| 1285 | 1341 | ||
| 1286 | /******************************************************************************* |
1342 | /******************************************************************************* |
| 1287 | * |
1343 | * |
| 1288 | * SBST - Smart Battery Specification Table |
1344 | * SBST - Smart Battery Specification Table |
| 1289 | * |
1345 | * |
| 1290 | ******************************************************************************/ |
1346 | ******************************************************************************/ |
| 1291 | 1347 | ||
| 1292 | ACPI_DMTABLE_INFO AcpiDmTableInfoSbst[] = |
1348 | ACPI_DMTABLE_INFO AcpiDmTableInfoSbst[] = |
| 1293 | { |
1349 | { |
| 1294 | {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (WarningLevel), "Warning Level", 0}, |
1350 | {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (WarningLevel), "Warning Level", 0}, |
| 1295 | {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (LowLevel), "Low Level", 0}, |
1351 | {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (LowLevel), "Low Level", 0}, |
| 1296 | {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (CriticalLevel), "Critical Level", 0}, |
1352 | {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (CriticalLevel), "Critical Level", 0}, |
| 1297 | ACPI_DMT_TERMINATOR |
1353 | ACPI_DMT_TERMINATOR |
| 1298 | }; |
1354 | }; |
| 1299 | 1355 | ||
| 1300 | 1356 | ||
| 1301 | /******************************************************************************* |
1357 | /******************************************************************************* |
| 1302 | * |
1358 | * |
| 1303 | * SLIC - Software Licensing Description Table. NOT FULLY IMPLEMENTED, do not |
1359 | * SLIC - Software Licensing Description Table. There is no common table, just |
| 1304 | * have the table definition. |
1360 | * the standard ACPI header and then subtables. |
| 1305 | * |
1361 | * |
| 1306 | ******************************************************************************/ |
1362 | ******************************************************************************/ |
| - | 1363 | ||
| - | 1364 | /* Common Subtable header (one per Subtable) */ |
|
| - | 1365 | ||
| - | 1366 | ACPI_DMTABLE_INFO AcpiDmTableInfoSlicHdr[] = |
|
| - | 1367 | { |
|
| - | 1368 | {ACPI_DMT_SLIC, ACPI_SLICH_OFFSET (Type), "Subtable Type", 0}, |
|
| - | 1369 | {ACPI_DMT_UINT32, ACPI_SLICH_OFFSET (Length), "Length", DT_LENGTH}, |
|
| - | 1370 | ACPI_DMT_TERMINATOR |
|
| - | 1371 | }; |
|
| 1307 | 1372 | ||
| - | 1373 | ACPI_DMTABLE_INFO AcpiDmTableInfoSlic0[] = |
|
| - | 1374 | { |
|
| - | 1375 | {ACPI_DMT_UINT8, ACPI_SLIC0_OFFSET (KeyType), "Key Type", 0}, |
|
| - | 1376 | {ACPI_DMT_UINT8, ACPI_SLIC0_OFFSET (Version), "Version", 0}, |
|
| - | 1377 | {ACPI_DMT_UINT16, ACPI_SLIC0_OFFSET (Reserved), "Reserved", 0}, |
|
| - | 1378 | {ACPI_DMT_UINT32, ACPI_SLIC0_OFFSET (Algorithm), "Algorithm", 0}, |
|
| - | 1379 | {ACPI_DMT_NAME4, ACPI_SLIC0_OFFSET (Magic), "Magic", 0}, |
|
| - | 1380 | {ACPI_DMT_UINT32, ACPI_SLIC0_OFFSET (BitLength), "BitLength", 0}, |
|
| - | 1381 | {ACPI_DMT_UINT32, ACPI_SLIC0_OFFSET (Exponent), "Exponent", 0}, |
|
| - | 1382 | {ACPI_DMT_BUF128, ACPI_SLIC0_OFFSET (Modulus[0]), "Modulus", 0}, |
|
| - | 1383 | ACPI_DMT_TERMINATOR |
|
| - | 1384 | }; |
|
| - | 1385 | ||
| 1308 | ACPI_DMTABLE_INFO AcpiDmTableInfoSlic[] = |
1386 | ACPI_DMTABLE_INFO AcpiDmTableInfoSlic1[] = |
| - | 1387 | { |
|
| - | 1388 | {ACPI_DMT_UINT32, ACPI_SLIC1_OFFSET (Version), "Version", 0}, |
|
| - | 1389 | {ACPI_DMT_NAME6, ACPI_SLIC1_OFFSET (OemId[0]), "Oem ID", 0}, |
|
| - | 1390 | {ACPI_DMT_NAME8, ACPI_SLIC1_OFFSET (OemTableId[0]), "Oem Table ID", 0}, |
|
| - | 1391 | {ACPI_DMT_NAME8, ACPI_SLIC1_OFFSET (WindowsFlag[0]), "Windows Flag", 0}, |
|
| - | 1392 | {ACPI_DMT_UINT32, ACPI_SLIC1_OFFSET (SlicVersion), "SLIC Version", 0}, |
|
| - | 1393 | {ACPI_DMT_BUF16, ACPI_SLIC1_OFFSET (Reserved[0]), "Reserved", 0}, |
|
| 1309 | { |
1394 | {ACPI_DMT_BUF128, ACPI_SLIC1_OFFSET (Signature[0]), "Signature", 0}, |
| 1310 | ACPI_DMT_TERMINATOR |
1395 | ACPI_DMT_TERMINATOR |
| 1311 | }; |
1396 | }; |
| 1312 | 1397 | ||
| 1313 | 1398 | ||
| 1314 | /******************************************************************************* |
1399 | /******************************************************************************* |
| 1315 | * |
1400 | * |
| 1316 | * SLIT - System Locality Information Table |
1401 | * SLIT - System Locality Information Table |
| 1317 | * |
1402 | * |
| 1318 | ******************************************************************************/ |
1403 | ******************************************************************************/ |
| 1319 | 1404 | ||
| 1320 | ACPI_DMTABLE_INFO AcpiDmTableInfoSlit[] = |
1405 | ACPI_DMTABLE_INFO AcpiDmTableInfoSlit[] = |
| 1321 | { |
1406 | { |
| 1322 | {ACPI_DMT_UINT64, ACPI_SLIT_OFFSET (LocalityCount), "Localities", 0}, |
1407 | {ACPI_DMT_UINT64, ACPI_SLIT_OFFSET (LocalityCount), "Localities", 0}, |
| 1323 | ACPI_DMT_TERMINATOR |
1408 | ACPI_DMT_TERMINATOR |
| 1324 | }; |
1409 | }; |
| 1325 | 1410 | ||
| 1326 | 1411 | ||
| 1327 | /******************************************************************************* |
1412 | /******************************************************************************* |
| 1328 | * |
1413 | * |
| 1329 | * SPCR - Serial Port Console Redirection table |
1414 | * SPCR - Serial Port Console Redirection table |
| 1330 | * |
1415 | * |
| 1331 | ******************************************************************************/ |
1416 | ******************************************************************************/ |
| 1332 | 1417 | ||
| 1333 | ACPI_DMTABLE_INFO AcpiDmTableInfoSpcr[] = |
1418 | ACPI_DMTABLE_INFO AcpiDmTableInfoSpcr[] = |
| 1334 | { |
1419 | { |
| 1335 | {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (InterfaceType), "Interface Type", 0}, |
1420 | {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (InterfaceType), "Interface Type", 0}, |
| 1336 | {ACPI_DMT_UINT24, ACPI_SPCR_OFFSET (Reserved[0]), "Reserved", 0}, |
1421 | {ACPI_DMT_UINT24, ACPI_SPCR_OFFSET (Reserved[0]), "Reserved", 0}, |
| 1337 | {ACPI_DMT_GAS, ACPI_SPCR_OFFSET (SerialPort), "Serial Port Register", 0}, |
1422 | {ACPI_DMT_GAS, ACPI_SPCR_OFFSET (SerialPort), "Serial Port Register", 0}, |
| 1338 | {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (InterruptType), "Interrupt Type", 0}, |
1423 | {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (InterruptType), "Interrupt Type", 0}, |
| 1339 | {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PcInterrupt), "PCAT-compatible IRQ", 0}, |
1424 | {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PcInterrupt), "PCAT-compatible IRQ", 0}, |
| 1340 | {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (Interrupt), "Interrupt", 0}, |
1425 | {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (Interrupt), "Interrupt", 0}, |
| 1341 | {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (BaudRate), "Baud Rate", 0}, |
1426 | {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (BaudRate), "Baud Rate", 0}, |
| 1342 | {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (Parity), "Parity", 0}, |
1427 | {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (Parity), "Parity", 0}, |
| 1343 | {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (StopBits), "Stop Bits", 0}, |
1428 | {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (StopBits), "Stop Bits", 0}, |
| 1344 | {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (FlowControl), "Flow Control", 0}, |
1429 | {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (FlowControl), "Flow Control", 0}, |
| 1345 | {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (TerminalType), "Terminal Type", 0}, |
1430 | {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (TerminalType), "Terminal Type", 0}, |
| 1346 | {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (Reserved2), "Reserved", 0}, |
1431 | {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (Reserved2), "Reserved", 0}, |
| 1347 | {ACPI_DMT_UINT16, ACPI_SPCR_OFFSET (PciDeviceId), "PCI Device ID", 0}, |
1432 | {ACPI_DMT_UINT16, ACPI_SPCR_OFFSET (PciDeviceId), "PCI Device ID", 0}, |
| 1348 | {ACPI_DMT_UINT16, ACPI_SPCR_OFFSET (PciVendorId), "PCI Vendor ID", 0}, |
1433 | {ACPI_DMT_UINT16, ACPI_SPCR_OFFSET (PciVendorId), "PCI Vendor ID", 0}, |
| 1349 | {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciBus), "PCI Bus", 0}, |
1434 | {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciBus), "PCI Bus", 0}, |
| 1350 | {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciDevice), "PCI Device", 0}, |
1435 | {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciDevice), "PCI Device", 0}, |
| 1351 | {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciFunction), "PCI Function", 0}, |
1436 | {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciFunction), "PCI Function", 0}, |
| 1352 | {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (PciFlags), "PCI Flags", 0}, |
1437 | {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (PciFlags), "PCI Flags", 0}, |
| 1353 | {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciSegment), "PCI Segment", 0}, |
1438 | {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciSegment), "PCI Segment", 0}, |
| 1354 | {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (Reserved2), "Reserved", 0}, |
1439 | {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (Reserved2), "Reserved", 0}, |
| 1355 | ACPI_DMT_TERMINATOR |
1440 | ACPI_DMT_TERMINATOR |
| 1356 | }; |
1441 | }; |
| 1357 | 1442 | ||
| 1358 | 1443 | ||
| 1359 | /******************************************************************************* |
1444 | /******************************************************************************* |
| 1360 | * |
1445 | * |
| 1361 | * SPMI - Server Platform Management Interface table |
1446 | * SPMI - Server Platform Management Interface table |
| 1362 | * |
1447 | * |
| 1363 | ******************************************************************************/ |
1448 | ******************************************************************************/ |
| 1364 | 1449 | ||
| 1365 | ACPI_DMTABLE_INFO AcpiDmTableInfoSpmi[] = |
1450 | ACPI_DMTABLE_INFO AcpiDmTableInfoSpmi[] = |
| 1366 | { |
1451 | { |
| 1367 | {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (InterfaceType), "Interface Type", 0}, |
1452 | {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (InterfaceType), "Interface Type", 0}, |
| 1368 | {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved), "Reserved", 0}, |
1453 | {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved), "Reserved", 0}, |
| 1369 | {ACPI_DMT_UINT16, ACPI_SPMI_OFFSET (SpecRevision), "IPMI Spec Version", 0}, |
1454 | {ACPI_DMT_UINT16, ACPI_SPMI_OFFSET (SpecRevision), "IPMI Spec Version", 0}, |
| 1370 | {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (InterruptType), "Interrupt Type", 0}, |
1455 | {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (InterruptType), "Interrupt Type", 0}, |
| 1371 | {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (GpeNumber), "GPE Number", 0}, |
1456 | {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (GpeNumber), "GPE Number", 0}, |
| 1372 | {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved1), "Reserved", 0}, |
1457 | {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved1), "Reserved", 0}, |
| 1373 | {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciDeviceFlag), "PCI Device Flag", 0}, |
1458 | {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciDeviceFlag), "PCI Device Flag", 0}, |
| 1374 | {ACPI_DMT_UINT32, ACPI_SPMI_OFFSET (Interrupt), "Interrupt", 0}, |
1459 | {ACPI_DMT_UINT32, ACPI_SPMI_OFFSET (Interrupt), "Interrupt", 0}, |
| 1375 | {ACPI_DMT_GAS, ACPI_SPMI_OFFSET (IpmiRegister), "IPMI Register", 0}, |
1460 | {ACPI_DMT_GAS, ACPI_SPMI_OFFSET (IpmiRegister), "IPMI Register", 0}, |
| 1376 | {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciSegment), "PCI Segment", 0}, |
1461 | {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciSegment), "PCI Segment", 0}, |
| 1377 | {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciBus), "PCI Bus", 0}, |
1462 | {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciBus), "PCI Bus", 0}, |
| 1378 | {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciDevice), "PCI Device", 0}, |
1463 | {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciDevice), "PCI Device", 0}, |
| 1379 | {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciFunction), "PCI Function", 0}, |
1464 | {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciFunction), "PCI Function", 0}, |
| 1380 | {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved2), "Reserved", 0}, |
1465 | {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved2), "Reserved", 0}, |
| 1381 | ACPI_DMT_TERMINATOR |
1466 | ACPI_DMT_TERMINATOR |
| 1382 | }; |
1467 | }; |
| 1383 | 1468 | ||
| 1384 | 1469 | ||
| 1385 | /******************************************************************************* |
1470 | /******************************************************************************* |
| 1386 | * |
1471 | * |
| 1387 | * SRAT - System Resource Affinity Table and Subtables |
1472 | * SRAT - System Resource Affinity Table and Subtables |
| 1388 | * |
1473 | * |
| 1389 | ******************************************************************************/ |
1474 | ******************************************************************************/ |
| 1390 | 1475 | ||
| 1391 | ACPI_DMTABLE_INFO AcpiDmTableInfoSrat[] = |
1476 | ACPI_DMTABLE_INFO AcpiDmTableInfoSrat[] = |
| 1392 | { |
1477 | { |
| 1393 | {ACPI_DMT_UINT32, ACPI_SRAT_OFFSET (TableRevision), "Table Revision", 0}, |
1478 | {ACPI_DMT_UINT32, ACPI_SRAT_OFFSET (TableRevision), "Table Revision", 0}, |
| 1394 | {ACPI_DMT_UINT64, ACPI_SRAT_OFFSET (Reserved), "Reserved", 0}, |
1479 | {ACPI_DMT_UINT64, ACPI_SRAT_OFFSET (Reserved), "Reserved", 0}, |
| 1395 | ACPI_DMT_TERMINATOR |
1480 | ACPI_DMT_TERMINATOR |
| 1396 | }; |
1481 | }; |
| 1397 | 1482 | ||
| 1398 | /* Common Subtable header (one per Subtable) */ |
1483 | /* Common Subtable header (one per Subtable) */ |
| 1399 | 1484 | ||
| 1400 | ACPI_DMTABLE_INFO AcpiDmTableInfoSratHdr[] = |
1485 | ACPI_DMTABLE_INFO AcpiDmTableInfoSratHdr[] = |
| 1401 | { |
1486 | { |
| 1402 | {ACPI_DMT_SRAT, ACPI_SRATH_OFFSET (Type), "Subtable Type", 0}, |
1487 | {ACPI_DMT_SRAT, ACPI_SRATH_OFFSET (Type), "Subtable Type", 0}, |
| 1403 | {ACPI_DMT_UINT8, ACPI_SRATH_OFFSET (Length), "Length", DT_LENGTH}, |
1488 | {ACPI_DMT_UINT8, ACPI_SRATH_OFFSET (Length), "Length", DT_LENGTH}, |
| 1404 | ACPI_DMT_TERMINATOR |
1489 | ACPI_DMT_TERMINATOR |
| 1405 | }; |
1490 | }; |
| 1406 | 1491 | ||
| 1407 | /* SRAT Subtables */ |
1492 | /* SRAT Subtables */ |
| 1408 | 1493 | ||
| 1409 | /* 0: Processor Local APIC/SAPIC Affinity */ |
1494 | /* 0: Processor Local APIC/SAPIC Affinity */ |
| 1410 | 1495 | ||
| 1411 | ACPI_DMTABLE_INFO AcpiDmTableInfoSrat0[] = |
1496 | ACPI_DMTABLE_INFO AcpiDmTableInfoSrat0[] = |
| 1412 | { |
1497 | { |
| 1413 | {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (ProximityDomainLo), "Proximity Domain Low(8)", 0}, |
1498 | {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (ProximityDomainLo), "Proximity Domain Low(8)", 0}, |
| 1414 | {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (ApicId), "Apic ID", 0}, |
1499 | {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (ApicId), "Apic ID", 0}, |
| 1415 | {ACPI_DMT_UINT32, ACPI_SRAT0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, |
1500 | {ACPI_DMT_UINT32, ACPI_SRAT0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, |
| 1416 | {ACPI_DMT_FLAG0, ACPI_SRAT0_FLAG_OFFSET (Flags,0), "Enabled", 0}, |
1501 | {ACPI_DMT_FLAG0, ACPI_SRAT0_FLAG_OFFSET (Flags,0), "Enabled", 0}, |
| 1417 | {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (LocalSapicEid), "Local Sapic EID", 0}, |
1502 | {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (LocalSapicEid), "Local Sapic EID", 0}, |
| 1418 | {ACPI_DMT_UINT24, ACPI_SRAT0_OFFSET (ProximityDomainHi[0]), "Proximity Domain High(24)", 0}, |
1503 | {ACPI_DMT_UINT24, ACPI_SRAT0_OFFSET (ProximityDomainHi[0]), "Proximity Domain High(24)", 0}, |
| 1419 | {ACPI_DMT_UINT32, ACPI_SRAT0_OFFSET (Reserved), "Reserved", 0}, |
1504 | {ACPI_DMT_UINT32, ACPI_SRAT0_OFFSET (Reserved), "Reserved", 0}, |
| 1420 | ACPI_DMT_TERMINATOR |
1505 | ACPI_DMT_TERMINATOR |
| 1421 | }; |
1506 | }; |
| 1422 | 1507 | ||
| 1423 | /* 1: Memory Affinity */ |
1508 | /* 1: Memory Affinity */ |
| 1424 | 1509 | ||
| 1425 | ACPI_DMTABLE_INFO AcpiDmTableInfoSrat1[] = |
1510 | ACPI_DMTABLE_INFO AcpiDmTableInfoSrat1[] = |
| 1426 | { |
1511 | { |
| 1427 | {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (ProximityDomain), "Proximity Domain", 0}, |
1512 | {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (ProximityDomain), "Proximity Domain", 0}, |
| 1428 | {ACPI_DMT_UINT16, ACPI_SRAT1_OFFSET (Reserved), "Reserved", 0}, |
1513 | {ACPI_DMT_UINT16, ACPI_SRAT1_OFFSET (Reserved), "Reserved1", 0}, |
| 1429 | {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (BaseAddress), "Base Address", 0}, |
1514 | {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (BaseAddress), "Base Address", 0}, |
| 1430 | {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (Length), "Address Length", 0}, |
1515 | {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (Length), "Address Length", 0}, |
| 1431 | {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (Reserved1), "Reserved", 0}, |
1516 | {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (Reserved1), "Reserved2", 0}, |
| 1432 | {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, |
1517 | {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, |
| 1433 | {ACPI_DMT_FLAG0, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Enabled", 0}, |
1518 | {ACPI_DMT_FLAG0, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Enabled", 0}, |
| 1434 | {ACPI_DMT_FLAG1, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Hot Pluggable", 0}, |
1519 | {ACPI_DMT_FLAG1, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Hot Pluggable", 0}, |
| 1435 | {ACPI_DMT_FLAG2, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Non-Volatile", 0}, |
1520 | {ACPI_DMT_FLAG2, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Non-Volatile", 0}, |
| 1436 | {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (Reserved2), "Reserved", 0}, |
1521 | {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (Reserved2), "Reserved3", 0}, |
| 1437 | ACPI_DMT_TERMINATOR |
1522 | ACPI_DMT_TERMINATOR |
| 1438 | }; |
1523 | }; |
| 1439 | 1524 | ||
| 1440 | /* 2: Processor Local X2_APIC Affinity (ACPI 4.0) */ |
1525 | /* 2: Processor Local X2_APIC Affinity (ACPI 4.0) */ |
| 1441 | 1526 | ||
| 1442 | ACPI_DMTABLE_INFO AcpiDmTableInfoSrat2[] = |
1527 | ACPI_DMTABLE_INFO AcpiDmTableInfoSrat2[] = |
| 1443 | { |
1528 | { |
| 1444 | {ACPI_DMT_UINT16, ACPI_SRAT2_OFFSET (Reserved), "Reserved", 0}, |
1529 | {ACPI_DMT_UINT16, ACPI_SRAT2_OFFSET (Reserved), "Reserved1", 0}, |
| 1445 | {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (ProximityDomain), "Proximity Domain", 0}, |
1530 | {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (ProximityDomain), "Proximity Domain", 0}, |
| 1446 | {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (ApicId), "Apic ID", 0}, |
1531 | {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (ApicId), "Apic ID", 0}, |
| 1447 | {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, |
1532 | {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, |
| 1448 | {ACPI_DMT_FLAG0, ACPI_SRAT2_FLAG_OFFSET (Flags,0), "Enabled", 0}, |
1533 | {ACPI_DMT_FLAG0, ACPI_SRAT2_FLAG_OFFSET (Flags,0), "Enabled", 0}, |
| 1449 | {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (ClockDomain), "Clock Domain", 0}, |
1534 | {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (ClockDomain), "Clock Domain", 0}, |
| 1450 | {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (Reserved2), "Reserved", 0}, |
1535 | {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (Reserved2), "Reserved2", 0}, |
| 1451 | ACPI_DMT_TERMINATOR |
1536 | ACPI_DMT_TERMINATOR |
| 1452 | }; |
1537 | }; |
| 1453 | 1538 | ||
| 1454 | 1539 | ||
| 1455 | /******************************************************************************* |
1540 | /******************************************************************************* |
| 1456 | * |
1541 | * |
| 1457 | * TCPA - Trusted Computing Platform Alliance table |
1542 | * TCPA - Trusted Computing Platform Alliance table |
| 1458 | * |
1543 | * |
| 1459 | ******************************************************************************/ |
1544 | ******************************************************************************/ |
| 1460 | 1545 | ||
| 1461 | ACPI_DMTABLE_INFO AcpiDmTableInfoTcpa[] = |
1546 | ACPI_DMTABLE_INFO AcpiDmTableInfoTcpa[] = |
| 1462 | { |
1547 | { |
| 1463 | {ACPI_DMT_UINT16, ACPI_TCPA_OFFSET (Reserved), "Reserved", 0}, |
1548 | {ACPI_DMT_UINT16, ACPI_TCPA_OFFSET (Reserved), "Reserved", 0}, |
| 1464 | {ACPI_DMT_UINT32, ACPI_TCPA_OFFSET (MaxLogLength), "Max Event Log Length", 0}, |
1549 | {ACPI_DMT_UINT32, ACPI_TCPA_OFFSET (MaxLogLength), "Max Event Log Length", 0}, |
| 1465 | {ACPI_DMT_UINT64, ACPI_TCPA_OFFSET (LogAddress), "Event Log Address", 0}, |
1550 | {ACPI_DMT_UINT64, ACPI_TCPA_OFFSET (LogAddress), "Event Log Address", 0}, |
| 1466 | ACPI_DMT_TERMINATOR |
1551 | ACPI_DMT_TERMINATOR |
| 1467 | }; |
1552 | }; |
| 1468 | 1553 | ||
| 1469 | 1554 | ||
| 1470 | /******************************************************************************* |
1555 | /******************************************************************************* |
| 1471 | * |
1556 | * |
| 1472 | * UEFI - UEFI Boot optimization Table |
1557 | * UEFI - UEFI Boot optimization Table |
| 1473 | * |
1558 | * |
| 1474 | ******************************************************************************/ |
1559 | ******************************************************************************/ |
| 1475 | 1560 | ||
| 1476 | ACPI_DMTABLE_INFO AcpiDmTableInfoUefi[] = |
1561 | ACPI_DMTABLE_INFO AcpiDmTableInfoUefi[] = |
| 1477 | { |
1562 | { |
| 1478 | {ACPI_DMT_BUF16, ACPI_UEFI_OFFSET (Identifier[0]), "UUID Identifier", 0}, |
1563 | {ACPI_DMT_UUID, ACPI_UEFI_OFFSET (Identifier[0]), "UUID Identifier", 0}, |
| 1479 | {ACPI_DMT_UINT16, ACPI_UEFI_OFFSET (DataOffset), "Data Offset", 0}, |
1564 | {ACPI_DMT_UINT16, ACPI_UEFI_OFFSET (DataOffset), "Data Offset", 0}, |
| 1480 | ACPI_DMT_TERMINATOR |
1565 | ACPI_DMT_TERMINATOR |
| 1481 | }; |
1566 | }; |
| 1482 | 1567 | ||
| 1483 | 1568 | ||
| 1484 | /******************************************************************************* |
1569 | /******************************************************************************* |
| 1485 | * |
1570 | * |
| 1486 | * WAET - Windows ACPI Emulated devices Table |
1571 | * WAET - Windows ACPI Emulated devices Table |
| 1487 | * |
1572 | * |
| 1488 | ******************************************************************************/ |
1573 | ******************************************************************************/ |
| 1489 | 1574 | ||
| 1490 | ACPI_DMTABLE_INFO AcpiDmTableInfoWaet[] = |
1575 | ACPI_DMTABLE_INFO AcpiDmTableInfoWaet[] = |
| 1491 | { |
1576 | { |
| 1492 | {ACPI_DMT_UINT32, ACPI_WAET_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, |
1577 | {ACPI_DMT_UINT32, ACPI_WAET_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, |
| 1493 | {ACPI_DMT_FLAG0, ACPI_WAET_OFFSET (Flags), "RTC needs no INT ack", 0}, |
1578 | {ACPI_DMT_FLAG0, ACPI_WAET_OFFSET (Flags), "RTC needs no INT ack", 0}, |
| 1494 | {ACPI_DMT_FLAG1, ACPI_WAET_OFFSET (Flags), "PM timer, one read only", 0}, |
1579 | {ACPI_DMT_FLAG1, ACPI_WAET_OFFSET (Flags), "PM timer, one read only", 0}, |
| 1495 | ACPI_DMT_TERMINATOR |
1580 | ACPI_DMT_TERMINATOR |
| 1496 | }; |
1581 | }; |
| 1497 | 1582 | ||
| 1498 | 1583 | ||
| 1499 | /******************************************************************************* |
1584 | /******************************************************************************* |
| 1500 | * |
1585 | * |
| 1501 | * WDAT - Watchdog Action Table |
1586 | * WDAT - Watchdog Action Table |
| 1502 | * |
1587 | * |
| 1503 | ******************************************************************************/ |
1588 | ******************************************************************************/ |
| 1504 | 1589 | ||
| 1505 | ACPI_DMTABLE_INFO AcpiDmTableInfoWdat[] = |
1590 | ACPI_DMTABLE_INFO AcpiDmTableInfoWdat[] = |
| 1506 | { |
1591 | { |
| 1507 | {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (HeaderLength), "Header Length", DT_LENGTH}, |
1592 | {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (HeaderLength), "Header Length", DT_LENGTH}, |
| 1508 | {ACPI_DMT_UINT16, ACPI_WDAT_OFFSET (PciSegment), "PCI Segment", 0}, |
1593 | {ACPI_DMT_UINT16, ACPI_WDAT_OFFSET (PciSegment), "PCI Segment", 0}, |
| 1509 | {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciBus), "PCI Bus", 0}, |
1594 | {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciBus), "PCI Bus", 0}, |
| 1510 | {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciDevice), "PCI Device", 0}, |
1595 | {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciDevice), "PCI Device", 0}, |
| 1511 | {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciFunction), "PCI Function", 0}, |
1596 | {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciFunction), "PCI Function", 0}, |
| 1512 | {ACPI_DMT_UINT24, ACPI_WDAT_OFFSET (Reserved[0]), "Reserved", 0}, |
1597 | {ACPI_DMT_UINT24, ACPI_WDAT_OFFSET (Reserved[0]), "Reserved", 0}, |
| 1513 | {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (TimerPeriod), "Timer Period", 0}, |
1598 | {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (TimerPeriod), "Timer Period", 0}, |
| 1514 | {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (MaxCount), "Max Count", 0}, |
1599 | {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (MaxCount), "Max Count", 0}, |
| 1515 | {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (MinCount), "Min Count", 0}, |
1600 | {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (MinCount), "Min Count", 0}, |
| 1516 | {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, |
1601 | {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, |
| 1517 | {ACPI_DMT_FLAG0, ACPI_WDAT_OFFSET (Flags), "Enabled", 0}, |
1602 | {ACPI_DMT_FLAG0, ACPI_WDAT_OFFSET (Flags), "Enabled", 0}, |
| 1518 | {ACPI_DMT_FLAG7, ACPI_WDAT_OFFSET (Flags), "Stopped When Asleep", 0}, |
1603 | {ACPI_DMT_FLAG7, ACPI_WDAT_OFFSET (Flags), "Stopped When Asleep", 0}, |
| 1519 | {ACPI_DMT_UINT24, ACPI_WDAT_OFFSET (Reserved2[0]), "Reserved", 0}, |
1604 | {ACPI_DMT_UINT24, ACPI_WDAT_OFFSET (Reserved2[0]), "Reserved", 0}, |
| 1520 | {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (Entries), "Watchdog Entry Count", 0}, |
1605 | {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (Entries), "Watchdog Entry Count", 0}, |
| 1521 | ACPI_DMT_TERMINATOR |
1606 | ACPI_DMT_TERMINATOR |
| 1522 | }; |
1607 | }; |
| 1523 | 1608 | ||
| 1524 | /* WDAT Subtables - Watchdog Instruction Entries */ |
1609 | /* WDAT Subtables - Watchdog Instruction Entries */ |
| 1525 | 1610 | ||
| 1526 | ACPI_DMTABLE_INFO AcpiDmTableInfoWdat0[] = |
1611 | ACPI_DMTABLE_INFO AcpiDmTableInfoWdat0[] = |
| 1527 | { |
1612 | { |
| 1528 | {ACPI_DMT_UINT8, ACPI_WDAT0_OFFSET (Action), "Watchdog Action", 0}, |
1613 | {ACPI_DMT_UINT8, ACPI_WDAT0_OFFSET (Action), "Watchdog Action", 0}, |
| 1529 | {ACPI_DMT_UINT8, ACPI_WDAT0_OFFSET (Instruction), "Instruction", 0}, |
1614 | {ACPI_DMT_UINT8, ACPI_WDAT0_OFFSET (Instruction), "Instruction", 0}, |
| 1530 | {ACPI_DMT_UINT16, ACPI_WDAT0_OFFSET (Reserved), "Reserved", 0}, |
1615 | {ACPI_DMT_UINT16, ACPI_WDAT0_OFFSET (Reserved), "Reserved", 0}, |
| 1531 | {ACPI_DMT_GAS, ACPI_WDAT0_OFFSET (RegisterRegion), "Register Region", 0}, |
1616 | {ACPI_DMT_GAS, ACPI_WDAT0_OFFSET (RegisterRegion), "Register Region", 0}, |
| 1532 | {ACPI_DMT_UINT32, ACPI_WDAT0_OFFSET (Value), "Value", 0}, |
1617 | {ACPI_DMT_UINT32, ACPI_WDAT0_OFFSET (Value), "Value", 0}, |
| 1533 | {ACPI_DMT_UINT32, ACPI_WDAT0_OFFSET (Mask), "Register Mask", 0}, |
1618 | {ACPI_DMT_UINT32, ACPI_WDAT0_OFFSET (Mask), "Register Mask", 0}, |
| 1534 | ACPI_DMT_TERMINATOR |
1619 | ACPI_DMT_TERMINATOR |
| 1535 | }; |
1620 | }; |
| 1536 | 1621 | ||
| 1537 | 1622 | ||
| 1538 | /******************************************************************************* |
1623 | /******************************************************************************* |
| 1539 | * |
1624 | * |
| - | 1625 | * WDDT - Watchdog Description Table |
|
| - | 1626 | * |
|
| - | 1627 | ******************************************************************************/ |
|
| - | 1628 | ||
| - | 1629 | ACPI_DMTABLE_INFO AcpiDmTableInfoWddt[] = |
|
| - | 1630 | { |
|
| - | 1631 | {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (SpecVersion), "Specification Version", 0}, |
|
| - | 1632 | {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (TableVersion), "Table Version", 0}, |
|
| - | 1633 | {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (PciVendorId), "PCI Vendor ID", 0}, |
|
| - | 1634 | {ACPI_DMT_GAS, ACPI_WDDT_OFFSET (Address), "Timer Register", 0}, |
|
| - | 1635 | {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (MaxCount), "Max Count", 0}, |
|
| - | 1636 | {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (MinCount), "Min Count", 0}, |
|
| - | 1637 | {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (Period), "Period", 0}, |
|
| - | 1638 | {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (Status), "Status (decoded below)", 0}, |
|
| - | 1639 | ||
| - | 1640 | /* Status Flags byte 0 */ |
|
| - | 1641 | ||
| - | 1642 | {ACPI_DMT_FLAG0, ACPI_WDDT_FLAG_OFFSET (Status,0), "Available", 0}, |
|
| - | 1643 | {ACPI_DMT_FLAG1, ACPI_WDDT_FLAG_OFFSET (Status,0), "Active", 0}, |
|
| - | 1644 | {ACPI_DMT_FLAG2, ACPI_WDDT_FLAG_OFFSET (Status,0), "OS Owns", 0}, |
|
| - | 1645 | ||
| - | 1646 | /* Status Flags byte 1 */ |
|
| - | 1647 | ||
| - | 1648 | {ACPI_DMT_FLAG3, ACPI_WDDT_FLAG_OFFSET (Status,1), "User Reset", 0}, |
|
| - | 1649 | {ACPI_DMT_FLAG4, ACPI_WDDT_FLAG_OFFSET (Status,1), "Timeout Reset", 0}, |
|
| - | 1650 | {ACPI_DMT_FLAG5, ACPI_WDDT_FLAG_OFFSET (Status,1), "Power Fail Reset", 0}, |
|
| - | 1651 | {ACPI_DMT_FLAG6, ACPI_WDDT_FLAG_OFFSET (Status,1), "Unknown Reset", 0}, |
|
| - | 1652 | ||
| - | 1653 | {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (Capability), "Capability (decoded below)", 0}, |
|
| - | 1654 | ||
| - | 1655 | /* Capability Flags byte 0 */ |
|
| - | 1656 | ||
| - | 1657 | {ACPI_DMT_FLAG0, ACPI_WDDT_FLAG_OFFSET (Capability,0), "Auto Reset", 0}, |
|
| - | 1658 | {ACPI_DMT_FLAG1, ACPI_WDDT_FLAG_OFFSET (Capability,0), "Timeout Alert", 0}, |
|
| - | 1659 | ACPI_DMT_TERMINATOR |
|
| - | 1660 | }; |
|
| - | 1661 | ||
| - | 1662 | ||
| - | 1663 | /******************************************************************************* |
|
| - | 1664 | * |
|
| 1540 | * WDRT - Watchdog Resource Table |
1665 | * WDRT - Watchdog Resource Table |
| 1541 | * |
1666 | * |
| 1542 | ******************************************************************************/ |
1667 | ******************************************************************************/ |
| 1543 | 1668 | ||
| 1544 | ACPI_DMTABLE_INFO AcpiDmTableInfoWdrt[] = |
1669 | ACPI_DMTABLE_INFO AcpiDmTableInfoWdrt[] = |
| 1545 | { |
1670 | { |
| 1546 | {ACPI_DMT_GAS, ACPI_WDRT_OFFSET (ControlRegister), "Control Register", 0}, |
1671 | {ACPI_DMT_GAS, ACPI_WDRT_OFFSET (ControlRegister), "Control Register", 0}, |
| 1547 | {ACPI_DMT_GAS, ACPI_WDRT_OFFSET (CountRegister), "Count Register", 0}, |
1672 | {ACPI_DMT_GAS, ACPI_WDRT_OFFSET (CountRegister), "Count Register", 0}, |
| 1548 | {ACPI_DMT_UINT16, ACPI_WDRT_OFFSET (PciDeviceId), "PCI Device ID", 0}, |
1673 | {ACPI_DMT_UINT16, ACPI_WDRT_OFFSET (PciDeviceId), "PCI Device ID", 0}, |
| 1549 | {ACPI_DMT_UINT16, ACPI_WDRT_OFFSET (PciVendorId), "PCI Vendor ID", 0}, |
1674 | {ACPI_DMT_UINT16, ACPI_WDRT_OFFSET (PciVendorId), "PCI Vendor ID", 0}, |
| 1550 | {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciBus), "PCI Bus", 0}, |
1675 | {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciBus), "PCI Bus", 0}, |
| 1551 | {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciDevice), "PCI Device", 0}, |
1676 | {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciDevice), "PCI Device", 0}, |
| 1552 | {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciFunction), "PCI Function", 0}, |
1677 | {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciFunction), "PCI Function", 0}, |
| 1553 | {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciSegment), "PCI Segment", 0}, |
1678 | {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciSegment), "PCI Segment", 0}, |
| 1554 | {ACPI_DMT_UINT16, ACPI_WDRT_OFFSET (MaxCount), "Max Count", 0}, |
1679 | {ACPI_DMT_UINT16, ACPI_WDRT_OFFSET (MaxCount), "Max Count", 0}, |
| 1555 | {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (Units), "Counter Units", 0}, |
1680 | {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (Units), "Counter Units", 0}, |
| 1556 | ACPI_DMT_TERMINATOR |
1681 | ACPI_DMT_TERMINATOR |
| 1557 | }; |
1682 | }; |
| - | 1683 | ||
| - | 1684 | /* |
|
| - | 1685 | * Generic types (used in UEFI) |
|
| - | 1686 | * |
|
| - | 1687 | * Examples: |
|
| - | 1688 | * |
|
| - | 1689 | * Buffer : cc 04 ff bb |
|
| - | 1690 | * UINT8 : 11 |
|
| - | 1691 | * UINT16 : 1122 |
|
| - | 1692 | * UINT24 : 112233 |
|
| - | 1693 | * UINT32 : 11223344 |
|
| - | 1694 | * UINT56 : 11223344556677 |
|
| - | 1695 | * UINT64 : 1122334455667788 |
|
| - | 1696 | * |
|
| - | 1697 | * String : "This is string" |
|
| - | 1698 | * Unicode : "This string encoded to Unicode" |
|
| - | 1699 | * |
|
| - | 1700 | * GUID : 11223344-5566-7788-99aa-bbccddeeff00 |
|
| - | 1701 | * DevicePath : "\PciRoot(0)\Pci(0x1f,1)\Usb(0,0)" |
|
| - | 1702 | */ |
|
| - | 1703 | ||
| - | 1704 | #define ACPI_DM_GENERIC_ENTRY(FieldType, FieldName)\ |
|
| - | 1705 | {{FieldType, 0, FieldName, 0}, ACPI_DMT_TERMINATOR} |
|
| - | 1706 | ||
| - | 1707 | ACPI_DMTABLE_INFO AcpiDmTableInfoGeneric[][2] = |
|
| - | 1708 | { |
|
| - | 1709 | ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT8, "UINT8"), |
|
| - | 1710 | ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT16, "UINT16"), |
|
| - | 1711 | ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT24, "UINT24"), |
|
| - | 1712 | ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT32, "UINT32"), |
|
| - | 1713 | ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT56, "UINT56"), |
|
| - | 1714 | ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT64, "UINT64"), |
|
| - | 1715 | ACPI_DM_GENERIC_ENTRY (ACPI_DMT_STRING, "String"), |
|
| - | 1716 | ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UNICODE, "Unicode"), |
|
| - | 1717 | ACPI_DM_GENERIC_ENTRY (ACPI_DMT_BUFFER, "Buffer"), |
|
| - | 1718 | ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UUID, "GUID"), |
|
| - | 1719 | ACPI_DM_GENERIC_ENTRY (ACPI_DMT_STRING, "DevicePath"), |
|
| - | 1720 | ACPI_DM_GENERIC_ENTRY (ACPI_DMT_LABEL, "Label"), |
|
| - | 1721 | {ACPI_DMT_TERMINATOR} |
|
| - | 1722 | }; |
|