WebSVN – Kolibri OS – Diff – /drivers/audio/vt823x.asm


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;;                                                              ;;
;; Copyright (C) KolibriOS team 2004-2015. All rights reserved. ;;
;; Distributed under terms of the GNU General Public License    ;;
;;                                                              ;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
format PE DLL native 0.05
entry START
 
DEBUG           equ 1
 
API_VERSION     equ 0x01000100
 
 
IRQ_REMAP       equ 0
IRQ_LINE        equ 0
 
 
;irq 0,13 unavailable
;                   FEDCBA9876543210
 
 
 
 
 
VALID_IRQ       equ 1101111111111110b
 
CPU_FREQ        equ  2600d
 
BIT0  EQU 0x00000001
BIT1  EQU 0x00000002
BIT5  EQU 0x00000020
BIT10 EQU 0x00000400
 
VID_VIA           equ 0x1106
 
CTRL_VT82C686     equ 0x3058
CTRL_VT8233_5     equ 0x3059
 
 
CODEC_MASTER_VOL_REG         equ 0x02
CODEC_AUX_VOL                equ 0x04 ;
CODEC_PCM_OUT_REG            equ 0x18 ; PCM output volume
CODEC_EXT_AUDIO_REG          equ 0x28 ; extended audio
CODEC_EXT_AUDIO_CTRL_REG     equ 0x2a ; extended audio control
CODEC_PCM_FRONT_DACRATE_REG  equ 0x2c ; PCM out sample rate
CODEC_PCM_SURND_DACRATE_REG  equ 0x2e ; surround sound sample rate
CODEC_PCM_LFE_DACRATE_REG    equ 0x30 ; LFE sample rate
 
 
;VIA host controller registers set
;; common offsets
VIA_REG_OFFSET_STATUS        equ   0x00    ;; byte - channel status
  VIA_REG_STAT_ACTIVE              equ   0x80    ;; RO
  VIA_REG_STAT_PAUSED              equ   0x40    ;; RO
  VIA_REG_STAT_TRIGGER_QUEUED      equ   0x08    ;; RO
  VIA_REG_STAT_STOPPED             equ   0x04    ;; RWC
  VIA_REG_STAT_EOL                 equ   0x02    ;; RWC
  VIA_REG_STAT_FLAG                equ   0x01    ;; RWC
VIA_REG_OFFSET_CONTROL       equ   0x01    ;; byte - channel control
  VIA_REG_CTRL_START               equ   0x80    ;; WO
  VIA_REG_CTRL_TERMINATE           equ   0x40    ;; WO
  VIA_REG_CTRL_AUTOSTART           equ   0x20
  VIA_REG_CTRL_PAUSE               equ   0x08    ;; RW
  VIA_REG_CTRL_INT_STOP            equ   0x04
  VIA_REG_CTRL_INT_EOL             equ   0x02
  VIA_REG_CTRL_INT_FLAG            equ   0x01
  VIA_REG_CTRL_RESET               equ   0x01    ;; RW - probably reset? undocumented
  VIA_REG_CTRL_INT                 equ  (VIA_REG_CTRL_INT_FLAG or \
                                         VIA_REG_CTRL_INT_EOL or \
                                         VIA_REG_CTRL_AUTOSTART)
VIA_REG_OFFSET_TYPE          equ   0x02    ;; byte - channel type (686 only)
  VIA_REG_TYPE_AUTOSTART           equ   0x80    ;; RW - autostart at EOL
  VIA_REG_TYPE_16BIT               equ   0x20    ;; RW
  VIA_REG_TYPE_STEREO              equ   0x10    ;; RW
  VIA_REG_TYPE_INT_LLINE           equ   0x00
  VIA_REG_TYPE_INT_LSAMPLE         equ   0x04
  VIA_REG_TYPE_INT_LESSONE         equ   0x08
  VIA_REG_TYPE_INT_MASK            equ   0x0c
  VIA_REG_TYPE_INT_EOL             equ   0x02
  VIA_REG_TYPE_INT_FLAG            equ   0x01
VIA_REG_OFFSET_TABLE_PTR     equ   0x04    ;; dword - channel table pointer
VIA_REG_OFFSET_CURR_PTR      equ   0x04    ;; dword - channel current pointer
VIA_REG_OFFSET_STOP_IDX      equ   0x08    ;; dword - stop index, channel type, sample rate
  VIA8233_REG_TYPE_16BIT           equ   0x00200000      ;; RW
  VIA8233_REG_TYPE_STEREO          equ   0x00100000      ;; RW
VIA_REG_OFFSET_CURR_COUNT    equ   0x0c    ;; dword - channel current count (24 bit)
VIA_REG_OFFSET_CURR_INDEX    equ   0x0f    ;; byte - channel current index (for via8233 only)
 
 
VIADEV_PLAYBACK         equ   0x00
VIADEV_CAPTURE          equ   0x10
VIADEV_FM               equ   0x20
 
;; AC'97 ;;
VIA_REG_AC97             equ   0x80    ; dword
  VIA_REG_AC97_CODEC_ID_MASK       equ  0xC0000000 ;(3<<30)
  VIA_REG_AC97_CODEC_ID_SHIFT      equ  30
  VIA_REG_AC97_CODEC_ID_PRIMARY    equ  0x00
  VIA_REG_AC97_CODEC_ID_SECONDARY  equ  0x01
  VIA_REG_AC97_SECONDARY_VALID     equ  0x08000000 ;(1<<27)
  VIA_REG_AC97_PRIMARY_VALID       equ  0x02000000 ;(1<<25)
  VIA_REG_AC97_BUSY                equ  0x01000000 ;(1<<24)
  VIA_REG_AC97_READ                equ  0x00800000 ;(1<<23)
  VIA_REG_AC97_CMD_SHIFT           equ  16
  VIA_REG_AC97_CMD_MASK            equ  0x7E
  VIA_REG_AC97_DATA_SHIFT          equ  0
  VIA_REG_AC97_DATA_MASK           equ  0xFFFF
 
VIA_REG_SGD_SHADOW       equ   0x84    ; dword
 
;; via8233-specific registers ;;
VIA_REG_OFS_PLAYBACK_VOLUME_L   equ  0x02    ;; byte
VIA_REG_OFS_PLAYBACK_VOLUME_R   equ  0x03    ;; byte
VIA_REG_OFS_MULTPLAY_FORMAT     equ  0x02    ;; byte - format and channels
  VIA_REG_MULTPLAY_FMT_8BIT          equ  0x00
  VIA_REG_MULTPLAY_FMT_16BIT         equ  0x80
  VIA_REG_MULTPLAY_FMT_CH_MASK       equ  0x70    ;; # channels << 4 (valid = 1,2,4,6)
VIA_REG_OFS_CAPTURE_FIFO        equ  0x02    ;; byte - bit 6 = fifo  enable
  VIA_REG_CAPTURE_FIFO_ENABLE        equ  0x40
 
VIA_DXS_MAX_VOLUME              equ  31      ;; max. volume (attenuation) of reg 0x32/33
 
VIA_TBL_BIT_FLAG          equ   0x40000000
VIA_TBL_BIT_EOL           equ   0x80000000
 
;; pci space ;;
VIA_ACLINK_STAT           equ   0x40
  ;...
  VIA_ACLINK_C00_READY             equ   0x01 ; primary codec ready
VIA_ACLINK_CTRL           equ   0x41
  VIA_ACLINK_CTRL_ENABLE           equ   0x80 ; 0: disable, 1: enable
  VIA_ACLINK_CTRL_RESET            equ   0x40 ; 0: assert, 1: de-assert
  VIA_ACLINK_CTRL_SYNC             equ   0x20 ; 0: release SYNC, 1: force SYNC hi
  VIA_ACLINK_CTRL_SDO              equ   0x10 ; 0: release SDO, 1: force SDO hi
  VIA_ACLINK_CTRL_VRA              equ   0x08 ; 0: disable VRA, 1: enable VRA
  VIA_ACLINK_CTRL_PCM              equ   0x04 ; 0: disable PCM, 1: enable PCM
  VIA_ACLINK_CTRL_FM               equ   0x02 ; via686 only
  VIA_ACLINK_CTRL_SB               equ   0x01 ; via686 only
  VIA_ACLINK_CTRL_INIT             equ  (VIA_ACLINK_CTRL_ENABLE or \
                                         VIA_ACLINK_CTRL_RESET or \
                                         VIA_ACLINK_CTRL_PCM or \
                                         VIA_ACLINK_CTRL_VRA)
VIA_FUNC_ENABLE           equ   0x42
  VIA_FUNC_MIDI_PNP                equ   0x80 ; FIXME: it's 0x40 in the datasheet!
  VIA_FUNC_MIDI_IRQMASK            equ   0x40 ; FIXME: not documented!
  VIA_FUNC_RX2C_WRITE              equ   0x20
  VIA_FUNC_SB_FIFO_EMPTY           equ   0x10
  VIA_FUNC_ENABLE_GAME             equ   0x08
  VIA_FUNC_ENABLE_FM               equ   0x04
  VIA_FUNC_ENABLE_MIDI             equ   0x02
  VIA_FUNC_ENABLE_SB               equ   0x01
VIA_PNP_CONTROL           equ   0x43
VIA_FM_NMI_CTRL           equ   0x48
VIA8233_VOLCHG_CTRL       equ   0x48
VIA8233_SPDIF_CTRL        equ   0x49
  VIA8233_SPDIF_DX3                equ   0x08
  VIA8233_SPDIF_SLOT_MASK          equ   0x03
  VIA8233_SPDIF_SLOT_1011          equ   0x00
  VIA8233_SPDIF_SLOT_34            equ   0x01
  VIA8233_SPDIF_SLOT_78            equ   0x02
  VIA8233_SPDIF_SLOT_69            equ   0x03
;] Asper
 
 
SRV_GETVERSION        equ  0
DEV_PLAY              equ  1
DEV_STOP              equ  2
DEV_CALLBACK          equ  3
DEV_SET_BUFF          equ  4
DEV_NOTIFY            equ  5
DEV_SET_MASTERVOL     equ  6
DEV_GET_MASTERVOL     equ  7
DEV_GET_INFO          equ  8
DEV_GET_POS           equ  9
 
struc AC_CNTRL              ;AC controller base class
{ .bus                dd ?
  .devfn              dd ?
 
  .vendor             dd ?
  .dev_id             dd ?
  .pci_cmd            dd ?
  .pci_stat           dd ?
 
  .codec_io_base      dd ?
  .codec_mem_base     dd ?
 
  .ctrl_io_base       dd ?
  .ctrl_mem_base      dd ?
  .cfg_reg            dd ?
  .int_line           dd ?
 
  .vendor_ids         dd ?    ;vendor id string
  .ctrl_ids           dd ?    ;hub id string
 
  .buffer             dd ?
 
  .notify_pos         dd ?
  .notify_task        dd ?
 
  .lvi_reg            dd ?
  .ctrl_setup         dd ?
  .user_callback      dd ?
  .codec_read16       dd ?
  .codec_write16      dd ?
 
  .ctrl_read8         dd ?
  .ctrl_read16        dd ?
  .ctrl_read32        dd ?
 
  .ctrl_write8        dd ?
  .ctrl_write16       dd ?
  .ctrl_write32       dd ?
}
 
struc CODEC                ;Audio Chip base class
{
  .chip_id            dd ?
  .flags              dd ?
  .status             dd ?
 
  .ac_vendor_ids      dd ?    ;ac vendor id string
  .chip_ids           dd ?    ;chip model string
 
  .shadow_flag        dd ?
                      dd ?
 
  .regs               dw ?     ; codec registers
  .reg_master_vol     dw ?     ;0x02
  .reg_aux_out_vol    dw ?     ;0x04
  .reg_mone_vol       dw ?     ;0x06
  .reg_master_tone    dw ?     ;0x08
  .reg_beep_vol       dw ?     ;0x0A
  .reg_phone_vol      dw ?     ;0x0C
  .reg_mic_vol        dw ?     ;0x0E
  .reg_line_in_vol    dw ?     ;0x10
  .reg_cd_vol         dw ?     ;0x12
  .reg_video_vol      dw ?     ;0x14
  .reg_aux_in_vol     dw ?     ;0x16
  .reg_pcm_out_vol    dw ?     ;0x18
  .reg_rec_select     dw ?     ;0x1A
  .reg_rec_gain       dw ?     ;0x1C
  .reg_rec_gain_mic   dw ?     ;0x1E
  .reg_gen            dw ?     ;0x20
  .reg_3d_ctrl        dw ?     ;0X22
  .reg_page           dw ?     ;0X24
  .reg_powerdown      dw ?     ;0x26
  .reg_ext_audio      dw ?     ;0x28
  .reg_ext_st         dw ?     ;0x2a
  .reg_pcm_front_rate dw ?     ;0x2c
  .reg_pcm_surr_rate  dw ?     ;0x2e
  .reg_lfe_rate       dw ?     ;0x30
  .reg_pcm_in_rate    dw ?     ;0x32
                      dw ?     ;0x34
  .reg_cent_lfe_vol   dw ?     ;0x36
  .reg_surr_vol       dw ?     ;0x38
  .reg_spdif_ctrl     dw ?     ;0x3A
                      dw ?     ;0x3C
                      dw ?     ;0x3E
                      dw ?     ;0x40
                      dw ?     ;0x42
                      dw ?     ;0x44
                      dw ?     ;0x46
                      dw ?     ;0x48
                      dw ?     ;0x4A
                      dw ?     ;0x4C
                      dw ?     ;0x4E
                      dw ?     ;0x50
                      dw ?     ;0x52
                      dw ?     ;0x54
                      dw ?     ;0x56
                      dw ?     ;0x58
                      dw ?     ;0x5A
                      dw ?     ;0x5C
                      dw ?     ;0x5E
  .reg_page_0         dw ?     ;0x60
  .reg_page_1         dw ?     ;0x62
  .reg_page_2         dw ?     ;0x64
  .reg_page_3         dw ?     ;0x66
  .reg_page_4         dw ?     ;0x68
  .reg_page_5         dw ?     ;0x6A
  .reg_page_6         dw ?     ;0x6C
  .reg_page_7         dw ?     ;0x6E
                      dw ?     ;0x70
                      dw ?     ;0x72
                      dw ?     ;0x74
                      dw ?     ;0x76
                      dw ?     ;0x78
                      dw ?     ;0x7A
  .reg_vendor_id_1    dw ?     ;0x7C
  .reg_vendor_id_2    dw ?     ;0x7E
 
 
  .reset              dd ?    ;virtual
  .set_master_vol     dd ?
}
 
struc CTRL_INFO
{   .pci_cmd          dd ?
    .irq              dd ?
    .glob_cntrl       dd ?
    .glob_sta         dd ?
    .codec_io_base    dd ?
    .ctrl_io_base     dd ?
    .codec_mem_base   dd ?
    .ctrl_mem_base    dd ?
    .codec_id         dd ?
}
 
EVENT_NOTIFY    equ 0x00000200
 
section '.flat' code readable writable executable
include '../struct.inc'
include '../macros.inc'
include '../proc32.inc'
include '../peimport.inc'
 
proc START c, state:dword, cmdline:dword
 
        cmp     [state], 1
        jne     .stop
 
     if DEBUG
        mov     esi, msgInit
        invoke  SysMsgBoardStr
     end if
 
        call    detect_controller
        test    eax, eax
        jz      .fail
 
     if DEBUG
        mov     esi, [ctrl.vendor_ids]
        invoke  SysMsgBoardStr
        mov     esi, [ctrl.ctrl_ids]
        invoke  SysMsgBoardStr
     end if
 
        call    init_controller
        test    eax, eax
        jz      .fail
 
        call    init_codec
        test    eax, eax
        jz      .fail
 
        call    setup_codec
 
        mov     esi, msgPrimBuff
        invoke  SysMsgBoardStr
        call    create_primary_buff
        mov     esi, msgDone
        invoke  SysMsgBoardStr
 
  if IRQ_REMAP
        pushf
        cli
 
        mov     ebx, [ctrl.int_line]
        in      al, 0xA1
        mov     ah, al
        in      al, 0x21
        test    ebx, ebx
        jz      .skip
        bts     ax, bx                          ;mask old line
.skip:
        bts     ax, IRQ_LINE                    ;mask new ine
        out     0x21, al
        mov     al, ah
        out     0xA1, al
 
        invoke  PciWrite8, 0, 0xF8, 0x61, IRQ_LINE      ;remap IRQ
 
        mov     dx, 0x4d0                       ;8259 ELCR1
        in      al, dx
        bts     ax, IRQ_LINE
        out     dx, al                          ;set level-triggered mode
        mov     [ctrl.int_line], IRQ_LINE
        popf
        mov     esi, msgRemap
        invoke  SysMsgBoardStr
  end if
 
        mov     eax, VALID_IRQ
        mov     ebx, [ctrl.int_line]
        mov     esi, msgInvIRQ
        bt      eax, ebx
        jnc     .fail_msg
 
 
 
 
 
        invoke  AttachIntHandler, ebx, ac97_irq_VIA, 0
.reg:
        invoke  RegService, sz_sound_srv, service_proc
        ret
.fail:
     if DEBUG
        mov     esi, msgFail
        invoke  SysMsgBoardStr
     end if
        xor     eax, eax
        ret
.fail_msg:
        invoke  SysMsgBoardStr
        xor     eax, eax
        ret
.stop:
        call    stop
        xor     eax, eax
        ret
endp
 
handle     equ  IOCTL.handle
io_code    equ  IOCTL.io_code
input      equ  IOCTL.input
inp_size   equ  IOCTL.inp_size
output     equ  IOCTL.output
out_size   equ  IOCTL.out_size
 
align 4
proc service_proc stdcall, ioctl:dword
 
        mov     edi, [ioctl]
        mov     eax, [edi+io_code]
 
        cmp     eax, SRV_GETVERSION
        jne     @F
        mov     eax, [edi+output]
        cmp     [edi+out_size], 4
        jne     .fail
 
        mov     [eax], dword API_VERSION
        xor     eax, eax
        ret
@@:
        cmp     eax, DEV_PLAY
        jne     @F
     if DEBUG
        mov     esi, msgPlay
        invoke  SysMsgBoardStr
     end if
        call    play
        ret
@@:
        cmp     eax, DEV_STOP
        jne     @F
     if DEBUG
        mov     esi, msgStop
        invoke  SysMsgBoardStr
     end if
        call    stop
        ret
@@:
        cmp     eax, DEV_CALLBACK
        jne     @F
        mov     ebx, [edi+input]
        stdcall set_callback, [ebx]
        ret
@@:
        cmp     eax, DEV_SET_MASTERVOL
        jne     @F
        mov     eax, [edi+input]
        mov     eax, [eax]
        call    set_master_vol          ;eax= vol
        ret
@@:
        cmp     eax, DEV_GET_MASTERVOL
        jne     @F
        mov     ebx, [edi+output]
        stdcall get_master_vol, ebx
        ret
@@:
        cmp     eax, DEV_GET_INFO
        jne     @F
        mov     ebx, [edi+output]
        stdcall get_dev_info, ebx
        ret
@@:
        cmp     eax, DEV_GET_POS
        jne     @F
        push    ebx  edx
        mov     edx, VIADEV_PLAYBACK + VIA_REG_OFFSET_CURR_COUNT
        call    [ctrl.ctrl_read32]
        and     eax, 0x00FFFFFF
        mov     ebx, 4096
        sub     ebx, eax
        shr     ebx, 2
        mov     edx, [edi+output]
        mov     [edx], ebx
        pop     edx ebx
        ret
@@:
.fail:
        or      eax, -1
        ret
endp
 
restore   handle
restore   io_code
restore   input
restore   inp_size
restore   output
restore   out_size
 
 
align 4
proc ac97_irq_VIA
           locals
             status db 0
           endl
 
        mov     edx, VIADEV_PLAYBACK +VIA_REG_OFFSET_STATUS
        call    [ctrl.ctrl_read8]
        test    al, VIA_REG_STAT_ACTIVE
        jz      @f
 
        and     al, VIA_REG_STAT_EOL or VIA_REG_STAT_FLAG or VIA_REG_STAT_STOPPED
        mov     byte [status], al
 
        mov     ebx, dword [buff_list]
        cmp     [ctrl.user_callback], 0
        je      @f
        stdcall [ctrl.user_callback], ebx
       @@:
        mov     al, byte [status]               ;; ack ;;
        mov     edx, VIADEV_PLAYBACK +VIA_REG_OFFSET_STATUS
        call    [ctrl.ctrl_write8]
 
        ret
endp
 
 
align 4
proc create_primary_buff
 
        invoke  KernelAlloc, 0x10000
        mov     [ctrl.buffer], eax
 
        mov     edi, eax
        mov     ecx, 0x10000/4
        xor     eax, eax
        cld
        rep stosd
 
        mov     eax, [ctrl.buffer]
        invoke  GetPgAddr
        mov     edi, pcmout_bdl
        stosd
        mov     eax, 0x80004000
        stosd
 
        mov     edi, buff_list
        mov     eax, [ctrl.buffer]
        mov     ecx, 4
@@:
        mov     [edi], eax
        mov     [edi+16], eax
        mov     [edi+32], eax
        mov     [edi+48], eax
        mov     [edi+64], eax
        mov     [edi+80], eax
        mov     [edi+96], eax
        mov     [edi+112], eax
 
           ;add      eax, 0x4000
        add     edi, 4
        loop    @B
 
        stdcall channel_reset, VIADEV_PLAYBACK
        stdcall codec_check_ready
 
        mov     eax, pcmout_bdl
        mov     ebx, eax
        invoke  GetPgAddr
        and     ebx, 0xFFF
        add     eax, ebx
 
        mov     edx, VIADEV_PLAYBACK +VIA_REG_OFFSET_TABLE_PTR
        call    [ctrl.ctrl_write32]
 
        stdcall codec_check_ready
 
        mov     edx, VIADEV_PLAYBACK +VIA_REG_OFS_PLAYBACK_VOLUME_L
        mov     eax, 7    ;31
        call    [ctrl.ctrl_write8]
 
        mov     edx, VIADEV_PLAYBACK +VIA_REG_OFS_PLAYBACK_VOLUME_R
        mov     eax, 7    ;31
        call    [ctrl.ctrl_write8]
 
        mov     edx, VIADEV_PLAYBACK +VIA_REG_OFFSET_STOP_IDX
        mov     eax, VIA8233_REG_TYPE_16BIT or VIA8233_REG_TYPE_STEREO or 0xfffff or 0xff000000
        mov     [ctrl.lvi_reg], 16  ;0xF;eax
        call    [ctrl.ctrl_write32]
 
        stdcall codec_check_ready
        ret
endp
 
 
proc channel_reset channel:dword
        mov     esi, dword [channel]
        mov     edx, esi
        add     edx, VIA_REG_OFFSET_CONTROL
        mov     eax, VIA_REG_CTRL_PAUSE or VIA_REG_CTRL_TERMINATE or VIA_REG_CTRL_RESET
        call    [ctrl.ctrl_write8]
 
        mov     edx, esi
        add     edx, VIA_REG_OFFSET_CONTROL
        call    [ctrl.ctrl_read8]
 
        mov     eax, 50000       ; wait 50 ms
        call    StallExec
           ; disable interrupts
        mov     edx, esi
        add     edx, VIA_REG_OFFSET_CONTROL
        xor     eax, eax
        call    [ctrl.ctrl_write8]
 
           ; clear interrupts
        mov     edx, esi
        add     edx, VIA_REG_OFFSET_STATUS
        mov     eax, 0x03
        call    [ctrl.ctrl_write8]
 
        ;outb(0x00, VIADEV_REG(viadev, OFFSET_TYPE)); /* for via686 */
          ; mov      edx, esi                  ;; for via686
          ; add      edx, VIA_REG_OFFSET_TYPE
          ; mov      eax, 0x03
          ; call     [ctrl.ctrl_write8]
 
        ;; outl(0, VIADEV_REG(viadev, OFFSET_CURR_PTR));
           ;mov      edx, esi
           ;add      edx, VIA_REG_OFFSET_CURR_PTR
           ;xor      eax, eax
           ;call     [ctrl.ctrl_write8]
 
        ret
endp
 
 
align 4
proc detect_controller
           locals
             last_bus dd ?
             bus      dd ?
             devfn    dd ?
           endl
 
        xor     eax, eax
        mov     [bus], eax
        inc     eax
        invoke  PciApi
        cmp     eax, -1
        je      .err
 
        mov     [last_bus], eax
 
.next_bus:
        and     [devfn], 0
.next_dev:
        invoke  PciRead32, [bus], [devfn], dword 0
        test    eax, eax
        jz      .next
        cmp     eax, -1
        je      .next
 
        mov     edi, devices
@@:
        mov     ebx, [edi]
        test    ebx, ebx
        jz      .next
 
        cmp     eax, ebx
        je      .found
        add     edi, 12
        jmp     @B
.next:
        inc     [devfn]
        cmp     [devfn], 256
        jb      .next_dev
        mov     eax, [bus]
        inc     eax
        mov     [bus], eax
        cmp     eax, [last_bus]
        jna     .next_bus
        xor     eax, eax
        ret
.found:
        mov     ebx, [bus]
        mov     [ctrl.bus], ebx
 
        mov     ecx, [devfn]
        mov     [ctrl.devfn], ecx
 
        mov     edx, eax
        and     edx, 0xFFFF
        mov     [ctrl.vendor], edx
        shr     eax, 16
        mov     [ctrl.dev_id], eax
 
        mov     ebx, [edi+4]
        mov     [ctrl.ctrl_ids], ebx
        mov     esi, [edi+8]
        mov     [ctrl.ctrl_setup], esi
 
        cmp     edx, VID_VIA
        jne     @F
        mov     [ctrl.vendor_ids], msg_VIA
        ret
@@:
 
.err:
        xor     eax, eax
        mov     [ctrl.vendor_ids], eax    ;something  wrong ?
        ret
endp
 
align 4
proc init_controller
 
        invoke  PciRead32, [ctrl.bus], [ctrl.devfn], dword 4
        mov     ebx, eax
        and     eax, 0xFFFF
        mov     [ctrl.pci_cmd], eax
        shr     ebx, 16
        mov     [ctrl.pci_stat], ebx
 
        mov     esi, msgPciCmd
        invoke  SysMsgBoardStr
        call    dword2str
        invoke  SysMsgBoardStr
 
        mov     esi, msgPciStat
        invoke  SysMsgBoardStr
        mov     eax, [ctrl.pci_stat]
        call    dword2str
        invoke  SysMsgBoardStr
 
        mov     esi, msgCtrlIsaIo
        invoke  SysMsgBoardStr
        invoke  PciRead32, [ctrl.bus], [ctrl.devfn], dword 0x10
        call    dword2str
        invoke  SysMsgBoardStr
 
        and     eax, 0xFFC0
        mov     [ctrl.ctrl_io_base], eax
 
.default:
        invoke  PciRead32, [ctrl.bus], [ctrl.devfn], dword 0x3C
        and     eax, 0xFF
@@:
        mov     [ctrl.int_line], eax
 
           ;stdcall  PciRead8, [ctrl.bus], [ctrl.devfn], dword VIA_FUNC_ENABLE ;0x42
           ;mov      byte [old_legacy], al
 
           ;stdcall  PciRead8, [ctrl.bus], [ctrl.devfn], dword VIA_PNP_CONTROL ;0x43
           ;mov      byte [old_legacy_cfg], al
 
           ;mov      al, VIA_FUNC_ENABLE_SB or VIA_FUNC_ENABLE_FM
           ;xor      al, 0xFF
           ;and      al, byte [old_legacy]
           ;and      eax, 0xFF
           ;stdcall  PciWrite8, [ctrl.bus], [ctrl.devfn], dword VIA_FUNC_ENABLE, eax ;0x42
           ;mov      byte [old_legacy], al
 
        call    [ctrl.ctrl_setup]
        xor     eax, eax
        inc     eax
        ret
endp
 
align 4
proc set_VIA
        mov     [ctrl.codec_read16], codec_io_r16         ;virtual
        mov     [ctrl.codec_write16], codec_io_w16        ;virtual
 
        mov     [ctrl.ctrl_read8 ], ctrl_io_r8            ;virtual
        mov     [ctrl.ctrl_read16], ctrl_io_r16           ;virtual
        mov     [ctrl.ctrl_read32], ctrl_io_r32           ;virtual
 
        mov     [ctrl.ctrl_write8 ], ctrl_io_w8           ;virtual
        mov     [ctrl.ctrl_write16], ctrl_io_w16          ;virtual
        mov     [ctrl.ctrl_write32], ctrl_io_w32          ;virtual
        ret
endp
 
 
align 4
proc init_codec
           locals
             counter dd ?
           endl
 
        mov     esi, msgControl
        invoke  SysMsgBoardStr
        invoke  PciRead8, [ctrl.bus], [ctrl.devfn], dword VIA_ACLINK_CTRL
        and     eax, 0xFF
        call    dword2str
        invoke  SysMsgBoardStr
 
        mov     esi, msgStatus
        invoke  SysMsgBoardStr
        invoke  PciRead8, [ctrl.bus], [ctrl.devfn], dword VIA_ACLINK_STAT
        and     eax, 0xFF
        push    eax
        call    dword2str
        invoke  SysMsgBoardStr
        pop     eax
 
        test    eax, VIA_ACLINK_C00_READY
        jnz     .ready
 
        call    reset_codec
        test    eax, eax
        jz      .err
 
.ready:
        xor     edx, edx         ; ac_reg_0
        call    [ctrl.codec_write16]
        jmp     .done
 
.err:
        xor     eax, eax              ; timeout error
        ret
 
.done:
        call    detect_codec
 
        xor     eax, eax
        inc     eax
        ret
endp
 
align 4
proc reset_codec
        invoke  PciWrite8, [ctrl.bus], [ctrl.devfn], dword VIA_ACLINK_CTRL, \
                VIA_ACLINK_CTRL_ENABLE or VIA_ACLINK_CTRL_RESET or VIA_ACLINK_CTRL_SYNC
        mov     eax, 100000        ; wait 100 ms
        call    StallExec
.cold:
        call    cold_reset
        jnc     .ok
 
     if DEBUG
        mov     esi, msgCFail
        invoke  SysMsgBoardStr
     end if
        xor     eax, eax         ; timeout error
        ret
.ok:
     if DEBUG
        mov     esi, msgResetOk
        invoke  SysMsgBoardStr
     end if
        xor     eax, eax
        inc     eax
        ret
endp
 
 
align 4
proc cold_reset
           locals
             counter dd ?
           endl
 
        invoke  PciWrite8, [ctrl.bus], [ctrl.devfn], dword VIA_ACLINK_CTRL, dword 0
 
     if DEBUG
        mov     esi, msgCold
        invoke  SysMsgBoardStr
     end if
 
        mov     eax, 100000         ; wait 100 ms ;400000     ; wait 400 ms
        call    StallExec
 
           ;; ACLink on, deassert ACLink reset, VSR, SGD data out
           ;; note - FM data out has trouble with non VRA codecs !!
        invoke  PciWrite8, [ctrl.bus], [ctrl.devfn], dword VIA_ACLINK_CTRL, dword VIA_ACLINK_CTRL_INIT
 
        mov     [counter], 16        ; total 20*100 ms = 2s
.wait:
        invoke  PciRead8, [ctrl.bus], [ctrl.devfn], dword VIA_ACLINK_STAT
        test    eax, VIA_ACLINK_C00_READY
        jnz     .ok
 
        mov     eax, 100000        ; wait 100 ms
        call    StallExec
 
        dec     [counter]
        jnz     .wait
 
     if DEBUG
        mov     esi, msgCRFail
        invoke  SysMsgBoardStr
     end if
 
.fail:
        stc
        ret
.ok:
        mov     esi, msgControl
        invoke  SysMsgBoardStr
        invoke  PciRead8, [ctrl.bus], [ctrl.devfn], dword VIA_ACLINK_CTRL
        call    dword2str
        invoke  SysMsgBoardStr
 
        mov     esi, msgStatus
        invoke  SysMsgBoardStr
        invoke  PciRead8, [ctrl.bus], [ctrl.devfn], dword VIA_ACLINK_STAT
        and     eax, 0xFF
        push    eax
        call    dword2str
        invoke  SysMsgBoardStr
        pop     eax
 
        test    eax, VIA_ACLINK_C00_READY     ;CTRL_ST_CREADY
        jz      .fail
        clc
        ret
endp
 
align 4
play:
        mov     edx, VIADEV_PLAYBACK +VIA_REG_OFFSET_STOP_IDX
        mov     eax, VIA8233_REG_TYPE_16BIT or VIA8233_REG_TYPE_STEREO or 0xfffff or 0xff000000
        mov     [ctrl.lvi_reg], 16
        call    [ctrl.ctrl_write32]
 
        mov     eax, VIA_REG_CTRL_INT
        or      eax, VIA_REG_CTRL_START
        mov     edx, VIADEV_PLAYBACK +VIA_REG_OFFSET_CONTROL
        call    [ctrl.ctrl_write8]
 
        xor     eax, eax
        ret
 
align 4
stop:
        mov     eax, VIA_REG_CTRL_INT
        or      eax, VIA_REG_CTRL_TERMINATE
        mov     edx, VIADEV_PLAYBACK +VIA_REG_OFFSET_CONTROL
        call    [ctrl.ctrl_write8]
 
        stdcall channel_reset, VIADEV_PLAYBACK
        xor     eax, eax
        ret
 
align 4
proc get_dev_info stdcall, p_info:dword
           virtual at esi
             CTRL_INFO CTRL_INFO
           end virtual
 
        mov     esi, [p_info]
        mov     eax, [ctrl.int_line]
        mov     ecx, [ctrl.ctrl_io_base]
        mov     [CTRL_INFO.irq], eax
        mov     [CTRL_INFO.ctrl_io_base], ecx
 
        xor     eax, eax
           ;mov      edx, VIADEV_PLAYBACK   +VIA_REG_OFFSET_TABLE_PTR
           ;call     [ctrl.ctrl_read32]
        mov     [CTRL_INFO.codec_io_base], eax
           ;mov      edx, VIADEV_PLAYBACK   +VIA_REG_OFFSET_STOP_IDX
           ;call     [ctrl.ctrl_read32]
        mov     [CTRL_INFO.codec_mem_base], eax
           ;mov      edx, VIADEV_PLAYBACK   +VIA_REG_OFFSET_CURR_COUNT
           ;call     [ctrl.ctrl_read32]
        mov     [CTRL_INFO.ctrl_mem_base], eax
 
        mov     eax, [codec.chip_id]
        mov     [CTRL_INFO.codec_id], eax
 
        mov     edx, VIADEV_PLAYBACK +VIA_REG_OFFSET_CONTROL
        call    [ctrl.ctrl_read8]
        and     eax, 0xFF
        mov     [CTRL_INFO.glob_cntrl], eax
 
        mov     edx, VIADEV_PLAYBACK +VIA_REG_OFFSET_STATUS
        call    [ctrl.ctrl_read8]
        and     eax, 0xFF
        mov     [CTRL_INFO.glob_sta], eax
 
        mov     ebx, [ctrl.pci_cmd]
        mov     [CTRL_INFO.pci_cmd], ebx
        ret
endp
 
align 4
proc set_callback stdcall, handler:dword
        mov     eax, [handler]
        mov     [ctrl.user_callback], eax
        ret
endp
 
 
align 4
proc codec_check_ready stdcall
           locals
             counter dd ?
           endl
 
        mov     [counter], 1000         ; total 1000*1 ms = 1s
.wait:
        call    [ctrl.codec_read16]
        test    eax, VIA_REG_AC97_BUSY
        jz      .ok
 
        mov     eax, 1000       ; wait 1 ms
        call    StallExec
 
        sub     [counter] , 1
        jnz     .wait
.err:
        mov     eax, -1
        ret
.ok:
        and     eax, 0xFFFF
        ret
endp
 
 
align 4
proc codec_valid stdcall
        stdcall codec_check_ready
        ret
endp
 
align 4
proc codec_read stdcall, ac_reg:dword      ; reg = edx, reval = eax
           locals
             counter dd ?
           endl
 
           ;Use only primary codec.
        mov     eax, [ac_reg]
        and     eax, 0x7F
        shl     eax, VIA_REG_AC97_CMD_SHIFT
        or      eax, VIA_REG_AC97_PRIMARY_VALID or VIA_REG_AC97_READ
 
        mov     [counter], 3         ; total 3*20 ms = 60ms
.wait:
        push    eax
        call    [ctrl.codec_write16]
 
        mov     eax, 20000       ; wait 20 ms
        call    StallExec
 
        stdcall codec_valid
        cmp     eax, 0
        pop     eax
        jge     .ok
 
        sub     [counter] , 1
        jnz     .wait
        jmp     .err
 
.ok:
        mov     eax, 25000       ; wait 25 ms
        call    StallExec
 
        call    [ctrl.codec_read16]      ;change edx !!!
        and     eax, 0xFFFF
        ret
.err:
     if DEBUG
        mov     esi, msgCInvalid
        invoke  SysMsgBoardStr
     end if
        mov     eax, -1            ; invalid codec error
        ret
endp
 
align 4
proc codec_write stdcall, ac_reg:dword
           ;Use only primary codec.
        mov     esi, [ac_reg]
        mov     edx, esi
        shl     edx, VIA_REG_AC97_CMD_SHIFT
 
        shl     eax, VIA_REG_AC97_DATA_SHIFT
        or      edx, eax
 
        mov     eax, VIA_REG_AC97_CODEC_ID_PRIMARY     ;not VIA_REG_AC97_CODEC_ID_PRIMARY
        shl     eax, VIA_REG_AC97_CODEC_ID_SHIFT
        or      edx, eax
 
        mov     eax, edx
        mov     edx, esi
        call    [ctrl.codec_write16]
        mov     [codec.regs+esi], ax
 
        stdcall codec_check_ready
        cmp     eax, 0
        jl      .err
.ok:
        ret
.err:
     if DEBUG
        mov     esi, msgCFail
        invoke  SysMsgBoardStr
     end if
           ;mov      eax, -1        ; codec not ready error
        ret
endp
 
align 4
proc StallExec
        push    ecx
        push    edx
        push    ebx
        push    eax
 
        mov     ecx, CPU_FREQ
        mul     ecx
        mov     ebx, eax           ;low
        mov     ecx, edx           ;high
        rdtsc
        add     ebx, eax
        adc     ecx, edx
@@:
        rdtsc
        sub     eax, ebx
        sbb     edx, ecx
        js      @B
 
        pop     eax
        pop     ebx
        pop     edx
        pop     ecx
        ret
endp
 
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;          CONTROLLER IO functions
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
align 4
proc codec_io_r16 ;r32
        mov     edx, [ctrl.ctrl_io_base]
        add     edx, VIA_REG_AC97
        in      eax, dx
        ret
endp
 
align 4
proc codec_io_w16 ;w32
        mov     edx, [ctrl.ctrl_io_base]
        add     edx, VIA_REG_AC97
        out     dx, eax
        ret
endp
 
align 4
proc ctrl_io_r8
        add     edx, [ctrl.ctrl_io_base]
        in      al, dx
        ret
endp
 
align 4
proc ctrl_io_r16
        add     edx, [ctrl.ctrl_io_base]
        in      ax, dx
        ret
endp
 
align 4
proc ctrl_io_r32
        add     edx, [ctrl.ctrl_io_base]
        in      eax, dx
        ret
endp
 
align 4
proc ctrl_io_w8
        add     edx, [ctrl.ctrl_io_base]
        out     dx, al
        ret
endp
 
align 4
proc ctrl_io_w16
        add     edx, [ctrl.ctrl_io_base]
        out     dx, ax
        ret
endp
 
align 4
proc ctrl_io_w32
        add     edx, [ctrl.ctrl_io_base]
        out     dx, eax
        ret
endp
 
 
align 4
dword2str:
        push    eax ebx ecx
        mov     esi, hex_buff
        mov     ecx, -8
   @@:
        rol     eax, 4
        mov     ebx, eax
        and     ebx, 0x0F
        mov     bl, [ebx+hexletters]
        mov     [8+esi+ecx], bl
        inc     ecx
        jnz     @B
        pop     ecx ebx eax
        ret
 
hexletters   db '0123456789ABCDEF'
hex_buff     db 8 dup(0),13,10,0
 
 
include "codec.inc"
 
align 4
devices dd (CTRL_VT82C686  shl 16)+VID_VIA,msg_VT82C686,set_VIA
        dd (CTRL_VT8233_5  shl 16)+VID_VIA,msg_VT8233,set_VIA
        dd 0    ;terminator
 
 
msg_VT82C686 db 'VT82C686', 13,10, 0
msg_VT8233   db 'VT8233',   13,10, 0
msg_VIA      db 'VIA'   ,   13,10, 0
 
szKernel            db 'KERNEL', 0
sz_sound_srv        db 'SOUND',0
 
msgInit      db 'detect hardware...',13,10,0
msgFail      db 'device not found',13,10,0
 
msgInvIRQ    db 'IRQ line not assigned or invalid', 13,10, 0
msgPlay      db 'start play', 13,10,0
msgStop      db 'stop play',  13,10,0
;msgIRQ       db 'AC97 IRQ', 13,10,0
;msgInitCtrl  db 'init controller',13,10,0
;msgInitCodec db 'init codec',13,10,0
msgPrimBuff  db 'create primary buffer ...',0
msgDone      db 'done',13,10,0
msgRemap     db 'Remap IRQ',13,10,0
;msgReg       db 'set service handler',13,10,0
;msgOk        db 'service installed',13,10,0
msgCold      db 'cold reset',13,10,0
;msgWarm      db 'warm reset',13,10,0
;msgWRFail    db 'warm reset failed',13,10,0
msgCRFail    db 'cold reset failed',13,10,0
msgCFail     db 'codec not ready',13,10,0
msgCInvalid  db 'codec is not valid',13,10,0 ;Asper
msgResetOk   db 'reset complete',13,10,0
msgStatus    db 'global status   ',0
msgControl   db 'global control  ',0
msgPciCmd    db 'PCI command     ',0
msgPciStat   db 'PCI status      ',0
msgCtrlIsaIo db 'controller io base   ',0
;msgMixIsaIo  db 'codec io base        ',0
;msgCtrlMMIo  db 'controller mmio base ',0
;msgMixMMIo   db 'codec mmio base      ',0
;msgIrqMap    db 'AC97 irq map as      ',0
 
align 4
data fixups
end data
 
align 8
pcmout_bdl       rq 32
buff_list        rd 32
 
codec CODEC
ctrl AC_CNTRL
 
chip_type        rb 1
>
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Rev 5363	Rev 7584
1	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;	1	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2	;; ;;	2	;; ;;
3	;; Copyright (C) KolibriOS team 2004-2015. All rights reserved. ;;	3	;; Copyright (C) KolibriOS team 2004-2015. All rights reserved. ;;
4	;; Distributed under terms of the GNU General Public License ;;	4	;; Distributed under terms of the GNU General Public License ;;
5	;; ;;	5	;; ;;
6	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;	6	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
7		7
8	format PE DLL native 0.05	8	format PE DLL native 0.05
9	entry START	9	entry START
10		10
11	DEBUG equ 1	11	DEBUG equ 1
12		12
13	API_VERSION equ 0x01000100	13	API_VERSION equ 0x01000100
14		-
15	USE_COM_IRQ equ 0 ;make irq 3 and irq 4 available for PCI devices	14
16	IRQ_REMAP equ 0	15	IRQ_REMAP equ 0
17	IRQ_LINE equ 0	16	IRQ_LINE equ 0
18		17
19		18
20	;irq 0,1,2,8,12,13 unavailable	19	;irq 0,13 unavailable
21	; FEDCBA9876543210	20	; FEDCBA9876543210
22	VALID_IRQ equ 1100111011111000b	-
23	ATTCH_IRQ equ 0000111010100000b	-
24		-
25	if USE_COM_IRQ	-
26	ATTCH_IRQ equ 0000111010111000b	-
27	end if	21	VALID_IRQ equ 1101111111111110b
28		22
29	CPU_FREQ equ 2600d	23	CPU_FREQ equ 2600d
30		24
31	BIT0 EQU 0x00000001	25	BIT0 EQU 0x00000001
32	BIT1 EQU 0x00000002	26	BIT1 EQU 0x00000002
33	BIT5 EQU 0x00000020	27	BIT5 EQU 0x00000020
34	BIT10 EQU 0x00000400	28	BIT10 EQU 0x00000400
35		29
36	VID_VIA equ 0x1106	30	VID_VIA equ 0x1106
37		31
38	CTRL_VT82C686 equ 0x3058	32	CTRL_VT82C686 equ 0x3058
39	CTRL_VT8233_5 equ 0x3059	33	CTRL_VT8233_5 equ 0x3059
40		34
41		35
42	CODEC_MASTER_VOL_REG equ 0x02	36	CODEC_MASTER_VOL_REG equ 0x02
43	CODEC_AUX_VOL equ 0x04 ;	37	CODEC_AUX_VOL equ 0x04 ;
44	CODEC_PCM_OUT_REG equ 0x18 ; PCM output volume	38	CODEC_PCM_OUT_REG equ 0x18 ; PCM output volume
45	CODEC_EXT_AUDIO_REG equ 0x28 ; extended audio	39	CODEC_EXT_AUDIO_REG equ 0x28 ; extended audio
46	CODEC_EXT_AUDIO_CTRL_REG equ 0x2a ; extended audio control	40	CODEC_EXT_AUDIO_CTRL_REG equ 0x2a ; extended audio control
47	CODEC_PCM_FRONT_DACRATE_REG equ 0x2c ; PCM out sample rate	41	CODEC_PCM_FRONT_DACRATE_REG equ 0x2c ; PCM out sample rate
48	CODEC_PCM_SURND_DACRATE_REG equ 0x2e ; surround sound sample rate	42	CODEC_PCM_SURND_DACRATE_REG equ 0x2e ; surround sound sample rate
49	CODEC_PCM_LFE_DACRATE_REG equ 0x30 ; LFE sample rate	43	CODEC_PCM_LFE_DACRATE_REG equ 0x30 ; LFE sample rate
50		44
51		45
52	;VIA host controller registers set	46	;VIA host controller registers set
53	;; common offsets	47	;; common offsets
54	VIA_REG_OFFSET_STATUS equ 0x00 ;; byte - channel status	48	VIA_REG_OFFSET_STATUS equ 0x00 ;; byte - channel status
55	VIA_REG_STAT_ACTIVE equ 0x80 ;; RO	49	VIA_REG_STAT_ACTIVE equ 0x80 ;; RO
56	VIA_REG_STAT_PAUSED equ 0x40 ;; RO	50	VIA_REG_STAT_PAUSED equ 0x40 ;; RO
57	VIA_REG_STAT_TRIGGER_QUEUED equ 0x08 ;; RO	51	VIA_REG_STAT_TRIGGER_QUEUED equ 0x08 ;; RO
58	VIA_REG_STAT_STOPPED equ 0x04 ;; RWC	52	VIA_REG_STAT_STOPPED equ 0x04 ;; RWC
59	VIA_REG_STAT_EOL equ 0x02 ;; RWC	53	VIA_REG_STAT_EOL equ 0x02 ;; RWC
60	VIA_REG_STAT_FLAG equ 0x01 ;; RWC	54	VIA_REG_STAT_FLAG equ 0x01 ;; RWC
61	VIA_REG_OFFSET_CONTROL equ 0x01 ;; byte - channel control	55	VIA_REG_OFFSET_CONTROL equ 0x01 ;; byte - channel control
62	VIA_REG_CTRL_START equ 0x80 ;; WO	56	VIA_REG_CTRL_START equ 0x80 ;; WO
63	VIA_REG_CTRL_TERMINATE equ 0x40 ;; WO	57	VIA_REG_CTRL_TERMINATE equ 0x40 ;; WO
64	VIA_REG_CTRL_AUTOSTART equ 0x20	58	VIA_REG_CTRL_AUTOSTART equ 0x20
65	VIA_REG_CTRL_PAUSE equ 0x08 ;; RW	59	VIA_REG_CTRL_PAUSE equ 0x08 ;; RW
66	VIA_REG_CTRL_INT_STOP equ 0x04	60	VIA_REG_CTRL_INT_STOP equ 0x04
67	VIA_REG_CTRL_INT_EOL equ 0x02	61	VIA_REG_CTRL_INT_EOL equ 0x02
68	VIA_REG_CTRL_INT_FLAG equ 0x01	62	VIA_REG_CTRL_INT_FLAG equ 0x01
69	VIA_REG_CTRL_RESET equ 0x01 ;; RW - probably reset? undocumented	63	VIA_REG_CTRL_RESET equ 0x01 ;; RW - probably reset? undocumented
70	VIA_REG_CTRL_INT equ (VIA_REG_CTRL_INT_FLAG or \	64	VIA_REG_CTRL_INT equ (VIA_REG_CTRL_INT_FLAG or \
71	VIA_REG_CTRL_INT_EOL or \	65	VIA_REG_CTRL_INT_EOL or \
72	VIA_REG_CTRL_AUTOSTART)	66	VIA_REG_CTRL_AUTOSTART)
73	VIA_REG_OFFSET_TYPE equ 0x02 ;; byte - channel type (686 only)	67	VIA_REG_OFFSET_TYPE equ 0x02 ;; byte - channel type (686 only)
74	VIA_REG_TYPE_AUTOSTART equ 0x80 ;; RW - autostart at EOL	68	VIA_REG_TYPE_AUTOSTART equ 0x80 ;; RW - autostart at EOL
75	VIA_REG_TYPE_16BIT equ 0x20 ;; RW	69	VIA_REG_TYPE_16BIT equ 0x20 ;; RW
76	VIA_REG_TYPE_STEREO equ 0x10 ;; RW	70	VIA_REG_TYPE_STEREO equ 0x10 ;; RW
77	VIA_REG_TYPE_INT_LLINE equ 0x00	71	VIA_REG_TYPE_INT_LLINE equ 0x00
78	VIA_REG_TYPE_INT_LSAMPLE equ 0x04	72	VIA_REG_TYPE_INT_LSAMPLE equ 0x04
79	VIA_REG_TYPE_INT_LESSONE equ 0x08	73	VIA_REG_TYPE_INT_LESSONE equ 0x08
80	VIA_REG_TYPE_INT_MASK equ 0x0c	74	VIA_REG_TYPE_INT_MASK equ 0x0c
81	VIA_REG_TYPE_INT_EOL equ 0x02	75	VIA_REG_TYPE_INT_EOL equ 0x02
82	VIA_REG_TYPE_INT_FLAG equ 0x01	76	VIA_REG_TYPE_INT_FLAG equ 0x01
83	VIA_REG_OFFSET_TABLE_PTR equ 0x04 ;; dword - channel table pointer	77	VIA_REG_OFFSET_TABLE_PTR equ 0x04 ;; dword - channel table pointer
84	VIA_REG_OFFSET_CURR_PTR equ 0x04 ;; dword - channel current pointer	78	VIA_REG_OFFSET_CURR_PTR equ 0x04 ;; dword - channel current pointer
85	VIA_REG_OFFSET_STOP_IDX equ 0x08 ;; dword - stop index, channel type, sample rate	79	VIA_REG_OFFSET_STOP_IDX equ 0x08 ;; dword - stop index, channel type, sample rate
86	VIA8233_REG_TYPE_16BIT equ 0x00200000 ;; RW	80	VIA8233_REG_TYPE_16BIT equ 0x00200000 ;; RW
87	VIA8233_REG_TYPE_STEREO equ 0x00100000 ;; RW	81	VIA8233_REG_TYPE_STEREO equ 0x00100000 ;; RW
88	VIA_REG_OFFSET_CURR_COUNT equ 0x0c ;; dword - channel current count (24 bit)	82	VIA_REG_OFFSET_CURR_COUNT equ 0x0c ;; dword - channel current count (24 bit)
89	VIA_REG_OFFSET_CURR_INDEX equ 0x0f ;; byte - channel current index (for via8233 only)	83	VIA_REG_OFFSET_CURR_INDEX equ 0x0f ;; byte - channel current index (for via8233 only)
90		84
91		85
92	VIADEV_PLAYBACK equ 0x00	86	VIADEV_PLAYBACK equ 0x00
93	VIADEV_CAPTURE equ 0x10	87	VIADEV_CAPTURE equ 0x10
94	VIADEV_FM equ 0x20	88	VIADEV_FM equ 0x20
95		89
96	;; AC'97 ;;	90	;; AC'97 ;;
97	VIA_REG_AC97 equ 0x80 ; dword	91	VIA_REG_AC97 equ 0x80 ; dword
98	VIA_REG_AC97_CODEC_ID_MASK equ 0xC0000000 ;(3<<30)	92	VIA_REG_AC97_CODEC_ID_MASK equ 0xC0000000 ;(3<<30)
99	VIA_REG_AC97_CODEC_ID_SHIFT equ 30	93	VIA_REG_AC97_CODEC_ID_SHIFT equ 30
100	VIA_REG_AC97_CODEC_ID_PRIMARY equ 0x00	94	VIA_REG_AC97_CODEC_ID_PRIMARY equ 0x00
101	VIA_REG_AC97_CODEC_ID_SECONDARY equ 0x01	95	VIA_REG_AC97_CODEC_ID_SECONDARY equ 0x01
102	VIA_REG_AC97_SECONDARY_VALID equ 0x08000000 ;(1<<27)	96	VIA_REG_AC97_SECONDARY_VALID equ 0x08000000 ;(1<<27)
103	VIA_REG_AC97_PRIMARY_VALID equ 0x02000000 ;(1<<25)	97	VIA_REG_AC97_PRIMARY_VALID equ 0x02000000 ;(1<<25)
104	VIA_REG_AC97_BUSY equ 0x01000000 ;(1<<24)	98	VIA_REG_AC97_BUSY equ 0x01000000 ;(1<<24)
105	VIA_REG_AC97_READ equ 0x00800000 ;(1<<23)	99	VIA_REG_AC97_READ equ 0x00800000 ;(1<<23)
106	VIA_REG_AC97_CMD_SHIFT equ 16	100	VIA_REG_AC97_CMD_SHIFT equ 16
107	VIA_REG_AC97_CMD_MASK equ 0x7E	101	VIA_REG_AC97_CMD_MASK equ 0x7E
108	VIA_REG_AC97_DATA_SHIFT equ 0	102	VIA_REG_AC97_DATA_SHIFT equ 0
109	VIA_REG_AC97_DATA_MASK equ 0xFFFF	103	VIA_REG_AC97_DATA_MASK equ 0xFFFF
110		104
111	VIA_REG_SGD_SHADOW equ 0x84 ; dword	105	VIA_REG_SGD_SHADOW equ 0x84 ; dword
112		106
113	;; via8233-specific registers ;;	107	;; via8233-specific registers ;;
114	VIA_REG_OFS_PLAYBACK_VOLUME_L equ 0x02 ;; byte	108	VIA_REG_OFS_PLAYBACK_VOLUME_L equ 0x02 ;; byte
115	VIA_REG_OFS_PLAYBACK_VOLUME_R equ 0x03 ;; byte	109	VIA_REG_OFS_PLAYBACK_VOLUME_R equ 0x03 ;; byte
116	VIA_REG_OFS_MULTPLAY_FORMAT equ 0x02 ;; byte - format and channels	110	VIA_REG_OFS_MULTPLAY_FORMAT equ 0x02 ;; byte - format and channels
117	VIA_REG_MULTPLAY_FMT_8BIT equ 0x00	111	VIA_REG_MULTPLAY_FMT_8BIT equ 0x00
118	VIA_REG_MULTPLAY_FMT_16BIT equ 0x80	112	VIA_REG_MULTPLAY_FMT_16BIT equ 0x80
119	VIA_REG_MULTPLAY_FMT_CH_MASK equ 0x70 ;; # channels << 4 (valid = 1,2,4,6)	113	VIA_REG_MULTPLAY_FMT_CH_MASK equ 0x70 ;; # channels << 4 (valid = 1,2,4,6)
120	VIA_REG_OFS_CAPTURE_FIFO equ 0x02 ;; byte - bit 6 = fifo enable	114	VIA_REG_OFS_CAPTURE_FIFO equ 0x02 ;; byte - bit 6 = fifo enable
121	VIA_REG_CAPTURE_FIFO_ENABLE equ 0x40	115	VIA_REG_CAPTURE_FIFO_ENABLE equ 0x40
122		116
123	VIA_DXS_MAX_VOLUME equ 31 ;; max. volume (attenuation) of reg 0x32/33	117	VIA_DXS_MAX_VOLUME equ 31 ;; max. volume (attenuation) of reg 0x32/33
124		118
125	VIA_TBL_BIT_FLAG equ 0x40000000	119	VIA_TBL_BIT_FLAG equ 0x40000000
126	VIA_TBL_BIT_EOL equ 0x80000000	120	VIA_TBL_BIT_EOL equ 0x80000000
127		121
128	;; pci space ;;	122	;; pci space ;;
129	VIA_ACLINK_STAT equ 0x40	123	VIA_ACLINK_STAT equ 0x40
130	;...	124	;...
131	VIA_ACLINK_C00_READY equ 0x01 ; primary codec ready	125	VIA_ACLINK_C00_READY equ 0x01 ; primary codec ready
132	VIA_ACLINK_CTRL equ 0x41	126	VIA_ACLINK_CTRL equ 0x41
133	VIA_ACLINK_CTRL_ENABLE equ 0x80 ; 0: disable, 1: enable	127	VIA_ACLINK_CTRL_ENABLE equ 0x80 ; 0: disable, 1: enable
134	VIA_ACLINK_CTRL_RESET equ 0x40 ; 0: assert, 1: de-assert	128	VIA_ACLINK_CTRL_RESET equ 0x40 ; 0: assert, 1: de-assert
135	VIA_ACLINK_CTRL_SYNC equ 0x20 ; 0: release SYNC, 1: force SYNC hi	129	VIA_ACLINK_CTRL_SYNC equ 0x20 ; 0: release SYNC, 1: force SYNC hi
136	VIA_ACLINK_CTRL_SDO equ 0x10 ; 0: release SDO, 1: force SDO hi	130	VIA_ACLINK_CTRL_SDO equ 0x10 ; 0: release SDO, 1: force SDO hi
137	VIA_ACLINK_CTRL_VRA equ 0x08 ; 0: disable VRA, 1: enable VRA	131	VIA_ACLINK_CTRL_VRA equ 0x08 ; 0: disable VRA, 1: enable VRA
138	VIA_ACLINK_CTRL_PCM equ 0x04 ; 0: disable PCM, 1: enable PCM	132	VIA_ACLINK_CTRL_PCM equ 0x04 ; 0: disable PCM, 1: enable PCM
139	VIA_ACLINK_CTRL_FM equ 0x02 ; via686 only	133	VIA_ACLINK_CTRL_FM equ 0x02 ; via686 only
140	VIA_ACLINK_CTRL_SB equ 0x01 ; via686 only	134	VIA_ACLINK_CTRL_SB equ 0x01 ; via686 only
141	VIA_ACLINK_CTRL_INIT equ (VIA_ACLINK_CTRL_ENABLE or \	135	VIA_ACLINK_CTRL_INIT equ (VIA_ACLINK_CTRL_ENABLE or \
142	VIA_ACLINK_CTRL_RESET or \	136	VIA_ACLINK_CTRL_RESET or \
143	VIA_ACLINK_CTRL_PCM or \	137	VIA_ACLINK_CTRL_PCM or \
144	VIA_ACLINK_CTRL_VRA)	138	VIA_ACLINK_CTRL_VRA)
145	VIA_FUNC_ENABLE equ 0x42	139	VIA_FUNC_ENABLE equ 0x42
146	VIA_FUNC_MIDI_PNP equ 0x80 ; FIXME: it's 0x40 in the datasheet!	140	VIA_FUNC_MIDI_PNP equ 0x80 ; FIXME: it's 0x40 in the datasheet!
147	VIA_FUNC_MIDI_IRQMASK equ 0x40 ; FIXME: not documented!	141	VIA_FUNC_MIDI_IRQMASK equ 0x40 ; FIXME: not documented!
148	VIA_FUNC_RX2C_WRITE equ 0x20	142	VIA_FUNC_RX2C_WRITE equ 0x20
149	VIA_FUNC_SB_FIFO_EMPTY equ 0x10	143	VIA_FUNC_SB_FIFO_EMPTY equ 0x10
150	VIA_FUNC_ENABLE_GAME equ 0x08	144	VIA_FUNC_ENABLE_GAME equ 0x08
151	VIA_FUNC_ENABLE_FM equ 0x04	145	VIA_FUNC_ENABLE_FM equ 0x04
152	VIA_FUNC_ENABLE_MIDI equ 0x02	146	VIA_FUNC_ENABLE_MIDI equ 0x02
153	VIA_FUNC_ENABLE_SB equ 0x01	147	VIA_FUNC_ENABLE_SB equ 0x01
154	VIA_PNP_CONTROL equ 0x43	148	VIA_PNP_CONTROL equ 0x43
155	VIA_FM_NMI_CTRL equ 0x48	149	VIA_FM_NMI_CTRL equ 0x48
156	VIA8233_VOLCHG_CTRL equ 0x48	150	VIA8233_VOLCHG_CTRL equ 0x48
157	VIA8233_SPDIF_CTRL equ 0x49	151	VIA8233_SPDIF_CTRL equ 0x49
158	VIA8233_SPDIF_DX3 equ 0x08	152	VIA8233_SPDIF_DX3 equ 0x08
159	VIA8233_SPDIF_SLOT_MASK equ 0x03	153	VIA8233_SPDIF_SLOT_MASK equ 0x03
160	VIA8233_SPDIF_SLOT_1011 equ 0x00	154	VIA8233_SPDIF_SLOT_1011 equ 0x00
161	VIA8233_SPDIF_SLOT_34 equ 0x01	155	VIA8233_SPDIF_SLOT_34 equ 0x01
162	VIA8233_SPDIF_SLOT_78 equ 0x02	156	VIA8233_SPDIF_SLOT_78 equ 0x02
163	VIA8233_SPDIF_SLOT_69 equ 0x03	157	VIA8233_SPDIF_SLOT_69 equ 0x03
164	;] Asper	158	;] Asper
165		159
166		160
167	SRV_GETVERSION equ 0	161	SRV_GETVERSION equ 0
168	DEV_PLAY equ 1	162	DEV_PLAY equ 1
169	DEV_STOP equ 2	163	DEV_STOP equ 2
170	DEV_CALLBACK equ 3	164	DEV_CALLBACK equ 3
171	DEV_SET_BUFF equ 4	165	DEV_SET_BUFF equ 4
172	DEV_NOTIFY equ 5	166	DEV_NOTIFY equ 5
173	DEV_SET_MASTERVOL equ 6	167	DEV_SET_MASTERVOL equ 6
174	DEV_GET_MASTERVOL equ 7	168	DEV_GET_MASTERVOL equ 7
175	DEV_GET_INFO equ 8	169	DEV_GET_INFO equ 8
176	DEV_GET_POS equ 9	170	DEV_GET_POS equ 9
177		171
178	struc AC_CNTRL ;AC controller base class	172	struc AC_CNTRL ;AC controller base class
179	{ .bus dd ?	173	{ .bus dd ?
180	.devfn dd ?	174	.devfn dd ?
181		175
182	.vendor dd ?	176	.vendor dd ?
183	.dev_id dd ?	177	.dev_id dd ?
184	.pci_cmd dd ?	178	.pci_cmd dd ?
185	.pci_stat dd ?	179	.pci_stat dd ?
186		180
187	.codec_io_base dd ?	181	.codec_io_base dd ?
188	.codec_mem_base dd ?	182	.codec_mem_base dd ?
189		183
190	.ctrl_io_base dd ?	184	.ctrl_io_base dd ?
191	.ctrl_mem_base dd ?	185	.ctrl_mem_base dd ?
192	.cfg_reg dd ?	186	.cfg_reg dd ?
193	.int_line dd ?	187	.int_line dd ?
194		188
195	.vendor_ids dd ? ;vendor id string	189	.vendor_ids dd ? ;vendor id string
196	.ctrl_ids dd ? ;hub id string	190	.ctrl_ids dd ? ;hub id string
197		191
198	.buffer dd ?	192	.buffer dd ?
199		193
200	.notify_pos dd ?	194	.notify_pos dd ?
201	.notify_task dd ?	195	.notify_task dd ?
202		196
203	.lvi_reg dd ?	197	.lvi_reg dd ?
204	.ctrl_setup dd ?	198	.ctrl_setup dd ?
205	.user_callback dd ?	199	.user_callback dd ?
206	.codec_read16 dd ?	200	.codec_read16 dd ?
207	.codec_write16 dd ?	201	.codec_write16 dd ?
208		202
209	.ctrl_read8 dd ?	203	.ctrl_read8 dd ?
210	.ctrl_read16 dd ?	204	.ctrl_read16 dd ?
211	.ctrl_read32 dd ?	205	.ctrl_read32 dd ?
212		206
213	.ctrl_write8 dd ?	207	.ctrl_write8 dd ?
214	.ctrl_write16 dd ?	208	.ctrl_write16 dd ?
215	.ctrl_write32 dd ?	209	.ctrl_write32 dd ?
216	}	210	}
217		211
218	struc CODEC ;Audio Chip base class	212	struc CODEC ;Audio Chip base class
219	{	213	{
220	.chip_id dd ?	214	.chip_id dd ?
221	.flags dd ?	215	.flags dd ?
222	.status dd ?	216	.status dd ?
223		217
224	.ac_vendor_ids dd ? ;ac vendor id string	218	.ac_vendor_ids dd ? ;ac vendor id string
225	.chip_ids dd ? ;chip model string	219	.chip_ids dd ? ;chip model string
226		220
227	.shadow_flag dd ?	221	.shadow_flag dd ?
228	dd ?	222	dd ?
229		223
230	.regs dw ? ; codec registers	224	.regs dw ? ; codec registers
231	.reg_master_vol dw ? ;0x02	225	.reg_master_vol dw ? ;0x02
232	.reg_aux_out_vol dw ? ;0x04	226	.reg_aux_out_vol dw ? ;0x04
233	.reg_mone_vol dw ? ;0x06	227	.reg_mone_vol dw ? ;0x06
234	.reg_master_tone dw ? ;0x08	228	.reg_master_tone dw ? ;0x08
235	.reg_beep_vol dw ? ;0x0A	229	.reg_beep_vol dw ? ;0x0A
236	.reg_phone_vol dw ? ;0x0C	230	.reg_phone_vol dw ? ;0x0C
237	.reg_mic_vol dw ? ;0x0E	231	.reg_mic_vol dw ? ;0x0E
238	.reg_line_in_vol dw ? ;0x10	232	.reg_line_in_vol dw ? ;0x10
239	.reg_cd_vol dw ? ;0x12	233	.reg_cd_vol dw ? ;0x12
240	.reg_video_vol dw ? ;0x14	234	.reg_video_vol dw ? ;0x14
241	.reg_aux_in_vol dw ? ;0x16	235	.reg_aux_in_vol dw ? ;0x16
242	.reg_pcm_out_vol dw ? ;0x18	236	.reg_pcm_out_vol dw ? ;0x18
243	.reg_rec_select dw ? ;0x1A	237	.reg_rec_select dw ? ;0x1A
244	.reg_rec_gain dw ? ;0x1C	238	.reg_rec_gain dw ? ;0x1C
245	.reg_rec_gain_mic dw ? ;0x1E	239	.reg_rec_gain_mic dw ? ;0x1E
246	.reg_gen dw ? ;0x20	240	.reg_gen dw ? ;0x20
247	.reg_3d_ctrl dw ? ;0X22	241	.reg_3d_ctrl dw ? ;0X22
248	.reg_page dw ? ;0X24	242	.reg_page dw ? ;0X24
249	.reg_powerdown dw ? ;0x26	243	.reg_powerdown dw ? ;0x26
250	.reg_ext_audio dw ? ;0x28	244	.reg_ext_audio dw ? ;0x28
251	.reg_ext_st dw ? ;0x2a	245	.reg_ext_st dw ? ;0x2a
252	.reg_pcm_front_rate dw ? ;0x2c	246	.reg_pcm_front_rate dw ? ;0x2c
253	.reg_pcm_surr_rate dw ? ;0x2e	247	.reg_pcm_surr_rate dw ? ;0x2e
254	.reg_lfe_rate dw ? ;0x30	248	.reg_lfe_rate dw ? ;0x30
255	.reg_pcm_in_rate dw ? ;0x32	249	.reg_pcm_in_rate dw ? ;0x32
256	dw ? ;0x34	250	dw ? ;0x34
257	.reg_cent_lfe_vol dw ? ;0x36	251	.reg_cent_lfe_vol dw ? ;0x36
258	.reg_surr_vol dw ? ;0x38	252	.reg_surr_vol dw ? ;0x38
259	.reg_spdif_ctrl dw ? ;0x3A	253	.reg_spdif_ctrl dw ? ;0x3A
260	dw ? ;0x3C	254	dw ? ;0x3C
261	dw ? ;0x3E	255	dw ? ;0x3E
262	dw ? ;0x40	256	dw ? ;0x40
263	dw ? ;0x42	257	dw ? ;0x42
264	dw ? ;0x44	258	dw ? ;0x44
265	dw ? ;0x46	259	dw ? ;0x46
266	dw ? ;0x48	260	dw ? ;0x48
267	dw ? ;0x4A	261	dw ? ;0x4A
268	dw ? ;0x4C	262	dw ? ;0x4C
269	dw ? ;0x4E	263	dw ? ;0x4E
270	dw ? ;0x50	264	dw ? ;0x50
271	dw ? ;0x52	265	dw ? ;0x52
272	dw ? ;0x54	266	dw ? ;0x54
273	dw ? ;0x56	267	dw ? ;0x56
274	dw ? ;0x58	268	dw ? ;0x58
275	dw ? ;0x5A	269	dw ? ;0x5A
276	dw ? ;0x5C	270	dw ? ;0x5C
277	dw ? ;0x5E	271	dw ? ;0x5E
278	.reg_page_0 dw ? ;0x60	272	.reg_page_0 dw ? ;0x60
279	.reg_page_1 dw ? ;0x62	273	.reg_page_1 dw ? ;0x62
280	.reg_page_2 dw ? ;0x64	274	.reg_page_2 dw ? ;0x64
281	.reg_page_3 dw ? ;0x66	275	.reg_page_3 dw ? ;0x66
282	.reg_page_4 dw ? ;0x68	276	.reg_page_4 dw ? ;0x68
283	.reg_page_5 dw ? ;0x6A	277	.reg_page_5 dw ? ;0x6A
284	.reg_page_6 dw ? ;0x6C	278	.reg_page_6 dw ? ;0x6C
285	.reg_page_7 dw ? ;0x6E	279	.reg_page_7 dw ? ;0x6E
286	dw ? ;0x70	280	dw ? ;0x70
287	dw ? ;0x72	281	dw ? ;0x72
288	dw ? ;0x74	282	dw ? ;0x74
289	dw ? ;0x76	283	dw ? ;0x76
290	dw ? ;0x78	284	dw ? ;0x78
291	dw ? ;0x7A	285	dw ? ;0x7A
292	.reg_vendor_id_1 dw ? ;0x7C	286	.reg_vendor_id_1 dw ? ;0x7C
293	.reg_vendor_id_2 dw ? ;0x7E	287	.reg_vendor_id_2 dw ? ;0x7E
294		288
295		289
296	.reset dd ? ;virtual	290	.reset dd ? ;virtual
297	.set_master_vol dd ?	291	.set_master_vol dd ?
298	}	292	}
299		293
300	struc CTRL_INFO	294	struc CTRL_INFO
301	{ .pci_cmd dd ?	295	{ .pci_cmd dd ?
302	.irq dd ?	296	.irq dd ?
303	.glob_cntrl dd ?	297	.glob_cntrl dd ?
304	.glob_sta dd ?	298	.glob_sta dd ?
305	.codec_io_base dd ?	299	.codec_io_base dd ?
306	.ctrl_io_base dd ?	300	.ctrl_io_base dd ?
307	.codec_mem_base dd ?	301	.codec_mem_base dd ?
308	.ctrl_mem_base dd ?	302	.ctrl_mem_base dd ?
309	.codec_id dd ?	303	.codec_id dd ?
310	}	304	}
311		305
312	EVENT_NOTIFY equ 0x00000200	306	EVENT_NOTIFY equ 0x00000200
313		307
314	section '.flat' code readable writable executable	308	section '.flat' code readable writable executable
315	include '../struct.inc'	309	include '../struct.inc'
316	include '../macros.inc'	310	include '../macros.inc'
317	include '../proc32.inc'	311	include '../proc32.inc'
318	include '../peimport.inc'	312	include '../peimport.inc'
319		313
320	proc START c, state:dword, cmdline:dword	314	proc START c, state:dword, cmdline:dword
321		315
322	cmp [state], 1	316	cmp [state], 1
323	jne .stop	317	jne .stop
324		318
325	if DEBUG	319	if DEBUG
326	mov esi, msgInit	320	mov esi, msgInit
327	invoke SysMsgBoardStr	321	invoke SysMsgBoardStr
328	end if	322	end if
329		323
330	call detect_controller	324	call detect_controller
331	test eax, eax	325	test eax, eax
332	jz .fail	326	jz .fail
333		327
334	if DEBUG	328	if DEBUG
335	mov esi, [ctrl.vendor_ids]	329	mov esi, [ctrl.vendor_ids]
336	invoke SysMsgBoardStr	330	invoke SysMsgBoardStr
337	mov esi, [ctrl.ctrl_ids]	331	mov esi, [ctrl.ctrl_ids]
338	invoke SysMsgBoardStr	332	invoke SysMsgBoardStr
339	end if	333	end if
340		334
341	call init_controller	335	call init_controller
342	test eax, eax	336	test eax, eax
343	jz .fail	337	jz .fail
344		338
345	call init_codec	339	call init_codec
346	test eax, eax	340	test eax, eax
347	jz .fail	341	jz .fail
348		342
349	call setup_codec	343	call setup_codec
350		344
351	mov esi, msgPrimBuff	345	mov esi, msgPrimBuff
352	invoke SysMsgBoardStr	346	invoke SysMsgBoardStr
353	call create_primary_buff	347	call create_primary_buff
354	mov esi, msgDone	348	mov esi, msgDone
355	invoke SysMsgBoardStr	349	invoke SysMsgBoardStr
356		350
357	if IRQ_REMAP	351	if IRQ_REMAP
358	pushf	352	pushf
359	cli	353	cli
360		354
361	mov ebx, [ctrl.int_line]	355	mov ebx, [ctrl.int_line]
362	in al, 0xA1	356	in al, 0xA1
363	mov ah, al	357	mov ah, al
364	in al, 0x21	358	in al, 0x21
365	test ebx, ebx	359	test ebx, ebx
366	jz .skip	360	jz .skip
367	bts ax, bx ;mask old line	361	bts ax, bx ;mask old line
368	.skip:	362	.skip:
369	bts ax, IRQ_LINE ;mask new ine	363	bts ax, IRQ_LINE ;mask new ine
370	out 0x21, al	364	out 0x21, al
371	mov al, ah	365	mov al, ah
372	out 0xA1, al	366	out 0xA1, al
373		367
374	invoke PciWrite8, 0, 0xF8, 0x61, IRQ_LINE ;remap IRQ	368	invoke PciWrite8, 0, 0xF8, 0x61, IRQ_LINE ;remap IRQ
375		369
376	mov dx, 0x4d0 ;8259 ELCR1	370	mov dx, 0x4d0 ;8259 ELCR1
377	in al, dx	371	in al, dx
378	bts ax, IRQ_LINE	372	bts ax, IRQ_LINE
379	out dx, al ;set level-triggered mode	373	out dx, al ;set level-triggered mode
380	mov [ctrl.int_line], IRQ_LINE	374	mov [ctrl.int_line], IRQ_LINE
381	popf	375	popf
382	mov esi, msgRemap	376	mov esi, msgRemap
383	invoke SysMsgBoardStr	377	invoke SysMsgBoardStr
384	end if	378	end if
385		379
386	mov eax, VALID_IRQ	380	mov eax, VALID_IRQ
387	mov ebx, [ctrl.int_line]	381	mov ebx, [ctrl.int_line]
388	mov esi, msgInvIRQ	382	mov esi, msgInvIRQ
389	bt eax, ebx	383	bt eax, ebx
390	jnc .fail_msg	384	jnc .fail_msg
391	mov eax, ATTCH_IRQ	-
392	mov esi, msgAttchIRQ	-
393	bt eax, ebx	-
394	jnc .fail_msg	-
395		385
396	invoke AttachIntHandler, ebx, ac97_irq_VIA, 0	386	invoke AttachIntHandler, ebx, ac97_irq_VIA, 0
397	.reg:	387	.reg:
398	invoke RegService, sz_sound_srv, service_proc	388	invoke RegService, sz_sound_srv, service_proc
399	ret	389	ret
400	.fail:	390	.fail:
401	if DEBUG	391	if DEBUG
402	mov esi, msgFail	392	mov esi, msgFail
403	invoke SysMsgBoardStr	393	invoke SysMsgBoardStr
404	end if	394	end if
405	xor eax, eax	395	xor eax, eax
406	ret	396	ret
407	.fail_msg:	397	.fail_msg:
408	invoke SysMsgBoardStr	398	invoke SysMsgBoardStr
409	xor eax, eax	399	xor eax, eax
410	ret	400	ret
411	.stop:	401	.stop:
412	call stop	402	call stop
413	xor eax, eax	403	xor eax, eax
414	ret	404	ret
415	endp	405	endp
416		406
417	handle equ IOCTL.handle	407	handle equ IOCTL.handle
418	io_code equ IOCTL.io_code	408	io_code equ IOCTL.io_code
419	input equ IOCTL.input	409	input equ IOCTL.input
420	inp_size equ IOCTL.inp_size	410	inp_size equ IOCTL.inp_size
421	output equ IOCTL.output	411	output equ IOCTL.output
422	out_size equ IOCTL.out_size	412	out_size equ IOCTL.out_size
423		413
424	align 4	414	align 4
425	proc service_proc stdcall, ioctl:dword	415	proc service_proc stdcall, ioctl:dword
426		416
427	mov edi, [ioctl]	417	mov edi, [ioctl]
428	mov eax, [edi+io_code]	418	mov eax, [edi+io_code]
429		419
430	cmp eax, SRV_GETVERSION	420	cmp eax, SRV_GETVERSION
431	jne @F	421	jne @F
432	mov eax, [edi+output]	422	mov eax, [edi+output]
433	cmp [edi+out_size], 4	423	cmp [edi+out_size], 4
434	jne .fail	424	jne .fail
435		425
436	mov [eax], dword API_VERSION	426	mov [eax], dword API_VERSION
437	xor eax, eax	427	xor eax, eax
438	ret	428	ret
439	@@:	429	@@:
440	cmp eax, DEV_PLAY	430	cmp eax, DEV_PLAY
441	jne @F	431	jne @F
442	if DEBUG	432	if DEBUG
443	mov esi, msgPlay	433	mov esi, msgPlay
444	invoke SysMsgBoardStr	434	invoke SysMsgBoardStr
445	end if	435	end if
446	call play	436	call play
447	ret	437	ret
448	@@:	438	@@:
449	cmp eax, DEV_STOP	439	cmp eax, DEV_STOP
450	jne @F	440	jne @F
451	if DEBUG	441	if DEBUG
452	mov esi, msgStop	442	mov esi, msgStop
453	invoke SysMsgBoardStr	443	invoke SysMsgBoardStr
454	end if	444	end if
455	call stop	445	call stop
456	ret	446	ret
457	@@:	447	@@:
458	cmp eax, DEV_CALLBACK	448	cmp eax, DEV_CALLBACK
459	jne @F	449	jne @F
460	mov ebx, [edi+input]	450	mov ebx, [edi+input]
461	stdcall set_callback, [ebx]	451	stdcall set_callback, [ebx]
462	ret	452	ret
463	@@:	453	@@:
464	cmp eax, DEV_SET_MASTERVOL	454	cmp eax, DEV_SET_MASTERVOL
465	jne @F	455	jne @F
466	mov eax, [edi+input]	456	mov eax, [edi+input]
467	mov eax, [eax]	457	mov eax, [eax]
468	call set_master_vol ;eax= vol	458	call set_master_vol ;eax= vol
469	ret	459	ret
470	@@:	460	@@:
471	cmp eax, DEV_GET_MASTERVOL	461	cmp eax, DEV_GET_MASTERVOL
472	jne @F	462	jne @F
473	mov ebx, [edi+output]	463	mov ebx, [edi+output]
474	stdcall get_master_vol, ebx	464	stdcall get_master_vol, ebx
475	ret	465	ret
476	@@:	466	@@:
477	cmp eax, DEV_GET_INFO	467	cmp eax, DEV_GET_INFO
478	jne @F	468	jne @F
479	mov ebx, [edi+output]	469	mov ebx, [edi+output]
480	stdcall get_dev_info, ebx	470	stdcall get_dev_info, ebx
481	ret	471	ret
482	@@:	472	@@:
483	cmp eax, DEV_GET_POS	473	cmp eax, DEV_GET_POS
484	jne @F	474	jne @F
485	push ebx edx	475	push ebx edx
486	mov edx, VIADEV_PLAYBACK + VIA_REG_OFFSET_CURR_COUNT	476	mov edx, VIADEV_PLAYBACK + VIA_REG_OFFSET_CURR_COUNT
487	call [ctrl.ctrl_read32]	477	call [ctrl.ctrl_read32]
488	and eax, 0x00FFFFFF	478	and eax, 0x00FFFFFF
489	mov ebx, 4096	479	mov ebx, 4096
490	sub ebx, eax	480	sub ebx, eax
491	shr ebx, 2	481	shr ebx, 2
492	mov edx, [edi+output]	482	mov edx, [edi+output]
493	mov [edx], ebx	483	mov [edx], ebx
494	pop edx ebx	484	pop edx ebx
495	ret	485	ret
496	@@:	486	@@:
497	.fail:	487	.fail:
498	or eax, -1	488	or eax, -1
499	ret	489	ret
500	endp	490	endp

Subversion Repositories Kolibri OS

(root)/drivers/audio/vt823x.asm – Rev 5363 → 7584