Rev 5221 | Go to most recent revision | Show entire file | Regard whitespace | Details | Blame | Last modification | View Log | RSS feed
Rev 5221 | Rev 6324 | ||
---|---|---|---|
Line 96... | Line 96... | ||
96 | /* 50 */ |
96 | /* 50 */ |
97 | { Bad_Opcode }, |
97 | { Bad_Opcode }, |
98 | { PREFIX_TABLE (PREFIX_EVEX_0F51) }, |
98 | { PREFIX_TABLE (PREFIX_EVEX_0F51) }, |
99 | { Bad_Opcode }, |
99 | { Bad_Opcode }, |
100 | { Bad_Opcode }, |
100 | { Bad_Opcode }, |
101 | { Bad_Opcode }, |
101 | { PREFIX_TABLE (PREFIX_EVEX_0F54) }, |
102 | { Bad_Opcode }, |
102 | { PREFIX_TABLE (PREFIX_EVEX_0F55) }, |
103 | { Bad_Opcode }, |
103 | { PREFIX_TABLE (PREFIX_EVEX_0F56) }, |
104 | { Bad_Opcode }, |
104 | { PREFIX_TABLE (PREFIX_EVEX_0F57) }, |
105 | /* 58 */ |
105 | /* 58 */ |
106 | { PREFIX_TABLE (PREFIX_EVEX_0F58) }, |
106 | { PREFIX_TABLE (PREFIX_EVEX_0F58) }, |
107 | { PREFIX_TABLE (PREFIX_EVEX_0F59) }, |
107 | { PREFIX_TABLE (PREFIX_EVEX_0F59) }, |
108 | { PREFIX_TABLE (PREFIX_EVEX_0F5A) }, |
108 | { PREFIX_TABLE (PREFIX_EVEX_0F5A) }, |
109 | { PREFIX_TABLE (PREFIX_EVEX_0F5B) }, |
109 | { PREFIX_TABLE (PREFIX_EVEX_0F5B) }, |
110 | { PREFIX_TABLE (PREFIX_EVEX_0F5C) }, |
110 | { PREFIX_TABLE (PREFIX_EVEX_0F5C) }, |
111 | { PREFIX_TABLE (PREFIX_EVEX_0F5D) }, |
111 | { PREFIX_TABLE (PREFIX_EVEX_0F5D) }, |
112 | { PREFIX_TABLE (PREFIX_EVEX_0F5E) }, |
112 | { PREFIX_TABLE (PREFIX_EVEX_0F5E) }, |
113 | { PREFIX_TABLE (PREFIX_EVEX_0F5F) }, |
113 | { PREFIX_TABLE (PREFIX_EVEX_0F5F) }, |
114 | /* 60 */ |
114 | /* 60 */ |
115 | { Bad_Opcode }, |
115 | { PREFIX_TABLE (PREFIX_EVEX_0F60) }, |
116 | { Bad_Opcode }, |
116 | { PREFIX_TABLE (PREFIX_EVEX_0F61) }, |
117 | { PREFIX_TABLE (PREFIX_EVEX_0F62) }, |
117 | { PREFIX_TABLE (PREFIX_EVEX_0F62) }, |
118 | { Bad_Opcode }, |
118 | { PREFIX_TABLE (PREFIX_EVEX_0F63) }, |
119 | { Bad_Opcode }, |
119 | { PREFIX_TABLE (PREFIX_EVEX_0F64) }, |
120 | { Bad_Opcode }, |
120 | { PREFIX_TABLE (PREFIX_EVEX_0F65) }, |
121 | { PREFIX_TABLE (PREFIX_EVEX_0F66) }, |
121 | { PREFIX_TABLE (PREFIX_EVEX_0F66) }, |
122 | { Bad_Opcode }, |
122 | { PREFIX_TABLE (PREFIX_EVEX_0F67) }, |
123 | /* 68 */ |
123 | /* 68 */ |
124 | { Bad_Opcode }, |
124 | { PREFIX_TABLE (PREFIX_EVEX_0F68) }, |
125 | { Bad_Opcode }, |
125 | { PREFIX_TABLE (PREFIX_EVEX_0F69) }, |
126 | { PREFIX_TABLE (PREFIX_EVEX_0F6A) }, |
126 | { PREFIX_TABLE (PREFIX_EVEX_0F6A) }, |
127 | { Bad_Opcode }, |
127 | { PREFIX_TABLE (PREFIX_EVEX_0F6B) }, |
128 | { PREFIX_TABLE (PREFIX_EVEX_0F6C) }, |
128 | { PREFIX_TABLE (PREFIX_EVEX_0F6C) }, |
129 | { PREFIX_TABLE (PREFIX_EVEX_0F6D) }, |
129 | { PREFIX_TABLE (PREFIX_EVEX_0F6D) }, |
130 | { PREFIX_TABLE (PREFIX_EVEX_0F6E) }, |
130 | { PREFIX_TABLE (PREFIX_EVEX_0F6E) }, |
131 | { PREFIX_TABLE (PREFIX_EVEX_0F6F) }, |
131 | { PREFIX_TABLE (PREFIX_EVEX_0F6F) }, |
132 | /* 70 */ |
132 | /* 70 */ |
133 | { PREFIX_TABLE (PREFIX_EVEX_0F70) }, |
133 | { PREFIX_TABLE (PREFIX_EVEX_0F70) }, |
134 | { Bad_Opcode }, |
134 | { REG_TABLE (REG_EVEX_0F71) }, |
135 | { REG_TABLE (REG_EVEX_0F72) }, |
135 | { REG_TABLE (REG_EVEX_0F72) }, |
136 | { REG_TABLE (REG_EVEX_0F73) }, |
136 | { REG_TABLE (REG_EVEX_0F73) }, |
137 | { Bad_Opcode }, |
137 | { PREFIX_TABLE (PREFIX_EVEX_0F74) }, |
138 | { Bad_Opcode }, |
138 | { PREFIX_TABLE (PREFIX_EVEX_0F75) }, |
139 | { PREFIX_TABLE (PREFIX_EVEX_0F76) }, |
139 | { PREFIX_TABLE (PREFIX_EVEX_0F76) }, |
140 | { Bad_Opcode }, |
140 | { Bad_Opcode }, |
141 | /* 78 */ |
141 | /* 78 */ |
142 | { PREFIX_TABLE (PREFIX_EVEX_0F78) }, |
142 | { PREFIX_TABLE (PREFIX_EVEX_0F78) }, |
143 | { PREFIX_TABLE (PREFIX_EVEX_0F79) }, |
143 | { PREFIX_TABLE (PREFIX_EVEX_0F79) }, |
Line 222... | Line 222... | ||
222 | /* C0 */ |
222 | /* C0 */ |
223 | { Bad_Opcode }, |
223 | { Bad_Opcode }, |
224 | { Bad_Opcode }, |
224 | { Bad_Opcode }, |
225 | { PREFIX_TABLE (PREFIX_EVEX_0FC2) }, |
225 | { PREFIX_TABLE (PREFIX_EVEX_0FC2) }, |
226 | { Bad_Opcode }, |
226 | { Bad_Opcode }, |
227 | { Bad_Opcode }, |
227 | { PREFIX_TABLE (PREFIX_EVEX_0FC4) }, |
228 | { Bad_Opcode }, |
228 | { PREFIX_TABLE (PREFIX_EVEX_0FC5) }, |
229 | { PREFIX_TABLE (PREFIX_EVEX_0FC6) }, |
229 | { PREFIX_TABLE (PREFIX_EVEX_0FC6) }, |
230 | { Bad_Opcode }, |
230 | { Bad_Opcode }, |
231 | /* C8 */ |
231 | /* C8 */ |
232 | { Bad_Opcode }, |
232 | { Bad_Opcode }, |
233 | { Bad_Opcode }, |
233 | { Bad_Opcode }, |
Line 237... | Line 237... | ||
237 | { Bad_Opcode }, |
237 | { Bad_Opcode }, |
238 | { Bad_Opcode }, |
238 | { Bad_Opcode }, |
239 | { Bad_Opcode }, |
239 | { Bad_Opcode }, |
240 | /* D0 */ |
240 | /* D0 */ |
241 | { Bad_Opcode }, |
241 | { Bad_Opcode }, |
242 | { Bad_Opcode }, |
242 | { PREFIX_TABLE (PREFIX_EVEX_0FD1) }, |
243 | { PREFIX_TABLE (PREFIX_EVEX_0FD2) }, |
243 | { PREFIX_TABLE (PREFIX_EVEX_0FD2) }, |
244 | { PREFIX_TABLE (PREFIX_EVEX_0FD3) }, |
244 | { PREFIX_TABLE (PREFIX_EVEX_0FD3) }, |
245 | { PREFIX_TABLE (PREFIX_EVEX_0FD4) }, |
245 | { PREFIX_TABLE (PREFIX_EVEX_0FD4) }, |
246 | { Bad_Opcode }, |
246 | { PREFIX_TABLE (PREFIX_EVEX_0FD5) }, |
247 | { PREFIX_TABLE (PREFIX_EVEX_0FD6) }, |
247 | { PREFIX_TABLE (PREFIX_EVEX_0FD6) }, |
248 | { Bad_Opcode }, |
248 | { Bad_Opcode }, |
249 | /* D8 */ |
249 | /* D8 */ |
250 | { Bad_Opcode }, |
250 | { PREFIX_TABLE (PREFIX_EVEX_0FD8) }, |
251 | { Bad_Opcode }, |
251 | { PREFIX_TABLE (PREFIX_EVEX_0FD9) }, |
252 | { Bad_Opcode }, |
252 | { PREFIX_TABLE (PREFIX_EVEX_0FDA) }, |
253 | { PREFIX_TABLE (PREFIX_EVEX_0FDB) }, |
253 | { PREFIX_TABLE (PREFIX_EVEX_0FDB) }, |
254 | { Bad_Opcode }, |
254 | { PREFIX_TABLE (PREFIX_EVEX_0FDC) }, |
255 | { Bad_Opcode }, |
255 | { PREFIX_TABLE (PREFIX_EVEX_0FDD) }, |
256 | { Bad_Opcode }, |
256 | { PREFIX_TABLE (PREFIX_EVEX_0FDE) }, |
257 | { PREFIX_TABLE (PREFIX_EVEX_0FDF) }, |
257 | { PREFIX_TABLE (PREFIX_EVEX_0FDF) }, |
258 | /* E0 */ |
258 | /* E0 */ |
259 | { Bad_Opcode }, |
259 | { PREFIX_TABLE (PREFIX_EVEX_0FE0) }, |
260 | { Bad_Opcode }, |
260 | { PREFIX_TABLE (PREFIX_EVEX_0FE1) }, |
261 | { PREFIX_TABLE (PREFIX_EVEX_0FE2) }, |
261 | { PREFIX_TABLE (PREFIX_EVEX_0FE2) }, |
262 | { Bad_Opcode }, |
262 | { PREFIX_TABLE (PREFIX_EVEX_0FE3) }, |
263 | { Bad_Opcode }, |
263 | { PREFIX_TABLE (PREFIX_EVEX_0FE4) }, |
264 | { Bad_Opcode }, |
264 | { PREFIX_TABLE (PREFIX_EVEX_0FE5) }, |
265 | { PREFIX_TABLE (PREFIX_EVEX_0FE6) }, |
265 | { PREFIX_TABLE (PREFIX_EVEX_0FE6) }, |
266 | { PREFIX_TABLE (PREFIX_EVEX_0FE7) }, |
266 | { PREFIX_TABLE (PREFIX_EVEX_0FE7) }, |
267 | /* E8 */ |
267 | /* E8 */ |
268 | { Bad_Opcode }, |
268 | { PREFIX_TABLE (PREFIX_EVEX_0FE8) }, |
269 | { Bad_Opcode }, |
269 | { PREFIX_TABLE (PREFIX_EVEX_0FE9) }, |
270 | { Bad_Opcode }, |
270 | { PREFIX_TABLE (PREFIX_EVEX_0FEA) }, |
271 | { PREFIX_TABLE (PREFIX_EVEX_0FEB) }, |
271 | { PREFIX_TABLE (PREFIX_EVEX_0FEB) }, |
272 | { Bad_Opcode }, |
272 | { PREFIX_TABLE (PREFIX_EVEX_0FEC) }, |
273 | { Bad_Opcode }, |
273 | { PREFIX_TABLE (PREFIX_EVEX_0FED) }, |
274 | { Bad_Opcode }, |
274 | { PREFIX_TABLE (PREFIX_EVEX_0FEE) }, |
275 | { PREFIX_TABLE (PREFIX_EVEX_0FEF) }, |
275 | { PREFIX_TABLE (PREFIX_EVEX_0FEF) }, |
276 | /* F0 */ |
276 | /* F0 */ |
277 | { Bad_Opcode }, |
277 | { Bad_Opcode }, |
278 | { Bad_Opcode }, |
278 | { PREFIX_TABLE (PREFIX_EVEX_0FF1) }, |
279 | { PREFIX_TABLE (PREFIX_EVEX_0FF2) }, |
279 | { PREFIX_TABLE (PREFIX_EVEX_0FF2) }, |
280 | { PREFIX_TABLE (PREFIX_EVEX_0FF3) }, |
280 | { PREFIX_TABLE (PREFIX_EVEX_0FF3) }, |
281 | { PREFIX_TABLE (PREFIX_EVEX_0FF4) }, |
281 | { PREFIX_TABLE (PREFIX_EVEX_0FF4) }, |
282 | { Bad_Opcode }, |
282 | { PREFIX_TABLE (PREFIX_EVEX_0FF5) }, |
283 | { Bad_Opcode }, |
283 | { PREFIX_TABLE (PREFIX_EVEX_0FF6) }, |
284 | { Bad_Opcode }, |
284 | { Bad_Opcode }, |
285 | /* F8 */ |
285 | /* F8 */ |
286 | { Bad_Opcode }, |
286 | { PREFIX_TABLE (PREFIX_EVEX_0FF8) }, |
287 | { Bad_Opcode }, |
287 | { PREFIX_TABLE (PREFIX_EVEX_0FF9) }, |
288 | { PREFIX_TABLE (PREFIX_EVEX_0FFA) }, |
288 | { PREFIX_TABLE (PREFIX_EVEX_0FFA) }, |
289 | { PREFIX_TABLE (PREFIX_EVEX_0FFB) }, |
289 | { PREFIX_TABLE (PREFIX_EVEX_0FFB) }, |
290 | { Bad_Opcode }, |
290 | { PREFIX_TABLE (PREFIX_EVEX_0FFC) }, |
291 | { Bad_Opcode }, |
291 | { PREFIX_TABLE (PREFIX_EVEX_0FFD) }, |
292 | { PREFIX_TABLE (PREFIX_EVEX_0FFE) }, |
292 | { PREFIX_TABLE (PREFIX_EVEX_0FFE) }, |
293 | { Bad_Opcode }, |
293 | { Bad_Opcode }, |
294 | }, |
294 | }, |
295 | /* EVEX_0F38 */ |
295 | /* EVEX_0F38 */ |
296 | { |
296 | { |
297 | /* 00 */ |
297 | /* 00 */ |
- | 298 | { PREFIX_TABLE (PREFIX_EVEX_0F3800) }, |
|
298 | { Bad_Opcode }, |
299 | { Bad_Opcode }, |
299 | { Bad_Opcode }, |
300 | { Bad_Opcode }, |
300 | { Bad_Opcode }, |
301 | { Bad_Opcode }, |
301 | { Bad_Opcode }, |
- | |
302 | { Bad_Opcode }, |
302 | { PREFIX_TABLE (PREFIX_EVEX_0F3804) }, |
303 | { Bad_Opcode }, |
303 | { Bad_Opcode }, |
304 | { Bad_Opcode }, |
304 | { Bad_Opcode }, |
305 | { Bad_Opcode }, |
305 | { Bad_Opcode }, |
306 | /* 08 */ |
306 | /* 08 */ |
307 | { Bad_Opcode }, |
307 | { Bad_Opcode }, |
308 | { Bad_Opcode }, |
308 | { Bad_Opcode }, |
309 | { Bad_Opcode }, |
309 | { Bad_Opcode }, |
310 | { Bad_Opcode }, |
310 | { PREFIX_TABLE (PREFIX_EVEX_0F380B) }, |
311 | { PREFIX_TABLE (PREFIX_EVEX_0F380C) }, |
311 | { PREFIX_TABLE (PREFIX_EVEX_0F380C) }, |
312 | { PREFIX_TABLE (PREFIX_EVEX_0F380D) }, |
312 | { PREFIX_TABLE (PREFIX_EVEX_0F380D) }, |
313 | { Bad_Opcode }, |
313 | { Bad_Opcode }, |
314 | { Bad_Opcode }, |
314 | { Bad_Opcode }, |
315 | /* 10 */ |
315 | /* 10 */ |
316 | { Bad_Opcode }, |
316 | { PREFIX_TABLE (PREFIX_EVEX_0F3810) }, |
317 | { PREFIX_TABLE (PREFIX_EVEX_0F3811) }, |
317 | { PREFIX_TABLE (PREFIX_EVEX_0F3811) }, |
318 | { PREFIX_TABLE (PREFIX_EVEX_0F3812) }, |
318 | { PREFIX_TABLE (PREFIX_EVEX_0F3812) }, |
319 | { PREFIX_TABLE (PREFIX_EVEX_0F3813) }, |
319 | { PREFIX_TABLE (PREFIX_EVEX_0F3813) }, |
320 | { PREFIX_TABLE (PREFIX_EVEX_0F3814) }, |
320 | { PREFIX_TABLE (PREFIX_EVEX_0F3814) }, |
321 | { PREFIX_TABLE (PREFIX_EVEX_0F3815) }, |
321 | { PREFIX_TABLE (PREFIX_EVEX_0F3815) }, |
Line 324... | Line 324... | ||
324 | /* 18 */ |
324 | /* 18 */ |
325 | { PREFIX_TABLE (PREFIX_EVEX_0F3818) }, |
325 | { PREFIX_TABLE (PREFIX_EVEX_0F3818) }, |
326 | { PREFIX_TABLE (PREFIX_EVEX_0F3819) }, |
326 | { PREFIX_TABLE (PREFIX_EVEX_0F3819) }, |
327 | { PREFIX_TABLE (PREFIX_EVEX_0F381A) }, |
327 | { PREFIX_TABLE (PREFIX_EVEX_0F381A) }, |
328 | { PREFIX_TABLE (PREFIX_EVEX_0F381B) }, |
328 | { PREFIX_TABLE (PREFIX_EVEX_0F381B) }, |
329 | { Bad_Opcode }, |
329 | { PREFIX_TABLE (PREFIX_EVEX_0F381C) }, |
330 | { Bad_Opcode }, |
330 | { PREFIX_TABLE (PREFIX_EVEX_0F381D) }, |
331 | { PREFIX_TABLE (PREFIX_EVEX_0F381E) }, |
331 | { PREFIX_TABLE (PREFIX_EVEX_0F381E) }, |
332 | { PREFIX_TABLE (PREFIX_EVEX_0F381F) }, |
332 | { PREFIX_TABLE (PREFIX_EVEX_0F381F) }, |
333 | /* 20 */ |
333 | /* 20 */ |
334 | { Bad_Opcode }, |
334 | { PREFIX_TABLE (PREFIX_EVEX_0F3820) }, |
335 | { PREFIX_TABLE (PREFIX_EVEX_0F3821) }, |
335 | { PREFIX_TABLE (PREFIX_EVEX_0F3821) }, |
336 | { PREFIX_TABLE (PREFIX_EVEX_0F3822) }, |
336 | { PREFIX_TABLE (PREFIX_EVEX_0F3822) }, |
337 | { PREFIX_TABLE (PREFIX_EVEX_0F3823) }, |
337 | { PREFIX_TABLE (PREFIX_EVEX_0F3823) }, |
338 | { PREFIX_TABLE (PREFIX_EVEX_0F3824) }, |
338 | { PREFIX_TABLE (PREFIX_EVEX_0F3824) }, |
339 | { PREFIX_TABLE (PREFIX_EVEX_0F3825) }, |
339 | { PREFIX_TABLE (PREFIX_EVEX_0F3825) }, |
340 | { Bad_Opcode }, |
340 | { PREFIX_TABLE (PREFIX_EVEX_0F3826) }, |
341 | { PREFIX_TABLE (PREFIX_EVEX_0F3827) }, |
341 | { PREFIX_TABLE (PREFIX_EVEX_0F3827) }, |
342 | /* 28 */ |
342 | /* 28 */ |
343 | { PREFIX_TABLE (PREFIX_EVEX_0F3828) }, |
343 | { PREFIX_TABLE (PREFIX_EVEX_0F3828) }, |
344 | { PREFIX_TABLE (PREFIX_EVEX_0F3829) }, |
344 | { PREFIX_TABLE (PREFIX_EVEX_0F3829) }, |
345 | { PREFIX_TABLE (PREFIX_EVEX_0F382A) }, |
345 | { PREFIX_TABLE (PREFIX_EVEX_0F382A) }, |
346 | { Bad_Opcode }, |
346 | { PREFIX_TABLE (PREFIX_EVEX_0F382B) }, |
347 | { PREFIX_TABLE (PREFIX_EVEX_0F382C) }, |
347 | { PREFIX_TABLE (PREFIX_EVEX_0F382C) }, |
348 | { PREFIX_TABLE (PREFIX_EVEX_0F382D) }, |
348 | { PREFIX_TABLE (PREFIX_EVEX_0F382D) }, |
349 | { Bad_Opcode }, |
349 | { Bad_Opcode }, |
350 | { Bad_Opcode }, |
350 | { Bad_Opcode }, |
351 | /* 30 */ |
351 | /* 30 */ |
352 | { Bad_Opcode }, |
352 | { PREFIX_TABLE (PREFIX_EVEX_0F3830) }, |
353 | { PREFIX_TABLE (PREFIX_EVEX_0F3831) }, |
353 | { PREFIX_TABLE (PREFIX_EVEX_0F3831) }, |
354 | { PREFIX_TABLE (PREFIX_EVEX_0F3832) }, |
354 | { PREFIX_TABLE (PREFIX_EVEX_0F3832) }, |
355 | { PREFIX_TABLE (PREFIX_EVEX_0F3833) }, |
355 | { PREFIX_TABLE (PREFIX_EVEX_0F3833) }, |
356 | { PREFIX_TABLE (PREFIX_EVEX_0F3834) }, |
356 | { PREFIX_TABLE (PREFIX_EVEX_0F3834) }, |
357 | { PREFIX_TABLE (PREFIX_EVEX_0F3835) }, |
357 | { PREFIX_TABLE (PREFIX_EVEX_0F3835) }, |
358 | { PREFIX_TABLE (PREFIX_EVEX_0F3836) }, |
358 | { PREFIX_TABLE (PREFIX_EVEX_0F3836) }, |
359 | { PREFIX_TABLE (PREFIX_EVEX_0F3837) }, |
359 | { PREFIX_TABLE (PREFIX_EVEX_0F3837) }, |
360 | /* 38 */ |
360 | /* 38 */ |
361 | { Bad_Opcode }, |
361 | { PREFIX_TABLE (PREFIX_EVEX_0F3838) }, |
362 | { PREFIX_TABLE (PREFIX_EVEX_0F3839) }, |
362 | { PREFIX_TABLE (PREFIX_EVEX_0F3839) }, |
363 | { PREFIX_TABLE (PREFIX_EVEX_0F383A) }, |
363 | { PREFIX_TABLE (PREFIX_EVEX_0F383A) }, |
364 | { PREFIX_TABLE (PREFIX_EVEX_0F383B) }, |
364 | { PREFIX_TABLE (PREFIX_EVEX_0F383B) }, |
365 | { Bad_Opcode }, |
365 | { PREFIX_TABLE (PREFIX_EVEX_0F383C) }, |
366 | { PREFIX_TABLE (PREFIX_EVEX_0F383D) }, |
366 | { PREFIX_TABLE (PREFIX_EVEX_0F383D) }, |
367 | { Bad_Opcode }, |
367 | { PREFIX_TABLE (PREFIX_EVEX_0F383E) }, |
368 | { PREFIX_TABLE (PREFIX_EVEX_0F383F) }, |
368 | { PREFIX_TABLE (PREFIX_EVEX_0F383F) }, |
369 | /* 40 */ |
369 | /* 40 */ |
370 | { PREFIX_TABLE (PREFIX_EVEX_0F3840) }, |
370 | { PREFIX_TABLE (PREFIX_EVEX_0F3840) }, |
371 | { Bad_Opcode }, |
371 | { Bad_Opcode }, |
372 | { PREFIX_TABLE (PREFIX_EVEX_0F3842) }, |
372 | { PREFIX_TABLE (PREFIX_EVEX_0F3842) }, |
Line 407... | Line 407... | ||
407 | { Bad_Opcode }, |
407 | { Bad_Opcode }, |
408 | { Bad_Opcode }, |
408 | { Bad_Opcode }, |
409 | { Bad_Opcode }, |
409 | { Bad_Opcode }, |
410 | { PREFIX_TABLE (PREFIX_EVEX_0F3864) }, |
410 | { PREFIX_TABLE (PREFIX_EVEX_0F3864) }, |
411 | { PREFIX_TABLE (PREFIX_EVEX_0F3865) }, |
411 | { PREFIX_TABLE (PREFIX_EVEX_0F3865) }, |
412 | { Bad_Opcode }, |
412 | { PREFIX_TABLE (PREFIX_EVEX_0F3866) }, |
413 | { Bad_Opcode }, |
413 | { Bad_Opcode }, |
414 | /* 68 */ |
414 | /* 68 */ |
415 | { Bad_Opcode }, |
415 | { Bad_Opcode }, |
416 | { Bad_Opcode }, |
416 | { Bad_Opcode }, |
417 | { Bad_Opcode }, |
417 | { Bad_Opcode }, |
Line 424... | Line 424... | ||
424 | { Bad_Opcode }, |
424 | { Bad_Opcode }, |
425 | { Bad_Opcode }, |
425 | { Bad_Opcode }, |
426 | { Bad_Opcode }, |
426 | { Bad_Opcode }, |
427 | { Bad_Opcode }, |
427 | { Bad_Opcode }, |
428 | { Bad_Opcode }, |
428 | { Bad_Opcode }, |
429 | { Bad_Opcode }, |
429 | { PREFIX_TABLE (PREFIX_EVEX_0F3875) }, |
430 | { PREFIX_TABLE (PREFIX_EVEX_0F3876) }, |
430 | { PREFIX_TABLE (PREFIX_EVEX_0F3876) }, |
431 | { PREFIX_TABLE (PREFIX_EVEX_0F3877) }, |
431 | { PREFIX_TABLE (PREFIX_EVEX_0F3877) }, |
432 | /* 78 */ |
432 | /* 78 */ |
433 | { Bad_Opcode }, |
433 | { PREFIX_TABLE (PREFIX_EVEX_0F3878) }, |
434 | { Bad_Opcode }, |
434 | { PREFIX_TABLE (PREFIX_EVEX_0F3879) }, |
435 | { Bad_Opcode }, |
435 | { PREFIX_TABLE (PREFIX_EVEX_0F387A) }, |
436 | { Bad_Opcode }, |
436 | { PREFIX_TABLE (PREFIX_EVEX_0F387B) }, |
437 | { PREFIX_TABLE (PREFIX_EVEX_0F387C) }, |
437 | { PREFIX_TABLE (PREFIX_EVEX_0F387C) }, |
438 | { Bad_Opcode }, |
438 | { PREFIX_TABLE (PREFIX_EVEX_0F387D) }, |
439 | { PREFIX_TABLE (PREFIX_EVEX_0F387E) }, |
439 | { PREFIX_TABLE (PREFIX_EVEX_0F387E) }, |
440 | { PREFIX_TABLE (PREFIX_EVEX_0F387F) }, |
440 | { PREFIX_TABLE (PREFIX_EVEX_0F387F) }, |
441 | /* 80 */ |
441 | /* 80 */ |
442 | { Bad_Opcode }, |
442 | { Bad_Opcode }, |
443 | { Bad_Opcode }, |
443 | { Bad_Opcode }, |
444 | { Bad_Opcode }, |
444 | { Bad_Opcode }, |
445 | { Bad_Opcode }, |
445 | { PREFIX_TABLE (PREFIX_EVEX_0F3883) }, |
446 | { Bad_Opcode }, |
446 | { Bad_Opcode }, |
447 | { Bad_Opcode }, |
447 | { Bad_Opcode }, |
448 | { Bad_Opcode }, |
448 | { Bad_Opcode }, |
449 | { Bad_Opcode }, |
449 | { Bad_Opcode }, |
450 | /* 88 */ |
450 | /* 88 */ |
451 | { PREFIX_TABLE (PREFIX_EVEX_0F3888) }, |
451 | { PREFIX_TABLE (PREFIX_EVEX_0F3888) }, |
452 | { PREFIX_TABLE (PREFIX_EVEX_0F3889) }, |
452 | { PREFIX_TABLE (PREFIX_EVEX_0F3889) }, |
453 | { PREFIX_TABLE (PREFIX_EVEX_0F388A) }, |
453 | { PREFIX_TABLE (PREFIX_EVEX_0F388A) }, |
454 | { PREFIX_TABLE (PREFIX_EVEX_0F388B) }, |
454 | { PREFIX_TABLE (PREFIX_EVEX_0F388B) }, |
455 | { Bad_Opcode }, |
455 | { Bad_Opcode }, |
456 | { Bad_Opcode }, |
456 | { PREFIX_TABLE (PREFIX_EVEX_0F388D) }, |
457 | { Bad_Opcode }, |
457 | { Bad_Opcode }, |
458 | { Bad_Opcode }, |
458 | { Bad_Opcode }, |
459 | /* 90 */ |
459 | /* 90 */ |
460 | { PREFIX_TABLE (PREFIX_EVEX_0F3890) }, |
460 | { PREFIX_TABLE (PREFIX_EVEX_0F3890) }, |
461 | { PREFIX_TABLE (PREFIX_EVEX_0F3891) }, |
461 | { PREFIX_TABLE (PREFIX_EVEX_0F3891) }, |
Line 495... | Line 495... | ||
495 | /* B0 */ |
495 | /* B0 */ |
496 | { Bad_Opcode }, |
496 | { Bad_Opcode }, |
497 | { Bad_Opcode }, |
497 | { Bad_Opcode }, |
498 | { Bad_Opcode }, |
498 | { Bad_Opcode }, |
499 | { Bad_Opcode }, |
499 | { Bad_Opcode }, |
500 | { Bad_Opcode }, |
500 | { PREFIX_TABLE (PREFIX_EVEX_0F38B4) }, |
501 | { Bad_Opcode }, |
501 | { PREFIX_TABLE (PREFIX_EVEX_0F38B5) }, |
502 | { PREFIX_TABLE (PREFIX_EVEX_0F38B6) }, |
502 | { PREFIX_TABLE (PREFIX_EVEX_0F38B6) }, |
503 | { PREFIX_TABLE (PREFIX_EVEX_0F38B7) }, |
503 | { PREFIX_TABLE (PREFIX_EVEX_0F38B7) }, |
504 | /* B8 */ |
504 | /* B8 */ |
505 | { PREFIX_TABLE (PREFIX_EVEX_0F38B8) }, |
505 | { PREFIX_TABLE (PREFIX_EVEX_0F38B8) }, |
506 | { PREFIX_TABLE (PREFIX_EVEX_0F38B9) }, |
506 | { PREFIX_TABLE (PREFIX_EVEX_0F38B9) }, |
Line 600... | Line 600... | ||
600 | { PREFIX_TABLE (PREFIX_EVEX_0F3A0A) }, |
600 | { PREFIX_TABLE (PREFIX_EVEX_0F3A0A) }, |
601 | { PREFIX_TABLE (PREFIX_EVEX_0F3A0B) }, |
601 | { PREFIX_TABLE (PREFIX_EVEX_0F3A0B) }, |
602 | { Bad_Opcode }, |
602 | { Bad_Opcode }, |
603 | { Bad_Opcode }, |
603 | { Bad_Opcode }, |
604 | { Bad_Opcode }, |
604 | { Bad_Opcode }, |
605 | { Bad_Opcode }, |
605 | { PREFIX_TABLE (PREFIX_EVEX_0F3A0F) }, |
606 | /* 10 */ |
606 | /* 10 */ |
607 | { Bad_Opcode }, |
607 | { Bad_Opcode }, |
608 | { Bad_Opcode }, |
608 | { Bad_Opcode }, |
609 | { Bad_Opcode }, |
609 | { Bad_Opcode }, |
610 | { Bad_Opcode }, |
610 | { Bad_Opcode }, |
611 | { Bad_Opcode }, |
611 | { PREFIX_TABLE (PREFIX_EVEX_0F3A14) }, |
612 | { Bad_Opcode }, |
612 | { PREFIX_TABLE (PREFIX_EVEX_0F3A15) }, |
613 | { Bad_Opcode }, |
613 | { PREFIX_TABLE (PREFIX_EVEX_0F3A16) }, |
614 | { PREFIX_TABLE (PREFIX_EVEX_0F3A17) }, |
614 | { PREFIX_TABLE (PREFIX_EVEX_0F3A17) }, |
615 | /* 18 */ |
615 | /* 18 */ |
616 | { PREFIX_TABLE (PREFIX_EVEX_0F3A18) }, |
616 | { PREFIX_TABLE (PREFIX_EVEX_0F3A18) }, |
617 | { PREFIX_TABLE (PREFIX_EVEX_0F3A19) }, |
617 | { PREFIX_TABLE (PREFIX_EVEX_0F3A19) }, |
618 | { PREFIX_TABLE (PREFIX_EVEX_0F3A1A) }, |
618 | { PREFIX_TABLE (PREFIX_EVEX_0F3A1A) }, |
Line 620... | Line 620... | ||
620 | { Bad_Opcode }, |
620 | { Bad_Opcode }, |
621 | { PREFIX_TABLE (PREFIX_EVEX_0F3A1D) }, |
621 | { PREFIX_TABLE (PREFIX_EVEX_0F3A1D) }, |
622 | { PREFIX_TABLE (PREFIX_EVEX_0F3A1E) }, |
622 | { PREFIX_TABLE (PREFIX_EVEX_0F3A1E) }, |
623 | { PREFIX_TABLE (PREFIX_EVEX_0F3A1F) }, |
623 | { PREFIX_TABLE (PREFIX_EVEX_0F3A1F) }, |
624 | /* 20 */ |
624 | /* 20 */ |
625 | { Bad_Opcode }, |
625 | { PREFIX_TABLE (PREFIX_EVEX_0F3A20) }, |
626 | { PREFIX_TABLE (PREFIX_EVEX_0F3A21) }, |
626 | { PREFIX_TABLE (PREFIX_EVEX_0F3A21) }, |
627 | { Bad_Opcode }, |
627 | { PREFIX_TABLE (PREFIX_EVEX_0F3A22) }, |
628 | { PREFIX_TABLE (PREFIX_EVEX_0F3A23) }, |
628 | { PREFIX_TABLE (PREFIX_EVEX_0F3A23) }, |
629 | { Bad_Opcode }, |
629 | { Bad_Opcode }, |
630 | { PREFIX_TABLE (PREFIX_EVEX_0F3A25) }, |
630 | { PREFIX_TABLE (PREFIX_EVEX_0F3A25) }, |
631 | { PREFIX_TABLE (PREFIX_EVEX_0F3A26) }, |
631 | { PREFIX_TABLE (PREFIX_EVEX_0F3A26) }, |
632 | { PREFIX_TABLE (PREFIX_EVEX_0F3A27) }, |
632 | { PREFIX_TABLE (PREFIX_EVEX_0F3A27) }, |
Line 653... | Line 653... | ||
653 | { PREFIX_TABLE (PREFIX_EVEX_0F3A39) }, |
653 | { PREFIX_TABLE (PREFIX_EVEX_0F3A39) }, |
654 | { PREFIX_TABLE (PREFIX_EVEX_0F3A3A) }, |
654 | { PREFIX_TABLE (PREFIX_EVEX_0F3A3A) }, |
655 | { PREFIX_TABLE (PREFIX_EVEX_0F3A3B) }, |
655 | { PREFIX_TABLE (PREFIX_EVEX_0F3A3B) }, |
656 | { Bad_Opcode }, |
656 | { Bad_Opcode }, |
657 | { Bad_Opcode }, |
657 | { Bad_Opcode }, |
658 | { Bad_Opcode }, |
658 | { PREFIX_TABLE (PREFIX_EVEX_0F3A3E) }, |
659 | { Bad_Opcode }, |
659 | { PREFIX_TABLE (PREFIX_EVEX_0F3A3F) }, |
660 | /* 40 */ |
660 | /* 40 */ |
661 | { Bad_Opcode }, |
661 | { Bad_Opcode }, |
662 | { Bad_Opcode }, |
662 | { Bad_Opcode }, |
663 | { Bad_Opcode }, |
663 | { PREFIX_TABLE (PREFIX_EVEX_0F3A42) }, |
664 | { PREFIX_TABLE (PREFIX_EVEX_0F3A43) }, |
664 | { PREFIX_TABLE (PREFIX_EVEX_0F3A43) }, |
665 | { Bad_Opcode }, |
665 | { Bad_Opcode }, |
666 | { Bad_Opcode }, |
666 | { Bad_Opcode }, |
667 | { Bad_Opcode }, |
667 | { Bad_Opcode }, |
668 | { Bad_Opcode }, |
668 | { Bad_Opcode }, |
Line 674... | Line 674... | ||
674 | { Bad_Opcode }, |
674 | { Bad_Opcode }, |
675 | { Bad_Opcode }, |
675 | { Bad_Opcode }, |
676 | { Bad_Opcode }, |
676 | { Bad_Opcode }, |
677 | { Bad_Opcode }, |
677 | { Bad_Opcode }, |
678 | /* 50 */ |
678 | /* 50 */ |
679 | { Bad_Opcode }, |
679 | { PREFIX_TABLE (PREFIX_EVEX_0F3A50) }, |
680 | { Bad_Opcode }, |
680 | { PREFIX_TABLE (PREFIX_EVEX_0F3A51) }, |
681 | { Bad_Opcode }, |
681 | { Bad_Opcode }, |
682 | { Bad_Opcode }, |
682 | { Bad_Opcode }, |
683 | { PREFIX_TABLE (PREFIX_EVEX_0F3A54) }, |
683 | { PREFIX_TABLE (PREFIX_EVEX_0F3A54) }, |
684 | { PREFIX_TABLE (PREFIX_EVEX_0F3A55) }, |
684 | { PREFIX_TABLE (PREFIX_EVEX_0F3A55) }, |
685 | { Bad_Opcode }, |
685 | { PREFIX_TABLE (PREFIX_EVEX_0F3A56) }, |
686 | { Bad_Opcode }, |
686 | { PREFIX_TABLE (PREFIX_EVEX_0F3A57) }, |
687 | /* 58 */ |
687 | /* 58 */ |
688 | { Bad_Opcode }, |
688 | { Bad_Opcode }, |
689 | { Bad_Opcode }, |
689 | { Bad_Opcode }, |
690 | { Bad_Opcode }, |
690 | { Bad_Opcode }, |
691 | { Bad_Opcode }, |
691 | { Bad_Opcode }, |
Line 698... | Line 698... | ||
698 | { Bad_Opcode }, |
698 | { Bad_Opcode }, |
699 | { Bad_Opcode }, |
699 | { Bad_Opcode }, |
700 | { Bad_Opcode }, |
700 | { Bad_Opcode }, |
701 | { Bad_Opcode }, |
701 | { Bad_Opcode }, |
702 | { Bad_Opcode }, |
702 | { Bad_Opcode }, |
703 | { Bad_Opcode }, |
703 | { PREFIX_TABLE (PREFIX_EVEX_0F3A66) }, |
704 | { Bad_Opcode }, |
704 | { PREFIX_TABLE (PREFIX_EVEX_0F3A67) }, |
705 | /* 68 */ |
705 | /* 68 */ |
706 | { Bad_Opcode }, |
706 | { Bad_Opcode }, |
707 | { Bad_Opcode }, |
707 | { Bad_Opcode }, |
708 | { Bad_Opcode }, |
708 | { Bad_Opcode }, |
709 | { Bad_Opcode }, |
709 | { Bad_Opcode }, |
Line 876... | Line 876... | ||
876 | }, |
876 | }, |
877 | }; |
877 | }; |
878 | #endif /* NEED_OPCODE_TABLE */ |
878 | #endif /* NEED_OPCODE_TABLE */ |
Line 879... | Line 879... | ||
879 | 879 | ||
- | 880 | #ifdef NEED_REG_TABLE |
|
- | 881 | /* REG_EVEX_0F71 */ |
|
- | 882 | { |
|
- | 883 | { Bad_Opcode }, |
|
- | 884 | { Bad_Opcode }, |
|
- | 885 | { PREFIX_TABLE (PREFIX_EVEX_0F71_REG_2) }, |
|
- | 886 | { Bad_Opcode }, |
|
- | 887 | { PREFIX_TABLE (PREFIX_EVEX_0F71_REG_4) }, |
|
- | 888 | { Bad_Opcode }, |
|
- | 889 | { PREFIX_TABLE (PREFIX_EVEX_0F71_REG_6) }, |
|
880 | #ifdef NEED_REG_TABLE |
890 | }, |
881 | /* REG_EVEX_0F72 */ |
891 | /* REG_EVEX_0F72 */ |
882 | { |
892 | { |
883 | { PREFIX_TABLE (PREFIX_EVEX_0F72_REG_0) }, |
893 | { PREFIX_TABLE (PREFIX_EVEX_0F72_REG_0) }, |
884 | { PREFIX_TABLE (PREFIX_EVEX_0F72_REG_1) }, |
894 | { PREFIX_TABLE (PREFIX_EVEX_0F72_REG_1) }, |
Line 891... | Line 901... | ||
891 | /* REG_EVEX_0F73 */ |
901 | /* REG_EVEX_0F73 */ |
892 | { |
902 | { |
893 | { Bad_Opcode }, |
903 | { Bad_Opcode }, |
894 | { Bad_Opcode }, |
904 | { Bad_Opcode }, |
895 | { PREFIX_TABLE (PREFIX_EVEX_0F73_REG_2) }, |
905 | { PREFIX_TABLE (PREFIX_EVEX_0F73_REG_2) }, |
896 | { Bad_Opcode }, |
906 | { PREFIX_TABLE (PREFIX_EVEX_0F73_REG_3) }, |
897 | { Bad_Opcode }, |
907 | { Bad_Opcode }, |
898 | { Bad_Opcode }, |
908 | { Bad_Opcode }, |
899 | { PREFIX_TABLE (PREFIX_EVEX_0F73_REG_6) }, |
909 | { PREFIX_TABLE (PREFIX_EVEX_0F73_REG_6) }, |
- | 910 | { PREFIX_TABLE (PREFIX_EVEX_0F73_REG_7) }, |
|
900 | }, |
911 | }, |
901 | /* REG_EVEX_0F38C6 */ |
912 | /* REG_EVEX_0F38C6 */ |
902 | { |
913 | { |
903 | { Bad_Opcode }, |
914 | { Bad_Opcode }, |
904 | { MOD_TABLE (MOD_EVEX_0F38C6_REG_1) }, |
915 | { MOD_TABLE (MOD_EVEX_0F38C6_REG_1) }, |
Line 998... | Line 1009... | ||
998 | { VEX_W_TABLE (EVEX_W_0F2B_P_2) }, |
1009 | { VEX_W_TABLE (EVEX_W_0F2B_P_2) }, |
999 | }, |
1010 | }, |
1000 | /* PREFIX_EVEX_0F2C */ |
1011 | /* PREFIX_EVEX_0F2C */ |
1001 | { |
1012 | { |
1002 | { Bad_Opcode }, |
1013 | { Bad_Opcode }, |
1003 | { "vcvttss2si", { Gdq, EXxmm_md, EXxEVexS } }, |
1014 | { "vcvttss2si", { Gdq, EXxmm_md, EXxEVexS }, 0 }, |
1004 | { Bad_Opcode }, |
1015 | { Bad_Opcode }, |
1005 | { "vcvttsd2si", { Gdq, EXxmm_mq, EXxEVexS } }, |
1016 | { "vcvttsd2si", { Gdq, EXxmm_mq, EXxEVexS }, 0 }, |
1006 | }, |
1017 | }, |
1007 | /* PREFIX_EVEX_0F2D */ |
1018 | /* PREFIX_EVEX_0F2D */ |
1008 | { |
1019 | { |
1009 | { Bad_Opcode }, |
1020 | { Bad_Opcode }, |
1010 | { "vcvtss2si", { Gdq, EXxmm_md, EXxEVexR } }, |
1021 | { "vcvtss2si", { Gdq, EXxmm_md, EXxEVexR }, 0 }, |
1011 | { Bad_Opcode }, |
1022 | { Bad_Opcode }, |
1012 | { "vcvtsd2si", { Gdq, EXxmm_mq, EXxEVexR } }, |
1023 | { "vcvtsd2si", { Gdq, EXxmm_mq, EXxEVexR }, 0 }, |
1013 | }, |
1024 | }, |
1014 | /* PREFIX_EVEX_0F2E */ |
1025 | /* PREFIX_EVEX_0F2E */ |
1015 | { |
1026 | { |
1016 | { VEX_W_TABLE (EVEX_W_0F2E_P_0) }, |
1027 | { VEX_W_TABLE (EVEX_W_0F2E_P_0) }, |
1017 | { Bad_Opcode }, |
1028 | { Bad_Opcode }, |
Line 1028... | Line 1039... | ||
1028 | { VEX_W_TABLE (EVEX_W_0F51_P_0) }, |
1039 | { VEX_W_TABLE (EVEX_W_0F51_P_0) }, |
1029 | { VEX_W_TABLE (EVEX_W_0F51_P_1) }, |
1040 | { VEX_W_TABLE (EVEX_W_0F51_P_1) }, |
1030 | { VEX_W_TABLE (EVEX_W_0F51_P_2) }, |
1041 | { VEX_W_TABLE (EVEX_W_0F51_P_2) }, |
1031 | { VEX_W_TABLE (EVEX_W_0F51_P_3) }, |
1042 | { VEX_W_TABLE (EVEX_W_0F51_P_3) }, |
1032 | }, |
1043 | }, |
- | 1044 | /* PREFIX_EVEX_0F54 */ |
|
- | 1045 | { |
|
- | 1046 | { VEX_W_TABLE (EVEX_W_0F54_P_0) }, |
|
- | 1047 | { Bad_Opcode }, |
|
- | 1048 | { VEX_W_TABLE (EVEX_W_0F54_P_2) }, |
|
- | 1049 | }, |
|
- | 1050 | /* PREFIX_EVEX_0F55 */ |
|
- | 1051 | { |
|
- | 1052 | { VEX_W_TABLE (EVEX_W_0F55_P_0) }, |
|
- | 1053 | { Bad_Opcode }, |
|
- | 1054 | { VEX_W_TABLE (EVEX_W_0F55_P_2) }, |
|
- | 1055 | }, |
|
- | 1056 | /* PREFIX_EVEX_0F56 */ |
|
- | 1057 | { |
|
- | 1058 | { VEX_W_TABLE (EVEX_W_0F56_P_0) }, |
|
- | 1059 | { Bad_Opcode }, |
|
- | 1060 | { VEX_W_TABLE (EVEX_W_0F56_P_2) }, |
|
- | 1061 | }, |
|
- | 1062 | /* PREFIX_EVEX_0F57 */ |
|
- | 1063 | { |
|
- | 1064 | { VEX_W_TABLE (EVEX_W_0F57_P_0) }, |
|
- | 1065 | { Bad_Opcode }, |
|
- | 1066 | { VEX_W_TABLE (EVEX_W_0F57_P_2) }, |
|
- | 1067 | }, |
|
1033 | /* PREFIX_EVEX_0F58 */ |
1068 | /* PREFIX_EVEX_0F58 */ |
1034 | { |
1069 | { |
1035 | { VEX_W_TABLE (EVEX_W_0F58_P_0) }, |
1070 | { VEX_W_TABLE (EVEX_W_0F58_P_0) }, |
1036 | { VEX_W_TABLE (EVEX_W_0F58_P_1) }, |
1071 | { VEX_W_TABLE (EVEX_W_0F58_P_1) }, |
1037 | { VEX_W_TABLE (EVEX_W_0F58_P_2) }, |
1072 | { VEX_W_TABLE (EVEX_W_0F58_P_2) }, |
Line 1083... | Line 1118... | ||
1083 | { VEX_W_TABLE (EVEX_W_0F5F_P_0) }, |
1118 | { VEX_W_TABLE (EVEX_W_0F5F_P_0) }, |
1084 | { VEX_W_TABLE (EVEX_W_0F5F_P_1) }, |
1119 | { VEX_W_TABLE (EVEX_W_0F5F_P_1) }, |
1085 | { VEX_W_TABLE (EVEX_W_0F5F_P_2) }, |
1120 | { VEX_W_TABLE (EVEX_W_0F5F_P_2) }, |
1086 | { VEX_W_TABLE (EVEX_W_0F5F_P_3) }, |
1121 | { VEX_W_TABLE (EVEX_W_0F5F_P_3) }, |
1087 | }, |
1122 | }, |
- | 1123 | /* PREFIX_EVEX_0F60 */ |
|
- | 1124 | { |
|
- | 1125 | { Bad_Opcode }, |
|
- | 1126 | { Bad_Opcode }, |
|
- | 1127 | { "vpunpcklbw", { XM, Vex, EXx }, 0 }, |
|
- | 1128 | }, |
|
- | 1129 | /* PREFIX_EVEX_0F61 */ |
|
- | 1130 | { |
|
- | 1131 | { Bad_Opcode }, |
|
- | 1132 | { Bad_Opcode }, |
|
- | 1133 | { "vpunpcklwd", { XM, Vex, EXx }, 0 }, |
|
- | 1134 | }, |
|
1088 | /* PREFIX_EVEX_0F62 */ |
1135 | /* PREFIX_EVEX_0F62 */ |
1089 | { |
1136 | { |
1090 | { Bad_Opcode }, |
1137 | { Bad_Opcode }, |
1091 | { Bad_Opcode }, |
1138 | { Bad_Opcode }, |
1092 | { VEX_W_TABLE (EVEX_W_0F62_P_2) }, |
1139 | { VEX_W_TABLE (EVEX_W_0F62_P_2) }, |
1093 | }, |
1140 | }, |
- | 1141 | /* PREFIX_EVEX_0F63 */ |
|
- | 1142 | { |
|
- | 1143 | { Bad_Opcode }, |
|
- | 1144 | { Bad_Opcode }, |
|
- | 1145 | { "vpacksswb", { XM, Vex, EXx }, 0 }, |
|
- | 1146 | }, |
|
- | 1147 | /* PREFIX_EVEX_0F64 */ |
|
- | 1148 | { |
|
- | 1149 | { Bad_Opcode }, |
|
- | 1150 | { Bad_Opcode }, |
|
- | 1151 | { "vpcmpgtb", { XMask, Vex, EXx }, 0 }, |
|
- | 1152 | }, |
|
- | 1153 | /* PREFIX_EVEX_0F65 */ |
|
- | 1154 | { |
|
- | 1155 | { Bad_Opcode }, |
|
- | 1156 | { Bad_Opcode }, |
|
- | 1157 | { "vpcmpgtw", { XMask, Vex, EXx }, 0 }, |
|
- | 1158 | }, |
|
1094 | /* PREFIX_EVEX_0F66 */ |
1159 | /* PREFIX_EVEX_0F66 */ |
1095 | { |
1160 | { |
1096 | { Bad_Opcode }, |
1161 | { Bad_Opcode }, |
1097 | { Bad_Opcode }, |
1162 | { Bad_Opcode }, |
1098 | { VEX_W_TABLE (EVEX_W_0F66_P_2) }, |
1163 | { VEX_W_TABLE (EVEX_W_0F66_P_2) }, |
1099 | }, |
1164 | }, |
- | 1165 | /* PREFIX_EVEX_0F67 */ |
|
- | 1166 | { |
|
- | 1167 | { Bad_Opcode }, |
|
- | 1168 | { Bad_Opcode }, |
|
- | 1169 | { "vpackuswb", { XM, Vex, EXx }, 0 }, |
|
- | 1170 | }, |
|
- | 1171 | /* PREFIX_EVEX_0F68 */ |
|
- | 1172 | { |
|
- | 1173 | { Bad_Opcode }, |
|
- | 1174 | { Bad_Opcode }, |
|
- | 1175 | { "vpunpckhbw", { XM, Vex, EXx }, 0 }, |
|
- | 1176 | }, |
|
- | 1177 | /* PREFIX_EVEX_0F69 */ |
|
- | 1178 | { |
|
- | 1179 | { Bad_Opcode }, |
|
- | 1180 | { Bad_Opcode }, |
|
- | 1181 | { "vpunpckhwd", { XM, Vex, EXx }, 0 }, |
|
- | 1182 | }, |
|
1100 | /* PREFIX_EVEX_0F6A */ |
1183 | /* PREFIX_EVEX_0F6A */ |
1101 | { |
1184 | { |
1102 | { Bad_Opcode }, |
1185 | { Bad_Opcode }, |
1103 | { Bad_Opcode }, |
1186 | { Bad_Opcode }, |
1104 | { VEX_W_TABLE (EVEX_W_0F6A_P_2) }, |
1187 | { VEX_W_TABLE (EVEX_W_0F6A_P_2) }, |
1105 | }, |
1188 | }, |
- | 1189 | /* PREFIX_EVEX_0F6B */ |
|
- | 1190 | { |
|
- | 1191 | { Bad_Opcode }, |
|
- | 1192 | { Bad_Opcode }, |
|
- | 1193 | { VEX_W_TABLE (EVEX_W_0F6B_P_2) }, |
|
- | 1194 | }, |
|
1106 | /* PREFIX_EVEX_0F6C */ |
1195 | /* PREFIX_EVEX_0F6C */ |
1107 | { |
1196 | { |
1108 | { Bad_Opcode }, |
1197 | { Bad_Opcode }, |
1109 | { Bad_Opcode }, |
1198 | { Bad_Opcode }, |
1110 | { VEX_W_TABLE (EVEX_W_0F6C_P_2) }, |
1199 | { VEX_W_TABLE (EVEX_W_0F6C_P_2) }, |
Line 1124... | Line 1213... | ||
1124 | /* PREFIX_EVEX_0F6F */ |
1213 | /* PREFIX_EVEX_0F6F */ |
1125 | { |
1214 | { |
1126 | { Bad_Opcode }, |
1215 | { Bad_Opcode }, |
1127 | { VEX_W_TABLE (EVEX_W_0F6F_P_1) }, |
1216 | { VEX_W_TABLE (EVEX_W_0F6F_P_1) }, |
1128 | { VEX_W_TABLE (EVEX_W_0F6F_P_2) }, |
1217 | { VEX_W_TABLE (EVEX_W_0F6F_P_2) }, |
- | 1218 | { VEX_W_TABLE (EVEX_W_0F6F_P_3) }, |
|
1129 | }, |
1219 | }, |
1130 | /* PREFIX_EVEX_0F70 */ |
1220 | /* PREFIX_EVEX_0F70 */ |
1131 | { |
1221 | { |
1132 | { Bad_Opcode }, |
1222 | { Bad_Opcode }, |
1133 | { Bad_Opcode }, |
1223 | { "vpshufhw", { XM, EXx, Ib }, 0 }, |
1134 | { VEX_W_TABLE (EVEX_W_0F70_P_2) }, |
1224 | { VEX_W_TABLE (EVEX_W_0F70_P_2) }, |
- | 1225 | { "vpshuflw", { XM, EXx, Ib }, 0 }, |
|
- | 1226 | }, |
|
- | 1227 | /* PREFIX_EVEX_0F71_REG_2 */ |
|
- | 1228 | { |
|
- | 1229 | { Bad_Opcode }, |
|
- | 1230 | { Bad_Opcode }, |
|
- | 1231 | { "vpsrlw", { Vex, EXx, Ib }, 0 }, |
|
- | 1232 | }, |
|
- | 1233 | /* PREFIX_EVEX_0F71_REG_4 */ |
|
- | 1234 | { |
|
- | 1235 | { Bad_Opcode }, |
|
- | 1236 | { Bad_Opcode }, |
|
- | 1237 | { "vpsraw", { Vex, EXx, Ib }, 0 }, |
|
- | 1238 | }, |
|
- | 1239 | /* PREFIX_EVEX_0F71_REG_6 */ |
|
- | 1240 | { |
|
- | 1241 | { Bad_Opcode }, |
|
- | 1242 | { Bad_Opcode }, |
|
- | 1243 | { "vpsllw", { Vex, EXx, Ib }, 0 }, |
|
1135 | }, |
1244 | }, |
1136 | /* PREFIX_EVEX_0F72_REG_0 */ |
1245 | /* PREFIX_EVEX_0F72_REG_0 */ |
1137 | { |
1246 | { |
1138 | { Bad_Opcode }, |
1247 | { Bad_Opcode }, |
1139 | { Bad_Opcode }, |
1248 | { Bad_Opcode }, |
1140 | { "vpror%LW", { Vex, EXx, Ib } }, |
1249 | { "vpror%LW", { Vex, EXx, Ib }, 0 }, |
1141 | }, |
1250 | }, |
1142 | /* PREFIX_EVEX_0F72_REG_1 */ |
1251 | /* PREFIX_EVEX_0F72_REG_1 */ |
1143 | { |
1252 | { |
1144 | { Bad_Opcode }, |
1253 | { Bad_Opcode }, |
1145 | { Bad_Opcode }, |
1254 | { Bad_Opcode }, |
1146 | { "vprol%LW", { Vex, EXx, Ib } }, |
1255 | { "vprol%LW", { Vex, EXx, Ib }, 0 }, |
1147 | }, |
1256 | }, |
1148 | /* PREFIX_EVEX_0F72_REG_2 */ |
1257 | /* PREFIX_EVEX_0F72_REG_2 */ |
1149 | { |
1258 | { |
1150 | { Bad_Opcode }, |
1259 | { Bad_Opcode }, |
1151 | { Bad_Opcode }, |
1260 | { Bad_Opcode }, |
Line 1153... | Line 1262... | ||
1153 | }, |
1262 | }, |
1154 | /* PREFIX_EVEX_0F72_REG_4 */ |
1263 | /* PREFIX_EVEX_0F72_REG_4 */ |
1155 | { |
1264 | { |
1156 | { Bad_Opcode }, |
1265 | { Bad_Opcode }, |
1157 | { Bad_Opcode }, |
1266 | { Bad_Opcode }, |
1158 | { "vpsra%LW", { Vex, EXx, Ib } }, |
1267 | { "vpsra%LW", { Vex, EXx, Ib }, 0 }, |
1159 | }, |
1268 | }, |
1160 | /* PREFIX_EVEX_0F72_REG_6 */ |
1269 | /* PREFIX_EVEX_0F72_REG_6 */ |
1161 | { |
1270 | { |
1162 | { Bad_Opcode }, |
1271 | { Bad_Opcode }, |
1163 | { Bad_Opcode }, |
1272 | { Bad_Opcode }, |
Line 1167... | Line 1276... | ||
1167 | { |
1276 | { |
1168 | { Bad_Opcode }, |
1277 | { Bad_Opcode }, |
1169 | { Bad_Opcode }, |
1278 | { Bad_Opcode }, |
1170 | { VEX_W_TABLE (EVEX_W_0F73_R_2_P_2) }, |
1279 | { VEX_W_TABLE (EVEX_W_0F73_R_2_P_2) }, |
1171 | }, |
1280 | }, |
- | 1281 | /* PREFIX_EVEX_0F73_REG_3 */ |
|
- | 1282 | { |
|
- | 1283 | { Bad_Opcode }, |
|
- | 1284 | { Bad_Opcode }, |
|
- | 1285 | { "vpsrldq", { Vex, EXx, Ib }, 0 }, |
|
- | 1286 | }, |
|
1172 | /* PREFIX_EVEX_0F73_REG_6 */ |
1287 | /* PREFIX_EVEX_0F73_REG_6 */ |
1173 | { |
1288 | { |
1174 | { Bad_Opcode }, |
1289 | { Bad_Opcode }, |
1175 | { Bad_Opcode }, |
1290 | { Bad_Opcode }, |
1176 | { VEX_W_TABLE (EVEX_W_0F73_R_6_P_2) }, |
1291 | { VEX_W_TABLE (EVEX_W_0F73_R_6_P_2) }, |
1177 | }, |
1292 | }, |
- | 1293 | /* PREFIX_EVEX_0F73_REG_7 */ |
|
- | 1294 | { |
|
- | 1295 | { Bad_Opcode }, |
|
- | 1296 | { Bad_Opcode }, |
|
- | 1297 | { "vpslldq", { Vex, EXx, Ib }, 0 }, |
|
- | 1298 | }, |
|
- | 1299 | /* PREFIX_EVEX_0F74 */ |
|
- | 1300 | { |
|
- | 1301 | { Bad_Opcode }, |
|
- | 1302 | { Bad_Opcode }, |
|
- | 1303 | { "vpcmpeqb", { XMask, Vex, EXx }, 0 }, |
|
- | 1304 | }, |
|
- | 1305 | /* PREFIX_EVEX_0F75 */ |
|
- | 1306 | { |
|
- | 1307 | { Bad_Opcode }, |
|
- | 1308 | { Bad_Opcode }, |
|
- | 1309 | { "vpcmpeqw", { XMask, Vex, EXx }, 0 }, |
|
- | 1310 | }, |
|
1178 | /* PREFIX_EVEX_0F76 */ |
1311 | /* PREFIX_EVEX_0F76 */ |
1179 | { |
1312 | { |
1180 | { Bad_Opcode }, |
1313 | { Bad_Opcode }, |
1181 | { Bad_Opcode }, |
1314 | { Bad_Opcode }, |
1182 | { VEX_W_TABLE (EVEX_W_0F76_P_2) }, |
1315 | { VEX_W_TABLE (EVEX_W_0F76_P_2) }, |
1183 | }, |
1316 | }, |
1184 | /* PREFIX_EVEX_0F78 */ |
1317 | /* PREFIX_EVEX_0F78 */ |
1185 | { |
1318 | { |
1186 | { VEX_W_TABLE (EVEX_W_0F78_P_0) }, |
1319 | { VEX_W_TABLE (EVEX_W_0F78_P_0) }, |
1187 | { "vcvttss2usi", { Gdq, EXxmm_md, EXxEVexS } }, |
1320 | { "vcvttss2usi", { Gdq, EXxmm_md, EXxEVexS }, 0 }, |
1188 | { Bad_Opcode }, |
1321 | { VEX_W_TABLE (EVEX_W_0F78_P_2) }, |
1189 | { "vcvttsd2usi", { Gdq, EXxmm_mq, EXxEVexS } }, |
1322 | { "vcvttsd2usi", { Gdq, EXxmm_mq, EXxEVexS }, 0 }, |
1190 | }, |
1323 | }, |
1191 | /* PREFIX_EVEX_0F79 */ |
1324 | /* PREFIX_EVEX_0F79 */ |
1192 | { |
1325 | { |
1193 | { VEX_W_TABLE (EVEX_W_0F79_P_0) }, |
1326 | { VEX_W_TABLE (EVEX_W_0F79_P_0) }, |
1194 | { "vcvtss2usi", { Gdq, EXxmm_md, EXxEVexR } }, |
1327 | { "vcvtss2usi", { Gdq, EXxmm_md, EXxEVexR }, 0 }, |
1195 | { Bad_Opcode }, |
1328 | { VEX_W_TABLE (EVEX_W_0F79_P_2) }, |
1196 | { "vcvtsd2usi", { Gdq, EXxmm_mq, EXxEVexR } }, |
1329 | { "vcvtsd2usi", { Gdq, EXxmm_mq, EXxEVexR }, 0 }, |
1197 | }, |
1330 | }, |
1198 | /* PREFIX_EVEX_0F7A */ |
1331 | /* PREFIX_EVEX_0F7A */ |
1199 | { |
1332 | { |
1200 | { Bad_Opcode }, |
1333 | { Bad_Opcode }, |
1201 | { VEX_W_TABLE (EVEX_W_0F7A_P_1) }, |
1334 | { VEX_W_TABLE (EVEX_W_0F7A_P_1) }, |
1202 | { Bad_Opcode }, |
1335 | { VEX_W_TABLE (EVEX_W_0F7A_P_2) }, |
1203 | { VEX_W_TABLE (EVEX_W_0F7A_P_3) }, |
1336 | { VEX_W_TABLE (EVEX_W_0F7A_P_3) }, |
1204 | }, |
1337 | }, |
1205 | /* PREFIX_EVEX_0F7B */ |
1338 | /* PREFIX_EVEX_0F7B */ |
1206 | { |
1339 | { |
1207 | { Bad_Opcode }, |
1340 | { Bad_Opcode }, |
1208 | { VEX_W_TABLE (EVEX_W_0F7B_P_1) }, |
1341 | { VEX_W_TABLE (EVEX_W_0F7B_P_1) }, |
1209 | { Bad_Opcode }, |
1342 | { VEX_W_TABLE (EVEX_W_0F7B_P_2) }, |
1210 | { VEX_W_TABLE (EVEX_W_0F7B_P_3) }, |
1343 | { VEX_W_TABLE (EVEX_W_0F7B_P_3) }, |
1211 | }, |
1344 | }, |
1212 | /* PREFIX_EVEX_0F7E */ |
1345 | /* PREFIX_EVEX_0F7E */ |
1213 | { |
1346 | { |
1214 | { Bad_Opcode }, |
1347 | { Bad_Opcode }, |
Line 1218... | Line 1351... | ||
1218 | /* PREFIX_EVEX_0F7F */ |
1351 | /* PREFIX_EVEX_0F7F */ |
1219 | { |
1352 | { |
1220 | { Bad_Opcode }, |
1353 | { Bad_Opcode }, |
1221 | { VEX_W_TABLE (EVEX_W_0F7F_P_1) }, |
1354 | { VEX_W_TABLE (EVEX_W_0F7F_P_1) }, |
1222 | { VEX_W_TABLE (EVEX_W_0F7F_P_2) }, |
1355 | { VEX_W_TABLE (EVEX_W_0F7F_P_2) }, |
- | 1356 | { VEX_W_TABLE (EVEX_W_0F7F_P_3) }, |
|
1223 | }, |
1357 | }, |
1224 | - | ||
1225 | /* PREFIX_EVEX_0FC2 */ |
1358 | /* PREFIX_EVEX_0FC2 */ |
1226 | { |
1359 | { |
1227 | { VEX_W_TABLE (EVEX_W_0FC2_P_0) }, |
1360 | { VEX_W_TABLE (EVEX_W_0FC2_P_0) }, |
1228 | { VEX_W_TABLE (EVEX_W_0FC2_P_1) }, |
1361 | { VEX_W_TABLE (EVEX_W_0FC2_P_1) }, |
1229 | { VEX_W_TABLE (EVEX_W_0FC2_P_2) }, |
1362 | { VEX_W_TABLE (EVEX_W_0FC2_P_2) }, |
1230 | { VEX_W_TABLE (EVEX_W_0FC2_P_3) }, |
1363 | { VEX_W_TABLE (EVEX_W_0FC2_P_3) }, |
1231 | }, |
1364 | }, |
- | 1365 | /* PREFIX_EVEX_0FC4 */ |
|
- | 1366 | { |
|
- | 1367 | { Bad_Opcode }, |
|
- | 1368 | { Bad_Opcode }, |
|
- | 1369 | { "vpinsrw", { XM, Vex128, Edw, Ib }, 0 }, |
|
- | 1370 | }, |
|
- | 1371 | /* PREFIX_EVEX_0FC5 */ |
|
- | 1372 | { |
|
- | 1373 | { Bad_Opcode }, |
|
- | 1374 | { Bad_Opcode }, |
|
- | 1375 | { "vpextrw", { Gdq, XS, Ib }, 0 }, |
|
- | 1376 | }, |
|
1232 | /* PREFIX_EVEX_0FC6 */ |
1377 | /* PREFIX_EVEX_0FC6 */ |
1233 | { |
1378 | { |
1234 | { VEX_W_TABLE (EVEX_W_0FC6_P_0) }, |
1379 | { VEX_W_TABLE (EVEX_W_0FC6_P_0) }, |
1235 | { Bad_Opcode }, |
1380 | { Bad_Opcode }, |
1236 | { VEX_W_TABLE (EVEX_W_0FC6_P_2) }, |
1381 | { VEX_W_TABLE (EVEX_W_0FC6_P_2) }, |
1237 | }, |
1382 | }, |
- | 1383 | /* PREFIX_EVEX_0FD1 */ |
|
- | 1384 | { |
|
- | 1385 | { Bad_Opcode }, |
|
- | 1386 | { Bad_Opcode }, |
|
- | 1387 | { "vpsrlw", { XM, Vex, EXxmm }, 0 }, |
|
- | 1388 | }, |
|
1238 | /* PREFIX_EVEX_0FD2 */ |
1389 | /* PREFIX_EVEX_0FD2 */ |
1239 | { |
1390 | { |
1240 | { Bad_Opcode }, |
1391 | { Bad_Opcode }, |
1241 | { Bad_Opcode }, |
1392 | { Bad_Opcode }, |
1242 | { VEX_W_TABLE (EVEX_W_0FD2_P_2) }, |
1393 | { VEX_W_TABLE (EVEX_W_0FD2_P_2) }, |
Line 1251... | Line 1402... | ||
1251 | { |
1402 | { |
1252 | { Bad_Opcode }, |
1403 | { Bad_Opcode }, |
1253 | { Bad_Opcode }, |
1404 | { Bad_Opcode }, |
1254 | { VEX_W_TABLE (EVEX_W_0FD4_P_2) }, |
1405 | { VEX_W_TABLE (EVEX_W_0FD4_P_2) }, |
1255 | }, |
1406 | }, |
- | 1407 | /* PREFIX_EVEX_0FD5 */ |
|
- | 1408 | { |
|
- | 1409 | { Bad_Opcode }, |
|
- | 1410 | { Bad_Opcode }, |
|
- | 1411 | { "vpmullw", { XM, Vex, EXx }, 0 }, |
|
- | 1412 | }, |
|
1256 | /* PREFIX_EVEX_0FD6 */ |
1413 | /* PREFIX_EVEX_0FD6 */ |
1257 | { |
1414 | { |
1258 | { Bad_Opcode }, |
1415 | { Bad_Opcode }, |
1259 | { Bad_Opcode }, |
1416 | { Bad_Opcode }, |
1260 | { VEX_W_TABLE (EVEX_W_0FD6_P_2) }, |
1417 | { VEX_W_TABLE (EVEX_W_0FD6_P_2) }, |
1261 | }, |
1418 | }, |
- | 1419 | /* PREFIX_EVEX_0FD8 */ |
|
- | 1420 | { |
|
- | 1421 | { Bad_Opcode }, |
|
- | 1422 | { Bad_Opcode }, |
|
- | 1423 | { "vpsubusb", { XM, Vex, EXx }, 0 }, |
|
- | 1424 | }, |
|
- | 1425 | /* PREFIX_EVEX_0FD9 */ |
|
- | 1426 | { |
|
- | 1427 | { Bad_Opcode }, |
|
- | 1428 | { Bad_Opcode }, |
|
- | 1429 | { "vpsubusw", { XM, Vex, EXx }, 0 }, |
|
- | 1430 | }, |
|
- | 1431 | /* PREFIX_EVEX_0FDA */ |
|
- | 1432 | { |
|
- | 1433 | { Bad_Opcode }, |
|
- | 1434 | { Bad_Opcode }, |
|
- | 1435 | { "vpminub", { XM, Vex, EXx }, 0 }, |
|
- | 1436 | }, |
|
1262 | /* PREFIX_EVEX_0FDB */ |
1437 | /* PREFIX_EVEX_0FDB */ |
1263 | { |
1438 | { |
1264 | { Bad_Opcode }, |
1439 | { Bad_Opcode }, |
1265 | { Bad_Opcode }, |
1440 | { Bad_Opcode }, |
1266 | { "vpand%LW", { XM, Vex, EXx } }, |
1441 | { "vpand%LW", { XM, Vex, EXx }, 0 }, |
- | 1442 | }, |
|
- | 1443 | /* PREFIX_EVEX_0FDC */ |
|
- | 1444 | { |
|
- | 1445 | { Bad_Opcode }, |
|
- | 1446 | { Bad_Opcode }, |
|
- | 1447 | { "vpaddusb", { XM, Vex, EXx }, 0 }, |
|
- | 1448 | }, |
|
- | 1449 | /* PREFIX_EVEX_0FDD */ |
|
- | 1450 | { |
|
- | 1451 | { Bad_Opcode }, |
|
- | 1452 | { Bad_Opcode }, |
|
- | 1453 | { "vpaddusw", { XM, Vex, EXx }, 0 }, |
|
- | 1454 | }, |
|
- | 1455 | /* PREFIX_EVEX_0FDE */ |
|
- | 1456 | { |
|
- | 1457 | { Bad_Opcode }, |
|
- | 1458 | { Bad_Opcode }, |
|
- | 1459 | { "vpmaxub", { XM, Vex, EXx }, 0 }, |
|
1267 | }, |
1460 | }, |
1268 | /* PREFIX_EVEX_0FDF */ |
1461 | /* PREFIX_EVEX_0FDF */ |
1269 | { |
1462 | { |
1270 | { Bad_Opcode }, |
1463 | { Bad_Opcode }, |
1271 | { Bad_Opcode }, |
1464 | { Bad_Opcode }, |
1272 | { "vpandn%LW", { XM, Vex, EXx } }, |
1465 | { "vpandn%LW", { XM, Vex, EXx }, 0 }, |
- | 1466 | }, |
|
- | 1467 | /* PREFIX_EVEX_0FE0 */ |
|
- | 1468 | { |
|
- | 1469 | { Bad_Opcode }, |
|
- | 1470 | { Bad_Opcode }, |
|
- | 1471 | { "vpavgb", { XM, Vex, EXx }, 0 }, |
|
- | 1472 | }, |
|
- | 1473 | /* PREFIX_EVEX_0FE1 */ |
|
- | 1474 | { |
|
- | 1475 | { Bad_Opcode }, |
|
- | 1476 | { Bad_Opcode }, |
|
- | 1477 | { "vpsraw", { XM, Vex, EXxmm }, 0 }, |
|
1273 | }, |
1478 | }, |
1274 | /* PREFIX_EVEX_0FE2 */ |
1479 | /* PREFIX_EVEX_0FE2 */ |
1275 | { |
1480 | { |
1276 | { Bad_Opcode }, |
1481 | { Bad_Opcode }, |
1277 | { Bad_Opcode }, |
1482 | { Bad_Opcode }, |
1278 | { "vpsra%LW", { XM, Vex, EXxmm } }, |
1483 | { "vpsra%LW", { XM, Vex, EXxmm }, 0 }, |
- | 1484 | }, |
|
- | 1485 | /* PREFIX_EVEX_0FE3 */ |
|
- | 1486 | { |
|
- | 1487 | { Bad_Opcode }, |
|
- | 1488 | { Bad_Opcode }, |
|
- | 1489 | { "vpavgw", { XM, Vex, EXx }, 0 }, |
|
- | 1490 | }, |
|
- | 1491 | /* PREFIX_EVEX_0FE4 */ |
|
- | 1492 | { |
|
- | 1493 | { Bad_Opcode }, |
|
- | 1494 | { Bad_Opcode }, |
|
- | 1495 | { "vpmulhuw", { XM, Vex, EXx }, 0 }, |
|
- | 1496 | }, |
|
- | 1497 | /* PREFIX_EVEX_0FE5 */ |
|
- | 1498 | { |
|
- | 1499 | { Bad_Opcode }, |
|
- | 1500 | { Bad_Opcode }, |
|
- | 1501 | { "vpmulhw", { XM, Vex, EXx }, 0 }, |
|
1279 | }, |
1502 | }, |
1280 | /* PREFIX_EVEX_0FE6 */ |
1503 | /* PREFIX_EVEX_0FE6 */ |
1281 | { |
1504 | { |
1282 | { Bad_Opcode }, |
1505 | { Bad_Opcode }, |
1283 | { VEX_W_TABLE (EVEX_W_0FE6_P_1) }, |
1506 | { VEX_W_TABLE (EVEX_W_0FE6_P_1) }, |
Line 1288... | Line 1511... | ||
1288 | { |
1511 | { |
1289 | { Bad_Opcode }, |
1512 | { Bad_Opcode }, |
1290 | { Bad_Opcode }, |
1513 | { Bad_Opcode }, |
1291 | { VEX_W_TABLE (EVEX_W_0FE7_P_2) }, |
1514 | { VEX_W_TABLE (EVEX_W_0FE7_P_2) }, |
1292 | }, |
1515 | }, |
- | 1516 | /* PREFIX_EVEX_0FE8 */ |
|
- | 1517 | { |
|
- | 1518 | { Bad_Opcode }, |
|
- | 1519 | { Bad_Opcode }, |
|
- | 1520 | { "vpsubsb", { XM, Vex, EXx }, 0 }, |
|
- | 1521 | }, |
|
- | 1522 | /* PREFIX_EVEX_0FE9 */ |
|
- | 1523 | { |
|
- | 1524 | { Bad_Opcode }, |
|
- | 1525 | { Bad_Opcode }, |
|
- | 1526 | { "vpsubsw", { XM, Vex, EXx }, 0 }, |
|
- | 1527 | }, |
|
- | 1528 | /* PREFIX_EVEX_0FEA */ |
|
- | 1529 | { |
|
- | 1530 | { Bad_Opcode }, |
|
- | 1531 | { Bad_Opcode }, |
|
- | 1532 | { "vpminsw", { XM, Vex, EXx }, 0 }, |
|
- | 1533 | }, |
|
1293 | /* PREFIX_EVEX_0FEB */ |
1534 | /* PREFIX_EVEX_0FEB */ |
1294 | { |
1535 | { |
1295 | { Bad_Opcode }, |
1536 | { Bad_Opcode }, |
1296 | { Bad_Opcode }, |
1537 | { Bad_Opcode }, |
1297 | { "vpor%LW", { XM, Vex, EXx } }, |
1538 | { "vpor%LW", { XM, Vex, EXx }, 0 }, |
- | 1539 | }, |
|
- | 1540 | /* PREFIX_EVEX_0FEC */ |
|
- | 1541 | { |
|
- | 1542 | { Bad_Opcode }, |
|
- | 1543 | { Bad_Opcode }, |
|
- | 1544 | { "vpaddsb", { XM, Vex, EXx }, 0 }, |
|
- | 1545 | }, |
|
- | 1546 | /* PREFIX_EVEX_0FED */ |
|
- | 1547 | { |
|
- | 1548 | { Bad_Opcode }, |
|
- | 1549 | { Bad_Opcode }, |
|
- | 1550 | { "vpaddsw", { XM, Vex, EXx }, 0 }, |
|
- | 1551 | }, |
|
- | 1552 | /* PREFIX_EVEX_0FEE */ |
|
- | 1553 | { |
|
- | 1554 | { Bad_Opcode }, |
|
- | 1555 | { Bad_Opcode }, |
|
- | 1556 | { "vpmaxsw", { XM, Vex, EXx }, 0 }, |
|
1298 | }, |
1557 | }, |
1299 | /* PREFIX_EVEX_0FEF */ |
1558 | /* PREFIX_EVEX_0FEF */ |
1300 | { |
1559 | { |
1301 | { Bad_Opcode }, |
1560 | { Bad_Opcode }, |
1302 | { Bad_Opcode }, |
1561 | { Bad_Opcode }, |
1303 | { "vpxor%LW", { XM, Vex, EXx } }, |
1562 | { "vpxor%LW", { XM, Vex, EXx }, 0 }, |
- | 1563 | }, |
|
- | 1564 | /* PREFIX_EVEX_0FF1 */ |
|
- | 1565 | { |
|
- | 1566 | { Bad_Opcode }, |
|
- | 1567 | { Bad_Opcode }, |
|
- | 1568 | { "vpsllw", { XM, Vex, EXxmm }, 0 }, |
|
1304 | }, |
1569 | }, |
1305 | /* PREFIX_EVEX_0FF2 */ |
1570 | /* PREFIX_EVEX_0FF2 */ |
1306 | { |
1571 | { |
1307 | { Bad_Opcode }, |
1572 | { Bad_Opcode }, |
1308 | { Bad_Opcode }, |
1573 | { Bad_Opcode }, |
Line 1318... | Line 1583... | ||
1318 | { |
1583 | { |
1319 | { Bad_Opcode }, |
1584 | { Bad_Opcode }, |
1320 | { Bad_Opcode }, |
1585 | { Bad_Opcode }, |
1321 | { VEX_W_TABLE (EVEX_W_0FF4_P_2) }, |
1586 | { VEX_W_TABLE (EVEX_W_0FF4_P_2) }, |
1322 | }, |
1587 | }, |
- | 1588 | /* PREFIX_EVEX_0FF5 */ |
|
- | 1589 | { |
|
- | 1590 | { Bad_Opcode }, |
|
- | 1591 | { Bad_Opcode }, |
|
- | 1592 | { "vpmaddwd", { XM, Vex, EXx }, 0 }, |
|
- | 1593 | }, |
|
- | 1594 | /* PREFIX_EVEX_0FF6 */ |
|
- | 1595 | { |
|
- | 1596 | { Bad_Opcode }, |
|
- | 1597 | { Bad_Opcode }, |
|
- | 1598 | { "vpsadbw", { XM, Vex, EXx }, 0 }, |
|
- | 1599 | }, |
|
- | 1600 | /* PREFIX_EVEX_0FF8 */ |
|
- | 1601 | { |
|
- | 1602 | { Bad_Opcode }, |
|
- | 1603 | { Bad_Opcode }, |
|
- | 1604 | { "vpsubb", { XM, Vex, EXx }, 0 }, |
|
- | 1605 | }, |
|
- | 1606 | /* PREFIX_EVEX_0FF9 */ |
|
- | 1607 | { |
|
- | 1608 | { Bad_Opcode }, |
|
- | 1609 | { Bad_Opcode }, |
|
- | 1610 | { "vpsubw", { XM, Vex, EXx }, 0 }, |
|
- | 1611 | }, |
|
1323 | /* PREFIX_EVEX_0FFA */ |
1612 | /* PREFIX_EVEX_0FFA */ |
1324 | { |
1613 | { |
1325 | { Bad_Opcode }, |
1614 | { Bad_Opcode }, |
1326 | { Bad_Opcode }, |
1615 | { Bad_Opcode }, |
1327 | { VEX_W_TABLE (EVEX_W_0FFA_P_2) }, |
1616 | { VEX_W_TABLE (EVEX_W_0FFA_P_2) }, |
Line 1330... | Line 1619... | ||
1330 | { |
1619 | { |
1331 | { Bad_Opcode }, |
1620 | { Bad_Opcode }, |
1332 | { Bad_Opcode }, |
1621 | { Bad_Opcode }, |
1333 | { VEX_W_TABLE (EVEX_W_0FFB_P_2) }, |
1622 | { VEX_W_TABLE (EVEX_W_0FFB_P_2) }, |
1334 | }, |
1623 | }, |
- | 1624 | /* PREFIX_EVEX_0FFC */ |
|
- | 1625 | { |
|
- | 1626 | { Bad_Opcode }, |
|
- | 1627 | { Bad_Opcode }, |
|
- | 1628 | { "vpaddb", { XM, Vex, EXx }, 0 }, |
|
- | 1629 | }, |
|
- | 1630 | /* PREFIX_EVEX_0FFD */ |
|
- | 1631 | { |
|
- | 1632 | { Bad_Opcode }, |
|
- | 1633 | { Bad_Opcode }, |
|
- | 1634 | { "vpaddw", { XM, Vex, EXx }, 0 }, |
|
- | 1635 | }, |
|
1335 | /* PREFIX_EVEX_0FFE */ |
1636 | /* PREFIX_EVEX_0FFE */ |
1336 | { |
1637 | { |
1337 | { Bad_Opcode }, |
1638 | { Bad_Opcode }, |
1338 | { Bad_Opcode }, |
1639 | { Bad_Opcode }, |
1339 | { VEX_W_TABLE (EVEX_W_0FFE_P_2) }, |
1640 | { VEX_W_TABLE (EVEX_W_0FFE_P_2) }, |
1340 | }, |
1641 | }, |
- | 1642 | /* PREFIX_EVEX_0F3800 */ |
|
1341 | 1643 | { |
|
- | 1644 | { Bad_Opcode }, |
|
- | 1645 | { Bad_Opcode }, |
|
- | 1646 | { "vpshufb", { XM, Vex, EXx }, 0 }, |
|
- | 1647 | }, |
|
- | 1648 | /* PREFIX_EVEX_0F3804 */ |
|
- | 1649 | { |
|
- | 1650 | { Bad_Opcode }, |
|
- | 1651 | { Bad_Opcode }, |
|
- | 1652 | { "vpmaddubsw", { XM, Vex, EXx }, 0 }, |
|
- | 1653 | }, |
|
- | 1654 | /* PREFIX_EVEX_0F380B */ |
|
- | 1655 | { |
|
- | 1656 | { Bad_Opcode }, |
|
- | 1657 | { Bad_Opcode }, |
|
- | 1658 | { "vpmulhrsw", { XM, Vex, EXx }, 0 }, |
|
- | 1659 | }, |
|
1342 | /* PREFIX_EVEX_0F380C */ |
1660 | /* PREFIX_EVEX_0F380C */ |
1343 | { |
1661 | { |
1344 | { Bad_Opcode }, |
1662 | { Bad_Opcode }, |
1345 | { Bad_Opcode }, |
1663 | { Bad_Opcode }, |
1346 | { VEX_W_TABLE (EVEX_W_0F380C_P_2) }, |
1664 | { VEX_W_TABLE (EVEX_W_0F380C_P_2) }, |
Line 1349... | Line 1667... | ||
1349 | { |
1667 | { |
1350 | { Bad_Opcode }, |
1668 | { Bad_Opcode }, |
1351 | { Bad_Opcode }, |
1669 | { Bad_Opcode }, |
1352 | { VEX_W_TABLE (EVEX_W_0F380D_P_2) }, |
1670 | { VEX_W_TABLE (EVEX_W_0F380D_P_2) }, |
1353 | }, |
1671 | }, |
- | 1672 | /* PREFIX_EVEX_0F3810 */ |
|
- | 1673 | { |
|
- | 1674 | { Bad_Opcode }, |
|
- | 1675 | { VEX_W_TABLE (EVEX_W_0F3810_P_1) }, |
|
- | 1676 | { VEX_W_TABLE (EVEX_W_0F3810_P_2) }, |
|
- | 1677 | }, |
|
1354 | /* PREFIX_EVEX_0F3811 */ |
1678 | /* PREFIX_EVEX_0F3811 */ |
1355 | { |
1679 | { |
1356 | { Bad_Opcode }, |
1680 | { Bad_Opcode }, |
1357 | { VEX_W_TABLE (EVEX_W_0F3811_P_1) }, |
1681 | { VEX_W_TABLE (EVEX_W_0F3811_P_1) }, |
- | 1682 | { VEX_W_TABLE (EVEX_W_0F3811_P_2) }, |
|
1358 | }, |
1683 | }, |
1359 | /* PREFIX_EVEX_0F3812 */ |
1684 | /* PREFIX_EVEX_0F3812 */ |
1360 | { |
1685 | { |
1361 | { Bad_Opcode }, |
1686 | { Bad_Opcode }, |
1362 | { VEX_W_TABLE (EVEX_W_0F3812_P_1) }, |
1687 | { VEX_W_TABLE (EVEX_W_0F3812_P_1) }, |
- | 1688 | { VEX_W_TABLE (EVEX_W_0F3812_P_2) }, |
|
1363 | }, |
1689 | }, |
1364 | /* PREFIX_EVEX_0F3813 */ |
1690 | /* PREFIX_EVEX_0F3813 */ |
1365 | { |
1691 | { |
1366 | { Bad_Opcode }, |
1692 | { Bad_Opcode }, |
1367 | { VEX_W_TABLE (EVEX_W_0F3813_P_1) }, |
1693 | { VEX_W_TABLE (EVEX_W_0F3813_P_1) }, |
Line 1369... | Line 1695... | ||
1369 | }, |
1695 | }, |
1370 | /* PREFIX_EVEX_0F3814 */ |
1696 | /* PREFIX_EVEX_0F3814 */ |
1371 | { |
1697 | { |
1372 | { Bad_Opcode }, |
1698 | { Bad_Opcode }, |
1373 | { VEX_W_TABLE (EVEX_W_0F3814_P_1) }, |
1699 | { VEX_W_TABLE (EVEX_W_0F3814_P_1) }, |
1374 | { "vprorv%LW", { XM, Vex, EXx } }, |
1700 | { "vprorv%LW", { XM, Vex, EXx }, 0 }, |
1375 | }, |
1701 | }, |
1376 | /* PREFIX_EVEX_0F3815 */ |
1702 | /* PREFIX_EVEX_0F3815 */ |
1377 | { |
1703 | { |
1378 | { Bad_Opcode }, |
1704 | { Bad_Opcode }, |
1379 | { VEX_W_TABLE (EVEX_W_0F3815_P_1) }, |
1705 | { VEX_W_TABLE (EVEX_W_0F3815_P_1) }, |
1380 | { "vprolv%LW", { XM, Vex, EXx } }, |
1706 | { "vprolv%LW", { XM, Vex, EXx }, 0 }, |
1381 | }, |
1707 | }, |
1382 | /* PREFIX_EVEX_0F3816 */ |
1708 | /* PREFIX_EVEX_0F3816 */ |
1383 | { |
1709 | { |
1384 | { Bad_Opcode }, |
1710 | { Bad_Opcode }, |
1385 | { Bad_Opcode }, |
1711 | { Bad_Opcode }, |
1386 | { "vpermp%XW", { XM, Vex, EXx } }, |
1712 | { "vpermp%XW", { XM, Vex, EXx }, 0 }, |
1387 | }, |
1713 | }, |
1388 | /* PREFIX_EVEX_0F3818 */ |
1714 | /* PREFIX_EVEX_0F3818 */ |
1389 | { |
1715 | { |
1390 | { Bad_Opcode }, |
1716 | { Bad_Opcode }, |
1391 | { Bad_Opcode }, |
1717 | { Bad_Opcode }, |
Line 1407... | Line 1733... | ||
1407 | { |
1733 | { |
1408 | { Bad_Opcode }, |
1734 | { Bad_Opcode }, |
1409 | { Bad_Opcode }, |
1735 | { Bad_Opcode }, |
1410 | { VEX_W_TABLE (EVEX_W_0F381B_P_2) }, |
1736 | { VEX_W_TABLE (EVEX_W_0F381B_P_2) }, |
1411 | }, |
1737 | }, |
- | 1738 | /* PREFIX_EVEX_0F381C */ |
|
- | 1739 | { |
|
- | 1740 | { Bad_Opcode }, |
|
- | 1741 | { Bad_Opcode }, |
|
- | 1742 | { "vpabsb", { XM, EXx }, 0 }, |
|
- | 1743 | }, |
|
- | 1744 | /* PREFIX_EVEX_0F381D */ |
|
- | 1745 | { |
|
- | 1746 | { Bad_Opcode }, |
|
- | 1747 | { Bad_Opcode }, |
|
- | 1748 | { "vpabsw", { XM, EXx }, 0 }, |
|
- | 1749 | }, |
|
1412 | /* PREFIX_EVEX_0F381E */ |
1750 | /* PREFIX_EVEX_0F381E */ |
1413 | { |
1751 | { |
1414 | { Bad_Opcode }, |
1752 | { Bad_Opcode }, |
1415 | { Bad_Opcode }, |
1753 | { Bad_Opcode }, |
1416 | { VEX_W_TABLE (EVEX_W_0F381E_P_2) }, |
1754 | { VEX_W_TABLE (EVEX_W_0F381E_P_2) }, |
Line 1419... | Line 1757... | ||
1419 | { |
1757 | { |
1420 | { Bad_Opcode }, |
1758 | { Bad_Opcode }, |
1421 | { Bad_Opcode }, |
1759 | { Bad_Opcode }, |
1422 | { VEX_W_TABLE (EVEX_W_0F381F_P_2) }, |
1760 | { VEX_W_TABLE (EVEX_W_0F381F_P_2) }, |
1423 | }, |
1761 | }, |
- | 1762 | /* PREFIX_EVEX_0F3820 */ |
|
- | 1763 | { |
|
- | 1764 | { Bad_Opcode }, |
|
- | 1765 | { VEX_W_TABLE (EVEX_W_0F3820_P_1) }, |
|
- | 1766 | { "vpmovsxbw", { XM, EXxmmq }, 0 }, |
|
- | 1767 | }, |
|
1424 | /* PREFIX_EVEX_0F3821 */ |
1768 | /* PREFIX_EVEX_0F3821 */ |
1425 | { |
1769 | { |
1426 | { Bad_Opcode }, |
1770 | { Bad_Opcode }, |
1427 | { VEX_W_TABLE (EVEX_W_0F3821_P_1) }, |
1771 | { VEX_W_TABLE (EVEX_W_0F3821_P_1) }, |
1428 | { "vpmovsxbd", { XM, EXxmmqd } }, |
1772 | { "vpmovsxbd", { XM, EXxmmqd }, 0 }, |
1429 | }, |
1773 | }, |
1430 | /* PREFIX_EVEX_0F3822 */ |
1774 | /* PREFIX_EVEX_0F3822 */ |
1431 | { |
1775 | { |
1432 | { Bad_Opcode }, |
1776 | { Bad_Opcode }, |
1433 | { VEX_W_TABLE (EVEX_W_0F3822_P_1) }, |
1777 | { VEX_W_TABLE (EVEX_W_0F3822_P_1) }, |
1434 | { "vpmovsxbq", { XM, EXxmmdw } }, |
1778 | { "vpmovsxbq", { XM, EXxmmdw }, 0 }, |
1435 | }, |
1779 | }, |
1436 | /* PREFIX_EVEX_0F3823 */ |
1780 | /* PREFIX_EVEX_0F3823 */ |
1437 | { |
1781 | { |
1438 | { Bad_Opcode }, |
1782 | { Bad_Opcode }, |
1439 | { VEX_W_TABLE (EVEX_W_0F3823_P_1) }, |
1783 | { VEX_W_TABLE (EVEX_W_0F3823_P_1) }, |
1440 | { "vpmovsxwd", { XM, EXxmmq } }, |
1784 | { "vpmovsxwd", { XM, EXxmmq }, 0 }, |
1441 | }, |
1785 | }, |
1442 | /* PREFIX_EVEX_0F3824 */ |
1786 | /* PREFIX_EVEX_0F3824 */ |
1443 | { |
1787 | { |
1444 | { Bad_Opcode }, |
1788 | { Bad_Opcode }, |
1445 | { VEX_W_TABLE (EVEX_W_0F3824_P_1) }, |
1789 | { VEX_W_TABLE (EVEX_W_0F3824_P_1) }, |
1446 | { "vpmovsxwq", { XM, EXxmmqd } }, |
1790 | { "vpmovsxwq", { XM, EXxmmqd }, 0 }, |
1447 | }, |
1791 | }, |
1448 | /* PREFIX_EVEX_0F3825 */ |
1792 | /* PREFIX_EVEX_0F3825 */ |
1449 | { |
1793 | { |
1450 | { Bad_Opcode }, |
1794 | { Bad_Opcode }, |
1451 | { VEX_W_TABLE (EVEX_W_0F3825_P_1) }, |
1795 | { VEX_W_TABLE (EVEX_W_0F3825_P_1) }, |
1452 | { VEX_W_TABLE (EVEX_W_0F3825_P_2) }, |
1796 | { VEX_W_TABLE (EVEX_W_0F3825_P_2) }, |
1453 | }, |
1797 | }, |
- | 1798 | /* PREFIX_EVEX_0F3826 */ |
|
- | 1799 | { |
|
- | 1800 | { Bad_Opcode }, |
|
- | 1801 | { VEX_W_TABLE (EVEX_W_0F3826_P_1) }, |
|
- | 1802 | { VEX_W_TABLE (EVEX_W_0F3826_P_2) }, |
|
- | 1803 | }, |
|
1454 | /* PREFIX_EVEX_0F3827 */ |
1804 | /* PREFIX_EVEX_0F3827 */ |
1455 | { |
1805 | { |
1456 | { Bad_Opcode }, |
1806 | { Bad_Opcode }, |
1457 | { "vptestnm%LW", { XMask, Vex, EXx } }, |
1807 | { "vptestnm%LW", { XMask, Vex, EXx }, 0 }, |
1458 | { "vptestm%LW", { XMask, Vex, EXx } }, |
1808 | { "vptestm%LW", { XMask, Vex, EXx }, 0 }, |
1459 | }, |
1809 | }, |
1460 | /* PREFIX_EVEX_0F3828 */ |
1810 | /* PREFIX_EVEX_0F3828 */ |
1461 | { |
1811 | { |
1462 | { Bad_Opcode }, |
1812 | { Bad_Opcode }, |
1463 | { Bad_Opcode }, |
1813 | { VEX_W_TABLE (EVEX_W_0F3828_P_1) }, |
1464 | { VEX_W_TABLE (EVEX_W_0F3828_P_2) }, |
1814 | { VEX_W_TABLE (EVEX_W_0F3828_P_2) }, |
1465 | }, |
1815 | }, |
1466 | /* PREFIX_EVEX_0F3829 */ |
1816 | /* PREFIX_EVEX_0F3829 */ |
1467 | { |
1817 | { |
1468 | { Bad_Opcode }, |
1818 | { Bad_Opcode }, |
1469 | { Bad_Opcode }, |
1819 | { VEX_W_TABLE (EVEX_W_0F3829_P_1) }, |
1470 | { VEX_W_TABLE (EVEX_W_0F3829_P_2) }, |
1820 | { VEX_W_TABLE (EVEX_W_0F3829_P_2) }, |
1471 | }, |
1821 | }, |
1472 | /* PREFIX_EVEX_0F382A */ |
1822 | /* PREFIX_EVEX_0F382A */ |
1473 | { |
1823 | { |
1474 | { Bad_Opcode }, |
1824 | { Bad_Opcode }, |
1475 | { VEX_W_TABLE (EVEX_W_0F382A_P_1) }, |
1825 | { VEX_W_TABLE (EVEX_W_0F382A_P_1) }, |
1476 | { VEX_W_TABLE (EVEX_W_0F382A_P_2) }, |
1826 | { VEX_W_TABLE (EVEX_W_0F382A_P_2) }, |
1477 | }, |
1827 | }, |
- | 1828 | /* PREFIX_EVEX_0F382B */ |
|
- | 1829 | { |
|
- | 1830 | { Bad_Opcode }, |
|
- | 1831 | { Bad_Opcode }, |
|
- | 1832 | { VEX_W_TABLE (EVEX_W_0F382B_P_2) }, |
|
- | 1833 | }, |
|
1478 | /* PREFIX_EVEX_0F382C */ |
1834 | /* PREFIX_EVEX_0F382C */ |
1479 | { |
1835 | { |
1480 | { Bad_Opcode }, |
1836 | { Bad_Opcode }, |
1481 | { Bad_Opcode }, |
1837 | { Bad_Opcode }, |
1482 | { "vscalefp%XW", { XM, Vex, EXx, EXxEVexR } }, |
1838 | { "vscalefp%XW", { XM, Vex, EXx, EXxEVexR }, 0 }, |
1483 | }, |
1839 | }, |
1484 | /* PREFIX_EVEX_0F382D */ |
1840 | /* PREFIX_EVEX_0F382D */ |
1485 | { |
1841 | { |
1486 | { Bad_Opcode }, |
1842 | { Bad_Opcode }, |
1487 | { Bad_Opcode }, |
1843 | { Bad_Opcode }, |
1488 | { "vscalefs%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR } }, |
1844 | { "vscalefs%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR }, 0 }, |
- | 1845 | }, |
|
- | 1846 | /* PREFIX_EVEX_0F3830 */ |
|
- | 1847 | { |
|
- | 1848 | { Bad_Opcode }, |
|
- | 1849 | { VEX_W_TABLE (EVEX_W_0F3830_P_1) }, |
|
- | 1850 | { "vpmovzxbw", { XM, EXxmmq }, 0 }, |
|
1489 | }, |
1851 | }, |
1490 | /* PREFIX_EVEX_0F3831 */ |
1852 | /* PREFIX_EVEX_0F3831 */ |
1491 | { |
1853 | { |
1492 | { Bad_Opcode }, |
1854 | { Bad_Opcode }, |
1493 | { VEX_W_TABLE (EVEX_W_0F3831_P_1) }, |
1855 | { VEX_W_TABLE (EVEX_W_0F3831_P_1) }, |
1494 | { "vpmovzxbd", { XM, EXxmmqd } }, |
1856 | { "vpmovzxbd", { XM, EXxmmqd }, 0 }, |
1495 | }, |
1857 | }, |
1496 | /* PREFIX_EVEX_0F3832 */ |
1858 | /* PREFIX_EVEX_0F3832 */ |
1497 | { |
1859 | { |
1498 | { Bad_Opcode }, |
1860 | { Bad_Opcode }, |
1499 | { VEX_W_TABLE (EVEX_W_0F3832_P_1) }, |
1861 | { VEX_W_TABLE (EVEX_W_0F3832_P_1) }, |
1500 | { "vpmovzxbq", { XM, EXxmmdw } }, |
1862 | { "vpmovzxbq", { XM, EXxmmdw }, 0 }, |
1501 | }, |
1863 | }, |
1502 | /* PREFIX_EVEX_0F3833 */ |
1864 | /* PREFIX_EVEX_0F3833 */ |
1503 | { |
1865 | { |
1504 | { Bad_Opcode }, |
1866 | { Bad_Opcode }, |
1505 | { VEX_W_TABLE (EVEX_W_0F3833_P_1) }, |
1867 | { VEX_W_TABLE (EVEX_W_0F3833_P_1) }, |
1506 | { "vpmovzxwd", { XM, EXxmmq } }, |
1868 | { "vpmovzxwd", { XM, EXxmmq }, 0 }, |
1507 | }, |
1869 | }, |
1508 | /* PREFIX_EVEX_0F3834 */ |
1870 | /* PREFIX_EVEX_0F3834 */ |
1509 | { |
1871 | { |
1510 | { Bad_Opcode }, |
1872 | { Bad_Opcode }, |
1511 | { VEX_W_TABLE (EVEX_W_0F3834_P_1) }, |
1873 | { VEX_W_TABLE (EVEX_W_0F3834_P_1) }, |
1512 | { "vpmovzxwq", { XM, EXxmmqd } }, |
1874 | { "vpmovzxwq", { XM, EXxmmqd }, 0 }, |
1513 | }, |
1875 | }, |
1514 | /* PREFIX_EVEX_0F3835 */ |
1876 | /* PREFIX_EVEX_0F3835 */ |
1515 | { |
1877 | { |
1516 | { Bad_Opcode }, |
1878 | { Bad_Opcode }, |
1517 | { VEX_W_TABLE (EVEX_W_0F3835_P_1) }, |
1879 | { VEX_W_TABLE (EVEX_W_0F3835_P_1) }, |
Line 1519... | Line 1881... | ||
1519 | }, |
1881 | }, |
1520 | /* PREFIX_EVEX_0F3836 */ |
1882 | /* PREFIX_EVEX_0F3836 */ |
1521 | { |
1883 | { |
1522 | { Bad_Opcode }, |
1884 | { Bad_Opcode }, |
1523 | { Bad_Opcode }, |
1885 | { Bad_Opcode }, |
1524 | { "vperm%LW", { XM, Vex, EXx } }, |
1886 | { "vperm%LW", { XM, Vex, EXx }, 0 }, |
1525 | }, |
1887 | }, |
1526 | /* PREFIX_EVEX_0F3837 */ |
1888 | /* PREFIX_EVEX_0F3837 */ |
1527 | { |
1889 | { |
1528 | { Bad_Opcode }, |
1890 | { Bad_Opcode }, |
1529 | { Bad_Opcode }, |
1891 | { Bad_Opcode }, |
1530 | { VEX_W_TABLE (EVEX_W_0F3837_P_2) }, |
1892 | { VEX_W_TABLE (EVEX_W_0F3837_P_2) }, |
1531 | }, |
1893 | }, |
1532 | /* PREFIX_EVEX_0F3839 */ |
1894 | /* PREFIX_EVEX_0F3838 */ |
1533 | { |
1895 | { |
1534 | { Bad_Opcode }, |
1896 | { Bad_Opcode }, |
- | 1897 | { VEX_W_TABLE (EVEX_W_0F3838_P_1) }, |
|
- | 1898 | { "vpminsb", { XM, Vex, EXx }, 0 }, |
|
- | 1899 | }, |
|
- | 1900 | /* PREFIX_EVEX_0F3839 */ |
|
- | 1901 | { |
|
1535 | { Bad_Opcode }, |
1902 | { Bad_Opcode }, |
- | 1903 | { VEX_W_TABLE (EVEX_W_0F3839_P_1) }, |
|
1536 | { "vpmins%LW", { XM, Vex, EXx } }, |
1904 | { "vpmins%LW", { XM, Vex, EXx }, 0 }, |
1537 | }, |
1905 | }, |
1538 | /* PREFIX_EVEX_0F383A */ |
1906 | /* PREFIX_EVEX_0F383A */ |
1539 | { |
1907 | { |
1540 | { Bad_Opcode }, |
1908 | { Bad_Opcode }, |
1541 | { VEX_W_TABLE (EVEX_W_0F383A_P_1) }, |
1909 | { VEX_W_TABLE (EVEX_W_0F383A_P_1) }, |
- | 1910 | { "vpminuw", { XM, Vex, EXx }, 0 }, |
|
1542 | }, |
1911 | }, |
1543 | /* PREFIX_EVEX_0F383B */ |
1912 | /* PREFIX_EVEX_0F383B */ |
1544 | { |
1913 | { |
1545 | { Bad_Opcode }, |
1914 | { Bad_Opcode }, |
1546 | { Bad_Opcode }, |
1915 | { Bad_Opcode }, |
1547 | { "vpminu%LW", { XM, Vex, EXx } }, |
1916 | { "vpminu%LW", { XM, Vex, EXx }, 0 }, |
- | 1917 | }, |
|
- | 1918 | /* PREFIX_EVEX_0F383C */ |
|
- | 1919 | { |
|
- | 1920 | { Bad_Opcode }, |
|
- | 1921 | { Bad_Opcode }, |
|
- | 1922 | { "vpmaxsb", { XM, Vex, EXx }, 0 }, |
|
1548 | }, |
1923 | }, |
1549 | /* PREFIX_EVEX_0F383D */ |
1924 | /* PREFIX_EVEX_0F383D */ |
1550 | { |
1925 | { |
1551 | { Bad_Opcode }, |
1926 | { Bad_Opcode }, |
1552 | { Bad_Opcode }, |
1927 | { Bad_Opcode }, |
1553 | { "vpmaxs%LW", { XM, Vex, EXx } }, |
1928 | { "vpmaxs%LW", { XM, Vex, EXx }, 0 }, |
- | 1929 | }, |
|
- | 1930 | /* PREFIX_EVEX_0F383E */ |
|
- | 1931 | { |
|
- | 1932 | { Bad_Opcode }, |
|
- | 1933 | { Bad_Opcode }, |
|
- | 1934 | { "vpmaxuw", { XM, Vex, EXx }, 0 }, |
|
1554 | }, |
1935 | }, |
1555 | /* PREFIX_EVEX_0F383F */ |
1936 | /* PREFIX_EVEX_0F383F */ |
1556 | { |
1937 | { |
1557 | { Bad_Opcode }, |
1938 | { Bad_Opcode }, |
1558 | { Bad_Opcode }, |
1939 | { Bad_Opcode }, |
1559 | { "vpmaxu%LW", { XM, Vex, EXx } }, |
1940 | { "vpmaxu%LW", { XM, Vex, EXx }, 0 }, |
1560 | }, |
1941 | }, |
1561 | /* PREFIX_EVEX_0F3840 */ |
1942 | /* PREFIX_EVEX_0F3840 */ |
1562 | { |
1943 | { |
1563 | { Bad_Opcode }, |
1944 | { Bad_Opcode }, |
1564 | { Bad_Opcode }, |
1945 | { Bad_Opcode }, |
Line 1566... | Line 1947... | ||
1566 | }, |
1947 | }, |
1567 | /* PREFIX_EVEX_0F3842 */ |
1948 | /* PREFIX_EVEX_0F3842 */ |
1568 | { |
1949 | { |
1569 | { Bad_Opcode }, |
1950 | { Bad_Opcode }, |
1570 | { Bad_Opcode }, |
1951 | { Bad_Opcode }, |
1571 | { "vgetexpp%XW", { XM, EXx, EXxEVexS } }, |
1952 | { "vgetexpp%XW", { XM, EXx, EXxEVexS }, 0 }, |
1572 | }, |
1953 | }, |
1573 | /* PREFIX_EVEX_0F3843 */ |
1954 | /* PREFIX_EVEX_0F3843 */ |
1574 | { |
1955 | { |
1575 | { Bad_Opcode }, |
1956 | { Bad_Opcode }, |
1576 | { Bad_Opcode }, |
1957 | { Bad_Opcode }, |
1577 | { "vgetexps%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexS } }, |
1958 | { "vgetexps%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexS }, 0 }, |
1578 | }, |
1959 | }, |
1579 | /* PREFIX_EVEX_0F3844 */ |
1960 | /* PREFIX_EVEX_0F3844 */ |
1580 | { |
1961 | { |
1581 | { Bad_Opcode }, |
1962 | { Bad_Opcode }, |
1582 | { Bad_Opcode }, |
1963 | { Bad_Opcode }, |
1583 | { "vplzcnt%LW", { XM, EXx } }, |
1964 | { "vplzcnt%LW", { XM, EXx }, 0 }, |
1584 | }, |
1965 | }, |
1585 | /* PREFIX_EVEX_0F3845 */ |
1966 | /* PREFIX_EVEX_0F3845 */ |
1586 | { |
1967 | { |
1587 | { Bad_Opcode }, |
1968 | { Bad_Opcode }, |
1588 | { Bad_Opcode }, |
1969 | { Bad_Opcode }, |
1589 | { "vpsrlv%LW", { XM, Vex, EXx } }, |
1970 | { "vpsrlv%LW", { XM, Vex, EXx }, 0 }, |
1590 | }, |
1971 | }, |
1591 | /* PREFIX_EVEX_0F3846 */ |
1972 | /* PREFIX_EVEX_0F3846 */ |
1592 | { |
1973 | { |
1593 | { Bad_Opcode }, |
1974 | { Bad_Opcode }, |
1594 | { Bad_Opcode }, |
1975 | { Bad_Opcode }, |
1595 | { "vpsrav%LW", { XM, Vex, EXx } }, |
1976 | { "vpsrav%LW", { XM, Vex, EXx }, 0 }, |
1596 | }, |
1977 | }, |
1597 | /* PREFIX_EVEX_0F3847 */ |
1978 | /* PREFIX_EVEX_0F3847 */ |
1598 | { |
1979 | { |
1599 | { Bad_Opcode }, |
1980 | { Bad_Opcode }, |
1600 | { Bad_Opcode }, |
1981 | { Bad_Opcode }, |
1601 | { "vpsllv%LW", { XM, Vex, EXx } }, |
1982 | { "vpsllv%LW", { XM, Vex, EXx }, 0 }, |
1602 | }, |
1983 | }, |
1603 | /* PREFIX_EVEX_0F384C */ |
1984 | /* PREFIX_EVEX_0F384C */ |
1604 | { |
1985 | { |
1605 | { Bad_Opcode }, |
1986 | { Bad_Opcode }, |
1606 | { Bad_Opcode }, |
1987 | { Bad_Opcode }, |
1607 | { "vrcp14p%XW", { XM, EXx } }, |
1988 | { "vrcp14p%XW", { XM, EXx }, 0 }, |
1608 | }, |
1989 | }, |
1609 | /* PREFIX_EVEX_0F384D */ |
1990 | /* PREFIX_EVEX_0F384D */ |
1610 | { |
1991 | { |
1611 | { Bad_Opcode }, |
1992 | { Bad_Opcode }, |
1612 | { Bad_Opcode }, |
1993 | { Bad_Opcode }, |
1613 | { "vrcp14s%XW", { XMScalar, VexScalar, EXxmm_mdq } }, |
1994 | { "vrcp14s%XW", { XMScalar, VexScalar, EXxmm_mdq }, 0 }, |
1614 | }, |
1995 | }, |
1615 | /* PREFIX_EVEX_0F384E */ |
1996 | /* PREFIX_EVEX_0F384E */ |
1616 | { |
1997 | { |
1617 | { Bad_Opcode }, |
1998 | { Bad_Opcode }, |
1618 | { Bad_Opcode }, |
1999 | { Bad_Opcode }, |
1619 | { "vrsqrt14p%XW", { XM, EXx } }, |
2000 | { "vrsqrt14p%XW", { XM, EXx }, 0 }, |
1620 | }, |
2001 | }, |
1621 | /* PREFIX_EVEX_0F384F */ |
2002 | /* PREFIX_EVEX_0F384F */ |
1622 | { |
2003 | { |
1623 | { Bad_Opcode }, |
2004 | { Bad_Opcode }, |
1624 | { Bad_Opcode }, |
2005 | { Bad_Opcode }, |
1625 | { "vrsqrt14s%XW", { XMScalar, VexScalar, EXxmm_mdq } }, |
2006 | { "vrsqrt14s%XW", { XMScalar, VexScalar, EXxmm_mdq }, 0 }, |
1626 | }, |
2007 | }, |
1627 | /* PREFIX_EVEX_0F3858 */ |
2008 | /* PREFIX_EVEX_0F3858 */ |
1628 | { |
2009 | { |
1629 | { Bad_Opcode }, |
2010 | { Bad_Opcode }, |
1630 | { Bad_Opcode }, |
2011 | { Bad_Opcode }, |
Line 1650... | Line 2031... | ||
1650 | }, |
2031 | }, |
1651 | /* PREFIX_EVEX_0F3864 */ |
2032 | /* PREFIX_EVEX_0F3864 */ |
1652 | { |
2033 | { |
1653 | { Bad_Opcode }, |
2034 | { Bad_Opcode }, |
1654 | { Bad_Opcode }, |
2035 | { Bad_Opcode }, |
1655 | { "vpblendm%LW", { XM, Vex, EXx } }, |
2036 | { "vpblendm%LW", { XM, Vex, EXx }, 0 }, |
1656 | }, |
2037 | }, |
1657 | /* PREFIX_EVEX_0F3865 */ |
2038 | /* PREFIX_EVEX_0F3865 */ |
1658 | { |
2039 | { |
1659 | { Bad_Opcode }, |
2040 | { Bad_Opcode }, |
1660 | { Bad_Opcode }, |
2041 | { Bad_Opcode }, |
1661 | { "vblendmp%XW", { XM, Vex, EXx } }, |
2042 | { "vblendmp%XW", { XM, Vex, EXx }, 0 }, |
- | 2043 | }, |
|
- | 2044 | /* PREFIX_EVEX_0F3866 */ |
|
- | 2045 | { |
|
- | 2046 | { Bad_Opcode }, |
|
- | 2047 | { Bad_Opcode }, |
|
- | 2048 | { VEX_W_TABLE (EVEX_W_0F3866_P_2) }, |
|
- | 2049 | }, |
|
- | 2050 | /* PREFIX_EVEX_0F3875 */ |
|
- | 2051 | { |
|
- | 2052 | { Bad_Opcode }, |
|
- | 2053 | { Bad_Opcode }, |
|
- | 2054 | { VEX_W_TABLE (EVEX_W_0F3875_P_2) }, |
|
1662 | }, |
2055 | }, |
1663 | /* PREFIX_EVEX_0F3876 */ |
2056 | /* PREFIX_EVEX_0F3876 */ |
1664 | { |
2057 | { |
1665 | { Bad_Opcode }, |
2058 | { Bad_Opcode }, |
1666 | { Bad_Opcode }, |
2059 | { Bad_Opcode }, |
1667 | { "vpermi2%LW", { XM, Vex, EXx } }, |
2060 | { "vpermi2%LW", { XM, Vex, EXx }, 0 }, |
1668 | }, |
2061 | }, |
1669 | /* PREFIX_EVEX_0F3877 */ |
2062 | /* PREFIX_EVEX_0F3877 */ |
1670 | { |
2063 | { |
1671 | { Bad_Opcode }, |
2064 | { Bad_Opcode }, |
1672 | { Bad_Opcode }, |
2065 | { Bad_Opcode }, |
1673 | { "vpermi2p%XW", { XM, Vex, EXx } }, |
2066 | { "vpermi2p%XW", { XM, Vex, EXx }, 0 }, |
- | 2067 | }, |
|
- | 2068 | /* PREFIX_EVEX_0F3878 */ |
|
- | 2069 | { |
|
- | 2070 | { Bad_Opcode }, |
|
- | 2071 | { Bad_Opcode }, |
|
- | 2072 | { VEX_W_TABLE (EVEX_W_0F3878_P_2) }, |
|
- | 2073 | }, |
|
- | 2074 | /* PREFIX_EVEX_0F3879 */ |
|
- | 2075 | { |
|
- | 2076 | { Bad_Opcode }, |
|
- | 2077 | { Bad_Opcode }, |
|
- | 2078 | { VEX_W_TABLE (EVEX_W_0F3879_P_2) }, |
|
- | 2079 | }, |
|
- | 2080 | /* PREFIX_EVEX_0F387A */ |
|
- | 2081 | { |
|
- | 2082 | { Bad_Opcode }, |
|
- | 2083 | { Bad_Opcode }, |
|
- | 2084 | { VEX_W_TABLE (EVEX_W_0F387A_P_2) }, |
|
- | 2085 | }, |
|
- | 2086 | /* PREFIX_EVEX_0F387B */ |
|
- | 2087 | { |
|
- | 2088 | { Bad_Opcode }, |
|
- | 2089 | { Bad_Opcode }, |
|
- | 2090 | { VEX_W_TABLE (EVEX_W_0F387B_P_2) }, |
|
1674 | }, |
2091 | }, |
1675 | /* PREFIX_EVEX_0F387C */ |
2092 | /* PREFIX_EVEX_0F387C */ |
1676 | { |
2093 | { |
1677 | { Bad_Opcode }, |
2094 | { Bad_Opcode }, |
1678 | { Bad_Opcode }, |
2095 | { Bad_Opcode }, |
1679 | { "vpbroadcast%LW", { XM, Rdq } }, |
2096 | { "vpbroadcast%LW", { XM, Rdq }, 0 }, |
- | 2097 | }, |
|
- | 2098 | /* PREFIX_EVEX_0F387D */ |
|
- | 2099 | { |
|
- | 2100 | { Bad_Opcode }, |
|
- | 2101 | { Bad_Opcode }, |
|
- | 2102 | { VEX_W_TABLE (EVEX_W_0F387D_P_2) }, |
|
1680 | }, |
2103 | }, |
1681 | /* PREFIX_EVEX_0F387E */ |
2104 | /* PREFIX_EVEX_0F387E */ |
1682 | { |
2105 | { |
1683 | { Bad_Opcode }, |
2106 | { Bad_Opcode }, |
1684 | { Bad_Opcode }, |
2107 | { Bad_Opcode }, |
1685 | { "vpermt2%LW", { XM, Vex, EXx } }, |
2108 | { "vpermt2%LW", { XM, Vex, EXx }, 0 }, |
1686 | }, |
2109 | }, |
1687 | /* PREFIX_EVEX_0F387F */ |
2110 | /* PREFIX_EVEX_0F387F */ |
1688 | { |
2111 | { |
1689 | { Bad_Opcode }, |
2112 | { Bad_Opcode }, |
1690 | { Bad_Opcode }, |
2113 | { Bad_Opcode }, |
1691 | { "vpermt2p%XW", { XM, Vex, EXx } }, |
2114 | { "vpermt2p%XW", { XM, Vex, EXx }, 0 }, |
- | 2115 | }, |
|
- | 2116 | /* PREFIX_EVEX_0F3883 */ |
|
- | 2117 | { |
|
- | 2118 | { Bad_Opcode }, |
|
- | 2119 | { Bad_Opcode }, |
|
- | 2120 | { VEX_W_TABLE (EVEX_W_0F3883_P_2) }, |
|
1692 | }, |
2121 | }, |
1693 | /* PREFIX_EVEX_0F3888 */ |
2122 | /* PREFIX_EVEX_0F3888 */ |
1694 | { |
2123 | { |
1695 | { Bad_Opcode }, |
2124 | { Bad_Opcode }, |
1696 | { Bad_Opcode }, |
2125 | { Bad_Opcode }, |
1697 | { "vexpandp%XW", { XM, EXEvexXGscat } }, |
2126 | { "vexpandp%XW", { XM, EXEvexXGscat }, 0 }, |
1698 | }, |
2127 | }, |
1699 | /* PREFIX_EVEX_0F3889 */ |
2128 | /* PREFIX_EVEX_0F3889 */ |
1700 | { |
2129 | { |
1701 | { Bad_Opcode }, |
2130 | { Bad_Opcode }, |
1702 | { Bad_Opcode }, |
2131 | { Bad_Opcode }, |
1703 | { "vpexpand%LW", { XM, EXEvexXGscat } }, |
2132 | { "vpexpand%LW", { XM, EXEvexXGscat }, 0 }, |
1704 | }, |
2133 | }, |
1705 | /* PREFIX_EVEX_0F388A */ |
2134 | /* PREFIX_EVEX_0F388A */ |
1706 | { |
2135 | { |
1707 | { Bad_Opcode }, |
2136 | { Bad_Opcode }, |
1708 | { Bad_Opcode }, |
2137 | { Bad_Opcode }, |
1709 | { "vcompressp%XW", { EXEvexXGscat, XM } }, |
2138 | { "vcompressp%XW", { EXEvexXGscat, XM }, 0 }, |
1710 | }, |
2139 | }, |
1711 | /* PREFIX_EVEX_0F388B */ |
2140 | /* PREFIX_EVEX_0F388B */ |
1712 | { |
2141 | { |
1713 | { Bad_Opcode }, |
2142 | { Bad_Opcode }, |
1714 | { Bad_Opcode }, |
2143 | { Bad_Opcode }, |
1715 | { "vpcompress%LW", { EXEvexXGscat, XM } }, |
2144 | { "vpcompress%LW", { EXEvexXGscat, XM }, 0 }, |
- | 2145 | }, |
|
- | 2146 | /* PREFIX_EVEX_0F388D */ |
|
- | 2147 | { |
|
- | 2148 | { Bad_Opcode }, |
|
- | 2149 | { Bad_Opcode }, |
|
- | 2150 | { VEX_W_TABLE (EVEX_W_0F388D_P_2) }, |
|
1716 | }, |
2151 | }, |
1717 | /* PREFIX_EVEX_0F3890 */ |
2152 | /* PREFIX_EVEX_0F3890 */ |
1718 | { |
2153 | { |
1719 | { Bad_Opcode }, |
2154 | { Bad_Opcode }, |
1720 | { Bad_Opcode }, |
2155 | { Bad_Opcode }, |
1721 | { "vpgatherd%LW", { XM, MVexVSIBDWpX } }, |
2156 | { "vpgatherd%LW", { XM, MVexVSIBDWpX }, 0 }, |
1722 | }, |
2157 | }, |
1723 | /* PREFIX_EVEX_0F3891 */ |
2158 | /* PREFIX_EVEX_0F3891 */ |
1724 | { |
2159 | { |
1725 | { Bad_Opcode }, |
2160 | { Bad_Opcode }, |
1726 | { Bad_Opcode }, |
2161 | { Bad_Opcode }, |
Line 1728... | Line 2163... | ||
1728 | }, |
2163 | }, |
1729 | /* PREFIX_EVEX_0F3892 */ |
2164 | /* PREFIX_EVEX_0F3892 */ |
1730 | { |
2165 | { |
1731 | { Bad_Opcode }, |
2166 | { Bad_Opcode }, |
1732 | { Bad_Opcode }, |
2167 | { Bad_Opcode }, |
1733 | { "vgatherdp%XW", { XM, MVexVSIBDWpX} }, |
2168 | { "vgatherdp%XW", { XM, MVexVSIBDWpX}, 0 }, |
1734 | }, |
2169 | }, |
1735 | /* PREFIX_EVEX_0F3893 */ |
2170 | /* PREFIX_EVEX_0F3893 */ |
1736 | { |
2171 | { |
1737 | { Bad_Opcode }, |
2172 | { Bad_Opcode }, |
1738 | { Bad_Opcode }, |
2173 | { Bad_Opcode }, |
Line 1740... | Line 2175... | ||
1740 | }, |
2175 | }, |
1741 | /* PREFIX_EVEX_0F3896 */ |
2176 | /* PREFIX_EVEX_0F3896 */ |
1742 | { |
2177 | { |
1743 | { Bad_Opcode }, |
2178 | { Bad_Opcode }, |
1744 | { Bad_Opcode }, |
2179 | { Bad_Opcode }, |
1745 | { "vfmaddsub132p%XW", { XM, Vex, EXx, EXxEVexR } }, |
2180 | { "vfmaddsub132p%XW", { XM, Vex, EXx, EXxEVexR }, 0 }, |
1746 | }, |
2181 | }, |
1747 | /* PREFIX_EVEX_0F3897 */ |
2182 | /* PREFIX_EVEX_0F3897 */ |
1748 | { |
2183 | { |
1749 | { Bad_Opcode }, |
2184 | { Bad_Opcode }, |
1750 | { Bad_Opcode }, |
2185 | { Bad_Opcode }, |
1751 | { "vfmsubadd132p%XW", { XM, Vex, EXx, EXxEVexR } }, |
2186 | { "vfmsubadd132p%XW", { XM, Vex, EXx, EXxEVexR }, 0 }, |
1752 | }, |
2187 | }, |
1753 | /* PREFIX_EVEX_0F3898 */ |
2188 | /* PREFIX_EVEX_0F3898 */ |
1754 | { |
2189 | { |
1755 | { Bad_Opcode }, |
2190 | { Bad_Opcode }, |
1756 | { Bad_Opcode }, |
2191 | { Bad_Opcode }, |
1757 | { "vfmadd132p%XW", { XM, Vex, EXx, EXxEVexR } }, |
2192 | { "vfmadd132p%XW", { XM, Vex, EXx, EXxEVexR }, 0 }, |
1758 | }, |
2193 | }, |
1759 | /* PREFIX_EVEX_0F3899 */ |
2194 | /* PREFIX_EVEX_0F3899 */ |
1760 | { |
2195 | { |
1761 | { Bad_Opcode }, |
2196 | { Bad_Opcode }, |
1762 | { Bad_Opcode }, |
2197 | { Bad_Opcode }, |
1763 | { "vfmadd132s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR } }, |
2198 | { "vfmadd132s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR }, 0 }, |
1764 | }, |
2199 | }, |
1765 | /* PREFIX_EVEX_0F389A */ |
2200 | /* PREFIX_EVEX_0F389A */ |
1766 | { |
2201 | { |
1767 | { Bad_Opcode }, |
2202 | { Bad_Opcode }, |
1768 | { Bad_Opcode }, |
2203 | { Bad_Opcode }, |
1769 | { "vfmsub132p%XW", { XM, Vex, EXx, EXxEVexR } }, |
2204 | { "vfmsub132p%XW", { XM, Vex, EXx, EXxEVexR }, 0 }, |
1770 | }, |
2205 | }, |
1771 | /* PREFIX_EVEX_0F389B */ |
2206 | /* PREFIX_EVEX_0F389B */ |
1772 | { |
2207 | { |
1773 | { Bad_Opcode }, |
2208 | { Bad_Opcode }, |
1774 | { Bad_Opcode }, |
2209 | { Bad_Opcode }, |
1775 | { "vfmsub132s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR } }, |
2210 | { "vfmsub132s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR }, 0 }, |
1776 | }, |
2211 | }, |
1777 | /* PREFIX_EVEX_0F389C */ |
2212 | /* PREFIX_EVEX_0F389C */ |
1778 | { |
2213 | { |
1779 | { Bad_Opcode }, |
2214 | { Bad_Opcode }, |
1780 | { Bad_Opcode }, |
2215 | { Bad_Opcode }, |
1781 | { "vfnmadd132p%XW", { XM, Vex, EXx, EXxEVexR } }, |
2216 | { "vfnmadd132p%XW", { XM, Vex, EXx, EXxEVexR }, 0 }, |
1782 | }, |
2217 | }, |
1783 | /* PREFIX_EVEX_0F389D */ |
2218 | /* PREFIX_EVEX_0F389D */ |
1784 | { |
2219 | { |
1785 | { Bad_Opcode }, |
2220 | { Bad_Opcode }, |
1786 | { Bad_Opcode }, |
2221 | { Bad_Opcode }, |
1787 | { "vfnmadd132s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR } }, |
2222 | { "vfnmadd132s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR }, 0 }, |
1788 | }, |
2223 | }, |
1789 | /* PREFIX_EVEX_0F389E */ |
2224 | /* PREFIX_EVEX_0F389E */ |
1790 | { |
2225 | { |
1791 | { Bad_Opcode }, |
2226 | { Bad_Opcode }, |
1792 | { Bad_Opcode }, |
2227 | { Bad_Opcode }, |
1793 | { "vfnmsub132p%XW", { XM, Vex, EXx, EXxEVexR } }, |
2228 | { "vfnmsub132p%XW", { XM, Vex, EXx, EXxEVexR }, 0 }, |
1794 | }, |
2229 | }, |
1795 | /* PREFIX_EVEX_0F389F */ |
2230 | /* PREFIX_EVEX_0F389F */ |
1796 | { |
2231 | { |
1797 | { Bad_Opcode }, |
2232 | { Bad_Opcode }, |
1798 | { Bad_Opcode }, |
2233 | { Bad_Opcode }, |
1799 | { "vfnmsub132s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR } }, |
2234 | { "vfnmsub132s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR }, 0 }, |
1800 | }, |
2235 | }, |
1801 | /* PREFIX_EVEX_0F38A0 */ |
2236 | /* PREFIX_EVEX_0F38A0 */ |
1802 | { |
2237 | { |
1803 | { Bad_Opcode }, |
2238 | { Bad_Opcode }, |
1804 | { Bad_Opcode }, |
2239 | { Bad_Opcode }, |
1805 | { "vpscatterd%LW", { MVexVSIBDWpX, XM } }, |
2240 | { "vpscatterd%LW", { MVexVSIBDWpX, XM }, 0 }, |
1806 | }, |
2241 | }, |
1807 | /* PREFIX_EVEX_0F38A1 */ |
2242 | /* PREFIX_EVEX_0F38A1 */ |
1808 | { |
2243 | { |
1809 | { Bad_Opcode }, |
2244 | { Bad_Opcode }, |
1810 | { Bad_Opcode }, |
2245 | { Bad_Opcode }, |
Line 1812... | Line 2247... | ||
1812 | }, |
2247 | }, |
1813 | /* PREFIX_EVEX_0F38A2 */ |
2248 | /* PREFIX_EVEX_0F38A2 */ |
1814 | { |
2249 | { |
1815 | { Bad_Opcode }, |
2250 | { Bad_Opcode }, |
1816 | { Bad_Opcode }, |
2251 | { Bad_Opcode }, |
1817 | { "vscatterdp%XW", { MVexVSIBDWpX, XM } }, |
2252 | { "vscatterdp%XW", { MVexVSIBDWpX, XM }, 0 }, |
1818 | }, |
2253 | }, |
1819 | /* PREFIX_EVEX_0F38A3 */ |
2254 | /* PREFIX_EVEX_0F38A3 */ |
1820 | { |
2255 | { |
1821 | { Bad_Opcode }, |
2256 | { Bad_Opcode }, |
1822 | { Bad_Opcode }, |
2257 | { Bad_Opcode }, |
Line 1824... | Line 2259... | ||
1824 | }, |
2259 | }, |
1825 | /* PREFIX_EVEX_0F38A6 */ |
2260 | /* PREFIX_EVEX_0F38A6 */ |
1826 | { |
2261 | { |
1827 | { Bad_Opcode }, |
2262 | { Bad_Opcode }, |
1828 | { Bad_Opcode }, |
2263 | { Bad_Opcode }, |
1829 | { "vfmaddsub213p%XW", { XM, Vex, EXx, EXxEVexR } }, |
2264 | { "vfmaddsub213p%XW", { XM, Vex, EXx, EXxEVexR }, 0 }, |
1830 | }, |
2265 | }, |
1831 | /* PREFIX_EVEX_0F38A7 */ |
2266 | /* PREFIX_EVEX_0F38A7 */ |
1832 | { |
2267 | { |
1833 | { Bad_Opcode }, |
2268 | { Bad_Opcode }, |
1834 | { Bad_Opcode }, |
2269 | { Bad_Opcode }, |
1835 | { "vfmsubadd213p%XW", { XM, Vex, EXx, EXxEVexR } }, |
2270 | { "vfmsubadd213p%XW", { XM, Vex, EXx, EXxEVexR }, 0 }, |
1836 | }, |
2271 | }, |
1837 | /* PREFIX_EVEX_0F38A8 */ |
2272 | /* PREFIX_EVEX_0F38A8 */ |
1838 | { |
2273 | { |
1839 | { Bad_Opcode }, |
2274 | { Bad_Opcode }, |
1840 | { Bad_Opcode }, |
2275 | { Bad_Opcode }, |
1841 | { "vfmadd213p%XW", { XM, Vex, EXx, EXxEVexR } }, |
2276 | { "vfmadd213p%XW", { XM, Vex, EXx, EXxEVexR }, 0 }, |
1842 | }, |
2277 | }, |
1843 | /* PREFIX_EVEX_0F38A9 */ |
2278 | /* PREFIX_EVEX_0F38A9 */ |
1844 | { |
2279 | { |
1845 | { Bad_Opcode }, |
2280 | { Bad_Opcode }, |
1846 | { Bad_Opcode }, |
2281 | { Bad_Opcode }, |
1847 | { "vfmadd213s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR } }, |
2282 | { "vfmadd213s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR }, 0 }, |
1848 | }, |
2283 | }, |
1849 | /* PREFIX_EVEX_0F38AA */ |
2284 | /* PREFIX_EVEX_0F38AA */ |
1850 | { |
2285 | { |
1851 | { Bad_Opcode }, |
2286 | { Bad_Opcode }, |
1852 | { Bad_Opcode }, |
2287 | { Bad_Opcode }, |
1853 | { "vfmsub213p%XW", { XM, Vex, EXx, EXxEVexR } }, |
2288 | { "vfmsub213p%XW", { XM, Vex, EXx, EXxEVexR }, 0 }, |
1854 | }, |
2289 | }, |
1855 | /* PREFIX_EVEX_0F38AB */ |
2290 | /* PREFIX_EVEX_0F38AB */ |
1856 | { |
2291 | { |
1857 | { Bad_Opcode }, |
2292 | { Bad_Opcode }, |
1858 | { Bad_Opcode }, |
2293 | { Bad_Opcode }, |
1859 | { "vfmsub213s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR } }, |
2294 | { "vfmsub213s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR }, 0 }, |
1860 | }, |
2295 | }, |
1861 | /* PREFIX_EVEX_0F38AC */ |
2296 | /* PREFIX_EVEX_0F38AC */ |
1862 | { |
2297 | { |
1863 | { Bad_Opcode }, |
2298 | { Bad_Opcode }, |
1864 | { Bad_Opcode }, |
2299 | { Bad_Opcode }, |
1865 | { "vfnmadd213p%XW", { XM, Vex, EXx, EXxEVexR } }, |
2300 | { "vfnmadd213p%XW", { XM, Vex, EXx, EXxEVexR }, 0 }, |
1866 | }, |
2301 | }, |
1867 | /* PREFIX_EVEX_0F38AD */ |
2302 | /* PREFIX_EVEX_0F38AD */ |
1868 | { |
2303 | { |
1869 | { Bad_Opcode }, |
2304 | { Bad_Opcode }, |
1870 | { Bad_Opcode }, |
2305 | { Bad_Opcode }, |
1871 | { "vfnmadd213s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR } }, |
2306 | { "vfnmadd213s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR }, 0 }, |
1872 | }, |
2307 | }, |
1873 | /* PREFIX_EVEX_0F38AE */ |
2308 | /* PREFIX_EVEX_0F38AE */ |
1874 | { |
2309 | { |
1875 | { Bad_Opcode }, |
2310 | { Bad_Opcode }, |
1876 | { Bad_Opcode }, |
2311 | { Bad_Opcode }, |
1877 | { "vfnmsub213p%XW", { XM, Vex, EXx, EXxEVexR } }, |
2312 | { "vfnmsub213p%XW", { XM, Vex, EXx, EXxEVexR }, 0 }, |
1878 | }, |
2313 | }, |
1879 | /* PREFIX_EVEX_0F38AF */ |
2314 | /* PREFIX_EVEX_0F38AF */ |
1880 | { |
2315 | { |
1881 | { Bad_Opcode }, |
2316 | { Bad_Opcode }, |
1882 | { Bad_Opcode }, |
2317 | { Bad_Opcode }, |
1883 | { "vfnmsub213s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR } }, |
2318 | { "vfnmsub213s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR }, 0 }, |
- | 2319 | }, |
|
- | 2320 | /* PREFIX_EVEX_0F38B4 */ |
|
- | 2321 | { |
|
- | 2322 | { Bad_Opcode }, |
|
- | 2323 | { Bad_Opcode }, |
|
- | 2324 | { "vpmadd52luq", { XM, Vex, EXx }, 0 }, |
|
- | 2325 | }, |
|
- | 2326 | /* PREFIX_EVEX_0F38B5 */ |
|
- | 2327 | { |
|
- | 2328 | { Bad_Opcode }, |
|
- | 2329 | { Bad_Opcode }, |
|
- | 2330 | { "vpmadd52huq", { XM, Vex, EXx }, 0 }, |
|
1884 | }, |
2331 | }, |
1885 | /* PREFIX_EVEX_0F38B6 */ |
2332 | /* PREFIX_EVEX_0F38B6 */ |
1886 | { |
2333 | { |
1887 | { Bad_Opcode }, |
2334 | { Bad_Opcode }, |
1888 | { Bad_Opcode }, |
2335 | { Bad_Opcode }, |
1889 | { "vfmaddsub231p%XW", { XM, Vex, EXx, EXxEVexR } }, |
2336 | { "vfmaddsub231p%XW", { XM, Vex, EXx, EXxEVexR }, 0 }, |
1890 | }, |
2337 | }, |
1891 | /* PREFIX_EVEX_0F38B7 */ |
2338 | /* PREFIX_EVEX_0F38B7 */ |
1892 | { |
2339 | { |
1893 | { Bad_Opcode }, |
2340 | { Bad_Opcode }, |
1894 | { Bad_Opcode }, |
2341 | { Bad_Opcode }, |
1895 | { "vfmsubadd231p%XW", { XM, Vex, EXx, EXxEVexR } }, |
2342 | { "vfmsubadd231p%XW", { XM, Vex, EXx, EXxEVexR }, 0 }, |
1896 | }, |
2343 | }, |
1897 | /* PREFIX_EVEX_0F38B8 */ |
2344 | /* PREFIX_EVEX_0F38B8 */ |
1898 | { |
2345 | { |
1899 | { Bad_Opcode }, |
2346 | { Bad_Opcode }, |
1900 | { Bad_Opcode }, |
2347 | { Bad_Opcode }, |
1901 | { "vfmadd231p%XW", { XM, Vex, EXx, EXxEVexR } }, |
2348 | { "vfmadd231p%XW", { XM, Vex, EXx, EXxEVexR }, 0 }, |
1902 | }, |
2349 | }, |
1903 | /* PREFIX_EVEX_0F38B9 */ |
2350 | /* PREFIX_EVEX_0F38B9 */ |
1904 | { |
2351 | { |
1905 | { Bad_Opcode }, |
2352 | { Bad_Opcode }, |
1906 | { Bad_Opcode }, |
2353 | { Bad_Opcode }, |
1907 | { "vfmadd231s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR } }, |
2354 | { "vfmadd231s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR }, 0 }, |
1908 | }, |
2355 | }, |
1909 | /* PREFIX_EVEX_0F38BA */ |
2356 | /* PREFIX_EVEX_0F38BA */ |
1910 | { |
2357 | { |
1911 | { Bad_Opcode }, |
2358 | { Bad_Opcode }, |
1912 | { Bad_Opcode }, |
2359 | { Bad_Opcode }, |
1913 | { "vfmsub231p%XW", { XM, Vex, EXx, EXxEVexR } }, |
2360 | { "vfmsub231p%XW", { XM, Vex, EXx, EXxEVexR }, 0 }, |
1914 | }, |
2361 | }, |
1915 | /* PREFIX_EVEX_0F38BB */ |
2362 | /* PREFIX_EVEX_0F38BB */ |
1916 | { |
2363 | { |
1917 | { Bad_Opcode }, |
2364 | { Bad_Opcode }, |
1918 | { Bad_Opcode }, |
2365 | { Bad_Opcode }, |
1919 | { "vfmsub231s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR } }, |
2366 | { "vfmsub231s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR }, 0 }, |
1920 | }, |
2367 | }, |
1921 | /* PREFIX_EVEX_0F38BC */ |
2368 | /* PREFIX_EVEX_0F38BC */ |
1922 | { |
2369 | { |
1923 | { Bad_Opcode }, |
2370 | { Bad_Opcode }, |
1924 | { Bad_Opcode }, |
2371 | { Bad_Opcode }, |
1925 | { "vfnmadd231p%XW", { XM, Vex, EXx, EXxEVexR } }, |
2372 | { "vfnmadd231p%XW", { XM, Vex, EXx, EXxEVexR }, 0 }, |
1926 | }, |
2373 | }, |
1927 | /* PREFIX_EVEX_0F38BD */ |
2374 | /* PREFIX_EVEX_0F38BD */ |
1928 | { |
2375 | { |
1929 | { Bad_Opcode }, |
2376 | { Bad_Opcode }, |
1930 | { Bad_Opcode }, |
2377 | { Bad_Opcode }, |
1931 | { "vfnmadd231s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR } }, |
2378 | { "vfnmadd231s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR }, 0 }, |
1932 | }, |
2379 | }, |
1933 | /* PREFIX_EVEX_0F38BE */ |
2380 | /* PREFIX_EVEX_0F38BE */ |
1934 | { |
2381 | { |
1935 | { Bad_Opcode }, |
2382 | { Bad_Opcode }, |
1936 | { Bad_Opcode }, |
2383 | { Bad_Opcode }, |
1937 | { "vfnmsub231p%XW", { XM, Vex, EXx, EXxEVexR } }, |
2384 | { "vfnmsub231p%XW", { XM, Vex, EXx, EXxEVexR }, 0 }, |
1938 | }, |
2385 | }, |
1939 | /* PREFIX_EVEX_0F38BF */ |
2386 | /* PREFIX_EVEX_0F38BF */ |
1940 | { |
2387 | { |
1941 | { Bad_Opcode }, |
2388 | { Bad_Opcode }, |
1942 | { Bad_Opcode }, |
2389 | { Bad_Opcode }, |
1943 | { "vfnmsub231s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR } }, |
2390 | { "vfnmsub231s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR }, 0 }, |
1944 | }, |
2391 | }, |
1945 | /* PREFIX_EVEX_0F38C4 */ |
2392 | /* PREFIX_EVEX_0F38C4 */ |
1946 | { |
2393 | { |
1947 | { Bad_Opcode }, |
2394 | { Bad_Opcode }, |
1948 | { Bad_Opcode }, |
2395 | { Bad_Opcode }, |
1949 | { "vpconflict%LW", { XM, EXx } }, |
2396 | { "vpconflict%LW", { XM, EXx }, 0 }, |
1950 | }, |
2397 | }, |
1951 | /* PREFIX_EVEX_0F38C6_REG_1 */ |
2398 | /* PREFIX_EVEX_0F38C6_REG_1 */ |
1952 | { |
2399 | { |
1953 | { Bad_Opcode }, |
2400 | { Bad_Opcode }, |
1954 | { Bad_Opcode }, |
2401 | { Bad_Opcode }, |
1955 | { "vgatherpf0dp%XW", { MVexVSIBDWpX } }, |
2402 | { "vgatherpf0dp%XW", { MVexVSIBDWpX }, 0 }, |
1956 | }, |
2403 | }, |
1957 | /* PREFIX_EVEX_0F38C6_REG_2 */ |
2404 | /* PREFIX_EVEX_0F38C6_REG_2 */ |
1958 | { |
2405 | { |
1959 | { Bad_Opcode }, |
2406 | { Bad_Opcode }, |
1960 | { Bad_Opcode }, |
2407 | { Bad_Opcode }, |
1961 | { "vgatherpf1dp%XW", { MVexVSIBDWpX } }, |
2408 | { "vgatherpf1dp%XW", { MVexVSIBDWpX }, 0 }, |
1962 | }, |
2409 | }, |
1963 | /* PREFIX_EVEX_0F38C6_REG_5 */ |
2410 | /* PREFIX_EVEX_0F38C6_REG_5 */ |
1964 | { |
2411 | { |
1965 | { Bad_Opcode }, |
2412 | { Bad_Opcode }, |
1966 | { Bad_Opcode }, |
2413 | { Bad_Opcode }, |
1967 | { "vscatterpf0dp%XW", { MVexVSIBDWpX } }, |
2414 | { "vscatterpf0dp%XW", { MVexVSIBDWpX }, 0 }, |
1968 | }, |
2415 | }, |
1969 | /* PREFIX_EVEX_0F38C6_REG_6 */ |
2416 | /* PREFIX_EVEX_0F38C6_REG_6 */ |
1970 | { |
2417 | { |
1971 | { Bad_Opcode }, |
2418 | { Bad_Opcode }, |
1972 | { Bad_Opcode }, |
2419 | { Bad_Opcode }, |
1973 | { "vscatterpf1dp%XW", { MVexVSIBDWpX } }, |
2420 | { "vscatterpf1dp%XW", { MVexVSIBDWpX }, 0 }, |
1974 | }, |
2421 | }, |
1975 | /* PREFIX_EVEX_0F38C7_REG_1 */ |
2422 | /* PREFIX_EVEX_0F38C7_REG_1 */ |
1976 | { |
2423 | { |
1977 | { Bad_Opcode }, |
2424 | { Bad_Opcode }, |
1978 | { Bad_Opcode }, |
2425 | { Bad_Opcode }, |
Line 1998... | Line 2445... | ||
1998 | }, |
2445 | }, |
1999 | /* PREFIX_EVEX_0F38C8 */ |
2446 | /* PREFIX_EVEX_0F38C8 */ |
2000 | { |
2447 | { |
2001 | { Bad_Opcode }, |
2448 | { Bad_Opcode }, |
2002 | { Bad_Opcode }, |
2449 | { Bad_Opcode }, |
2003 | { "vexp2p%XW", { XM, EXx, EXxEVexS } }, |
2450 | { "vexp2p%XW", { XM, EXx, EXxEVexS }, 0 }, |
2004 | }, |
2451 | }, |
2005 | /* PREFIX_EVEX_0F38CA */ |
2452 | /* PREFIX_EVEX_0F38CA */ |
2006 | { |
2453 | { |
2007 | { Bad_Opcode }, |
2454 | { Bad_Opcode }, |
2008 | { Bad_Opcode }, |
2455 | { Bad_Opcode }, |
2009 | { "vrcp28p%XW", { XM, EXx, EXxEVexS } }, |
2456 | { "vrcp28p%XW", { XM, EXx, EXxEVexS }, 0 }, |
2010 | }, |
2457 | }, |
2011 | /* PREFIX_EVEX_0F38CB */ |
2458 | /* PREFIX_EVEX_0F38CB */ |
2012 | { |
2459 | { |
2013 | { Bad_Opcode }, |
2460 | { Bad_Opcode }, |
2014 | { Bad_Opcode }, |
2461 | { Bad_Opcode }, |
2015 | { "vrcp28s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexS } }, |
2462 | { "vrcp28s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexS }, 0 }, |
2016 | }, |
2463 | }, |
2017 | /* PREFIX_EVEX_0F38CC */ |
2464 | /* PREFIX_EVEX_0F38CC */ |
2018 | { |
2465 | { |
2019 | { Bad_Opcode }, |
2466 | { Bad_Opcode }, |
2020 | { Bad_Opcode }, |
2467 | { Bad_Opcode }, |
2021 | { "vrsqrt28p%XW", { XM, EXx, EXxEVexS } }, |
2468 | { "vrsqrt28p%XW", { XM, EXx, EXxEVexS }, 0 }, |
2022 | }, |
2469 | }, |
2023 | /* PREFIX_EVEX_0F38CD */ |
2470 | /* PREFIX_EVEX_0F38CD */ |
2024 | { |
2471 | { |
2025 | { Bad_Opcode }, |
2472 | { Bad_Opcode }, |
2026 | { Bad_Opcode }, |
2473 | { Bad_Opcode }, |
2027 | { "vrsqrt28s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexS } }, |
2474 | { "vrsqrt28s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexS }, 0 }, |
2028 | }, |
2475 | }, |
2029 | /* PREFIX_EVEX_0F3A00 */ |
2476 | /* PREFIX_EVEX_0F3A00 */ |
2030 | { |
2477 | { |
2031 | { Bad_Opcode }, |
2478 | { Bad_Opcode }, |
2032 | { Bad_Opcode }, |
2479 | { Bad_Opcode }, |
Line 2040... | Line 2487... | ||
2040 | }, |
2487 | }, |
2041 | /* PREFIX_EVEX_0F3A03 */ |
2488 | /* PREFIX_EVEX_0F3A03 */ |
2042 | { |
2489 | { |
2043 | { Bad_Opcode }, |
2490 | { Bad_Opcode }, |
2044 | { Bad_Opcode }, |
2491 | { Bad_Opcode }, |
2045 | { "valign%LW", { XM, Vex, EXx, Ib } }, |
2492 | { "valign%LW", { XM, Vex, EXx, Ib }, 0 }, |
2046 | }, |
2493 | }, |
2047 | /* PREFIX_EVEX_0F3A04 */ |
2494 | /* PREFIX_EVEX_0F3A04 */ |
2048 | { |
2495 | { |
2049 | { Bad_Opcode }, |
2496 | { Bad_Opcode }, |
2050 | { Bad_Opcode }, |
2497 | { Bad_Opcode }, |
Line 2078... | Line 2525... | ||
2078 | { |
2525 | { |
2079 | { Bad_Opcode }, |
2526 | { Bad_Opcode }, |
2080 | { Bad_Opcode }, |
2527 | { Bad_Opcode }, |
2081 | { VEX_W_TABLE (EVEX_W_0F3A0B_P_2) }, |
2528 | { VEX_W_TABLE (EVEX_W_0F3A0B_P_2) }, |
2082 | }, |
2529 | }, |
- | 2530 | /* PREFIX_EVEX_0F3A0F */ |
|
- | 2531 | { |
|
- | 2532 | { Bad_Opcode }, |
|
- | 2533 | { Bad_Opcode }, |
|
- | 2534 | { "vpalignr", { XM, Vex, EXx, Ib }, 0 }, |
|
- | 2535 | }, |
|
- | 2536 | /* PREFIX_EVEX_0F3A14 */ |
|
- | 2537 | { |
|
- | 2538 | { Bad_Opcode }, |
|
- | 2539 | { Bad_Opcode }, |
|
- | 2540 | { "vpextrb", { Edqb, XM, Ib }, 0 }, |
|
- | 2541 | }, |
|
- | 2542 | /* PREFIX_EVEX_0F3A15 */ |
|
- | 2543 | { |
|
- | 2544 | { Bad_Opcode }, |
|
- | 2545 | { Bad_Opcode }, |
|
- | 2546 | { "vpextrw", { EdqwS, XM, Ib }, 0 }, |
|
- | 2547 | }, |
|
- | 2548 | /* PREFIX_EVEX_0F3A16 */ |
|
- | 2549 | { |
|
- | 2550 | { Bad_Opcode }, |
|
- | 2551 | { Bad_Opcode }, |
|
- | 2552 | { VEX_W_TABLE (EVEX_W_0F3A16_P_2) }, |
|
- | 2553 | }, |
|
2083 | /* PREFIX_EVEX_0F3A17 */ |
2554 | /* PREFIX_EVEX_0F3A17 */ |
2084 | { |
2555 | { |
2085 | { Bad_Opcode }, |
2556 | { Bad_Opcode }, |
2086 | { Bad_Opcode }, |
2557 | { Bad_Opcode }, |
2087 | { "vextractps", { Edqd, XMM, Ib } }, |
2558 | { "vextractps", { Edqd, XMM, Ib }, 0 }, |
2088 | }, |
2559 | }, |
2089 | /* PREFIX_EVEX_0F3A18 */ |
2560 | /* PREFIX_EVEX_0F3A18 */ |
2090 | { |
2561 | { |
2091 | { Bad_Opcode }, |
2562 | { Bad_Opcode }, |
2092 | { Bad_Opcode }, |
2563 | { Bad_Opcode }, |
Line 2118... | Line 2589... | ||
2118 | }, |
2589 | }, |
2119 | /* PREFIX_EVEX_0F3A1E */ |
2590 | /* PREFIX_EVEX_0F3A1E */ |
2120 | { |
2591 | { |
2121 | { Bad_Opcode }, |
2592 | { Bad_Opcode }, |
2122 | { Bad_Opcode }, |
2593 | { Bad_Opcode }, |
2123 | { "vpcmpu%LW", { XMask, Vex, EXx, VPCMP } }, |
2594 | { "vpcmpu%LW", { XMask, Vex, EXx, VPCMP }, 0 }, |
2124 | }, |
2595 | }, |
2125 | /* PREFIX_EVEX_0F3A1F */ |
2596 | /* PREFIX_EVEX_0F3A1F */ |
2126 | { |
2597 | { |
2127 | { Bad_Opcode }, |
2598 | { Bad_Opcode }, |
2128 | { Bad_Opcode }, |
2599 | { Bad_Opcode }, |
2129 | { "vpcmp%LW", { XMask, Vex, EXx, VPCMP } }, |
2600 | { "vpcmp%LW", { XMask, Vex, EXx, VPCMP }, 0 }, |
- | 2601 | }, |
|
- | 2602 | /* PREFIX_EVEX_0F3A20 */ |
|
- | 2603 | { |
|
- | 2604 | { Bad_Opcode }, |
|
- | 2605 | { Bad_Opcode }, |
|
- | 2606 | { "vpinsrb", { XM, Vex128, Edb, Ib }, 0 }, |
|
2130 | }, |
2607 | }, |
2131 | /* PREFIX_EVEX_0F3A21 */ |
2608 | /* PREFIX_EVEX_0F3A21 */ |
2132 | { |
2609 | { |
2133 | { Bad_Opcode }, |
2610 | { Bad_Opcode }, |
2134 | { Bad_Opcode }, |
2611 | { Bad_Opcode }, |
2135 | { VEX_W_TABLE (EVEX_W_0F3A21_P_2) }, |
2612 | { VEX_W_TABLE (EVEX_W_0F3A21_P_2) }, |
2136 | }, |
2613 | }, |
- | 2614 | /* PREFIX_EVEX_0F3A22 */ |
|
- | 2615 | { |
|
- | 2616 | { Bad_Opcode }, |
|
- | 2617 | { Bad_Opcode }, |
|
- | 2618 | { VEX_W_TABLE (EVEX_W_0F3A22_P_2) }, |
|
- | 2619 | }, |
|
2137 | /* PREFIX_EVEX_0F3A23 */ |
2620 | /* PREFIX_EVEX_0F3A23 */ |
2138 | { |
2621 | { |
2139 | { Bad_Opcode }, |
2622 | { Bad_Opcode }, |
2140 | { Bad_Opcode }, |
2623 | { Bad_Opcode }, |
2141 | { VEX_W_TABLE (EVEX_W_0F3A23_P_2) }, |
2624 | { VEX_W_TABLE (EVEX_W_0F3A23_P_2) }, |
2142 | }, |
2625 | }, |
2143 | /* PREFIX_EVEX_0F3A25 */ |
2626 | /* PREFIX_EVEX_0F3A25 */ |
2144 | { |
2627 | { |
2145 | { Bad_Opcode }, |
2628 | { Bad_Opcode }, |
2146 | { Bad_Opcode }, |
2629 | { Bad_Opcode }, |
2147 | { "vpternlog%LW", { XM, Vex, EXx, Ib } }, |
2630 | { "vpternlog%LW", { XM, Vex, EXx, Ib }, 0 }, |
2148 | }, |
2631 | }, |
2149 | /* PREFIX_EVEX_0F3A26 */ |
2632 | /* PREFIX_EVEX_0F3A26 */ |
2150 | { |
2633 | { |
2151 | { Bad_Opcode }, |
2634 | { Bad_Opcode }, |
2152 | { Bad_Opcode }, |
2635 | { Bad_Opcode }, |
2153 | { "vgetmantp%XW", { XM, EXx, EXxEVexS, Ib } }, |
2636 | { "vgetmantp%XW", { XM, EXx, EXxEVexS, Ib }, 0 }, |
2154 | }, |
2637 | }, |
2155 | /* PREFIX_EVEX_0F3A27 */ |
2638 | /* PREFIX_EVEX_0F3A27 */ |
2156 | { |
2639 | { |
2157 | { Bad_Opcode }, |
2640 | { Bad_Opcode }, |
2158 | { Bad_Opcode }, |
2641 | { Bad_Opcode }, |
2159 | { "vgetmants%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexS, Ib } }, |
2642 | { "vgetmants%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexS, Ib }, 0 }, |
2160 | }, |
2643 | }, |
2161 | /* PREFIX_EVEX_0F3A38 */ |
2644 | /* PREFIX_EVEX_0F3A38 */ |
2162 | { |
2645 | { |
2163 | { Bad_Opcode }, |
2646 | { Bad_Opcode }, |
2164 | { Bad_Opcode }, |
2647 | { Bad_Opcode }, |
Line 2180... | Line 2663... | ||
2180 | { |
2663 | { |
2181 | { Bad_Opcode }, |
2664 | { Bad_Opcode }, |
2182 | { Bad_Opcode }, |
2665 | { Bad_Opcode }, |
2183 | { VEX_W_TABLE (EVEX_W_0F3A3B_P_2) }, |
2666 | { VEX_W_TABLE (EVEX_W_0F3A3B_P_2) }, |
2184 | }, |
2667 | }, |
- | 2668 | /* PREFIX_EVEX_0F3A3E */ |
|
- | 2669 | { |
|
- | 2670 | { Bad_Opcode }, |
|
- | 2671 | { Bad_Opcode }, |
|
- | 2672 | { VEX_W_TABLE (EVEX_W_0F3A3E_P_2) }, |
|
- | 2673 | }, |
|
- | 2674 | /* PREFIX_EVEX_0F3A3F */ |
|
- | 2675 | { |
|
- | 2676 | { Bad_Opcode }, |
|
- | 2677 | { Bad_Opcode }, |
|
- | 2678 | { VEX_W_TABLE (EVEX_W_0F3A3F_P_2) }, |
|
- | 2679 | }, |
|
- | 2680 | /* PREFIX_EVEX_0F3A42 */ |
|
- | 2681 | { |
|
- | 2682 | { Bad_Opcode }, |
|
- | 2683 | { Bad_Opcode }, |
|
- | 2684 | { VEX_W_TABLE (EVEX_W_0F3A42_P_2) }, |
|
- | 2685 | }, |
|
2185 | /* PREFIX_EVEX_0F3A43 */ |
2686 | /* PREFIX_EVEX_0F3A43 */ |
2186 | { |
2687 | { |
2187 | { Bad_Opcode }, |
2688 | { Bad_Opcode }, |
2188 | { Bad_Opcode }, |
2689 | { Bad_Opcode }, |
2189 | { VEX_W_TABLE (EVEX_W_0F3A43_P_2) }, |
2690 | { VEX_W_TABLE (EVEX_W_0F3A43_P_2) }, |
2190 | }, |
2691 | }, |
- | 2692 | /* PREFIX_EVEX_0F3A50 */ |
|
- | 2693 | { |
|
- | 2694 | { Bad_Opcode }, |
|
- | 2695 | { Bad_Opcode }, |
|
- | 2696 | { VEX_W_TABLE (EVEX_W_0F3A50_P_2) }, |
|
- | 2697 | }, |
|
- | 2698 | /* PREFIX_EVEX_0F3A51 */ |
|
- | 2699 | { |
|
- | 2700 | { Bad_Opcode }, |
|
- | 2701 | { Bad_Opcode }, |
|
- | 2702 | { VEX_W_TABLE (EVEX_W_0F3A51_P_2) }, |
|
- | 2703 | }, |
|
2191 | /* PREFIX_EVEX_0F3A54 */ |
2704 | /* PREFIX_EVEX_0F3A54 */ |
2192 | { |
2705 | { |
2193 | { Bad_Opcode }, |
2706 | { Bad_Opcode }, |
2194 | { Bad_Opcode }, |
2707 | { Bad_Opcode }, |
2195 | { "vfixupimmp%XW", { XM, Vex, EXx, EXxEVexS, Ib } }, |
2708 | { "vfixupimmp%XW", { XM, Vex, EXx, EXxEVexS, Ib }, 0 }, |
2196 | }, |
2709 | }, |
2197 | /* PREFIX_EVEX_0F3A55 */ |
2710 | /* PREFIX_EVEX_0F3A55 */ |
2198 | { |
2711 | { |
2199 | { Bad_Opcode }, |
2712 | { Bad_Opcode }, |
2200 | { Bad_Opcode }, |
2713 | { Bad_Opcode }, |
2201 | { "vfixupimms%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexS, Ib } }, |
2714 | { "vfixupimms%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexS, Ib }, 0 }, |
- | 2715 | }, |
|
- | 2716 | /* PREFIX_EVEX_0F3A56 */ |
|
- | 2717 | { |
|
- | 2718 | { Bad_Opcode }, |
|
- | 2719 | { Bad_Opcode }, |
|
- | 2720 | { VEX_W_TABLE (EVEX_W_0F3A56_P_2) }, |
|
- | 2721 | }, |
|
- | 2722 | /* PREFIX_EVEX_0F3A57 */ |
|
- | 2723 | { |
|
- | 2724 | { Bad_Opcode }, |
|
- | 2725 | { Bad_Opcode }, |
|
- | 2726 | { VEX_W_TABLE (EVEX_W_0F3A57_P_2) }, |
|
- | 2727 | }, |
|
- | 2728 | /* PREFIX_EVEX_0F3A66 */ |
|
- | 2729 | { |
|
- | 2730 | { Bad_Opcode }, |
|
- | 2731 | { Bad_Opcode }, |
|
- | 2732 | { VEX_W_TABLE (EVEX_W_0F3A66_P_2) }, |
|
- | 2733 | }, |
|
- | 2734 | /* PREFIX_EVEX_0F3A67 */ |
|
- | 2735 | { |
|
- | 2736 | { Bad_Opcode }, |
|
- | 2737 | { Bad_Opcode }, |
|
- | 2738 | { VEX_W_TABLE (EVEX_W_0F3A67_P_2) }, |
|
2202 | }, |
2739 | }, |
2203 | #endif /* NEED_PREFIX_TABLE */ |
2740 | #endif /* NEED_PREFIX_TABLE */ |
Line 2204... | Line 2741... | ||
2204 | 2741 | ||
2205 | #ifdef NEED_VEX_W_TABLE |
2742 | #ifdef NEED_VEX_W_TABLE |
2206 | /* EVEX_W_0F10_P_0 */ |
2743 | /* EVEX_W_0F10_P_0 */ |
2207 | { |
2744 | { |
2208 | { "vmovups", { XM, EXEvexXNoBcst } }, |
2745 | { "vmovups", { XM, EXEvexXNoBcst }, 0 }, |
2209 | }, |
2746 | }, |
2210 | /* EVEX_W_0F10_P_1_M_0 */ |
2747 | /* EVEX_W_0F10_P_1_M_0 */ |
2211 | { |
2748 | { |
2212 | { "vmovss", { XMScalar, EXdScalar } }, |
2749 | { "vmovss", { XMScalar, EXdScalar }, 0 }, |
2213 | }, |
2750 | }, |
2214 | /* EVEX_W_0F10_P_1_M_1 */ |
2751 | /* EVEX_W_0F10_P_1_M_1 */ |
2215 | { |
2752 | { |
2216 | { "vmovss", { XMScalar, VexScalar, EXx } }, |
2753 | { "vmovss", { XMScalar, VexScalar, EXxmm_md }, 0 }, |
2217 | }, |
2754 | }, |
2218 | /* EVEX_W_0F10_P_2 */ |
2755 | /* EVEX_W_0F10_P_2 */ |
2219 | { |
2756 | { |
2220 | { Bad_Opcode }, |
2757 | { Bad_Opcode }, |
2221 | { "vmovupd", { XM, EXEvexXNoBcst } }, |
2758 | { "vmovupd", { XM, EXEvexXNoBcst }, 0 }, |
2222 | }, |
2759 | }, |
2223 | /* EVEX_W_0F10_P_3_M_0 */ |
2760 | /* EVEX_W_0F10_P_3_M_0 */ |
2224 | { |
2761 | { |
2225 | { Bad_Opcode }, |
2762 | { Bad_Opcode }, |
2226 | { "vmovsd", { XMScalar, EXqScalar } }, |
2763 | { "vmovsd", { XMScalar, EXqScalar }, 0 }, |
2227 | }, |
2764 | }, |
2228 | /* EVEX_W_0F10_P_3_M_1 */ |
2765 | /* EVEX_W_0F10_P_3_M_1 */ |
2229 | { |
2766 | { |
2230 | { Bad_Opcode }, |
2767 | { Bad_Opcode }, |
2231 | { "vmovsd", { XMScalar, VexScalar, EXx } }, |
2768 | { "vmovsd", { XMScalar, VexScalar, EXxmm_mq }, 0 }, |
2232 | }, |
2769 | }, |
2233 | /* EVEX_W_0F11_P_0 */ |
2770 | /* EVEX_W_0F11_P_0 */ |
2234 | { |
2771 | { |
2235 | { "vmovups", { EXxS, XM } }, |
2772 | { "vmovups", { EXxS, XM }, 0 }, |
2236 | }, |
2773 | }, |
2237 | /* EVEX_W_0F11_P_1_M_0 */ |
2774 | /* EVEX_W_0F11_P_1_M_0 */ |
2238 | { |
2775 | { |
2239 | { "vmovss", { EXdScalarS, XMScalar } }, |
2776 | { "vmovss", { EXdScalarS, XMScalar }, 0 }, |
2240 | }, |
2777 | }, |
2241 | /* EVEX_W_0F11_P_1_M_1 */ |
2778 | /* EVEX_W_0F11_P_1_M_1 */ |
2242 | { |
2779 | { |
2243 | { "vmovss", { EXxS, Vex, XMScalar } }, |
2780 | { "vmovss", { EXxS, Vex, XMScalar }, 0 }, |
2244 | }, |
2781 | }, |
2245 | /* EVEX_W_0F11_P_2 */ |
2782 | /* EVEX_W_0F11_P_2 */ |
2246 | { |
2783 | { |
2247 | { Bad_Opcode }, |
2784 | { Bad_Opcode }, |
2248 | { "vmovupd", { EXxS, XM } }, |
2785 | { "vmovupd", { EXxS, XM }, 0 }, |
2249 | }, |
2786 | }, |
2250 | /* EVEX_W_0F11_P_3_M_0 */ |
2787 | /* EVEX_W_0F11_P_3_M_0 */ |
2251 | { |
2788 | { |
2252 | { Bad_Opcode }, |
2789 | { Bad_Opcode }, |
2253 | { "vmovsd", { EXqScalarS, XMScalar } }, |
2790 | { "vmovsd", { EXqScalarS, XMScalar }, 0 }, |
2254 | }, |
2791 | }, |
2255 | /* EVEX_W_0F11_P_3_M_1 */ |
2792 | /* EVEX_W_0F11_P_3_M_1 */ |
2256 | { |
2793 | { |
2257 | { Bad_Opcode }, |
2794 | { Bad_Opcode }, |
2258 | { "vmovsd", { EXxS, Vex, XMScalar } }, |
2795 | { "vmovsd", { EXxS, Vex, XMScalar }, 0 }, |
2259 | }, |
2796 | }, |
2260 | /* EVEX_W_0F12_P_0_M_0 */ |
2797 | /* EVEX_W_0F12_P_0_M_0 */ |
2261 | { |
2798 | { |
2262 | { "vmovlps", { XMM, Vex, EXxmm_mq } }, |
2799 | { "vmovlps", { XMM, Vex, EXxmm_mq }, 0 }, |
2263 | }, |
2800 | }, |
2264 | /* EVEX_W_0F12_P_0_M_1 */ |
2801 | /* EVEX_W_0F12_P_0_M_1 */ |
2265 | { |
2802 | { |
2266 | { "vmovhlps", { XMM, Vex, EXxmm_mq } }, |
2803 | { "vmovhlps", { XMM, Vex, EXxmm_mq }, 0 }, |
2267 | }, |
2804 | }, |
2268 | /* EVEX_W_0F12_P_1 */ |
2805 | /* EVEX_W_0F12_P_1 */ |
2269 | { |
2806 | { |
2270 | { "vmovsldup", { XM, EXEvexXNoBcst } }, |
2807 | { "vmovsldup", { XM, EXEvexXNoBcst }, 0 }, |
2271 | }, |
2808 | }, |
2272 | /* EVEX_W_0F12_P_2 */ |
2809 | /* EVEX_W_0F12_P_2 */ |
2273 | { |
2810 | { |
2274 | { Bad_Opcode }, |
2811 | { Bad_Opcode }, |
2275 | { "vmovlpd", { XMM, Vex, EXxmm_mq } }, |
2812 | { "vmovlpd", { XMM, Vex, EXxmm_mq }, 0 }, |
2276 | }, |
2813 | }, |
2277 | /* EVEX_W_0F12_P_3 */ |
2814 | /* EVEX_W_0F12_P_3 */ |
2278 | { |
2815 | { |
2279 | { Bad_Opcode }, |
2816 | { Bad_Opcode }, |
2280 | { "vmovddup", { XM, EXymmq } }, |
2817 | { "vmovddup", { XM, EXymmq }, 0 }, |
2281 | }, |
2818 | }, |
2282 | /* EVEX_W_0F13_P_0 */ |
2819 | /* EVEX_W_0F13_P_0 */ |
2283 | { |
2820 | { |
2284 | { "vmovlps", { EXxmm_mq, XMM } }, |
2821 | { "vmovlps", { EXxmm_mq, XMM }, 0 }, |
2285 | }, |
2822 | }, |
2286 | /* EVEX_W_0F13_P_2 */ |
2823 | /* EVEX_W_0F13_P_2 */ |
2287 | { |
2824 | { |
2288 | { Bad_Opcode }, |
2825 | { Bad_Opcode }, |
2289 | { "vmovlpd", { EXxmm_mq, XMM } }, |
2826 | { "vmovlpd", { EXxmm_mq, XMM }, 0 }, |
2290 | }, |
2827 | }, |
2291 | /* EVEX_W_0F14_P_0 */ |
2828 | /* EVEX_W_0F14_P_0 */ |
2292 | { |
2829 | { |
2293 | { "vunpcklps", { XM, Vex, EXx } }, |
2830 | { "vunpcklps", { XM, Vex, EXx }, 0 }, |
2294 | }, |
2831 | }, |
2295 | /* EVEX_W_0F14_P_2 */ |
2832 | /* EVEX_W_0F14_P_2 */ |
2296 | { |
2833 | { |
2297 | { Bad_Opcode }, |
2834 | { Bad_Opcode }, |
2298 | { "vunpcklpd", { XM, Vex, EXx } }, |
2835 | { "vunpcklpd", { XM, Vex, EXx }, 0 }, |
2299 | }, |
2836 | }, |
2300 | /* EVEX_W_0F15_P_0 */ |
2837 | /* EVEX_W_0F15_P_0 */ |
2301 | { |
2838 | { |
2302 | { "vunpckhps", { XM, Vex, EXx } }, |
2839 | { "vunpckhps", { XM, Vex, EXx }, 0 }, |
2303 | }, |
2840 | }, |
2304 | /* EVEX_W_0F15_P_2 */ |
2841 | /* EVEX_W_0F15_P_2 */ |
2305 | { |
2842 | { |
2306 | { Bad_Opcode }, |
2843 | { Bad_Opcode }, |
2307 | { "vunpckhpd", { XM, Vex, EXx } }, |
2844 | { "vunpckhpd", { XM, Vex, EXx }, 0 }, |
2308 | }, |
2845 | }, |
2309 | /* EVEX_W_0F16_P_0_M_0 */ |
2846 | /* EVEX_W_0F16_P_0_M_0 */ |
2310 | { |
2847 | { |
2311 | { "vmovhps", { XMM, Vex, EXxmm_mq } }, |
2848 | { "vmovhps", { XMM, Vex, EXxmm_mq }, 0 }, |
2312 | }, |
2849 | }, |
2313 | /* EVEX_W_0F16_P_0_M_1 */ |
2850 | /* EVEX_W_0F16_P_0_M_1 */ |
2314 | { |
2851 | { |
2315 | { "vmovlhps", { XMM, Vex, EXx } }, |
2852 | { "vmovlhps", { XMM, Vex, EXx }, 0 }, |
2316 | }, |
2853 | }, |
2317 | /* EVEX_W_0F16_P_1 */ |
2854 | /* EVEX_W_0F16_P_1 */ |
2318 | { |
2855 | { |
2319 | { "vmovshdup", { XM, EXx } }, |
2856 | { "vmovshdup", { XM, EXx }, 0 }, |
2320 | }, |
2857 | }, |
2321 | /* EVEX_W_0F16_P_2 */ |
2858 | /* EVEX_W_0F16_P_2 */ |
2322 | { |
2859 | { |
2323 | { Bad_Opcode }, |
2860 | { Bad_Opcode }, |
2324 | { "vmovhpd", { XMM, Vex, EXxmm_mq } }, |
2861 | { "vmovhpd", { XMM, Vex, EXxmm_mq }, 0 }, |
2325 | }, |
2862 | }, |
2326 | /* EVEX_W_0F17_P_0 */ |
2863 | /* EVEX_W_0F17_P_0 */ |
2327 | { |
2864 | { |
2328 | { "vmovhps", { EXxmm_mq, XMM } }, |
2865 | { "vmovhps", { EXxmm_mq, XMM }, 0 }, |
2329 | }, |
2866 | }, |
2330 | /* EVEX_W_0F17_P_2 */ |
2867 | /* EVEX_W_0F17_P_2 */ |
2331 | { |
2868 | { |
2332 | { Bad_Opcode }, |
2869 | { Bad_Opcode }, |
2333 | { "vmovhpd", { EXxmm_mq, XMM } }, |
2870 | { "vmovhpd", { EXxmm_mq, XMM }, 0 }, |
2334 | }, |
2871 | }, |
2335 | /* EVEX_W_0F28_P_0 */ |
2872 | /* EVEX_W_0F28_P_0 */ |
2336 | { |
2873 | { |
2337 | { "vmovaps", { XM, EXx } }, |
2874 | { "vmovaps", { XM, EXx }, 0 }, |
2338 | }, |
2875 | }, |
2339 | /* EVEX_W_0F28_P_2 */ |
2876 | /* EVEX_W_0F28_P_2 */ |
2340 | { |
2877 | { |
2341 | { Bad_Opcode }, |
2878 | { Bad_Opcode }, |
2342 | { "vmovapd", { XM, EXx } }, |
2879 | { "vmovapd", { XM, EXx }, 0 }, |
2343 | }, |
2880 | }, |
2344 | /* EVEX_W_0F29_P_0 */ |
2881 | /* EVEX_W_0F29_P_0 */ |
2345 | { |
2882 | { |
2346 | { "vmovaps", { EXxS, XM } }, |
2883 | { "vmovaps", { EXxS, XM }, 0 }, |
2347 | }, |
2884 | }, |
2348 | /* EVEX_W_0F29_P_2 */ |
2885 | /* EVEX_W_0F29_P_2 */ |
2349 | { |
2886 | { |
2350 | { Bad_Opcode }, |
2887 | { Bad_Opcode }, |
2351 | { "vmovapd", { EXxS, XM } }, |
2888 | { "vmovapd", { EXxS, XM }, 0 }, |
2352 | }, |
2889 | }, |
2353 | /* EVEX_W_0F2A_P_1 */ |
2890 | /* EVEX_W_0F2A_P_1 */ |
2354 | { |
2891 | { |
2355 | { "vcvtsi2ss", { XMScalar, VexScalar, EXxEVexR, Ed } }, |
2892 | { "vcvtsi2ss", { XMScalar, VexScalar, EXxEVexR, Ed }, 0 }, |
2356 | { "vcvtsi2ss", { XMScalar, VexScalar, EXxEVexR, Eq } }, |
2893 | { "vcvtsi2ss", { XMScalar, VexScalar, EXxEVexR, Eq }, 0 }, |
2357 | }, |
2894 | }, |
2358 | /* EVEX_W_0F2A_P_3 */ |
2895 | /* EVEX_W_0F2A_P_3 */ |
2359 | { |
2896 | { |
2360 | { "vcvtsi2sd", { XMScalar, VexScalar, Ed } }, |
2897 | { "vcvtsi2sd", { XMScalar, VexScalar, Ed }, 0 }, |
2361 | { "vcvtsi2sd", { XMScalar, VexScalar, EXxEVexR, Eq } }, |
2898 | { "vcvtsi2sd", { XMScalar, VexScalar, EXxEVexR, Eq }, 0 }, |
2362 | }, |
2899 | }, |
2363 | /* EVEX_W_0F2B_P_0 */ |
2900 | /* EVEX_W_0F2B_P_0 */ |
2364 | { |
2901 | { |
2365 | { "vmovntps", { EXx, XM } }, |
2902 | { "vmovntps", { EXx, XM }, 0 }, |
2366 | }, |
2903 | }, |
2367 | /* EVEX_W_0F2B_P_2 */ |
2904 | /* EVEX_W_0F2B_P_2 */ |
2368 | { |
2905 | { |
2369 | { Bad_Opcode }, |
2906 | { Bad_Opcode }, |
2370 | { "vmovntpd", { EXx, XM } }, |
2907 | { "vmovntpd", { EXx, XM }, 0 }, |
2371 | }, |
2908 | }, |
2372 | /* EVEX_W_0F2E_P_0 */ |
2909 | /* EVEX_W_0F2E_P_0 */ |
2373 | { |
2910 | { |
2374 | { "vucomiss", { XMScalar, EXxmm_md, EXxEVexS } }, |
2911 | { "vucomiss", { XMScalar, EXxmm_md, EXxEVexS }, 0 }, |
2375 | }, |
2912 | }, |
2376 | /* EVEX_W_0F2E_P_2 */ |
2913 | /* EVEX_W_0F2E_P_2 */ |
2377 | { |
2914 | { |
2378 | { Bad_Opcode }, |
2915 | { Bad_Opcode }, |
2379 | { "vucomisd", { XMScalar, EXxmm_mq, EXxEVexS } }, |
2916 | { "vucomisd", { XMScalar, EXxmm_mq, EXxEVexS }, 0 }, |
2380 | }, |
2917 | }, |
2381 | /* EVEX_W_0F2F_P_0 */ |
2918 | /* EVEX_W_0F2F_P_0 */ |
2382 | { |
2919 | { |
2383 | { "vcomiss", { XMScalar, EXxmm_md, EXxEVexS } }, |
2920 | { "vcomiss", { XMScalar, EXxmm_md, EXxEVexS }, 0 }, |
2384 | }, |
2921 | }, |
2385 | /* EVEX_W_0F2F_P_2 */ |
2922 | /* EVEX_W_0F2F_P_2 */ |
2386 | { |
2923 | { |
2387 | { Bad_Opcode }, |
2924 | { Bad_Opcode }, |
2388 | { "vcomisd", { XMScalar, EXxmm_mq, EXxEVexS } }, |
2925 | { "vcomisd", { XMScalar, EXxmm_mq, EXxEVexS }, 0 }, |
2389 | }, |
2926 | }, |
2390 | /* EVEX_W_0F51_P_0 */ |
2927 | /* EVEX_W_0F51_P_0 */ |
2391 | { |
2928 | { |
2392 | { "vsqrtps", { XM, EXx, EXxEVexR } }, |
2929 | { "vsqrtps", { XM, EXx, EXxEVexR }, 0 }, |
2393 | }, |
2930 | }, |
2394 | /* EVEX_W_0F51_P_1 */ |
2931 | /* EVEX_W_0F51_P_1 */ |
2395 | { |
2932 | { |
2396 | { "vsqrtss", { XMScalar, VexScalar, EXxmm_md, EXxEVexR } }, |
2933 | { "vsqrtss", { XMScalar, VexScalar, EXxmm_md, EXxEVexR }, 0 }, |
2397 | }, |
2934 | }, |
2398 | /* EVEX_W_0F51_P_2 */ |
2935 | /* EVEX_W_0F51_P_2 */ |
2399 | { |
2936 | { |
2400 | { Bad_Opcode }, |
2937 | { Bad_Opcode }, |
2401 | { "vsqrtpd", { XM, EXx, EXxEVexR } }, |
2938 | { "vsqrtpd", { XM, EXx, EXxEVexR }, 0 }, |
2402 | }, |
2939 | }, |
2403 | /* EVEX_W_0F51_P_3 */ |
2940 | /* EVEX_W_0F51_P_3 */ |
2404 | { |
2941 | { |
2405 | { Bad_Opcode }, |
2942 | { Bad_Opcode }, |
- | 2943 | { "vsqrtsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexR }, 0 }, |
|
- | 2944 | }, |
|
- | 2945 | /* EVEX_W_0F54_P_0 */ |
|
- | 2946 | { |
|
- | 2947 | { "vandps", { XM, Vex, EXx }, 0 }, |
|
- | 2948 | }, |
|
- | 2949 | /* EVEX_W_0F54_P_2 */ |
|
- | 2950 | { |
|
- | 2951 | { Bad_Opcode }, |
|
- | 2952 | { "vandpd", { XM, Vex, EXx }, 0 }, |
|
- | 2953 | }, |
|
- | 2954 | /* EVEX_W_0F55_P_0 */ |
|
- | 2955 | { |
|
- | 2956 | { "vandnps", { XM, Vex, EXx }, 0 }, |
|
- | 2957 | }, |
|
- | 2958 | /* EVEX_W_0F55_P_2 */ |
|
- | 2959 | { |
|
- | 2960 | { Bad_Opcode }, |
|
- | 2961 | { "vandnpd", { XM, Vex, EXx }, 0 }, |
|
- | 2962 | }, |
|
- | 2963 | /* EVEX_W_0F56_P_0 */ |
|
- | 2964 | { |
|
- | 2965 | { "vorps", { XM, Vex, EXx }, 0 }, |
|
- | 2966 | }, |
|
- | 2967 | /* EVEX_W_0F56_P_2 */ |
|
- | 2968 | { |
|
- | 2969 | { Bad_Opcode }, |
|
- | 2970 | { "vorpd", { XM, Vex, EXx }, 0 }, |
|
- | 2971 | }, |
|
- | 2972 | /* EVEX_W_0F57_P_0 */ |
|
- | 2973 | { |
|
- | 2974 | { "vxorps", { XM, Vex, EXx }, 0 }, |
|
- | 2975 | }, |
|
- | 2976 | /* EVEX_W_0F57_P_2 */ |
|
- | 2977 | { |
|
- | 2978 | { Bad_Opcode }, |
|
2406 | { "vsqrtsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexR } }, |
2979 | { "vxorpd", { XM, Vex, EXx }, 0 }, |
2407 | }, |
2980 | }, |
2408 | /* EVEX_W_0F58_P_0 */ |
2981 | /* EVEX_W_0F58_P_0 */ |
2409 | { |
2982 | { |
2410 | { "vaddps", { XM, Vex, EXx, EXxEVexR } }, |
2983 | { "vaddps", { XM, Vex, EXx, EXxEVexR }, 0 }, |
2411 | }, |
2984 | }, |
2412 | /* EVEX_W_0F58_P_1 */ |
2985 | /* EVEX_W_0F58_P_1 */ |
2413 | { |
2986 | { |
2414 | { "vaddss", { XMScalar, VexScalar, EXxmm_md, EXxEVexR } }, |
2987 | { "vaddss", { XMScalar, VexScalar, EXxmm_md, EXxEVexR }, 0 }, |
2415 | }, |
2988 | }, |
2416 | /* EVEX_W_0F58_P_2 */ |
2989 | /* EVEX_W_0F58_P_2 */ |
2417 | { |
2990 | { |
2418 | { Bad_Opcode }, |
2991 | { Bad_Opcode }, |
2419 | { "vaddpd", { XM, Vex, EXx, EXxEVexR } }, |
2992 | { "vaddpd", { XM, Vex, EXx, EXxEVexR }, 0 }, |
2420 | }, |
2993 | }, |
2421 | /* EVEX_W_0F58_P_3 */ |
2994 | /* EVEX_W_0F58_P_3 */ |
2422 | { |
2995 | { |
2423 | { Bad_Opcode }, |
2996 | { Bad_Opcode }, |
2424 | { "vaddsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexR } }, |
2997 | { "vaddsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexR }, 0 }, |
2425 | }, |
2998 | }, |
2426 | /* EVEX_W_0F59_P_0 */ |
2999 | /* EVEX_W_0F59_P_0 */ |
2427 | { |
3000 | { |
2428 | { "vmulps", { XM, Vex, EXx, EXxEVexR } }, |
3001 | { "vmulps", { XM, Vex, EXx, EXxEVexR }, 0 }, |
2429 | }, |
3002 | }, |
2430 | /* EVEX_W_0F59_P_1 */ |
3003 | /* EVEX_W_0F59_P_1 */ |
2431 | { |
3004 | { |
2432 | { "vmulss", { XMScalar, VexScalar, EXxmm_md, EXxEVexR } }, |
3005 | { "vmulss", { XMScalar, VexScalar, EXxmm_md, EXxEVexR }, 0 }, |
2433 | }, |
3006 | }, |
2434 | /* EVEX_W_0F59_P_2 */ |
3007 | /* EVEX_W_0F59_P_2 */ |
2435 | { |
3008 | { |
2436 | { Bad_Opcode }, |
3009 | { Bad_Opcode }, |
2437 | { "vmulpd", { XM, Vex, EXx, EXxEVexR } }, |
3010 | { "vmulpd", { XM, Vex, EXx, EXxEVexR }, 0 }, |
2438 | }, |
3011 | }, |
2439 | /* EVEX_W_0F59_P_3 */ |
3012 | /* EVEX_W_0F59_P_3 */ |
2440 | { |
3013 | { |
2441 | { Bad_Opcode }, |
3014 | { Bad_Opcode }, |
2442 | { "vmulsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexR } }, |
3015 | { "vmulsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexR }, 0 }, |
2443 | }, |
3016 | }, |
2444 | /* EVEX_W_0F5A_P_0 */ |
3017 | /* EVEX_W_0F5A_P_0 */ |
2445 | { |
3018 | { |
2446 | { "vcvtps2pd", { XM, EXEvexHalfBcstXmmq, EXxEVexS } }, |
3019 | { "vcvtps2pd", { XM, EXEvexHalfBcstXmmq, EXxEVexS }, 0 }, |
2447 | }, |
3020 | }, |
2448 | /* EVEX_W_0F5A_P_1 */ |
3021 | /* EVEX_W_0F5A_P_1 */ |
2449 | { |
3022 | { |
2450 | { "vcvtss2sd", { XMScalar, VexScalar, EXxmm_md, EXxEVexS } }, |
3023 | { "vcvtss2sd", { XMScalar, VexScalar, EXxmm_md, EXxEVexS }, 0 }, |
2451 | }, |
3024 | }, |
2452 | /* EVEX_W_0F5A_P_2 */ |
3025 | /* EVEX_W_0F5A_P_2 */ |
2453 | { |
3026 | { |
2454 | { Bad_Opcode }, |
3027 | { Bad_Opcode }, |
2455 | { "vcvtpd2ps", { XMxmmq, EXx, EXxEVexR } }, |
3028 | { "vcvtpd2ps%XY", { XMxmmq, EXx, EXxEVexR }, 0 }, |
2456 | }, |
3029 | }, |
2457 | /* EVEX_W_0F5A_P_3 */ |
3030 | /* EVEX_W_0F5A_P_3 */ |
2458 | { |
3031 | { |
2459 | { Bad_Opcode }, |
3032 | { Bad_Opcode }, |
2460 | { "vcvtsd2ss", { XMScalar, VexScalar, EXxmm_mq, EXxEVexR } }, |
3033 | { "vcvtsd2ss", { XMScalar, VexScalar, EXxmm_mq, EXxEVexR }, 0 }, |
2461 | }, |
3034 | }, |
2462 | /* EVEX_W_0F5B_P_0 */ |
3035 | /* EVEX_W_0F5B_P_0 */ |
2463 | { |
3036 | { |
- | 3037 | { "vcvtdq2ps", { XM, EXx, EXxEVexR }, 0 }, |
|
2464 | { "vcvtdq2ps", { XM, EXx, EXxEVexR } }, |
3038 | { "vcvtqq2ps%XY", { XMxmmq, EXx, EXxEVexR }, 0 }, |
2465 | }, |
3039 | }, |
2466 | /* EVEX_W_0F5B_P_1 */ |
3040 | /* EVEX_W_0F5B_P_1 */ |
2467 | { |
3041 | { |
2468 | { "vcvttps2dq", { XM, EXx, EXxEVexS } }, |
3042 | { "vcvttps2dq", { XM, EXx, EXxEVexS }, 0 }, |
2469 | }, |
3043 | }, |
2470 | /* EVEX_W_0F5B_P_2 */ |
3044 | /* EVEX_W_0F5B_P_2 */ |
2471 | { |
3045 | { |
2472 | { "vcvtps2dq", { XM, EXx, EXxEVexR } }, |
3046 | { "vcvtps2dq", { XM, EXx, EXxEVexR }, 0 }, |
2473 | }, |
3047 | }, |
2474 | /* EVEX_W_0F5C_P_0 */ |
3048 | /* EVEX_W_0F5C_P_0 */ |
2475 | { |
3049 | { |
2476 | { "vsubps", { XM, Vex, EXx, EXxEVexR } }, |
3050 | { "vsubps", { XM, Vex, EXx, EXxEVexR }, 0 }, |
2477 | }, |
3051 | }, |
2478 | /* EVEX_W_0F5C_P_1 */ |
3052 | /* EVEX_W_0F5C_P_1 */ |
2479 | { |
3053 | { |
2480 | { "vsubss", { XMScalar, VexScalar, EXxmm_md, EXxEVexR } }, |
3054 | { "vsubss", { XMScalar, VexScalar, EXxmm_md, EXxEVexR }, 0 }, |
2481 | }, |
3055 | }, |
2482 | /* EVEX_W_0F5C_P_2 */ |
3056 | /* EVEX_W_0F5C_P_2 */ |
2483 | { |
3057 | { |
2484 | { Bad_Opcode }, |
3058 | { Bad_Opcode }, |
2485 | { "vsubpd", { XM, Vex, EXx, EXxEVexR } }, |
3059 | { "vsubpd", { XM, Vex, EXx, EXxEVexR }, 0 }, |
2486 | }, |
3060 | }, |
2487 | /* EVEX_W_0F5C_P_3 */ |
3061 | /* EVEX_W_0F5C_P_3 */ |
2488 | { |
3062 | { |
2489 | { Bad_Opcode }, |
3063 | { Bad_Opcode }, |
2490 | { "vsubsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexR } }, |
3064 | { "vsubsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexR }, 0 }, |
2491 | }, |
3065 | }, |
2492 | /* EVEX_W_0F5D_P_0 */ |
3066 | /* EVEX_W_0F5D_P_0 */ |
2493 | { |
3067 | { |
2494 | { "vminps", { XM, Vex, EXx, EXxEVexS } }, |
3068 | { "vminps", { XM, Vex, EXx, EXxEVexS }, 0 }, |
2495 | }, |
3069 | }, |
2496 | /* EVEX_W_0F5D_P_1 */ |
3070 | /* EVEX_W_0F5D_P_1 */ |
2497 | { |
3071 | { |
2498 | { "vminss", { XMScalar, VexScalar, EXxmm_md, EXxEVexS } }, |
3072 | { "vminss", { XMScalar, VexScalar, EXxmm_md, EXxEVexS }, 0 }, |
2499 | }, |
3073 | }, |
2500 | /* EVEX_W_0F5D_P_2 */ |
3074 | /* EVEX_W_0F5D_P_2 */ |
2501 | { |
3075 | { |
2502 | { Bad_Opcode }, |
3076 | { Bad_Opcode }, |
2503 | { "vminpd", { XM, Vex, EXx, EXxEVexS } }, |
3077 | { "vminpd", { XM, Vex, EXx, EXxEVexS }, 0 }, |
2504 | }, |
3078 | }, |
2505 | /* EVEX_W_0F5D_P_3 */ |
3079 | /* EVEX_W_0F5D_P_3 */ |
2506 | { |
3080 | { |
2507 | { Bad_Opcode }, |
3081 | { Bad_Opcode }, |
2508 | { "vminsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexS } }, |
3082 | { "vminsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexS }, 0 }, |
2509 | }, |
3083 | }, |
2510 | /* EVEX_W_0F5E_P_0 */ |
3084 | /* EVEX_W_0F5E_P_0 */ |
2511 | { |
3085 | { |
2512 | { "vdivps", { XM, Vex, EXx, EXxEVexR } }, |
3086 | { "vdivps", { XM, Vex, EXx, EXxEVexR }, 0 }, |
2513 | }, |
3087 | }, |
2514 | /* EVEX_W_0F5E_P_1 */ |
3088 | /* EVEX_W_0F5E_P_1 */ |
2515 | { |
3089 | { |
2516 | { "vdivss", { XMScalar, VexScalar, EXxmm_md, EXxEVexR } }, |
3090 | { "vdivss", { XMScalar, VexScalar, EXxmm_md, EXxEVexR }, 0 }, |
2517 | }, |
3091 | }, |
2518 | /* EVEX_W_0F5E_P_2 */ |
3092 | /* EVEX_W_0F5E_P_2 */ |
2519 | { |
3093 | { |
2520 | { Bad_Opcode }, |
3094 | { Bad_Opcode }, |
2521 | { "vdivpd", { XM, Vex, EXx, EXxEVexR } }, |
3095 | { "vdivpd", { XM, Vex, EXx, EXxEVexR }, 0 }, |
2522 | }, |
3096 | }, |
2523 | /* EVEX_W_0F5E_P_3 */ |
3097 | /* EVEX_W_0F5E_P_3 */ |
2524 | { |
3098 | { |
2525 | { Bad_Opcode }, |
3099 | { Bad_Opcode }, |
2526 | { "vdivsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexR } }, |
3100 | { "vdivsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexR }, 0 }, |
2527 | }, |
3101 | }, |
2528 | /* EVEX_W_0F5F_P_0 */ |
3102 | /* EVEX_W_0F5F_P_0 */ |
2529 | { |
3103 | { |
2530 | { "vmaxps", { XM, Vex, EXx, EXxEVexS } }, |
3104 | { "vmaxps", { XM, Vex, EXx, EXxEVexS }, 0 }, |
2531 | }, |
3105 | }, |
2532 | /* EVEX_W_0F5F_P_1 */ |
3106 | /* EVEX_W_0F5F_P_1 */ |
2533 | { |
3107 | { |
2534 | { "vmaxss", { XMScalar, VexScalar, EXxmm_md, EXxEVexS } }, |
3108 | { "vmaxss", { XMScalar, VexScalar, EXxmm_md, EXxEVexS }, 0 }, |
2535 | }, |
3109 | }, |
2536 | /* EVEX_W_0F5F_P_2 */ |
3110 | /* EVEX_W_0F5F_P_2 */ |
2537 | { |
3111 | { |
2538 | { Bad_Opcode }, |
3112 | { Bad_Opcode }, |
2539 | { "vmaxpd", { XM, Vex, EXx, EXxEVexS } }, |
3113 | { "vmaxpd", { XM, Vex, EXx, EXxEVexS }, 0 }, |
2540 | }, |
3114 | }, |
2541 | /* EVEX_W_0F5F_P_3 */ |
3115 | /* EVEX_W_0F5F_P_3 */ |
2542 | { |
3116 | { |
2543 | { Bad_Opcode }, |
3117 | { Bad_Opcode }, |
2544 | { "vmaxsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexS } }, |
3118 | { "vmaxsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexS }, 0 }, |
2545 | }, |
3119 | }, |
2546 | /* EVEX_W_0F62_P_2 */ |
3120 | /* EVEX_W_0F62_P_2 */ |
2547 | { |
3121 | { |
2548 | { "vpunpckldq", { XM, Vex, EXx } }, |
3122 | { "vpunpckldq", { XM, Vex, EXx }, 0 }, |
2549 | }, |
3123 | }, |
2550 | /* EVEX_W_0F66_P_2 */ |
3124 | /* EVEX_W_0F66_P_2 */ |
2551 | { |
3125 | { |
2552 | { "vpcmpgtd", { XMask, Vex, EXx } }, |
3126 | { "vpcmpgtd", { XMask, Vex, EXx }, 0 }, |
2553 | }, |
3127 | }, |
2554 | /* EVEX_W_0F6A_P_2 */ |
3128 | /* EVEX_W_0F6A_P_2 */ |
2555 | { |
3129 | { |
- | 3130 | { "vpunpckhdq", { XM, Vex, EXx }, 0 }, |
|
- | 3131 | }, |
|
- | 3132 | /* EVEX_W_0F6B_P_2 */ |
|
- | 3133 | { |
|
2556 | { "vpunpckhdq", { XM, Vex, EXx } }, |
3134 | { "vpackssdw", { XM, Vex, EXx }, 0 }, |
2557 | }, |
3135 | }, |
2558 | /* EVEX_W_0F6C_P_2 */ |
3136 | /* EVEX_W_0F6C_P_2 */ |
2559 | { |
3137 | { |
2560 | { Bad_Opcode }, |
3138 | { Bad_Opcode }, |
2561 | { "vpunpcklqdq", { XM, Vex, EXx } }, |
3139 | { "vpunpcklqdq", { XM, Vex, EXx }, 0 }, |
2562 | }, |
3140 | }, |
2563 | /* EVEX_W_0F6D_P_2 */ |
3141 | /* EVEX_W_0F6D_P_2 */ |
2564 | { |
3142 | { |
2565 | { Bad_Opcode }, |
3143 | { Bad_Opcode }, |
2566 | { "vpunpckhqdq", { XM, Vex, EXx } }, |
3144 | { "vpunpckhqdq", { XM, Vex, EXx }, 0 }, |
2567 | }, |
3145 | }, |
2568 | /* EVEX_W_0F6E_P_2 */ |
3146 | /* EVEX_W_0F6E_P_2 */ |
2569 | { |
3147 | { |
2570 | { "vmovd", { XMScalar, Ed } }, |
3148 | { "vmovd", { XMScalar, Ed }, 0 }, |
2571 | { "vmovq", { XMScalar, Eq } }, |
3149 | { "vmovq", { XMScalar, Eq }, 0 }, |
2572 | }, |
3150 | }, |
2573 | /* EVEX_W_0F6F_P_1 */ |
3151 | /* EVEX_W_0F6F_P_1 */ |
2574 | { |
3152 | { |
2575 | { "vmovdqu32", { XM, EXEvexXNoBcst } }, |
3153 | { "vmovdqu32", { XM, EXEvexXNoBcst }, 0 }, |
2576 | { "vmovdqu64", { XM, EXEvexXNoBcst } }, |
3154 | { "vmovdqu64", { XM, EXEvexXNoBcst }, 0 }, |
2577 | }, |
3155 | }, |
2578 | /* EVEX_W_0F6F_P_2 */ |
3156 | /* EVEX_W_0F6F_P_2 */ |
2579 | { |
3157 | { |
2580 | { "vmovdqa32", { XM, EXEvexXNoBcst } }, |
3158 | { "vmovdqa32", { XM, EXEvexXNoBcst }, 0 }, |
- | 3159 | { "vmovdqa64", { XM, EXEvexXNoBcst }, 0 }, |
|
- | 3160 | }, |
|
- | 3161 | /* EVEX_W_0F6F_P_3 */ |
|
- | 3162 | { |
|
- | 3163 | { "vmovdqu8", { XM, EXx }, 0 }, |
|
2581 | { "vmovdqa64", { XM, EXEvexXNoBcst } }, |
3164 | { "vmovdqu16", { XM, EXx }, 0 }, |
2582 | }, |
3165 | }, |
2583 | /* EVEX_W_0F70_P_2 */ |
3166 | /* EVEX_W_0F70_P_2 */ |
2584 | { |
3167 | { |
2585 | { "vpshufd", { XM, EXx, Ib } }, |
3168 | { "vpshufd", { XM, EXx, Ib }, 0 }, |
2586 | }, |
3169 | }, |
2587 | /* EVEX_W_0F72_R_2_P_2 */ |
3170 | /* EVEX_W_0F72_R_2_P_2 */ |
2588 | { |
3171 | { |
2589 | { "vpsrld", { Vex, EXx, Ib } }, |
3172 | { "vpsrld", { Vex, EXx, Ib }, 0 }, |
2590 | }, |
3173 | }, |
2591 | /* EVEX_W_0F72_R_6_P_2 */ |
3174 | /* EVEX_W_0F72_R_6_P_2 */ |
2592 | { |
3175 | { |
2593 | { "vpslld", { Vex, EXx, Ib } }, |
3176 | { "vpslld", { Vex, EXx, Ib }, 0 }, |
2594 | }, |
3177 | }, |
2595 | /* EVEX_W_0F73_R_2_P_2 */ |
3178 | /* EVEX_W_0F73_R_2_P_2 */ |
2596 | { |
3179 | { |
2597 | { Bad_Opcode }, |
3180 | { Bad_Opcode }, |
2598 | { "vpsrlq", { Vex, EXx, Ib } }, |
3181 | { "vpsrlq", { Vex, EXx, Ib }, 0 }, |
2599 | }, |
3182 | }, |
2600 | /* EVEX_W_0F73_R_6_P_2 */ |
3183 | /* EVEX_W_0F73_R_6_P_2 */ |
2601 | { |
3184 | { |
2602 | { Bad_Opcode }, |
3185 | { Bad_Opcode }, |
2603 | { "vpsllq", { Vex, EXx, Ib } }, |
3186 | { "vpsllq", { Vex, EXx, Ib }, 0 }, |
2604 | }, |
3187 | }, |
2605 | /* EVEX_W_0F76_P_2 */ |
3188 | /* EVEX_W_0F76_P_2 */ |
2606 | { |
3189 | { |
2607 | { "vpcmpeqd", { XMask, Vex, EXx } }, |
3190 | { "vpcmpeqd", { XMask, Vex, EXx }, 0 }, |
2608 | }, |
3191 | }, |
2609 | /* EVEX_W_0F78_P_0 */ |
3192 | /* EVEX_W_0F78_P_0 */ |
2610 | { |
3193 | { |
2611 | { "vcvttps2udq", { XM, EXx, EXxEVexS } }, |
3194 | { "vcvttps2udq", { XM, EXx, EXxEVexS }, 0 }, |
- | 3195 | { "vcvttpd2udq%XY", { XMxmmq, EXx, EXxEVexS }, 0 }, |
|
- | 3196 | }, |
|
- | 3197 | /* EVEX_W_0F78_P_2 */ |
|
- | 3198 | { |
|
- | 3199 | { "vcvttps2uqq", { XM, EXEvexHalfBcstXmmq, EXxEVexS }, 0 }, |
|
2612 | { "vcvttpd2udq", { XMxmmq, EXx, EXxEVexS } }, |
3200 | { "vcvttpd2uqq", { XM, EXx, EXxEVexS }, 0 }, |
2613 | }, |
3201 | }, |
2614 | /* EVEX_W_0F79_P_0 */ |
3202 | /* EVEX_W_0F79_P_0 */ |
2615 | { |
3203 | { |
2616 | { "vcvtps2udq", { XM, EXx, EXxEVexR } }, |
3204 | { "vcvtps2udq", { XM, EXx, EXxEVexR }, 0 }, |
- | 3205 | { "vcvtpd2udq%XY", { XMxmmq, EXx, EXxEVexR }, 0 }, |
|
- | 3206 | }, |
|
- | 3207 | /* EVEX_W_0F79_P_2 */ |
|
- | 3208 | { |
|
- | 3209 | { "vcvtps2uqq", { XM, EXEvexHalfBcstXmmq, EXxEVexR }, 0 }, |
|
2617 | { "vcvtpd2udq", { XMxmmq, EXx, EXxEVexR } }, |
3210 | { "vcvtpd2uqq", { XM, EXx, EXxEVexR }, 0 }, |
2618 | }, |
3211 | }, |
2619 | /* EVEX_W_0F7A_P_1 */ |
3212 | /* EVEX_W_0F7A_P_1 */ |
2620 | { |
3213 | { |
- | 3214 | { "vcvtudq2pd", { XM, EXEvexHalfBcstXmmq }, 0 }, |
|
- | 3215 | { "vcvtuqq2pd", { XM, EXx, EXxEVexR }, 0 }, |
|
- | 3216 | }, |
|
- | 3217 | /* EVEX_W_0F7A_P_2 */ |
|
- | 3218 | { |
|
- | 3219 | { "vcvttps2qq", { XM, EXEvexHalfBcstXmmq, EXxEVexS }, 0 }, |
|
2621 | { "vcvtudq2pd", { XM, EXEvexHalfBcstXmmq } }, |
3220 | { "vcvttpd2qq", { XM, EXx, EXxEVexS }, 0 }, |
2622 | }, |
3221 | }, |
2623 | /* EVEX_W_0F7A_P_3 */ |
3222 | /* EVEX_W_0F7A_P_3 */ |
2624 | { |
3223 | { |
- | 3224 | { "vcvtudq2ps", { XM, EXx, EXxEVexR }, 0 }, |
|
2625 | { "vcvtudq2ps", { XM, EXx, EXxEVexR } }, |
3225 | { "vcvtuqq2ps%XY", { XMxmmq, EXx, EXxEVexR }, 0 }, |
2626 | }, |
3226 | }, |
2627 | /* EVEX_W_0F7B_P_1 */ |
3227 | /* EVEX_W_0F7B_P_1 */ |
2628 | { |
3228 | { |
2629 | { "vcvtusi2ss", { XMScalar, VexScalar, EXxEVexR, Ed } }, |
3229 | { "vcvtusi2ss", { XMScalar, VexScalar, EXxEVexR, Ed }, 0 }, |
- | 3230 | { "vcvtusi2ss", { XMScalar, VexScalar, EXxEVexR, Eq }, 0 }, |
|
- | 3231 | }, |
|
- | 3232 | /* EVEX_W_0F7B_P_2 */ |
|
- | 3233 | { |
|
- | 3234 | { "vcvtps2qq", { XM, EXEvexHalfBcstXmmq, EXxEVexR }, 0 }, |
|
2630 | { "vcvtusi2ss", { XMScalar, VexScalar, EXxEVexR, Eq } }, |
3235 | { "vcvtpd2qq", { XM, EXx, EXxEVexR }, 0 }, |
2631 | }, |
3236 | }, |
2632 | /* EVEX_W_0F7B_P_3 */ |
3237 | /* EVEX_W_0F7B_P_3 */ |
2633 | { |
3238 | { |
2634 | { "vcvtusi2sd", { XMScalar, VexScalar, Ed } }, |
3239 | { "vcvtusi2sd", { XMScalar, VexScalar, Ed }, 0 }, |
2635 | { "vcvtusi2sd", { XMScalar, VexScalar, EXxEVexR, Eq } }, |
3240 | { "vcvtusi2sd", { XMScalar, VexScalar, EXxEVexR, Eq }, 0 }, |
2636 | }, |
3241 | }, |
2637 | /* EVEX_W_0F7E_P_1 */ |
3242 | /* EVEX_W_0F7E_P_1 */ |
2638 | { |
3243 | { |
2639 | { Bad_Opcode }, |
3244 | { Bad_Opcode }, |
2640 | { "vmovq", { XMScalar, EXxmm_mq } }, |
3245 | { "vmovq", { XMScalar, EXxmm_mq }, 0 }, |
2641 | }, |
3246 | }, |
2642 | /* EVEX_W_0F7E_P_2 */ |
3247 | /* EVEX_W_0F7E_P_2 */ |
2643 | { |
3248 | { |
2644 | { "vmovd", { Ed, XMScalar } }, |
3249 | { "vmovd", { Ed, XMScalar }, 0 }, |
2645 | { "vmovq", { Eq, XMScalar } }, |
3250 | { "vmovq", { Eq, XMScalar }, 0 }, |
2646 | }, |
3251 | }, |
2647 | /* EVEX_W_0F7F_P_1 */ |
3252 | /* EVEX_W_0F7F_P_1 */ |
2648 | { |
3253 | { |
2649 | { "vmovdqu32", { EXxS, XM } }, |
3254 | { "vmovdqu32", { EXxS, XM }, 0 }, |
2650 | { "vmovdqu64", { EXxS, XM } }, |
3255 | { "vmovdqu64", { EXxS, XM }, 0 }, |
2651 | }, |
3256 | }, |
2652 | /* EVEX_W_0F7F_P_2 */ |
3257 | /* EVEX_W_0F7F_P_2 */ |
2653 | { |
3258 | { |
2654 | { "vmovdqa32", { EXxS, XM } }, |
3259 | { "vmovdqa32", { EXxS, XM }, 0 }, |
- | 3260 | { "vmovdqa64", { EXxS, XM }, 0 }, |
|
- | 3261 | }, |
|
- | 3262 | /* EVEX_W_0F7F_P_3 */ |
|
- | 3263 | { |
|
- | 3264 | { "vmovdqu8", { EXxS, XM }, 0 }, |
|
2655 | { "vmovdqa64", { EXxS, XM } }, |
3265 | { "vmovdqu16", { EXxS, XM }, 0 }, |
2656 | }, |
3266 | }, |
2657 | /* EVEX_W_0FC2_P_0 */ |
3267 | /* EVEX_W_0FC2_P_0 */ |
2658 | { |
3268 | { |
2659 | { "vcmpps", { XMask, Vex, EXx, EXxEVexS, VCMP } }, |
3269 | { "vcmpps", { XMask, Vex, EXx, EXxEVexS, VCMP }, 0 }, |
2660 | }, |
3270 | }, |
2661 | /* EVEX_W_0FC2_P_1 */ |
3271 | /* EVEX_W_0FC2_P_1 */ |
2662 | { |
3272 | { |
2663 | { "vcmpss", { XMask, VexScalar, EXxmm_md, EXxEVexS, VCMP } }, |
3273 | { "vcmpss", { XMask, VexScalar, EXxmm_md, EXxEVexS, VCMP }, 0 }, |
2664 | }, |
3274 | }, |
2665 | /* EVEX_W_0FC2_P_2 */ |
3275 | /* EVEX_W_0FC2_P_2 */ |
2666 | { |
3276 | { |
2667 | { Bad_Opcode }, |
3277 | { Bad_Opcode }, |
2668 | { "vcmppd", { XMask, Vex, EXx, EXxEVexS, VCMP } }, |
3278 | { "vcmppd", { XMask, Vex, EXx, EXxEVexS, VCMP }, 0 }, |
2669 | }, |
3279 | }, |
2670 | /* EVEX_W_0FC2_P_3 */ |
3280 | /* EVEX_W_0FC2_P_3 */ |
2671 | { |
3281 | { |
2672 | { Bad_Opcode }, |
3282 | { Bad_Opcode }, |
2673 | { "vcmpsd", { XMask, VexScalar, EXxmm_mq, EXxEVexS, VCMP } }, |
3283 | { "vcmpsd", { XMask, VexScalar, EXxmm_mq, EXxEVexS, VCMP }, 0 }, |
2674 | }, |
3284 | }, |
2675 | /* EVEX_W_0FC6_P_0 */ |
3285 | /* EVEX_W_0FC6_P_0 */ |
2676 | { |
3286 | { |
2677 | { "vshufps", { XM, Vex, EXx, Ib } }, |
3287 | { "vshufps", { XM, Vex, EXx, Ib }, 0 }, |
2678 | }, |
3288 | }, |
2679 | /* EVEX_W_0FC6_P_2 */ |
3289 | /* EVEX_W_0FC6_P_2 */ |
2680 | { |
3290 | { |
2681 | { Bad_Opcode }, |
3291 | { Bad_Opcode }, |
2682 | { "vshufpd", { XM, Vex, EXx, Ib } }, |
3292 | { "vshufpd", { XM, Vex, EXx, Ib }, 0 }, |
2683 | }, |
3293 | }, |
2684 | /* EVEX_W_0FD2_P_2 */ |
3294 | /* EVEX_W_0FD2_P_2 */ |
2685 | { |
3295 | { |
2686 | { "vpsrld", { XM, Vex, EXxmm } }, |
3296 | { "vpsrld", { XM, Vex, EXxmm }, 0 }, |
2687 | }, |
3297 | }, |
2688 | /* EVEX_W_0FD3_P_2 */ |
3298 | /* EVEX_W_0FD3_P_2 */ |
2689 | { |
3299 | { |
2690 | { Bad_Opcode }, |
3300 | { Bad_Opcode }, |
2691 | { "vpsrlq", { XM, Vex, EXxmm } }, |
3301 | { "vpsrlq", { XM, Vex, EXxmm }, 0 }, |
2692 | }, |
3302 | }, |
2693 | /* EVEX_W_0FD4_P_2 */ |
3303 | /* EVEX_W_0FD4_P_2 */ |
2694 | { |
3304 | { |
2695 | { Bad_Opcode }, |
3305 | { Bad_Opcode }, |
2696 | { "vpaddq", { XM, Vex, EXx } }, |
3306 | { "vpaddq", { XM, Vex, EXx }, 0 }, |
2697 | }, |
3307 | }, |
2698 | /* EVEX_W_0FD6_P_2 */ |
3308 | /* EVEX_W_0FD6_P_2 */ |
2699 | { |
3309 | { |
2700 | { Bad_Opcode }, |
3310 | { Bad_Opcode }, |
2701 | { "vmovq", { EXxmm_mq, XMScalar } }, |
3311 | { "vmovq", { EXxmm_mq, XMScalar }, 0 }, |
2702 | }, |
3312 | }, |
2703 | /* EVEX_W_0FE6_P_1 */ |
3313 | /* EVEX_W_0FE6_P_1 */ |
2704 | { |
3314 | { |
- | 3315 | { "vcvtdq2pd", { XM, EXEvexHalfBcstXmmq }, 0 }, |
|
2705 | { "vcvtdq2pd", { XM, EXEvexHalfBcstXmmq } }, |
3316 | { "vcvtqq2pd", { XM, EXx, EXxEVexR }, 0 }, |
2706 | }, |
3317 | }, |
2707 | /* EVEX_W_0FE6_P_2 */ |
3318 | /* EVEX_W_0FE6_P_2 */ |
2708 | { |
3319 | { |
2709 | { Bad_Opcode }, |
3320 | { Bad_Opcode }, |
2710 | { "vcvttpd2dq", { XMxmmq, EXx, EXxEVexS } }, |
3321 | { "vcvttpd2dq%XY", { XMxmmq, EXx, EXxEVexS }, 0 }, |
2711 | }, |
3322 | }, |
2712 | /* EVEX_W_0FE6_P_3 */ |
3323 | /* EVEX_W_0FE6_P_3 */ |
2713 | { |
3324 | { |
2714 | { Bad_Opcode }, |
3325 | { Bad_Opcode }, |
2715 | { "vcvtpd2dq", { XMxmmq, EXx, EXxEVexR } }, |
3326 | { "vcvtpd2dq%XY", { XMxmmq, EXx, EXxEVexR }, 0 }, |
2716 | }, |
3327 | }, |
2717 | /* EVEX_W_0FE7_P_2 */ |
3328 | /* EVEX_W_0FE7_P_2 */ |
2718 | { |
3329 | { |
2719 | { "vmovntdq", { EXEvexXNoBcst, XM } }, |
3330 | { "vmovntdq", { EXEvexXNoBcst, XM }, 0 }, |
2720 | }, |
3331 | }, |
2721 | /* EVEX_W_0FF2_P_2 */ |
3332 | /* EVEX_W_0FF2_P_2 */ |
2722 | { |
3333 | { |
2723 | { "vpslld", { XM, Vex, EXxmm } }, |
3334 | { "vpslld", { XM, Vex, EXxmm }, 0 }, |
2724 | }, |
3335 | }, |
2725 | /* EVEX_W_0FF3_P_2 */ |
3336 | /* EVEX_W_0FF3_P_2 */ |
2726 | { |
3337 | { |
2727 | { Bad_Opcode }, |
3338 | { Bad_Opcode }, |
2728 | { "vpsllq", { XM, Vex, EXxmm } }, |
3339 | { "vpsllq", { XM, Vex, EXxmm }, 0 }, |
2729 | }, |
3340 | }, |
2730 | /* EVEX_W_0FF4_P_2 */ |
3341 | /* EVEX_W_0FF4_P_2 */ |
2731 | { |
3342 | { |
2732 | { Bad_Opcode }, |
3343 | { Bad_Opcode }, |
2733 | { "vpmuludq", { XM, Vex, EXx } }, |
3344 | { "vpmuludq", { XM, Vex, EXx }, 0 }, |
2734 | }, |
3345 | }, |
2735 | /* EVEX_W_0FFA_P_2 */ |
3346 | /* EVEX_W_0FFA_P_2 */ |
2736 | { |
3347 | { |
2737 | { "vpsubd", { XM, Vex, EXx } }, |
3348 | { "vpsubd", { XM, Vex, EXx }, 0 }, |
2738 | }, |
3349 | }, |
2739 | /* EVEX_W_0FFB_P_2 */ |
3350 | /* EVEX_W_0FFB_P_2 */ |
2740 | { |
3351 | { |
2741 | { Bad_Opcode }, |
3352 | { Bad_Opcode }, |
2742 | { "vpsubq", { XM, Vex, EXx } }, |
3353 | { "vpsubq", { XM, Vex, EXx }, 0 }, |
2743 | }, |
3354 | }, |
2744 | /* EVEX_W_0FFE_P_2 */ |
3355 | /* EVEX_W_0FFE_P_2 */ |
2745 | { |
3356 | { |
2746 | { "vpaddd", { XM, Vex, EXx } }, |
3357 | { "vpaddd", { XM, Vex, EXx }, 0 }, |
2747 | }, |
- | |
2748 | 3358 | }, |
|
2749 | /* EVEX_W_0F380C_P_2 */ |
3359 | /* EVEX_W_0F380C_P_2 */ |
2750 | { |
3360 | { |
2751 | { "vpermilps", { XM, Vex, EXx } }, |
3361 | { "vpermilps", { XM, Vex, EXx }, 0 }, |
2752 | }, |
3362 | }, |
2753 | /* EVEX_W_0F380D_P_2 */ |
3363 | /* EVEX_W_0F380D_P_2 */ |
2754 | { |
3364 | { |
2755 | { Bad_Opcode }, |
3365 | { Bad_Opcode }, |
- | 3366 | { "vpermilpd", { XM, Vex, EXx }, 0 }, |
|
- | 3367 | }, |
|
- | 3368 | /* EVEX_W_0F3810_P_1 */ |
|
- | 3369 | { |
|
- | 3370 | { "vpmovuswb", { EXxmmq, XM }, 0 }, |
|
- | 3371 | }, |
|
- | 3372 | /* EVEX_W_0F3810_P_2 */ |
|
- | 3373 | { |
|
- | 3374 | { Bad_Opcode }, |
|
2756 | { "vpermilpd", { XM, Vex, EXx } }, |
3375 | { "vpsrlvw", { XM, Vex, EXx }, 0 }, |
2757 | }, |
3376 | }, |
2758 | /* EVEX_W_0F3811_P_1 */ |
3377 | /* EVEX_W_0F3811_P_1 */ |
2759 | { |
3378 | { |
- | 3379 | { "vpmovusdb", { EXxmmqd, XM }, 0 }, |
|
- | 3380 | }, |
|
- | 3381 | /* EVEX_W_0F3811_P_2 */ |
|
- | 3382 | { |
|
- | 3383 | { Bad_Opcode }, |
|
2760 | { "vpmovusdb", { EXxmmqd, XM } }, |
3384 | { "vpsravw", { XM, Vex, EXx }, 0 }, |
2761 | }, |
3385 | }, |
2762 | /* EVEX_W_0F3812_P_1 */ |
3386 | /* EVEX_W_0F3812_P_1 */ |
2763 | { |
3387 | { |
- | 3388 | { "vpmovusqb", { EXxmmdw, XM }, 0 }, |
|
- | 3389 | }, |
|
- | 3390 | /* EVEX_W_0F3812_P_2 */ |
|
- | 3391 | { |
|
- | 3392 | { Bad_Opcode }, |
|
2764 | { "vpmovusqb", { EXxmmdw, XM } }, |
3393 | { "vpsllvw", { XM, Vex, EXx }, 0 }, |
2765 | }, |
3394 | }, |
2766 | /* EVEX_W_0F3813_P_1 */ |
3395 | /* EVEX_W_0F3813_P_1 */ |
2767 | { |
3396 | { |
2768 | { "vpmovusdw", { EXxmmq, XM } }, |
3397 | { "vpmovusdw", { EXxmmq, XM }, 0 }, |
2769 | }, |
3398 | }, |
2770 | /* EVEX_W_0F3813_P_2 */ |
3399 | /* EVEX_W_0F3813_P_2 */ |
2771 | { |
3400 | { |
2772 | { "vcvtph2ps", { XM, EXxmmq, EXxEVexS } }, |
3401 | { "vcvtph2ps", { XM, EXxmmq, EXxEVexS }, 0 }, |
2773 | }, |
3402 | }, |
2774 | /* EVEX_W_0F3814_P_1 */ |
3403 | /* EVEX_W_0F3814_P_1 */ |
2775 | { |
3404 | { |
2776 | { "vpmovusqw", { EXxmmqd, XM } }, |
3405 | { "vpmovusqw", { EXxmmqd, XM }, 0 }, |
2777 | }, |
3406 | }, |
2778 | /* EVEX_W_0F3815_P_1 */ |
3407 | /* EVEX_W_0F3815_P_1 */ |
2779 | { |
3408 | { |
2780 | { "vpmovusqd", { EXxmmq, XM } }, |
3409 | { "vpmovusqd", { EXxmmq, XM }, 0 }, |
2781 | }, |
3410 | }, |
2782 | /* EVEX_W_0F3818_P_2 */ |
3411 | /* EVEX_W_0F3818_P_2 */ |
2783 | { |
3412 | { |
2784 | { "vbroadcastss", { XM, EXxmm_md } }, |
3413 | { "vbroadcastss", { XM, EXxmm_md }, 0 }, |
2785 | }, |
3414 | }, |
2786 | /* EVEX_W_0F3819_P_2 */ |
3415 | /* EVEX_W_0F3819_P_2 */ |
2787 | { |
3416 | { |
2788 | { Bad_Opcode }, |
3417 | { "vbroadcastf32x2", { XM, EXxmm_mq }, 0 }, |
2789 | { "vbroadcastsd", { XM, EXxmm_mq } }, |
3418 | { "vbroadcastsd", { XM, EXxmm_mq }, 0 }, |
2790 | }, |
3419 | }, |
2791 | /* EVEX_W_0F381A_P_2 */ |
3420 | /* EVEX_W_0F381A_P_2 */ |
2792 | { |
3421 | { |
- | 3422 | { "vbroadcastf32x4", { XM, EXxmm }, 0 }, |
|
2793 | { "vbroadcastf32x4", { XM, EXxmm } }, |
3423 | { "vbroadcastf64x2", { XM, EXxmm }, 0 }, |
2794 | }, |
3424 | }, |
2795 | /* EVEX_W_0F381B_P_2 */ |
3425 | /* EVEX_W_0F381B_P_2 */ |
2796 | { |
3426 | { |
2797 | { Bad_Opcode }, |
3427 | { "vbroadcastf32x8", { XM, EXxmmq }, 0 }, |
2798 | { "vbroadcastf64x4", { XM, EXymm } }, |
3428 | { "vbroadcastf64x4", { XM, EXymm }, 0 }, |
2799 | }, |
3429 | }, |
2800 | /* EVEX_W_0F381E_P_2 */ |
3430 | /* EVEX_W_0F381E_P_2 */ |
2801 | { |
3431 | { |
2802 | { "vpabsd", { XM, EXx } }, |
3432 | { "vpabsd", { XM, EXx }, 0 }, |
2803 | }, |
3433 | }, |
2804 | /* EVEX_W_0F381F_P_2 */ |
3434 | /* EVEX_W_0F381F_P_2 */ |
2805 | { |
3435 | { |
2806 | { Bad_Opcode }, |
3436 | { Bad_Opcode }, |
- | 3437 | { "vpabsq", { XM, EXx }, 0 }, |
|
- | 3438 | }, |
|
- | 3439 | /* EVEX_W_0F3820_P_1 */ |
|
- | 3440 | { |
|
2807 | { "vpabsq", { XM, EXx } }, |
3441 | { "vpmovswb", { EXxmmq, XM }, 0 }, |
2808 | }, |
3442 | }, |
2809 | /* EVEX_W_0F3821_P_1 */ |
3443 | /* EVEX_W_0F3821_P_1 */ |
2810 | { |
3444 | { |
2811 | { "vpmovsdb", { EXxmmqd, XM } }, |
3445 | { "vpmovsdb", { EXxmmqd, XM }, 0 }, |
2812 | }, |
3446 | }, |
2813 | /* EVEX_W_0F3822_P_1 */ |
3447 | /* EVEX_W_0F3822_P_1 */ |
2814 | { |
3448 | { |
2815 | { "vpmovsqb", { EXxmmdw, XM } }, |
3449 | { "vpmovsqb", { EXxmmdw, XM }, 0 }, |
2816 | }, |
3450 | }, |
2817 | /* EVEX_W_0F3823_P_1 */ |
3451 | /* EVEX_W_0F3823_P_1 */ |
2818 | { |
3452 | { |
2819 | { "vpmovsdw", { EXxmmq, XM } }, |
3453 | { "vpmovsdw", { EXxmmq, XM }, 0 }, |
2820 | }, |
3454 | }, |
2821 | /* EVEX_W_0F3824_P_1 */ |
3455 | /* EVEX_W_0F3824_P_1 */ |
2822 | { |
3456 | { |
2823 | { "vpmovsqw", { EXxmmqd, XM } }, |
3457 | { "vpmovsqw", { EXxmmqd, XM }, 0 }, |
2824 | }, |
3458 | }, |
2825 | /* EVEX_W_0F3825_P_1 */ |
3459 | /* EVEX_W_0F3825_P_1 */ |
2826 | { |
3460 | { |
2827 | { "vpmovsqd", { EXxmmq, XM } }, |
3461 | { "vpmovsqd", { EXxmmq, XM }, 0 }, |
2828 | }, |
3462 | }, |
2829 | /* EVEX_W_0F3825_P_2 */ |
3463 | /* EVEX_W_0F3825_P_2 */ |
2830 | { |
3464 | { |
- | 3465 | { "vpmovsxdq", { XM, EXxmmq }, 0 }, |
|
- | 3466 | }, |
|
- | 3467 | /* EVEX_W_0F3826_P_1 */ |
|
- | 3468 | { |
|
- | 3469 | { "vptestnmb", { XMask, Vex, EXx }, 0 }, |
|
- | 3470 | { "vptestnmw", { XMask, Vex, EXx }, 0 }, |
|
- | 3471 | }, |
|
- | 3472 | /* EVEX_W_0F3826_P_2 */ |
|
- | 3473 | { |
|
- | 3474 | { "vptestmb", { XMask, Vex, EXx }, 0 }, |
|
- | 3475 | { "vptestmw", { XMask, Vex, EXx }, 0 }, |
|
- | 3476 | }, |
|
- | 3477 | /* EVEX_W_0F3828_P_1 */ |
|
- | 3478 | { |
|
- | 3479 | { "vpmovm2b", { XM, MaskR }, 0 }, |
|
2831 | { "vpmovsxdq", { XM, EXxmmq } }, |
3480 | { "vpmovm2w", { XM, MaskR }, 0 }, |
2832 | }, |
3481 | }, |
2833 | /* EVEX_W_0F3828_P_2 */ |
3482 | /* EVEX_W_0F3828_P_2 */ |
2834 | { |
3483 | { |
2835 | { Bad_Opcode }, |
3484 | { Bad_Opcode }, |
- | 3485 | { "vpmuldq", { XM, Vex, EXx }, 0 }, |
|
- | 3486 | }, |
|
- | 3487 | /* EVEX_W_0F3829_P_1 */ |
|
- | 3488 | { |
|
- | 3489 | { "vpmovb2m", { XMask, EXx }, 0 }, |
|
2836 | { "vpmuldq", { XM, Vex, EXx } }, |
3490 | { "vpmovw2m", { XMask, EXx }, 0 }, |
2837 | }, |
3491 | }, |
2838 | /* EVEX_W_0F3829_P_2 */ |
3492 | /* EVEX_W_0F3829_P_2 */ |
2839 | { |
3493 | { |
2840 | { Bad_Opcode }, |
3494 | { Bad_Opcode }, |
2841 | { "vpcmpeqq", { XMask, Vex, EXx } }, |
3495 | { "vpcmpeqq", { XMask, Vex, EXx }, 0 }, |
2842 | }, |
3496 | }, |
2843 | /* EVEX_W_0F382A_P_1 */ |
3497 | /* EVEX_W_0F382A_P_1 */ |
2844 | { |
3498 | { |
2845 | { Bad_Opcode }, |
3499 | { Bad_Opcode }, |
2846 | { "vpbroadcastmb2q", { XM, MaskR } }, |
3500 | { "vpbroadcastmb2q", { XM, MaskR }, 0 }, |
2847 | }, |
3501 | }, |
2848 | /* EVEX_W_0F382A_P_2 */ |
3502 | /* EVEX_W_0F382A_P_2 */ |
2849 | { |
3503 | { |
- | 3504 | { "vmovntdqa", { XM, EXEvexXNoBcst }, 0 }, |
|
- | 3505 | }, |
|
- | 3506 | /* EVEX_W_0F382B_P_2 */ |
|
- | 3507 | { |
|
- | 3508 | { "vpackusdw", { XM, Vex, EXx }, 0 }, |
|
- | 3509 | }, |
|
- | 3510 | /* EVEX_W_0F3830_P_1 */ |
|
- | 3511 | { |
|
2850 | { "vmovntdqa", { XM, EXEvexXNoBcst } }, |
3512 | { "vpmovwb", { EXxmmq, XM }, 0 }, |
2851 | }, |
3513 | }, |
2852 | /* EVEX_W_0F3831_P_1 */ |
3514 | /* EVEX_W_0F3831_P_1 */ |
2853 | { |
3515 | { |
2854 | { "vpmovdb", { EXxmmqd, XM } }, |
3516 | { "vpmovdb", { EXxmmqd, XM }, 0 }, |
2855 | }, |
3517 | }, |
2856 | /* EVEX_W_0F3832_P_1 */ |
3518 | /* EVEX_W_0F3832_P_1 */ |
2857 | { |
3519 | { |
2858 | { "vpmovqb", { EXxmmdw, XM } }, |
3520 | { "vpmovqb", { EXxmmdw, XM }, 0 }, |
2859 | }, |
3521 | }, |
2860 | /* EVEX_W_0F3833_P_1 */ |
3522 | /* EVEX_W_0F3833_P_1 */ |
2861 | { |
3523 | { |
2862 | { "vpmovdw", { EXxmmq, XM } }, |
3524 | { "vpmovdw", { EXxmmq, XM }, 0 }, |
2863 | }, |
3525 | }, |
2864 | /* EVEX_W_0F3834_P_1 */ |
3526 | /* EVEX_W_0F3834_P_1 */ |
2865 | { |
3527 | { |
2866 | { "vpmovqw", { EXxmmqd, XM } }, |
3528 | { "vpmovqw", { EXxmmqd, XM }, 0 }, |
2867 | }, |
3529 | }, |
2868 | /* EVEX_W_0F3835_P_1 */ |
3530 | /* EVEX_W_0F3835_P_1 */ |
2869 | { |
3531 | { |
2870 | { "vpmovqd", { EXxmmq, XM } }, |
3532 | { "vpmovqd", { EXxmmq, XM }, 0 }, |
2871 | }, |
3533 | }, |
2872 | /* EVEX_W_0F3835_P_2 */ |
3534 | /* EVEX_W_0F3835_P_2 */ |
2873 | { |
3535 | { |
2874 | { "vpmovzxdq", { XM, EXxmmq } }, |
3536 | { "vpmovzxdq", { XM, EXxmmq }, 0 }, |
2875 | }, |
3537 | }, |
2876 | /* EVEX_W_0F3837_P_2 */ |
3538 | /* EVEX_W_0F3837_P_2 */ |
2877 | { |
3539 | { |
2878 | { Bad_Opcode }, |
3540 | { Bad_Opcode }, |
- | 3541 | { "vpcmpgtq", { XMask, Vex, EXx }, 0 }, |
|
- | 3542 | }, |
|
- | 3543 | /* EVEX_W_0F3838_P_1 */ |
|
- | 3544 | { |
|
- | 3545 | { "vpmovm2d", { XM, MaskR }, 0 }, |
|
- | 3546 | { "vpmovm2q", { XM, MaskR }, 0 }, |
|
- | 3547 | }, |
|
- | 3548 | /* EVEX_W_0F3839_P_1 */ |
|
- | 3549 | { |
|
- | 3550 | { "vpmovd2m", { XMask, EXx }, 0 }, |
|
2879 | { "vpcmpgtq", { XMask, Vex, EXx } }, |
3551 | { "vpmovq2m", { XMask, EXx }, 0 }, |
2880 | }, |
3552 | }, |
2881 | /* EVEX_W_0F383A_P_1 */ |
3553 | /* EVEX_W_0F383A_P_1 */ |
2882 | { |
3554 | { |
2883 | { "vpbroadcastmw2d", { XM, MaskR } }, |
3555 | { "vpbroadcastmw2d", { XM, MaskR }, 0 }, |
2884 | }, |
3556 | }, |
2885 | /* EVEX_W_0F3840_P_2 */ |
3557 | /* EVEX_W_0F3840_P_2 */ |
2886 | { |
3558 | { |
- | 3559 | { "vpmulld", { XM, Vex, EXx }, 0 }, |
|
2887 | { "vpmulld", { XM, Vex, EXx } }, |
3560 | { "vpmullq", { XM, Vex, EXx }, 0 }, |
2888 | }, |
3561 | }, |
2889 | /* EVEX_W_0F3858_P_2 */ |
3562 | /* EVEX_W_0F3858_P_2 */ |
2890 | { |
3563 | { |
2891 | { "vpbroadcastd", { XM, EXxmm_md } }, |
3564 | { "vpbroadcastd", { XM, EXxmm_md }, 0 }, |
2892 | }, |
3565 | }, |
2893 | /* EVEX_W_0F3859_P_2 */ |
3566 | /* EVEX_W_0F3859_P_2 */ |
2894 | { |
3567 | { |
2895 | { Bad_Opcode }, |
3568 | { "vbroadcasti32x2", { XM, EXxmm_mq }, 0 }, |
2896 | { "vpbroadcastq", { XM, EXxmm_mq } }, |
3569 | { "vpbroadcastq", { XM, EXxmm_mq }, 0 }, |
2897 | }, |
3570 | }, |
2898 | /* EVEX_W_0F385A_P_2 */ |
3571 | /* EVEX_W_0F385A_P_2 */ |
2899 | { |
3572 | { |
- | 3573 | { "vbroadcasti32x4", { XM, EXxmm }, 0 }, |
|
2900 | { "vbroadcasti32x4", { XM, EXxmm } }, |
3574 | { "vbroadcasti64x2", { XM, EXxmm }, 0 }, |
2901 | }, |
3575 | }, |
2902 | /* EVEX_W_0F385B_P_2 */ |
3576 | /* EVEX_W_0F385B_P_2 */ |
- | 3577 | { |
|
- | 3578 | { "vbroadcasti32x8", { XM, EXxmmq }, 0 }, |
|
- | 3579 | { "vbroadcasti64x4", { XM, EXymm }, 0 }, |
|
- | 3580 | }, |
|
- | 3581 | /* EVEX_W_0F3866_P_2 */ |
|
- | 3582 | { |
|
- | 3583 | { "vpblendmb", { XM, Vex, EXx }, 0 }, |
|
- | 3584 | { "vpblendmw", { XM, Vex, EXx }, 0 }, |
|
- | 3585 | }, |
|
- | 3586 | /* EVEX_W_0F3875_P_2 */ |
|
- | 3587 | { |
|
- | 3588 | { "vpermi2b", { XM, Vex, EXx }, 0 }, |
|
- | 3589 | { "vpermi2w", { XM, Vex, EXx }, 0 }, |
|
- | 3590 | }, |
|
- | 3591 | /* EVEX_W_0F3878_P_2 */ |
|
- | 3592 | { |
|
- | 3593 | { "vpbroadcastb", { XM, EXxmm_mb }, 0 }, |
|
- | 3594 | }, |
|
- | 3595 | /* EVEX_W_0F3879_P_2 */ |
|
- | 3596 | { |
|
- | 3597 | { "vpbroadcastw", { XM, EXxmm_mw }, 0 }, |
|
- | 3598 | }, |
|
- | 3599 | /* EVEX_W_0F387A_P_2 */ |
|
- | 3600 | { |
|
- | 3601 | { "vpbroadcastb", { XM, Rd }, 0 }, |
|
- | 3602 | }, |
|
- | 3603 | /* EVEX_W_0F387B_P_2 */ |
|
- | 3604 | { |
|
- | 3605 | { "vpbroadcastw", { XM, Rd }, 0 }, |
|
- | 3606 | }, |
|
- | 3607 | /* EVEX_W_0F387D_P_2 */ |
|
- | 3608 | { |
|
- | 3609 | { "vpermt2b", { XM, Vex, EXx }, 0 }, |
|
- | 3610 | { "vpermt2w", { XM, Vex, EXx }, 0 }, |
|
- | 3611 | }, |
|
- | 3612 | /* EVEX_W_0F3883_P_2 */ |
|
2903 | { |
3613 | { |
2904 | { Bad_Opcode }, |
3614 | { Bad_Opcode }, |
- | 3615 | { "vpmultishiftqb", { XM, Vex, EXx }, 0 }, |
|
- | 3616 | }, |
|
- | 3617 | /* EVEX_W_0F388D_P_2 */ |
|
- | 3618 | { |
|
- | 3619 | { "vpermb", { XM, Vex, EXx }, 0 }, |
|
2905 | { "vbroadcasti64x4", { XM, EXymm } }, |
3620 | { "vpermw", { XM, Vex, EXx }, 0 }, |
2906 | }, |
3621 | }, |
2907 | /* EVEX_W_0F3891_P_2 */ |
3622 | /* EVEX_W_0F3891_P_2 */ |
2908 | { |
3623 | { |
2909 | { "vpgatherqd", { XMxmmq, MVexVSIBQWpX } }, |
3624 | { "vpgatherqd", { XMxmmq, MVexVSIBQDWpX }, 0 }, |
2910 | { "vpgatherqq", { XM, MVexVSIBQWpX } }, |
3625 | { "vpgatherqq", { XM, MVexVSIBQWpX }, 0 }, |
2911 | }, |
3626 | }, |
2912 | /* EVEX_W_0F3893_P_2 */ |
3627 | /* EVEX_W_0F3893_P_2 */ |
2913 | { |
3628 | { |
2914 | { "vgatherqps", { XMxmmq, MVexVSIBQWpX } }, |
3629 | { "vgatherqps", { XMxmmq, MVexVSIBQDWpX }, 0 }, |
2915 | { "vgatherqpd", { XM, MVexVSIBQWpX } }, |
3630 | { "vgatherqpd", { XM, MVexVSIBQWpX }, 0 }, |
2916 | }, |
3631 | }, |
2917 | /* EVEX_W_0F38A1_P_2 */ |
3632 | /* EVEX_W_0F38A1_P_2 */ |
2918 | { |
3633 | { |
2919 | { "vpscatterqd", { MVexVSIBQWpX, XMxmmq } }, |
3634 | { "vpscatterqd", { MVexVSIBQDWpX, XMxmmq }, 0 }, |
2920 | { "vpscatterqq", { MVexVSIBQWpX, XM } }, |
3635 | { "vpscatterqq", { MVexVSIBQWpX, XM }, 0 }, |
2921 | }, |
3636 | }, |
2922 | /* EVEX_W_0F38A3_P_2 */ |
3637 | /* EVEX_W_0F38A3_P_2 */ |
2923 | { |
3638 | { |
2924 | { "vscatterqps", { MVexVSIBQWpX, XMxmmq } }, |
3639 | { "vscatterqps", { MVexVSIBQDWpX, XMxmmq }, 0 }, |
2925 | { "vscatterqpd", { MVexVSIBQWpX, XM } }, |
3640 | { "vscatterqpd", { MVexVSIBQWpX, XM }, 0 }, |
2926 | }, |
3641 | }, |
2927 | /* EVEX_W_0F38C7_R_1_P_2 */ |
3642 | /* EVEX_W_0F38C7_R_1_P_2 */ |
2928 | { |
3643 | { |
2929 | { "vgatherpf0qps", { MVexVSIBDWpX } }, |
3644 | { "vgatherpf0qps", { MVexVSIBDQWpX }, 0 }, |
2930 | { "vgatherpf0qpd", { MVexVSIBQWpX } }, |
3645 | { "vgatherpf0qpd", { MVexVSIBQWpX }, 0 }, |
2931 | }, |
3646 | }, |
2932 | /* EVEX_W_0F38C7_R_2_P_2 */ |
3647 | /* EVEX_W_0F38C7_R_2_P_2 */ |
2933 | { |
3648 | { |
2934 | { "vgatherpf1qps", { MVexVSIBDWpX } }, |
3649 | { "vgatherpf1qps", { MVexVSIBDQWpX }, 0 }, |
2935 | { "vgatherpf1qpd", { MVexVSIBQWpX } }, |
3650 | { "vgatherpf1qpd", { MVexVSIBQWpX }, 0 }, |
2936 | }, |
3651 | }, |
2937 | /* EVEX_W_0F38C7_R_5_P_2 */ |
3652 | /* EVEX_W_0F38C7_R_5_P_2 */ |
2938 | { |
3653 | { |
2939 | { "vscatterpf0qps", { MVexVSIBDWpX } }, |
3654 | { "vscatterpf0qps", { MVexVSIBDQWpX }, 0 }, |
2940 | { "vscatterpf0qpd", { MVexVSIBQWpX } }, |
3655 | { "vscatterpf0qpd", { MVexVSIBQWpX }, 0 }, |
2941 | }, |
3656 | }, |
2942 | /* EVEX_W_0F38C7_R_6_P_2 */ |
3657 | /* EVEX_W_0F38C7_R_6_P_2 */ |
2943 | { |
3658 | { |
2944 | { "vscatterpf1qps", { MVexVSIBDWpX } }, |
3659 | { "vscatterpf1qps", { MVexVSIBDQWpX }, 0 }, |
2945 | { "vscatterpf1qpd", { MVexVSIBQWpX } }, |
3660 | { "vscatterpf1qpd", { MVexVSIBQWpX }, 0 }, |
2946 | }, |
- | |
2947 | 3661 | }, |
|
2948 | /* EVEX_W_0F3A00_P_2 */ |
3662 | /* EVEX_W_0F3A00_P_2 */ |
2949 | { |
3663 | { |
2950 | { Bad_Opcode }, |
3664 | { Bad_Opcode }, |
2951 | { "vpermq", { XM, EXx, Ib } }, |
3665 | { "vpermq", { XM, EXx, Ib }, 0 }, |
2952 | }, |
3666 | }, |
2953 | /* EVEX_W_0F3A01_P_2 */ |
3667 | /* EVEX_W_0F3A01_P_2 */ |
2954 | { |
3668 | { |
2955 | { Bad_Opcode }, |
3669 | { Bad_Opcode }, |
2956 | { "vpermpd", { XM, EXx, Ib } }, |
3670 | { "vpermpd", { XM, EXx, Ib }, 0 }, |
2957 | }, |
3671 | }, |
2958 | /* EVEX_W_0F3A04_P_2 */ |
3672 | /* EVEX_W_0F3A04_P_2 */ |
2959 | { |
3673 | { |
2960 | { "vpermilps", { XM, EXx, Ib } }, |
3674 | { "vpermilps", { XM, EXx, Ib }, 0 }, |
2961 | }, |
3675 | }, |
2962 | /* EVEX_W_0F3A05_P_2 */ |
3676 | /* EVEX_W_0F3A05_P_2 */ |
2963 | { |
3677 | { |
2964 | { Bad_Opcode }, |
3678 | { Bad_Opcode }, |
2965 | { "vpermilpd", { XM, EXx, Ib } }, |
3679 | { "vpermilpd", { XM, EXx, Ib }, 0 }, |
2966 | }, |
3680 | }, |
2967 | /* EVEX_W_0F3A08_P_2 */ |
3681 | /* EVEX_W_0F3A08_P_2 */ |
2968 | { |
3682 | { |
2969 | { "vrndscaleps", { XM, EXx, EXxEVexS, Ib } }, |
3683 | { "vrndscaleps", { XM, EXx, EXxEVexS, Ib }, 0 }, |
2970 | }, |
3684 | }, |
2971 | /* EVEX_W_0F3A09_P_2 */ |
3685 | /* EVEX_W_0F3A09_P_2 */ |
2972 | { |
3686 | { |
2973 | { Bad_Opcode }, |
3687 | { Bad_Opcode }, |
2974 | { "vrndscalepd", { XM, EXx, EXxEVexS, Ib } }, |
3688 | { "vrndscalepd", { XM, EXx, EXxEVexS, Ib }, 0 }, |
2975 | }, |
3689 | }, |
2976 | /* EVEX_W_0F3A0A_P_2 */ |
3690 | /* EVEX_W_0F3A0A_P_2 */ |
2977 | { |
3691 | { |
2978 | { "vrndscaless", { XMScalar, VexScalar, EXxmm_md, EXxEVexS, Ib } }, |
3692 | { "vrndscaless", { XMScalar, VexScalar, EXxmm_md, EXxEVexS, Ib }, 0 }, |
2979 | }, |
3693 | }, |
2980 | /* EVEX_W_0F3A0B_P_2 */ |
3694 | /* EVEX_W_0F3A0B_P_2 */ |
2981 | { |
3695 | { |
2982 | { Bad_Opcode }, |
3696 | { Bad_Opcode }, |
- | 3697 | { "vrndscalesd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexS, Ib }, 0 }, |
|
- | 3698 | }, |
|
- | 3699 | /* EVEX_W_0F3A16_P_2 */ |
|
- | 3700 | { |
|
- | 3701 | { "vpextrd", { Edqd, XM, Ib }, 0 }, |
|
2983 | { "vrndscalesd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexS, Ib } }, |
3702 | { "vpextrq", { Eq, XM, Ib }, 0 }, |
2984 | }, |
3703 | }, |
2985 | /* EVEX_W_0F3A18_P_2 */ |
3704 | /* EVEX_W_0F3A18_P_2 */ |
2986 | { |
3705 | { |
- | 3706 | { "vinsertf32x4", { XM, Vex, EXxmm, Ib }, 0 }, |
|
2987 | { "vinsertf32x4", { XM, Vex, EXxmm, Ib } }, |
3707 | { "vinsertf64x2", { XM, Vex, EXxmm, Ib }, 0 }, |
2988 | }, |
3708 | }, |
2989 | /* EVEX_W_0F3A19_P_2 */ |
3709 | /* EVEX_W_0F3A19_P_2 */ |
2990 | { |
3710 | { |
- | 3711 | { "vextractf32x4", { EXxmm, XM, Ib }, 0 }, |
|
2991 | { "vextractf32x4", { EXxmm, XM, Ib } }, |
3712 | { "vextractf64x2", { EXxmm, XM, Ib }, 0 }, |
2992 | }, |
3713 | }, |
2993 | /* EVEX_W_0F3A1A_P_2 */ |
3714 | /* EVEX_W_0F3A1A_P_2 */ |
2994 | { |
3715 | { |
2995 | { Bad_Opcode }, |
3716 | { "vinsertf32x8", { XM, Vex, EXxmmq, Ib }, 0 }, |
2996 | { "vinsertf64x4", { XM, Vex, EXxmmq, Ib } }, |
3717 | { "vinsertf64x4", { XM, Vex, EXxmmq, Ib }, 0 }, |
2997 | }, |
3718 | }, |
2998 | /* EVEX_W_0F3A1B_P_2 */ |
3719 | /* EVEX_W_0F3A1B_P_2 */ |
2999 | { |
3720 | { |
3000 | { Bad_Opcode }, |
3721 | { "vextractf32x8", { EXxmmq, XM, Ib }, 0 }, |
3001 | { "vextractf64x4", { EXxmmq, XM, Ib } }, |
3722 | { "vextractf64x4", { EXxmmq, XM, Ib }, 0 }, |
3002 | }, |
3723 | }, |
3003 | /* EVEX_W_0F3A1D_P_2 */ |
3724 | /* EVEX_W_0F3A1D_P_2 */ |
3004 | { |
3725 | { |
3005 | { "vcvtps2ph", { EXxmmq, XM, EXxEVexS, Ib } }, |
3726 | { "vcvtps2ph", { EXxmmq, XM, EXxEVexS, Ib }, 0 }, |
3006 | }, |
3727 | }, |
3007 | /* EVEX_W_0F3A21_P_2 */ |
3728 | /* EVEX_W_0F3A21_P_2 */ |
3008 | { |
3729 | { |
- | 3730 | { "vinsertps", { XMM, Vex, EXxmm_md, Ib }, 0 }, |
|
- | 3731 | }, |
|
- | 3732 | /* EVEX_W_0F3A22_P_2 */ |
|
- | 3733 | { |
|
- | 3734 | { "vpinsrd", { XM, Vex128, Edqd, Ib }, 0 }, |
|
3009 | { "vinsertps", { XMM, Vex, EXxmm_md, Ib } }, |
3735 | { "vpinsrq", { XM, Vex128, Eq, Ib }, 0 }, |
3010 | }, |
3736 | }, |
3011 | /* EVEX_W_0F3A23_P_2 */ |
3737 | /* EVEX_W_0F3A23_P_2 */ |
3012 | { |
3738 | { |
3013 | { "vshuff32x4", { XM, Vex, EXx, Ib } }, |
3739 | { "vshuff32x4", { XM, Vex, EXx, Ib }, 0 }, |
3014 | { "vshuff64x2", { XM, Vex, EXx, Ib } }, |
3740 | { "vshuff64x2", { XM, Vex, EXx, Ib }, 0 }, |
3015 | }, |
3741 | }, |
3016 | /* EVEX_W_0F3A38_P_2 */ |
3742 | /* EVEX_W_0F3A38_P_2 */ |
3017 | { |
3743 | { |
- | 3744 | { "vinserti32x4", { XM, Vex, EXxmm, Ib }, 0 }, |
|
3018 | { "vinserti32x4", { XM, Vex, EXxmm, Ib } }, |
3745 | { "vinserti64x2", { XM, Vex, EXxmm, Ib }, 0 }, |
3019 | }, |
3746 | }, |
3020 | /* EVEX_W_0F3A39_P_2 */ |
3747 | /* EVEX_W_0F3A39_P_2 */ |
3021 | { |
3748 | { |
- | 3749 | { "vextracti32x4", { EXxmm, XM, Ib }, 0 }, |
|
3022 | { "vextracti32x4", { EXxmm, XM, Ib } }, |
3750 | { "vextracti64x2", { EXxmm, XM, Ib }, 0 }, |
3023 | }, |
3751 | }, |
3024 | /* EVEX_W_0F3A3A_P_2 */ |
3752 | /* EVEX_W_0F3A3A_P_2 */ |
3025 | { |
3753 | { |
3026 | { Bad_Opcode }, |
3754 | { "vinserti32x8", { XM, Vex, EXxmmq, Ib }, 0 }, |
3027 | { "vinserti64x4", { XM, Vex, EXxmmq, Ib } }, |
3755 | { "vinserti64x4", { XM, Vex, EXxmmq, Ib }, 0 }, |
3028 | }, |
3756 | }, |
3029 | /* EVEX_W_0F3A3B_P_2 */ |
3757 | /* EVEX_W_0F3A3B_P_2 */ |
3030 | { |
3758 | { |
3031 | { Bad_Opcode }, |
3759 | { "vextracti32x8", { EXxmmq, XM, Ib }, 0 }, |
- | 3760 | { "vextracti64x4", { EXxmmq, XM, Ib }, 0 }, |
|
- | 3761 | }, |
|
- | 3762 | /* EVEX_W_0F3A3E_P_2 */ |
|
- | 3763 | { |
|
- | 3764 | { "vpcmpub", { XMask, Vex, EXx, Ib }, 0 }, |
|
- | 3765 | { "vpcmpuw", { XMask, Vex, EXx, Ib }, 0 }, |
|
- | 3766 | }, |
|
- | 3767 | /* EVEX_W_0F3A3F_P_2 */ |
|
- | 3768 | { |
|
- | 3769 | { "vpcmpb", { XMask, Vex, EXx, Ib }, 0 }, |
|
- | 3770 | { "vpcmpw", { XMask, Vex, EXx, Ib }, 0 }, |
|
- | 3771 | }, |
|
- | 3772 | /* EVEX_W_0F3A42_P_2 */ |
|
- | 3773 | { |
|
3032 | { "vextracti64x4", { EXxmmq, XM, Ib } }, |
3774 | { "vdbpsadbw", { XM, Vex, EXx, Ib }, 0 }, |
3033 | }, |
3775 | }, |
3034 | /* EVEX_W_0F3A43_P_2 */ |
3776 | /* EVEX_W_0F3A43_P_2 */ |
3035 | { |
3777 | { |
3036 | { "vshufi32x4", { XM, Vex, EXx, Ib } }, |
3778 | { "vshufi32x4", { XM, Vex, EXx, Ib }, 0 }, |
- | 3779 | { "vshufi64x2", { XM, Vex, EXx, Ib }, 0 }, |
|
- | 3780 | }, |
|
- | 3781 | /* EVEX_W_0F3A50_P_2 */ |
|
- | 3782 | { |
|
- | 3783 | { "vrangeps", { XM, Vex, EXx, EXxEVexS, Ib }, 0 }, |
|
- | 3784 | { "vrangepd", { XM, Vex, EXx, EXxEVexS, Ib }, 0 }, |
|
- | 3785 | }, |
|
- | 3786 | /* EVEX_W_0F3A51_P_2 */ |
|
- | 3787 | { |
|
- | 3788 | { "vrangess", { XMScalar, VexScalar, EXxmm_md, EXxEVexS, Ib }, 0 }, |
|
- | 3789 | { "vrangesd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexS, Ib }, 0 }, |
|
- | 3790 | }, |
|
- | 3791 | /* EVEX_W_0F3A56_P_2 */ |
|
- | 3792 | { |
|
- | 3793 | { "vreduceps", { XM, EXx, EXxEVexS, Ib }, 0 }, |
|
- | 3794 | { "vreducepd", { XM, EXx, EXxEVexS, Ib }, 0 }, |
|
- | 3795 | }, |
|
- | 3796 | /* EVEX_W_0F3A57_P_2 */ |
|
- | 3797 | { |
|
- | 3798 | { "vreducess", { XMScalar, VexScalar, EXxmm_md, EXxEVexS, Ib }, 0 }, |
|
- | 3799 | { "vreducesd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexS, Ib }, 0 }, |
|
- | 3800 | }, |
|
- | 3801 | /* EVEX_W_0F3A66_P_2 */ |
|
- | 3802 | { |
|
- | 3803 | { "vfpclassps%XZ", { XMask, EXx, Ib }, 0 }, |
|
- | 3804 | { "vfpclasspd%XZ", { XMask, EXx, Ib }, 0 }, |
|
- | 3805 | }, |
|
- | 3806 | /* EVEX_W_0F3A67_P_2 */ |
|
- | 3807 | { |
|
- | 3808 | { "vfpclassss", { XMask, EXxmm_md, Ib }, 0 }, |
|
3037 | { "vshufi64x2", { XM, Vex, EXx, Ib } }, |
3809 | { "vfpclasssd", { XMask, EXxmm_mq, Ib }, 0 }, |
3038 | }, |
3810 | }, |
3039 | #endif /* NEED_VEX_W_TABLE */ |
3811 | #endif /* NEED_VEX_W_TABLE */ |
3040 | #ifdef NEED_MOD_TABLE |
3812 | #ifdef NEED_MOD_TABLE |
3041 | { |
3813 | { |