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| 1 | /* Opcode table for the Atmel AVR micro controllers. |
1 | /* Opcode table for the Atmel AVR micro controllers. |
| Line 2... | Line 2... | ||
| 2 | 2 | ||
| 3 | Copyright 2000, 2001, 2004, 2006, 2008, 2010, 2012 Free Software Foundation, Inc. |
3 | Copyright (C) 2000-2015 Free Software Foundation, Inc. |
| Line 4... | Line 4... | ||
| 4 | Contributed by Denis Chertykov |
4 | Contributed by Denis Chertykov |
| 5 | 5 | ||
| 6 | This program is free software; you can redistribute it and/or modify |
6 | This program is free software; you can redistribute it and/or modify |
| Line 20... | Line 20... | ||
| 20 | 20 | ||
| 21 | #define AVR_ISA_1200 0x0001 /* In the beginning there was ... */ |
21 | #define AVR_ISA_1200 0x0001 /* In the beginning there was ... */ |
| 22 | #define AVR_ISA_LPM 0x0002 /* device has LPM */ |
22 | #define AVR_ISA_LPM 0x0002 /* device has LPM */ |
| 23 | #define AVR_ISA_LPMX 0x0004 /* device has LPM Rd,Z[+] */ |
23 | #define AVR_ISA_LPMX 0x0004 /* device has LPM Rd,Z[+] */ |
| - | 24 | #define AVR_ISA_SRAM 0x0008 /* device has SRAM (LD, ST, PUSH, POP, ...) */ |
|
| 24 | #define AVR_ISA_SRAM 0x0008 /* device has SRAM (LD, ST, PUSH, POP, ...) */ |
25 | #define AVR_ISA_TINY 0x0010 /* device has Tiny core specific encodings */ |
| 25 | #define AVR_ISA_MEGA 0x0020 /* device has >8K program memory (JMP and CALL |
26 | #define AVR_ISA_MEGA 0x0020 /* device has >8K program memory (JMP and CALL |
| 26 | supported, no 8K wrap on RJMP and RCALL) */ |
27 | supported, no 8K wrap on RJMP and RCALL) */ |
| 27 | #define AVR_ISA_MUL 0x0040 /* device has new core (MUL, FMUL, ...) */ |
28 | #define AVR_ISA_MUL 0x0040 /* device has new core (MUL, FMUL, ...) */ |
| 28 | #define AVR_ISA_ELPM 0x0080 /* device has >64K program memory (ELPM) */ |
29 | #define AVR_ISA_ELPM 0x0080 /* device has >64K program memory (ELPM) */ |
| Line 35... | Line 36... | ||
| 35 | #define AVR_ISA_DES 0x4000 /* device has DES */ |
36 | #define AVR_ISA_DES 0x4000 /* device has DES */ |
| 36 | #define AVR_ISA_RMW 0x8000 /* device has RMW instructions XCH,LAC,LAS,LAT */ |
37 | #define AVR_ISA_RMW 0x8000 /* device has RMW instructions XCH,LAC,LAS,LAT */ |
| Line 37... | Line 38... | ||
| 37 | 38 | ||
| 38 | #define AVR_ISA_TINY1 (AVR_ISA_1200 | AVR_ISA_LPM) |
39 | #define AVR_ISA_TINY1 (AVR_ISA_1200 | AVR_ISA_LPM) |
| - | 40 | #define AVR_ISA_2xxx (AVR_ISA_TINY1 | AVR_ISA_SRAM) |
|
| 39 | #define AVR_ISA_2xxx (AVR_ISA_TINY1 | AVR_ISA_SRAM) |
41 | #define AVR_ISA_2xxxa (AVR_ISA_1200 | AVR_ISA_SRAM) |
| 40 | /* For the attiny26 which is missing LPM Rd,Z+. */ |
42 | /* For the attiny26 which is missing LPM Rd,Z+. */ |
| 41 | #define AVR_ISA_2xxe (AVR_ISA_2xxx | AVR_ISA_LPMX) |
43 | #define AVR_ISA_2xxe (AVR_ISA_2xxx | AVR_ISA_LPMX) |
| 42 | #define AVR_ISA_RF401 (AVR_ISA_2xxx | AVR_ISA_MOVW | AVR_ISA_LPMX) |
44 | #define AVR_ISA_RF401 (AVR_ISA_2xxx | AVR_ISA_MOVW | AVR_ISA_LPMX) |
| 43 | #define AVR_ISA_TINY2 (AVR_ISA_2xxx | AVR_ISA_MOVW | AVR_ISA_LPMX | \ |
45 | #define AVR_ISA_TINY2 (AVR_ISA_2xxx | AVR_ISA_MOVW | AVR_ISA_LPMX | \ |
| Line 70... | Line 72... | ||
| 70 | #define AVR_ISA_AVR6 (AVR_ISA_1200 | AVR_ISA_LPM | AVR_ISA_LPMX | \ |
72 | #define AVR_ISA_AVR6 (AVR_ISA_1200 | AVR_ISA_LPM | AVR_ISA_LPMX | \ |
| 71 | AVR_ISA_SRAM | AVR_ISA_MEGA | AVR_ISA_MUL | \ |
73 | AVR_ISA_SRAM | AVR_ISA_MEGA | AVR_ISA_MUL | \ |
| 72 | AVR_ISA_ELPM | AVR_ISA_ELPMX | AVR_ISA_SPM | \ |
74 | AVR_ISA_ELPM | AVR_ISA_ELPMX | AVR_ISA_SPM | \ |
| 73 | AVR_ISA_BRK | AVR_ISA_EIND | AVR_ISA_MOVW) |
75 | AVR_ISA_BRK | AVR_ISA_EIND | AVR_ISA_MOVW) |
| Line -... | Line 76... | ||
| - | 76 | ||
| - | 77 | #define AVR_ISA_AVRTINY (AVR_ISA_1200 | AVR_ISA_BRK | AVR_ISA_SRAM | \ |
|
| - | 78 | AVR_ISA_TINY) |
|
| 74 | 79 | ||
| 75 | #define REGISTER_P(x) ((x) == 'r' \ |
80 | #define REGISTER_P(x) ((x) == 'r' \ |
| 76 | || (x) == 'd' \ |
81 | || (x) == 'd' \ |
| 77 | || (x) == 'w' \ |
82 | || (x) == 'w' \ |
| 78 | || (x) == 'a' \ |
83 | || (x) == 'a' \ |
| Line 92... | Line 97... | ||
| 92 | 97 | ||
| 93 | /* Is this `ldd r,b+0' or `std b+0,r' (b={Y,Z}, disassembled as |
98 | /* Is this `ldd r,b+0' or `std b+0,r' (b={Y,Z}, disassembled as |
| 94 | `ld r,b' or `st b,r' respectively - next opcode entry)? */ |
99 | `ld r,b' or `st b,r' respectively - next opcode entry)? */ |
| Line 95... | Line 100... | ||
| 95 | #define AVR_DISP0_P(x) (((x) & 0xFC07) == 0x8000) |
100 | #define AVR_DISP0_P(x) (((x) & 0xFC07) == 0x8000) |
| 96 | 101 | ||
| 97 | /* constraint letters |
102 | /* Constraint letters: |
| 98 | r - any register |
103 | r - any register |
| 99 | d - `ldi' register (r16-r31) |
104 | d - `ldi' register (r16-r31) |
| 100 | v - `movw' even register (r0, r2, ..., r28, r30) |
105 | v - `movw' even register (r0, r2, ..., r28, r30) |
| Line 108... | Line 113... | ||
| 108 | s - immediate value from 0 to 7 |
113 | s - immediate value from 0 to 7 |
| 109 | P - Port address value from 0 to 63. (in, out) |
114 | P - Port address value from 0 to 63. (in, out) |
| 110 | p - Port address value from 0 to 31. (cbi, sbi, sbic, sbis) |
115 | p - Port address value from 0 to 31. (cbi, sbi, sbic, sbis) |
| 111 | K - immediate value from 0 to 63 (used in `adiw', `sbiw') |
116 | K - immediate value from 0 to 63 (used in `adiw', `sbiw') |
| 112 | i - immediate value |
117 | i - immediate value |
| - | 118 | j - 7 bit immediate value from 0x40 to 0xBF (for 16-bit 'lds'/'sts') |
|
| 113 | l - signed pc relative offset from -64 to 63 |
119 | l - signed pc relative offset from -64 to 63 |
| 114 | L - signed pc relative offset from -2048 to 2047 |
120 | L - signed pc relative offset from -2048 to 2047 |
| 115 | h - absolute code address (call, jmp) |
121 | h - absolute code address (call, jmp) |
| 116 | S - immediate value from 0 to 7 (S = s << 4) |
122 | S - immediate value from 0 to 7 (S = s << 4) |
| 117 | E - immediate value from 0 to 15, shifted left by 4 (des) |
123 | E - immediate value from 0 to 15, shifted left by 4 (des) |
| Line 158... | Line 164... | ||
| 158 | 164 | ||
| 159 | /* Same as {cl,se}[chinstvz] above. */ |
165 | /* Same as {cl,se}[chinstvz] above. */ |
| 160 | AVR_INSN (bclr, "S", "100101001SSS1000", 1, AVR_ISA_1200, 0x9488) |
166 | AVR_INSN (bclr, "S", "100101001SSS1000", 1, AVR_ISA_1200, 0x9488) |
| Line 161... | Line 167... | ||
| 161 | AVR_INSN (bset, "S", "100101000SSS1000", 1, AVR_ISA_1200, 0x9408) |
167 | AVR_INSN (bset, "S", "100101000SSS1000", 1, AVR_ISA_1200, 0x9408) |
| 162 | 168 | ||
| Line 163... | Line 169... | ||
| 163 | AVR_INSN (icall,"", "1001010100001001", 1, AVR_ISA_2xxx, 0x9509) |
169 | AVR_INSN (icall,"", "1001010100001001", 1, AVR_ISA_2xxxa,0x9509) |
| 164 | AVR_INSN (ijmp, "", "1001010000001001", 1, AVR_ISA_2xxx, 0x9409) |
170 | AVR_INSN (ijmp, "", "1001010000001001", 1, AVR_ISA_2xxxa,0x9409) |
| 165 | 171 | ||
| 166 | AVR_INSN (lpm, "?", "1001010111001000", 1, AVR_ISA_TINY1,0x95c8) |
172 | AVR_INSN (lpm, "?", "1001010111001000", 1, AVR_ISA_TINY1,0x95c8) |
| Line 259... | Line 265... | ||
| 259 | AVR_INSN (com, "r", "1001010rrrrr0000", 1, AVR_ISA_1200, 0x9400) |
265 | AVR_INSN (com, "r", "1001010rrrrr0000", 1, AVR_ISA_1200, 0x9400) |
| 260 | AVR_INSN (dec, "r", "1001010rrrrr1010", 1, AVR_ISA_1200, 0x940a) |
266 | AVR_INSN (dec, "r", "1001010rrrrr1010", 1, AVR_ISA_1200, 0x940a) |
| 261 | AVR_INSN (inc, "r", "1001010rrrrr0011", 1, AVR_ISA_1200, 0x9403) |
267 | AVR_INSN (inc, "r", "1001010rrrrr0011", 1, AVR_ISA_1200, 0x9403) |
| 262 | AVR_INSN (lsr, "r", "1001010rrrrr0110", 1, AVR_ISA_1200, 0x9406) |
268 | AVR_INSN (lsr, "r", "1001010rrrrr0110", 1, AVR_ISA_1200, 0x9406) |
| 263 | AVR_INSN (neg, "r", "1001010rrrrr0001", 1, AVR_ISA_1200, 0x9401) |
269 | AVR_INSN (neg, "r", "1001010rrrrr0001", 1, AVR_ISA_1200, 0x9401) |
| 264 | AVR_INSN (pop, "r", "1001000rrrrr1111", 1, AVR_ISA_2xxx, 0x900f) |
270 | AVR_INSN (pop, "r", "1001000rrrrr1111", 1, AVR_ISA_2xxxa,0x900f) |
| 265 | AVR_INSN (push, "r", "1001001rrrrr1111", 1, AVR_ISA_2xxx, 0x920f) |
271 | AVR_INSN (push, "r", "1001001rrrrr1111", 1, AVR_ISA_2xxxa,0x920f) |
| 266 | AVR_INSN (ror, "r", "1001010rrrrr0111", 1, AVR_ISA_1200, 0x9407) |
272 | AVR_INSN (ror, "r", "1001010rrrrr0111", 1, AVR_ISA_1200, 0x9407) |
| 267 | AVR_INSN (swap, "r", "1001010rrrrr0010", 1, AVR_ISA_1200, 0x9402) |
273 | AVR_INSN (swap, "r", "1001010rrrrr0010", 1, AVR_ISA_1200, 0x9402) |
| Line 268... | Line 274... | ||
| 268 | 274 | ||
| 269 | /* Atomic memory operations for XMEGA. List before `sts'. */ |
275 | /* Atomic memory operations for XMEGA. List before `sts'. */ |
| Line 278... | Line 284... | ||
| 278 | AVR_INSN (mulsu,"a,a", "000000110ddd0rrr", 1, AVR_ISA_MUL, 0x0300) |
284 | AVR_INSN (mulsu,"a,a", "000000110ddd0rrr", 1, AVR_ISA_MUL, 0x0300) |
| 279 | AVR_INSN (fmul, "a,a", "000000110ddd1rrr", 1, AVR_ISA_MUL, 0x0308) |
285 | AVR_INSN (fmul, "a,a", "000000110ddd1rrr", 1, AVR_ISA_MUL, 0x0308) |
| 280 | AVR_INSN (fmuls,"a,a", "000000111ddd0rrr", 1, AVR_ISA_MUL, 0x0380) |
286 | AVR_INSN (fmuls,"a,a", "000000111ddd0rrr", 1, AVR_ISA_MUL, 0x0380) |
| 281 | AVR_INSN (fmulsu,"a,a","000000111ddd1rrr", 1, AVR_ISA_MUL, 0x0388) |
287 | AVR_INSN (fmulsu,"a,a","000000111ddd1rrr", 1, AVR_ISA_MUL, 0x0388) |
| Line -... | Line 288... | ||
| - | 288 | ||
| 282 | 289 | AVR_INSN (sts, "j,d", "10101kkkddddkkkk", 1, AVR_ISA_TINY, 0xA800) |
|
| - | 290 | AVR_INSN (sts, "i,r", "1001001ddddd0000", 2, AVR_ISA_2xxx, 0x9200) |
|
| 283 | AVR_INSN (sts, "i,r", "1001001ddddd0000", 2, AVR_ISA_2xxx, 0x9200) |
291 | AVR_INSN (lds, "d,j", "10100kkkddddkkkk", 1, AVR_ISA_TINY, 0xA000) |
| Line 284... | Line 292... | ||
| 284 | AVR_INSN (lds, "r,i", "1001000ddddd0000", 2, AVR_ISA_2xxx, 0x9000) |
292 | AVR_INSN (lds, "r,i", "1001000ddddd0000", 2, AVR_ISA_2xxx, 0x9000) |
| 285 | 293 | ||
| 286 | /* Special case for b+0, `e' must be next entry after `b', |
294 | /* Special case for b+0, `e' must be next entry after `b', |
| Line 293... | Line 301... | ||
| 293 | /* These are for devices that don't exist yet |
301 | /* These are for devices that don't exist yet |
| 294 | (>128K program memory, PC = EIND:Z). */ |
302 | (>128K program memory, PC = EIND:Z). */ |
| 295 | AVR_INSN (eicall, "", "1001010100011001", 1, AVR_ISA_EIND, 0x9519) |
303 | AVR_INSN (eicall, "", "1001010100011001", 1, AVR_ISA_EIND, 0x9519) |
| 296 | AVR_INSN (eijmp, "", "1001010000011001", 1, AVR_ISA_EIND, 0x9419) |
304 | AVR_INSN (eijmp, "", "1001010000011001", 1, AVR_ISA_EIND, 0x9419) |
| Line 297... | Line 305... | ||
| 297 | 305 | ||
| 298 | /* DES instruction for encryption and decryption */ |
306 | /* DES instruction for encryption and decryption. */ |