WebSVN – Kolibri OS – Diff – /contrib/sdk/sources/Intel-2D/sna/sna.c

     int t;
     int r;
     int b;
 } rect_t;
+struct pix_driver
+{
+    char *name;
+    int (*create_bitmap)(bitmap_t * bitmap);
+    int (*destroy_bitmap)(bitmap_t * bitmap);
+    int (*lock_bitmap)(bitmap_t * bitmap);
+    int (*blit)(bitmap_t * bitmap, bool scale, int dst_x, int dst_y,
+                int w, int h, int src_x, int src_y);
+    int (*resize_bitmap)(bitmap_t * bitmap);
+    void (*fini)(void);
+};
 static struct sna_fb sna_fb;
 static int    tls_mask;
     sna_device = sna;
     return kgem_init_fb(&sna->kgem, &sna_fb);
-}
-int sna_init(uint32_t service)
-{
-    ioctl_t   io;
-    int caps = 0;
-    static struct pci_device device;
-    struct sna *sna;
-    DBG(("%s\n", __FUNCTION__));
-    __lock_acquire_recursive(__sna_lock);
-    if(sna_device)
-        goto done;
-    io.handle   = service;
-    io.io_code  = SRV_GET_PCI_INFO;
-    io.input    = &device;
-    io.inp_size = sizeof(device);
-    io.output   = NULL;
-    io.out_size = 0;
-    if (call_service(&io)!=0)
-        goto err1;
-    sna = malloc(sizeof(*sna));
-    if (sna == NULL)
-        goto err1;
-    memset(sna, 0, sizeof(*sna));
-    sna->cpu_features = sna_cpu_detect();
-    sna->PciInfo = &device;
-  	sna->info = intel_detect_chipset(sna->PciInfo);
-    sna->scrn = service;
-    kgem_init(&sna->kgem, service, sna->PciInfo, sna->info->gen);
-    /* Disable tiling by default */
-    sna->tiling = 0;
-    /* Default fail-safe value of 75 Hz */
-//    sna->vblank_interval = 1000 * 1000 * 1000 / 75;
-    sna->flags = 0;
-    sna_accel_init(sna);
-    tls_mask = tls_alloc();
-//    printf("tls mask %x\n", tls_mask);
-done:
-    caps = sna_device->render.caps;
-err1:
-    __lock_release_recursive(__sna_lock);
-    return caps;
-}
-void sna_fini()
-{
-    ENTER();
-    if( sna_device )
-    {
-        struct kgem_bo *mask;
-        __lock_acquire_recursive(__sna_lock);
-        mask = tls_get(tls_mask);
-        sna_device->render.fini(sna_device);
-        if(mask)
-            kgem_bo_destroy(&sna_device->kgem, mask);
-//        kgem_close_batches(&sna_device->kgem);
-   	    kgem_cleanup_cache(&sna_device->kgem);
-   	    sna_device = NULL;
-        __lock_release_recursive(__sna_lock);
-    };
     LEAVE();
     uint32_t        flags;
 }surface_t;
+#define MI_LOAD_REGISTER_IMM		(0x22<<23)
+#define MI_WAIT_FOR_EVENT			(0x03<<23)
+static bool sna_emit_wait_for_scanline_gen6(struct sna *sna,
+                        rect_t *crtc,
+					    int pipe, int y1, int y2,
+					    bool full_height)
+{
+	uint32_t *b;
+	uint32_t event;
+//	if (!sna->kgem.has_secure_batches)
+//		return false;
+	assert(y1 >= 0);
+	assert(y2 > y1);
+	assert(sna->kgem.mode == KGEM_RENDER);
+	/* Always program one less than the desired value */
+	if (--y1 < 0)
+		y1 = crtc->b;
+	y2--;
+	/* The scanline granularity is 3 bits */
+	y1 &= ~7;
+	y2 &= ~7;
+	if (y2 == y1)
+		return false;
+	event = 1 << (3*full_height + pipe*8);
+	b = kgem_get_batch(&sna->kgem);
+	sna->kgem.nbatch += 10;
+	b[0] = MI_LOAD_REGISTER_IMM | 1;
+	b[1] = 0x44050; /* DERRMR */
+	b[2] = ~event;
+	b[3] = MI_LOAD_REGISTER_IMM | 1;
+	b[4] = 0x4f100; /* magic */
+	b[5] = (1 << 31) | (1 << 30) | pipe << 29 | (y1 << 16) | y2;
+	b[6] = MI_WAIT_FOR_EVENT | event;
+	b[7] = MI_LOAD_REGISTER_IMM | 1;
+	b[8] = 0x44050; /* DERRMR */
+	b[9] = ~0;
+	sna->kgem.batch_flags |= I915_EXEC_SECURE;
+	return true;
+}
+bool
+sna_wait_for_scanline(struct sna *sna,
+		      rect_t *crtc,
+		      rect_t *clip)
+{
+	bool full_height;
+	int y1, y2, pipe;
+	bool ret;
+//	if (sna->flags & SNA_NO_VSYNC)
+//		return false;
+	/*
+	 * Make sure we don't wait for a scanline that will
+	 * never occur
+	 */
+	y1 = clip->t - crtc->t;
+	if (y1 < 0)
+		y1 = 0;
+	y2 = clip->b - crtc->t;
+	if (y2 > crtc->b - crtc->t)
+		y2 = crtc->b - crtc->t;
+//	DBG(("%s: clipped range = %d, %d\n", __FUNCTION__, y1, y2));
+//	printf("%s: clipped range = %d, %d\n", __FUNCTION__, y1, y2);
+	if (y2 <= y1 + 4)
+		return false;
+	full_height = y1 == 0 && y2 == crtc->b - crtc->t;
+	pipe = 0;
+	DBG(("%s: pipe=%d, y1=%d, y2=%d, full_height?=%d\n",
+	     __FUNCTION__, pipe, y1, y2, full_height));
+	if (sna->kgem.gen >= 0100)
+		ret = false;
+//	else if (sna->kgem.gen >= 075)
+//		ret = sna_emit_wait_for_scanline_hsw(sna, crtc, pipe, y1, y2, full_height);
+//	else if (sna->kgem.gen >= 070)
+//		ret = sna_emit_wait_for_scanline_ivb(sna, crtc, pipe, y1, y2, full_height);
+	else if (sna->kgem.gen >= 060)
+		ret =sna_emit_wait_for_scanline_gen6(sna, crtc, pipe, y1, y2, full_height);
+//	else if (sna->kgem.gen >= 040)
+//		ret = sna_emit_wait_for_scanline_gen4(sna, crtc, pipe, y1, y2, full_height);
+	return ret;
+}
+static const struct intel_device_info intel_generic_info = {
+	.gen = -1,
+};
+static const struct intel_device_info intel_i915_info = {
+	.gen = 030,
+};
+static const struct intel_device_info intel_i945_info = {
+	.gen = 031,
+};
+static const struct intel_device_info intel_g33_info = {
+	.gen = 033,
+};
+static const struct intel_device_info intel_i965_info = {
+	.gen = 040,
+};
+static const struct intel_device_info intel_g4x_info = {
+	.gen = 045,
+};
+static const struct intel_device_info intel_ironlake_info = {
+	.gen = 050,
+};
+static const struct intel_device_info intel_sandybridge_info = {
+	.gen = 060,
+};
+static const struct intel_device_info intel_ivybridge_info = {
+	.gen = 070,
+};
+static const struct intel_device_info intel_valleyview_info = {
+	.gen = 071,
+};
+static const struct intel_device_info intel_haswell_info = {
+	.gen = 075,
+};
+#define INTEL_DEVICE_MATCH(d,i) \
+    { 0x8086, (d), PCI_MATCH_ANY, PCI_MATCH_ANY, 0x3 << 16, 0xff << 16, (intptr_t)(i) }
+static const struct pci_id_match intel_device_match[] = {
+	INTEL_I915G_IDS(&intel_i915_info),
+	INTEL_I915GM_IDS(&intel_i915_info),
+	INTEL_I945G_IDS(&intel_i945_info),
+	INTEL_I945GM_IDS(&intel_i945_info),
+	INTEL_G33_IDS(&intel_g33_info),
+	INTEL_PINEVIEW_IDS(&intel_g33_info),
+	INTEL_I965G_IDS(&intel_i965_info),
+	INTEL_I965GM_IDS(&intel_i965_info),
+	INTEL_G45_IDS(&intel_g4x_info),
+	INTEL_GM45_IDS(&intel_g4x_info),
+	INTEL_IRONLAKE_D_IDS(&intel_ironlake_info),
+	INTEL_IRONLAKE_M_IDS(&intel_ironlake_info),
+	INTEL_SNB_D_IDS(&intel_sandybridge_info),
+	INTEL_SNB_M_IDS(&intel_sandybridge_info),
+	INTEL_IVB_D_IDS(&intel_ivybridge_info),
+	INTEL_IVB_M_IDS(&intel_ivybridge_info),
+	INTEL_HSW_D_IDS(&intel_haswell_info),
+	INTEL_HSW_M_IDS(&intel_haswell_info),
+	INTEL_VLV_D_IDS(&intel_valleyview_info),
+	INTEL_VLV_M_IDS(&intel_valleyview_info),
+	INTEL_VGA_DEVICE(PCI_MATCH_ANY, &intel_generic_info),
+	{ 0, 0, 0 },
+};
+const struct pci_id_match *PciDevMatch(uint16_t dev,const struct pci_id_match *list)
+{
+    while(list->device_id)
+    {
+        if(dev==list->device_id)
+            return list;
+        list++;
+    }
+    return NULL;
+}
+const struct intel_device_info *
+intel_detect_chipset(struct pci_device *pci)
+{
+    const struct pci_id_match *ent = NULL;
+    ent = PciDevMatch(pci->device_id, intel_device_match);
+    if(ent != NULL)
+        return (const struct intel_device_info*)ent->match_data;
+    else
+        return &intel_generic_info;
+}
+int intel_get_device_id(int fd)
+{
+	struct drm_i915_getparam gp;
+	int devid = 0;
+	memset(&gp, 0, sizeof(gp));
+	gp.param = I915_PARAM_CHIPSET_ID;
+	gp.value = &devid;
+	if (drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp))
+		return 0;
+	return devid;
+}
+int drmIoctl(int fd, unsigned long request, void *arg)
+{
+    ioctl_t  io;
+    io.handle   = fd;
+    io.io_code  = request;
+    io.input    = arg;
+    io.inp_size = 64;
+    io.output   = NULL;
+    io.out_size = 0;
+    return call_service(&io);
+}
+bool
+gen6_composite(struct sna *sna,
+              uint8_t op,
+              PixmapPtr src, struct kgem_bo *src_bo,
+              PixmapPtr mask,struct kgem_bo *mask_bo,
+              PixmapPtr dst, struct kgem_bo *dst_bo,
+              int32_t src_x, int32_t src_y,
+              int32_t msk_x, int32_t msk_y,
+              int32_t dst_x, int32_t dst_y,
+              int32_t width, int32_t height,
+              struct sna_composite_op *tmp);
+//#define MAP(ptr) ((void*)((uintptr_t)(ptr) & ~3))
-int sna_create_bitmap(bitmap_t *bitmap)
+int sna_bitmap_from_handle(bitmap_t *bitmap, uint32_t handle)
+{
     surface_t *sf;
-	struct kgem_bo *bo;
+    struct kgem_bo *bo;
     sf = malloc(sizeof(*sf));
-    if(sf == NULL)
-        goto err_1;
-    __lock_acquire_recursive(__sna_lock);
+    if(sf == NULL)
-    bo = kgem_create_2d(&sna_device->kgem, bitmap->width, bitmap->height,
-,I915_TILING_NONE, CREATE_CPU_MAP);
         goto err_1;
     if(bo == NULL)
-        goto err_2;
+    __lock_acquire_recursive(__sna_lock);
-    void *map = kgem_bo_map(&sna_device->kgem, bo);
+    bo = kgem_bo_from_handle(&sna_device->kgem, handle, bitmap->pitch, bitmap->height);
     if(map == NULL)
-        goto err_3;
+    __lock_release_recursive(__sna_lock);
-    sf->width   = bitmap->width;
-    sf->height  = bitmap->height;
+    sf->width   = bitmap->width;
-    sf->data    = map;
-    sf->pitch   = bo->pitch;
-    sf->bo      = bo;
+    sf->height  = bitmap->height;
-    sf->bo_size = PAGE_SIZE * bo->size.pages.count;
+    sf->data    = NULL;
-    sf->flags   = bitmap->flags;
+    sf->pitch   = bo->pitch;
     sf->bo      = bo;
-    bitmap->handle = (uint32_t)sf;
+    sf->bo_size = PAGE_SIZE * bo->size.pages.count;
-    __lock_release_recursive(__sna_lock);
+    sf->flags   = bitmap->flags;
+    bitmap->handle = (uint32_t)sf;
+    return 0;
+err_2:
+    __lock_release_recursive(__sna_lock);
+    free(sf);
-    return 0;
+err_1:
     return -1;
-err_3:
+};
     kgem_bo_destroy(&sna_device->kgem, bo);
-err_2:
+void sna_set_bo_handle(bitmap_t *bitmap, int handle)
     __lock_release_recursive(__sna_lock);
-    free(sf);
+    surface_t *sf = to_surface(bitmap);
-err_1:
+    struct kgem_bo *bo = sf->bo;
+    bo->handle = handle;
+}
+static int sna_create_bitmap(bitmap_t *bitmap)
-    return -1;
+{
+    surface_t *sf;
+    struct kgem_bo *bo;
 };
     sf = malloc(sizeof(*sf));
-int sna_bitmap_from_handle(bitmap_t *bitmap, uint32_t handle)
+    if(sf == NULL)
         goto err_1;
     surface_t *sf;
-	struct kgem_bo *bo;
+    __lock_acquire_recursive(__sna_lock);
-    sf = malloc(sizeof(*sf));
+    bo = kgem_create_2d(&sna_device->kgem, bitmap->width, bitmap->height,
+,I915_TILING_NONE, CREATE_CPU_MAP);
     if(sf == NULL)
+    if(bo == NULL)
+        goto err_2;
         goto err_1;
     void *map = kgem_bo_map(&sna_device->kgem, bo);
-    __lock_acquire_recursive(__sna_lock);
+    if(map == NULL)
         goto err_3;
     bo = kgem_bo_from_handle(&sna_device->kgem, handle, bitmap->pitch, bitmap->height);
     sf->width   = bitmap->width;
-    __lock_release_recursive(__sna_lock);
-    sf->width   = bitmap->width;
-    sf->height  = bitmap->height;
-    sf->data    = NULL;
-    sf->pitch   = bo->pitch;
-    sf->bo      = bo;
-    sf->bo_size = PAGE_SIZE * bo->size.pages.count;
+    sf->height  = bitmap->height;
-    sf->flags   = bitmap->flags;
+    sf->data    = map;
     sf->pitch   = bo->pitch;
-    bitmap->handle = (uint32_t)sf;
+    sf->bo      = bo;
     bitmap->pitch  = -1;
     return 0;
 };
-int sna_lock_bitmap(bitmap_t *bitmap)
+static int sna_lock_bitmap(bitmap_t *bitmap)
+{
     surface_t *sf = to_surface(bitmap);
     bitmap->pitch = sf->pitch;
     return 0;
 };
-int sna_resize_bitmap(bitmap_t *bitmap)
+static int sna_resize_bitmap(bitmap_t *bitmap)
+{
     surface_t *sf = to_surface(bitmap);
 err_1:
     __lock_release_recursive(__sna_lock);
     return -1;
 };
-#define MI_LOAD_REGISTER_IMM		(0x22<<23)
-#define MI_WAIT_FOR_EVENT			(0x03<<23)
-static bool sna_emit_wait_for_scanline_gen6(struct sna *sna,
-                        rect_t *crtc,
-					    int pipe, int y1, int y2,
-					    bool full_height)
-{
-	uint32_t *b;
-	uint32_t event;
-//	if (!sna->kgem.has_secure_batches)
-//		return false;
-	assert(y1 >= 0);
-	assert(y2 > y1);
-	assert(sna->kgem.mode == KGEM_RENDER);
-	/* Always program one less than the desired value */
-	if (--y1 < 0)
-		y1 = crtc->b;
-	y2--;
-	/* The scanline granularity is 3 bits */
-	y1 &= ~7;
-	y2 &= ~7;
-	if (y2 == y1)
-		return false;
-	event = 1 << (3*full_height + pipe*8);
-	b = kgem_get_batch(&sna->kgem);
-	sna->kgem.nbatch += 10;
-	b[0] = MI_LOAD_REGISTER_IMM | 1;
-	b[1] = 0x44050; /* DERRMR */
-	b[2] = ~event;
-	b[3] = MI_LOAD_REGISTER_IMM | 1;
-	b[4] = 0x4f100; /* magic */
-	b[5] = (1 << 31) | (1 << 30) | pipe << 29 | (y1 << 16) | y2;
-	b[6] = MI_WAIT_FOR_EVENT | event;
-	b[7] = MI_LOAD_REGISTER_IMM | 1;
-	b[8] = 0x44050; /* DERRMR */
-	b[9] = ~0;
-	sna->kgem.batch_flags |= I915_EXEC_SECURE;
-	return true;
-}
-bool
-sna_wait_for_scanline(struct sna *sna,
-		      rect_t *crtc,
-		      rect_t *clip)
-{
-	bool full_height;
-	int y1, y2, pipe;
-	bool ret;
-//	if (sna->flags & SNA_NO_VSYNC)
-//		return false;
-	/*
-	 * Make sure we don't wait for a scanline that will
-	 * never occur
-	 */
-	y1 = clip->t - crtc->t;
-	if (y1 < 0)
-		y1 = 0;
-	y2 = clip->b - crtc->t;
-	if (y2 > crtc->b - crtc->t)
-		y2 = crtc->b - crtc->t;
-//	DBG(("%s: clipped range = %d, %d\n", __FUNCTION__, y1, y2));
-//	printf("%s: clipped range = %d, %d\n", __FUNCTION__, y1, y2);
-	if (y2 <= y1 + 4)
-		return false;
-	full_height = y1 == 0 && y2 == crtc->b - crtc->t;
-	pipe = 0;
-	DBG(("%s: pipe=%d, y1=%d, y2=%d, full_height?=%d\n",
-	     __FUNCTION__, pipe, y1, y2, full_height));
-	if (sna->kgem.gen >= 0100)
-		ret = false;
-//	else if (sna->kgem.gen >= 075)
-//		ret = sna_emit_wait_for_scanline_hsw(sna, crtc, pipe, y1, y2, full_height);
-//	else if (sna->kgem.gen >= 070)
-//		ret = sna_emit_wait_for_scanline_ivb(sna, crtc, pipe, y1, y2, full_height);
-	else if (sna->kgem.gen >= 060)
-		ret =sna_emit_wait_for_scanline_gen6(sna, crtc, pipe, y1, y2, full_height);
-//	else if (sna->kgem.gen >= 040)
-//		ret = sna_emit_wait_for_scanline_gen4(sna, crtc, pipe, y1, y2, full_height);
-	return ret;
-}
-bool
-gen6_composite(struct sna *sna,
-              uint8_t op,
-		      PixmapPtr src, struct kgem_bo *src_bo,
-		      PixmapPtr mask,struct kgem_bo *mask_bo,
-		      PixmapPtr dst, struct kgem_bo *dst_bo,
-              int32_t src_x, int32_t src_y,
-              int32_t msk_x, int32_t msk_y,
-              int32_t dst_x, int32_t dst_y,
-              int32_t width, int32_t height,
-              struct sna_composite_op *tmp);
 #define MAP(ptr) ((void*)((uintptr_t)(ptr) & ~3))
     return 0;
+}
+static void sna_fini()
+{
+    ENTER();
+    if( sna_device )
+    {
+        struct kgem_bo *mask;
+        __lock_acquire_recursive(__sna_lock);
-}
-static const struct intel_device_info intel_generic_info = {
-	.gen = -1,
-};
+        mask = tls_get(tls_mask);
-static const struct intel_device_info intel_i915_info = {
-	.gen = 030,
-};
-static const struct intel_device_info intel_i945_info = {
-	.gen = 031,
-};
-static const struct intel_device_info intel_g33_info = {
-	.gen = 033,
-};
-static const struct intel_device_info intel_i965_info = {
-	.gen = 040,
-};
-static const struct intel_device_info intel_g4x_info = {
-	.gen = 045,
-};
-static const struct intel_device_info intel_ironlake_info = {
-	.gen = 050,
-};
-static const struct intel_device_info intel_sandybridge_info = {
-	.gen = 060,
-};
-static const struct intel_device_info intel_ivybridge_info = {
-	.gen = 070,
-};
+        sna_device->render.fini(sna_device);
+        if(mask)
+            kgem_bo_destroy(&sna_device->kgem, mask);
-static const struct intel_device_info intel_valleyview_info = {
-	.gen = 071,
-};
+//        kgem_close_batches(&sna_device->kgem);
-static const struct intel_device_info intel_haswell_info = {
+        kgem_cleanup_cache(&sna_device->kgem);
-	.gen = 075,
-};
-#define INTEL_DEVICE_MATCH(d,i) \
-    { 0x8086, (d), PCI_MATCH_ANY, PCI_MATCH_ANY, 0x3 << 16, 0xff << 16, (intptr_t)(i) }
+        sna_device = NULL;
-static const struct pci_id_match intel_device_match[] = {
+        __lock_release_recursive(__sna_lock);
+    };
-	INTEL_I915G_IDS(&intel_i915_info),
-	INTEL_I915GM_IDS(&intel_i915_info),
+    LEAVE();
-	INTEL_I945G_IDS(&intel_i945_info),
-	INTEL_I945GM_IDS(&intel_i945_info),
+}
-	INTEL_G33_IDS(&intel_g33_info),
+uint32_t DrvInit(uint32_t service, struct pix_driver *driver)
+{
-	INTEL_PINEVIEW_IDS(&intel_g33_info),
+    ioctl_t   io;
+    int caps = 0;
+    static struct pci_device device;
+    struct sna *sna;
-	INTEL_I965G_IDS(&intel_i965_info),
-	INTEL_I965GM_IDS(&intel_i965_info),
+    DBG(("%s\n", __FUNCTION__));
-	INTEL_G45_IDS(&intel_g4x_info),
+    __lock_acquire_recursive(__sna_lock);
-	INTEL_GM45_IDS(&intel_g4x_info),
+    if(sna_device)
+        goto done;
-	INTEL_IRONLAKE_D_IDS(&intel_ironlake_info),
-	INTEL_IRONLAKE_M_IDS(&intel_ironlake_info),
-	INTEL_SNB_D_IDS(&intel_sandybridge_info),
-	INTEL_SNB_M_IDS(&intel_sandybridge_info),
+    io.handle   = service;
-	INTEL_IVB_D_IDS(&intel_ivybridge_info),
+    io.io_code  = SRV_GET_PCI_INFO;
-	INTEL_IVB_M_IDS(&intel_ivybridge_info),
-	INTEL_HSW_D_IDS(&intel_haswell_info),
-	INTEL_HSW_M_IDS(&intel_haswell_info),
-	INTEL_VLV_D_IDS(&intel_valleyview_info),
-	INTEL_VLV_M_IDS(&intel_valleyview_info),
+    io.input    = &device;
-	INTEL_VGA_DEVICE(PCI_MATCH_ANY, &intel_generic_info),
+    io.inp_size = sizeof(device);
+    io.output   = NULL;
-	{ 0, 0, 0 },
+    io.out_size = 0;
-};
-const struct pci_id_match *PciDevMatch(uint16_t dev,const struct pci_id_match *list)
-{
-    while(list->device_id)
-    {
-        if(dev==list->device_id)
+    if (call_service(&io)!=0)
-            return list;
+        goto err1;
-        list++;
-    }
-    return NULL;
-}
+    sna = malloc(sizeof(*sna));
-const struct intel_device_info *
+    if (sna == NULL)
-intel_detect_chipset(struct pci_device *pci)
+        goto err1;
+    memset(sna, 0, sizeof(*sna));
+    sna->cpu_features = sna_cpu_detect();
-{
-    const struct pci_id_match *ent = NULL;
+    sna->PciInfo = &device;
+    sna->info = intel_detect_chipset(sna->PciInfo);
-    ent = PciDevMatch(pci->device_id, intel_device_match);
+    sna->scrn = service;
-    if(ent != NULL)
-        return (const struct intel_device_info*)ent->match_data;
-    else
-        return &intel_generic_info;
     kgem_init(&sna->kgem, service, sna->PciInfo, sna->info->gen);

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(root)/contrib/sdk/sources/Intel-2D/sna/sna.c – Rev 4368 → 4372