WebSVN – Kolibri OS – Diff – /contrib/sdk/sources/Intel-2D/sna/sna.c


/**************************************************************************
 
Copyright 2001 VA Linux Systems Inc., Fremont, California.
Copyright © 2002 by David Dawes
 
All Rights Reserved.
 
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
to deal in the Software without restriction, including without limitation
on the rights to use, copy, modify, merge, publish, distribute, sub
license, and/or sell copies of the Software, and to permit persons to whom
the Software is furnished to do so, subject to the following conditions:
 
The above copyright notice and this permission notice (including the next
paragraph) shall be included in all copies or substantial portions of the
Software.
 
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
THE COPYRIGHT HOLDERS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
USE OR OTHER DEALINGS IN THE SOFTWARE.
 
**************************************************************************/
 
/*
 * Authors: Jeff Hartmann 
 *          Abraham van der Merwe 
 *          David Dawes 
 *          Alan Hourihane 
 */
 
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
 
#include 
#include 
#include "i915_pciids.h"
 
#include "compiler.h"
#include "sna.h"
 
#include 
#include 
 
#define to_surface(x) (surface_t*)((x)->handle)
 
typedef struct {
    int l;
    int t;
    int r;
    int b;
} rect_t;
 
static struct sna_fb sna_fb;
static int    tls_mask;
 
int tls_alloc(void);
 
static inline void *tls_get(int key)
{
    void *val;
    __asm__ __volatile__(
    "movl %%fs:(%1), %0"
    :"=r"(val)
    :"r"(key));
 
  return val;
};
 
static inline int
tls_set(int key, const void *ptr)
{
    if(!(key & 3))
    {
        __asm__ __volatile__(
        "movl %0, %%fs:(%1)"
        ::"r"(ptr),"r"(key));
        return 0;
    }
    else return -1;
}
 
 
 
 
int kgem_init_fb(struct kgem *kgem, struct sna_fb *fb);
int kgem_update_fb(struct kgem *kgem, struct sna_fb *fb);
uint32_t kgem_surface_size(struct kgem *kgem,bool relaxed_fencing,
				  unsigned flags, uint32_t width, uint32_t height,
				  uint32_t bpp, uint32_t tiling, uint32_t *pitch);
struct kgem_bo *kgem_bo_from_handle(struct kgem *kgem, int handle,
                        int pitch, int height);
 
void kgem_close_batches(struct kgem *kgem);
void sna_bo_destroy(struct kgem *kgem, struct kgem_bo *bo);
 
 
static bool sna_solid_cache_init(struct sna *sna);
 
struct sna *sna_device;
 
__LOCK_INIT_RECURSIVE(, __sna_lock);
 
static void no_render_reset(struct sna *sna)
{
	(void)sna;
}
 
static void no_render_flush(struct sna *sna)
{
	(void)sna;
}
 
static void
no_render_context_switch(struct kgem *kgem,
			 int new_mode)
{
	if (!kgem->nbatch)
		return;
 
	if (kgem_ring_is_idle(kgem, kgem->ring)) {
		DBG(("%s: GPU idle, flushing\n", __FUNCTION__));
		_kgem_submit(kgem);
	}
 
	(void)new_mode;
}
 
static void
no_render_retire(struct kgem *kgem)
{
	(void)kgem;
}
 
static void
no_render_expire(struct kgem *kgem)
{
	(void)kgem;
}
 
static void
no_render_fini(struct sna *sna)
{
	(void)sna;
}
 
const char *no_render_init(struct sna *sna)
{
    struct sna_render *render = &sna->render;
 
    memset (render,0, sizeof (*render));
 
    render->prefer_gpu = PREFER_GPU_BLT;
 
    render->vertices = render->vertex_data;
    render->vertex_size = ARRAY_SIZE(render->vertex_data);
 
    render->reset = no_render_reset;
	render->flush = no_render_flush;
	render->fini = no_render_fini;
 
	sna->kgem.context_switch = no_render_context_switch;
	sna->kgem.retire = no_render_retire;
	sna->kgem.expire = no_render_expire;
 
	sna->kgem.mode = KGEM_RENDER;
	sna->kgem.ring = KGEM_RENDER;
 
	sna_vertex_init(sna);
	return "generic";
 }
 
void sna_vertex_init(struct sna *sna)
{
//    pthread_mutex_init(&sna->render.lock, NULL);
//    pthread_cond_init(&sna->render.wait, NULL);
    sna->render.active = 0;
}
 
int sna_accel_init(struct sna *sna)
{
    const char *backend;
 
	backend = no_render_init(sna);
	if (sna->info->gen >= 0100)
		(void)backend;
	else if (sna->info->gen >= 070)
		backend = gen7_render_init(sna, backend);
	else if (sna->info->gen >= 060)
		backend = gen6_render_init(sna, backend);
	else if (sna->info->gen >= 050)
		backend = gen5_render_init(sna, backend);
	else if (sna->info->gen >= 040)
		backend = gen4_render_init(sna, backend);
	else if (sna->info->gen >= 030)
		backend = gen3_render_init(sna, backend);
 
	DBG(("%s(backend=%s, prefer_gpu=%x)\n",
	     __FUNCTION__, backend, sna->render.prefer_gpu));
 
	kgem_reset(&sna->kgem);
 
    sna_device = sna;
 
    return kgem_init_fb(&sna->kgem, &sna_fb);
}
 
int sna_init(uint32_t service)
{
    ioctl_t   io;
    int caps = 0;
 
    static struct pci_device device;
    struct sna *sna;
 
    DBG(("%s\n", __FUNCTION__));
 
    __lock_acquire_recursive(__sna_lock);
 
    if(sna_device)
        goto done;
 
    io.handle   = service;
    io.io_code  = SRV_GET_PCI_INFO;
    io.input    = &device;
    io.inp_size = sizeof(device);
    io.output   = NULL;
    io.out_size = 0;
 
    if (call_service(&io)!=0)
        goto err1;
 
    sna = malloc(sizeof(*sna));
    if (sna == NULL)
        goto err1;
 
    memset(sna, 0, sizeof(*sna));
 
    sna->cpu_features = sna_cpu_detect();
 
    sna->PciInfo = &device;
  	sna->info = intel_detect_chipset(sna->PciInfo);
    sna->scrn = service;
 
    kgem_init(&sna->kgem, service, sna->PciInfo, sna->info->gen);
 
 
    /* Disable tiling by default */
    sna->tiling = 0;
 
    /* Default fail-safe value of 75 Hz */
//    sna->vblank_interval = 1000 * 1000 * 1000 / 75;
 
    sna->flags = 0;
 
    sna_accel_init(sna);
 
    tls_mask = tls_alloc();
 
//    printf("tls mask %x\n", tls_mask);
 
done:
    caps = sna_device->render.caps;
 
err1:
    __lock_release_recursive(__sna_lock);
 
    return caps;
}
 
void sna_fini()
{
    ENTER();
 
    if( sna_device )
    {
        struct kgem_bo *mask;
 
        __lock_acquire_recursive(__sna_lock);
 
        mask = tls_get(tls_mask);
 
        sna_device->render.fini(sna_device);
        if(mask)
            kgem_bo_destroy(&sna_device->kgem, mask);
//        kgem_close_batches(&sna_device->kgem);
   	    kgem_cleanup_cache(&sna_device->kgem);
 
   	    sna_device = NULL;
        __lock_release_recursive(__sna_lock);
    };
    LEAVE();
}
 
#if 0
 
static bool sna_solid_cache_init(struct sna *sna)
{
    struct sna_solid_cache *cache = &sna->render.solid_cache;
 
    DBG(("%s\n", __FUNCTION__));
 
    cache->cache_bo =
        kgem_create_linear(&sna->kgem, sizeof(cache->color));
    if (!cache->cache_bo)
        return FALSE;
 
    /*
     * Initialise [0] with white since it is very common and filling the
     * zeroth slot simplifies some of the checks.
     */
    cache->color[0] = 0xffffffff;
    cache->bo[0] = kgem_create_proxy(cache->cache_bo, 0, sizeof(uint32_t));
    cache->bo[0]->pitch = 4;
    cache->dirty = 1;
    cache->size = 1;
    cache->last = 0;
 
    return TRUE;
}
 
void
sna_render_flush_solid(struct sna *sna)
{
    struct sna_solid_cache *cache = &sna->render.solid_cache;
 
    DBG(("sna_render_flush_solid(size=%d)\n", cache->size));
    assert(cache->dirty);
    assert(cache->size);
 
    kgem_bo_write(&sna->kgem, cache->cache_bo,
              cache->color, cache->size*sizeof(uint32_t));
    cache->dirty = 0;
    cache->last = 0;
}
 
static void
sna_render_finish_solid(struct sna *sna, bool force)
{
    struct sna_solid_cache *cache = &sna->render.solid_cache;
    int i;
 
    DBG(("sna_render_finish_solid(force=%d, domain=%d, busy=%d, dirty=%d)\n",
         force, cache->cache_bo->domain, cache->cache_bo->rq != NULL, cache->dirty));
 
    if (!force && cache->cache_bo->domain != DOMAIN_GPU)
        return;
 
    if (cache->dirty)
        sna_render_flush_solid(sna);
 
    for (i = 0; i < cache->size; i++) {
        if (cache->bo[i] == NULL)
            continue;
 
        kgem_bo_destroy(&sna->kgem, cache->bo[i]);
        cache->bo[i] = NULL;
    }
    kgem_bo_destroy(&sna->kgem, cache->cache_bo);
 
    DBG(("sna_render_finish_solid reset\n"));
 
    cache->cache_bo = kgem_create_linear(&sna->kgem, sizeof(cache->color));
    cache->bo[0] = kgem_create_proxy(cache->cache_bo, 0, sizeof(uint32_t));
    cache->bo[0]->pitch = 4;
    if (force)
        cache->size = 1;
}
 
 
struct kgem_bo *
sna_render_get_solid(struct sna *sna, uint32_t color)
{
    struct sna_solid_cache *cache = &sna->render.solid_cache;
    int i;
 
    DBG(("%s: %08x\n", __FUNCTION__, color));
 
//    if ((color & 0xffffff) == 0) /* alpha only */
//        return kgem_bo_reference(sna->render.alpha_cache.bo[color>>24]);
 
    if (color == 0xffffffff) {
        DBG(("%s(white)\n", __FUNCTION__));
        return kgem_bo_reference(cache->bo[0]);
    }
 
    if (cache->color[cache->last] == color) {
        DBG(("sna_render_get_solid(%d) = %x (last)\n",
             cache->last, color));
        return kgem_bo_reference(cache->bo[cache->last]);
    }
 
    for (i = 1; i < cache->size; i++) {
        if (cache->color[i] == color) {
            if (cache->bo[i] == NULL) {
                DBG(("sna_render_get_solid(%d) = %x (recreate)\n",
                     i, color));
                goto create;
            } else {
                DBG(("sna_render_get_solid(%d) = %x (old)\n",
                     i, color));
                goto done;
            }
        }
    }
 
    sna_render_finish_solid(sna, i == ARRAY_SIZE(cache->color));
 
    i = cache->size++;
    cache->color[i] = color;
    cache->dirty = 1;
    DBG(("sna_render_get_solid(%d) = %x (new)\n", i, color));
 
create:
    cache->bo[i] = kgem_create_proxy(cache->cache_bo,
                     i*sizeof(uint32_t), sizeof(uint32_t));
    cache->bo[i]->pitch = 4;
 
done:
    cache->last = i;
    return kgem_bo_reference(cache->bo[i]);
}
 
#endif
 
 
int sna_blit_copy(bitmap_t *src_bitmap, int dst_x, int dst_y,
                  int w, int h, int src_x, int src_y)
 
{
    struct sna_copy_op copy;
    struct _Pixmap src, dst;
    struct kgem_bo *src_bo;
 
    char proc_info[1024];
    int winx, winy;
 
    get_proc_info(proc_info);
 
    winx = *(uint32_t*)(proc_info+34);
    winy = *(uint32_t*)(proc_info+38);
 
    memset(&src, 0, sizeof(src));
    memset(&dst, 0, sizeof(dst));
 
    src.drawable.bitsPerPixel = 32;
    src.drawable.width  = src_bitmap->width;
    src.drawable.height = src_bitmap->height;
 
    dst.drawable.bitsPerPixel = 32;
    dst.drawable.width  = sna_fb.width;
    dst.drawable.height = sna_fb.height;
 
    memset(©, 0, sizeof(copy));
 
    src_bo = (struct kgem_bo*)src_bitmap->handle;
 
    if( sna_device->render.copy(sna_device, GXcopy,
                                &src, src_bo,
                                &dst, sna_fb.fb_bo, ©) )
    {
        copy.blt(sna_device, ©, src_x, src_y, w, h, winx+dst_x, winy+dst_y);
        copy.done(sna_device, ©);
    }
 
    kgem_submit(&sna_device->kgem);
 
    return 0;
 
//    __asm__ __volatile__("int3");
 
};
 
typedef struct
{
    uint32_t        width;
    uint32_t        height;
    void           *data;
    uint32_t        pitch;
    struct kgem_bo *bo;
    uint32_t        bo_size;
    uint32_t        flags;
}surface_t;
 
 
 
int sna_create_bitmap(bitmap_t *bitmap)
{
    surface_t *sf;
	struct kgem_bo *bo;
 
    sf = malloc(sizeof(*sf));
    if(sf == NULL)
        goto err_1;
 
    __lock_acquire_recursive(__sna_lock);
 
    bo = kgem_create_2d(&sna_device->kgem, bitmap->width, bitmap->height,
                        32,I915_TILING_NONE, CREATE_CPU_MAP);
 
    if(bo == NULL)
        goto err_2;
 
    void *map = kgem_bo_map(&sna_device->kgem, bo);
    if(map == NULL)
        goto err_3;
 
    sf->width   = bitmap->width;
    sf->height  = bitmap->height;
    sf->data    = map;
    sf->pitch   = bo->pitch;
    sf->bo      = bo;
    sf->bo_size = PAGE_SIZE * bo->size.pages.count;
    sf->flags   = bitmap->flags;
 
    bitmap->handle = (uint32_t)sf;
    __lock_release_recursive(__sna_lock);
 
    return 0;
 
err_3:
    kgem_bo_destroy(&sna_device->kgem, bo);
err_2:
    __lock_release_recursive(__sna_lock);
    free(sf);
err_1:
    return -1;
};
 
int sna_bitmap_from_handle(bitmap_t *bitmap, uint32_t handle)
{
    surface_t *sf;
	struct kgem_bo *bo;
 
    sf = malloc(sizeof(*sf));
    if(sf == NULL)
        goto err_1;
 
    __lock_acquire_recursive(__sna_lock);
 
    bo = kgem_bo_from_handle(&sna_device->kgem, handle, bitmap->pitch, bitmap->height);
 
    __lock_release_recursive(__sna_lock);
 
    sf->width   = bitmap->width;
    sf->height  = bitmap->height;
    sf->data    = NULL;
    sf->pitch   = bo->pitch;
    sf->bo      = bo;
    sf->bo_size = PAGE_SIZE * bo->size.pages.count;
    sf->flags   = bitmap->flags;
 
    bitmap->handle = (uint32_t)sf;
 
    return 0;
 
err_2:
    __lock_release_recursive(__sna_lock);
    free(sf);
err_1:
    return -1;
};
 
void sna_set_bo_handle(bitmap_t *bitmap, int handle)
{
    surface_t *sf = to_surface(bitmap);
    struct kgem_bo *bo = sf->bo;
    bo->handle = handle;
}
 
int sna_destroy_bitmap(bitmap_t *bitmap)
{
    surface_t *sf = to_surface(bitmap);
 
    __lock_acquire_recursive(__sna_lock);
 
    kgem_bo_destroy(&sna_device->kgem, sf->bo);
 
    __lock_release_recursive(__sna_lock);
 
    free(sf);
 
    bitmap->handle = -1;
    bitmap->data   = (void*)-1;
    bitmap->pitch  = -1;
 
    return 0;
};
 
int sna_lock_bitmap(bitmap_t *bitmap)
{
    surface_t *sf = to_surface(bitmap);
 
//    printf("%s\n", __FUNCTION__);
    __lock_acquire_recursive(__sna_lock);
 
    kgem_bo_sync__cpu(&sna_device->kgem, sf->bo);
 
    __lock_release_recursive(__sna_lock);
 
    bitmap->data  = sf->data;
    bitmap->pitch = sf->pitch;
 
    return 0;
};
 
int sna_resize_bitmap(bitmap_t *bitmap)
{
    surface_t *sf = to_surface(bitmap);
    struct kgem *kgem = &sna_device->kgem;
    struct kgem_bo *bo = sf->bo;
 
    uint32_t   size;
    uint32_t   pitch;
 
   	bitmap->pitch = -1;
    bitmap->data = (void *) -1;
 
	size = kgem_surface_size(kgem,kgem->has_relaxed_fencing, CREATE_CPU_MAP,
				 bitmap->width, bitmap->height, 32, I915_TILING_NONE, &pitch);
	assert(size && size <= kgem->max_object_size);
 
    if(sf->bo_size >= size)
    {
        sf->width   = bitmap->width;
        sf->height  = bitmap->height;
        sf->pitch   = pitch;
        bo->pitch   = pitch;
 
	    return 0;
    }
    else
    {
        __lock_acquire_recursive(__sna_lock);
 
        sna_bo_destroy(kgem, bo);
 
        sf->bo = NULL;
 
        bo = kgem_create_2d(kgem, bitmap->width, bitmap->height,
                            32, I915_TILING_NONE, CREATE_CPU_MAP);
 
        if(bo == NULL)
        {
            __lock_release_recursive(__sna_lock);
            return -1;
        };
 
        void *map = kgem_bo_map(kgem, bo);
        if(map == NULL)
        {
            sna_bo_destroy(kgem, bo);
            __lock_release_recursive(__sna_lock);
            return -1;
        };
 
        __lock_release_recursive(__sna_lock);
 
        sf->width   = bitmap->width;
        sf->height  = bitmap->height;
        sf->data    = map;
        sf->pitch   = bo->pitch;
        sf->bo      = bo;
        sf->bo_size = PAGE_SIZE * bo->size.pages.count;
    }
 
    return 0;
};
 
 
 
int sna_create_mask()
{
	struct kgem_bo *bo;
 
//    printf("%s width %d height %d\n", __FUNCTION__, sna_fb.width, sna_fb.height);
 
    __lock_acquire_recursive(__sna_lock);
 
    bo = kgem_create_2d(&sna_device->kgem, sna_fb.width, sna_fb.height,
                        8,I915_TILING_NONE, CREATE_CPU_MAP);
 
    if(unlikely(bo == NULL))
        goto err_1;
 
    int *map = kgem_bo_map(&sna_device->kgem, bo);
    if(map == NULL)
        goto err_2;
 
    __lock_release_recursive(__sna_lock);
 
    memset(map, 0, bo->pitch * sna_fb.height);
 
    tls_set(tls_mask, bo);
 
    return 0;
 
err_2:
    kgem_bo_destroy(&sna_device->kgem, bo);
err_1:
    __lock_release_recursive(__sna_lock);
    return -1;
};
 
#define MI_LOAD_REGISTER_IMM		(0x22<<23)
#define MI_WAIT_FOR_EVENT			(0x03<<23)
 
static bool sna_emit_wait_for_scanline_gen6(struct sna *sna,
                        rect_t *crtc,
					    int pipe, int y1, int y2,
					    bool full_height)
{
	uint32_t *b;
	uint32_t event;
 
//	if (!sna->kgem.has_secure_batches)
//		return false;
 
	assert(y1 >= 0);
	assert(y2 > y1);
	assert(sna->kgem.mode == KGEM_RENDER);
 
	/* Always program one less than the desired value */
	if (--y1 < 0)
		y1 = crtc->b;
	y2--;
 
	/* The scanline granularity is 3 bits */
	y1 &= ~7;
	y2 &= ~7;
	if (y2 == y1)
		return false;
 
	event = 1 << (3*full_height + pipe*8);
 
	b = kgem_get_batch(&sna->kgem);
	sna->kgem.nbatch += 10;
 
	b[0] = MI_LOAD_REGISTER_IMM | 1;
	b[1] = 0x44050; /* DERRMR */
	b[2] = ~event;
	b[3] = MI_LOAD_REGISTER_IMM | 1;
	b[4] = 0x4f100; /* magic */
	b[5] = (1 << 31) | (1 << 30) | pipe << 29 | (y1 << 16) | y2;
	b[6] = MI_WAIT_FOR_EVENT | event;
	b[7] = MI_LOAD_REGISTER_IMM | 1;
	b[8] = 0x44050; /* DERRMR */
	b[9] = ~0;
 
	sna->kgem.batch_flags |= I915_EXEC_SECURE;
 
	return true;
}
 
bool
sna_wait_for_scanline(struct sna *sna,
		      rect_t *crtc,
		      rect_t *clip)
{
	bool full_height;
	int y1, y2, pipe;
	bool ret;
 
//	if (sna->flags & SNA_NO_VSYNC)
//		return false;
 
	/*
	 * Make sure we don't wait for a scanline that will
	 * never occur
	 */
	y1 = clip->t - crtc->t;
	if (y1 < 0)
		y1 = 0;
	y2 = clip->b - crtc->t;
	if (y2 > crtc->b - crtc->t)
		y2 = crtc->b - crtc->t;
//	DBG(("%s: clipped range = %d, %d\n", __FUNCTION__, y1, y2));
//	printf("%s: clipped range = %d, %d\n", __FUNCTION__, y1, y2);
 
	if (y2 <= y1 + 4)
		return false;
 
	full_height = y1 == 0 && y2 == crtc->b - crtc->t;
 
	pipe = 0;
	DBG(("%s: pipe=%d, y1=%d, y2=%d, full_height?=%d\n",
	     __FUNCTION__, pipe, y1, y2, full_height));
 
	if (sna->kgem.gen >= 0100)
		ret = false;
//	else if (sna->kgem.gen >= 075)
//		ret = sna_emit_wait_for_scanline_hsw(sna, crtc, pipe, y1, y2, full_height);
//	else if (sna->kgem.gen >= 070)
//		ret = sna_emit_wait_for_scanline_ivb(sna, crtc, pipe, y1, y2, full_height);
	else if (sna->kgem.gen >= 060)
		ret =sna_emit_wait_for_scanline_gen6(sna, crtc, pipe, y1, y2, full_height);
//	else if (sna->kgem.gen >= 040)
//		ret = sna_emit_wait_for_scanline_gen4(sna, crtc, pipe, y1, y2, full_height);
 
	return ret;
}
 
 
bool
gen6_composite(struct sna *sna,
              uint8_t op,
		      PixmapPtr src, struct kgem_bo *src_bo,
		      PixmapPtr mask,struct kgem_bo *mask_bo,
		      PixmapPtr dst, struct kgem_bo *dst_bo,
              int32_t src_x, int32_t src_y,
              int32_t msk_x, int32_t msk_y,
              int32_t dst_x, int32_t dst_y,
              int32_t width, int32_t height,
              struct sna_composite_op *tmp);
 
 
#define MAP(ptr) ((void*)((uintptr_t)(ptr) & ~3))
 
int sna_blit_tex(bitmap_t *bitmap, bool scale, int dst_x, int dst_y,
                  int w, int h, int src_x, int src_y)
 
{
    surface_t *sf = to_surface(bitmap);
 
    struct drm_i915_mask_update update;
 
    struct sna_composite_op composite;
    struct _Pixmap src, dst, mask;
    struct kgem_bo *src_bo, *mask_bo;
    int winx, winy;
 
    char proc_info[1024];
 
    get_proc_info(proc_info);
 
    winx = *(uint32_t*)(proc_info+34);
    winy = *(uint32_t*)(proc_info+38);
//    winw = *(uint32_t*)(proc_info+42)+1;
//    winh = *(uint32_t*)(proc_info+46)+1;
 
    mask_bo = tls_get(tls_mask);
 
    if(unlikely(mask_bo == NULL))
    {
        sna_create_mask();
        mask_bo = tls_get(tls_mask);
        if( mask_bo == NULL)
            return -1;
    };
 
    if(kgem_update_fb(&sna_device->kgem, &sna_fb))
    {
        __lock_acquire_recursive(__sna_lock);
        kgem_bo_destroy(&sna_device->kgem, mask_bo);
        __lock_release_recursive(__sna_lock);
 
        sna_create_mask();
        mask_bo = tls_get(tls_mask);
        if( mask_bo == NULL)
            return -1;
    }
 
    VG_CLEAR(update);
	update.handle = mask_bo->handle;
	update.bo_map = (int)kgem_bo_map__cpu(&sna_device->kgem, mask_bo);
	drmIoctl(sna_device->kgem.fd, SRV_MASK_UPDATE, &update);
    mask_bo->pitch = update.bo_pitch;
 
    memset(&src, 0, sizeof(src));
    memset(&dst, 0, sizeof(dst));
    memset(&mask, 0, sizeof(dst));
 
    src.drawable.bitsPerPixel = 32;
 
    src.drawable.width  = sf->width;
    src.drawable.height = sf->height;
 
    dst.drawable.bitsPerPixel = 32;
    dst.drawable.width  = sna_fb.width;
    dst.drawable.height = sna_fb.height;
 
    mask.drawable.bitsPerPixel = 8;
    mask.drawable.width  = update.width;
    mask.drawable.height = update.height;
 
    memset(&composite, 0, sizeof(composite));
 
    src_bo = sf->bo;
 
    __lock_acquire_recursive(__sna_lock);
 
    {
        rect_t crtc, clip;
 
        crtc.l = 0;
        crtc.t = 0;
        crtc.r = sna_fb.width-1;
        crtc.b = sna_fb.height-1;
 
        clip.l = winx+dst_x;
        clip.t = winy+dst_y;
        clip.r = clip.l+w-1;
        clip.b = clip.t+h-1;
 
        kgem_set_mode(&sna_device->kgem, KGEM_RENDER, sna_fb.fb_bo);
        sna_wait_for_scanline(sna_device, &crtc, &clip);
    }
 
    if( sna_device->render.blit_tex(sna_device, PictOpSrc,scale,
		      &src, src_bo,
		      &mask, mask_bo,
		      &dst, sna_fb.fb_bo,
              src_x, src_y,
              dst_x, dst_y,
              winx+dst_x, winy+dst_y,
              w, h,
              &composite) )
    {
	    struct sna_composite_rectangles r;
 
	    r.src.x = src_x;
	    r.src.y = src_y;
	    r.mask.x = dst_x;
	    r.mask.y = dst_y;
		r.dst.x = winx+dst_x;
	    r.dst.y = winy+dst_y;
	    r.width  = w;
	    r.height = h;
 
        composite.blt(sna_device, &composite, &r);
        composite.done(sna_device, &composite);
 
    };
 
    kgem_submit(&sna_device->kgem);
 
    __lock_release_recursive(__sna_lock);
 
    bitmap->data   = (void*)-1;
    bitmap->pitch  = -1;
 
    return 0;
}
 
 
 
 
 
 
 
static const struct intel_device_info intel_generic_info = {
	.gen = -1,
};
 
static const struct intel_device_info intel_i915_info = {
	.gen = 030,
};
static const struct intel_device_info intel_i945_info = {
	.gen = 031,
};
 
static const struct intel_device_info intel_g33_info = {
	.gen = 033,
};
 
static const struct intel_device_info intel_i965_info = {
	.gen = 040,
};
 
static const struct intel_device_info intel_g4x_info = {
	.gen = 045,
};
 
static const struct intel_device_info intel_ironlake_info = {
	.gen = 050,
};
 
static const struct intel_device_info intel_sandybridge_info = {
	.gen = 060,
};
 
static const struct intel_device_info intel_ivybridge_info = {
	.gen = 070,
};
 
static const struct intel_device_info intel_valleyview_info = {
	.gen = 071,
};
 
static const struct intel_device_info intel_haswell_info = {
	.gen = 075,
};
 
#define INTEL_DEVICE_MATCH(d,i) \
    { 0x8086, (d), PCI_MATCH_ANY, PCI_MATCH_ANY, 0x3 << 16, 0xff << 16, (intptr_t)(i) }
 
 
static const struct pci_id_match intel_device_match[] = {
 
	INTEL_I915G_IDS(&intel_i915_info),
	INTEL_I915GM_IDS(&intel_i915_info),
	INTEL_I945G_IDS(&intel_i945_info),
	INTEL_I945GM_IDS(&intel_i945_info),
 
	INTEL_G33_IDS(&intel_g33_info),
	INTEL_PINEVIEW_IDS(&intel_g33_info),
 
	INTEL_I965G_IDS(&intel_i965_info),
	INTEL_I965GM_IDS(&intel_i965_info),
 
	INTEL_G45_IDS(&intel_g4x_info),
	INTEL_GM45_IDS(&intel_g4x_info),
 
	INTEL_IRONLAKE_D_IDS(&intel_ironlake_info),
	INTEL_IRONLAKE_M_IDS(&intel_ironlake_info),
 
	INTEL_SNB_D_IDS(&intel_sandybridge_info),
	INTEL_SNB_M_IDS(&intel_sandybridge_info),
 
	INTEL_IVB_D_IDS(&intel_ivybridge_info),
	INTEL_IVB_M_IDS(&intel_ivybridge_info),
 
	INTEL_HSW_D_IDS(&intel_haswell_info),
	INTEL_HSW_M_IDS(&intel_haswell_info),
 
	INTEL_VLV_D_IDS(&intel_valleyview_info),
	INTEL_VLV_M_IDS(&intel_valleyview_info),
 
	INTEL_VGA_DEVICE(PCI_MATCH_ANY, &intel_generic_info),
 
	{ 0, 0, 0 },
};
 
const struct pci_id_match *PciDevMatch(uint16_t dev,const struct pci_id_match *list)
{
    while(list->device_id)
    {
        if(dev==list->device_id)
            return list;
        list++;
    }
    return NULL;
}
 
const struct intel_device_info *
intel_detect_chipset(struct pci_device *pci)
{
    const struct pci_id_match *ent = NULL;
 
    ent = PciDevMatch(pci->device_id, intel_device_match);
 
    if(ent != NULL)
        return (const struct intel_device_info*)ent->match_data;
    else
        return &intel_generic_info;
}
 
int intel_get_device_id(int fd)
{
	struct drm_i915_getparam gp;
	int devid = 0;
 
	memset(&gp, 0, sizeof(gp));
	gp.param = I915_PARAM_CHIPSET_ID;
	gp.value = &devid;
 
	if (drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp))
		return 0;
 
	return devid;
}
 
int drmIoctl(int fd, unsigned long request, void *arg)
{
    ioctl_t  io;
 
    io.handle   = fd;
    io.io_code  = request;
    io.input    = arg;
    io.inp_size = 64;
    io.output   = NULL;
    io.out_size = 0;
 
    return call_service(&io);
}
 
static>
 
static>
#define>
#define>

Rev 4359	Rev 4368
1	/**************************************************************************	1	/**************************************************************************
2		2
3	Copyright 2001 VA Linux Systems Inc., Fremont, California.	3	Copyright 2001 VA Linux Systems Inc., Fremont, California.
4	Copyright © 2002 by David Dawes	4	Copyright © 2002 by David Dawes
5		5
6	All Rights Reserved.	6	All Rights Reserved.
7		7
8	Permission is hereby granted, free of charge, to any person obtaining a	8	Permission is hereby granted, free of charge, to any person obtaining a
9	copy of this software and associated documentation files (the "Software"),	9	copy of this software and associated documentation files (the "Software"),
10	to deal in the Software without restriction, including without limitation	10	to deal in the Software without restriction, including without limitation
11	on the rights to use, copy, modify, merge, publish, distribute, sub	11	on the rights to use, copy, modify, merge, publish, distribute, sub
12	license, and/or sell copies of the Software, and to permit persons to whom	12	license, and/or sell copies of the Software, and to permit persons to whom
13	the Software is furnished to do so, subject to the following conditions:	13	the Software is furnished to do so, subject to the following conditions:
14		14
15	The above copyright notice and this permission notice (including the next	15	The above copyright notice and this permission notice (including the next
16	paragraph) shall be included in all copies or substantial portions of the	16	paragraph) shall be included in all copies or substantial portions of the
17	Software.	17	Software.
18		18
19	THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR	19	THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20	IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,	20	IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21	FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL	21	FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
22	THE COPYRIGHT HOLDERS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,	22	THE COPYRIGHT HOLDERS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
23	DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR	23	DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
24	OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE	24	OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
25	USE OR OTHER DEALINGS IN THE SOFTWARE.	25	USE OR OTHER DEALINGS IN THE SOFTWARE.
26		26
27	**************************************************************************/	27	**************************************************************************/
28		28
29	/*	29	/*
30	* Authors: Jeff Hartmann	30	* Authors: Jeff Hartmann
31	* Abraham van der Merwe	31	* Abraham van der Merwe
32	* David Dawes	32	* David Dawes
33	* Alan Hourihane	33	* Alan Hourihane
34	*/	34	*/
35		35
36	#ifdef HAVE_CONFIG_H	36	#ifdef HAVE_CONFIG_H
37	#include "config.h"	37	#include "config.h"
38	#endif	38	#endif
39		39
40	#include	40	#include
41	#include	41	#include
42	#include "i915_pciids.h"	42	#include "i915_pciids.h"
43		43
44	#include "compiler.h"	44	#include "compiler.h"
45	#include "sna.h"	45	#include "sna.h"
46		46
47	#include	47	#include
48	#include	48	#include
49		49
50	#define to_surface(x) (surface_t*)((x)->handle)	50	#define to_surface(x) (surface_t*)((x)->handle)
-		51
-		52	typedef struct {
-		53	int l;
-		54	int t;
-		55	int r;
-		56	int b;
-		57	} rect_t;
51		58
52	static struct sna_fb sna_fb;	59	static struct sna_fb sna_fb;
53	static int tls_mask;	60	static int tls_mask;
54		61
55	int tls_alloc(void);	62	int tls_alloc(void);
56		63
57	static inline void *tls_get(int key)	64	static inline void *tls_get(int key)
58	{	65	{
59	void *val;	66	void *val;
60	__asm__ __volatile__(	67	__asm__ __volatile__(
61	"movl %%fs:(%1), %0"	68	"movl %%fs:(%1), %0"
62	:"=r"(val)	69	:"=r"(val)
63	:"r"(key));	70	:"r"(key));
64		71
65	return val;	72	return val;
66	};	73	};
67		74
68	static inline int	75	static inline int
69	tls_set(int key, const void *ptr)	76	tls_set(int key, const void *ptr)
70	{	77	{
71	if(!(key & 3))	78	if(!(key & 3))
72	{	79	{
73	__asm__ __volatile__(	80	__asm__ __volatile__(
74	"movl %0, %%fs:(%1)"	81	"movl %0, %%fs:(%1)"
75	::"r"(ptr),"r"(key));	82	::"r"(ptr),"r"(key));
76	return 0;	83	return 0;
77	}	84	}
78	else return -1;	85	else return -1;
79	}	86	}
80		87
81		88
82		89
83		90
84	int kgem_init_fb(struct kgem kgem, struct sna_fb fb);	91	int kgem_init_fb(struct kgem kgem, struct sna_fb fb);
85	int kgem_update_fb(struct kgem kgem, struct sna_fb fb);	92	int kgem_update_fb(struct kgem kgem, struct sna_fb fb);
86	uint32_t kgem_surface_size(struct kgem *kgem,bool relaxed_fencing,	93	uint32_t kgem_surface_size(struct kgem *kgem,bool relaxed_fencing,
87	unsigned flags, uint32_t width, uint32_t height,	94	unsigned flags, uint32_t width, uint32_t height,
88	uint32_t bpp, uint32_t tiling, uint32_t *pitch);	95	uint32_t bpp, uint32_t tiling, uint32_t *pitch);
89	struct kgem_bo kgem_bo_from_handle(struct kgem kgem, int handle,	96	struct kgem_bo kgem_bo_from_handle(struct kgem kgem, int handle,
90	int pitch, int height);	97	int pitch, int height);
91		98
92	void kgem_close_batches(struct kgem *kgem);	99	void kgem_close_batches(struct kgem *kgem);
93	void sna_bo_destroy(struct kgem kgem, struct kgem_bo bo);	100	void sna_bo_destroy(struct kgem kgem, struct kgem_bo bo);
94		101
95		102
96	static bool sna_solid_cache_init(struct sna *sna);	103	static bool sna_solid_cache_init(struct sna *sna);
97		104
98	struct sna *sna_device;	105	struct sna *sna_device;
99		106
100	__LOCK_INIT_RECURSIVE(, __sna_lock);	107	__LOCK_INIT_RECURSIVE(, __sna_lock);
101		108
102	static void no_render_reset(struct sna *sna)	109	static void no_render_reset(struct sna *sna)
103	{	110	{
104	(void)sna;	111	(void)sna;
105	}	112	}
106		113
107	static void no_render_flush(struct sna *sna)	114	static void no_render_flush(struct sna *sna)
108	{	115	{
109	(void)sna;	116	(void)sna;
110	}	117	}
111		118
112	static void	119	static void
113	no_render_context_switch(struct kgem *kgem,	120	no_render_context_switch(struct kgem *kgem,
114	int new_mode)	121	int new_mode)
115	{	122	{
116	if (!kgem->nbatch)	123	if (!kgem->nbatch)
117	return;	124	return;
118		125
119	if (kgem_ring_is_idle(kgem, kgem->ring)) {	126	if (kgem_ring_is_idle(kgem, kgem->ring)) {
120	DBG(("%s: GPU idle, flushing\n", __FUNCTION__));	127	DBG(("%s: GPU idle, flushing\n", __FUNCTION__));
121	_kgem_submit(kgem);	128	_kgem_submit(kgem);
122	}	129	}
123		130
124	(void)new_mode;	131	(void)new_mode;
125	}	132	}
126		133
127	static void	134	static void
128	no_render_retire(struct kgem *kgem)	135	no_render_retire(struct kgem *kgem)
129	{	136	{
130	(void)kgem;	137	(void)kgem;
131	}	138	}
132		139
133	static void	140	static void
134	no_render_expire(struct kgem *kgem)	141	no_render_expire(struct kgem *kgem)
135	{	142	{
136	(void)kgem;	143	(void)kgem;
137	}	144	}
138		145
139	static void	146	static void
140	no_render_fini(struct sna *sna)	147	no_render_fini(struct sna *sna)
141	{	148	{
142	(void)sna;	149	(void)sna;
143	}	150	}
144		151
145	const char no_render_init(struct sna sna)	152	const char no_render_init(struct sna sna)
146	{	153	{
147	struct sna_render *render = &sna->render;	154	struct sna_render *render = &sna->render;
148		155
149	memset (render,0, sizeof (*render));	156	memset (render,0, sizeof (*render));
150		157
151	render->prefer_gpu = PREFER_GPU_BLT;	158	render->prefer_gpu = PREFER_GPU_BLT;
152		159
153	render->vertices = render->vertex_data;	160	render->vertices = render->vertex_data;
154	render->vertex_size = ARRAY_SIZE(render->vertex_data);	161	render->vertex_size = ARRAY_SIZE(render->vertex_data);
155		162
156	render->reset = no_render_reset;	163	render->reset = no_render_reset;
157	render->flush = no_render_flush;	164	render->flush = no_render_flush;
158	render->fini = no_render_fini;	165	render->fini = no_render_fini;
159		166
160	sna->kgem.context_switch = no_render_context_switch;	167	sna->kgem.context_switch = no_render_context_switch;
161	sna->kgem.retire = no_render_retire;	168	sna->kgem.retire = no_render_retire;
162	sna->kgem.expire = no_render_expire;	169	sna->kgem.expire = no_render_expire;
163		170
164	sna->kgem.mode = KGEM_RENDER;	171	sna->kgem.mode = KGEM_RENDER;
165	sna->kgem.ring = KGEM_RENDER;	172	sna->kgem.ring = KGEM_RENDER;
166		173
167	sna_vertex_init(sna);	174	sna_vertex_init(sna);
168	return "generic";	175	return "generic";
169	}	176	}
170		177
171	void sna_vertex_init(struct sna *sna)	178	void sna_vertex_init(struct sna *sna)
172	{	179	{
173	// pthread_mutex_init(&sna->render.lock, NULL);	180	// pthread_mutex_init(&sna->render.lock, NULL);
174	// pthread_cond_init(&sna->render.wait, NULL);	181	// pthread_cond_init(&sna->render.wait, NULL);
175	sna->render.active = 0;	182	sna->render.active = 0;
176	}	183	}
177		184
178	int sna_accel_init(struct sna *sna)	185	int sna_accel_init(struct sna *sna)
179	{	186	{
180	const char *backend;	187	const char *backend;
181		188
182	backend = no_render_init(sna);	189	backend = no_render_init(sna);
183	if (sna->info->gen >= 0100)	190	if (sna->info->gen >= 0100)
184	(void)backend;	191	(void)backend;
185	else if (sna->info->gen >= 070)	192	else if (sna->info->gen >= 070)
186	backend = gen7_render_init(sna, backend);	193	backend = gen7_render_init(sna, backend);
187	else if (sna->info->gen >= 060)	194	else if (sna->info->gen >= 060)
188	backend = gen6_render_init(sna, backend);	195	backend = gen6_render_init(sna, backend);
189	else if (sna->info->gen >= 050)	196	else if (sna->info->gen >= 050)
190	backend = gen5_render_init(sna, backend);	197	backend = gen5_render_init(sna, backend);
191	else if (sna->info->gen >= 040)	198	else if (sna->info->gen >= 040)
192	backend = gen4_render_init(sna, backend);	199	backend = gen4_render_init(sna, backend);
193	else if (sna->info->gen >= 030)	200	else if (sna->info->gen >= 030)
194	backend = gen3_render_init(sna, backend);	201	backend = gen3_render_init(sna, backend);
195		202
196	DBG(("%s(backend=%s, prefer_gpu=%x)\n",	203	DBG(("%s(backend=%s, prefer_gpu=%x)\n",
197	__FUNCTION__, backend, sna->render.prefer_gpu));	204	__FUNCTION__, backend, sna->render.prefer_gpu));
198		205
199	kgem_reset(&sna->kgem);	206	kgem_reset(&sna->kgem);
200		207
201	sna_device = sna;	208	sna_device = sna;
202		209
203	return kgem_init_fb(&sna->kgem, &sna_fb);	210	return kgem_init_fb(&sna->kgem, &sna_fb);
204	}	211	}
205		212
206	int sna_init(uint32_t service)	213	int sna_init(uint32_t service)
207	{	214	{
208	ioctl_t io;	215	ioctl_t io;
209	int caps = 0;	216	int caps = 0;
210		217
211	static struct pci_device device;	218	static struct pci_device device;
212	struct sna *sna;	219	struct sna *sna;
213		220
214	DBG(("%s\n", __FUNCTION__));	221	DBG(("%s\n", __FUNCTION__));
215		222
216	__lock_acquire_recursive(__sna_lock);	223	__lock_acquire_recursive(__sna_lock);
217		224
218	if(sna_device)	225	if(sna_device)
219	goto done;	226	goto done;
220		227
221	io.handle = service;	228	io.handle = service;
222	io.io_code = SRV_GET_PCI_INFO;	229	io.io_code = SRV_GET_PCI_INFO;
223	io.input = &device;	230	io.input = &device;
224	io.inp_size = sizeof(device);	231	io.inp_size = sizeof(device);
225	io.output = NULL;	232	io.output = NULL;
226	io.out_size = 0;	233	io.out_size = 0;
227		234
228	if (call_service(&io)!=0)	235	if (call_service(&io)!=0)
229	goto err1;	236	goto err1;
230		237
231	sna = malloc(sizeof(*sna));	238	sna = malloc(sizeof(*sna));
232	if (sna == NULL)	239	if (sna == NULL)
233	goto err1;	240	goto err1;
234		241
235	memset(sna, 0, sizeof(*sna));	242	memset(sna, 0, sizeof(*sna));
236		243
237	sna->cpu_features = sna_cpu_detect();	244	sna->cpu_features = sna_cpu_detect();
238		245
239	sna->PciInfo = &device;	246	sna->PciInfo = &device;
240	sna->info = intel_detect_chipset(sna->PciInfo);	247	sna->info = intel_detect_chipset(sna->PciInfo);
241	sna->scrn = service;	248	sna->scrn = service;
242		249
243	kgem_init(&sna->kgem, service, sna->PciInfo, sna->info->gen);	250	kgem_init(&sna->kgem, service, sna->PciInfo, sna->info->gen);
244		251
245		252
246	/* Disable tiling by default */	253	/* Disable tiling by default */
247	sna->tiling = 0;	254	sna->tiling = 0;
248		255
249	/* Default fail-safe value of 75 Hz */	256	/* Default fail-safe value of 75 Hz */
250	// sna->vblank_interval = 1000 * 1000 * 1000 / 75;	257	// sna->vblank_interval = 1000 * 1000 * 1000 / 75;
251		258
252	sna->flags = 0;	259	sna->flags = 0;
253		260
254	sna_accel_init(sna);	261	sna_accel_init(sna);
255		262
256	tls_mask = tls_alloc();	263	tls_mask = tls_alloc();
257		264
258	// printf("tls mask %x\n", tls_mask);	265	// printf("tls mask %x\n", tls_mask);
259		266
260	done:	267	done:
261	caps = sna_device->render.caps;	268	caps = sna_device->render.caps;
262		269
263	err1:	270	err1:
264	__lock_release_recursive(__sna_lock);	271	__lock_release_recursive(__sna_lock);
265		272
266	return caps;	273	return caps;
267	}	274	}
268		275
269	void sna_fini()	276	void sna_fini()
270	{	277	{
-		278	ENTER();
-		279
271	if( sna_device )	280	if( sna_device )
272	{	281	{
273	struct kgem_bo *mask;	282	struct kgem_bo *mask;
274		283
275	__lock_acquire_recursive(__sna_lock);	284	__lock_acquire_recursive(__sna_lock);
276		285
277	mask = tls_get(tls_mask);	286	mask = tls_get(tls_mask);
278		287
279	sna_device->render.fini(sna_device);	288	sna_device->render.fini(sna_device);
280	if(mask)	289	if(mask)
281	kgem_bo_destroy(&sna_device->kgem, mask);	290	kgem_bo_destroy(&sna_device->kgem, mask);
282	kgem_close_batches(&sna_device->kgem);	291	// kgem_close_batches(&sna_device->kgem);
283	kgem_cleanup_cache(&sna_device->kgem);	292	kgem_cleanup_cache(&sna_device->kgem);
284		293
285	sna_device = NULL;	294	sna_device = NULL;
286	__lock_release_recursive(__sna_lock);	295	__lock_release_recursive(__sna_lock);
287	};	296	};
-		297	LEAVE();
288	}	298	}
289		299
290	#if 0	300	#if 0
291		301
292	static bool sna_solid_cache_init(struct sna *sna)	302	static bool sna_solid_cache_init(struct sna *sna)
293	{	303	{
294	struct sna_solid_cache *cache = &sna->render.solid_cache;	304	struct sna_solid_cache *cache = &sna->render.solid_cache;
295		305
296	DBG(("%s\n", __FUNCTION__));	306	DBG(("%s\n", __FUNCTION__));
297		307
298	cache->cache_bo =	308	cache->cache_bo =
299	kgem_create_linear(&sna->kgem, sizeof(cache->color));	309	kgem_create_linear(&sna->kgem, sizeof(cache->color));
300	if (!cache->cache_bo)	310	if (!cache->cache_bo)
301	return FALSE;	311	return FALSE;
302		312
303	/*	313	/*
304	* Initialise [0] with white since it is very common and filling the	314	* Initialise [0] with white since it is very common and filling the
305	* zeroth slot simplifies some of the checks.	315	* zeroth slot simplifies some of the checks.
306	*/	316	*/
307	cache->color[0] = 0xffffffff;	317	cache->color[0] = 0xffffffff;
308	cache->bo[0] = kgem_create_proxy(cache->cache_bo, 0, sizeof(uint32_t));	318	cache->bo[0] = kgem_create_proxy(cache->cache_bo, 0, sizeof(uint32_t));
309	cache->bo[0]->pitch = 4;	319	cache->bo[0]->pitch = 4;
310	cache->dirty = 1;	320	cache->dirty = 1;
311	cache->size = 1;	321	cache->size = 1;
312	cache->last = 0;	322	cache->last = 0;
313		323
314	return TRUE;	324	return TRUE;
315	}	325	}
316		326
317	void	327	void
318	sna_render_flush_solid(struct sna *sna)	328	sna_render_flush_solid(struct sna *sna)
319	{	329	{
320	struct sna_solid_cache *cache = &sna->render.solid_cache;	330	struct sna_solid_cache *cache = &sna->render.solid_cache;
321		331
322	DBG(("sna_render_flush_solid(size=%d)\n", cache->size));	332	DBG(("sna_render_flush_solid(size=%d)\n", cache->size));
323	assert(cache->dirty);	333	assert(cache->dirty);
324	assert(cache->size);	334	assert(cache->size);
325		335
326	kgem_bo_write(&sna->kgem, cache->cache_bo,	336	kgem_bo_write(&sna->kgem, cache->cache_bo,
327	cache->color, cache->size*sizeof(uint32_t));	337	cache->color, cache->size*sizeof(uint32_t));
328	cache->dirty = 0;	338	cache->dirty = 0;
329	cache->last = 0;	339	cache->last = 0;
330	}	340	}
331		341
332	static void	342	static void
333	sna_render_finish_solid(struct sna *sna, bool force)	343	sna_render_finish_solid(struct sna *sna, bool force)
334	{	344	{
335	struct sna_solid_cache *cache = &sna->render.solid_cache;	345	struct sna_solid_cache *cache = &sna->render.solid_cache;
336	int i;	346	int i;
337		347
338	DBG(("sna_render_finish_solid(force=%d, domain=%d, busy=%d, dirty=%d)\n",	348	DBG(("sna_render_finish_solid(force=%d, domain=%d, busy=%d, dirty=%d)\n",
339	force, cache->cache_bo->domain, cache->cache_bo->rq != NULL, cache->dirty));	349	force, cache->cache_bo->domain, cache->cache_bo->rq != NULL, cache->dirty));
340		350
341	if (!force && cache->cache_bo->domain != DOMAIN_GPU)	351	if (!force && cache->cache_bo->domain != DOMAIN_GPU)
342	return;	352	return;
343		353
344	if (cache->dirty)	354	if (cache->dirty)
345	sna_render_flush_solid(sna);	355	sna_render_flush_solid(sna);
346		356
347	for (i = 0; i < cache->size; i++) {	357	for (i = 0; i < cache->size; i++) {
348	if (cache->bo[i] == NULL)	358	if (cache->bo[i] == NULL)
349	continue;	359	continue;
350		360
351	kgem_bo_destroy(&sna->kgem, cache->bo[i]);	361	kgem_bo_destroy(&sna->kgem, cache->bo[i]);
352	cache->bo[i] = NULL;	362	cache->bo[i] = NULL;
353	}	363	}
354	kgem_bo_destroy(&sna->kgem, cache->cache_bo);	364	kgem_bo_destroy(&sna->kgem, cache->cache_bo);
355		365
356	DBG(("sna_render_finish_solid reset\n"));	366	DBG(("sna_render_finish_solid reset\n"));
357		367
358	cache->cache_bo = kgem_create_linear(&sna->kgem, sizeof(cache->color));	368	cache->cache_bo = kgem_create_linear(&sna->kgem, sizeof(cache->color));
359	cache->bo[0] = kgem_create_proxy(cache->cache_bo, 0, sizeof(uint32_t));	369	cache->bo[0] = kgem_create_proxy(cache->cache_bo, 0, sizeof(uint32_t));
360	cache->bo[0]->pitch = 4;	370	cache->bo[0]->pitch = 4;
361	if (force)	371	if (force)
362	cache->size = 1;	372	cache->size = 1;
363	}	373	}
364		374
365		375
366	struct kgem_bo *	376	struct kgem_bo *
367	sna_render_get_solid(struct sna *sna, uint32_t color)	377	sna_render_get_solid(struct sna *sna, uint32_t color)
368	{	378	{
369	struct sna_solid_cache *cache = &sna->render.solid_cache;	379	struct sna_solid_cache *cache = &sna->render.solid_cache;
370	int i;	380	int i;
371		381
372	DBG(("%s: %08x\n", __FUNCTION__, color));	382	DBG(("%s: %08x\n", __FUNCTION__, color));
373		383
374	// if ((color & 0xffffff) == 0) /* alpha only */	384	// if ((color & 0xffffff) == 0) /* alpha only */
375	// return kgem_bo_reference(sna->render.alpha_cache.bo[color>>24]);	385	// return kgem_bo_reference(sna->render.alpha_cache.bo[color>>24]);
376		386
377	if (color == 0xffffffff) {	387	if (color == 0xffffffff) {
378	DBG(("%s(white)\n", __FUNCTION__));	388	DBG(("%s(white)\n", __FUNCTION__));
379	return kgem_bo_reference(cache->bo[0]);	389	return kgem_bo_reference(cache->bo[0]);
380	}	390	}
381		391
382	if (cache->color[cache->last] == color) {	392	if (cache->color[cache->last] == color) {
383	DBG(("sna_render_get_solid(%d) = %x (last)\n",	393	DBG(("sna_render_get_solid(%d) = %x (last)\n",
384	cache->last, color));	394	cache->last, color));
385	return kgem_bo_reference(cache->bo[cache->last]);	395	return kgem_bo_reference(cache->bo[cache->last]);
386	}	396	}
387		397
388	for (i = 1; i < cache->size; i++) {	398	for (i = 1; i < cache->size; i++) {
389	if (cache->color[i] == color) {	399	if (cache->color[i] == color) {
390	if (cache->bo[i] == NULL) {	400	if (cache->bo[i] == NULL) {
391	DBG(("sna_render_get_solid(%d) = %x (recreate)\n",	401	DBG(("sna_render_get_solid(%d) = %x (recreate)\n",
392	i, color));	402	i, color));
393	goto create;	403	goto create;
394	} else {	404	} else {
395	DBG(("sna_render_get_solid(%d) = %x (old)\n",	405	DBG(("sna_render_get_solid(%d) = %x (old)\n",
396	i, color));	406	i, color));
397	goto done;	407	goto done;
398	}	408	}
399	}	409	}
400	}	410	}
401		411
402	sna_render_finish_solid(sna, i == ARRAY_SIZE(cache->color));	412	sna_render_finish_solid(sna, i == ARRAY_SIZE(cache->color));
403		413
404	i = cache->size++;	414	i = cache->size++;
405	cache->color[i] = color;	415	cache->color[i] = color;
406	cache->dirty = 1;	416	cache->dirty = 1;
407	DBG(("sna_render_get_solid(%d) = %x (new)\n", i, color));	417	DBG(("sna_render_get_solid(%d) = %x (new)\n", i, color));
408		418
409	create:	419	create:
410	cache->bo[i] = kgem_create_proxy(cache->cache_bo,	420	cache->bo[i] = kgem_create_proxy(cache->cache_bo,
411	i*sizeof(uint32_t), sizeof(uint32_t));	421	i*sizeof(uint32_t), sizeof(uint32_t));
412	cache->bo[i]->pitch = 4;	422	cache->bo[i]->pitch = 4;
413		423
414	done:	424	done:
415	cache->last = i;	425	cache->last = i;
416	return kgem_bo_reference(cache->bo[i]);	426	return kgem_bo_reference(cache->bo[i]);
417	}	427	}
418		428
419	#endif	429	#endif
420		430
421		431
422	int sna_blit_copy(bitmap_t *src_bitmap, int dst_x, int dst_y,	432	int sna_blit_copy(bitmap_t *src_bitmap, int dst_x, int dst_y,
423	int w, int h, int src_x, int src_y)	433	int w, int h, int src_x, int src_y)
424		434
425	{	435	{
426	struct sna_copy_op copy;	436	struct sna_copy_op copy;
427	struct _Pixmap src, dst;	437	struct _Pixmap src, dst;
428	struct kgem_bo *src_bo;	438	struct kgem_bo *src_bo;
429		439
430	char proc_info[1024];	440	char proc_info[1024];
431	int winx, winy;	441	int winx, winy;
432		442
433	get_proc_info(proc_info);	443	get_proc_info(proc_info);
434		444
435	winx = (uint32_t)(proc_info+34);	445	winx = (uint32_t)(proc_info+34);
436	winy = (uint32_t)(proc_info+38);	446	winy = (uint32_t)(proc_info+38);
437		447
438	memset(&src, 0, sizeof(src));	448	memset(&src, 0, sizeof(src));
439	memset(&dst, 0, sizeof(dst));	449	memset(&dst, 0, sizeof(dst));
440		450
441	src.drawable.bitsPerPixel = 32;	451	src.drawable.bitsPerPixel = 32;
442	src.drawable.width = src_bitmap->width;	452	src.drawable.width = src_bitmap->width;
443	src.drawable.height = src_bitmap->height;	453	src.drawable.height = src_bitmap->height;
444		454
445	dst.drawable.bitsPerPixel = 32;	455	dst.drawable.bitsPerPixel = 32;
446	dst.drawable.width = sna_fb.width;	456	dst.drawable.width = sna_fb.width;
447	dst.drawable.height = sna_fb.height;	457	dst.drawable.height = sna_fb.height;
448		458
449	memset(©, 0, sizeof(copy));	459	memset(©, 0, sizeof(copy));
450		460
451	src_bo = (struct kgem_bo*)src_bitmap->handle;	461	src_bo = (struct kgem_bo*)src_bitmap->handle;
452		462
453	if( sna_device->render.copy(sna_device, GXcopy,	463	if( sna_device->render.copy(sna_device, GXcopy,
454	&src, src_bo,	464	&src, src_bo,
455	&dst, sna_fb.fb_bo, ©) )	465	&dst, sna_fb.fb_bo, ©) )
456	{	466	{
457	copy.blt(sna_device, ©, src_x, src_y, w, h, winx+dst_x, winy+dst_y);	467	copy.blt(sna_device, ©, src_x, src_y, w, h, winx+dst_x, winy+dst_y);
458	copy.done(sna_device, ©);	468	copy.done(sna_device, ©);
459	}	469	}
460		470
461	kgem_submit(&sna_device->kgem);	471	kgem_submit(&sna_device->kgem);
462		472
463	return 0;	473	return 0;
464		474
465	// __asm__ __volatile__("int3");	475	// __asm__ __volatile__("int3");
466		476
467	};	477	};
468		478
469	typedef struct	479	typedef struct
470	{	480	{
471	uint32_t width;	481	uint32_t width;
472	uint32_t height;	482	uint32_t height;
473	void *data;	483	void *data;
474	uint32_t pitch;	484	uint32_t pitch;
475	struct kgem_bo *bo;	485	struct kgem_bo *bo;
476	uint32_t bo_size;	486	uint32_t bo_size;
477	uint32_t flags;	487	uint32_t flags;
478	}surface_t;	488	}surface_t;
479		489
480		490
481		491
482	int sna_create_bitmap(bitmap_t *bitmap)	492	int sna_create_bitmap(bitmap_t *bitmap)
483	{	493	{
484	surface_t *sf;	494	surface_t *sf;
485	struct kgem_bo *bo;	495	struct kgem_bo *bo;
486		496
487	sf = malloc(sizeof(*sf));	497	sf = malloc(sizeof(*sf));
488	if(sf == NULL)	498	if(sf == NULL)
489	goto err_1;	499	goto err_1;
490		500

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(root)/contrib/sdk/sources/Intel-2D/sna/sna.c – Rev 4359 → 4368