Rev 3199 | Go to most recent revision | Show entire file | Regard whitespace | Details | Blame | Last modification | View Log | RSS feed
Rev 3199 | Rev 3205 | ||
---|---|---|---|
Line 38... | Line 38... | ||
38 | PCI_BIT_PIO = 1 ; bit0: io space control |
38 | PCI_BIT_PIO = 1 ; bit0: io space control |
39 | PCI_BIT_MMIO = 2 ; bit1: memory space control |
39 | PCI_BIT_MMIO = 2 ; bit1: memory space control |
40 | PCI_BIT_MASTER = 4 ; bit2: device acts as a PCI master |
40 | PCI_BIT_MASTER = 4 ; bit2: device acts as a PCI master |
Line 41... | Line 41... | ||
41 | 41 | ||
Line 42... | Line 42... | ||
42 | 42 | ||
Line 43... | Line 43... | ||
43 | macro find_io bus, dev, io { |
43 | macro PCI_find_io { |
44 | 44 | ||
45 | local .check, .inc, .got |
- | |
46 | - | ||
47 | xor eax, eax |
45 | local .check, .inc, .got |
48 | mov esi, PCI_BASE_ADDRESS_0 |
- | |
49 | movzx ecx, bus |
46 | |
50 | movzx edx, dev |
- | |
Line 51... | Line 47... | ||
51 | .check: |
47 | xor eax, eax |
52 | push ecx edx |
48 | mov esi, PCI_BASE_ADDRESS_0 |
Line 53... | Line 49... | ||
53 | stdcall PciRead32, ecx ,edx ,esi |
49 | .check: |
Line 67... | Line 63... | ||
67 | cmp esi, PCI_BASE_ADDRESS_5 |
63 | cmp esi, PCI_BASE_ADDRESS_5 |
68 | jbe .check |
64 | jbe .check |
69 | xor eax, eax |
65 | xor eax, eax |
Line 70... | Line 66... | ||
70 | 66 | ||
71 | .got: |
67 | .got: |
Line 72... | Line 68... | ||
72 | mov io, eax |
68 | mov [device.io_addr], eax |
Line 73... | Line 69... | ||
73 | 69 | ||
Line 74... | Line 70... | ||
74 | } |
70 | } |
Line 75... | Line 71... | ||
75 | 71 | ||
76 | 72 | ||
77 | macro find_mmio32 bus, dev, io { |
73 | macro PCI_find_mmio32 { |
Line 78... | Line 74... | ||
78 | 74 | ||
79 | local .check, .inc, .got |
75 | local .check, .inc, .got |
Line 80... | Line 76... | ||
80 | 76 | ||
Line 95... | Line 91... | ||
95 | cmp esi, PCI_BASE_ADDRESS_5 |
91 | cmp esi, PCI_BASE_ADDRESS_5 |
96 | jbe .check |
92 | jbe .check |
97 | xor eax, eax |
93 | xor eax, eax |
Line 98... | Line 94... | ||
98 | 94 | ||
99 | .got: |
95 | .got: |
100 | mov io, eax |
96 | mov [device.mmio_addr], eax |
Line 101... | Line 97... | ||
101 | } |
97 | } |
Line 102... | Line -... | ||
102 | - | ||
103 | macro find_irq bus, dev, irq { |
- | |
104 | - | ||
105 | push eax edx ecx |
98 | |
106 | movzx ecx, bus |
99 | macro PCI_find_irq { |
107 | movzx edx, dev |
- | |
Line 108... | Line 100... | ||
108 | stdcall PciRead8, ecx, edx, PCI_REG_IRQ |
100 | |
Line 109... | Line 101... | ||
109 | mov irq, al |
101 | stdcall PciRead8, [device.pci_bus], [device.pci_dev], PCI_REG_IRQ |
Line 110... | Line -... | ||
110 | pop ecx edx eax |
- | |
111 | - | ||
112 | } |
- | |
113 | 102 | mov [device.irq_line], al |
|
114 | macro find_rev bus, dev, rev { |
103 | |
115 | - | ||
Line 116... | Line 104... | ||
116 | push eax edx ecx |
104 | } |
Line 117... | Line 105... | ||
117 | movzx ecx, bus |
105 | |
Line 118... | Line -... | ||
118 | movzx edx, dev |
- | |
119 | stdcall PciRead8, ecx ,edx ,0x8 |
- | |
120 | mov rev, al |
- | |
121 | pop ecx edx eax |
106 | macro PCI_find_rev { |
122 | - | ||
123 | } |
107 | |
124 | 108 | stdcall PciRead8, [device.pci_bus], [device.pci_dev], PCI_REVISION_ID |
|
Line 125... | Line 109... | ||
125 | macro make_bus_master bus, dev { |
109 | mov [device.revision], al |
Line 126... | Line 110... | ||
126 | 110 | ||
Line 127... | Line -... | ||
127 | movzx ecx, bus |
- | |
128 | movzx edx, dev |
111 | } |
129 | push ecx edx |
- | |
- | 112 | ||
130 | stdcall PciRead32, ecx ,edx, PCI_REG_COMMAND |
113 | macro PCI_make_bus_master bus, dev { |
131 | pop edx ecx |
- | |
132 | or al, PCI_BIT_MASTER |
114 | |
133 | stdcall PciWrite32, ecx, edx, PCI_REG_COMMAND, eax |
115 | stdcall PciRead32, [device.pci_bus], [device.pci_dev], PCI_REG_COMMAND |
134 | 116 | or al, PCI_BIT_MASTER |
|
135 | } |
117 | stdcall PciWrite32, [device.pci_bus], [device.pci_dev], PCI_REG_COMMAND, eax |
136 | 118 | ||
Line 137... | Line 119... | ||
137 | macro adjust_latency bus, dev, min { |
119 | } |