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Rev 2997 | Rev 3192 | ||
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Line 383... | Line 383... | ||
383 | while (ndw > (ring->ring_free_dw - 1)) { |
383 | while (ndw > (ring->ring_free_dw - 1)) { |
384 | radeon_ring_free_size(rdev, ring); |
384 | radeon_ring_free_size(rdev, ring); |
385 | if (ndw < ring->ring_free_dw) { |
385 | if (ndw < ring->ring_free_dw) { |
386 | break; |
386 | break; |
387 | } |
387 | } |
388 | // r = radeon_fence_wait_next(rdev); |
388 | r = radeon_fence_wait_next_locked(rdev, ring->idx); |
389 | // if (r) { |
389 | if (r) |
390 | // mutex_unlock(&rdev->cp.mutex); |
- | |
391 | // return r; |
390 | return r; |
392 | // } |
- | |
393 | } |
391 | } |
394 | ring->count_dw = ndw; |
392 | ring->count_dw = ndw; |
395 | ring->wptr_old = ring->wptr; |
393 | ring->wptr_old = ring->wptr; |
396 | return 0; |
394 | return 0; |
397 | } |
395 | } |
Line 459... | Line 457... | ||
459 | /** |
457 | /** |
460 | * radeon_ring_undo - reset the wptr |
458 | * radeon_ring_undo - reset the wptr |
461 | * |
459 | * |
462 | * @ring: radeon_ring structure holding ring information |
460 | * @ring: radeon_ring structure holding ring information |
463 | * |
461 | * |
464 | * Reset the driver's copy of the wtpr (all asics). |
462 | * Reset the driver's copy of the wptr (all asics). |
465 | */ |
463 | */ |
466 | void radeon_ring_undo(struct radeon_ring *ring) |
464 | void radeon_ring_undo(struct radeon_ring *ring) |
467 | { |
465 | { |
468 | ring->wptr = ring->wptr_old; |
466 | ring->wptr = ring->wptr_old; |
469 | } |
467 | } |
Line 503... | Line 501... | ||
503 | } |
501 | } |
504 | } |
502 | } |
505 | } |
503 | } |
Line 506... | Line 504... | ||
506 | 504 | ||
507 | /** |
505 | /** |
508 | * radeon_ring_force_activity - update lockup variables |
506 | * radeon_ring_lockup_update - update lockup variables |
509 | * |
507 | * |
510 | * @ring: radeon_ring structure holding ring information |
508 | * @ring: radeon_ring structure holding ring information |
511 | * |
509 | * |
512 | * Update the last rptr value and timestamp (all asics). |
510 | * Update the last rptr value and timestamp (all asics). |
Line 770... | Line 768... | ||
770 | struct drm_device *dev = node->minor->dev; |
768 | struct drm_device *dev = node->minor->dev; |
771 | struct radeon_device *rdev = dev->dev_private; |
769 | struct radeon_device *rdev = dev->dev_private; |
772 | int ridx = *(int*)node->info_ent->data; |
770 | int ridx = *(int*)node->info_ent->data; |
773 | struct radeon_ring *ring = &rdev->ring[ridx]; |
771 | struct radeon_ring *ring = &rdev->ring[ridx]; |
774 | unsigned count, i, j; |
772 | unsigned count, i, j; |
- | 773 | u32 tmp; |
|
Line 775... | Line 774... | ||
775 | 774 | ||
776 | radeon_ring_free_size(rdev, ring); |
775 | radeon_ring_free_size(rdev, ring); |
- | 776 | count = (ring->ring_size / 4) - ring->ring_free_dw; |
|
777 | count = (ring->ring_size / 4) - ring->ring_free_dw; |
777 | tmp = RREG32(ring->wptr_reg) >> ring->ptr_reg_shift; |
- | 778 | seq_printf(m, "wptr(0x%04x): 0x%08x [%5d]\n", ring->wptr_reg, tmp, tmp); |
|
778 | seq_printf(m, "wptr(0x%04x): 0x%08x\n", ring->wptr_reg, RREG32(ring->wptr_reg)); |
779 | tmp = RREG32(ring->rptr_reg) >> ring->ptr_reg_shift; |
779 | seq_printf(m, "rptr(0x%04x): 0x%08x\n", ring->rptr_reg, RREG32(ring->rptr_reg)); |
780 | seq_printf(m, "rptr(0x%04x): 0x%08x [%5d]\n", ring->rptr_reg, tmp, tmp); |
780 | if (ring->rptr_save_reg) { |
781 | if (ring->rptr_save_reg) { |
781 | seq_printf(m, "rptr next(0x%04x): 0x%08x\n", ring->rptr_save_reg, |
782 | seq_printf(m, "rptr next(0x%04x): 0x%08x\n", ring->rptr_save_reg, |
782 | RREG32(ring->rptr_save_reg)); |
783 | RREG32(ring->rptr_save_reg)); |
783 | } |
784 | } |
784 | seq_printf(m, "driver's copy of the wptr: 0x%08x\n", ring->wptr); |
785 | seq_printf(m, "driver's copy of the wptr: 0x%08x [%5d]\n", ring->wptr, ring->wptr); |
- | 786 | seq_printf(m, "driver's copy of the rptr: 0x%08x [%5d]\n", ring->rptr, ring->rptr); |
|
- | 787 | seq_printf(m, "last semaphore signal addr : 0x%016llx\n", ring->last_semaphore_signal_addr); |
|
785 | seq_printf(m, "driver's copy of the rptr: 0x%08x\n", ring->rptr); |
788 | seq_printf(m, "last semaphore wait addr : 0x%016llx\n", ring->last_semaphore_wait_addr); |
786 | seq_printf(m, "%u free dwords in ring\n", ring->ring_free_dw); |
789 | seq_printf(m, "%u free dwords in ring\n", ring->ring_free_dw); |
- | 790 | seq_printf(m, "%u dwords in ring\n", count); |
|
787 | seq_printf(m, "%u dwords in ring\n", count); |
791 | /* print 8 dw before current rptr as often it's the last executed |
- | 792 | * packet that is the root issue |
|
- | 793 | */ |
|
788 | i = ring->rptr; |
794 | i = (ring->rptr + ring->ptr_mask + 1 - 32) & ring->ptr_mask; |
789 | for (j = 0; j <= count; j++) { |
795 | for (j = 0; j <= (count + 32); j++) { |
790 | seq_printf(m, "r[%04d]=0x%08x\n", i, ring->ring[i]); |
796 | seq_printf(m, "r[%5d]=0x%08x\n", i, ring->ring[i]); |
791 | i = (i + 1) & ring->ptr_mask; |
797 | i = (i + 1) & ring->ptr_mask; |
792 | } |
798 | } |
793 | return 0; |
799 | return 0; |
Line 794... | Line 800... | ||
794 | } |
800 | } |
795 | 801 | ||
796 | static int radeon_ring_type_gfx_index = RADEON_RING_TYPE_GFX_INDEX; |
802 | static int radeon_ring_type_gfx_index = RADEON_RING_TYPE_GFX_INDEX; |
- | 803 | static int cayman_ring_type_cp1_index = CAYMAN_RING_TYPE_CP1_INDEX; |
|
- | 804 | static int cayman_ring_type_cp2_index = CAYMAN_RING_TYPE_CP2_INDEX; |
|
Line 797... | Line 805... | ||
797 | static int cayman_ring_type_cp1_index = CAYMAN_RING_TYPE_CP1_INDEX; |
805 | static int radeon_ring_type_dma1_index = R600_RING_TYPE_DMA_INDEX; |
798 | static int cayman_ring_type_cp2_index = CAYMAN_RING_TYPE_CP2_INDEX; |
806 | static int radeon_ring_type_dma2_index = CAYMAN_RING_TYPE_DMA1_INDEX; |
799 | 807 | ||
800 | static struct drm_info_list radeon_debugfs_ring_info_list[] = { |
808 | static struct drm_info_list radeon_debugfs_ring_info_list[] = { |
- | 809 | {"radeon_ring_gfx", radeon_debugfs_ring_info, 0, &radeon_ring_type_gfx_index}, |
|
- | 810 | {"radeon_ring_cp1", radeon_debugfs_ring_info, 0, &cayman_ring_type_cp1_index}, |
|
801 | {"radeon_ring_gfx", radeon_debugfs_ring_info, 0, &radeon_ring_type_gfx_index}, |
811 | {"radeon_ring_cp2", radeon_debugfs_ring_info, 0, &cayman_ring_type_cp2_index}, |
Line 802... | Line 812... | ||
802 | {"radeon_ring_cp1", radeon_debugfs_ring_info, 0, &cayman_ring_type_cp1_index}, |
812 | {"radeon_ring_dma1", radeon_debugfs_ring_info, 0, &radeon_ring_type_dma1_index}, |
803 | {"radeon_ring_cp2", radeon_debugfs_ring_info, 0, &cayman_ring_type_cp2_index}, |
813 | {"radeon_ring_dma2", radeon_debugfs_ring_info, 0, &radeon_ring_type_dma2_index}, |
804 | }; |
814 | }; |