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Line 21... Line 21...
21
 * OTHER DEALINGS IN THE SOFTWARE.
21
 * OTHER DEALINGS IN THE SOFTWARE.
22
 *
22
 *
23
 * Authors: Dave Airlie
23
 * Authors: Dave Airlie
24
 *          Alex Deucher
24
 *          Alex Deucher
25
 */
25
 */
26
#include "drmP.h"
26
#include 
27
#include "radeon_drm.h"
27
#include 
28
#include "radeon.h"
28
#include "radeon.h"
Line 29... Line 29...
29
 
29
 
30
#include "atom.h"
30
#include "atom.h"
Line 31... Line 31...
31
#include 
31
#include 
32
 
32
 
33
#include "drm_crtc_helper.h"
-
 
34
#include "drm_edid.h"
-
 
Line 35... Line 33...
35
 
33
#include 
36
static int radeon_ddc_dump(struct drm_connector *connector);
34
#include 
37
 
35
 
38
static void avivo_crtc_load_lut(struct drm_crtc *crtc)
36
static void avivo_crtc_load_lut(struct drm_crtc *crtc)
Line 286... Line 284...
286
		radeon_atombios_init_crtc(dev, radeon_crtc);
284
		radeon_atombios_init_crtc(dev, radeon_crtc);
287
	else
285
	else
288
		radeon_legacy_init_crtc(dev, radeon_crtc);
286
		radeon_legacy_init_crtc(dev, radeon_crtc);
289
}
287
}
Line 290... Line 288...
290
 
288
 
291
static const char *encoder_names[36] = {
289
static const char *encoder_names[37] = {
292
	"NONE",
290
	"NONE",
293
	"INTERNAL_LVDS",
291
	"INTERNAL_LVDS",
294
	"INTERNAL_TMDS1",
292
	"INTERNAL_TMDS1",
295
	"INTERNAL_TMDS2",
293
	"INTERNAL_TMDS2",
Line 323... Line 321...
323
	"INTERNAL_KLDSCP_LVTMA",
321
	"INTERNAL_KLDSCP_LVTMA",
324
	"INTERNAL_UNIPHY1",
322
	"INTERNAL_UNIPHY1",
325
	"INTERNAL_UNIPHY2",
323
	"INTERNAL_UNIPHY2",
326
	"NUTMEG",
324
	"NUTMEG",
327
	"TRAVIS",
325
	"TRAVIS",
328
};
-
 
329
 
-
 
330
static const char *connector_names[15] = {
-
 
331
	"Unknown",
-
 
332
	"VGA",
-
 
333
	"DVI-I",
-
 
334
	"DVI-D",
-
 
335
	"DVI-A",
-
 
336
	"Composite",
-
 
337
	"S-video",
-
 
338
	"LVDS",
-
 
339
	"Component",
-
 
340
	"DIN",
-
 
341
	"DisplayPort",
326
	"INTERNAL_VCE"
342
	"HDMI-A",
-
 
343
	"HDMI-B",
-
 
344
	"TV",
-
 
345
	"eDP",
-
 
346
};
327
};
Line 347... Line 328...
347
 
328
 
348
static const char *hpd_names[6] = {
329
static const char *hpd_names[6] = {
349
	"HPD1",
330
	"HPD1",
Line 365... Line 346...
365
 
346
 
366
	DRM_INFO("Radeon Display Connectors\n");
347
	DRM_INFO("Radeon Display Connectors\n");
367
	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
348
	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
368
		radeon_connector = to_radeon_connector(connector);
349
		radeon_connector = to_radeon_connector(connector);
369
		DRM_INFO("Connector %d:\n", i);
350
		DRM_INFO("Connector %d:\n", i);
370
		DRM_INFO("  %s\n", connector_names[connector->connector_type]);
351
		DRM_INFO("  %s\n", drm_get_connector_name(connector));
371
		if (radeon_connector->hpd.hpd != RADEON_HPD_NONE)
352
		if (radeon_connector->hpd.hpd != RADEON_HPD_NONE)
372
			DRM_INFO("  %s\n", hpd_names[radeon_connector->hpd.hpd]);
353
			DRM_INFO("  %s\n", hpd_names[radeon_connector->hpd.hpd]);
373
		if (radeon_connector->ddc_bus) {
354
		if (radeon_connector->ddc_bus) {
374
			DRM_INFO("  DDC: 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n",
355
			DRM_INFO("  DDC: 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n",
Line 431... Line 412...
431
}
412
}
Line 432... Line 413...
432
 
413
 
433
static bool radeon_setup_enc_conn(struct drm_device *dev)
414
static bool radeon_setup_enc_conn(struct drm_device *dev)
434
{
415
{
435
	struct radeon_device *rdev = dev->dev_private;
-
 
436
	struct drm_connector *drm_connector;
416
	struct radeon_device *rdev = dev->dev_private;
Line 437... Line 417...
437
	bool ret = false;
417
	bool ret = false;
438
 
418
 
439
	if (rdev->bios) {
419
	if (rdev->bios) {
Line 451... Line 431...
451
			ret = radeon_get_legacy_connector_info_from_table(dev);
431
			ret = radeon_get_legacy_connector_info_from_table(dev);
452
	}
432
	}
453
	if (ret) {
433
	if (ret) {
454
		radeon_setup_encoder_clones(dev);
434
		radeon_setup_encoder_clones(dev);
455
		radeon_print_display_setup(dev);
435
		radeon_print_display_setup(dev);
456
		list_for_each_entry(drm_connector, &dev->mode_config.connector_list, head)
-
 
457
			radeon_ddc_dump(drm_connector);
-
 
458
	}
436
	}
Line 459... Line 437...
459
 
437
 
460
	return ret;
438
	return ret;
Line 469... Line 447...
469
	/* on hw with routers, select right port */
447
	/* on hw with routers, select right port */
470
	if (radeon_connector->router.ddc_valid)
448
	if (radeon_connector->router.ddc_valid)
471
		radeon_router_select_ddc_port(radeon_connector);
449
		radeon_router_select_ddc_port(radeon_connector);
Line 472... Line 450...
472
 
450
 
473
	if ((radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_DisplayPort) ||
451
	if ((radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_DisplayPort) ||
-
 
452
	    (radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_eDP) ||
-
 
453
	    (radeon_connector_encoder_get_dp_bridge_encoder_id(&radeon_connector->base) !=
474
	    (radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_eDP)) {
454
	     ENCODER_OBJECT_ID_NONE)) {
-
 
455
		struct radeon_connector_atom_dig *dig = radeon_connector->con_priv;
475
		struct radeon_connector_atom_dig *dig = radeon_connector->con_priv;
456
 
476
		if ((dig->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT ||
457
		if ((dig->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT ||
477
		     dig->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) && dig->dp_i2c_bus)
458
		     dig->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) && dig->dp_i2c_bus)
478
			radeon_connector->edid = drm_get_edid(&radeon_connector->base, &dig->dp_i2c_bus->adapter);
-
 
-
 
459
			radeon_connector->edid = drm_get_edid(&radeon_connector->base,
-
 
460
							      &dig->dp_i2c_bus->adapter);
-
 
461
		else if (radeon_connector->ddc_bus && !radeon_connector->edid)
479
	}
462
			radeon_connector->edid = drm_get_edid(&radeon_connector->base,
480
	if (!radeon_connector->ddc_bus)
463
							      &radeon_connector->ddc_bus->adapter);
481
		return -1;
464
	} else {
482
	if (!radeon_connector->edid) {
465
		if (radeon_connector->ddc_bus && !radeon_connector->edid)
-
 
466
			radeon_connector->edid = drm_get_edid(&radeon_connector->base,
483
		radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter);
467
							      &radeon_connector->ddc_bus->adapter);
Line 484... Line 468...
484
	}
468
	}
485
 
469
 
486
	if (!radeon_connector->edid) {
470
	if (!radeon_connector->edid) {
Line 500... Line 484...
500
	}
484
	}
501
	drm_mode_connector_update_edid_property(&radeon_connector->base, NULL);
485
	drm_mode_connector_update_edid_property(&radeon_connector->base, NULL);
502
	return 0;
486
	return 0;
503
}
487
}
Line 504... Line -...
504
 
-
 
505
static int radeon_ddc_dump(struct drm_connector *connector)
-
 
506
{
-
 
507
	struct edid *edid;
-
 
508
	struct radeon_connector *radeon_connector = to_radeon_connector(connector);
-
 
509
	int ret = 0;
-
 
510
 
-
 
511
	/* on hw with routers, select right port */
-
 
512
	if (radeon_connector->router.ddc_valid)
-
 
513
		radeon_router_select_ddc_port(radeon_connector);
-
 
514
 
-
 
515
	if (!radeon_connector->ddc_bus)
-
 
516
		return -1;
-
 
517
	edid = drm_get_edid(connector, &radeon_connector->ddc_bus->adapter);
-
 
518
	/* Log EDID retrieval status here. In particular with regard to
-
 
519
	 * connectors with requires_extended_probe flag set, that will prevent
-
 
520
	 * function radeon_dvi_detect() to fetch EDID on this connector,
-
 
521
	 * as long as there is no valid EDID header found */
-
 
522
	if (edid) {
-
 
523
		DRM_INFO("Radeon display connector %s: Found valid EDID",
-
 
524
				drm_get_connector_name(connector));
-
 
525
		kfree(edid);
-
 
526
	} else {
-
 
527
		DRM_INFO("Radeon display connector %s: No monitor connected or invalid EDID",
-
 
528
				drm_get_connector_name(connector));
-
 
529
	}
-
 
530
	return ret;
-
 
531
}
-
 
532
 
488
 
533
/* avivo */
489
/* avivo */
534
static void avivo_get_fb_div(struct radeon_pll *pll,
490
static void avivo_get_fb_div(struct radeon_pll *pll,
535
			     u32 target_clock,
491
			     u32 target_clock,
536
			     u32 post_div,
492
			     u32 post_div,
Line 865... Line 821...
865
static const struct drm_framebuffer_funcs radeon_fb_funcs = {
821
static const struct drm_framebuffer_funcs radeon_fb_funcs = {
866
	.destroy = radeon_user_framebuffer_destroy,
822
	.destroy = radeon_user_framebuffer_destroy,
867
    .create_handle = radeon_user_framebuffer_create_handle,
823
    .create_handle = radeon_user_framebuffer_create_handle,
868
};
824
};
Line 869... Line 825...
869
 
825
 
870
void
826
int
871
radeon_framebuffer_init(struct drm_device *dev,
827
radeon_framebuffer_init(struct drm_device *dev,
872
			struct radeon_framebuffer *rfb,
828
			struct radeon_framebuffer *rfb,
873
			  struct drm_mode_fb_cmd *mode_cmd,
829
			struct drm_mode_fb_cmd2 *mode_cmd,
874
			  struct drm_gem_object *obj)
830
			  struct drm_gem_object *obj)
-
 
831
{
-
 
832
	int ret;
-
 
833
 
-
 
834
    ENTER();
875
{
835
 
876
	rfb->obj = obj;
836
	rfb->obj = obj;
-
 
837
	ret = drm_framebuffer_init(dev, &rfb->base, &radeon_fb_funcs);
-
 
838
	if (ret) {
-
 
839
		rfb->obj = NULL;
-
 
840
		return ret;
877
	drm_framebuffer_init(dev, &rfb->base, &radeon_fb_funcs);
841
	}
-
 
842
	drm_helper_mode_fill_fb_struct(&rfb->base, mode_cmd);
-
 
843
    LEAVE();
878
	drm_helper_mode_fill_fb_struct(&rfb->base, mode_cmd);
844
	return 0;
Line 879... Line 845...
879
}
845
}
880
 
846
 
881
 
847
 
882
 
848
 
Line 883... Line -...
883
static const struct drm_mode_config_funcs radeon_mode_funcs = {
-
 
884
//	.fb_create = radeon_user_framebuffer_create,
-
 
885
//   .output_poll_changed = radeon_output_poll_changed
-
 
886
};
-
 
887
 
-
 
888
struct drm_prop_enum_list {
849
static const struct drm_mode_config_funcs radeon_mode_funcs = {
889
	int type;
850
//	.fb_create = radeon_user_framebuffer_create,
890
	char *name;
851
//   .output_poll_changed = radeon_output_poll_changed
891
};
852
};
Line 912... Line 873...
912
	{ UNDERSCAN_AUTO, "auto" },
873
	{ UNDERSCAN_AUTO, "auto" },
913
};
874
};
Line 914... Line 875...
914
 
875
 
915
static int radeon_modeset_create_props(struct radeon_device *rdev)
876
static int radeon_modeset_create_props(struct radeon_device *rdev)
916
{
877
{
Line 917... Line 878...
917
	int i, sz;
878
	int sz;
918
 
879
 
919
	if (rdev->is_atom_bios) {
880
	if (rdev->is_atom_bios) {
920
		rdev->mode_info.coherent_mode_property =
-
 
921
			drm_property_create(rdev->ddev,
-
 
922
					    DRM_MODE_PROP_RANGE,
881
		rdev->mode_info.coherent_mode_property =
923
					    "coherent", 2);
882
			drm_property_create_range(rdev->ddev, 0 , "coherent", 0, 1);
924
		if (!rdev->mode_info.coherent_mode_property)
-
 
925
			return -ENOMEM;
-
 
926
 
-
 
927
		rdev->mode_info.coherent_mode_property->values[0] = 0;
883
		if (!rdev->mode_info.coherent_mode_property)
Line 928... Line 884...
928
		rdev->mode_info.coherent_mode_property->values[1] = 1;
884
			return -ENOMEM;
929
	}
885
	}
930
 
886
 
931
	if (!ASIC_IS_AVIVO(rdev)) {
887
	if (!ASIC_IS_AVIVO(rdev)) {
932
		sz = ARRAY_SIZE(radeon_tmds_pll_enum_list);
-
 
933
		rdev->mode_info.tmds_pll_property =
888
		sz = ARRAY_SIZE(radeon_tmds_pll_enum_list);
934
			drm_property_create(rdev->ddev,
-
 
935
					    DRM_MODE_PROP_ENUM,
-
 
936
					    "tmds_pll", sz);
-
 
937
		for (i = 0; i < sz; i++) {
-
 
938
			drm_property_add_enum(rdev->mode_info.tmds_pll_property,
889
		rdev->mode_info.tmds_pll_property =
939
					      i,
-
 
940
					      radeon_tmds_pll_enum_list[i].type,
890
			drm_property_create_enum(rdev->ddev, 0,
Line 941... Line 891...
941
					      radeon_tmds_pll_enum_list[i].name);
891
					    "tmds_pll",
942
		}
892
					    radeon_tmds_pll_enum_list, sz);
943
	}
-
 
944
 
-
 
945
	rdev->mode_info.load_detect_property =
893
	}
946
		drm_property_create(rdev->ddev,
894
 
947
				    DRM_MODE_PROP_RANGE,
-
 
948
				    "load detection", 2);
-
 
Line 949... Line 895...
949
	if (!rdev->mode_info.load_detect_property)
895
	rdev->mode_info.load_detect_property =
Line 950... Line 896...
950
		return -ENOMEM;
896
		drm_property_create_range(rdev->ddev, 0, "load detection", 0, 1);
951
	rdev->mode_info.load_detect_property->values[0] = 0;
897
	if (!rdev->mode_info.load_detect_property)
952
	rdev->mode_info.load_detect_property->values[1] = 1;
898
		return -ENOMEM;
953
 
-
 
954
	drm_mode_create_scaling_mode_property(rdev->ddev);
899
 
955
 
-
 
956
	sz = ARRAY_SIZE(radeon_tv_std_enum_list);
-
 
957
	rdev->mode_info.tv_std_property =
-
 
958
		drm_property_create(rdev->ddev,
-
 
959
				    DRM_MODE_PROP_ENUM,
900
	drm_mode_create_scaling_mode_property(rdev->ddev);
960
				    "tv standard", sz);
-
 
Line 961... Line 901...
961
	for (i = 0; i < sz; i++) {
901
 
962
		drm_property_add_enum(rdev->mode_info.tv_std_property,
902
	sz = ARRAY_SIZE(radeon_tv_std_enum_list);
963
				      i,
903
	rdev->mode_info.tv_std_property =
964
				      radeon_tv_std_enum_list[i].type,
-
 
965
				      radeon_tv_std_enum_list[i].name);
904
		drm_property_create_enum(rdev->ddev, 0,
966
	}
-
 
967
 
-
 
968
	sz = ARRAY_SIZE(radeon_underscan_enum_list);
-
 
969
	rdev->mode_info.underscan_property =
-
 
970
		drm_property_create(rdev->ddev,
905
				    "tv standard",
971
				    DRM_MODE_PROP_ENUM,
-
 
Line 972... Line 906...
972
				    "underscan", sz);
906
				    radeon_tv_std_enum_list, sz);
973
	for (i = 0; i < sz; i++) {
907
 
974
		drm_property_add_enum(rdev->mode_info.underscan_property,
-
 
975
				      i,
908
	sz = ARRAY_SIZE(radeon_underscan_enum_list);
976
				      radeon_underscan_enum_list[i].type,
909
	rdev->mode_info.underscan_property =
977
				      radeon_underscan_enum_list[i].name);
910
		drm_property_create_enum(rdev->ddev, 0,
978
	}
-
 
979
 
-
 
Line 980... Line 911...
980
	rdev->mode_info.underscan_hborder_property =
911
				    "underscan",
981
		drm_property_create(rdev->ddev,
912
				    radeon_underscan_enum_list, sz);
982
					DRM_MODE_PROP_RANGE,
-
 
983
					"underscan hborder", 2);
913
 
984
	if (!rdev->mode_info.underscan_hborder_property)
914
	rdev->mode_info.underscan_hborder_property =
985
		return -ENOMEM;
915
		drm_property_create_range(rdev->ddev, 0,
986
	rdev->mode_info.underscan_hborder_property->values[0] = 0;
-
 
987
	rdev->mode_info.underscan_hborder_property->values[1] = 128;
-
 
Line 988... Line 916...
988
 
916
					"underscan hborder", 0, 128);
989
	rdev->mode_info.underscan_vborder_property =
917
	if (!rdev->mode_info.underscan_hborder_property)
Line 990... Line 918...
990
		drm_property_create(rdev->ddev,
918
		return -ENOMEM;
Line 1016... Line 944...
1016
	} else
944
	} else
1017
		rdev->disp_priority = radeon_disp_priority;
945
		rdev->disp_priority = radeon_disp_priority;
Line 1018... Line 946...
1018
 
946
 
Line -... Line 947...
-
 
947
}
-
 
948
 
-
 
949
/*
-
 
950
 * Allocate hdmi structs and determine register offsets
-
 
951
 */
-
 
952
static void radeon_afmt_init(struct radeon_device *rdev)
-
 
953
{
-
 
954
	int i;
-
 
955
 
-
 
956
	for (i = 0; i < RADEON_MAX_AFMT_BLOCKS; i++)
-
 
957
		rdev->mode_info.afmt[i] = NULL;
-
 
958
 
-
 
959
	if (ASIC_IS_DCE6(rdev)) {
-
 
960
		/* todo */
-
 
961
	} else if (ASIC_IS_DCE4(rdev)) {
-
 
962
		/* DCE4/5 has 6 audio blocks tied to DIG encoders */
-
 
963
		/* DCE4.1 has 2 audio blocks tied to DIG encoders */
-
 
964
		rdev->mode_info.afmt[0] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);
-
 
965
		if (rdev->mode_info.afmt[0]) {
-
 
966
			rdev->mode_info.afmt[0]->offset = EVERGREEN_CRTC0_REGISTER_OFFSET;
-
 
967
			rdev->mode_info.afmt[0]->id = 0;
-
 
968
		}
-
 
969
		rdev->mode_info.afmt[1] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);
-
 
970
		if (rdev->mode_info.afmt[1]) {
-
 
971
			rdev->mode_info.afmt[1]->offset = EVERGREEN_CRTC1_REGISTER_OFFSET;
-
 
972
			rdev->mode_info.afmt[1]->id = 1;
-
 
973
		}
-
 
974
		if (!ASIC_IS_DCE41(rdev)) {
-
 
975
			rdev->mode_info.afmt[2] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);
-
 
976
			if (rdev->mode_info.afmt[2]) {
-
 
977
				rdev->mode_info.afmt[2]->offset = EVERGREEN_CRTC2_REGISTER_OFFSET;
-
 
978
				rdev->mode_info.afmt[2]->id = 2;
-
 
979
			}
-
 
980
			rdev->mode_info.afmt[3] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);
-
 
981
			if (rdev->mode_info.afmt[3]) {
-
 
982
				rdev->mode_info.afmt[3]->offset = EVERGREEN_CRTC3_REGISTER_OFFSET;
-
 
983
				rdev->mode_info.afmt[3]->id = 3;
-
 
984
			}
-
 
985
			rdev->mode_info.afmt[4] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);
-
 
986
			if (rdev->mode_info.afmt[4]) {
-
 
987
				rdev->mode_info.afmt[4]->offset = EVERGREEN_CRTC4_REGISTER_OFFSET;
-
 
988
				rdev->mode_info.afmt[4]->id = 4;
-
 
989
			}
-
 
990
			rdev->mode_info.afmt[5] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);
-
 
991
			if (rdev->mode_info.afmt[5]) {
-
 
992
				rdev->mode_info.afmt[5]->offset = EVERGREEN_CRTC5_REGISTER_OFFSET;
-
 
993
				rdev->mode_info.afmt[5]->id = 5;
-
 
994
			}
-
 
995
		}
-
 
996
	} else if (ASIC_IS_DCE3(rdev)) {
-
 
997
		/* DCE3.x has 2 audio blocks tied to DIG encoders */
-
 
998
		rdev->mode_info.afmt[0] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);
-
 
999
		if (rdev->mode_info.afmt[0]) {
-
 
1000
			rdev->mode_info.afmt[0]->offset = DCE3_HDMI_OFFSET0;
-
 
1001
			rdev->mode_info.afmt[0]->id = 0;
-
 
1002
		}
-
 
1003
		rdev->mode_info.afmt[1] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);
-
 
1004
		if (rdev->mode_info.afmt[1]) {
-
 
1005
			rdev->mode_info.afmt[1]->offset = DCE3_HDMI_OFFSET1;
-
 
1006
			rdev->mode_info.afmt[1]->id = 1;
-
 
1007
		}
-
 
1008
	} else if (ASIC_IS_DCE2(rdev)) {
-
 
1009
		/* DCE2 has at least 1 routable audio block */
-
 
1010
		rdev->mode_info.afmt[0] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);
-
 
1011
		if (rdev->mode_info.afmt[0]) {
-
 
1012
			rdev->mode_info.afmt[0]->offset = DCE2_HDMI_OFFSET0;
-
 
1013
			rdev->mode_info.afmt[0]->id = 0;
-
 
1014
		}
-
 
1015
		/* r6xx has 2 routable audio blocks */
-
 
1016
		if (rdev->family >= CHIP_R600) {
-
 
1017
			rdev->mode_info.afmt[1] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);
-
 
1018
			if (rdev->mode_info.afmt[1]) {
-
 
1019
				rdev->mode_info.afmt[1]->offset = DCE2_HDMI_OFFSET1;
-
 
1020
				rdev->mode_info.afmt[1]->id = 1;
-
 
1021
			}
-
 
1022
		}
-
 
1023
	}
-
 
1024
}
-
 
1025
 
-
 
1026
static void radeon_afmt_fini(struct radeon_device *rdev)
-
 
1027
{
-
 
1028
	int i;
-
 
1029
 
-
 
1030
	for (i = 0; i < RADEON_MAX_AFMT_BLOCKS; i++) {
-
 
1031
		kfree(rdev->mode_info.afmt[i]);
-
 
1032
		rdev->mode_info.afmt[i] = NULL;
-
 
1033
	}
1019
}
1034
}
1020
 
1035
 
1021
int radeon_modeset_init(struct radeon_device *rdev)
1036
int radeon_modeset_init(struct radeon_device *rdev)
1022
{
1037
{
Line 1023... Line 1038...
1023
	int i;
1038
	int i;
1024
	int ret;
1039
	int ret;
Line 1025... Line 1040...
1025
 
1040
 
Line 1026... Line 1041...
1026
	drm_mode_config_init(rdev->ddev);
1041
	drm_mode_config_init(rdev->ddev);
1027
	rdev->mode_info.mode_config_initialized = true;
1042
	rdev->mode_info.mode_config_initialized = true;
1028
 
1043
 
1029
    rdev->ddev->mode_config.funcs = (void *)&radeon_mode_funcs;
1044
	rdev->ddev->mode_config.funcs = &radeon_mode_funcs;
Line 1037... Line 1052...
1037
	} else {
1052
	} else {
1038
		rdev->ddev->mode_config.max_width = 4096;
1053
		rdev->ddev->mode_config.max_width = 4096;
1039
		rdev->ddev->mode_config.max_height = 4096;
1054
		rdev->ddev->mode_config.max_height = 4096;
1040
	}
1055
	}
Line -... Line 1056...
-
 
1056
 
-
 
1057
	rdev->ddev->mode_config.preferred_depth = 24;
-
 
1058
	rdev->ddev->mode_config.prefer_shadow = 1;
1041
 
1059
 
Line 1042... Line 1060...
1042
	rdev->ddev->mode_config.fb_base = rdev->mc.aper_base;
1060
	rdev->ddev->mode_config.fb_base = rdev->mc.aper_base;
1043
 
1061
 
1044
	ret = radeon_modeset_create_props(rdev);
1062
	ret = radeon_modeset_create_props(rdev);
Line 1064... Line 1082...
1064
	ret = radeon_setup_enc_conn(rdev->ddev);
1082
	ret = radeon_setup_enc_conn(rdev->ddev);
1065
	if (!ret) {
1083
	if (!ret) {
1066
		return ret;
1084
		return ret;
1067
	}
1085
	}
Line 1068... Line 1086...
1068
 
1086
 
1069
	/* init dig PHYs */
1087
	/* init dig PHYs, disp eng pll */
1070
	if (rdev->is_atom_bios)
1088
	if (rdev->is_atom_bios) {
-
 
1089
		radeon_atom_encoder_init(rdev);
-
 
1090
		radeon_atom_disp_eng_pll_init(rdev);
Line 1071... Line 1091...
1071
		radeon_atom_encoder_init(rdev);
1091
	}
1072
 
1092
 
Line -... Line 1093...
-
 
1093
	/* initialize hpd */
-
 
1094
//   radeon_hpd_init(rdev);
-
 
1095
 
1073
	/* initialize hpd */
1096
	/* setup afmt */
1074
//   radeon_hpd_init(rdev);
1097
//	radeon_afmt_init(rdev);
Line 1075... Line 1098...
1075
 
1098
 
1076
	/* Initialize power management */
1099
	/* Initialize power management */
Line 1085... Line 1108...
1085
void radeon_modeset_fini(struct radeon_device *rdev)
1108
void radeon_modeset_fini(struct radeon_device *rdev)
1086
{
1109
{
1087
	kfree(rdev->mode_info.bios_hardcoded_edid);
1110
	kfree(rdev->mode_info.bios_hardcoded_edid);
Line 1088... Line 1111...
1088
 
1111
 
-
 
1112
	if (rdev->mode_info.mode_config_initialized) {
1089
	if (rdev->mode_info.mode_config_initialized) {
1113
//		radeon_afmt_fini(rdev);
1090
//       drm_kms_helper_poll_fini(rdev->ddev);
1114
//       drm_kms_helper_poll_fini(rdev->ddev);
1091
//       radeon_hpd_fini(rdev);
1115
//       radeon_hpd_fini(rdev);
1092
		drm_mode_config_cleanup(rdev->ddev);
1116
		drm_mode_config_cleanup(rdev->ddev);
1093
		rdev->mode_info.mode_config_initialized = false;
1117
		rdev->mode_info.mode_config_initialized = false;
1094
	}
1118
	}
1095
	/* free i2c buses */
1119
	/* free i2c buses */
1096
	radeon_i2c_fini(rdev);
1120
	radeon_i2c_fini(rdev);
Line 1097... Line 1121...
1097
}
1121
}
1098
 
1122
 
1099
static bool is_hdtv_mode(struct drm_display_mode *mode)
1123
static bool is_hdtv_mode(const struct drm_display_mode *mode)
1100
{
1124
{
1101
	/* try and guess if this is a tv or a monitor */
1125
	/* try and guess if this is a tv or a monitor */
1102
	if ((mode->vdisplay == 480 && mode->hdisplay == 720) || /* 480p */
1126
	if ((mode->vdisplay == 480 && mode->hdisplay == 720) || /* 480p */
Line 1107... Line 1131...
1107
	else
1131
	else
1108
		return false;
1132
		return false;
1109
}
1133
}
Line 1110... Line 1134...
1110
 
1134
 
1111
bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
1135
bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
1112
				struct drm_display_mode *mode,
1136
				const struct drm_display_mode *mode,
1113
				struct drm_display_mode *adjusted_mode)
1137
				struct drm_display_mode *adjusted_mode)
1114
{
1138
{
1115
	struct drm_device *dev = crtc->dev;
1139
	struct drm_device *dev = crtc->dev;
1116
	struct radeon_device *rdev = dev->dev_private;
1140
	struct radeon_device *rdev = dev->dev_private;
Line 1124... Line 1148...
1124
	u32 src_h = 1, dst_h = 1;
1148
	u32 src_h = 1, dst_h = 1;
Line 1125... Line 1149...
1125
 
1149
 
1126
	radeon_crtc->h_border = 0;
1150
	radeon_crtc->h_border = 0;
Line -... Line 1151...
-
 
1151
	radeon_crtc->v_border = 0;
-
 
1152
 
1127
	radeon_crtc->v_border = 0;
1153
    ENTER();
1128
 
1154
 
1129
	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
1155
	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
1130
		if (encoder->crtc != crtc)
1156
		if (encoder->crtc != crtc)
1131
			continue;
1157
			continue;
1132
		radeon_encoder = to_radeon_encoder(encoder);
1158
		radeon_encoder = to_radeon_encoder(encoder);
Line -... Line 1159...
-
 
1159
		connector = radeon_get_connector_for_encoder(encoder);
-
 
1160
		radeon_connector = to_radeon_connector(connector);
-
 
1161
 
-
 
1162
        dbgprintf("native_hdisplay %d vdisplay %d\n",
1133
		connector = radeon_get_connector_for_encoder(encoder);
1163
                   radeon_encoder->native_mode.hdisplay,
1134
		radeon_connector = to_radeon_connector(connector);
1164
                   radeon_encoder->native_mode.vdisplay);
1135
 
1165
 
1136
		if (first) {
1166
		if (first) {
1137
			/* set scaling */
1167
			/* set scaling */
Line 1196... Line 1226...
1196
		radeon_crtc->hsc.full = dfixed_div(a, b);
1226
		radeon_crtc->hsc.full = dfixed_div(a, b);
1197
	} else {
1227
	} else {
1198
		radeon_crtc->vsc.full = dfixed_const(1);
1228
		radeon_crtc->vsc.full = dfixed_const(1);
1199
		radeon_crtc->hsc.full = dfixed_const(1);
1229
		radeon_crtc->hsc.full = dfixed_const(1);
1200
	}
1230
	}
-
 
1231
 
-
 
1232
    LEAVE();
-
 
1233
 
1201
	return true;
1234
	return true;
1202
}
1235
}
Line 1203... Line 1236...
1203
 
1236
 
1204
/*
1237
/*