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Rev 5179 | Rev 5271 | ||
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Line 80... | Line 80... | ||
80 | 80 | ||
81 | void parse_cmdline(char *cmdline, videomode_t *mode, char *log, int *kms); |
81 | void parse_cmdline(char *cmdline, videomode_t *mode, char *log, int *kms); |
82 | int init_display(struct radeon_device *rdev, videomode_t *mode); |
82 | int init_display(struct radeon_device *rdev, videomode_t *mode); |
Line 83... | Line 83... | ||
83 | int init_display_kms(struct drm_device *dev, videomode_t *usermode); |
83 | int init_display_kms(struct drm_device *dev, videomode_t *usermode); |
84 | 84 | ||
85 | int get_modes(videomode_t *mode, u32_t *count); |
85 | int get_modes(videomode_t *mode, u32 *count); |
Line 86... | Line 86... | ||
86 | int set_user_mode(videomode_t *mode); |
86 | int set_user_mode(videomode_t *mode); |
Line 435... | Line 435... | ||
435 | { |
435 | { |
436 | if (doorbell < rdev->doorbell.num_doorbells) |
436 | if (doorbell < rdev->doorbell.num_doorbells) |
437 | __clear_bit(doorbell, rdev->doorbell.used); |
437 | __clear_bit(doorbell, rdev->doorbell.used); |
438 | } |
438 | } |
Line -... | Line 439... | ||
- | 439 | ||
- | 440 | /** |
|
- | 441 | * radeon_doorbell_get_kfd_info - Report doorbell configuration required to |
|
- | 442 | * setup KFD |
|
- | 443 | * |
|
- | 444 | * @rdev: radeon_device pointer |
|
- | 445 | * @aperture_base: output returning doorbell aperture base physical address |
|
- | 446 | * @aperture_size: output returning doorbell aperture size in bytes |
|
- | 447 | * @start_offset: output returning # of doorbell bytes reserved for radeon. |
|
- | 448 | * |
|
- | 449 | * Radeon and the KFD share the doorbell aperture. Radeon sets it up, |
|
- | 450 | * takes doorbells required for its own rings and reports the setup to KFD. |
|
- | 451 | * Radeon reserved doorbells are at the start of the doorbell aperture. |
|
- | 452 | */ |
|
- | 453 | void radeon_doorbell_get_kfd_info(struct radeon_device *rdev, |
|
- | 454 | phys_addr_t *aperture_base, |
|
- | 455 | size_t *aperture_size, |
|
- | 456 | size_t *start_offset) |
|
- | 457 | { |
|
- | 458 | /* The first num_doorbells are used by radeon. |
|
- | 459 | * KFD takes whatever's left in the aperture. */ |
|
- | 460 | if (rdev->doorbell.size > rdev->doorbell.num_doorbells * sizeof(u32)) { |
|
- | 461 | *aperture_base = rdev->doorbell.base; |
|
- | 462 | *aperture_size = rdev->doorbell.size; |
|
- | 463 | *start_offset = rdev->doorbell.num_doorbells * sizeof(u32); |
|
- | 464 | } else { |
|
- | 465 | *aperture_base = 0; |
|
- | 466 | *aperture_size = 0; |
|
- | 467 | *start_offset = 0; |
|
- | 468 | } |
|
- | 469 | } |
|
439 | 470 | ||
440 | /* |
471 | /* |
441 | * radeon_wb_*() |
472 | * radeon_wb_*() |
442 | * Writeback is the the method by which the the GPU updates special pages |
473 | * Writeback is the the method by which the the GPU updates special pages |
443 | * in memory with the status of certain GPU events (fences, ring pointers, |
474 | * in memory with the status of certain GPU events (fences, ring pointers, |
Line 492... | Line 523... | ||
492 | { |
523 | { |
493 | int r; |
524 | int r; |
Line 494... | Line 525... | ||
494 | 525 | ||
495 | if (rdev->wb.wb_obj == NULL) { |
526 | if (rdev->wb.wb_obj == NULL) { |
496 | r = radeon_bo_create(rdev, RADEON_GPU_PAGE_SIZE, PAGE_SIZE, true, |
527 | r = radeon_bo_create(rdev, RADEON_GPU_PAGE_SIZE, PAGE_SIZE, true, |
497 | RADEON_GEM_DOMAIN_GTT, 0, NULL, |
528 | RADEON_GEM_DOMAIN_GTT, 0, NULL, NULL, |
498 | &rdev->wb.wb_obj); |
529 | &rdev->wb.wb_obj); |
499 | if (r) { |
530 | if (r) { |
500 | dev_warn(rdev->dev, "(%d) create WB bo failed\n", r); |
531 | dev_warn(rdev->dev, "(%d) create WB bo failed\n", r); |
501 | return r; |
532 | return r; |
Line 996... | Line 1027... | ||
996 | radeon_atombios_fini(rdev); |
1027 | radeon_atombios_fini(rdev); |
997 | return -ENOMEM; |
1028 | return -ENOMEM; |
998 | } |
1029 | } |
Line 999... | Line 1030... | ||
999 | 1030 | ||
- | 1031 | mutex_init(&rdev->mode_info.atom_context->mutex); |
|
1000 | mutex_init(&rdev->mode_info.atom_context->mutex); |
1032 | mutex_init(&rdev->mode_info.atom_context->scratch_mutex); |
1001 | radeon_atom_initialize_bios_scratch_regs(rdev->ddev); |
1033 | radeon_atom_initialize_bios_scratch_regs(rdev->ddev); |
1002 | atom_allocate_fb_scratch(rdev->mode_info.atom_context); |
1034 | atom_allocate_fb_scratch(rdev->mode_info.atom_context); |
1003 | return 0; |
1035 | return 0; |
Line 1232... | Line 1264... | ||
1232 | rdev->accel_working = false; |
1264 | rdev->accel_working = false; |
1233 | /* set up ring ids */ |
1265 | /* set up ring ids */ |
1234 | for (i = 0; i < RADEON_NUM_RINGS; i++) { |
1266 | for (i = 0; i < RADEON_NUM_RINGS; i++) { |
1235 | rdev->ring[i].idx = i; |
1267 | rdev->ring[i].idx = i; |
1236 | } |
1268 | } |
- | 1269 | rdev->fence_context = fence_context_alloc(RADEON_NUM_RINGS); |
|
Line 1237... | Line 1270... | ||
1237 | 1270 | ||
1238 | DRM_INFO("initializing kernel modesetting (%s 0x%04X:0x%04X 0x%04X:0x%04X).\n", |
1271 | DRM_INFO("initializing kernel modesetting (%s 0x%04X:0x%04X 0x%04X:0x%04X).\n", |
1239 | radeon_family_name[rdev->family], pdev->vendor, pdev->device, |
1272 | radeon_family_name[rdev->family], pdev->vendor, pdev->device, |
Line 1246... | Line 1279... | ||
1246 | atomic_set(&rdev->ih.lock, 0); |
1279 | atomic_set(&rdev->ih.lock, 0); |
1247 | mutex_init(&rdev->gem.mutex); |
1280 | mutex_init(&rdev->gem.mutex); |
1248 | mutex_init(&rdev->pm.mutex); |
1281 | mutex_init(&rdev->pm.mutex); |
1249 | mutex_init(&rdev->gpu_clock_mutex); |
1282 | mutex_init(&rdev->gpu_clock_mutex); |
1250 | mutex_init(&rdev->srbm_mutex); |
1283 | mutex_init(&rdev->srbm_mutex); |
- | 1284 | mutex_init(&rdev->grbm_idx_mutex); |
|
- | 1285 | ||
1251 | // init_rwsem(&rdev->pm.mclk_lock); |
1286 | // init_rwsem(&rdev->pm.mclk_lock); |
1252 | // init_rwsem(&rdev->exclusive_lock); |
1287 | // init_rwsem(&rdev->exclusive_lock); |
1253 | init_waitqueue_head(&rdev->irq.vblank_queue); |
1288 | init_waitqueue_head(&rdev->irq.vblank_queue); |
- | 1289 | mutex_init(&rdev->mn_lock); |
|
- | 1290 | // hash_init(rdev->mn_hash); |
|
1254 | r = radeon_gem_init(rdev); |
1291 | r = radeon_gem_init(rdev); |
1255 | if (r) |
1292 | if (r) |
1256 | return r; |
1293 | return r; |
Line 1257... | Line 1294... | ||
1257 | 1294 | ||
Line 1360... | Line 1397... | ||
1360 | 1397 | ||
1361 | r = radeon_init(rdev); |
1398 | r = radeon_init(rdev); |
1362 | if (r) |
1399 | if (r) |
Line 1363... | Line -... | ||
1363 | return r; |
- | |
1364 | - | ||
1365 | r = radeon_ib_ring_tests(rdev); |
- | |
Line 1366... | Line 1400... | ||
1366 | if (r) |
1400 | return r; |
1367 | DRM_ERROR("ib ring test failed (%d).\n", r); |
1401 | |
1368 | 1402 | ||
Line 1377... | Line 1411... | ||
1377 | r = radeon_init(rdev); |
1411 | r = radeon_init(rdev); |
1378 | if (r) |
1412 | if (r) |
1379 | return r; |
1413 | return r; |
1380 | } |
1414 | } |
Line -... | Line 1415... | ||
- | 1415 | ||
- | 1416 | // r = radeon_ib_ring_tests(rdev); |
|
- | 1417 | // if (r) |
|
- | 1418 | // DRM_ERROR("ib ring test failed (%d).\n", r); |
|
1381 | 1419 | ||
1382 | if ((radeon_testing & 1)) { |
1420 | if ((radeon_testing & 1)) { |
1383 | if (rdev->accel_working) |
1421 | if (rdev->accel_working) |
1384 | radeon_test_moves(rdev); |
1422 | radeon_test_moves(rdev); |
1385 | else |
1423 | else |
Line 1434... | Line 1472... | ||
1434 | dev_info(rdev->dev, "Saved %d dwords of commands " |
1472 | dev_info(rdev->dev, "Saved %d dwords of commands " |
1435 | "on ring %d.\n", ring_sizes[i], i); |
1473 | "on ring %d.\n", ring_sizes[i], i); |
1436 | } |
1474 | } |
1437 | } |
1475 | } |
Line 1438... | Line -... | ||
1438 | - | ||
1439 | retry: |
1476 | |
1440 | r = radeon_asic_reset(rdev); |
1477 | r = radeon_asic_reset(rdev); |
1441 | if (!r) { |
1478 | if (!r) { |
1442 | dev_info(rdev->dev, "GPU reset succeeded, trying to resume\n"); |
1479 | dev_info(rdev->dev, "GPU reset succeeded, trying to resume\n"); |
1443 | radeon_resume(rdev); |
1480 | radeon_resume(rdev); |
Line 1444... | Line 1481... | ||
1444 | } |
1481 | } |
Line 1445... | Line -... | ||
1445 | - | ||
1446 | radeon_restore_bios_scratch_regs(rdev); |
1482 | |
- | 1483 | radeon_restore_bios_scratch_regs(rdev); |
|
1447 | 1484 | ||
1448 | if (!r) { |
1485 | for (i = 0; i < RADEON_NUM_RINGS; ++i) { |
1449 | for (i = 0; i < RADEON_NUM_RINGS; ++i) { |
- | |
1450 | radeon_ring_restore(rdev, &rdev->ring[i], |
- | |
1451 | ring_sizes[i], ring_data[i]); |
- | |
1452 | ring_sizes[i] = 0; |
- | |
1453 | ring_data[i] = NULL; |
- | |
1454 | } |
- | |
1455 | - | ||
1456 | // r = radeon_ib_ring_tests(rdev); |
- | |
1457 | // if (r) { |
- | |
1458 | // dev_err(rdev->dev, "ib ring test failed (%d).\n", r); |
- | |
1459 | // if (saved) { |
- | |
1460 | // saved = false; |
- | |
1461 | // radeon_suspend(rdev); |
- | |
1462 | // goto retry; |
1486 | if (!r && ring_data[i]) { |
1463 | // } |
1487 | radeon_ring_restore(rdev, &rdev->ring[i], |
1464 | // } |
1488 | ring_sizes[i], ring_data[i]); |
1465 | } else { |
1489 | } else { |
1466 | for (i = 0; i < RADEON_NUM_RINGS; ++i) { |
1490 | radeon_fence_driver_force_completion(rdev, i); |
Line 1467... | Line 1491... | ||
1467 | kfree(ring_data[i]); |
1491 | kfree(ring_data[i]); |