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| Rev 1268 | Rev 1321 | ||
|---|---|---|---|
| Line 48... | Line 48... | ||
| 48 | radeon_add_legacy_connector(struct drm_device *dev, |
48 | radeon_add_legacy_connector(struct drm_device *dev, |
| 49 | uint32_t connector_id, |
49 | uint32_t connector_id, |
| 50 | uint32_t supported_device, |
50 | uint32_t supported_device, |
| 51 | int connector_type, |
51 | int connector_type, |
| 52 | struct radeon_i2c_bus_rec *i2c_bus, |
52 | struct radeon_i2c_bus_rec *i2c_bus, |
| 53 | uint16_t connector_object_id); |
53 | uint16_t connector_object_id, |
| - | 54 | struct radeon_hpd *hpd); |
|
| Line 54... | Line 55... | ||
| 54 | 55 | ||
| 55 | /* from radeon_legacy_encoder.c */ |
56 | /* from radeon_legacy_encoder.c */ |
| 56 | extern void |
57 | extern void |
| 57 | radeon_add_legacy_encoder(struct drm_device *dev, uint32_t encoder_id, |
58 | radeon_add_legacy_encoder(struct drm_device *dev, uint32_t encoder_id, |
| Line 440... | Line 441... | ||
| 440 | 441 | ||
| Line 441... | Line 442... | ||
| 441 | return offset; |
442 | return offset; |
| Line 442... | Line 443... | ||
| 442 | 443 | ||
| - | 444 | } |
|
| 443 | } |
445 | |
| 444 | 446 | static struct radeon_i2c_bus_rec combios_setup_i2c_bus(struct radeon_device *rdev, |
|
| Line -... | Line 447... | ||
| - | 447 | int ddc_line) |
|
| - | 448 | { |
|
| - | 449 | struct radeon_i2c_bus_rec i2c; |
|
| - | 450 | ||
| - | 451 | if (ddc_line == RADEON_GPIOPAD_MASK) { |
|
| - | 452 | i2c.mask_clk_reg = RADEON_GPIOPAD_MASK; |
|
| - | 453 | i2c.mask_data_reg = RADEON_GPIOPAD_MASK; |
|
| - | 454 | i2c.a_clk_reg = RADEON_GPIOPAD_A; |
|
| - | 455 | i2c.a_data_reg = RADEON_GPIOPAD_A; |
|
| - | 456 | i2c.en_clk_reg = RADEON_GPIOPAD_EN; |
|
| - | 457 | i2c.en_data_reg = RADEON_GPIOPAD_EN; |
|
| - | 458 | i2c.y_clk_reg = RADEON_GPIOPAD_Y; |
|
| - | 459 | i2c.y_data_reg = RADEON_GPIOPAD_Y; |
|
| - | 460 | } else if (ddc_line == RADEON_MDGPIO_MASK) { |
|
| - | 461 | i2c.mask_clk_reg = RADEON_MDGPIO_MASK; |
|
| - | 462 | i2c.mask_data_reg = RADEON_MDGPIO_MASK; |
|
| - | 463 | i2c.a_clk_reg = RADEON_MDGPIO_A; |
|
| - | 464 | i2c.a_data_reg = RADEON_MDGPIO_A; |
|
| - | 465 | i2c.en_clk_reg = RADEON_MDGPIO_EN; |
|
| 445 | struct radeon_i2c_bus_rec combios_setup_i2c_bus(int ddc_line) |
466 | i2c.en_data_reg = RADEON_MDGPIO_EN; |
| 446 | { |
467 | i2c.y_clk_reg = RADEON_MDGPIO_Y; |
| 447 | struct radeon_i2c_bus_rec i2c; |
468 | i2c.y_data_reg = RADEON_MDGPIO_Y; |
| 448 | 469 | } else { |
|
| 449 | i2c.mask_clk_mask = RADEON_GPIO_EN_1; |
470 | i2c.mask_clk_mask = RADEON_GPIO_EN_1; |
| 450 | i2c.mask_data_mask = RADEON_GPIO_EN_0; |
471 | i2c.mask_data_mask = RADEON_GPIO_EN_0; |
| 451 | i2c.a_clk_mask = RADEON_GPIO_A_1; |
472 | i2c.a_clk_mask = RADEON_GPIO_A_1; |
| 452 | i2c.a_data_mask = RADEON_GPIO_A_0; |
473 | i2c.a_data_mask = RADEON_GPIO_A_0; |
| 453 | i2c.put_clk_mask = RADEON_GPIO_EN_1; |
- | |
| 454 | i2c.put_data_mask = RADEON_GPIO_EN_0; |
- | |
| 455 | i2c.get_clk_mask = RADEON_GPIO_Y_1; |
- | |
| 456 | i2c.get_data_mask = RADEON_GPIO_Y_0; |
- | |
| 457 | if ((ddc_line == RADEON_LCD_GPIO_MASK) || |
- | |
| 458 | (ddc_line == RADEON_MDGPIO_EN_REG)) { |
- | |
| 459 | i2c.mask_clk_reg = ddc_line; |
- | |
| 460 | i2c.mask_data_reg = ddc_line; |
- | |
| 461 | i2c.a_clk_reg = ddc_line; |
- | |
| 462 | i2c.a_data_reg = ddc_line; |
- | |
| 463 | i2c.put_clk_reg = ddc_line; |
474 | i2c.en_clk_mask = RADEON_GPIO_EN_1; |
| 464 | i2c.put_data_reg = ddc_line; |
475 | i2c.en_data_mask = RADEON_GPIO_EN_0; |
| 465 | i2c.get_clk_reg = ddc_line + 4; |
476 | i2c.y_clk_mask = RADEON_GPIO_Y_1; |
| 466 | i2c.get_data_reg = ddc_line + 4; |
477 | i2c.y_data_mask = RADEON_GPIO_Y_0; |
| 467 | } else { |
478 | |
| 468 | i2c.mask_clk_reg = ddc_line; |
479 | i2c.mask_clk_reg = ddc_line; |
| 469 | i2c.mask_data_reg = ddc_line; |
480 | i2c.mask_data_reg = ddc_line; |
| 470 | i2c.a_clk_reg = ddc_line; |
481 | i2c.a_clk_reg = ddc_line; |
| 471 | i2c.a_data_reg = ddc_line; |
482 | i2c.a_data_reg = ddc_line; |
| 472 | i2c.put_clk_reg = ddc_line; |
483 | i2c.en_clk_reg = ddc_line; |
| Line -... | Line 484... | ||
| - | 484 | i2c.en_data_reg = ddc_line; |
|
| - | 485 | i2c.y_clk_reg = ddc_line; |
|
| - | 486 | i2c.y_data_reg = ddc_line; |
|
| - | 487 | } |
|
| - | 488 | ||
| - | 489 | if (rdev->family < CHIP_R200) |
|
| - | 490 | i2c.hw_capable = false; |
|
| - | 491 | else { |
|
| - | 492 | switch (ddc_line) { |
|
| - | 493 | case RADEON_GPIO_VGA_DDC: |
|
| - | 494 | case RADEON_GPIO_DVI_DDC: |
|
| - | 495 | i2c.hw_capable = true; |
|
| - | 496 | break; |
|
| - | 497 | case RADEON_GPIO_MONID: |
|
| - | 498 | /* hw i2c on RADEON_GPIO_MONID doesn't seem to work |
|
| - | 499 | * reliably on some pre-r4xx hardware; not sure why. |
|
| - | 500 | */ |
|
| - | 501 | i2c.hw_capable = false; |
|
| - | 502 | break; |
|
| - | 503 | default: |
|
| - | 504 | i2c.hw_capable = false; |
|
| - | 505 | break; |
|
| 473 | i2c.put_data_reg = ddc_line; |
506 | } |
| 474 | i2c.get_clk_reg = ddc_line; |
507 | } |
| 475 | i2c.get_data_reg = ddc_line; |
508 | i2c.mm_i2c = false; |
| 476 | } |
509 | i2c.i2c_id = 0; |
| Line 493... | Line 526... | ||
| 493 | struct radeon_pll *mpll = &rdev->clock.mpll; |
526 | struct radeon_pll *mpll = &rdev->clock.mpll; |
| 494 | int8_t rev; |
527 | int8_t rev; |
| 495 | uint16_t sclk, mclk; |
528 | uint16_t sclk, mclk; |
| Line 496... | Line 529... | ||
| 496 | 529 | ||
| 497 | if (rdev->bios == NULL) |
530 | if (rdev->bios == NULL) |
| Line 498... | Line 531... | ||
| 498 | return NULL; |
531 | return false; |
| 499 | 532 | ||
| 500 | pll_info = combios_get_table_offset(dev, COMBIOS_PLL_INFO_TABLE); |
533 | pll_info = combios_get_table_offset(dev, COMBIOS_PLL_INFO_TABLE); |
| Line 991... | Line 1024... | ||
| 991 | {{15000, 0xb0155}, {0xffffffff, 0xb01cb}, {0, 0}, {0, 0}}, /* CHIP_RV350 */ |
1024 | {{15000, 0xb0155}, {0xffffffff, 0xb01cb}, {0, 0}, {0, 0}}, /* CHIP_RV350 */ |
| 992 | {{15000, 0xb0155}, {0xffffffff, 0xb01cb}, {0, 0}, {0, 0}}, /* CHIP_RV380 */ |
1025 | {{15000, 0xb0155}, {0xffffffff, 0xb01cb}, {0, 0}, {0, 0}}, /* CHIP_RV380 */ |
| 993 | {{0xffffffff, 0xb01cb}, {0, 0}, {0, 0}, {0, 0}}, /* CHIP_R420 */ |
1026 | {{0xffffffff, 0xb01cb}, {0, 0}, {0, 0}, {0, 0}}, /* CHIP_R420 */ |
| 994 | {{0xffffffff, 0xb01cb}, {0, 0}, {0, 0}, {0, 0}}, /* CHIP_R423 */ |
1027 | {{0xffffffff, 0xb01cb}, {0, 0}, {0, 0}, {0, 0}}, /* CHIP_R423 */ |
| 995 | {{0xffffffff, 0xb01cb}, {0, 0}, {0, 0}, {0, 0}}, /* CHIP_RV410 */ |
1028 | {{0xffffffff, 0xb01cb}, {0, 0}, {0, 0}, {0, 0}}, /* CHIP_RV410 */ |
| 996 | {{15000, 0xb0155}, {0xffffffff, 0xb01cb}, {0, 0}, {0, 0}}, /* CHIP_RS400 */ |
1029 | { {0, 0}, {0, 0}, {0, 0}, {0, 0} }, /* CHIP_RS400 */ |
| 997 | {{15000, 0xb0155}, {0xffffffff, 0xb01cb}, {0, 0}, {0, 0}}, /* CHIP_RS480 */ |
1030 | { {0, 0}, {0, 0}, {0, 0}, {0, 0} }, /* CHIP_RS480 */ |
| 998 | }; |
1031 | }; |
| Line 999... | Line 1032... | ||
| 999 | 1032 | ||
| 1000 | bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder, |
1033 | bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder, |
| 1001 | struct radeon_encoder_int_tmds *tmds) |
1034 | struct radeon_encoder_int_tmds *tmds) |
| Line 1026... | Line 1059... | ||
| 1026 | return false; |
1059 | return false; |
| Line 1027... | Line 1060... | ||
| 1027 | 1060 | ||
| Line 1028... | Line 1061... | ||
| 1028 | tmds_info = combios_get_table_offset(dev, COMBIOS_DFP_INFO_TABLE); |
1061 | tmds_info = combios_get_table_offset(dev, COMBIOS_DFP_INFO_TABLE); |
| 1029 | - | ||
| 1030 | if (tmds_info) { |
1062 | |
| 1031 | 1063 | if (tmds_info) { |
|
| 1032 | ver = RBIOS8(tmds_info); |
1064 | ver = RBIOS8(tmds_info); |
| 1033 | DRM_INFO("DFP table revision: %d\n", ver); |
1065 | DRM_INFO("DFP table revision: %d\n", ver); |
| 1034 | if (ver == 3) { |
1066 | if (ver == 3) { |
| Line 1061... | Line 1093... | ||
| 1061 | DRM_DEBUG("TMDS PLL From COMBIOS %u %x\n", |
1093 | DRM_DEBUG("TMDS PLL From COMBIOS %u %x\n", |
| 1062 | tmds->tmds_pll[i].freq, |
1094 | tmds->tmds_pll[i].freq, |
| 1063 | tmds->tmds_pll[i].value); |
1095 | tmds->tmds_pll[i].value); |
| 1064 | } |
1096 | } |
| 1065 | } |
1097 | } |
| 1066 | } else |
1098 | } else { |
| 1067 | DRM_INFO("No TMDS info found in BIOS\n"); |
1099 | DRM_INFO("No TMDS info found in BIOS\n"); |
| - | 1100 | return false; |
|
| - | 1101 | } |
|
| 1068 | return true; |
1102 | return true; |
| 1069 | } |
1103 | } |
| Line 1070... | Line 1104... | ||
| 1070 | 1104 | ||
| - | 1105 | bool radeon_legacy_get_ext_tmds_info_from_table(struct radeon_encoder *encoder, |
|
| 1071 | struct radeon_encoder_int_tmds *radeon_combios_get_tmds_info(struct radeon_encoder *encoder) |
1106 | struct radeon_encoder_ext_tmds *tmds) |
| - | 1107 | { |
|
| 1072 | { |
1108 | struct drm_device *dev = encoder->base.dev; |
| 1073 | struct radeon_encoder_int_tmds *tmds = NULL; |
1109 | struct radeon_device *rdev = dev->dev_private; |
| Line -... | Line 1110... | ||
| - | 1110 | struct radeon_i2c_bus_rec i2c_bus; |
|
| - | 1111 | ||
| 1074 | bool ret; |
1112 | /* default for macs */ |
| Line -... | Line 1113... | ||
| - | 1113 | i2c_bus = combios_setup_i2c_bus(rdev, RADEON_GPIO_MONID); |
|
| - | 1114 | tmds->i2c_bus = radeon_i2c_create(dev, &i2c_bus, "DVO"); |
|
| - | 1115 | ||
| - | 1116 | /* XXX some macs have duallink chips */ |
|
| 1075 | 1117 | switch (rdev->mode_info.connector_table) { |
|
| 1076 | tmds = kzalloc(sizeof(struct radeon_encoder_int_tmds), GFP_KERNEL); |
1118 | case CT_POWERBOOK_EXTERNAL: |
| 1077 | - | ||
| 1078 | if (!tmds) |
1119 | case CT_MINI_EXTERNAL: |
| 1079 | return NULL; |
1120 | default: |
| 1080 | - | ||
| - | 1121 | tmds->dvo_chip = DVO_SIL164; |
|
| Line 1081... | Line 1122... | ||
| 1081 | ret = radeon_legacy_get_tmds_info_from_combios(encoder, tmds); |
1122 | tmds->slave_addr = 0x70 >> 1; /* 7 bit addressing */ |
| 1082 | if (ret == false) |
1123 | break; |
| Line 1083... | Line 1124... | ||
| 1083 | radeon_legacy_get_tmds_info_from_table(encoder, tmds); |
1124 | } |
| - | 1125 | ||
| 1084 | 1126 | return true; |
|
| 1085 | return tmds; |
1127 | } |
| 1086 | } |
1128 | |
| 1087 | 1129 | bool radeon_legacy_get_ext_tmds_info_from_combios(struct radeon_encoder *encoder, |
|
| - | 1130 | struct radeon_encoder_ext_tmds *tmds) |
|
| 1088 | void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder) |
1131 | { |
| - | 1132 | struct drm_device *dev = encoder->base.dev; |
|
| - | 1133 | struct radeon_device *rdev = dev->dev_private; |
|
| Line 1089... | Line 1134... | ||
| 1089 | { |
1134 | uint16_t offset; |
| 1090 | struct drm_device *dev = encoder->base.dev; |
1135 | uint8_t ver, id, blocks, clk, data; |
| Line -... | Line 1136... | ||
| - | 1136 | int i; |
|
| - | 1137 | enum radeon_combios_ddc gpio; |
|
| - | 1138 | struct radeon_i2c_bus_rec i2c_bus; |
|
| 1091 | struct radeon_device *rdev = dev->dev_private; |
1139 | |
| - | 1140 | if (rdev->bios == NULL) |
|
| - | 1141 | return false; |
|
| - | 1142 | ||
| - | 1143 | tmds->i2c_bus = NULL; |
|
| - | 1144 | if (rdev->flags & RADEON_IS_IGP) { |
|
| - | 1145 | offset = combios_get_table_offset(dev, COMBIOS_I2C_INFO_TABLE); |
|
| - | 1146 | if (offset) { |
|
| - | 1147 | ver = RBIOS8(offset); |
|
| - | 1148 | DRM_INFO("GPIO Table revision: %d\n", ver); |
|
| - | 1149 | blocks = RBIOS8(offset + 2); |
|
| - | 1150 | for (i = 0; i < blocks; i++) { |
|
| - | 1151 | id = RBIOS8(offset + 3 + (i * 5) + 0); |
|
| - | 1152 | if (id == 136) { |
|
| - | 1153 | clk = RBIOS8(offset + 3 + (i * 5) + 3); |
|
| - | 1154 | data = RBIOS8(offset + 3 + (i * 5) + 4); |
|
| - | 1155 | i2c_bus.valid = true; |
|
| - | 1156 | i2c_bus.mask_clk_mask = (1 << clk); |
|
| - | 1157 | i2c_bus.mask_data_mask = (1 << data); |
|
| - | 1158 | i2c_bus.a_clk_mask = (1 << clk); |
|
| - | 1159 | i2c_bus.a_data_mask = (1 << data); |
|
| - | 1160 | i2c_bus.en_clk_mask = (1 << clk); |
|
| - | 1161 | i2c_bus.en_data_mask = (1 << data); |
|
| - | 1162 | i2c_bus.y_clk_mask = (1 << clk); |
|
| - | 1163 | i2c_bus.y_data_mask = (1 << data); |
|
| - | 1164 | i2c_bus.mask_clk_reg = RADEON_GPIOPAD_MASK; |
|
| - | 1165 | i2c_bus.mask_data_reg = RADEON_GPIOPAD_MASK; |
|
| - | 1166 | i2c_bus.a_clk_reg = RADEON_GPIOPAD_A; |
|
| - | 1167 | i2c_bus.a_data_reg = RADEON_GPIOPAD_A; |
|
| - | 1168 | i2c_bus.en_clk_reg = RADEON_GPIOPAD_EN; |
|
| - | 1169 | i2c_bus.en_data_reg = RADEON_GPIOPAD_EN; |
|
| - | 1170 | i2c_bus.y_clk_reg = RADEON_GPIOPAD_Y; |
|
| - | 1171 | i2c_bus.y_data_reg = RADEON_GPIOPAD_Y; |
|
| - | 1172 | tmds->i2c_bus = radeon_i2c_create(dev, &i2c_bus, "DVO"); |
|
| 1092 | uint16_t ext_tmds_info; |
1173 | tmds->dvo_chip = DVO_SIL164; |
| 1093 | uint8_t ver; |
1174 | tmds->slave_addr = 0x70 >> 1; /* 7 bit addressing */ |
| 1094 | 1175 | break; |
|
| 1095 | if (rdev->bios == NULL) |
1176 | } |
| - | 1177 | } |
|
| - | 1178 | } |
|
| - | 1179 | } else { |
|
| - | 1180 | offset = combios_get_table_offset(dev, COMBIOS_EXT_TMDS_INFO_TABLE); |
|
| - | 1181 | if (offset) { |
|
| - | 1182 | ver = RBIOS8(offset); |
|
| - | 1183 | DRM_INFO("External TMDS Table revision: %d\n", ver); |
|
| - | 1184 | tmds->slave_addr = RBIOS8(offset + 4 + 2); |
|
| - | 1185 | tmds->slave_addr >>= 1; /* 7 bit addressing */ |
|
| - | 1186 | gpio = RBIOS8(offset + 4 + 3); |
|
| - | 1187 | switch (gpio) { |
|
| - | 1188 | case DDC_MONID: |
|
| - | 1189 | i2c_bus = combios_setup_i2c_bus(rdev, RADEON_GPIO_MONID); |
|
| - | 1190 | tmds->i2c_bus = radeon_i2c_create(dev, &i2c_bus, "DVO"); |
|
| - | 1191 | break; |
|
| - | 1192 | case DDC_DVI: |
|
| - | 1193 | i2c_bus = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC); |
|
| - | 1194 | tmds->i2c_bus = radeon_i2c_create(dev, &i2c_bus, "DVO"); |
|
| - | 1195 | break; |
|
| - | 1196 | case DDC_VGA: |
|
| 1096 | return; |
1197 | i2c_bus = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC); |
| - | 1198 | tmds->i2c_bus = radeon_i2c_create(dev, &i2c_bus, "DVO"); |
|
| - | 1199 | break; |
|
| - | 1200 | case DDC_CRT2: |
|
| - | 1201 | /* R3xx+ chips don't have GPIO_CRT2_DDC gpio pad */ |
|
| - | 1202 | if (rdev->family >= CHIP_R300) |
|
| - | 1203 | i2c_bus = combios_setup_i2c_bus(rdev, RADEON_GPIO_MONID); |
|
| - | 1204 | else |
|
| - | 1205 | i2c_bus = combios_setup_i2c_bus(rdev, RADEON_GPIO_CRT2_DDC); |
|
| - | 1206 | tmds->i2c_bus = radeon_i2c_create(dev, &i2c_bus, "DVO"); |
|
| - | 1207 | break; |
|
| 1097 | 1208 | case DDC_LCD: /* MM i2c */ |
|
| 1098 | ext_tmds_info = |
1209 | DRM_ERROR("MM i2c requires hw i2c engine\n"); |
| Line -... | Line 1210... | ||
| - | 1210 | break; |
|
| - | 1211 | default: |
|
| - | 1212 | DRM_ERROR("Unsupported gpio %d\n", gpio); |
|
| - | 1213 | break; |
|
| - | 1214 | } |
|
| - | 1215 | } |
|
| - | 1216 | } |
|
| - | 1217 | ||
| 1099 | combios_get_table_offset(dev, COMBIOS_EXT_TMDS_INFO_TABLE); |
1218 | if (!tmds->i2c_bus) { |
| 1100 | if (ext_tmds_info) { |
1219 | DRM_INFO("No valid Ext TMDS info found in BIOS\n"); |
| 1101 | ver = RBIOS8(ext_tmds_info); |
1220 | return false; |
| 1102 | DRM_INFO("External TMDS Table revision: %d\n", ver); |
1221 | } |
| - | 1222 | ||
| Line 1103... | Line 1223... | ||
| 1103 | // TODO |
1223 | return true; |
| 1104 | } |
1224 | } |
| 1105 | } |
1225 | |
| 1106 | 1226 | bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) |
|
| Line 1166... | Line 1286... | ||
| 1166 | DRM_INFO("Connector Table: %d (generic)\n", |
1286 | DRM_INFO("Connector Table: %d (generic)\n", |
| 1167 | rdev->mode_info.connector_table); |
1287 | rdev->mode_info.connector_table); |
| 1168 | /* these are the most common settings */ |
1288 | /* these are the most common settings */ |
| 1169 | if (rdev->flags & RADEON_SINGLE_CRTC) { |
1289 | if (rdev->flags & RADEON_SINGLE_CRTC) { |
| 1170 | /* VGA - primary dac */ |
1290 | /* VGA - primary dac */ |
| 1171 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); |
1291 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC); |
| - | 1292 | hpd.hpd = RADEON_HPD_NONE; |
|
| 1172 | radeon_add_legacy_encoder(dev, |
1293 | radeon_add_legacy_encoder(dev, |
| 1173 | radeon_get_encoder_id(dev, |
1294 | radeon_get_encoder_id(dev, |
| 1174 | ATOM_DEVICE_CRT1_SUPPORT, |
1295 | ATOM_DEVICE_CRT1_SUPPORT, |
| 1175 | 1), |
1296 | 1), |
| 1176 | ATOM_DEVICE_CRT1_SUPPORT); |
1297 | ATOM_DEVICE_CRT1_SUPPORT); |
| 1177 | radeon_add_legacy_connector(dev, 0, |
1298 | radeon_add_legacy_connector(dev, 0, |
| 1178 | ATOM_DEVICE_CRT1_SUPPORT, |
1299 | ATOM_DEVICE_CRT1_SUPPORT, |
| 1179 | DRM_MODE_CONNECTOR_VGA, |
1300 | DRM_MODE_CONNECTOR_VGA, |
| 1180 | &ddc_i2c, |
1301 | &ddc_i2c, |
| 1181 | CONNECTOR_OBJECT_ID_VGA); |
1302 | CONNECTOR_OBJECT_ID_VGA, |
| - | 1303 | &hpd); |
|
| 1182 | } else if (rdev->flags & RADEON_IS_MOBILITY) { |
1304 | } else if (rdev->flags & RADEON_IS_MOBILITY) { |
| 1183 | /* LVDS */ |
1305 | /* LVDS */ |
| 1184 | ddc_i2c = combios_setup_i2c_bus(RADEON_LCD_GPIO_MASK); |
1306 | ddc_i2c = combios_setup_i2c_bus(rdev, 0); |
| - | 1307 | hpd.hpd = RADEON_HPD_NONE; |
|
| 1185 | radeon_add_legacy_encoder(dev, |
1308 | radeon_add_legacy_encoder(dev, |
| 1186 | radeon_get_encoder_id(dev, |
1309 | radeon_get_encoder_id(dev, |
| 1187 | ATOM_DEVICE_LCD1_SUPPORT, |
1310 | ATOM_DEVICE_LCD1_SUPPORT, |
| 1188 | 0), |
1311 | 0), |
| 1189 | ATOM_DEVICE_LCD1_SUPPORT); |
1312 | ATOM_DEVICE_LCD1_SUPPORT); |
| 1190 | radeon_add_legacy_connector(dev, 0, |
1313 | radeon_add_legacy_connector(dev, 0, |
| 1191 | ATOM_DEVICE_LCD1_SUPPORT, |
1314 | ATOM_DEVICE_LCD1_SUPPORT, |
| 1192 | DRM_MODE_CONNECTOR_LVDS, |
1315 | DRM_MODE_CONNECTOR_LVDS, |
| 1193 | &ddc_i2c, |
1316 | &ddc_i2c, |
| 1194 | CONNECTOR_OBJECT_ID_LVDS); |
1317 | CONNECTOR_OBJECT_ID_LVDS, |
| - | 1318 | &hpd); |
|
| Line 1195... | Line 1319... | ||
| 1195 | 1319 | ||
| 1196 | /* VGA - primary dac */ |
1320 | /* VGA - primary dac */ |
| - | 1321 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC); |
|
| 1197 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); |
1322 | hpd.hpd = RADEON_HPD_NONE; |
| 1198 | radeon_add_legacy_encoder(dev, |
1323 | radeon_add_legacy_encoder(dev, |
| 1199 | radeon_get_encoder_id(dev, |
1324 | radeon_get_encoder_id(dev, |
| 1200 | ATOM_DEVICE_CRT1_SUPPORT, |
1325 | ATOM_DEVICE_CRT1_SUPPORT, |
| 1201 | 1), |
1326 | 1), |
| 1202 | ATOM_DEVICE_CRT1_SUPPORT); |
1327 | ATOM_DEVICE_CRT1_SUPPORT); |
| 1203 | radeon_add_legacy_connector(dev, 1, |
1328 | radeon_add_legacy_connector(dev, 1, |
| 1204 | ATOM_DEVICE_CRT1_SUPPORT, |
1329 | ATOM_DEVICE_CRT1_SUPPORT, |
| 1205 | DRM_MODE_CONNECTOR_VGA, |
1330 | DRM_MODE_CONNECTOR_VGA, |
| 1206 | &ddc_i2c, |
1331 | &ddc_i2c, |
| - | 1332 | CONNECTOR_OBJECT_ID_VGA, |
|
| 1207 | CONNECTOR_OBJECT_ID_VGA); |
1333 | &hpd); |
| 1208 | } else { |
1334 | } else { |
| 1209 | /* DVI-I - tv dac, int tmds */ |
1335 | /* DVI-I - tv dac, int tmds */ |
| - | 1336 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC); |
|
| 1210 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC); |
1337 | hpd.hpd = RADEON_HPD_1; |
| 1211 | radeon_add_legacy_encoder(dev, |
1338 | radeon_add_legacy_encoder(dev, |
| 1212 | radeon_get_encoder_id(dev, |
1339 | radeon_get_encoder_id(dev, |
| 1213 | ATOM_DEVICE_DFP1_SUPPORT, |
1340 | ATOM_DEVICE_DFP1_SUPPORT, |
| 1214 | 0), |
1341 | 0), |
| Line 1221... | Line 1348... | ||
| 1221 | radeon_add_legacy_connector(dev, 0, |
1348 | radeon_add_legacy_connector(dev, 0, |
| 1222 | ATOM_DEVICE_DFP1_SUPPORT | |
1349 | ATOM_DEVICE_DFP1_SUPPORT | |
| 1223 | ATOM_DEVICE_CRT2_SUPPORT, |
1350 | ATOM_DEVICE_CRT2_SUPPORT, |
| 1224 | DRM_MODE_CONNECTOR_DVII, |
1351 | DRM_MODE_CONNECTOR_DVII, |
| 1225 | &ddc_i2c, |
1352 | &ddc_i2c, |
| 1226 | CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I); |
1353 | CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I, |
| - | 1354 | &hpd); |
|
| Line 1227... | Line 1355... | ||
| 1227 | 1355 | ||
| 1228 | /* VGA - primary dac */ |
1356 | /* VGA - primary dac */ |
| - | 1357 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC); |
|
| 1229 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); |
1358 | hpd.hpd = RADEON_HPD_NONE; |
| 1230 | radeon_add_legacy_encoder(dev, |
1359 | radeon_add_legacy_encoder(dev, |
| 1231 | radeon_get_encoder_id(dev, |
1360 | radeon_get_encoder_id(dev, |
| 1232 | ATOM_DEVICE_CRT1_SUPPORT, |
1361 | ATOM_DEVICE_CRT1_SUPPORT, |
| 1233 | 1), |
1362 | 1), |
| 1234 | ATOM_DEVICE_CRT1_SUPPORT); |
1363 | ATOM_DEVICE_CRT1_SUPPORT); |
| 1235 | radeon_add_legacy_connector(dev, 1, |
1364 | radeon_add_legacy_connector(dev, 1, |
| 1236 | ATOM_DEVICE_CRT1_SUPPORT, |
1365 | ATOM_DEVICE_CRT1_SUPPORT, |
| 1237 | DRM_MODE_CONNECTOR_VGA, |
1366 | DRM_MODE_CONNECTOR_VGA, |
| 1238 | &ddc_i2c, |
1367 | &ddc_i2c, |
| - | 1368 | CONNECTOR_OBJECT_ID_VGA, |
|
| 1239 | CONNECTOR_OBJECT_ID_VGA); |
1369 | &hpd); |
| Line 1240... | Line 1370... | ||
| 1240 | } |
1370 | } |
| 1241 | 1371 | ||
| - | 1372 | if (rdev->family != CHIP_R100 && rdev->family != CHIP_R200) { |
|
| - | 1373 | /* TV - tv dac */ |
|
| 1242 | if (rdev->family != CHIP_R100 && rdev->family != CHIP_R200) { |
1374 | ddc_i2c.valid = false; |
| 1243 | /* TV - tv dac */ |
1375 | hpd.hpd = RADEON_HPD_NONE; |
| 1244 | radeon_add_legacy_encoder(dev, |
1376 | radeon_add_legacy_encoder(dev, |
| 1245 | radeon_get_encoder_id(dev, |
1377 | radeon_get_encoder_id(dev, |
| 1246 | ATOM_DEVICE_TV1_SUPPORT, |
1378 | ATOM_DEVICE_TV1_SUPPORT, |
| 1247 | 2), |
1379 | 2), |
| 1248 | ATOM_DEVICE_TV1_SUPPORT); |
1380 | ATOM_DEVICE_TV1_SUPPORT); |
| 1249 | radeon_add_legacy_connector(dev, 2, |
1381 | radeon_add_legacy_connector(dev, 2, |
| 1250 | ATOM_DEVICE_TV1_SUPPORT, |
1382 | ATOM_DEVICE_TV1_SUPPORT, |
| 1251 | DRM_MODE_CONNECTOR_SVIDEO, |
1383 | DRM_MODE_CONNECTOR_SVIDEO, |
| - | 1384 | &ddc_i2c, |
|
| 1252 | &ddc_i2c, |
1385 | CONNECTOR_OBJECT_ID_SVIDEO, |
| 1253 | CONNECTOR_OBJECT_ID_SVIDEO); |
1386 | &hpd); |
| 1254 | } |
1387 | } |
| 1255 | break; |
1388 | break; |
| 1256 | case CT_IBOOK: |
1389 | case CT_IBOOK: |
| 1257 | DRM_INFO("Connector Table: %d (ibook)\n", |
1390 | DRM_INFO("Connector Table: %d (ibook)\n", |
| 1258 | rdev->mode_info.connector_table); |
1391 | rdev->mode_info.connector_table); |
| - | 1392 | /* LVDS */ |
|
| 1259 | /* LVDS */ |
1393 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC); |
| 1260 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC); |
1394 | hpd.hpd = RADEON_HPD_NONE; |
| 1261 | radeon_add_legacy_encoder(dev, |
1395 | radeon_add_legacy_encoder(dev, |
| 1262 | radeon_get_encoder_id(dev, |
1396 | radeon_get_encoder_id(dev, |
| 1263 | ATOM_DEVICE_LCD1_SUPPORT, |
1397 | ATOM_DEVICE_LCD1_SUPPORT, |
| 1264 | 0), |
1398 | 0), |
| 1265 | ATOM_DEVICE_LCD1_SUPPORT); |
1399 | ATOM_DEVICE_LCD1_SUPPORT); |
| 1266 | radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT, |
1400 | radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT, |
| - | 1401 | DRM_MODE_CONNECTOR_LVDS, &ddc_i2c, |
|
| 1267 | DRM_MODE_CONNECTOR_LVDS, &ddc_i2c, |
1402 | CONNECTOR_OBJECT_ID_LVDS, |
| 1268 | CONNECTOR_OBJECT_ID_LVDS); |
1403 | &hpd); |
| - | 1404 | /* VGA - TV DAC */ |
|
| 1269 | /* VGA - TV DAC */ |
1405 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC); |
| 1270 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); |
1406 | hpd.hpd = RADEON_HPD_NONE; |
| 1271 | radeon_add_legacy_encoder(dev, |
1407 | radeon_add_legacy_encoder(dev, |
| 1272 | radeon_get_encoder_id(dev, |
1408 | radeon_get_encoder_id(dev, |
| 1273 | ATOM_DEVICE_CRT2_SUPPORT, |
1409 | ATOM_DEVICE_CRT2_SUPPORT, |
| 1274 | 2), |
1410 | 2), |
| 1275 | ATOM_DEVICE_CRT2_SUPPORT); |
1411 | ATOM_DEVICE_CRT2_SUPPORT); |
| 1276 | radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT, |
1412 | radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT, |
| - | 1413 | DRM_MODE_CONNECTOR_VGA, &ddc_i2c, |
|
| 1277 | DRM_MODE_CONNECTOR_VGA, &ddc_i2c, |
1414 | CONNECTOR_OBJECT_ID_VGA, |
| - | 1415 | &hpd); |
|
| - | 1416 | /* TV - TV DAC */ |
|
| 1278 | CONNECTOR_OBJECT_ID_VGA); |
1417 | ddc_i2c.valid = false; |
| 1279 | /* TV - TV DAC */ |
1418 | hpd.hpd = RADEON_HPD_NONE; |
| 1280 | radeon_add_legacy_encoder(dev, |
1419 | radeon_add_legacy_encoder(dev, |
| 1281 | radeon_get_encoder_id(dev, |
1420 | radeon_get_encoder_id(dev, |
| 1282 | ATOM_DEVICE_TV1_SUPPORT, |
1421 | ATOM_DEVICE_TV1_SUPPORT, |
| 1283 | 2), |
1422 | 2), |
| 1284 | ATOM_DEVICE_TV1_SUPPORT); |
1423 | ATOM_DEVICE_TV1_SUPPORT); |
| 1285 | radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, |
1424 | radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, |
| 1286 | DRM_MODE_CONNECTOR_SVIDEO, |
1425 | DRM_MODE_CONNECTOR_SVIDEO, |
| - | 1426 | &ddc_i2c, |
|
| 1287 | &ddc_i2c, |
1427 | CONNECTOR_OBJECT_ID_SVIDEO, |
| 1288 | CONNECTOR_OBJECT_ID_SVIDEO); |
1428 | &hpd); |
| 1289 | break; |
1429 | break; |
| 1290 | case CT_POWERBOOK_EXTERNAL: |
1430 | case CT_POWERBOOK_EXTERNAL: |
| 1291 | DRM_INFO("Connector Table: %d (powerbook external tmds)\n", |
1431 | DRM_INFO("Connector Table: %d (powerbook external tmds)\n", |
| 1292 | rdev->mode_info.connector_table); |
1432 | rdev->mode_info.connector_table); |
| - | 1433 | /* LVDS */ |
|
| 1293 | /* LVDS */ |
1434 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC); |
| 1294 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC); |
1435 | hpd.hpd = RADEON_HPD_NONE; |
| 1295 | radeon_add_legacy_encoder(dev, |
1436 | radeon_add_legacy_encoder(dev, |
| 1296 | radeon_get_encoder_id(dev, |
1437 | radeon_get_encoder_id(dev, |
| 1297 | ATOM_DEVICE_LCD1_SUPPORT, |
1438 | ATOM_DEVICE_LCD1_SUPPORT, |
| 1298 | 0), |
1439 | 0), |
| 1299 | ATOM_DEVICE_LCD1_SUPPORT); |
1440 | ATOM_DEVICE_LCD1_SUPPORT); |
| 1300 | radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT, |
1441 | radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT, |
| - | 1442 | DRM_MODE_CONNECTOR_LVDS, &ddc_i2c, |
|
| 1301 | DRM_MODE_CONNECTOR_LVDS, &ddc_i2c, |
1443 | CONNECTOR_OBJECT_ID_LVDS, |
| 1302 | CONNECTOR_OBJECT_ID_LVDS); |
1444 | &hpd); |
| - | 1445 | /* DVI-I - primary dac, ext tmds */ |
|
| 1303 | /* DVI-I - primary dac, ext tmds */ |
1446 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC); |
| 1304 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); |
1447 | hpd.hpd = RADEON_HPD_2; /* ??? */ |
| 1305 | radeon_add_legacy_encoder(dev, |
1448 | radeon_add_legacy_encoder(dev, |
| 1306 | radeon_get_encoder_id(dev, |
1449 | radeon_get_encoder_id(dev, |
| 1307 | ATOM_DEVICE_DFP2_SUPPORT, |
1450 | ATOM_DEVICE_DFP2_SUPPORT, |
| Line 1315... | Line 1458... | ||
| 1315 | /* XXX some are SL */ |
1458 | /* XXX some are SL */ |
| 1316 | radeon_add_legacy_connector(dev, 1, |
1459 | radeon_add_legacy_connector(dev, 1, |
| 1317 | ATOM_DEVICE_DFP2_SUPPORT | |
1460 | ATOM_DEVICE_DFP2_SUPPORT | |
| 1318 | ATOM_DEVICE_CRT1_SUPPORT, |
1461 | ATOM_DEVICE_CRT1_SUPPORT, |
| 1319 | DRM_MODE_CONNECTOR_DVII, &ddc_i2c, |
1462 | DRM_MODE_CONNECTOR_DVII, &ddc_i2c, |
| 1320 | CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I); |
1463 | CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I, |
| - | 1464 | &hpd); |
|
| 1321 | /* TV - TV DAC */ |
1465 | /* TV - TV DAC */ |
| - | 1466 | ddc_i2c.valid = false; |
|
| - | 1467 | hpd.hpd = RADEON_HPD_NONE; |
|
| 1322 | radeon_add_legacy_encoder(dev, |
1468 | radeon_add_legacy_encoder(dev, |
| 1323 | radeon_get_encoder_id(dev, |
1469 | radeon_get_encoder_id(dev, |
| 1324 | ATOM_DEVICE_TV1_SUPPORT, |
1470 | ATOM_DEVICE_TV1_SUPPORT, |
| 1325 | 2), |
1471 | 2), |
| 1326 | ATOM_DEVICE_TV1_SUPPORT); |
1472 | ATOM_DEVICE_TV1_SUPPORT); |
| 1327 | radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, |
1473 | radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, |
| 1328 | DRM_MODE_CONNECTOR_SVIDEO, |
1474 | DRM_MODE_CONNECTOR_SVIDEO, |
| 1329 | &ddc_i2c, |
1475 | &ddc_i2c, |
| 1330 | CONNECTOR_OBJECT_ID_SVIDEO); |
1476 | CONNECTOR_OBJECT_ID_SVIDEO, |
| - | 1477 | &hpd); |
|
| 1331 | break; |
1478 | break; |
| 1332 | case CT_POWERBOOK_INTERNAL: |
1479 | case CT_POWERBOOK_INTERNAL: |
| 1333 | DRM_INFO("Connector Table: %d (powerbook internal tmds)\n", |
1480 | DRM_INFO("Connector Table: %d (powerbook internal tmds)\n", |
| 1334 | rdev->mode_info.connector_table); |
1481 | rdev->mode_info.connector_table); |
| 1335 | /* LVDS */ |
1482 | /* LVDS */ |
| 1336 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC); |
1483 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC); |
| - | 1484 | hpd.hpd = RADEON_HPD_NONE; |
|
| 1337 | radeon_add_legacy_encoder(dev, |
1485 | radeon_add_legacy_encoder(dev, |
| 1338 | radeon_get_encoder_id(dev, |
1486 | radeon_get_encoder_id(dev, |
| 1339 | ATOM_DEVICE_LCD1_SUPPORT, |
1487 | ATOM_DEVICE_LCD1_SUPPORT, |
| 1340 | 0), |
1488 | 0), |
| 1341 | ATOM_DEVICE_LCD1_SUPPORT); |
1489 | ATOM_DEVICE_LCD1_SUPPORT); |
| 1342 | radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT, |
1490 | radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT, |
| 1343 | DRM_MODE_CONNECTOR_LVDS, &ddc_i2c, |
1491 | DRM_MODE_CONNECTOR_LVDS, &ddc_i2c, |
| 1344 | CONNECTOR_OBJECT_ID_LVDS); |
1492 | CONNECTOR_OBJECT_ID_LVDS, |
| - | 1493 | &hpd); |
|
| 1345 | /* DVI-I - primary dac, int tmds */ |
1494 | /* DVI-I - primary dac, int tmds */ |
| 1346 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); |
1495 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC); |
| - | 1496 | hpd.hpd = RADEON_HPD_1; /* ??? */ |
|
| 1347 | radeon_add_legacy_encoder(dev, |
1497 | radeon_add_legacy_encoder(dev, |
| 1348 | radeon_get_encoder_id(dev, |
1498 | radeon_get_encoder_id(dev, |
| 1349 | ATOM_DEVICE_DFP1_SUPPORT, |
1499 | ATOM_DEVICE_DFP1_SUPPORT, |
| 1350 | 0), |
1500 | 0), |
| 1351 | ATOM_DEVICE_DFP1_SUPPORT); |
1501 | ATOM_DEVICE_DFP1_SUPPORT); |
| Line 1356... | Line 1506... | ||
| 1356 | ATOM_DEVICE_CRT1_SUPPORT); |
1506 | ATOM_DEVICE_CRT1_SUPPORT); |
| 1357 | radeon_add_legacy_connector(dev, 1, |
1507 | radeon_add_legacy_connector(dev, 1, |
| 1358 | ATOM_DEVICE_DFP1_SUPPORT | |
1508 | ATOM_DEVICE_DFP1_SUPPORT | |
| 1359 | ATOM_DEVICE_CRT1_SUPPORT, |
1509 | ATOM_DEVICE_CRT1_SUPPORT, |
| 1360 | DRM_MODE_CONNECTOR_DVII, &ddc_i2c, |
1510 | DRM_MODE_CONNECTOR_DVII, &ddc_i2c, |
| 1361 | CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I); |
1511 | CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I, |
| - | 1512 | &hpd); |
|
| 1362 | /* TV - TV DAC */ |
1513 | /* TV - TV DAC */ |
| - | 1514 | ddc_i2c.valid = false; |
|
| - | 1515 | hpd.hpd = RADEON_HPD_NONE; |
|
| 1363 | radeon_add_legacy_encoder(dev, |
1516 | radeon_add_legacy_encoder(dev, |
| 1364 | radeon_get_encoder_id(dev, |
1517 | radeon_get_encoder_id(dev, |
| 1365 | ATOM_DEVICE_TV1_SUPPORT, |
1518 | ATOM_DEVICE_TV1_SUPPORT, |
| 1366 | 2), |
1519 | 2), |
| 1367 | ATOM_DEVICE_TV1_SUPPORT); |
1520 | ATOM_DEVICE_TV1_SUPPORT); |
| 1368 | radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, |
1521 | radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, |
| 1369 | DRM_MODE_CONNECTOR_SVIDEO, |
1522 | DRM_MODE_CONNECTOR_SVIDEO, |
| 1370 | &ddc_i2c, |
1523 | &ddc_i2c, |
| 1371 | CONNECTOR_OBJECT_ID_SVIDEO); |
1524 | CONNECTOR_OBJECT_ID_SVIDEO, |
| - | 1525 | &hpd); |
|
| 1372 | break; |
1526 | break; |
| 1373 | case CT_POWERBOOK_VGA: |
1527 | case CT_POWERBOOK_VGA: |
| 1374 | DRM_INFO("Connector Table: %d (powerbook vga)\n", |
1528 | DRM_INFO("Connector Table: %d (powerbook vga)\n", |
| 1375 | rdev->mode_info.connector_table); |
1529 | rdev->mode_info.connector_table); |
| 1376 | /* LVDS */ |
1530 | /* LVDS */ |
| 1377 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC); |
1531 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC); |
| - | 1532 | hpd.hpd = RADEON_HPD_NONE; |
|
| 1378 | radeon_add_legacy_encoder(dev, |
1533 | radeon_add_legacy_encoder(dev, |
| 1379 | radeon_get_encoder_id(dev, |
1534 | radeon_get_encoder_id(dev, |
| 1380 | ATOM_DEVICE_LCD1_SUPPORT, |
1535 | ATOM_DEVICE_LCD1_SUPPORT, |
| 1381 | 0), |
1536 | 0), |
| 1382 | ATOM_DEVICE_LCD1_SUPPORT); |
1537 | ATOM_DEVICE_LCD1_SUPPORT); |
| 1383 | radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT, |
1538 | radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT, |
| 1384 | DRM_MODE_CONNECTOR_LVDS, &ddc_i2c, |
1539 | DRM_MODE_CONNECTOR_LVDS, &ddc_i2c, |
| 1385 | CONNECTOR_OBJECT_ID_LVDS); |
1540 | CONNECTOR_OBJECT_ID_LVDS, |
| - | 1541 | &hpd); |
|
| 1386 | /* VGA - primary dac */ |
1542 | /* VGA - primary dac */ |
| 1387 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); |
1543 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC); |
| - | 1544 | hpd.hpd = RADEON_HPD_NONE; |
|
| 1388 | radeon_add_legacy_encoder(dev, |
1545 | radeon_add_legacy_encoder(dev, |
| 1389 | radeon_get_encoder_id(dev, |
1546 | radeon_get_encoder_id(dev, |
| 1390 | ATOM_DEVICE_CRT1_SUPPORT, |
1547 | ATOM_DEVICE_CRT1_SUPPORT, |
| 1391 | 1), |
1548 | 1), |
| 1392 | ATOM_DEVICE_CRT1_SUPPORT); |
1549 | ATOM_DEVICE_CRT1_SUPPORT); |
| 1393 | radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT1_SUPPORT, |
1550 | radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT1_SUPPORT, |
| 1394 | DRM_MODE_CONNECTOR_VGA, &ddc_i2c, |
1551 | DRM_MODE_CONNECTOR_VGA, &ddc_i2c, |
| 1395 | CONNECTOR_OBJECT_ID_VGA); |
1552 | CONNECTOR_OBJECT_ID_VGA, |
| - | 1553 | &hpd); |
|
| 1396 | /* TV - TV DAC */ |
1554 | /* TV - TV DAC */ |
| - | 1555 | ddc_i2c.valid = false; |
|
| - | 1556 | hpd.hpd = RADEON_HPD_NONE; |
|
| 1397 | radeon_add_legacy_encoder(dev, |
1557 | radeon_add_legacy_encoder(dev, |
| 1398 | radeon_get_encoder_id(dev, |
1558 | radeon_get_encoder_id(dev, |
| 1399 | ATOM_DEVICE_TV1_SUPPORT, |
1559 | ATOM_DEVICE_TV1_SUPPORT, |
| 1400 | 2), |
1560 | 2), |
| 1401 | ATOM_DEVICE_TV1_SUPPORT); |
1561 | ATOM_DEVICE_TV1_SUPPORT); |
| 1402 | radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, |
1562 | radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, |
| 1403 | DRM_MODE_CONNECTOR_SVIDEO, |
1563 | DRM_MODE_CONNECTOR_SVIDEO, |
| 1404 | &ddc_i2c, |
1564 | &ddc_i2c, |
| 1405 | CONNECTOR_OBJECT_ID_SVIDEO); |
1565 | CONNECTOR_OBJECT_ID_SVIDEO, |
| - | 1566 | &hpd); |
|
| 1406 | break; |
1567 | break; |
| 1407 | case CT_MINI_EXTERNAL: |
1568 | case CT_MINI_EXTERNAL: |
| 1408 | DRM_INFO("Connector Table: %d (mini external tmds)\n", |
1569 | DRM_INFO("Connector Table: %d (mini external tmds)\n", |
| 1409 | rdev->mode_info.connector_table); |
1570 | rdev->mode_info.connector_table); |
| 1410 | /* DVI-I - tv dac, ext tmds */ |
1571 | /* DVI-I - tv dac, ext tmds */ |
| 1411 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_CRT2_DDC); |
1572 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_CRT2_DDC); |
| - | 1573 | hpd.hpd = RADEON_HPD_2; /* ??? */ |
|
| 1412 | radeon_add_legacy_encoder(dev, |
1574 | radeon_add_legacy_encoder(dev, |
| 1413 | radeon_get_encoder_id(dev, |
1575 | radeon_get_encoder_id(dev, |
| 1414 | ATOM_DEVICE_DFP2_SUPPORT, |
1576 | ATOM_DEVICE_DFP2_SUPPORT, |
| 1415 | 0), |
1577 | 0), |
| 1416 | ATOM_DEVICE_DFP2_SUPPORT); |
1578 | ATOM_DEVICE_DFP2_SUPPORT); |
| Line 1422... | Line 1584... | ||
| 1422 | /* XXX are any DL? */ |
1584 | /* XXX are any DL? */ |
| 1423 | radeon_add_legacy_connector(dev, 0, |
1585 | radeon_add_legacy_connector(dev, 0, |
| 1424 | ATOM_DEVICE_DFP2_SUPPORT | |
1586 | ATOM_DEVICE_DFP2_SUPPORT | |
| 1425 | ATOM_DEVICE_CRT2_SUPPORT, |
1587 | ATOM_DEVICE_CRT2_SUPPORT, |
| 1426 | DRM_MODE_CONNECTOR_DVII, &ddc_i2c, |
1588 | DRM_MODE_CONNECTOR_DVII, &ddc_i2c, |
| 1427 | CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I); |
1589 | CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I, |
| - | 1590 | &hpd); |
|
| 1428 | /* TV - TV DAC */ |
1591 | /* TV - TV DAC */ |
| - | 1592 | ddc_i2c.valid = false; |
|
| - | 1593 | hpd.hpd = RADEON_HPD_NONE; |
|
| 1429 | radeon_add_legacy_encoder(dev, |
1594 | radeon_add_legacy_encoder(dev, |
| 1430 | radeon_get_encoder_id(dev, |
1595 | radeon_get_encoder_id(dev, |
| 1431 | ATOM_DEVICE_TV1_SUPPORT, |
1596 | ATOM_DEVICE_TV1_SUPPORT, |
| 1432 | 2), |
1597 | 2), |
| 1433 | ATOM_DEVICE_TV1_SUPPORT); |
1598 | ATOM_DEVICE_TV1_SUPPORT); |
| 1434 | radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_TV1_SUPPORT, |
1599 | radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_TV1_SUPPORT, |
| 1435 | DRM_MODE_CONNECTOR_SVIDEO, |
1600 | DRM_MODE_CONNECTOR_SVIDEO, |
| 1436 | &ddc_i2c, |
1601 | &ddc_i2c, |
| 1437 | CONNECTOR_OBJECT_ID_SVIDEO); |
1602 | CONNECTOR_OBJECT_ID_SVIDEO, |
| - | 1603 | &hpd); |
|
| 1438 | break; |
1604 | break; |
| 1439 | case CT_MINI_INTERNAL: |
1605 | case CT_MINI_INTERNAL: |
| 1440 | DRM_INFO("Connector Table: %d (mini internal tmds)\n", |
1606 | DRM_INFO("Connector Table: %d (mini internal tmds)\n", |
| 1441 | rdev->mode_info.connector_table); |
1607 | rdev->mode_info.connector_table); |
| 1442 | /* DVI-I - tv dac, int tmds */ |
1608 | /* DVI-I - tv dac, int tmds */ |
| 1443 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_CRT2_DDC); |
1609 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_CRT2_DDC); |
| - | 1610 | hpd.hpd = RADEON_HPD_1; /* ??? */ |
|
| 1444 | radeon_add_legacy_encoder(dev, |
1611 | radeon_add_legacy_encoder(dev, |
| 1445 | radeon_get_encoder_id(dev, |
1612 | radeon_get_encoder_id(dev, |
| 1446 | ATOM_DEVICE_DFP1_SUPPORT, |
1613 | ATOM_DEVICE_DFP1_SUPPORT, |
| 1447 | 0), |
1614 | 0), |
| 1448 | ATOM_DEVICE_DFP1_SUPPORT); |
1615 | ATOM_DEVICE_DFP1_SUPPORT); |
| Line 1453... | Line 1620... | ||
| 1453 | ATOM_DEVICE_CRT2_SUPPORT); |
1620 | ATOM_DEVICE_CRT2_SUPPORT); |
| 1454 | radeon_add_legacy_connector(dev, 0, |
1621 | radeon_add_legacy_connector(dev, 0, |
| 1455 | ATOM_DEVICE_DFP1_SUPPORT | |
1622 | ATOM_DEVICE_DFP1_SUPPORT | |
| 1456 | ATOM_DEVICE_CRT2_SUPPORT, |
1623 | ATOM_DEVICE_CRT2_SUPPORT, |
| 1457 | DRM_MODE_CONNECTOR_DVII, &ddc_i2c, |
1624 | DRM_MODE_CONNECTOR_DVII, &ddc_i2c, |
| 1458 | CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I); |
1625 | CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I, |
| - | 1626 | &hpd); |
|
| 1459 | /* TV - TV DAC */ |
1627 | /* TV - TV DAC */ |
| - | 1628 | ddc_i2c.valid = false; |
|
| - | 1629 | hpd.hpd = RADEON_HPD_NONE; |
|
| 1460 | radeon_add_legacy_encoder(dev, |
1630 | radeon_add_legacy_encoder(dev, |
| 1461 | radeon_get_encoder_id(dev, |
1631 | radeon_get_encoder_id(dev, |
| 1462 | ATOM_DEVICE_TV1_SUPPORT, |
1632 | ATOM_DEVICE_TV1_SUPPORT, |
| 1463 | 2), |
1633 | 2), |
| 1464 | ATOM_DEVICE_TV1_SUPPORT); |
1634 | ATOM_DEVICE_TV1_SUPPORT); |
| 1465 | radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_TV1_SUPPORT, |
1635 | radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_TV1_SUPPORT, |
| 1466 | DRM_MODE_CONNECTOR_SVIDEO, |
1636 | DRM_MODE_CONNECTOR_SVIDEO, |
| 1467 | &ddc_i2c, |
1637 | &ddc_i2c, |
| 1468 | CONNECTOR_OBJECT_ID_SVIDEO); |
1638 | CONNECTOR_OBJECT_ID_SVIDEO, |
| - | 1639 | &hpd); |
|
| 1469 | break; |
1640 | break; |
| 1470 | case CT_IMAC_G5_ISIGHT: |
1641 | case CT_IMAC_G5_ISIGHT: |
| 1471 | DRM_INFO("Connector Table: %d (imac g5 isight)\n", |
1642 | DRM_INFO("Connector Table: %d (imac g5 isight)\n", |
| 1472 | rdev->mode_info.connector_table); |
1643 | rdev->mode_info.connector_table); |
| 1473 | /* DVI-D - int tmds */ |
1644 | /* DVI-D - int tmds */ |
| 1474 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_MONID); |
1645 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_MONID); |
| - | 1646 | hpd.hpd = RADEON_HPD_1; /* ??? */ |
|
| 1475 | radeon_add_legacy_encoder(dev, |
1647 | radeon_add_legacy_encoder(dev, |
| 1476 | radeon_get_encoder_id(dev, |
1648 | radeon_get_encoder_id(dev, |
| 1477 | ATOM_DEVICE_DFP1_SUPPORT, |
1649 | ATOM_DEVICE_DFP1_SUPPORT, |
| 1478 | 0), |
1650 | 0), |
| 1479 | ATOM_DEVICE_DFP1_SUPPORT); |
1651 | ATOM_DEVICE_DFP1_SUPPORT); |
| 1480 | radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_DFP1_SUPPORT, |
1652 | radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_DFP1_SUPPORT, |
| 1481 | DRM_MODE_CONNECTOR_DVID, &ddc_i2c, |
1653 | DRM_MODE_CONNECTOR_DVID, &ddc_i2c, |
| 1482 | CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D); |
1654 | CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D, |
| - | 1655 | &hpd); |
|
| 1483 | /* VGA - tv dac */ |
1656 | /* VGA - tv dac */ |
| 1484 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC); |
1657 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC); |
| - | 1658 | hpd.hpd = RADEON_HPD_NONE; |
|
| 1485 | radeon_add_legacy_encoder(dev, |
1659 | radeon_add_legacy_encoder(dev, |
| 1486 | radeon_get_encoder_id(dev, |
1660 | radeon_get_encoder_id(dev, |
| 1487 | ATOM_DEVICE_CRT2_SUPPORT, |
1661 | ATOM_DEVICE_CRT2_SUPPORT, |
| 1488 | 2), |
1662 | 2), |
| 1489 | ATOM_DEVICE_CRT2_SUPPORT); |
1663 | ATOM_DEVICE_CRT2_SUPPORT); |
| 1490 | radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT, |
1664 | radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT, |
| 1491 | DRM_MODE_CONNECTOR_VGA, &ddc_i2c, |
1665 | DRM_MODE_CONNECTOR_VGA, &ddc_i2c, |
| 1492 | CONNECTOR_OBJECT_ID_VGA); |
1666 | CONNECTOR_OBJECT_ID_VGA, |
| - | 1667 | &hpd); |
|
| 1493 | /* TV - TV DAC */ |
1668 | /* TV - TV DAC */ |
| - | 1669 | ddc_i2c.valid = false; |
|
| - | 1670 | hpd.hpd = RADEON_HPD_NONE; |
|
| 1494 | radeon_add_legacy_encoder(dev, |
1671 | radeon_add_legacy_encoder(dev, |
| 1495 | radeon_get_encoder_id(dev, |
1672 | radeon_get_encoder_id(dev, |
| 1496 | ATOM_DEVICE_TV1_SUPPORT, |
1673 | ATOM_DEVICE_TV1_SUPPORT, |
| 1497 | 2), |
1674 | 2), |
| 1498 | ATOM_DEVICE_TV1_SUPPORT); |
1675 | ATOM_DEVICE_TV1_SUPPORT); |
| 1499 | radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, |
1676 | radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, |
| 1500 | DRM_MODE_CONNECTOR_SVIDEO, |
1677 | DRM_MODE_CONNECTOR_SVIDEO, |
| 1501 | &ddc_i2c, |
1678 | &ddc_i2c, |
| 1502 | CONNECTOR_OBJECT_ID_SVIDEO); |
1679 | CONNECTOR_OBJECT_ID_SVIDEO, |
| - | 1680 | &hpd); |
|
| 1503 | break; |
1681 | break; |
| 1504 | case CT_EMAC: |
1682 | case CT_EMAC: |
| 1505 | DRM_INFO("Connector Table: %d (emac)\n", |
1683 | DRM_INFO("Connector Table: %d (emac)\n", |
| 1506 | rdev->mode_info.connector_table); |
1684 | rdev->mode_info.connector_table); |
| 1507 | /* VGA - primary dac */ |
1685 | /* VGA - primary dac */ |
| 1508 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); |
1686 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC); |
| - | 1687 | hpd.hpd = RADEON_HPD_NONE; |
|
| 1509 | radeon_add_legacy_encoder(dev, |
1688 | radeon_add_legacy_encoder(dev, |
| 1510 | radeon_get_encoder_id(dev, |
1689 | radeon_get_encoder_id(dev, |
| 1511 | ATOM_DEVICE_CRT1_SUPPORT, |
1690 | ATOM_DEVICE_CRT1_SUPPORT, |
| 1512 | 1), |
1691 | 1), |
| 1513 | ATOM_DEVICE_CRT1_SUPPORT); |
1692 | ATOM_DEVICE_CRT1_SUPPORT); |
| 1514 | radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_CRT1_SUPPORT, |
1693 | radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_CRT1_SUPPORT, |
| 1515 | DRM_MODE_CONNECTOR_VGA, &ddc_i2c, |
1694 | DRM_MODE_CONNECTOR_VGA, &ddc_i2c, |
| 1516 | CONNECTOR_OBJECT_ID_VGA); |
1695 | CONNECTOR_OBJECT_ID_VGA, |
| - | 1696 | &hpd); |
|
| 1517 | /* VGA - tv dac */ |
1697 | /* VGA - tv dac */ |
| 1518 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_CRT2_DDC); |
1698 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_CRT2_DDC); |
| - | 1699 | hpd.hpd = RADEON_HPD_NONE; |
|
| 1519 | radeon_add_legacy_encoder(dev, |
1700 | radeon_add_legacy_encoder(dev, |
| 1520 | radeon_get_encoder_id(dev, |
1701 | radeon_get_encoder_id(dev, |
| 1521 | ATOM_DEVICE_CRT2_SUPPORT, |
1702 | ATOM_DEVICE_CRT2_SUPPORT, |
| 1522 | 2), |
1703 | 2), |
| 1523 | ATOM_DEVICE_CRT2_SUPPORT); |
1704 | ATOM_DEVICE_CRT2_SUPPORT); |
| 1524 | radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT, |
1705 | radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT, |
| 1525 | DRM_MODE_CONNECTOR_VGA, &ddc_i2c, |
1706 | DRM_MODE_CONNECTOR_VGA, &ddc_i2c, |
| 1526 | CONNECTOR_OBJECT_ID_VGA); |
1707 | CONNECTOR_OBJECT_ID_VGA, |
| - | 1708 | &hpd); |
|
| 1527 | /* TV - TV DAC */ |
1709 | /* TV - TV DAC */ |
| - | 1710 | ddc_i2c.valid = false; |
|
| - | 1711 | hpd.hpd = RADEON_HPD_NONE; |
|
| 1528 | radeon_add_legacy_encoder(dev, |
1712 | radeon_add_legacy_encoder(dev, |
| 1529 | radeon_get_encoder_id(dev, |
1713 | radeon_get_encoder_id(dev, |
| 1530 | ATOM_DEVICE_TV1_SUPPORT, |
1714 | ATOM_DEVICE_TV1_SUPPORT, |
| 1531 | 2), |
1715 | 2), |
| 1532 | ATOM_DEVICE_TV1_SUPPORT); |
1716 | ATOM_DEVICE_TV1_SUPPORT); |
| 1533 | radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, |
1717 | radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, |
| 1534 | DRM_MODE_CONNECTOR_SVIDEO, |
1718 | DRM_MODE_CONNECTOR_SVIDEO, |
| 1535 | &ddc_i2c, |
1719 | &ddc_i2c, |
| 1536 | CONNECTOR_OBJECT_ID_SVIDEO); |
1720 | CONNECTOR_OBJECT_ID_SVIDEO, |
| - | 1721 | &hpd); |
|
| 1537 | break; |
1722 | break; |
| 1538 | default: |
1723 | default: |
| 1539 | DRM_INFO("Connector table: %d (invalid)\n", |
1724 | DRM_INFO("Connector table: %d (invalid)\n", |
| 1540 | rdev->mode_info.connector_table); |
1725 | rdev->mode_info.connector_table); |
| 1541 | return false; |
1726 | return false; |
| Line 1548... | Line 1733... | ||
| 1548 | 1733 | ||
| 1549 | static bool radeon_apply_legacy_quirks(struct drm_device *dev, |
1734 | static bool radeon_apply_legacy_quirks(struct drm_device *dev, |
| 1550 | int bios_index, |
1735 | int bios_index, |
| 1551 | enum radeon_combios_connector |
1736 | enum radeon_combios_connector |
| 1552 | *legacy_connector, |
1737 | *legacy_connector, |
| - | 1738 | struct radeon_i2c_bus_rec *ddc_i2c, |
|
| 1553 | struct radeon_i2c_bus_rec *ddc_i2c) |
1739 | struct radeon_hpd *hpd) |
| 1554 | { |
1740 | { |
| Line 1555... | Line 1741... | ||
| 1555 | struct radeon_device *rdev = dev->dev_private; |
1741 | struct radeon_device *rdev = dev->dev_private; |
| 1556 | 1742 | ||
| 1557 | /* XPRESS DDC quirks */ |
1743 | /* XPRESS DDC quirks */ |
| 1558 | if ((rdev->family == CHIP_RS400 || |
1744 | if ((rdev->family == CHIP_RS400 || |
| 1559 | rdev->family == CHIP_RS480) && |
1745 | rdev->family == CHIP_RS480) && |
| 1560 | ddc_i2c->mask_clk_reg == RADEON_GPIO_CRT2_DDC) |
1746 | ddc_i2c->mask_clk_reg == RADEON_GPIO_CRT2_DDC) |
| 1561 | *ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_MONID); |
1747 | *ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_MONID); |
| 1562 | else if ((rdev->family == CHIP_RS400 || |
1748 | else if ((rdev->family == CHIP_RS400 || |
| 1563 | rdev->family == CHIP_RS480) && |
1749 | rdev->family == CHIP_RS480) && |
| 1564 | ddc_i2c->mask_clk_reg == RADEON_GPIO_MONID) { |
1750 | ddc_i2c->mask_clk_reg == RADEON_GPIO_MONID) { |
| 1565 | ddc_i2c->valid = true; |
1751 | *ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIOPAD_MASK); |
| 1566 | ddc_i2c->mask_clk_mask = (0x20 << 8); |
1752 | ddc_i2c->mask_clk_mask = (0x20 << 8); |
| 1567 | ddc_i2c->mask_data_mask = 0x80; |
1753 | ddc_i2c->mask_data_mask = 0x80; |
| 1568 | ddc_i2c->a_clk_mask = (0x20 << 8); |
1754 | ddc_i2c->a_clk_mask = (0x20 << 8); |
| 1569 | ddc_i2c->a_data_mask = 0x80; |
1755 | ddc_i2c->a_data_mask = 0x80; |
| 1570 | ddc_i2c->put_clk_mask = (0x20 << 8); |
1756 | ddc_i2c->en_clk_mask = (0x20 << 8); |
| 1571 | ddc_i2c->put_data_mask = 0x80; |
1757 | ddc_i2c->en_data_mask = 0x80; |
| 1572 | ddc_i2c->get_clk_mask = (0x20 << 8); |
- | |
| 1573 | ddc_i2c->get_data_mask = 0x80; |
- | |
| 1574 | ddc_i2c->mask_clk_reg = RADEON_GPIOPAD_MASK; |
- | |
| 1575 | ddc_i2c->mask_data_reg = RADEON_GPIOPAD_MASK; |
- | |
| 1576 | ddc_i2c->a_clk_reg = RADEON_GPIOPAD_A; |
- | |
| 1577 | ddc_i2c->a_data_reg = RADEON_GPIOPAD_A; |
- | |
| 1578 | ddc_i2c->put_clk_reg = RADEON_GPIOPAD_EN; |
- | |
| 1579 | ddc_i2c->put_data_reg = RADEON_GPIOPAD_EN; |
- | |
| 1580 | ddc_i2c->get_clk_reg = RADEON_LCD_GPIO_Y_REG; |
1758 | ddc_i2c->y_clk_mask = (0x20 << 8); |
| Line -... | Line 1759... | ||
| - | 1759 | ddc_i2c->y_data_mask = 0x80; |
|
| - | 1760 | } |
|
| - | 1761 | ||
| - | 1762 | /* R3xx+ chips don't have GPIO_CRT2_DDC gpio pad */ |
|
| - | 1763 | if ((rdev->family >= CHIP_R300) && |
|
| 1581 | ddc_i2c->get_data_reg = RADEON_LCD_GPIO_Y_REG; |
1764 | ddc_i2c->mask_clk_reg == RADEON_GPIO_CRT2_DDC) |
| 1582 | } |
1765 | *ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC); |
| 1583 | 1766 | ||
| 1584 | /* Certain IBM chipset RN50s have a BIOS reporting two VGAs, |
1767 | /* Certain IBM chipset RN50s have a BIOS reporting two VGAs, |
| 1585 | one with VGA DDC and one with CRT2 DDC. - kill the CRT2 DDC one */ |
1768 | one with VGA DDC and one with CRT2 DDC. - kill the CRT2 DDC one */ |
| Line 1622... | Line 1805... | ||
| 1622 | if (dev->pdev->device == 0x5974 && |
1805 | if (dev->pdev->device == 0x5974 && |
| 1623 | dev->pdev->subsystem_vendor == 0x103c && |
1806 | dev->pdev->subsystem_vendor == 0x103c && |
| 1624 | dev->pdev->subsystem_device == 0x280a) |
1807 | dev->pdev->subsystem_device == 0x280a) |
| 1625 | return false; |
1808 | return false; |
| Line -... | Line 1809... | ||
| - | 1809 | ||
| - | 1810 | /* MSI S270 has non-existent TV port */ |
|
| - | 1811 | if (dev->pdev->device == 0x5955 && |
|
| - | 1812 | dev->pdev->subsystem_vendor == 0x1462 && |
|
| - | 1813 | dev->pdev->subsystem_device == 0x0131) |
|
| - | 1814 | return false; |
|
| 1626 | 1815 | ||
| 1627 | return true; |
1816 | return true; |
| Line 1628... | Line 1817... | ||
| 1628 | } |
1817 | } |
| 1629 | 1818 | ||
| Line 1669... | Line 1858... | ||
| 1669 | uint16_t tmp, connector_object_id; |
1858 | uint16_t tmp, connector_object_id; |
| 1670 | enum radeon_combios_ddc ddc_type; |
1859 | enum radeon_combios_ddc ddc_type; |
| 1671 | enum radeon_combios_connector connector; |
1860 | enum radeon_combios_connector connector; |
| 1672 | int i = 0; |
1861 | int i = 0; |
| 1673 | struct radeon_i2c_bus_rec ddc_i2c; |
1862 | struct radeon_i2c_bus_rec ddc_i2c; |
| - | 1863 | struct radeon_hpd hpd; |
|
| Line 1674... | Line 1864... | ||
| 1674 | 1864 | ||
| 1675 | if (rdev->bios == NULL) |
1865 | if (rdev->bios == NULL) |
| Line 1676... | Line 1866... | ||
| 1676 | return false; |
1866 | return false; |
| Line 1689... | Line 1879... | ||
| 1689 | 1879 | ||
| 1690 | ddc_type = (tmp >> 8) & 0xf; |
1880 | ddc_type = (tmp >> 8) & 0xf; |
| 1691 | switch (ddc_type) { |
1881 | switch (ddc_type) { |
| 1692 | case DDC_MONID: |
1882 | case DDC_MONID: |
| 1693 | ddc_i2c = |
1883 | ddc_i2c = |
| 1694 | combios_setup_i2c_bus(RADEON_GPIO_MONID); |
1884 | combios_setup_i2c_bus(rdev, RADEON_GPIO_MONID); |
| 1695 | break; |
1885 | break; |
| 1696 | case DDC_DVI: |
1886 | case DDC_DVI: |
| 1697 | ddc_i2c = |
1887 | ddc_i2c = |
| 1698 | combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC); |
1888 | combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC); |
| 1699 | break; |
1889 | break; |
| 1700 | case DDC_VGA: |
1890 | case DDC_VGA: |
| 1701 | ddc_i2c = |
1891 | ddc_i2c = |
| 1702 | combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); |
1892 | combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC); |
| 1703 | break; |
1893 | break; |
| 1704 | case DDC_CRT2: |
1894 | case DDC_CRT2: |
| 1705 | ddc_i2c = |
1895 | ddc_i2c = |
| 1706 | combios_setup_i2c_bus(RADEON_GPIO_CRT2_DDC); |
1896 | combios_setup_i2c_bus(rdev, RADEON_GPIO_CRT2_DDC); |
| 1707 | break; |
1897 | break; |
| 1708 | default: |
1898 | default: |
| 1709 | break; |
1899 | break; |
| Line -... | Line 1900... | ||
| - | 1900 | } |
|
| - | 1901 | ||
| - | 1902 | switch (connector) { |
|
| - | 1903 | case CONNECTOR_PROPRIETARY_LEGACY: |
|
| - | 1904 | case CONNECTOR_DVI_I_LEGACY: |
|
| - | 1905 | case CONNECTOR_DVI_D_LEGACY: |
|
| - | 1906 | if ((tmp >> 4) & 0x1) |
|
| - | 1907 | hpd.hpd = RADEON_HPD_2; |
|
| - | 1908 | else |
|
| - | 1909 | hpd.hpd = RADEON_HPD_1; |
|
| - | 1910 | break; |
|
| - | 1911 | default: |
|
| - | 1912 | hpd.hpd = RADEON_HPD_NONE; |
|
| - | 1913 | break; |
|
| 1710 | } |
1914 | } |
| 1711 | 1915 | ||
| 1712 | if (!radeon_apply_legacy_quirks(dev, i, &connector, |
1916 | if (!radeon_apply_legacy_quirks(dev, i, &connector, |
| Line 1713... | Line 1917... | ||
| 1713 | &ddc_i2c)) |
1917 | &ddc_i2c, &hpd)) |
| 1714 | continue; |
1918 | continue; |
| 1715 | 1919 | ||
| Line 1725... | Line 1929... | ||
| 1725 | devices); |
1929 | devices); |
| 1726 | radeon_add_legacy_connector(dev, i, devices, |
1930 | radeon_add_legacy_connector(dev, i, devices, |
| 1727 | legacy_connector_convert |
1931 | legacy_connector_convert |
| 1728 | [connector], |
1932 | [connector], |
| 1729 | &ddc_i2c, |
1933 | &ddc_i2c, |
| 1730 | CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D); |
1934 | CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D, |
| - | 1935 | &hpd); |
|
| 1731 | break; |
1936 | break; |
| 1732 | case CONNECTOR_CRT_LEGACY: |
1937 | case CONNECTOR_CRT_LEGACY: |
| 1733 | if (tmp & 0x1) { |
1938 | if (tmp & 0x1) { |
| 1734 | devices = ATOM_DEVICE_CRT2_SUPPORT; |
1939 | devices = ATOM_DEVICE_CRT2_SUPPORT; |
| 1735 | radeon_add_legacy_encoder(dev, |
1940 | radeon_add_legacy_encoder(dev, |
| Line 1751... | Line 1956... | ||
| 1751 | i, |
1956 | i, |
| 1752 | devices, |
1957 | devices, |
| 1753 | legacy_connector_convert |
1958 | legacy_connector_convert |
| 1754 | [connector], |
1959 | [connector], |
| 1755 | &ddc_i2c, |
1960 | &ddc_i2c, |
| 1756 | CONNECTOR_OBJECT_ID_VGA); |
1961 | CONNECTOR_OBJECT_ID_VGA, |
| - | 1962 | &hpd); |
|
| 1757 | break; |
1963 | break; |
| 1758 | case CONNECTOR_DVI_I_LEGACY: |
1964 | case CONNECTOR_DVI_I_LEGACY: |
| 1759 | devices = 0; |
1965 | devices = 0; |
| 1760 | if (tmp & 0x1) { |
1966 | if (tmp & 0x1) { |
| 1761 | devices |= ATOM_DEVICE_CRT2_SUPPORT; |
1967 | devices |= ATOM_DEVICE_CRT2_SUPPORT; |
| Line 1797... | Line 2003... | ||
| 1797 | i, |
2003 | i, |
| 1798 | devices, |
2004 | devices, |
| 1799 | legacy_connector_convert |
2005 | legacy_connector_convert |
| 1800 | [connector], |
2006 | [connector], |
| 1801 | &ddc_i2c, |
2007 | &ddc_i2c, |
| 1802 | connector_object_id); |
2008 | connector_object_id, |
| - | 2009 | &hpd); |
|
| 1803 | break; |
2010 | break; |
| 1804 | case CONNECTOR_DVI_D_LEGACY: |
2011 | case CONNECTOR_DVI_D_LEGACY: |
| 1805 | if ((tmp >> 4) & 0x1) { |
2012 | if ((tmp >> 4) & 0x1) { |
| 1806 | devices = ATOM_DEVICE_DFP2_SUPPORT; |
2013 | devices = ATOM_DEVICE_DFP2_SUPPORT; |
| 1807 | connector_object_id = combios_check_dl_dvi(dev, 1); |
2014 | connector_object_id = combios_check_dl_dvi(dev, 1); |
| Line 1815... | Line 2022... | ||
| 1815 | devices); |
2022 | devices); |
| 1816 | radeon_add_legacy_connector(dev, i, devices, |
2023 | radeon_add_legacy_connector(dev, i, devices, |
| 1817 | legacy_connector_convert |
2024 | legacy_connector_convert |
| 1818 | [connector], |
2025 | [connector], |
| 1819 | &ddc_i2c, |
2026 | &ddc_i2c, |
| 1820 | connector_object_id); |
2027 | connector_object_id, |
| - | 2028 | &hpd); |
|
| 1821 | break; |
2029 | break; |
| 1822 | case CONNECTOR_CTV_LEGACY: |
2030 | case CONNECTOR_CTV_LEGACY: |
| 1823 | case CONNECTOR_STV_LEGACY: |
2031 | case CONNECTOR_STV_LEGACY: |
| 1824 | radeon_add_legacy_encoder(dev, |
2032 | radeon_add_legacy_encoder(dev, |
| 1825 | radeon_get_encoder_id |
2033 | radeon_get_encoder_id |
| Line 1830... | Line 2038... | ||
| 1830 | radeon_add_legacy_connector(dev, i, |
2038 | radeon_add_legacy_connector(dev, i, |
| 1831 | ATOM_DEVICE_TV1_SUPPORT, |
2039 | ATOM_DEVICE_TV1_SUPPORT, |
| 1832 | legacy_connector_convert |
2040 | legacy_connector_convert |
| 1833 | [connector], |
2041 | [connector], |
| 1834 | &ddc_i2c, |
2042 | &ddc_i2c, |
| 1835 | CONNECTOR_OBJECT_ID_SVIDEO); |
2043 | CONNECTOR_OBJECT_ID_SVIDEO, |
| - | 2044 | &hpd); |
|
| 1836 | break; |
2045 | break; |
| 1837 | default: |
2046 | default: |
| 1838 | DRM_ERROR("Unknown connector type: %d\n", |
2047 | DRM_ERROR("Unknown connector type: %d\n", |
| 1839 | connector); |
2048 | connector); |
| 1840 | continue; |
2049 | continue; |
| Line 1856... | Line 2065... | ||
| 1856 | radeon_get_encoder_id(dev, |
2065 | radeon_get_encoder_id(dev, |
| 1857 | ATOM_DEVICE_DFP1_SUPPORT, |
2066 | ATOM_DEVICE_DFP1_SUPPORT, |
| 1858 | 0), |
2067 | 0), |
| 1859 | ATOM_DEVICE_DFP1_SUPPORT); |
2068 | ATOM_DEVICE_DFP1_SUPPORT); |
| Line 1860... | Line 2069... | ||
| 1860 | 2069 | ||
| - | 2070 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC); |
|
| 1861 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC); |
2071 | hpd.hpd = RADEON_HPD_NONE; |
| 1862 | radeon_add_legacy_connector(dev, |
2072 | radeon_add_legacy_connector(dev, |
| 1863 | 0, |
2073 | 0, |
| 1864 | ATOM_DEVICE_CRT1_SUPPORT | |
2074 | ATOM_DEVICE_CRT1_SUPPORT | |
| 1865 | ATOM_DEVICE_DFP1_SUPPORT, |
2075 | ATOM_DEVICE_DFP1_SUPPORT, |
| 1866 | DRM_MODE_CONNECTOR_DVII, |
2076 | DRM_MODE_CONNECTOR_DVII, |
| 1867 | &ddc_i2c, |
2077 | &ddc_i2c, |
| - | 2078 | CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I, |
|
| 1868 | CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I); |
2079 | &hpd); |
| 1869 | } else { |
2080 | } else { |
| 1870 | uint16_t crt_info = |
2081 | uint16_t crt_info = |
| 1871 | combios_get_table_offset(dev, COMBIOS_CRT_INFO_TABLE); |
2082 | combios_get_table_offset(dev, COMBIOS_CRT_INFO_TABLE); |
| 1872 | DRM_DEBUG("Found CRT table, assuming VGA connector\n"); |
2083 | DRM_DEBUG("Found CRT table, assuming VGA connector\n"); |
| 1873 | if (crt_info) { |
2084 | if (crt_info) { |
| 1874 | radeon_add_legacy_encoder(dev, |
2085 | radeon_add_legacy_encoder(dev, |
| 1875 | radeon_get_encoder_id(dev, |
2086 | radeon_get_encoder_id(dev, |
| 1876 | ATOM_DEVICE_CRT1_SUPPORT, |
2087 | ATOM_DEVICE_CRT1_SUPPORT, |
| 1877 | 1), |
2088 | 1), |
| 1878 | ATOM_DEVICE_CRT1_SUPPORT); |
2089 | ATOM_DEVICE_CRT1_SUPPORT); |
| - | 2090 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC); |
|
| 1879 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); |
2091 | hpd.hpd = RADEON_HPD_NONE; |
| 1880 | radeon_add_legacy_connector(dev, |
2092 | radeon_add_legacy_connector(dev, |
| 1881 | 0, |
2093 | 0, |
| 1882 | ATOM_DEVICE_CRT1_SUPPORT, |
2094 | ATOM_DEVICE_CRT1_SUPPORT, |
| 1883 | DRM_MODE_CONNECTOR_VGA, |
2095 | DRM_MODE_CONNECTOR_VGA, |
| 1884 | &ddc_i2c, |
2096 | &ddc_i2c, |
| - | 2097 | CONNECTOR_OBJECT_ID_VGA, |
|
| 1885 | CONNECTOR_OBJECT_ID_VGA); |
2098 | &hpd); |
| 1886 | } else { |
2099 | } else { |
| 1887 | DRM_DEBUG("No connector info found\n"); |
2100 | DRM_DEBUG("No connector info found\n"); |
| 1888 | return false; |
2101 | return false; |
| 1889 | } |
2102 | } |
| Line 1908... | Line 2121... | ||
| 1908 | ddc_type = RBIOS8(lcd_ddc_info + 2); |
2121 | ddc_type = RBIOS8(lcd_ddc_info + 2); |
| 1909 | switch (ddc_type) { |
2122 | switch (ddc_type) { |
| 1910 | case DDC_MONID: |
2123 | case DDC_MONID: |
| 1911 | ddc_i2c = |
2124 | ddc_i2c = |
| 1912 | combios_setup_i2c_bus |
2125 | combios_setup_i2c_bus |
| 1913 | (RADEON_GPIO_MONID); |
2126 | (rdev, RADEON_GPIO_MONID); |
| 1914 | break; |
2127 | break; |
| 1915 | case DDC_DVI: |
2128 | case DDC_DVI: |
| 1916 | ddc_i2c = |
2129 | ddc_i2c = |
| 1917 | combios_setup_i2c_bus |
2130 | combios_setup_i2c_bus |
| 1918 | (RADEON_GPIO_DVI_DDC); |
2131 | (rdev, RADEON_GPIO_DVI_DDC); |
| 1919 | break; |
2132 | break; |
| 1920 | case DDC_VGA: |
2133 | case DDC_VGA: |
| 1921 | ddc_i2c = |
2134 | ddc_i2c = |
| 1922 | combios_setup_i2c_bus |
2135 | combios_setup_i2c_bus |
| 1923 | (RADEON_GPIO_VGA_DDC); |
2136 | (rdev, RADEON_GPIO_VGA_DDC); |
| 1924 | break; |
2137 | break; |
| 1925 | case DDC_CRT2: |
2138 | case DDC_CRT2: |
| 1926 | ddc_i2c = |
2139 | ddc_i2c = |
| 1927 | combios_setup_i2c_bus |
2140 | combios_setup_i2c_bus |
| 1928 | (RADEON_GPIO_CRT2_DDC); |
2141 | (rdev, RADEON_GPIO_CRT2_DDC); |
| 1929 | break; |
2142 | break; |
| 1930 | case DDC_LCD: |
2143 | case DDC_LCD: |
| 1931 | ddc_i2c = |
2144 | ddc_i2c = |
| 1932 | combios_setup_i2c_bus |
2145 | combios_setup_i2c_bus |
| 1933 | (RADEON_LCD_GPIO_MASK); |
2146 | (rdev, RADEON_GPIOPAD_MASK); |
| 1934 | ddc_i2c.mask_clk_mask = |
2147 | ddc_i2c.mask_clk_mask = |
| 1935 | RBIOS32(lcd_ddc_info + 3); |
2148 | RBIOS32(lcd_ddc_info + 3); |
| 1936 | ddc_i2c.mask_data_mask = |
2149 | ddc_i2c.mask_data_mask = |
| 1937 | RBIOS32(lcd_ddc_info + 7); |
2150 | RBIOS32(lcd_ddc_info + 7); |
| 1938 | ddc_i2c.a_clk_mask = |
2151 | ddc_i2c.a_clk_mask = |
| 1939 | RBIOS32(lcd_ddc_info + 3); |
2152 | RBIOS32(lcd_ddc_info + 3); |
| 1940 | ddc_i2c.a_data_mask = |
2153 | ddc_i2c.a_data_mask = |
| 1941 | RBIOS32(lcd_ddc_info + 7); |
2154 | RBIOS32(lcd_ddc_info + 7); |
| 1942 | ddc_i2c.put_clk_mask = |
2155 | ddc_i2c.en_clk_mask = |
| 1943 | RBIOS32(lcd_ddc_info + 3); |
2156 | RBIOS32(lcd_ddc_info + 3); |
| 1944 | ddc_i2c.put_data_mask = |
2157 | ddc_i2c.en_data_mask = |
| 1945 | RBIOS32(lcd_ddc_info + 7); |
2158 | RBIOS32(lcd_ddc_info + 7); |
| 1946 | ddc_i2c.get_clk_mask = |
2159 | ddc_i2c.y_clk_mask = |
| 1947 | RBIOS32(lcd_ddc_info + 3); |
2160 | RBIOS32(lcd_ddc_info + 3); |
| 1948 | ddc_i2c.get_data_mask = |
2161 | ddc_i2c.y_data_mask = |
| 1949 | RBIOS32(lcd_ddc_info + 7); |
2162 | RBIOS32(lcd_ddc_info + 7); |
| 1950 | break; |
2163 | break; |
| 1951 | case DDC_GPIO: |
2164 | case DDC_GPIO: |
| 1952 | ddc_i2c = |
2165 | ddc_i2c = |
| 1953 | combios_setup_i2c_bus |
2166 | combios_setup_i2c_bus |
| 1954 | (RADEON_MDGPIO_EN_REG); |
2167 | (rdev, RADEON_MDGPIO_MASK); |
| 1955 | ddc_i2c.mask_clk_mask = |
2168 | ddc_i2c.mask_clk_mask = |
| 1956 | RBIOS32(lcd_ddc_info + 3); |
2169 | RBIOS32(lcd_ddc_info + 3); |
| 1957 | ddc_i2c.mask_data_mask = |
2170 | ddc_i2c.mask_data_mask = |
| 1958 | RBIOS32(lcd_ddc_info + 7); |
2171 | RBIOS32(lcd_ddc_info + 7); |
| 1959 | ddc_i2c.a_clk_mask = |
2172 | ddc_i2c.a_clk_mask = |
| 1960 | RBIOS32(lcd_ddc_info + 3); |
2173 | RBIOS32(lcd_ddc_info + 3); |
| 1961 | ddc_i2c.a_data_mask = |
2174 | ddc_i2c.a_data_mask = |
| 1962 | RBIOS32(lcd_ddc_info + 7); |
2175 | RBIOS32(lcd_ddc_info + 7); |
| 1963 | ddc_i2c.put_clk_mask = |
2176 | ddc_i2c.en_clk_mask = |
| 1964 | RBIOS32(lcd_ddc_info + 3); |
2177 | RBIOS32(lcd_ddc_info + 3); |
| 1965 | ddc_i2c.put_data_mask = |
2178 | ddc_i2c.en_data_mask = |
| 1966 | RBIOS32(lcd_ddc_info + 7); |
2179 | RBIOS32(lcd_ddc_info + 7); |
| 1967 | ddc_i2c.get_clk_mask = |
2180 | ddc_i2c.y_clk_mask = |
| 1968 | RBIOS32(lcd_ddc_info + 3); |
2181 | RBIOS32(lcd_ddc_info + 3); |
| 1969 | ddc_i2c.get_data_mask = |
2182 | ddc_i2c.y_data_mask = |
| 1970 | RBIOS32(lcd_ddc_info + 7); |
2183 | RBIOS32(lcd_ddc_info + 7); |
| 1971 | break; |
2184 | break; |
| 1972 | default: |
2185 | default: |
| 1973 | ddc_i2c.valid = false; |
2186 | ddc_i2c.valid = false; |
| 1974 | break; |
2187 | break; |
| 1975 | } |
2188 | } |
| 1976 | DRM_DEBUG("LCD DDC Info Table found!\n"); |
2189 | DRM_DEBUG("LCD DDC Info Table found!\n"); |
| 1977 | } else |
2190 | } else |
| 1978 | ddc_i2c.valid = false; |
2191 | ddc_i2c.valid = false; |
| Line -... | Line 2192... | ||
| - | 2192 | ||
| 1979 | 2193 | hpd.hpd = RADEON_HPD_NONE; |
|
| 1980 | radeon_add_legacy_connector(dev, |
2194 | radeon_add_legacy_connector(dev, |
| 1981 | 5, |
2195 | 5, |
| 1982 | ATOM_DEVICE_LCD1_SUPPORT, |
2196 | ATOM_DEVICE_LCD1_SUPPORT, |
| 1983 | DRM_MODE_CONNECTOR_LVDS, |
2197 | DRM_MODE_CONNECTOR_LVDS, |
| 1984 | &ddc_i2c, |
2198 | &ddc_i2c, |
| - | 2199 | CONNECTOR_OBJECT_ID_LVDS, |
|
| 1985 | CONNECTOR_OBJECT_ID_LVDS); |
2200 | &hpd); |
| 1986 | } |
2201 | } |
| Line 1987... | Line 2202... | ||
| 1987 | } |
2202 | } |
| 1988 | 2203 | ||
| 1989 | /* check TV table */ |
2204 | /* check TV table */ |
| 1990 | if (rdev->family != CHIP_R100 && rdev->family != CHIP_R200) { |
2205 | if (rdev->family != CHIP_R100 && rdev->family != CHIP_R200) { |
| 1991 | uint32_t tv_info = |
2206 | uint32_t tv_info = |
| 1992 | combios_get_table_offset(dev, COMBIOS_TV_INFO_TABLE); |
2207 | combios_get_table_offset(dev, COMBIOS_TV_INFO_TABLE); |
| 1993 | if (tv_info) { |
2208 | if (tv_info) { |
| - | 2209 | if (RBIOS8(tv_info + 6) == 'T') { |
|
| 1994 | if (RBIOS8(tv_info + 6) == 'T') { |
2210 | if (radeon_apply_legacy_tv_quirks(dev)) { |
| 1995 | if (radeon_apply_legacy_tv_quirks(dev)) { |
2211 | hpd.hpd = RADEON_HPD_NONE; |
| 1996 | radeon_add_legacy_encoder(dev, |
2212 | radeon_add_legacy_encoder(dev, |
| 1997 | radeon_get_encoder_id |
2213 | radeon_get_encoder_id |
| 1998 | (dev, |
2214 | (dev, |
| 1999 | ATOM_DEVICE_TV1_SUPPORT, |
2215 | ATOM_DEVICE_TV1_SUPPORT, |
| 2000 | 2), |
2216 | 2), |
| 2001 | ATOM_DEVICE_TV1_SUPPORT); |
2217 | ATOM_DEVICE_TV1_SUPPORT); |
| 2002 | radeon_add_legacy_connector(dev, 6, |
2218 | radeon_add_legacy_connector(dev, 6, |
| 2003 | ATOM_DEVICE_TV1_SUPPORT, |
2219 | ATOM_DEVICE_TV1_SUPPORT, |
| 2004 | DRM_MODE_CONNECTOR_SVIDEO, |
2220 | DRM_MODE_CONNECTOR_SVIDEO, |
| - | 2221 | &ddc_i2c, |
|
| 2005 | &ddc_i2c, |
2222 | CONNECTOR_OBJECT_ID_SVIDEO, |
| 2006 | CONNECTOR_OBJECT_ID_SVIDEO); |
2223 | &hpd); |
| 2007 | } |
2224 | } |
| 2008 | } |
2225 | } |
| Line 2009... | Line 2226... | ||
| 2009 | } |
2226 | } |
| Line 2010... | Line 2227... | ||
| 2010 | } |
2227 | } |
| 2011 | 2228 | ||
| Line -... | Line 2229... | ||
| - | 2229 | radeon_link_encoder_connector(dev); |
|
| - | 2230 | ||
| - | 2231 | return true; |
|
| - | 2232 | } |
|
| - | 2233 | ||
| - | 2234 | void radeon_external_tmds_setup(struct drm_encoder *encoder) |
|
| - | 2235 | { |
|
| - | 2236 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
|
| - | 2237 | struct radeon_encoder_ext_tmds *tmds = radeon_encoder->enc_priv; |
|
| - | 2238 | ||
| - | 2239 | if (!tmds) |
|
| - | 2240 | return; |
|
| - | 2241 | ||
| - | 2242 | switch (tmds->dvo_chip) { |
|
| - | 2243 | case DVO_SIL164: |
|
| - | 2244 | /* sil 164 */ |
|
| - | 2245 | radeon_i2c_do_lock(tmds->i2c_bus, 1); |
|
| - | 2246 | radeon_i2c_sw_put_byte(tmds->i2c_bus, |
|
| - | 2247 | tmds->slave_addr, |
|
| - | 2248 | 0x08, 0x30); |
|
| - | 2249 | radeon_i2c_sw_put_byte(tmds->i2c_bus, |
|
| - | 2250 | tmds->slave_addr, |
|
| - | 2251 | 0x09, 0x00); |
|
| - | 2252 | radeon_i2c_sw_put_byte(tmds->i2c_bus, |
|
| - | 2253 | tmds->slave_addr, |
|
| - | 2254 | 0x0a, 0x90); |
|
| - | 2255 | radeon_i2c_sw_put_byte(tmds->i2c_bus, |
|
| - | 2256 | tmds->slave_addr, |
|
| - | 2257 | 0x0c, 0x89); |
|
| - | 2258 | radeon_i2c_sw_put_byte(tmds->i2c_bus, |
|
| - | 2259 | tmds->slave_addr, |
|
| - | 2260 | 0x08, 0x3b); |
|
| - | 2261 | radeon_i2c_do_lock(tmds->i2c_bus, 0); |
|
| - | 2262 | break; |
|
| - | 2263 | case DVO_SIL1178: |
|
| - | 2264 | /* sil 1178 - untested */ |
|
| - | 2265 | /* |
|
| - | 2266 | * 0x0f, 0x44 |
|
| - | 2267 | * 0x0f, 0x4c |
|
| - | 2268 | * 0x0e, 0x01 |
|
| - | 2269 | * 0x0a, 0x80 |
|
| - | 2270 | * 0x09, 0x30 |
|
| - | 2271 | * 0x0c, 0xc9 |
|
| - | 2272 | * 0x0d, 0x70 |
|
| - | 2273 | * 0x08, 0x32 |
|
| - | 2274 | * 0x08, 0x33 |
|
| - | 2275 | */ |
|
| - | 2276 | break; |
|
| - | 2277 | default: |
|
| - | 2278 | break; |
|
| - | 2279 | } |
|
| - | 2280 | ||
| - | 2281 | } |
|
| - | 2282 | ||
| - | 2283 | bool radeon_combios_external_tmds_setup(struct drm_encoder *encoder) |
|
| - | 2284 | { |
|
| - | 2285 | struct drm_device *dev = encoder->dev; |
|
| - | 2286 | struct radeon_device *rdev = dev->dev_private; |
|
| - | 2287 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
|
| - | 2288 | uint16_t offset; |
|
| - | 2289 | uint8_t blocks, slave_addr, rev; |
|
| - | 2290 | uint32_t index, id; |
|
| - | 2291 | uint32_t reg, val, and_mask, or_mask; |
|
| - | 2292 | struct radeon_encoder_ext_tmds *tmds = radeon_encoder->enc_priv; |
|
| - | 2293 | ||
| - | 2294 | if (rdev->bios == NULL) |
|
| - | 2295 | return false; |
|
| - | 2296 | ||
| - | 2297 | if (!tmds) |
|
| - | 2298 | return false; |
|
| - | 2299 | ||
| - | 2300 | if (rdev->flags & RADEON_IS_IGP) { |
|
| - | 2301 | offset = combios_get_table_offset(dev, COMBIOS_TMDS_POWER_ON_TABLE); |
|
| - | 2302 | rev = RBIOS8(offset); |
|
| - | 2303 | if (offset) { |
|
| - | 2304 | rev = RBIOS8(offset); |
|
| - | 2305 | if (rev > 1) { |
|
| - | 2306 | blocks = RBIOS8(offset + 3); |
|
| - | 2307 | index = offset + 4; |
|
| - | 2308 | while (blocks > 0) { |
|
| - | 2309 | id = RBIOS16(index); |
|
| - | 2310 | index += 2; |
|
| - | 2311 | switch (id >> 13) { |
|
| - | 2312 | case 0: |
|
| - | 2313 | reg = (id & 0x1fff) * 4; |
|
| - | 2314 | val = RBIOS32(index); |
|
| - | 2315 | index += 4; |
|
| - | 2316 | WREG32(reg, val); |
|
| - | 2317 | break; |
|
| - | 2318 | case 2: |
|
| - | 2319 | reg = (id & 0x1fff) * 4; |
|
| - | 2320 | and_mask = RBIOS32(index); |
|
| - | 2321 | index += 4; |
|
| - | 2322 | or_mask = RBIOS32(index); |
|
| - | 2323 | index += 4; |
|
| - | 2324 | val = RREG32(reg); |
|
| - | 2325 | val = (val & and_mask) | or_mask; |
|
| - | 2326 | WREG32(reg, val); |
|
| - | 2327 | break; |
|
| - | 2328 | case 3: |
|
| - | 2329 | val = RBIOS16(index); |
|
| - | 2330 | index += 2; |
|
| - | 2331 | udelay(val); |
|
| - | 2332 | break; |
|
| - | 2333 | case 4: |
|
| - | 2334 | val = RBIOS16(index); |
|
| - | 2335 | index += 2; |
|
| - | 2336 | udelay(val * 1000); |
|
| - | 2337 | break; |
|
| - | 2338 | case 6: |
|
| - | 2339 | slave_addr = id & 0xff; |
|
| - | 2340 | slave_addr >>= 1; /* 7 bit addressing */ |
|
| - | 2341 | index++; |
|
| - | 2342 | reg = RBIOS8(index); |
|
| - | 2343 | index++; |
|
| - | 2344 | val = RBIOS8(index); |
|
| - | 2345 | index++; |
|
| - | 2346 | radeon_i2c_do_lock(tmds->i2c_bus, 1); |
|
| - | 2347 | radeon_i2c_sw_put_byte(tmds->i2c_bus, |
|
| - | 2348 | slave_addr, |
|
| - | 2349 | reg, val); |
|
| - | 2350 | radeon_i2c_do_lock(tmds->i2c_bus, 0); |
|
| - | 2351 | break; |
|
| - | 2352 | default: |
|
| - | 2353 | DRM_ERROR("Unknown id %d\n", id >> 13); |
|
| - | 2354 | break; |
|
| - | 2355 | } |
|
| - | 2356 | blocks--; |
|
| - | 2357 | } |
|
| - | 2358 | return true; |
|
| - | 2359 | } |
|
| - | 2360 | } |
|
| - | 2361 | } else { |
|
| - | 2362 | offset = combios_get_table_offset(dev, COMBIOS_EXT_TMDS_INFO_TABLE); |
|
| - | 2363 | if (offset) { |
|
| - | 2364 | index = offset + 10; |
|
| - | 2365 | id = RBIOS16(index); |
|
| - | 2366 | while (id != 0xffff) { |
|
| - | 2367 | index += 2; |
|
| - | 2368 | switch (id >> 13) { |
|
| - | 2369 | case 0: |
|
| - | 2370 | reg = (id & 0x1fff) * 4; |
|
| - | 2371 | val = RBIOS32(index); |
|
| - | 2372 | WREG32(reg, val); |
|
| - | 2373 | break; |
|
| - | 2374 | case 2: |
|
| - | 2375 | reg = (id & 0x1fff) * 4; |
|
| - | 2376 | and_mask = RBIOS32(index); |
|
| - | 2377 | index += 4; |
|
| - | 2378 | or_mask = RBIOS32(index); |
|
| - | 2379 | index += 4; |
|
| - | 2380 | val = RREG32(reg); |
|
| - | 2381 | val = (val & and_mask) | or_mask; |
|
| - | 2382 | WREG32(reg, val); |
|
| - | 2383 | break; |
|
| - | 2384 | case 4: |
|
| - | 2385 | val = RBIOS16(index); |
|
| - | 2386 | index += 2; |
|
| - | 2387 | udelay(val); |
|
| - | 2388 | break; |
|
| - | 2389 | case 5: |
|
| - | 2390 | reg = id & 0x1fff; |
|
| - | 2391 | and_mask = RBIOS32(index); |
|
| - | 2392 | index += 4; |
|
| - | 2393 | or_mask = RBIOS32(index); |
|
| - | 2394 | index += 4; |
|
| - | 2395 | val = RREG32_PLL(reg); |
|
| - | 2396 | val = (val & and_mask) | or_mask; |
|
| - | 2397 | WREG32_PLL(reg, val); |
|
| - | 2398 | break; |
|
| - | 2399 | case 6: |
|
| - | 2400 | reg = id & 0x1fff; |
|
| - | 2401 | val = RBIOS8(index); |
|
| - | 2402 | index += 1; |
|
| - | 2403 | radeon_i2c_do_lock(tmds->i2c_bus, 1); |
|
| - | 2404 | radeon_i2c_sw_put_byte(tmds->i2c_bus, |
|
| - | 2405 | tmds->slave_addr, |
|
| - | 2406 | reg, val); |
|
| - | 2407 | radeon_i2c_do_lock(tmds->i2c_bus, 0); |
|
| - | 2408 | break; |
|
| - | 2409 | default: |
|
| - | 2410 | DRM_ERROR("Unknown id %d\n", id >> 13); |
|
| - | 2411 | break; |
|
| - | 2412 | } |
|
| - | 2413 | id = RBIOS16(index); |
|
| - | 2414 | } |
|
| - | 2415 | return true; |
|
| 2012 | radeon_link_encoder_connector(dev); |
2416 | } |
| 2013 | 2417 | } |
|
| 2014 | return true; |
2418 | return false; |
| Line 2015... | Line 2419... | ||
| 2015 | } |
2419 | } |