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#include "i915_drv.h"
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#include "i915_drv.h"
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#include "intel_drv.h"
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#include "intel_drv.h"
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#include "bitmap.h"
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#include "bitmap.h"
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#define DRIVER_CAPS_0   HW_BIT_BLIT | HW_TEX_BLIT;
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#define DRIVER_CAPS_1   0
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extern struct drm_device *main_device;
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struct hman bm_man;
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void __attribute__((regparm(1))) destroy_bitmap(bitmap_t *bitmap)
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void __attribute__((regparm(1))) destroy_bitmap(bitmap_t *bitmap)
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{
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{
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    printf("destroy bitmap %d\n", bitmap->handle);
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    printf("destroy bitmap %d\n", bitmap->handle);
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    free_handle(&bm_man, bitmap->handle);
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    free_handle(&bm_man, bitmap->handle);
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    bitmap->handle = 0;
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    bitmap->handle = 0;
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    bitmap->obj->base.read_domains = I915_GEM_DOMAIN_GTT;
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    bitmap->obj->base.write_domain = I915_GEM_DOMAIN_CPU;
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    i915_gem_object_unpin(bitmap->obj);
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    mutex_lock(&main_device->struct_mutex);
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    drm_gem_object_unreference(&bitmap->obj->base);
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    drm_gem_object_unreference(&bitmap->obj->base);
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    mutex_unlock(&main_device->struct_mutex);
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    __DestroyObject(bitmap);
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    __DestroyObject(bitmap);
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};
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};
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extern struct drm_device *main_device;
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struct hman bm_man;
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int init_bitmaps()
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int init_bitmaps()
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{
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{
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    int ret;
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    int ret;
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        while(count--)
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        while(count--)
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        {
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        {
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            *dst++ = (0xFFFFF000 & *src++) | 0x207 ; // map as shared page
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            *dst++ = (0xFFFFF000 & *src++) | 0x207 ; // map as shared page
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        };
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        };
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//        while(max_count--)
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        while(max_count--)
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//            *dst++ = 0;                              // cleanup unused space
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            *dst++ = 0;                              // cleanup unused space
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    }
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    }
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    obj->mapped = uaddr ;
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    bitmap->handle = handle;
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    bitmap->handle = handle;
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    bitmap->uaddr  = uaddr;
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    bitmap->uaddr  = uaddr;
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    bitmap->pitch  = pitch;
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    bitmap->pitch  = pitch;
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    return ret;
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    return ret;
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};
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};
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void *drm_intel_bo_map(struct drm_i915_gem_object *obj, int write_enable)
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{
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    u8 *kaddr;
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    kaddr = AllocKernelSpace(obj->base.size);
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    if( kaddr != NULL)
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    {
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        u32_t *src = (u32_t*)obj->pages;
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        u32_t *dst = &((u32_t*)page_tabs)[(u32_t)kaddr >> 12];
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        u32 count  = obj->base.size/4096;
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        while(count--)
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        {
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            *dst++ = (0xFFFFF000 & *src++) | 0x003 ;
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        };
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        return kaddr;
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    };
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    return NULL;
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}
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void destroy_gem_object(uint32_t handle)
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{
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    struct drm_i915_gem_object *obj = (void*)handle;
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    drm_gem_object_unreference(&obj->base);
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};
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void write_gem_object(uint32_t handle, u32 offset, u32 size, u8* src)
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{
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    struct drm_i915_gem_object *obj = (void*)handle;
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    u8    *dst;
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    int    ret;
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    ret = i915_gem_object_pin(obj, 4096, true);
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    if (ret)
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        return;
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    dst = drm_intel_bo_map(obj, true);
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    if( dst != NULL )
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    {
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        memmove(dst+offset, src, size);
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        FreeKernelSpace(dst);
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    };
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};
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u32 get_buffer_offset(uint32_t handle)
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{
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    struct drm_i915_gem_object *obj = (void*)handle;
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 284 
    return obj->gtt_offset;
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};
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 288 
int get_driver_caps(hwcaps_t *caps)
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{
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 290 
    int ret = 0;
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 291 
    ENTER();
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 292 
 
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 293 
    dbgprintf("caps ptr %x\n", caps);
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 294 
 
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 295 
    switch(caps->idx)
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    {
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 297 
        case 0:
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            caps->opt[0] = DRIVER_CAPS_0;
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 299 
            caps->opt[1] = DRIVER_CAPS_1;
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 300 
            break;
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 301 
 
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 302 
        case 1:
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 303 
            caps->cap1.max_tex_width  = 4096;
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 304 
            caps->cap1.max_tex_height = 4096;
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 305 
            break;
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        default:
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 307 
            ret = 1;
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 308 
    };
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 309 
    caps->idx = 1;
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 310 
    return ret;