Rev 6104 | Show entire file | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed
Rev 6104 | Rev 7146 | ||
---|---|---|---|
Line 1814... | Line 1814... | ||
1814 | DRM_ERROR("bad SET PREDICATION\n"); |
1814 | DRM_ERROR("bad SET PREDICATION\n"); |
1815 | return -EINVAL; |
1815 | return -EINVAL; |
1816 | } |
1816 | } |
Line 1817... | Line 1817... | ||
1817 | 1817 | ||
1818 | offset = reloc->gpu_offset + |
1818 | offset = reloc->gpu_offset + |
1819 | (idx_value & 0xfffffff0) + |
1819 | (idx_value & 0xfffffff0) + |
Line 1820... | Line 1820... | ||
1820 | ((u64)(tmp & 0xff) << 32); |
1820 | ((u64)(tmp & 0xff) << 32); |
1821 | 1821 | ||
1822 | ib[idx + 0] = offset; |
1822 | ib[idx + 0] = offset; |
1823 | ib[idx + 1] = (tmp & 0xffffff00) | (upper_32_bits(offset) & 0xff); |
1823 | ib[idx + 1] = (tmp & 0xffffff00) | (upper_32_bits(offset) & 0xff); |
Line 1860... | Line 1860... | ||
1860 | DRM_ERROR("bad INDEX_BASE\n"); |
1860 | DRM_ERROR("bad INDEX_BASE\n"); |
1861 | return -EINVAL; |
1861 | return -EINVAL; |
1862 | } |
1862 | } |
Line 1863... | Line 1863... | ||
1863 | 1863 | ||
1864 | offset = reloc->gpu_offset + |
1864 | offset = reloc->gpu_offset + |
1865 | idx_value + |
1865 | idx_value + |
Line 1866... | Line 1866... | ||
1866 | ((u64)(radeon_get_ib_value(p, idx+1) & 0xff) << 32); |
1866 | ((u64)(radeon_get_ib_value(p, idx+1) & 0xff) << 32); |
1867 | 1867 | ||
Line 1868... | Line 1868... | ||
1868 | ib[idx+0] = offset; |
1868 | ib[idx+0] = offset; |
Line 1895... | Line 1895... | ||
1895 | DRM_ERROR("bad DRAW_INDEX\n"); |
1895 | DRM_ERROR("bad DRAW_INDEX\n"); |
1896 | return -EINVAL; |
1896 | return -EINVAL; |
1897 | } |
1897 | } |
Line 1898... | Line 1898... | ||
1898 | 1898 | ||
1899 | offset = reloc->gpu_offset + |
1899 | offset = reloc->gpu_offset + |
1900 | idx_value + |
1900 | idx_value + |
Line 1901... | Line 1901... | ||
1901 | ((u64)(radeon_get_ib_value(p, idx+1) & 0xff) << 32); |
1901 | ((u64)(radeon_get_ib_value(p, idx+1) & 0xff) << 32); |
1902 | 1902 | ||
Line 1903... | Line 1903... | ||
1903 | ib[idx+0] = offset; |
1903 | ib[idx+0] = offset; |
Line 1923... | Line 1923... | ||
1923 | DRM_ERROR("bad DRAW_INDEX_2\n"); |
1923 | DRM_ERROR("bad DRAW_INDEX_2\n"); |
1924 | return -EINVAL; |
1924 | return -EINVAL; |
1925 | } |
1925 | } |
Line 1926... | Line 1926... | ||
1926 | 1926 | ||
1927 | offset = reloc->gpu_offset + |
1927 | offset = reloc->gpu_offset + |
1928 | radeon_get_ib_value(p, idx+1) + |
1928 | radeon_get_ib_value(p, idx+1) + |
Line 1929... | Line 1929... | ||
1929 | ((u64)(radeon_get_ib_value(p, idx+2) & 0xff) << 32); |
1929 | ((u64)(radeon_get_ib_value(p, idx+2) & 0xff) << 32); |
1930 | 1930 | ||
Line 1931... | Line 1931... | ||
1931 | ib[idx+1] = offset; |
1931 | ib[idx+1] = offset; |
Line 2096... | Line 2096... | ||
2096 | DRM_ERROR("bad WAIT_REG_MEM\n"); |
2096 | DRM_ERROR("bad WAIT_REG_MEM\n"); |
2097 | return -EINVAL; |
2097 | return -EINVAL; |
2098 | } |
2098 | } |
Line 2099... | Line 2099... | ||
2099 | 2099 | ||
2100 | offset = reloc->gpu_offset + |
2100 | offset = reloc->gpu_offset + |
2101 | (radeon_get_ib_value(p, idx+1) & 0xfffffffc) + |
2101 | (radeon_get_ib_value(p, idx+1) & 0xfffffffc) + |
Line 2102... | Line 2102... | ||
2102 | ((u64)(radeon_get_ib_value(p, idx+2) & 0xff) << 32); |
2102 | ((u64)(radeon_get_ib_value(p, idx+2) & 0xff) << 32); |
2103 | 2103 | ||
2104 | ib[idx+1] = (ib[idx+1] & 0x3) | (offset & 0xfffffffc); |
2104 | ib[idx+1] = (ib[idx+1] & 0x3) | (offset & 0xfffffffc); |
2105 | ib[idx+2] = upper_32_bits(offset) & 0xff; |
2105 | ib[idx+2] = upper_32_bits(offset) & 0xff; |
Line 2237... | Line 2237... | ||
2237 | if (r) { |
2237 | if (r) { |
2238 | DRM_ERROR("bad EVENT_WRITE\n"); |
2238 | DRM_ERROR("bad EVENT_WRITE\n"); |
2239 | return -EINVAL; |
2239 | return -EINVAL; |
2240 | } |
2240 | } |
2241 | offset = reloc->gpu_offset + |
2241 | offset = reloc->gpu_offset + |
2242 | (radeon_get_ib_value(p, idx+1) & 0xfffffff8) + |
2242 | (radeon_get_ib_value(p, idx+1) & 0xfffffff8) + |
2243 | ((u64)(radeon_get_ib_value(p, idx+2) & 0xff) << 32); |
2243 | ((u64)(radeon_get_ib_value(p, idx+2) & 0xff) << 32); |
Line 2244... | Line 2244... | ||
2244 | 2244 | ||
2245 | ib[idx+1] = offset & 0xfffffff8; |
2245 | ib[idx+1] = offset & 0xfffffff8; |
2246 | ib[idx+2] = upper_32_bits(offset) & 0xff; |
2246 | ib[idx+2] = upper_32_bits(offset) & 0xff; |
2247 | } |
2247 | } |
Line 2259... | Line 2259... | ||
2259 | DRM_ERROR("bad EVENT_WRITE_EOP\n"); |
2259 | DRM_ERROR("bad EVENT_WRITE_EOP\n"); |
2260 | return -EINVAL; |
2260 | return -EINVAL; |
2261 | } |
2261 | } |
Line 2262... | Line 2262... | ||
2262 | 2262 | ||
2263 | offset = reloc->gpu_offset + |
2263 | offset = reloc->gpu_offset + |
2264 | (radeon_get_ib_value(p, idx+1) & 0xfffffffc) + |
2264 | (radeon_get_ib_value(p, idx+1) & 0xfffffffc) + |
Line 2265... | Line 2265... | ||
2265 | ((u64)(radeon_get_ib_value(p, idx+2) & 0xff) << 32); |
2265 | ((u64)(radeon_get_ib_value(p, idx+2) & 0xff) << 32); |
2266 | 2266 | ||
2267 | ib[idx+1] = offset & 0xfffffffc; |
2267 | ib[idx+1] = offset & 0xfffffffc; |
2268 | ib[idx+2] = (ib[idx+2] & 0xffffff00) | (upper_32_bits(offset) & 0xff); |
2268 | ib[idx+2] = (ib[idx+2] & 0xffffff00) | (upper_32_bits(offset) & 0xff); |
Line 2281... | Line 2281... | ||
2281 | DRM_ERROR("bad EVENT_WRITE_EOS\n"); |
2281 | DRM_ERROR("bad EVENT_WRITE_EOS\n"); |
2282 | return -EINVAL; |
2282 | return -EINVAL; |
2283 | } |
2283 | } |
Line 2284... | Line 2284... | ||
2284 | 2284 | ||
2285 | offset = reloc->gpu_offset + |
2285 | offset = reloc->gpu_offset + |
2286 | (radeon_get_ib_value(p, idx+1) & 0xfffffffc) + |
2286 | (radeon_get_ib_value(p, idx+1) & 0xfffffffc) + |
Line 2287... | Line 2287... | ||
2287 | ((u64)(radeon_get_ib_value(p, idx+2) & 0xff) << 32); |
2287 | ((u64)(radeon_get_ib_value(p, idx+2) & 0xff) << 32); |
2288 | 2288 | ||
2289 | ib[idx+1] = offset & 0xfffffffc; |
2289 | ib[idx+1] = offset & 0xfffffffc; |
2290 | ib[idx+2] = (ib[idx+2] & 0xffffff00) | (upper_32_bits(offset) & 0xff); |
2290 | ib[idx+2] = (ib[idx+2] & 0xffffff00) | (upper_32_bits(offset) & 0xff); |