WebSVN – Kolibri OS – Diff – /kernel/trunk/drivers/sis.asm


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;;                                                              ;;
;; Copyright (C) KolibriOS team 2004-2007. All rights reserved. ;;
;; Distributed under terms of the GNU General Public License    ;;
;;                                                              ;;
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format MS COFF
 
include 'proc32.inc'
include 'imports.inc'
 
API_VERSION     equ 0x01000100
 
DEBUG           equ 1
DEBUG_IRQ       equ 0
 
USE_COM_IRQ     equ 0    ;make irq 3 and irq 4 available for PCI devices
IRQ_REMAP       equ 0
IRQ_LINE        equ 0
 
 
;irq 0,1,2,8,12,13 íåäîñòóïíû
;                   FEDCBA9876543210
VALID_IRQ       equ 1100111011111000b
ATTCH_IRQ       equ 0000111010100000b
 
if USE_COM_IRQ
ATTCH_IRQ       equ 0000111010111000b
end if
 
CPU_FREQ        equ  2600d
 
BIT0  EQU 0x00000001
BIT1  EQU 0x00000002
BIT2  EQU 0x00000004
BIT3  EQU 0x00000008
BIT4  EQU 0x00000010
BIT5  EQU 0x00000020
BIT6  EQU 0x00000040
BIT7  EQU 0x00000080
BIT8  EQU 0x00000100
BIT9  EQU 0x00000200
BIT10 EQU 0x00000400
BIT11 EQU 0x00000800
BIT12 EQU 0x00001000
BIT13 EQU 0x00002000
BIT14 EQU 0x00004000
BIT15 EQU 0x00008000
BIT16 EQU 0x00010000
BIT17 EQU 0x00020000
BIT18 EQU 0x00040000
BIT19 EQU 0x00080000
BIT20 EQU 0x00100000
BIT21 EQU 0x00200000
BIT22 EQU 0x00400000
BIT23 EQU 0x00800000
BIT24 EQU 0x00100000
BIT25 EQU 0x02000000
BIT26 EQU 0x04000000
BIT27 EQU 0x08000000
BIT28 EQU 0x10000000
BIT29 EQU 0x20000000
BIT30 EQU 0x40000000
BIT31 EQU 0x80000000
 
VID_SIS           equ 0x1039
CTRL_SIS          equ 0x7012
 
PCM_OUT_BDL       equ  0x10  ; PCM out buffer descriptors list
PCM_OUT_CR_REG    equ  0x1b  ; PCM out Control Register
PCM_OUT_LVI_REG   equ  0x15	 ; PCM last valid index
PCM_OUT_SR_REG    equ  0x18  ; PCM out Status register
PCM_OUT_PIV_REG   equ  0x1a	 ; PCM out prefetched index
PCM_OUT_CIV_REG   equ  0x14      ; PCM out current index
 
PCM_IN_CR_REG     equ  0x0b      ; PCM in Control Register
MC_IN_CR_REG      equ  0x2b  ; MIC in Control Register
RR		  equ  BIT1	 ; reset registers.  Nukes all regs
 
CODEC_MASTER_VOL_REG            equ     0x02
CODEC_AUX_VOL                   equ     0x04    ;
CODEC_PCM_OUT_REG            equ 0x18 ; PCM output volume
CODEC_EXT_AUDIO_REG          equ 0x28 ; extended audio
CODEC_EXT_AUDIO_CTRL_REG     equ 0x2a ; extended audio control
CODEC_PCM_FRONT_DACRATE_REG  equ 0x2c ; PCM out sample rate
CODEC_PCM_SURND_DACRATE_REG  equ 0x2e ; surround sound sample rate
CODEC_PCM_LFE_DACRATE_REG    equ 0x30 ; LFE sample rate
 
GLOB_CTRL         equ  0x2C        ;   Global Control
CTRL_STAT         equ  0x30        ;   Global Status
CTRL_CAS          equ  0x34        ;   Codec Access Semiphore
 
CAS_FLAG          equ  0x01        ;   Codec Access Semiphore Bit
 
CTRL_ST_CREADY    equ  BIT8+BIT9+BIT28 ;   Primary Codec Ready
 
CTRL_ST_RCS       equ  0x00008000  ;   Read Completion Status
 
CTRL_CNT_CRIE     equ  BIT4+BIT5+BIT6  ;   Codecs Resume Interrupt Enable
CTRL_CNT_AC_OFF   equ  0x00000008  ;   ACLINK Off
CTRL_CNT_WARM     equ  0x00000004  ;   AC97 Warm Reset
CTRL_CNT_COLD     equ  0x00000002  ;   AC97 Cold Reset
CTRL_CNT_GIE      equ  0x00000001  ;   GPI Interrupt Enable
 
CODEC_REG_POWERDOWN   equ 0x26
CODEC_REG_ST          equ 0x26
 
SRV_GETVERSION        equ  0
DEV_PLAY              equ  1
DEV_STOP              equ  2
DEV_CALLBACK          equ  3
DEV_SET_BUFF          equ  4
DEV_NOTIFY            equ  5
DEV_SET_MASTERVOL     equ  6
DEV_GET_MASTERVOL     equ  7
DEV_GET_INFO          equ  8
 
struc AC_CNTRL		    ;AC controller base class
{ .bus                dd ?
  .devfn              dd ?
 
  .vendor             dd ?
  .dev_id             dd ?
  .pci_cmd            dd ?
  .pci_stat           dd ?
 
  .codec_io_base      dd ?
  .codec_mem_base     dd ?
 
  .ctrl_io_base       dd ?
  .ctrl_mem_base      dd ?
  .cfg_reg            dd ?
  .int_line           dd ?
 
  .vendor_ids         dd ?    ;vendor id string
  .ctrl_ids           dd ?    ;hub id string
 
  .buffer             dd ?
 
  .notify_pos         dd ?
  .notify_task        dd ?
 
  .lvi_reg            dd ?
  .ctrl_setup         dd ?
  .user_callback      dd ?
  .codec_read16       dd ?
  .codec_write16      dd ?
 
  .ctrl_read8         dd ?
  .ctrl_read16        dd ?
  .ctrl_read32        dd ?
 
  .ctrl_write8        dd ?
  .ctrl_write16       dd ?
  .ctrl_write32       dd ?
}
 
struc CODEC		   ;Audio Chip base class
{
  .chip_id            dd ?
  .flags              dd ?
  .status             dd ?
 
  .ac_vendor_ids      dd ?    ;ac vendor id string
  .chip_ids           dd ?    ;chip model string
 
  .shadow_flag        dd ?
                      dd ?
 
  .regs               dw ?     ; codec registers
  .reg_master_vol     dw ?     ;0x02
  .reg_aux_out_vol    dw ?     ;0x04
  .reg_mone_vol       dw ?     ;0x06
  .reg_master_tone    dw ?     ;0x08
  .reg_beep_vol       dw ?     ;0x0A
  .reg_phone_vol      dw ?     ;0x0C
  .reg_mic_vol        dw ?     ;0x0E
  .reg_line_in_vol    dw ?     ;0x10
  .reg_cd_vol         dw ?     ;0x12
  .reg_video_vol      dw ?     ;0x14
  .reg_aux_in_vol     dw ?     ;0x16
  .reg_pcm_out_vol    dw ?     ;0x18
  .reg_rec_select     dw ?     ;0x1A
  .reg_rec_gain       dw ?     ;0x1C
  .reg_rec_gain_mic   dw ?     ;0x1E
  .reg_gen            dw ?     ;0x20
  .reg_3d_ctrl        dw ?     ;0X22
  .reg_page           dw ?     ;0X24
  .reg_powerdown      dw ?     ;0x26
  .reg_ext_audio      dw ?     ;0x28
  .reg_ext_st         dw ?     ;0x2a
  .reg_pcm_front_rate dw ?     ;0x2c
  .reg_pcm_surr_rate  dw ?     ;0x2e
  .reg_lfe_rate       dw ?     ;0x30
  .reg_pcm_in_rate    dw ?     ;0x32
                      dw ?     ;0x34
  .reg_cent_lfe_vol   dw ?     ;0x36
  .reg_surr_vol       dw ?     ;0x38
  .reg_spdif_ctrl     dw ?     ;0x3A
                      dw ?     ;0x3C
                      dw ?     ;0x3E
                      dw ?     ;0x40
                      dw ?     ;0x42
                      dw ?     ;0x44
                      dw ?     ;0x46
                      dw ?     ;0x48
                      dw ?     ;0x4A
                      dw ?     ;0x4C
                      dw ?     ;0x4E
                      dw ?     ;0x50
                      dw ?     ;0x52
                      dw ?     ;0x54
                      dw ?     ;0x56
                      dw ?     ;0x58
                      dw ?     ;0x5A
                      dw ?     ;0x5C
                      dw ?     ;0x5E
  .reg_page_0         dw ?     ;0x60
  .reg_page_1         dw ?     ;0x62
  .reg_page_2         dw ?     ;0x64
  .reg_page_3         dw ?     ;0x66
  .reg_page_4         dw ?     ;0x68
  .reg_page_5         dw ?     ;0x6A
  .reg_page_6         dw ?     ;0x6C
  .reg_page_7         dw ?     ;0x6E
                      dw ?     ;0x70
                      dw ?     ;0x72
                      dw ?     ;0x74
                      dw ?     ;0x76
                      dw ?     ;0x78
                      dw ?     ;0x7A
  .reg_vendor_id_1    dw ?     ;0x7C
  .reg_vendor_id_2    dw ?     ;0x7E
 
 
  .reset              dd ?    ;virual
  .set_master_vol     dd ?
}
 
struc CTRL_INFO
{   .pci_cmd          dd ?
    .irq              dd ?
    .glob_cntrl       dd ?
    .glob_sta         dd ?
    .codec_io_base    dd ?
    .ctrl_io_base     dd ?
    .codec_mem_base   dd ?
    .ctrl_mem_base    dd ?
    .codec_id         dd ?
}
 
struc IOCTL
{  .handle            dd ?
   .io_code           dd ?
   .input             dd ?
   .inp_size          dd ?
   .output            dd ?
   .out_size          dd ?
}
 
virtual at 0
  IOCTL IOCTL
end virtual
 
EVENT_NOTIFY	      equ 0x00000200
 
public START
public service_proc
public version
 
section '.flat' code readable align 16
 
proc START stdcall, state:dword
 
           cmp [state], 1
           jne .stop
 
     if DEBUG
           mov esi, msgInit
           call SysMsgBoardStr
     end if
 
           call detect_controller
           test eax, eax
           jz .fail
 
     if DEBUG
           mov esi,[ctrl.vendor_ids]
           call SysMsgBoardStr
           mov  esi, [ctrl.ctrl_ids]
           call SysMsgBoardStr
 
     end if
 
           call init_controller
           test eax, eax
           jz .fail
 
	   call init_codec
           test eax, eax
           jz .fail
 
           call reset_controller
           call setup_codec
 
           mov esi, msgPrimBuff
           call SysMsgBoardStr
           call create_primary_buff
           mov esi, msgDone
           call SysMsgBoardStr
 
  if IRQ_REMAP
           pushf
           cli
 
           mov ebx, [ctrl.int_line]
           in al, 0xA1
           mov ah, al
           in al, 0x21
           test ebx, ebx
           jz .skip
           bts ax, bx                      ;mask old line
.skip
           bts ax, IRQ_LINE                ;mask new ine
           out 0x21, al
           mov al, ah
           out 0xA1, al
                                           ;remap IRQ
           stdcall PciWrite8, 0, 0xF8, 0x61, IRQ_LINE
 
           mov dx, 0x4d0                   ;8259 ELCR1
           in al, dx
           bts ax, IRQ_LINE
           out dx, al                      ;set level-triggered mode
           mov [ctrl.int_line], IRQ_LINE
           popf
           mov esi, msgRemap
           call SysMsgBoardStr
  end if
 
           mov eax, VALID_IRQ
           mov ebx, [ctrl.int_line]
           mov esi, msgInvIRQ
           bt eax, ebx
           jnc .fail_msg
           mov eax, ATTCH_IRQ
           mov esi, msgAttchIRQ
           bt eax, ebx
           jnc .fail_msg
 
           stdcall AttachIntHandler, ebx, ac97_irq
.reg:
           stdcall RegService, sz_sound_srv, service_proc
           ret
.fail:
   if DEBUG
           mov esi, msgFail
           call SysMsgBoardStr
   end if
           xor eax, eax
           ret
.fail_msg:
           call SysMsgBoardStr
           xor eax, eax
           ret
.stop:
           call stop
           xor eax, eax
           ret
endp
 
handle     equ  IOCTL.handle
io_code    equ  IOCTL.io_code
input      equ  IOCTL.input
inp_size   equ  IOCTL.inp_size
output     equ  IOCTL.output
out_size   equ  IOCTL.out_size
 
align 4
proc service_proc stdcall, ioctl:dword
 
           mov edi, [ioctl]
           mov eax, [edi+io_code]
 
           cmp eax, SRV_GETVERSION
           jne @F
 
           mov eax, [edi+output]
           cmp [edi+out_size], 4
           jne .fail
 
           mov [eax], dword API_VERSION
           xor eax, eax
           ret
@@:
           cmp eax, DEV_PLAY
           jne @F
     if DEBUG
           mov esi, msgPlay
           call SysMsgBoardStr
     end if
           call play
           ret
@@:
           cmp eax, DEV_STOP
           jne @F
     if DEBUG
           mov esi, msgStop
           call SysMsgBoardStr
     end if
           call stop
           ret
@@:
           cmp eax, DEV_CALLBACK
           jne @F
           mov ebx, [edi+input]
           stdcall set_callback, [ebx]
           ret
@@:
           cmp eax, DEV_SET_MASTERVOL
           jne @F
           mov eax, [edi+input]
           mov eax, [eax]
           call set_master_vol      ;eax= vol
           ret
@@:
           cmp eax, DEV_GET_MASTERVOL
           jne @F
           mov ebx, [edi+output]
           stdcall get_master_vol, ebx
           ret
;@@:
;           cmp eax, DEV_GET_INFO
;           jne @F
;           mov ebx, [edi+output]
;           stdcall get_dev_info, ebx
;           ret
@@:
.fail:
           or eax, -1
           ret
endp
 
restore   handle
restore   io_code
restore   input
restore   inp_size
restore   output
restore   out_size
 
align 4
proc ac97_irq
 
     if DEBUG_IRQ
           mov esi, msgIRQ
           call SysMsgBoardStr
     end if
 
           mov edx, PCM_OUT_CR_REG
           mov al, 0x10
           call [ctrl.ctrl_write8]
 
           mov ax, 0x1c
           mov edx, PCM_OUT_SR_REG
           call [ctrl.ctrl_write16]
 
           mov edx, PCM_OUT_CIV_REG
           call [ctrl.ctrl_read8]
 
           and eax, 0x1F
           cmp eax, [civ_val]
           je .skip
 
           mov [civ_val], eax
           dec eax
           and eax, 0x1F
           mov [ctrl.lvi_reg], eax
 
           mov edx, PCM_OUT_LVI_REG
           call [ctrl.ctrl_write8]
 
           mov edx, PCM_OUT_CR_REG
           mov ax, 0x11
           call [ctrl.ctrl_write8]
 
           mov eax, [civ_val]
           add eax, 1
           and eax, 31
           mov ebx, dword [buff_list+eax*4]
 
           cmp [ctrl.user_callback], 0
           je @f
 
           stdcall [ctrl.user_callback], ebx
@@:
           ret
 
.skip:
           mov edx, PCM_OUT_CR_REG
           mov ax, 0x11
           call [ctrl.ctrl_write8]
           ret
endp
 
align 4
proc create_primary_buff
 
           stdcall KernelAlloc, 0x10000
           mov [ctrl.buffer], eax
 
           mov edi, eax
           mov ecx, 0x10000/4
           xor eax, eax
           cld
           rep stosd
 
           mov eax, [ctrl.buffer]
           call GetPgAddr
 
           mov ebx, 0xC0004000
           mov ecx, 4
           mov edi, pcmout_bdl
@@:
           mov [edi], eax
           mov [edi+4], ebx
 
           mov [edi+32], eax
           mov [edi+4+32], ebx
 
           mov [edi+64], eax
           mov [edi+4+64], ebx
 
           mov [edi+96], eax
           mov [edi+4+96], ebx
 
           mov [edi+128], eax
           mov [edi+4+128], ebx
 
           mov [edi+160], eax
           mov [edi+4+160], ebx
 
           mov [edi+192], eax
           mov [edi+4+192], ebx
 
           mov [edi+224], eax
           mov [edi+4+224], ebx
 
           add eax, 0x4000
           add edi, 8
           loop @B
 
           mov edi, buff_list
           mov eax, [ctrl.buffer]
           mov ecx, 4
@@:
           mov [edi], eax
           mov [edi+16], eax
           mov [edi+32], eax
           mov [edi+48], eax
           mov [edi+64], eax
           mov [edi+80], eax
           mov [edi+96], eax
           mov [edi+112], eax
 
           add eax, 0x4000
           add edi, 4
           loop @B
 
           mov eax, pcmout_bdl
           mov ebx, eax
           call GetPgAddr     ;eax
           and ebx, 0xFFF
           add eax, ebx
 
           mov edx, PCM_OUT_BDL
           call [ctrl.ctrl_write32]
 
           mov eax, 16
           mov [ctrl.lvi_reg], eax
           mov edx, PCM_OUT_LVI_REG
           call [ctrl.ctrl_write8]
 
           mov edx, GLOB_CTRL
           call [ctrl.ctrl_read32]
           and eax, not 0x000000C0
           mov edx, GLOB_CTRL
           call [ctrl.ctrl_write32]
 
 
	   ret
endp
 
align 4
proc detect_controller
           locals
             last_bus dd ?
             bus      dd ?
             devfn    dd ?
           endl
 
           xor eax, eax
           mov [bus], eax
           inc eax
           call PciApi
           cmp eax, -1
           je .err
 
           mov [last_bus], eax
 
.next_bus:
           and [devfn], 0
.next_dev:
           stdcall PciRead32, [bus], [devfn], dword 0
           test eax, eax
           jz .next
           cmp eax, -1
           je .next
 
           mov edi, devices
@@:
           mov ebx, [edi]
           test ebx, ebx
           jz .next
 
           cmp eax, ebx
           je .found
           add edi, 12
           jmp @B
.next:
           inc [devfn]
           cmp [devfn], 256
           jb  .next_dev
           mov eax, [bus]
           inc eax
           mov [bus], eax
           cmp eax, [last_bus]
           jna .next_bus
           xor eax, eax
           ret
.found:
           mov ebx, [bus]
           mov [ctrl.bus], ebx
 
           mov ecx, [devfn]
           mov [ctrl.devfn], ecx
 
           mov edx, eax
           and edx, 0xFFFF
           mov [ctrl.vendor], edx
           shr eax, 16
           mov [ctrl.dev_id], eax
 
           mov ebx, [edi+4]
           mov [ctrl.ctrl_ids], ebx
           mov [ctrl.vendor_ids], msg_SIS
 
           mov esi, [edi+8]
           mov [ctrl.ctrl_setup], esi
           ret
.err:
           xor eax, eax
           ret
endp
 
align 4
proc init_controller
 
           stdcall PciRead32, [ctrl.bus], [ctrl.devfn], dword 4
           mov ebx, eax
           and eax, 0xFFFF
           mov [ctrl.pci_cmd], eax
           shr ebx, 16
           mov [ctrl.pci_stat], ebx
 
           mov esi, msgPciCmd
           call SysMsgBoardStr
           call dword2str
           call SysMsgBoardStr
 
           mov esi, msgPciStat
           call SysMsgBoardStr
           mov eax, [ctrl.pci_stat]
           call dword2str
           call SysMsgBoardStr
 
           mov esi, msgMixIsaIo
           call SysMsgBoardStr
 
           stdcall PciRead32, [ctrl.bus], [ctrl.devfn], dword 0x10
 
           call dword2str
           call SysMsgBoardStr
 
           and eax,0xFFFE
           mov [ctrl.codec_io_base], eax
 
           mov esi, msgCtrlIsaIo
           call SysMsgBoardStr
 
           stdcall PciRead32, [ctrl.bus], [ctrl.devfn], dword 0x14
 
           call dword2str
           call SysMsgBoardStr
 
           and eax, 0xFFC0
           mov [ctrl.ctrl_io_base], eax
 
           mov esi, msgMixMMIo
           call SysMsgBoardStr
 
           stdcall PciRead32, [ctrl.bus], [ctrl.devfn], dword 0x18
           mov [ctrl.codec_mem_base], eax
 
           call dword2str
           call SysMsgBoardStr
 
           mov esi, msgCtrlMMIo
           call SysMsgBoardStr
 
           stdcall PciRead32, [ctrl.bus], [ctrl.devfn], dword 0x1C
           mov [ctrl.ctrl_mem_base], eax
 
           call dword2str
           call SysMsgBoardStr
.default:
           stdcall PciRead32, [ctrl.bus], [ctrl.devfn], dword 0x3C
           and eax, 0xFF
@@:
           mov [ctrl.int_line], eax
 
           stdcall PciRead8, [ctrl.bus], [ctrl.devfn], dword 0x41
           and eax, 0xFF
           mov [ctrl.cfg_reg], eax
 
           call [ctrl.ctrl_setup]
           xor eax, eax
           inc eax
           ret
endp
 
align 4
proc set_SIS
           mov [ctrl.codec_read16],  codec_io_r16    ;virtual
           mov [ctrl.codec_write16], codec_io_w16    ;virtual
 
           mov [ctrl.ctrl_read8 ],  ctrl_io_r8      ;virtual
           mov [ctrl.ctrl_read16],  ctrl_io_r16      ;virtual
           mov [ctrl.ctrl_read32],  ctrl_io_r32      ;virtual
 
           mov [ctrl.ctrl_write8 ], ctrl_io_w8      ;virtual
           mov [ctrl.ctrl_write16], ctrl_io_w16      ;virtual
           mov [ctrl.ctrl_write32], ctrl_io_w32      ;virtual
           ret
endp
 
align 4
proc reset_controller
 
           xor eax, eax
           mov edx, PCM_IN_CR_REG
           call [ctrl.ctrl_write8]
 
           mov edx, PCM_OUT_CR_REG
           call [ctrl.ctrl_write8]
 
           mov edx, MC_IN_CR_REG
           call [ctrl.ctrl_write8]
 
           mov eax, RR
           mov edx, PCM_IN_CR_REG
           call [ctrl.ctrl_write8]
 
           mov edx, PCM_OUT_CR_REG
           call [ctrl.ctrl_write8]
 
           mov edx, MC_IN_CR_REG
           call [ctrl.ctrl_write8]
           ret
endp
 
align 4
proc init_codec
           locals
             counter dd ?
           endl
 
           mov esi, msgControl
           call SysMsgBoardStr
 
           mov edx, GLOB_CTRL
           call [ctrl.ctrl_read32]
           call dword2str
           call SysMsgBoardStr
 
           mov esi, msgStatus
           call SysMsgBoardStr
 
           mov edx, CTRL_STAT
           call [ctrl.ctrl_read32]
           push eax
           call dword2str
           call SysMsgBoardStr
           pop eax
           cmp eax, 0xFFFFFFFF
           je .err
 
           test eax, CTRL_ST_CREADY
           jnz .done                    ;;;;;.ready
 
           call reset_codec
           test eax, eax
           jz .err
 
.ready:
           xor edx, edx     ;ac_reg_0
           call [ctrl.codec_write16]
 
           xor eax, eax
           mov edx, CODEC_REG_POWERDOWN
           call [ctrl.codec_write16]
 
           mov [counter], 200     ; total 200*5 ms = 1s
.wait:
           mov eax, 5000   ; wait 5 ms
           call StallExec
 
           mov edx, CODEC_REG_POWERDOWN
           call [ctrl.codec_read16]
           and eax, 0x0F
           cmp eax, 0x0F
           je .done
 
           sub [counter] , 1
           jnz .wait
.err:
           xor eax, eax        ; timeout error
           ret
.done:
           mov eax, 2      ;force set 16-bit 2-channel PCM
           mov edx, GLOB_CTRL
           call [ctrl.ctrl_write32]
           mov eax, 5000   ; wait 5 ms
           call StallExec
 
           call detect_codec
 
           xor eax, eax
           inc eax
           ret
endp
 
align 4
proc reset_codec
           mov edx, GLOB_CTRL
           call [ctrl.ctrl_read32]
 
           test eax, 0x02
           jz .cold
 
           call warm_reset
           jnc .ok
.cold:
           call cold_reset
           jnc .ok
 
     if DEBUG
           mov esi, msgCFail
           call SysMsgBoardStr
     end if
           xor eax, eax     ; timeout error
           ret
.ok:
           xor eax, eax
           inc eax
           ret
endp
 
align 4
proc warm_reset
           locals
             counter dd ?
           endl
 
           mov eax, 0x06
           mov edx, GLOB_CTRL
           call [ctrl.ctrl_write32]
 
     if DEBUG
           mov esi, msgWarm
           call SysMsgBoardStr
     end if
 
           mov [counter], 10    ; total 10*100 ms = 1s
.wait:
           mov eax, 100000    ; wait 100 ms
           call StallExec
 
           mov edx, CTRL_STAT
           call [ctrl.ctrl_read32]
           test eax, CTRL_ST_CREADY
           jnz .ok
 
           dec [counter]
           jnz .wait
 
     if DEBUG
           mov esi, msgWRFail
           call SysMsgBoardStr
     end if
.fail:
           stc
           ret
.ok:
           clc
           ret
endp
 
align 4
proc cold_reset
           locals
             counter dd ?
            endl
 
           mov eax, 0x02
           mov edx, GLOB_CTRL
           call [ctrl.ctrl_write32]
 
     if DEBUG
           mov esi, msgCold
           call SysMsgBoardStr
     end if
 
           mov eax, 400000     ; wait 400 ms
           call StallExec
 
           mov [counter], 16    ; total 20*100 ms = 2s
.wait:
 
           mov edx, CTRL_STAT
           call [ctrl.ctrl_read32]
           test eax, CTRL_ST_CREADY
           jnz .ok
 
           mov eax, 100000    ; wait 100 ms
           call StallExec
 
           dec [counter]
           jnz .wait
 
     if DEBUG
           mov esi, msgCRFail
           call SysMsgBoardStr
     end if
 
.fail:
           stc
           ret
.ok:
           mov esi, msgControl
           call SysMsgBoardStr
 
           mov edx, GLOB_CTRL
           call [ctrl.ctrl_read32]
           call dword2str
           call SysMsgBoardStr
 
           mov esi, msgStatus
           call SysMsgBoardStr
 
           mov edx, CTRL_STAT
           call [ctrl.ctrl_read32]
           push eax
           call dword2str
           call SysMsgBoardStr
           pop eax
 
           test eax, CTRL_ST_CREADY
           jz .fail
           clc
           ret
endp
 
align 4
play:
           xor eax, eax
           mov [civ_val], eax
           mov edx, PCM_OUT_CIV_REG
           call [ctrl.ctrl_write8]
 
           mov eax, 16
           mov [ctrl.lvi_reg], eax
           mov edx, PCM_OUT_LVI_REG
           call [ctrl.ctrl_write8]
 
           mov edx, PCM_OUT_CR_REG
           mov ax, 0x1D
           call [ctrl.ctrl_write8]
           xor eax, eax
           ret
 
align 4
stop:
           mov edx, PCM_OUT_CR_REG
           mov ax, 0x0
           call [ctrl.ctrl_write8]
 
           mov ax, 0x1c
           mov edx, PCM_OUT_SR_REG
           call [ctrl.ctrl_write16]
           xor eax, eax
           ret
 
align 4
proc get_dev_info stdcall, p_info:dword
           virtual at esi
             CTRL_INFO CTRL_INFO
           end virtual
 
           mov esi, [p_info]
           mov eax, [ctrl.int_line]
           mov ebx, [ctrl.codec_io_base]
           mov ecx, [ctrl.ctrl_io_base]
           mov edx, [ctrl.codec_mem_base]
           mov edi, [ctrl.ctrl_mem_base]
 
           mov [CTRL_INFO.irq], eax
           mov [CTRL_INFO.codec_io_base], ebx
           mov [CTRL_INFO.ctrl_io_base], ecx
           mov [CTRL_INFO.codec_mem_base], edx
           mov [CTRL_INFO.ctrl_mem_base], edi
 
           mov eax, [codec.chip_id]
           mov [CTRL_INFO.codec_id], eax
 
           mov edx, GLOB_CTRL
           call [ctrl.ctrl_read32]
           mov [CTRL_INFO.glob_cntrl], eax
 
           mov edx, CTRL_STAT
           call [ctrl.ctrl_read32]
           mov [CTRL_INFO.glob_sta], eax
 
           mov ebx, [ctrl.pci_cmd]
           mov [CTRL_INFO.pci_cmd], ebx
           ret
endp
 
align 4
proc set_callback stdcall, handler:dword
           mov eax, [handler]
           mov [ctrl.user_callback], eax
           ret
endp
 
align 4
proc codec_read stdcall, ac_reg:dword	   ; reg = edx, reval = eax
 
           mov edx, [ac_reg]
 
           mov ebx, edx
           shr ebx, 1
           bt [codec.shadow_flag], ebx
           jc .use_shadow
 
           call [ctrl.codec_read16]  ;change edx !!!
           mov ecx, eax
 
           mov edx, CTRL_STAT
           call [ctrl.ctrl_read32]
           test eax, CTRL_ST_RCS
           jz .read_ok
 
           mov edx, CTRL_STAT
           call [ctrl.ctrl_write32]
           xor eax,eax
           not eax  ;timeout
           ret
.read_ok:
           mov edx, [ac_reg]
           mov [codec.regs+edx], cx
           bts [codec.shadow_flag], ebx
           mov eax, ecx
           ret
.use_shadow:
           movzx eax, word [codec.regs+edx]
           ret
endp
 
align 4
proc codec_write stdcall, ac_reg:dword
           push eax
           call check_semafore
           and eax, eax
           jz .err
           pop eax
 
           mov esi, [ac_reg]
           mov edx, esi
           call [ctrl.codec_write16]
           mov [codec.regs+esi], ax
           shr esi, 1
           bts [codec.shadow_flag], esi
           ret
.err:
           pop eax
           ret
endp
 
align 4
proc codec_check_ready
 
           mov edx, CTRL_ST
           call [ctrl.ctrl_read32]
           and eax, CTRL_ST_CREADY
           jz .not_ready
 
           xor eax, wax
           inc eax
           ret
.not_ready:
           xor eax, eax
           ret
endp
 
align 4
proc check_semafore
           local counter:DWORD
 
           mov [counter], 100
.l1:
           mov edx, CTRL_CAS
           call [ctrl.ctrl_read8]
           and eax, CAS_FLAG
           jz .ok
 
           mov eax, 1
           call StallExec
           sub [counter], 1
           jnz .l1
           xor eax, eax
           ret
align 4
.ok:
           xor eax,eax
           inc eax
           ret
endp
 
align 4
proc StallExec
           push ecx
           push edx
           push ebx
           push eax
 
           mov ecx, CPU_FREQ
           mul ecx
           mov ebx, eax       ;low
           mov ecx, edx       ;high
           rdtsc
           add ebx, eax
           adc ecx, edx
@@:
           rdtsc
           sub eax, ebx
           sbb edx, ecx
           js @B
 
           pop eax
           pop ebx
           pop edx
           pop ecx
           ret
endp
 
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;          CONTROLLER IO functions
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
align 4
proc codec_io_r16
           add edx, [ctrl.codec_io_base]
           in  ax, dx
           ret
endp
 
align 4
proc codec_io_w16
           add edx, [ctrl.codec_io_base]
           out dx, ax
           ret
endp
 
align 4
proc ctrl_io_r8
           add edx, [ctrl.ctrl_io_base]
           in  al, dx
           ret
endp
 
align 4
proc ctrl_io_r16
           add edx, [ctrl.ctrl_io_base]
           in  ax, dx
           ret
endp
 
align 4
proc ctrl_io_r32
           add edx, [ctrl.ctrl_io_base]
           in  eax, dx
           ret
endp
 
align 4
proc ctrl_io_w8
           add edx, [ctrl.ctrl_io_base]
           out dx, al
           ret
endp
 
align 4
proc ctrl_io_w16
           add edx, [ctrl.ctrl_io_base]
           out dx, ax
           ret
endp
 
align 4
proc ctrl_io_w32
           add edx, [ctrl.ctrl_io_base]
           out dx, eax
           ret
endp
 
align 4
dword2str:
      mov  esi, hex_buff
      mov ecx, -8
@@:
      rol eax, 4
      mov ebx, eax
      and ebx, 0x0F
      mov bl, [ebx+hexletters]
      mov [8+esi+ecx], bl
      inc ecx
      jnz @B
      ret
 
hexletters   db '0123456789ABCDEF'
hex_buff     db 8 dup(0),13,10,0
 
include "codec.inc"
 
align 4
devices dd (CTRL_SIS  shl 16)+VID_SIS,msg_AC, set_SIS
        dd 0
 
version      dd (5 shl 16) or (API_VERSION and 0xFFFF)
 
msg_AC       db '7012 AC97 controller',13,10, 0
msg_SIS      db 'Silicon Integrated Systems',13,10, 0
 
sz_sound_srv	    db 'SOUND',0
 
msgInit      db 'detect hardware...',13,10,0
msgFail      db 'device not found',13,10,0
msgAttchIRQ  db 'IRQ line not supported', 13,10, 0
msgInvIRQ    db 'IRQ line not assigned or invalid', 13,10, 0
msgPlay      db 'start play', 13,10,0
msgStop      db 'stop play',  13,10,0
;msgNotify    db 'call notify',13,10,0
msgIRQ       db 'AC97 IRQ', 13,10,0
msgInitCtrl  db 'init controller',13,10,0
;msgInitCodec db 'init codec',13,10,0
msgPrimBuff  db 'create primary buffer ...',0
msgDone      db 'done',13,10,0
msgRemap     db 'Remap IRQ',13,10,0
;msgReg       db 'set service handler',13,10,0
msgOk        db 'service installed',13,10,0
msgCold      db 'cold reset',13,10,0
msgWarm      db 'warm reset',13,10,0
msgWRFail    db 'warm reset failed',13,10,0
msgCRFail    db 'cold reset failed',13,10,0
msgCFail     db 'codec not ready',13,10,0
msgResetOk   db 'reset complete',13,10,0
msgStatus    db 'global status   ',0
msgControl   db 'global control  ',0
msgPciCmd    db 'PCI command     ',0
msgPciStat   db 'PCI status      ',0
msgCtrlIsaIo db 'controller io base   ',0
msgMixIsaIo  db 'codec io base        ',0
msgCtrlMMIo  db 'controller mmio base ',0
msgMixMMIo   db 'codec mmio base      ',0
msgIrqMap    db 'AC97 irq map as      ',0
 
section '.data' data readable writable align 16
 
pcmout_bdl       rq 32
buff_list        rd 32
 
codec CODEC
ctrl AC_CNTRL
 
lpc_bus  rd 1
civ_val  rd 1

Rev 579	Rev 708
1	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;	1	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2	;; ;;	2	;; ;;
3	;; Copyright (C) KolibriOS team 2004-2007. All rights reserved. ;;	3	;; Copyright (C) KolibriOS team 2004-2007. All rights reserved. ;;
4	;; Distributed under terms of the GNU General Public License ;;	4	;; Distributed under terms of the GNU General Public License ;;
5	;; ;;	5	;; ;;
6	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;	6	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
7		7
8	format MS COFF	8	format MS COFF
9		9
10	include 'proc32.inc'	10	include 'proc32.inc'
11	include 'imports.inc'	11	include 'imports.inc'
12		12
13	API_VERSION equ 0x01000100	13	API_VERSION equ 0x01000100
14		14
15	DEBUG equ 1	15	DEBUG equ 1
16	DEBUG_IRQ equ 0	16	DEBUG_IRQ equ 0
17		17
18	USE_COM_IRQ equ 0 ;make irq 3 and irq 4 available for PCI devices	18	USE_COM_IRQ equ 0 ;make irq 3 and irq 4 available for PCI devices
19	IRQ_REMAP equ 0	19	IRQ_REMAP equ 0
20	IRQ_LINE equ 0	20	IRQ_LINE equ 0
21		21
22		22
23	;irq 0,1,2,8,12,13 íåäîñòóïíû	23	;irq 0,1,2,8,12,13 íåäîñòóïíû
24	; FEDCBA9876543210	24	; FEDCBA9876543210
25	VALID_IRQ equ 1100111011111000b	25	VALID_IRQ equ 1100111011111000b
26	ATTCH_IRQ equ 0000111010100000b	26	ATTCH_IRQ equ 0000111010100000b
27		27
28	if USE_COM_IRQ	28	if USE_COM_IRQ
29	ATTCH_IRQ equ 0000111010111000b	29	ATTCH_IRQ equ 0000111010111000b
30	end if	30	end if
31		31
32	CPU_FREQ equ 2600d	32	CPU_FREQ equ 2600d
33		33
34	BIT0 EQU 0x00000001	34	BIT0 EQU 0x00000001
35	BIT1 EQU 0x00000002	35	BIT1 EQU 0x00000002
36	BIT2 EQU 0x00000004	36	BIT2 EQU 0x00000004
37	BIT3 EQU 0x00000008	37	BIT3 EQU 0x00000008
38	BIT4 EQU 0x00000010	38	BIT4 EQU 0x00000010
39	BIT5 EQU 0x00000020	39	BIT5 EQU 0x00000020
40	BIT6 EQU 0x00000040	40	BIT6 EQU 0x00000040
41	BIT7 EQU 0x00000080	41	BIT7 EQU 0x00000080
42	BIT8 EQU 0x00000100	42	BIT8 EQU 0x00000100
43	BIT9 EQU 0x00000200	43	BIT9 EQU 0x00000200
44	BIT10 EQU 0x00000400	44	BIT10 EQU 0x00000400
45	BIT11 EQU 0x00000800	45	BIT11 EQU 0x00000800
46	BIT12 EQU 0x00001000	46	BIT12 EQU 0x00001000
47	BIT13 EQU 0x00002000	47	BIT13 EQU 0x00002000
48	BIT14 EQU 0x00004000	48	BIT14 EQU 0x00004000
49	BIT15 EQU 0x00008000	49	BIT15 EQU 0x00008000
50	BIT16 EQU 0x00010000	50	BIT16 EQU 0x00010000
51	BIT17 EQU 0x00020000	51	BIT17 EQU 0x00020000
52	BIT18 EQU 0x00040000	52	BIT18 EQU 0x00040000
53	BIT19 EQU 0x00080000	53	BIT19 EQU 0x00080000
54	BIT20 EQU 0x00100000	54	BIT20 EQU 0x00100000
55	BIT21 EQU 0x00200000	55	BIT21 EQU 0x00200000
56	BIT22 EQU 0x00400000	56	BIT22 EQU 0x00400000
57	BIT23 EQU 0x00800000	57	BIT23 EQU 0x00800000
58	BIT24 EQU 0x00100000	58	BIT24 EQU 0x00100000
59	BIT25 EQU 0x02000000	59	BIT25 EQU 0x02000000
60	BIT26 EQU 0x04000000	60	BIT26 EQU 0x04000000
61	BIT27 EQU 0x08000000	61	BIT27 EQU 0x08000000
62	BIT28 EQU 0x10000000	62	BIT28 EQU 0x10000000
63	BIT29 EQU 0x20000000	63	BIT29 EQU 0x20000000
64	BIT30 EQU 0x40000000	64	BIT30 EQU 0x40000000
65	BIT31 EQU 0x80000000	65	BIT31 EQU 0x80000000
66		66
67	VID_SIS equ 0x1039	67	VID_SIS equ 0x1039
68	CTRL_SIS equ 0x7012	68	CTRL_SIS equ 0x7012
69		69
70	PCM_OUT_BDL equ 0x10 ; PCM out buffer descriptors list	70	PCM_OUT_BDL equ 0x10 ; PCM out buffer descriptors list
71	PCM_OUT_CR_REG equ 0x1b ; PCM out Control Register	71	PCM_OUT_CR_REG equ 0x1b ; PCM out Control Register
72	PCM_OUT_LVI_REG equ 0x15 ; PCM last valid index	72	PCM_OUT_LVI_REG equ 0x15 ; PCM last valid index
73	PCM_OUT_SR_REG equ 0x18 ; PCM out Status register	73	PCM_OUT_SR_REG equ 0x18 ; PCM out Status register
74	PCM_OUT_PIV_REG equ 0x1a ; PCM out prefetched index	74	PCM_OUT_PIV_REG equ 0x1a ; PCM out prefetched index
75	PCM_OUT_CIV_REG equ 0x14 ; PCM out current index	75	PCM_OUT_CIV_REG equ 0x14 ; PCM out current index
76		76
77	PCM_IN_CR_REG equ 0x0b ; PCM in Control Register	77	PCM_IN_CR_REG equ 0x0b ; PCM in Control Register
78	MC_IN_CR_REG equ 0x2b ; MIC in Control Register	78	MC_IN_CR_REG equ 0x2b ; MIC in Control Register
79	RR equ BIT1 ; reset registers. Nukes all regs	79	RR equ BIT1 ; reset registers. Nukes all regs
80		80
81	CODEC_MASTER_VOL_REG equ 0x02	81	CODEC_MASTER_VOL_REG equ 0x02
82	CODEC_AUX_VOL equ 0x04 ;	82	CODEC_AUX_VOL equ 0x04 ;
83	CODEC_PCM_OUT_REG equ 0x18 ; PCM output volume	83	CODEC_PCM_OUT_REG equ 0x18 ; PCM output volume
84	CODEC_EXT_AUDIO_REG equ 0x28 ; extended audio	84	CODEC_EXT_AUDIO_REG equ 0x28 ; extended audio
85	CODEC_EXT_AUDIO_CTRL_REG equ 0x2a ; extended audio control	85	CODEC_EXT_AUDIO_CTRL_REG equ 0x2a ; extended audio control
86	CODEC_PCM_FRONT_DACRATE_REG equ 0x2c ; PCM out sample rate	86	CODEC_PCM_FRONT_DACRATE_REG equ 0x2c ; PCM out sample rate
87	CODEC_PCM_SURND_DACRATE_REG equ 0x2e ; surround sound sample rate	87	CODEC_PCM_SURND_DACRATE_REG equ 0x2e ; surround sound sample rate
88	CODEC_PCM_LFE_DACRATE_REG equ 0x30 ; LFE sample rate	88	CODEC_PCM_LFE_DACRATE_REG equ 0x30 ; LFE sample rate
89		89
90	GLOB_CTRL equ 0x2C ; Global Control	90	GLOB_CTRL equ 0x2C ; Global Control
91	CTRL_STAT equ 0x30 ; Global Status	91	CTRL_STAT equ 0x30 ; Global Status
92	CTRL_CAS equ 0x34 ; Codec Access Semiphore	92	CTRL_CAS equ 0x34 ; Codec Access Semiphore
93		93
94	CAS_FLAG equ 0x01 ; Codec Access Semiphore Bit	94	CAS_FLAG equ 0x01 ; Codec Access Semiphore Bit
95		95
96	CTRL_ST_CREADY equ BIT8+BIT9+BIT28 ; Primary Codec Ready	96	CTRL_ST_CREADY equ BIT8+BIT9+BIT28 ; Primary Codec Ready
97		97
98	CTRL_ST_RCS equ 0x00008000 ; Read Completion Status	98	CTRL_ST_RCS equ 0x00008000 ; Read Completion Status
99		99
100	CTRL_CNT_CRIE equ BIT4+BIT5+BIT6 ; Codecs Resume Interrupt Enable	100	CTRL_CNT_CRIE equ BIT4+BIT5+BIT6 ; Codecs Resume Interrupt Enable
101	CTRL_CNT_AC_OFF equ 0x00000008 ; ACLINK Off	101	CTRL_CNT_AC_OFF equ 0x00000008 ; ACLINK Off
102	CTRL_CNT_WARM equ 0x00000004 ; AC97 Warm Reset	102	CTRL_CNT_WARM equ 0x00000004 ; AC97 Warm Reset
103	CTRL_CNT_COLD equ 0x00000002 ; AC97 Cold Reset	103	CTRL_CNT_COLD equ 0x00000002 ; AC97 Cold Reset
104	CTRL_CNT_GIE equ 0x00000001 ; GPI Interrupt Enable	104	CTRL_CNT_GIE equ 0x00000001 ; GPI Interrupt Enable
105		105
106	CODEC_REG_POWERDOWN equ 0x26	106	CODEC_REG_POWERDOWN equ 0x26
107	CODEC_REG_ST equ 0x26	107	CODEC_REG_ST equ 0x26
108		108
109	SRV_GETVERSION equ 0	109	SRV_GETVERSION equ 0
110	DEV_PLAY equ 1	110	DEV_PLAY equ 1
111	DEV_STOP equ 2	111	DEV_STOP equ 2
112	DEV_CALLBACK equ 3	112	DEV_CALLBACK equ 3
113	DEV_SET_BUFF equ 4	113	DEV_SET_BUFF equ 4
114	DEV_NOTIFY equ 5	114	DEV_NOTIFY equ 5
115	DEV_SET_MASTERVOL equ 6	115	DEV_SET_MASTERVOL equ 6
116	DEV_GET_MASTERVOL equ 7	116	DEV_GET_MASTERVOL equ 7
117	DEV_GET_INFO equ 8	117	DEV_GET_INFO equ 8
118		118
119	struc AC_CNTRL ;AC controller base class	119	struc AC_CNTRL ;AC controller base class
120	{ .bus dd ?	120	{ .bus dd ?
121	.devfn dd ?	121	.devfn dd ?
122		122
123	.vendor dd ?	123	.vendor dd ?
124	.dev_id dd ?	124	.dev_id dd ?
125	.pci_cmd dd ?	125	.pci_cmd dd ?
126	.pci_stat dd ?	126	.pci_stat dd ?
127		127
128	.codec_io_base dd ?	128	.codec_io_base dd ?
129	.codec_mem_base dd ?	129	.codec_mem_base dd ?
130		130
131	.ctrl_io_base dd ?	131	.ctrl_io_base dd ?
132	.ctrl_mem_base dd ?	132	.ctrl_mem_base dd ?
133	.cfg_reg dd ?	133	.cfg_reg dd ?
134	.int_line dd ?	134	.int_line dd ?
135		135
136	.vendor_ids dd ? ;vendor id string	136	.vendor_ids dd ? ;vendor id string
137	.ctrl_ids dd ? ;hub id string	137	.ctrl_ids dd ? ;hub id string
138		138
139	.buffer dd ?	139	.buffer dd ?
140		140
141	.notify_pos dd ?	141	.notify_pos dd ?
142	.notify_task dd ?	142	.notify_task dd ?
143		143
144	.lvi_reg dd ?	144	.lvi_reg dd ?
145	.ctrl_setup dd ?	145	.ctrl_setup dd ?
146	.user_callback dd ?	146	.user_callback dd ?
147	.codec_read16 dd ?	147	.codec_read16 dd ?
148	.codec_write16 dd ?	148	.codec_write16 dd ?
149		149
150	.ctrl_read8 dd ?	150	.ctrl_read8 dd ?
151	.ctrl_read16 dd ?	151	.ctrl_read16 dd ?
152	.ctrl_read32 dd ?	152	.ctrl_read32 dd ?
153		153
154	.ctrl_write8 dd ?	154	.ctrl_write8 dd ?
155	.ctrl_write16 dd ?	155	.ctrl_write16 dd ?
156	.ctrl_write32 dd ?	156	.ctrl_write32 dd ?
157	}	157	}
158		158
159	struc CODEC ;Audio Chip base class	159	struc CODEC ;Audio Chip base class
160	{	160	{
161	.chip_id dd ?	161	.chip_id dd ?
162	.flags dd ?	162	.flags dd ?
163	.status dd ?	163	.status dd ?
164		164
165	.ac_vendor_ids dd ? ;ac vendor id string	165	.ac_vendor_ids dd ? ;ac vendor id string
166	.chip_ids dd ? ;chip model string	166	.chip_ids dd ? ;chip model string
167		167
168	.shadow_flag dd ?	168	.shadow_flag dd ?
169	dd ?	169	dd ?
170		170
171	.regs dw ? ; codec registers	171	.regs dw ? ; codec registers
172	.reg_master_vol dw ? ;0x02	172	.reg_master_vol dw ? ;0x02
173	.reg_aux_out_vol dw ? ;0x04	173	.reg_aux_out_vol dw ? ;0x04
174	.reg_mone_vol dw ? ;0x06	174	.reg_mone_vol dw ? ;0x06
175	.reg_master_tone dw ? ;0x08	175	.reg_master_tone dw ? ;0x08
176	.reg_beep_vol dw ? ;0x0A	176	.reg_beep_vol dw ? ;0x0A
177	.reg_phone_vol dw ? ;0x0C	177	.reg_phone_vol dw ? ;0x0C
178	.reg_mic_vol dw ? ;0x0E	178	.reg_mic_vol dw ? ;0x0E
179	.reg_line_in_vol dw ? ;0x10	179	.reg_line_in_vol dw ? ;0x10
180	.reg_cd_vol dw ? ;0x12	180	.reg_cd_vol dw ? ;0x12
181	.reg_video_vol dw ? ;0x14	181	.reg_video_vol dw ? ;0x14
182	.reg_aux_in_vol dw ? ;0x16	182	.reg_aux_in_vol dw ? ;0x16
183	.reg_pcm_out_vol dw ? ;0x18	183	.reg_pcm_out_vol dw ? ;0x18
184	.reg_rec_select dw ? ;0x1A	184	.reg_rec_select dw ? ;0x1A
185	.reg_rec_gain dw ? ;0x1C	185	.reg_rec_gain dw ? ;0x1C
186	.reg_rec_gain_mic dw ? ;0x1E	186	.reg_rec_gain_mic dw ? ;0x1E
187	.reg_gen dw ? ;0x20	187	.reg_gen dw ? ;0x20
188	.reg_3d_ctrl dw ? ;0X22	188	.reg_3d_ctrl dw ? ;0X22
189	.reg_page dw ? ;0X24	189	.reg_page dw ? ;0X24
190	.reg_powerdown dw ? ;0x26	190	.reg_powerdown dw ? ;0x26
191	.reg_ext_audio dw ? ;0x28	191	.reg_ext_audio dw ? ;0x28
192	.reg_ext_st dw ? ;0x2a	192	.reg_ext_st dw ? ;0x2a
193	.reg_pcm_front_rate dw ? ;0x2c	193	.reg_pcm_front_rate dw ? ;0x2c
194	.reg_pcm_surr_rate dw ? ;0x2e	194	.reg_pcm_surr_rate dw ? ;0x2e
195	.reg_lfe_rate dw ? ;0x30	195	.reg_lfe_rate dw ? ;0x30
196	.reg_pcm_in_rate dw ? ;0x32	196	.reg_pcm_in_rate dw ? ;0x32
197	dw ? ;0x34	197	dw ? ;0x34
198	.reg_cent_lfe_vol dw ? ;0x36	198	.reg_cent_lfe_vol dw ? ;0x36
199	.reg_surr_vol dw ? ;0x38	199	.reg_surr_vol dw ? ;0x38
200	.reg_spdif_ctrl dw ? ;0x3A	200	.reg_spdif_ctrl dw ? ;0x3A
201	dw ? ;0x3C	201	dw ? ;0x3C
202	dw ? ;0x3E	202	dw ? ;0x3E
203	dw ? ;0x40	203	dw ? ;0x40
204	dw ? ;0x42	204	dw ? ;0x42
205	dw ? ;0x44	205	dw ? ;0x44
206	dw ? ;0x46	206	dw ? ;0x46
207	dw ? ;0x48	207	dw ? ;0x48
208	dw ? ;0x4A	208	dw ? ;0x4A
209	dw ? ;0x4C	209	dw ? ;0x4C
210	dw ? ;0x4E	210	dw ? ;0x4E
211	dw ? ;0x50	211	dw ? ;0x50
212	dw ? ;0x52	212	dw ? ;0x52
213	dw ? ;0x54	213	dw ? ;0x54
214	dw ? ;0x56	214	dw ? ;0x56
215	dw ? ;0x58	215	dw ? ;0x58
216	dw ? ;0x5A	216	dw ? ;0x5A
217	dw ? ;0x5C	217	dw ? ;0x5C
218	dw ? ;0x5E	218	dw ? ;0x5E
219	.reg_page_0 dw ? ;0x60	219	.reg_page_0 dw ? ;0x60
220	.reg_page_1 dw ? ;0x62	220	.reg_page_1 dw ? ;0x62
221	.reg_page_2 dw ? ;0x64	221	.reg_page_2 dw ? ;0x64
222	.reg_page_3 dw ? ;0x66	222	.reg_page_3 dw ? ;0x66
223	.reg_page_4 dw ? ;0x68	223	.reg_page_4 dw ? ;0x68
224	.reg_page_5 dw ? ;0x6A	224	.reg_page_5 dw ? ;0x6A
225	.reg_page_6 dw ? ;0x6C	225	.reg_page_6 dw ? ;0x6C
226	.reg_page_7 dw ? ;0x6E	226	.reg_page_7 dw ? ;0x6E
227	dw ? ;0x70	227	dw ? ;0x70
228	dw ? ;0x72	228	dw ? ;0x72
229	dw ? ;0x74	229	dw ? ;0x74
230	dw ? ;0x76	230	dw ? ;0x76
231	dw ? ;0x78	231	dw ? ;0x78
232	dw ? ;0x7A	232	dw ? ;0x7A
233	.reg_vendor_id_1 dw ? ;0x7C	233	.reg_vendor_id_1 dw ? ;0x7C
234	.reg_vendor_id_2 dw ? ;0x7E	234	.reg_vendor_id_2 dw ? ;0x7E
235		235
236		236
237	.reset dd ? ;virual	237	.reset dd ? ;virual
238	.set_master_vol dd ?	238	.set_master_vol dd ?
239	}	239	}
240		240
241	struc CTRL_INFO	241	struc CTRL_INFO
242	{ .pci_cmd dd ?	242	{ .pci_cmd dd ?
243	.irq dd ?	243	.irq dd ?
244	.glob_cntrl dd ?	244	.glob_cntrl dd ?
245	.glob_sta dd ?	245	.glob_sta dd ?
246	.codec_io_base dd ?	246	.codec_io_base dd ?
247	.ctrl_io_base dd ?	247	.ctrl_io_base dd ?
248	.codec_mem_base dd ?	248	.codec_mem_base dd ?
249	.ctrl_mem_base dd ?	249	.ctrl_mem_base dd ?
250	.codec_id dd ?	250	.codec_id dd ?
251	}	251	}
252		252
253	struc IOCTL	253	struc IOCTL
254	{ .handle dd ?	254	{ .handle dd ?
255	.io_code dd ?	255	.io_code dd ?
256	.input dd ?	256	.input dd ?
257	.inp_size dd ?	257	.inp_size dd ?
258	.output dd ?	258	.output dd ?
259	.out_size dd ?	259	.out_size dd ?
260	}	260	}
261		261
262	virtual at 0	262	virtual at 0
263	IOCTL IOCTL	263	IOCTL IOCTL
264	end virtual	264	end virtual
265		265
266	EVENT_NOTIFY equ 0x00000200	266	EVENT_NOTIFY equ 0x00000200
267		267
268	public START	268	public START
269	public service_proc	269	public service_proc
270	public version	270	public version
271		271
272	section '.flat' code readable align 16	272	section '.flat' code readable align 16
273		273
274	proc START stdcall, state:dword	274	proc START stdcall, state:dword
275		275
276	cmp [state], 1	276	cmp [state], 1
277	jne .stop	277	jne .stop
278		278
279	if DEBUG	279	if DEBUG
280	mov esi, msgInit	280	mov esi, msgInit
281	call SysMsgBoardStr	281	call SysMsgBoardStr
282	end if	282	end if
283		283
284	call detect_controller	284	call detect_controller
285	test eax, eax	285	test eax, eax
286	jz .fail	286	jz .fail
287		287
288	if DEBUG	288	if DEBUG
289	mov esi,[ctrl.vendor_ids]	289	mov esi,[ctrl.vendor_ids]
290	call SysMsgBoardStr	290	call SysMsgBoardStr
291	mov esi, [ctrl.ctrl_ids]	291	mov esi, [ctrl.ctrl_ids]
292	call SysMsgBoardStr	292	call SysMsgBoardStr
293		293
294	end if	294	end if
295		295
296	call init_controller	296	call init_controller
297	test eax, eax	297	test eax, eax
298	jz .fail	298	jz .fail
299		299
300	call init_codec	300	call init_codec
301	test eax, eax	301	test eax, eax
302	jz .fail	302	jz .fail
303		303
304	call reset_controller	304	call reset_controller
305	call setup_codec	305	call setup_codec
306		306
307	mov esi, msgPrimBuff	307	mov esi, msgPrimBuff
308	call SysMsgBoardStr	308	call SysMsgBoardStr
309	call create_primary_buff	309	call create_primary_buff
310	mov esi, msgDone	310	mov esi, msgDone
311	call SysMsgBoardStr	311	call SysMsgBoardStr
312		312
313	if IRQ_REMAP	313	if IRQ_REMAP
314	pushf	314	pushf
315	cli	315	cli
316		316
317	mov ebx, [ctrl.int_line]	317	mov ebx, [ctrl.int_line]
318	in al, 0xA1	318	in al, 0xA1
319	mov ah, al	319	mov ah, al
320	in al, 0x21	320	in al, 0x21
321	test ebx, ebx	321	test ebx, ebx
322	jz .skip	322	jz .skip
323	bts ax, bx ;mask old line	323	bts ax, bx ;mask old line
324	.skip	324	.skip
325	bts ax, IRQ_LINE ;mask new ine	325	bts ax, IRQ_LINE ;mask new ine
326	out 0x21, al	326	out 0x21, al
327	mov al, ah	327	mov al, ah
328	out 0xA1, al	328	out 0xA1, al
329	;remap IRQ	329	;remap IRQ
330	stdcall PciWrite8, 0, 0xF8, 0x61, IRQ_LINE	330	stdcall PciWrite8, 0, 0xF8, 0x61, IRQ_LINE
331		331
332	mov dx, 0x4d0 ;8259 ELCR1	332	mov dx, 0x4d0 ;8259 ELCR1
333	in al, dx	333	in al, dx
334	bts ax, IRQ_LINE	334	bts ax, IRQ_LINE
335	out dx, al ;set level-triggered mode	335	out dx, al ;set level-triggered mode
336	mov [ctrl.int_line], IRQ_LINE	336	mov [ctrl.int_line], IRQ_LINE
337	popf	337	popf
338	mov esi, msgRemap	338	mov esi, msgRemap
339	call SysMsgBoardStr	339	call SysMsgBoardStr
340	end if	340	end if
341		341
342	mov eax, VALID_IRQ	342	mov eax, VALID_IRQ
343	mov ebx, [ctrl.int_line]	343	mov ebx, [ctrl.int_line]
344	mov esi, msgInvIRQ	344	mov esi, msgInvIRQ
345	bt eax, ebx	345	bt eax, ebx
346	jnc .fail_msg	346	jnc .fail_msg
347	mov eax, ATTCH_IRQ	347	mov eax, ATTCH_IRQ
348	mov esi, msgAttchIRQ	348	mov esi, msgAttchIRQ
349	bt eax, ebx	349	bt eax, ebx
350	jnc .fail_msg	350	jnc .fail_msg
351		351
352	stdcall AttachIntHandler, ebx, ac97_irq	352	stdcall AttachIntHandler, ebx, ac97_irq
353	.reg:	353	.reg:
354	stdcall RegService, sz_sound_srv, service_proc	354	stdcall RegService, sz_sound_srv, service_proc
355	ret	355	ret
356	.fail:	356	.fail:
357	if DEBUG	357	if DEBUG
358	mov esi, msgFail	358	mov esi, msgFail
359	call SysMsgBoardStr	359	call SysMsgBoardStr
360	end if	360	end if
361	xor eax, eax	361	xor eax, eax
362	ret	362	ret
363	.fail_msg:	363	.fail_msg:
364	call SysMsgBoardStr	364	call SysMsgBoardStr
365	xor eax, eax	365	xor eax, eax
366	ret	366	ret
367	.stop:	367	.stop:
368	call stop	368	call stop
369	xor eax, eax	369	xor eax, eax
370	ret	370	ret
371	endp	371	endp
372		372
373	handle equ IOCTL.handle	373	handle equ IOCTL.handle
374	io_code equ IOCTL.io_code	374	io_code equ IOCTL.io_code
375	input equ IOCTL.input	375	input equ IOCTL.input
376	inp_size equ IOCTL.inp_size	376	inp_size equ IOCTL.inp_size
377	output equ IOCTL.output	377	output equ IOCTL.output
378	out_size equ IOCTL.out_size	378	out_size equ IOCTL.out_size
379		379
380	align 4	380	align 4
381	proc service_proc stdcall, ioctl:dword	381	proc service_proc stdcall, ioctl:dword
382		382
383	mov edi, [ioctl]	383	mov edi, [ioctl]
384	mov eax, [edi+io_code]	384	mov eax, [edi+io_code]
385		385
386	cmp eax, SRV_GETVERSION	386	cmp eax, SRV_GETVERSION
387	jne @F	387	jne @F
388		388
389	mov eax, [edi+output]	389	mov eax, [edi+output]
390	cmp [edi+out_size], 4	390	cmp [edi+out_size], 4
391	jne .fail	391	jne .fail
392		392
393	mov [eax], dword API_VERSION	393	mov [eax], dword API_VERSION
394	xor eax, eax	394	xor eax, eax
395	ret	395	ret
396	@@:	396	@@:
397	cmp eax, DEV_PLAY	397	cmp eax, DEV_PLAY
398	jne @F	398	jne @F
399	if DEBUG	399	if DEBUG
400	mov esi, msgPlay	400	mov esi, msgPlay
401	call SysMsgBoardStr	401	call SysMsgBoardStr
402	end if	402	end if
403	call play	403	call play
404	ret	404	ret
405	@@:	405	@@:
406	cmp eax, DEV_STOP	406	cmp eax, DEV_STOP
407	jne @F	407	jne @F
408	if DEBUG	408	if DEBUG
409	mov esi, msgStop	409	mov esi, msgStop
410	call SysMsgBoardStr	410	call SysMsgBoardStr
411	end if	411	end if
412	call stop	412	call stop
413	ret	413	ret
414	@@:	414	@@:
415	cmp eax, DEV_CALLBACK	415	cmp eax, DEV_CALLBACK
416	jne @F	416	jne @F
417	mov ebx, [edi+input]	417	mov ebx, [edi+input]
418	stdcall set_callback, [ebx]	418	stdcall set_callback, [ebx]
419	ret	419	ret
420	@@:	420	@@:
421	cmp eax, DEV_SET_MASTERVOL	421	cmp eax, DEV_SET_MASTERVOL
422	jne @F	422	jne @F
423	mov eax, [edi+input]	423	mov eax, [edi+input]
424	mov eax, [eax]	424	mov eax, [eax]
425	call set_master_vol ;eax= vol	425	call set_master_vol ;eax= vol
426	ret	426	ret
427	@@:	427	@@:
428	cmp eax, DEV_GET_MASTERVOL	428	cmp eax, DEV_GET_MASTERVOL
429	jne @F	429	jne @F
430	mov ebx, [edi+output]	430	mov ebx, [edi+output]
431	stdcall get_master_vol, ebx	431	stdcall get_master_vol, ebx
432	ret	432	ret
433	;@@:	433	;@@:
434	; cmp eax, DEV_GET_INFO	434	; cmp eax, DEV_GET_INFO
435	; jne @F	435	; jne @F
436	; mov ebx, [edi+output]	436	; mov ebx, [edi+output]
437	; stdcall get_dev_info, ebx	437	; stdcall get_dev_info, ebx
438	; ret	438	; ret
439	@@:	439	@@:
440	.fail:	440	.fail:
441	or eax, -1	441	or eax, -1
442	ret	442	ret
443	endp	443	endp
444		444
445	restore handle	445	restore handle
446	restore io_code	446	restore io_code
447	restore input	447	restore input
448	restore inp_size	448	restore inp_size
449	restore output	449	restore output
450	restore out_size	450	restore out_size
451		451
452	align 4	452	align 4
453	proc ac97_irq	453	proc ac97_irq
454		454
455	if DEBUG_IRQ	455	if DEBUG_IRQ
456	mov esi, msgIRQ	456	mov esi, msgIRQ
457	call SysMsgBoardStr	457	call SysMsgBoardStr
458	end if	458	end if
459		459
460	mov edx, PCM_OUT_CR_REG	460	mov edx, PCM_OUT_CR_REG
461	mov al, 0x10	461	mov al, 0x10
462	call [ctrl.ctrl_write8]	462	call [ctrl.ctrl_write8]
463		463
464	mov ax, 0x1c	464	mov ax, 0x1c
465	mov edx, PCM_OUT_SR_REG	465	mov edx, PCM_OUT_SR_REG
466	call [ctrl.ctrl_write16]	466	call [ctrl.ctrl_write16]
467		467
468	mov edx, PCM_OUT_CIV_REG	468	mov edx, PCM_OUT_CIV_REG
469	call [ctrl.ctrl_read8]	469	call [ctrl.ctrl_read8]
470		470
471	and eax, 0x1F	471	and eax, 0x1F
472	cmp eax, [civ_val]	472	cmp eax, [civ_val]
473	je .skip	473	je .skip
474		474
475	mov [civ_val], eax	475	mov [civ_val], eax
476	dec eax	476	dec eax
477	and eax, 0x1F	477	and eax, 0x1F
478	mov [ctrl.lvi_reg], eax	478	mov [ctrl.lvi_reg], eax
479		479
480	mov edx, PCM_OUT_LVI_REG	480	mov edx, PCM_OUT_LVI_REG
481	call [ctrl.ctrl_write8]	481	call [ctrl.ctrl_write8]
482		482
483	mov edx, PCM_OUT_CR_REG	483	mov edx, PCM_OUT_CR_REG
484	mov ax, 0x11	484	mov ax, 0x11
485	call [ctrl.ctrl_write8]	485	call [ctrl.ctrl_write8]
486		486
487	mov eax, [civ_val]	487	mov eax, [civ_val]
488	add eax, 1	488	add eax, 1
489	and eax, 31	489	and eax, 31
490	mov ebx, dword [buff_list+eax*4]	490	mov ebx, dword [buff_list+eax*4]
491		491
492	cmp [ctrl.user_callback], 0	492	cmp [ctrl.user_callback], 0
493	je @f	493	je @f
494		494
495	stdcall [ctrl.user_callback], ebx	495	stdcall [ctrl.user_callback], ebx
496	@@:	496	@@:
497	ret	497	ret
498		498
499	.skip:	499	.skip:
500	mov edx, PCM_OUT_CR_REG	500	mov edx, PCM_OUT_CR_REG

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