WebSVN – Kolibri OS – Diff – /drivers/video/drm/i915/i915_drv.c


/* i915_drv.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*-
 */
/*
 *
 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the
 * "Software"), to deal in the Software without restriction, including
 * without limitation the rights to use, copy, modify, merge, publish,
 * distribute, sub license, and/or sell copies of the Software, and to
 * permit persons to whom the Software is furnished to do so, subject to
 * the following conditions:
 *
 * The above copyright notice and this permission notice (including the
 * next paragraph) shall be included in all copies or substantial portions
 * of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 *
 */
 
//#include 
#include "drmP.h"
#include "drm.h"
#include "i915_drm.h"
#include "i915_drv.h"
#include "intel_drv.h"
 
 
#include 
#include 
#include 
#include 
#include 
 
 
#include 
 
#define __read_mostly
 
 
int i915_panel_ignore_lid __read_mostly = 0;
 
unsigned int i915_powersave  __read_mostly    =  1;
 
unsigned int i915_enable_rc6 __read_mostly = 0;
 
unsigned int i915_enable_fbc __read_mostly = 1;
 
unsigned int i915_lvds_downclock  __read_mostly =  0;
 
unsigned int i915_panel_use_ssc __read_mostly =  1;
 
int i915_vbt_sdvo_panel_type __read_mostly    = -1;
 
#define PCI_VENDOR_ID_INTEL        0x8086
 
#define INTEL_VGA_DEVICE(id, info) {        \
    .class = PCI_CLASS_DISPLAY_VGA << 8,    \
    .class_mask = 0xff0000,                 \
    .vendor = 0x8086,                       \
    .device = id,                           \
    .subvendor = PCI_ANY_ID,                \
    .subdevice = PCI_ANY_ID,                \
    .driver_data = (unsigned long) info }
 
static const struct intel_device_info intel_sandybridge_d_info = {
    .gen = 6,
	.need_gfx_hws = 1, .has_hotplug = 1,
 
    .has_bsd_ring = 1,
    .has_blt_ring = 1,
};
 
static const struct intel_device_info intel_sandybridge_m_info = {
	.gen = 6, .is_mobile = 1,
 
	.need_gfx_hws = 1, .has_hotplug = 1,
 
    .has_fbc      = 1,
    .has_bsd_ring = 1,
    .has_blt_ring = 1,
};
 
 
static const struct pci_device_id pciidlist[] = {       /* aka */
    INTEL_VGA_DEVICE(0x0102, &intel_sandybridge_d_info),
    INTEL_VGA_DEVICE(0x0112, &intel_sandybridge_d_info),
    INTEL_VGA_DEVICE(0x0122, &intel_sandybridge_d_info),
    INTEL_VGA_DEVICE(0x0106, &intel_sandybridge_m_info),
    INTEL_VGA_DEVICE(0x0116, &intel_sandybridge_m_info),
    INTEL_VGA_DEVICE(0x0126, &intel_sandybridge_m_info),
    INTEL_VGA_DEVICE(0x010A, &intel_sandybridge_d_info),
    {0, 0, 0}
};
 
#define INTEL_PCH_DEVICE_ID_MASK        0xff00
#define INTEL_PCH_IBX_DEVICE_ID_TYPE    0x3b00
#define INTEL_PCH_CPT_DEVICE_ID_TYPE    0x1c00
#define INTEL_PCH_PPT_DEVICE_ID_TYPE    0x1e00
 
void intel_detect_pch (struct drm_device *dev)
{
    struct drm_i915_private *dev_priv = dev->dev_private;
    struct pci_dev *pch;
 
    /*
     * The reason to probe ISA bridge instead of Dev31:Fun0 is to
     * make graphics device passthrough work easy for VMM, that only
     * need to expose ISA bridge to let driver know the real hardware
     * underneath. This is a requirement from virtualization team.
     */
    pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, NULL);
    if (pch) {
        if (pch->vendor == PCI_VENDOR_ID_INTEL) {
            int id;
            id = pch->device & INTEL_PCH_DEVICE_ID_MASK;
 
            if (id == INTEL_PCH_IBX_DEVICE_ID_TYPE) {
                dev_priv->pch_type = PCH_IBX;
                DRM_DEBUG_KMS("Found Ibex Peak PCH\n");
            } else if (id == INTEL_PCH_CPT_DEVICE_ID_TYPE) {
                dev_priv->pch_type = PCH_CPT;
                DRM_DEBUG_KMS("Found CougarPoint PCH\n");
            } else if (id == INTEL_PCH_PPT_DEVICE_ID_TYPE) {
                /* PantherPoint is CPT compatible */
                dev_priv->pch_type = PCH_CPT;
                DRM_DEBUG_KMS("Found PatherPoint PCH\n");
            }
        }
    }
}
 
static void __gen6_gt_force_wake_get(struct drm_i915_private *dev_priv)
{
    int count;
 
    count = 0;
    while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1))
        udelay(10);
 
    I915_WRITE_NOTRACE(FORCEWAKE, 1);
    POSTING_READ(FORCEWAKE);
 
    count = 0;
    while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1) == 0)
        udelay(10);
}
 
/*
 * Generally this is called implicitly by the register read function. However,
 * if some sequence requires the GT to not power down then this function should
 * be called at the beginning of the sequence followed by a call to
 * gen6_gt_force_wake_put() at the end of the sequence.
 */
void gen6_gt_force_wake_get(struct drm_i915_private *dev_priv)
{
//    WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
 
    /* Forcewake is atomic in case we get in here without the lock */
    if (atomic_add_return(1, &dev_priv->forcewake_count) == 1)
        __gen6_gt_force_wake_get(dev_priv);
}
 
static void __gen6_gt_force_wake_put(struct drm_i915_private *dev_priv)
{
    I915_WRITE_NOTRACE(FORCEWAKE, 0);
    POSTING_READ(FORCEWAKE);
}
 
/*
 * see gen6_gt_force_wake_get()
 */
void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv)
{
//    WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
 
    if (atomic_dec_and_test(&dev_priv->forcewake_count))
        __gen6_gt_force_wake_put(dev_priv);
}
 
void __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv)
{
    if (dev_priv->gt_fifo_count < GT_FIFO_NUM_RESERVED_ENTRIES ) {
        int loop = 500;
        u32 fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);
        while (fifo <= GT_FIFO_NUM_RESERVED_ENTRIES && loop--) {
            udelay(10);
            fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);
        }
//        WARN_ON(loop < 0 && fifo <= GT_FIFO_NUM_RESERVED_ENTRIES);
        dev_priv->gt_fifo_count = fifo;
    }
    dev_priv->gt_fifo_count--;
}
 
 
 
 
 
int drm_get_dev(struct pci_dev *pdev, const struct pci_device_id *ent);
 
int i915_init(void)
{
    static pci_dev_t device;
    const struct pci_device_id  *ent;
    int  err;
 
    if( init_agp() != 0)
    {
        DRM_ERROR("drm/i915 can't work without intel_agp module!\n");
        return 0;
    };
 
    ent = find_pci_device(&device, pciidlist);
 
    if( unlikely(ent == NULL) )
    {
        dbgprintf("device not found\n");
        return 0;
    };
 
    dbgprintf("device %x:%x\n", device.pci_dev.vendor,
                                device.pci_dev.device);
 
    err = drm_get_dev(&device.pci_dev, ent);
 
    return err;
}
 
int drm_get_dev(struct pci_dev *pdev, const struct pci_device_id *ent)
{
    static struct drm_device *dev;
    int ret;
 
    ENTER();
 
    dev = kzalloc(sizeof(*dev), 0);
    if (!dev)
        return -ENOMEM;
 
 //   ret = pci_enable_device(pdev);
 //   if (ret)
 //       goto err_g1;
 
 //   pci_set_master(pdev);
 
 //   if ((ret = drm_fill_in_dev(dev, pdev, ent, driver))) {
 //       printk(KERN_ERR "DRM: Fill_in_dev failed.\n");
 //       goto err_g2;
 //   }
 
    dev->pdev = pdev;
    dev->pci_device = pdev->device;
    dev->pci_vendor = pdev->vendor;
 
    INIT_LIST_HEAD(&dev->filelist);
    INIT_LIST_HEAD(&dev->ctxlist);
    INIT_LIST_HEAD(&dev->vmalist);
    INIT_LIST_HEAD(&dev->maplist);
 
    spin_lock_init(&dev->count_lock);
    mutex_init(&dev->struct_mutex);
    mutex_init(&dev->ctxlist_mutex);
 
 
 
 
    ret = i915_driver_load(dev, ent->driver_data );
//    if (ret)
//        goto err_g4;
 
//    if( radeon_modeset )
//        init_display_kms(dev->dev_private, &usermode);
//    else
//        init_display(dev->dev_private, &usermode);
 
    LEAVE();
 
    return 0;
 
err_g4:
//    drm_put_minor(&dev->primary);
//err_g3:
//    if (drm_core_check_feature(dev, DRIVER_MODESET))
//        drm_put_minor(&dev->control);
//err_g2:
//    pci_disable_device(pdev);
//err_g1:
    free(dev);
 
    LEAVE();
 
    return ret;
}

Rev 2327	Rev 2330
1	/* i915_drv.c -- i830,i845,i855,i865,i915 driver -- linux-c --	1	/* i915_drv.c -- i830,i845,i855,i865,i915 driver -- linux-c --
2	*/	2	*/
3	/*	3	/*
4	*	4	*
5	* Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.	5	* Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6	* All Rights Reserved.	6	* All Rights Reserved.
7	*	7	*
8	* Permission is hereby granted, free of charge, to any person obtaining a	8	* Permission is hereby granted, free of charge, to any person obtaining a
9	* copy of this software and associated documentation files (the	9	* copy of this software and associated documentation files (the
10	* "Software"), to deal in the Software without restriction, including	10	* "Software"), to deal in the Software without restriction, including
11	* without limitation the rights to use, copy, modify, merge, publish,	11	* without limitation the rights to use, copy, modify, merge, publish,
12	* distribute, sub license, and/or sell copies of the Software, and to	12	* distribute, sub license, and/or sell copies of the Software, and to
13	* permit persons to whom the Software is furnished to do so, subject to	13	* permit persons to whom the Software is furnished to do so, subject to
14	* the following conditions:	14	* the following conditions:
15	*	15	*
16	* The above copyright notice and this permission notice (including the	16	* The above copyright notice and this permission notice (including the
17	* next paragraph) shall be included in all copies or substantial portions	17	* next paragraph) shall be included in all copies or substantial portions
18	* of the Software.	18	* of the Software.
19	*	19	*
20	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS	20	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
21	* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF	21	* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.	22	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
23	* IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR	23	* IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
24	* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,	24	* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
25	* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE	25	* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
26	* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.	26	* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27	*	27	*
28	*/	28	*/
29		29
-		30	//#include
30	#include	31	#include "drmP.h"
31	#include	32	#include "drm.h"
-		33	#include "i915_drm.h"
-		34	#include "i915_drv.h"
-		35	#include "intel_drv.h"
-		36
32		37
33	#include	38	#include
34	#include	39	#include
35	#include	40	#include
36	#include	41	#include
37	#include	42	#include
38		43
39	#include "i915_drv.h"	-
40	#include	44	#include
-		45
-		46	#define __read_mostly
-		47
-		48
-		49	int i915_panel_ignore_lid __read_mostly = 0;
41		50
-		51	unsigned int i915_powersave __read_mostly = 1;
42	unsigned int i915_lvds_downclock = 0;	52
-		53	unsigned int i915_enable_rc6 __read_mostly = 0;
43	int i915_vbt_sdvo_panel_type = -1;	54
-		55	unsigned int i915_enable_fbc __read_mostly = 1;
44	unsigned int i915_panel_use_ssc = 1;	56
-		57	unsigned int i915_lvds_downclock __read_mostly = 0;
45	unsigned int i915_powersave = 1;	58
-		59	unsigned int i915_panel_use_ssc __read_mostly = 1;
-		60
46	unsigned int i915_enable_fbc = 1;	61	int i915_vbt_sdvo_panel_type __read_mostly = -1;
47		62
48	#define PCI_VENDOR_ID_INTEL 0x8086	63	#define PCI_VENDOR_ID_INTEL 0x8086
49		64
50	#define INTEL_VGA_DEVICE(id, info) { \	65	#define INTEL_VGA_DEVICE(id, info) { \
51	.class = PCI_CLASS_DISPLAY_VGA << 8, \	66	.class = PCI_CLASS_DISPLAY_VGA << 8, \
52	.class_mask = 0xff0000, \	67	.class_mask = 0xff0000, \
53	.vendor = 0x8086, \	68	.vendor = 0x8086, \
54	.device = id, \	69	.device = id, \
55	.subvendor = PCI_ANY_ID, \	70	.subvendor = PCI_ANY_ID, \
56	.subdevice = PCI_ANY_ID, \	71	.subdevice = PCI_ANY_ID, \
57	.driver_data = (unsigned long) info }	72	.driver_data = (unsigned long) info }
58		73
59	static const struct intel_device_info intel_sandybridge_d_info = {	74	static const struct intel_device_info intel_sandybridge_d_info = {
60	.gen = 6,	75	.gen = 6,
61	.need_gfx_hws = 1,	76	.need_gfx_hws = 1, .has_hotplug = 1,
62	.has_hotplug = 1,	-
63	.has_bsd_ring = 1,	77	.has_bsd_ring = 1,
64	.has_blt_ring = 1,	78	.has_blt_ring = 1,
65	};	79	};
66		80
67	static const struct intel_device_info intel_sandybridge_m_info = {	81	static const struct intel_device_info intel_sandybridge_m_info = {
68	.gen = 6,	82	.gen = 6, .is_mobile = 1,
69	.is_mobile = 1,	-
70	.need_gfx_hws = 1,	83	.need_gfx_hws = 1, .has_hotplug = 1,
71	.has_hotplug = 1,	-
72	.has_fbc = 1,	84	.has_fbc = 1,
73	.has_bsd_ring = 1,	85	.has_bsd_ring = 1,
74	.has_blt_ring = 1,	86	.has_blt_ring = 1,
75	};	87	};
76		88
77		89
78	static const struct pci_device_id pciidlist[] = { /* aka */	90	static const struct pci_device_id pciidlist[] = { /* aka */
79	INTEL_VGA_DEVICE(0x0102, &intel_sandybridge_d_info),	91	INTEL_VGA_DEVICE(0x0102, &intel_sandybridge_d_info),
80	INTEL_VGA_DEVICE(0x0112, &intel_sandybridge_d_info),	92	INTEL_VGA_DEVICE(0x0112, &intel_sandybridge_d_info),
81	INTEL_VGA_DEVICE(0x0122, &intel_sandybridge_d_info),	93	INTEL_VGA_DEVICE(0x0122, &intel_sandybridge_d_info),
82	INTEL_VGA_DEVICE(0x0106, &intel_sandybridge_m_info),	94	INTEL_VGA_DEVICE(0x0106, &intel_sandybridge_m_info),
83	INTEL_VGA_DEVICE(0x0116, &intel_sandybridge_m_info),	95	INTEL_VGA_DEVICE(0x0116, &intel_sandybridge_m_info),
84	INTEL_VGA_DEVICE(0x0126, &intel_sandybridge_m_info),	96	INTEL_VGA_DEVICE(0x0126, &intel_sandybridge_m_info),
85	INTEL_VGA_DEVICE(0x010A, &intel_sandybridge_d_info),	97	INTEL_VGA_DEVICE(0x010A, &intel_sandybridge_d_info),
86	{0, 0, 0}	98	{0, 0, 0}
87	};	99	};
88		100
89	#define INTEL_PCH_DEVICE_ID_MASK 0xff00	101	#define INTEL_PCH_DEVICE_ID_MASK 0xff00
90	#define INTEL_PCH_IBX_DEVICE_ID_TYPE 0x3b00	102	#define INTEL_PCH_IBX_DEVICE_ID_TYPE 0x3b00
91	#define INTEL_PCH_CPT_DEVICE_ID_TYPE 0x1c00	103	#define INTEL_PCH_CPT_DEVICE_ID_TYPE 0x1c00
92	#define INTEL_PCH_PPT_DEVICE_ID_TYPE 0x1e00	104	#define INTEL_PCH_PPT_DEVICE_ID_TYPE 0x1e00
93		105
94	void intel_detect_pch (struct drm_device *dev)	106	void intel_detect_pch (struct drm_device *dev)
95	{	107	{
96	struct drm_i915_private *dev_priv = dev->dev_private;	108	struct drm_i915_private *dev_priv = dev->dev_private;
97	struct pci_dev *pch;	109	struct pci_dev *pch;
98		110
99	/*	111	/*
100	* The reason to probe ISA bridge instead of Dev31:Fun0 is to	112	* The reason to probe ISA bridge instead of Dev31:Fun0 is to
101	* make graphics device passthrough work easy for VMM, that only	113	* make graphics device passthrough work easy for VMM, that only
102	* need to expose ISA bridge to let driver know the real hardware	114	* need to expose ISA bridge to let driver know the real hardware
103	* underneath. This is a requirement from virtualization team.	115	* underneath. This is a requirement from virtualization team.
104	*/	116	*/
105	pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, NULL);	117	pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, NULL);
106	if (pch) {	118	if (pch) {
107	if (pch->vendor == PCI_VENDOR_ID_INTEL) {	119	if (pch->vendor == PCI_VENDOR_ID_INTEL) {
108	int id;	120	int id;
109	id = pch->device & INTEL_PCH_DEVICE_ID_MASK;	121	id = pch->device & INTEL_PCH_DEVICE_ID_MASK;
110		122
111	if (id == INTEL_PCH_IBX_DEVICE_ID_TYPE) {	123	if (id == INTEL_PCH_IBX_DEVICE_ID_TYPE) {
112	dev_priv->pch_type = PCH_IBX;	124	dev_priv->pch_type = PCH_IBX;
113	DRM_DEBUG_KMS("Found Ibex Peak PCH\n");	125	DRM_DEBUG_KMS("Found Ibex Peak PCH\n");
114	} else if (id == INTEL_PCH_CPT_DEVICE_ID_TYPE) {	126	} else if (id == INTEL_PCH_CPT_DEVICE_ID_TYPE) {
115	dev_priv->pch_type = PCH_CPT;	127	dev_priv->pch_type = PCH_CPT;
116	DRM_DEBUG_KMS("Found CougarPoint PCH\n");	128	DRM_DEBUG_KMS("Found CougarPoint PCH\n");
117	} else if (id == INTEL_PCH_PPT_DEVICE_ID_TYPE) {	129	} else if (id == INTEL_PCH_PPT_DEVICE_ID_TYPE) {
118	/* PantherPoint is CPT compatible */	130	/* PantherPoint is CPT compatible */
119	dev_priv->pch_type = PCH_CPT;	131	dev_priv->pch_type = PCH_CPT;
120	DRM_DEBUG_KMS("Found PatherPoint PCH\n");	132	DRM_DEBUG_KMS("Found PatherPoint PCH\n");
121	}	133	}
122	}	134	}
123	}	135	}
124	}	136	}
125		137
126	static void __gen6_gt_force_wake_get(struct drm_i915_private *dev_priv)	138	static void __gen6_gt_force_wake_get(struct drm_i915_private *dev_priv)
127	{	139	{
128	int count;	140	int count;
129		141
130	count = 0;	142	count = 0;
131	while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1))	143	while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1))
132	udelay(10);	144	udelay(10);
133		145
134	I915_WRITE_NOTRACE(FORCEWAKE, 1);	146	I915_WRITE_NOTRACE(FORCEWAKE, 1);
135	POSTING_READ(FORCEWAKE);	147	POSTING_READ(FORCEWAKE);
136		148
137	count = 0;	149	count = 0;
138	while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1) == 0)	150	while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1) == 0)
139	udelay(10);	151	udelay(10);
140	}	152	}
141		153
142	/*	154	/*
143	* Generally this is called implicitly by the register read function. However,	155	* Generally this is called implicitly by the register read function. However,
144	* if some sequence requires the GT to not power down then this function should	156	* if some sequence requires the GT to not power down then this function should
145	* be called at the beginning of the sequence followed by a call to	157	* be called at the beginning of the sequence followed by a call to
146	* gen6_gt_force_wake_put() at the end of the sequence.	158	* gen6_gt_force_wake_put() at the end of the sequence.
147	*/	159	*/
148	void gen6_gt_force_wake_get(struct drm_i915_private *dev_priv)	160	void gen6_gt_force_wake_get(struct drm_i915_private *dev_priv)
149	{	161	{
150	// WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));	162	// WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
151		163
152	/* Forcewake is atomic in case we get in here without the lock */	164	/* Forcewake is atomic in case we get in here without the lock */
153	if (atomic_add_return(1, &dev_priv->forcewake_count) == 1)	165	if (atomic_add_return(1, &dev_priv->forcewake_count) == 1)
154	__gen6_gt_force_wake_get(dev_priv);	166	__gen6_gt_force_wake_get(dev_priv);
155	}	167	}
156		168
157	static void __gen6_gt_force_wake_put(struct drm_i915_private *dev_priv)	169	static void __gen6_gt_force_wake_put(struct drm_i915_private *dev_priv)
158	{	170	{
159	I915_WRITE_NOTRACE(FORCEWAKE, 0);	171	I915_WRITE_NOTRACE(FORCEWAKE, 0);
160	POSTING_READ(FORCEWAKE);	172	POSTING_READ(FORCEWAKE);
161	}	173	}
162		174
163	/*	175	/*
164	* see gen6_gt_force_wake_get()	176	* see gen6_gt_force_wake_get()
165	*/	177	*/
166	void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv)	178	void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv)
167	{	179	{
168	// WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));	180	// WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
169		181
170	if (atomic_dec_and_test(&dev_priv->forcewake_count))	182	if (atomic_dec_and_test(&dev_priv->forcewake_count))
171	__gen6_gt_force_wake_put(dev_priv);	183	__gen6_gt_force_wake_put(dev_priv);
172	}	184	}
173		185
174	void __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv)	186	void __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv)
175	{	187	{
176	if (dev_priv->gt_fifo_count < GT_FIFO_NUM_RESERVED_ENTRIES ) {	188	if (dev_priv->gt_fifo_count < GT_FIFO_NUM_RESERVED_ENTRIES ) {
177	int loop = 500;	189	int loop = 500;
178	u32 fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);	190	u32 fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);
179	while (fifo <= GT_FIFO_NUM_RESERVED_ENTRIES && loop--) {	191	while (fifo <= GT_FIFO_NUM_RESERVED_ENTRIES && loop--) {
180	udelay(10);	192	udelay(10);
181	fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);	193	fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);
182	}	194	}
183	// WARN_ON(loop < 0 && fifo <= GT_FIFO_NUM_RESERVED_ENTRIES);	195	// WARN_ON(loop < 0 && fifo <= GT_FIFO_NUM_RESERVED_ENTRIES);
184	dev_priv->gt_fifo_count = fifo;	196	dev_priv->gt_fifo_count = fifo;
185	}	197	}
186	dev_priv->gt_fifo_count--;	198	dev_priv->gt_fifo_count--;
187	}	199	}
188		200
189		201
190		202
191		203
192		204
193	int drm_get_dev(struct pci_dev pdev, const struct pci_device_id ent);	205	int drm_get_dev(struct pci_dev pdev, const struct pci_device_id ent);
194		206
195	int i915_init(void)	207	int i915_init(void)
196	{	208	{
197	static pci_dev_t device;	209	static pci_dev_t device;
198	const struct pci_device_id *ent;	210	const struct pci_device_id *ent;
199	int err;	211	int err;
200		212
201	if( init_agp() != 0)	213	if( init_agp() != 0)
202	{	214	{
203	DRM_ERROR("drm/i915 can't work without intel_agp module!\n");	215	DRM_ERROR("drm/i915 can't work without intel_agp module!\n");
204	return 0;	216	return 0;
205	};	217	};
206		218
207	ent = find_pci_device(&device, pciidlist);	219	ent = find_pci_device(&device, pciidlist);
208		220
209	if( unlikely(ent == NULL) )	221	if( unlikely(ent == NULL) )
210	{	222	{
211	dbgprintf("device not found\n");	223	dbgprintf("device not found\n");
212	return 0;	224	return 0;
213	};	225	};
214		226
215	dbgprintf("device %x:%x\n", device.pci_dev.vendor,	227	dbgprintf("device %x:%x\n", device.pci_dev.vendor,
216	device.pci_dev.device);	228	device.pci_dev.device);
217		229
218	err = drm_get_dev(&device.pci_dev, ent);	230	err = drm_get_dev(&device.pci_dev, ent);
219		231
220	return err;	232	return err;
221	}	233	}
222		234
223	int drm_get_dev(struct pci_dev pdev, const struct pci_device_id ent)	235	int drm_get_dev(struct pci_dev pdev, const struct pci_device_id ent)
224	{	236	{
225	static struct drm_device *dev;	237	static struct drm_device *dev;
226	int ret;	238	int ret;
227		239
228	ENTER();	240	ENTER();
229		241
230	dev = kzalloc(sizeof(*dev), 0);	242	dev = kzalloc(sizeof(*dev), 0);
231	if (!dev)	243	if (!dev)
232	return -ENOMEM;	244	return -ENOMEM;
233		245
234	// ret = pci_enable_device(pdev);	246	// ret = pci_enable_device(pdev);
235	// if (ret)	247	// if (ret)
236	// goto err_g1;	248	// goto err_g1;
237		249
238	// pci_set_master(pdev);	250	// pci_set_master(pdev);
239		251
240	// if ((ret = drm_fill_in_dev(dev, pdev, ent, driver))) {	252	// if ((ret = drm_fill_in_dev(dev, pdev, ent, driver))) {
241	// printk(KERN_ERR "DRM: Fill_in_dev failed.\n");	253	// printk(KERN_ERR "DRM: Fill_in_dev failed.\n");
242	// goto err_g2;	254	// goto err_g2;
243	// }	255	// }
244		256
245	dev->pdev = pdev;	257	dev->pdev = pdev;
246	dev->pci_device = pdev->device;	258	dev->pci_device = pdev->device;
247	dev->pci_vendor = pdev->vendor;	259	dev->pci_vendor = pdev->vendor;
248		260
249	INIT_LIST_HEAD(&dev->filelist);	261	INIT_LIST_HEAD(&dev->filelist);
250	INIT_LIST_HEAD(&dev->ctxlist);	262	INIT_LIST_HEAD(&dev->ctxlist);
251	INIT_LIST_HEAD(&dev->vmalist);	263	INIT_LIST_HEAD(&dev->vmalist);
252	INIT_LIST_HEAD(&dev->maplist);	264	INIT_LIST_HEAD(&dev->maplist);
253		265
254	spin_lock_init(&dev->count_lock);	266	spin_lock_init(&dev->count_lock);
255	mutex_init(&dev->struct_mutex);	267	mutex_init(&dev->struct_mutex);
256	mutex_init(&dev->ctxlist_mutex);	268	mutex_init(&dev->ctxlist_mutex);
257		269
258	//int i915_driver_load(struct drm_device *dev, unsigned long flags)	-
-		270
259		271
260	ret = i915_driver_load(dev, ent->driver_data );	272	ret = i915_driver_load(dev, ent->driver_data );
261	// if (ret)	273	// if (ret)
262	// goto err_g4;	274	// goto err_g4;
263		275
264	// if( radeon_modeset )	276	// if( radeon_modeset )
265	// init_display_kms(dev->dev_private, &usermode);	277	// init_display_kms(dev->dev_private, &usermode);
266	// else	278	// else
267	// init_display(dev->dev_private, &usermode);	279	// init_display(dev->dev_private, &usermode);
268		280
269	LEAVE();	281	LEAVE();
270		282
271	return 0;	283	return 0;
272		284
273	err_g4:	285	err_g4:
274	// drm_put_minor(&dev->primary);	286	// drm_put_minor(&dev->primary);
275	//err_g3:	287	//err_g3:
276	// if (drm_core_check_feature(dev, DRIVER_MODESET))	288	// if (drm_core_check_feature(dev, DRIVER_MODESET))
277	// drm_put_minor(&dev->control);	289	// drm_put_minor(&dev->control);
278	//err_g2:	290	//err_g2:
279	// pci_disable_device(pdev);	291	// pci_disable_device(pdev);
280	//err_g1:	292	//err_g1:
281	free(dev);	293	free(dev);
282		294
283	LEAVE();	295	LEAVE();
284		296
285	return ret;	297	return ret;
286	}	298	}

Subversion Repositories Kolibri OS

(root)/drivers/video/drm/i915/i915_drv.c – Rev 2327 → 2330