Rev 4560 | Rev 6084 | Go to most recent revision | Only display areas with differences | Regard whitespace | Details | Blame | Last modification | View Log | RSS feed
Rev 4560 | Rev 5060 | ||
---|---|---|---|
1 | /* |
1 | /* |
2 | * Copyright (c) 2006 Luc Verhaegen (quirks list) |
2 | * Copyright (c) 2006 Luc Verhaegen (quirks list) |
3 | * Copyright (c) 2007-2008 Intel Corporation |
3 | * Copyright (c) 2007-2008 Intel Corporation |
4 | * Jesse Barnes |
4 | * Jesse Barnes |
5 | * Copyright 2010 Red Hat, Inc. |
5 | * Copyright 2010 Red Hat, Inc. |
6 | * |
6 | * |
7 | * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from |
7 | * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from |
8 | * FB layer. |
8 | * FB layer. |
9 | * Copyright (C) 2006 Dennis Munsie |
9 | * Copyright (C) 2006 Dennis Munsie |
10 | * |
10 | * |
11 | * Permission is hereby granted, free of charge, to any person obtaining a |
11 | * Permission is hereby granted, free of charge, to any person obtaining a |
12 | * copy of this software and associated documentation files (the "Software"), |
12 | * copy of this software and associated documentation files (the "Software"), |
13 | * to deal in the Software without restriction, including without limitation |
13 | * to deal in the Software without restriction, including without limitation |
14 | * the rights to use, copy, modify, merge, publish, distribute, sub license, |
14 | * the rights to use, copy, modify, merge, publish, distribute, sub license, |
15 | * and/or sell copies of the Software, and to permit persons to whom the |
15 | * and/or sell copies of the Software, and to permit persons to whom the |
16 | * Software is furnished to do so, subject to the following conditions: |
16 | * Software is furnished to do so, subject to the following conditions: |
17 | * |
17 | * |
18 | * The above copyright notice and this permission notice (including the |
18 | * The above copyright notice and this permission notice (including the |
19 | * next paragraph) shall be included in all copies or substantial portions |
19 | * next paragraph) shall be included in all copies or substantial portions |
20 | * of the Software. |
20 | * of the Software. |
21 | * |
21 | * |
22 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
22 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
23 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
23 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
24 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL |
24 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL |
25 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
25 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
26 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
26 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
27 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
27 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
28 | * DEALINGS IN THE SOFTWARE. |
28 | * DEALINGS IN THE SOFTWARE. |
29 | */ |
29 | */ |
30 | #include |
30 | #include |
31 | #include |
31 | #include |
32 | #include |
32 | #include |
33 | #include |
33 | #include |
34 | #include |
34 | #include |
35 | #include |
35 | #include |
36 | #include |
36 | #include |
37 | 37 | ||
38 | #define version_greater(edid, maj, min) \ |
38 | #define version_greater(edid, maj, min) \ |
39 | (((edid)->version > (maj)) || \ |
39 | (((edid)->version > (maj)) || \ |
40 | ((edid)->version == (maj) && (edid)->revision > (min))) |
40 | ((edid)->version == (maj) && (edid)->revision > (min))) |
41 | 41 | ||
42 | #define EDID_EST_TIMINGS 16 |
42 | #define EDID_EST_TIMINGS 16 |
43 | #define EDID_STD_TIMINGS 8 |
43 | #define EDID_STD_TIMINGS 8 |
44 | #define EDID_DETAILED_TIMINGS 4 |
44 | #define EDID_DETAILED_TIMINGS 4 |
45 | 45 | ||
46 | /* |
46 | /* |
47 | * EDID blocks out in the wild have a variety of bugs, try to collect |
47 | * EDID blocks out in the wild have a variety of bugs, try to collect |
48 | * them here (note that userspace may work around broken monitors first, |
48 | * them here (note that userspace may work around broken monitors first, |
49 | * but fixes should make their way here so that the kernel "just works" |
49 | * but fixes should make their way here so that the kernel "just works" |
50 | * on as many displays as possible). |
50 | * on as many displays as possible). |
51 | */ |
51 | */ |
52 | 52 | ||
53 | /* First detailed mode wrong, use largest 60Hz mode */ |
53 | /* First detailed mode wrong, use largest 60Hz mode */ |
54 | #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0) |
54 | #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0) |
55 | /* Reported 135MHz pixel clock is too high, needs adjustment */ |
55 | /* Reported 135MHz pixel clock is too high, needs adjustment */ |
56 | #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1) |
56 | #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1) |
57 | /* Prefer the largest mode at 75 Hz */ |
57 | /* Prefer the largest mode at 75 Hz */ |
58 | #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2) |
58 | #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2) |
59 | /* Detail timing is in cm not mm */ |
59 | /* Detail timing is in cm not mm */ |
60 | #define EDID_QUIRK_DETAILED_IN_CM (1 << 3) |
60 | #define EDID_QUIRK_DETAILED_IN_CM (1 << 3) |
61 | /* Detailed timing descriptors have bogus size values, so just take the |
61 | /* Detailed timing descriptors have bogus size values, so just take the |
62 | * maximum size and use that. |
62 | * maximum size and use that. |
63 | */ |
63 | */ |
64 | #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4) |
64 | #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4) |
65 | /* Monitor forgot to set the first detailed is preferred bit. */ |
65 | /* Monitor forgot to set the first detailed is preferred bit. */ |
66 | #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5) |
66 | #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5) |
67 | /* use +hsync +vsync for detailed mode */ |
67 | /* use +hsync +vsync for detailed mode */ |
68 | #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6) |
68 | #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6) |
69 | /* Force reduced-blanking timings for detailed modes */ |
69 | /* Force reduced-blanking timings for detailed modes */ |
70 | #define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7) |
70 | #define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7) |
71 | /* Force 8bpc */ |
71 | /* Force 8bpc */ |
72 | #define EDID_QUIRK_FORCE_8BPC (1 << 8) |
72 | #define EDID_QUIRK_FORCE_8BPC (1 << 8) |
- | 73 | /* Force 12bpc */ |
|
- | 74 | #define EDID_QUIRK_FORCE_12BPC (1 << 9) |
|
73 | 75 | ||
74 | struct detailed_mode_closure { |
76 | struct detailed_mode_closure { |
75 | struct drm_connector *connector; |
77 | struct drm_connector *connector; |
76 | struct edid *edid; |
78 | struct edid *edid; |
77 | bool preferred; |
79 | bool preferred; |
78 | u32 quirks; |
80 | u32 quirks; |
79 | int modes; |
81 | int modes; |
80 | }; |
82 | }; |
81 | 83 | ||
82 | #define LEVEL_DMT 0 |
84 | #define LEVEL_DMT 0 |
83 | #define LEVEL_GTF 1 |
85 | #define LEVEL_GTF 1 |
84 | #define LEVEL_GTF2 2 |
86 | #define LEVEL_GTF2 2 |
85 | #define LEVEL_CVT 3 |
87 | #define LEVEL_CVT 3 |
86 | 88 | ||
87 | static struct edid_quirk { |
89 | static struct edid_quirk { |
88 | char vendor[4]; |
90 | char vendor[4]; |
89 | int product_id; |
91 | int product_id; |
90 | u32 quirks; |
92 | u32 quirks; |
91 | } edid_quirk_list[] = { |
93 | } edid_quirk_list[] = { |
92 | /* Acer AL1706 */ |
94 | /* Acer AL1706 */ |
93 | { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 }, |
95 | { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 }, |
94 | /* Acer F51 */ |
96 | /* Acer F51 */ |
95 | { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 }, |
97 | { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 }, |
96 | /* Unknown Acer */ |
98 | /* Unknown Acer */ |
97 | { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, |
99 | { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, |
98 | 100 | ||
99 | /* Belinea 10 15 55 */ |
101 | /* Belinea 10 15 55 */ |
100 | { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 }, |
102 | { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 }, |
101 | { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 }, |
103 | { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 }, |
102 | 104 | ||
103 | /* Envision Peripherals, Inc. EN-7100e */ |
105 | /* Envision Peripherals, Inc. EN-7100e */ |
104 | { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH }, |
106 | { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH }, |
105 | /* Envision EN2028 */ |
107 | /* Envision EN2028 */ |
106 | { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 }, |
108 | { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 }, |
107 | 109 | ||
108 | /* Funai Electronics PM36B */ |
110 | /* Funai Electronics PM36B */ |
109 | { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 | |
111 | { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 | |
110 | EDID_QUIRK_DETAILED_IN_CM }, |
112 | EDID_QUIRK_DETAILED_IN_CM }, |
111 | 113 | ||
112 | /* LG Philips LCD LP154W01-A5 */ |
114 | /* LG Philips LCD LP154W01-A5 */ |
113 | { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, |
115 | { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, |
114 | { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, |
116 | { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, |
115 | 117 | ||
116 | /* Philips 107p5 CRT */ |
118 | /* Philips 107p5 CRT */ |
117 | { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, |
119 | { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, |
118 | 120 | ||
119 | /* Proview AY765C */ |
121 | /* Proview AY765C */ |
120 | { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, |
122 | { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, |
121 | 123 | ||
122 | /* Samsung SyncMaster 205BW. Note: irony */ |
124 | /* Samsung SyncMaster 205BW. Note: irony */ |
123 | { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP }, |
125 | { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP }, |
124 | /* Samsung SyncMaster 22[5-6]BW */ |
126 | /* Samsung SyncMaster 22[5-6]BW */ |
125 | { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 }, |
127 | { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 }, |
126 | { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 }, |
128 | { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 }, |
- | 129 | ||
- | 130 | /* Sony PVM-2541A does up to 12 bpc, but only reports max 8 bpc */ |
|
- | 131 | { "SNY", 0x2541, EDID_QUIRK_FORCE_12BPC }, |
|
127 | 132 | ||
128 | /* ViewSonic VA2026w */ |
133 | /* ViewSonic VA2026w */ |
129 | { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING }, |
134 | { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING }, |
130 | 135 | ||
131 | /* Medion MD 30217 PG */ |
136 | /* Medion MD 30217 PG */ |
132 | { "MED", 0x7b8, EDID_QUIRK_PREFER_LARGE_75 }, |
137 | { "MED", 0x7b8, EDID_QUIRK_PREFER_LARGE_75 }, |
133 | 138 | ||
134 | /* Panel in Samsung NP700G7A-S01PL notebook reports 6bpc */ |
139 | /* Panel in Samsung NP700G7A-S01PL notebook reports 6bpc */ |
135 | { "SEC", 0xd033, EDID_QUIRK_FORCE_8BPC }, |
140 | { "SEC", 0xd033, EDID_QUIRK_FORCE_8BPC }, |
136 | }; |
141 | }; |
137 | 142 | ||
138 | /* |
143 | /* |
139 | * Autogenerated from the DMT spec. |
144 | * Autogenerated from the DMT spec. |
140 | * This table is copied from xfree86/modes/xf86EdidModes.c. |
145 | * This table is copied from xfree86/modes/xf86EdidModes.c. |
141 | */ |
146 | */ |
142 | static const struct drm_display_mode drm_dmt_modes[] = { |
147 | static const struct drm_display_mode drm_dmt_modes[] = { |
143 | /* 640x350@85Hz */ |
148 | /* 640x350@85Hz */ |
144 | { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672, |
149 | { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672, |
145 | 736, 832, 0, 350, 382, 385, 445, 0, |
150 | 736, 832, 0, 350, 382, 385, 445, 0, |
146 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
151 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
147 | /* 640x400@85Hz */ |
152 | /* 640x400@85Hz */ |
148 | { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672, |
153 | { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672, |
149 | 736, 832, 0, 400, 401, 404, 445, 0, |
154 | 736, 832, 0, 400, 401, 404, 445, 0, |
150 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
155 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
151 | /* 720x400@85Hz */ |
156 | /* 720x400@85Hz */ |
152 | { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756, |
157 | { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756, |
153 | 828, 936, 0, 400, 401, 404, 446, 0, |
158 | 828, 936, 0, 400, 401, 404, 446, 0, |
154 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
159 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
155 | /* 640x480@60Hz */ |
160 | /* 640x480@60Hz */ |
156 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656, |
161 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656, |
157 | 752, 800, 0, 480, 489, 492, 525, 0, |
162 | 752, 800, 0, 480, 489, 492, 525, 0, |
158 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
163 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
159 | /* 640x480@72Hz */ |
164 | /* 640x480@72Hz */ |
160 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664, |
165 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664, |
161 | 704, 832, 0, 480, 489, 492, 520, 0, |
166 | 704, 832, 0, 480, 489, 492, 520, 0, |
162 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
167 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
163 | /* 640x480@75Hz */ |
168 | /* 640x480@75Hz */ |
164 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656, |
169 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656, |
165 | 720, 840, 0, 480, 481, 484, 500, 0, |
170 | 720, 840, 0, 480, 481, 484, 500, 0, |
166 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
171 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
167 | /* 640x480@85Hz */ |
172 | /* 640x480@85Hz */ |
168 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696, |
173 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696, |
169 | 752, 832, 0, 480, 481, 484, 509, 0, |
174 | 752, 832, 0, 480, 481, 484, 509, 0, |
170 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
175 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
171 | /* 800x600@56Hz */ |
176 | /* 800x600@56Hz */ |
172 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824, |
177 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824, |
173 | 896, 1024, 0, 600, 601, 603, 625, 0, |
178 | 896, 1024, 0, 600, 601, 603, 625, 0, |
174 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
179 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
175 | /* 800x600@60Hz */ |
180 | /* 800x600@60Hz */ |
176 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840, |
181 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840, |
177 | 968, 1056, 0, 600, 601, 605, 628, 0, |
182 | 968, 1056, 0, 600, 601, 605, 628, 0, |
178 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
183 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
179 | /* 800x600@72Hz */ |
184 | /* 800x600@72Hz */ |
180 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856, |
185 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856, |
181 | 976, 1040, 0, 600, 637, 643, 666, 0, |
186 | 976, 1040, 0, 600, 637, 643, 666, 0, |
182 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
187 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
183 | /* 800x600@75Hz */ |
188 | /* 800x600@75Hz */ |
184 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816, |
189 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816, |
185 | 896, 1056, 0, 600, 601, 604, 625, 0, |
190 | 896, 1056, 0, 600, 601, 604, 625, 0, |
186 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
191 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
187 | /* 800x600@85Hz */ |
192 | /* 800x600@85Hz */ |
188 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832, |
193 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832, |
189 | 896, 1048, 0, 600, 601, 604, 631, 0, |
194 | 896, 1048, 0, 600, 601, 604, 631, 0, |
190 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
195 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
191 | /* 800x600@120Hz RB */ |
196 | /* 800x600@120Hz RB */ |
192 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 73250, 800, 848, |
197 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 73250, 800, 848, |
193 | 880, 960, 0, 600, 603, 607, 636, 0, |
198 | 880, 960, 0, 600, 603, 607, 636, 0, |
194 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
199 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
195 | /* 848x480@60Hz */ |
200 | /* 848x480@60Hz */ |
196 | { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864, |
201 | { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864, |
197 | 976, 1088, 0, 480, 486, 494, 517, 0, |
202 | 976, 1088, 0, 480, 486, 494, 517, 0, |
198 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
203 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
199 | /* 1024x768@43Hz, interlace */ |
204 | /* 1024x768@43Hz, interlace */ |
200 | { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032, |
205 | { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032, |
201 | 1208, 1264, 0, 768, 768, 772, 817, 0, |
206 | 1208, 1264, 0, 768, 768, 772, 817, 0, |
202 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | |
207 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | |
203 | DRM_MODE_FLAG_INTERLACE) }, |
208 | DRM_MODE_FLAG_INTERLACE) }, |
204 | /* 1024x768@60Hz */ |
209 | /* 1024x768@60Hz */ |
205 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048, |
210 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048, |
206 | 1184, 1344, 0, 768, 771, 777, 806, 0, |
211 | 1184, 1344, 0, 768, 771, 777, 806, 0, |
207 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
212 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
208 | /* 1024x768@70Hz */ |
213 | /* 1024x768@70Hz */ |
209 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048, |
214 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048, |
210 | 1184, 1328, 0, 768, 771, 777, 806, 0, |
215 | 1184, 1328, 0, 768, 771, 777, 806, 0, |
211 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
216 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
212 | /* 1024x768@75Hz */ |
217 | /* 1024x768@75Hz */ |
213 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040, |
218 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040, |
214 | 1136, 1312, 0, 768, 769, 772, 800, 0, |
219 | 1136, 1312, 0, 768, 769, 772, 800, 0, |
215 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
220 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
216 | /* 1024x768@85Hz */ |
221 | /* 1024x768@85Hz */ |
217 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072, |
222 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072, |
218 | 1168, 1376, 0, 768, 769, 772, 808, 0, |
223 | 1168, 1376, 0, 768, 769, 772, 808, 0, |
219 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
224 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
220 | /* 1024x768@120Hz RB */ |
225 | /* 1024x768@120Hz RB */ |
221 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 115500, 1024, 1072, |
226 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 115500, 1024, 1072, |
222 | 1104, 1184, 0, 768, 771, 775, 813, 0, |
227 | 1104, 1184, 0, 768, 771, 775, 813, 0, |
223 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
228 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
224 | /* 1152x864@75Hz */ |
229 | /* 1152x864@75Hz */ |
225 | { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216, |
230 | { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216, |
226 | 1344, 1600, 0, 864, 865, 868, 900, 0, |
231 | 1344, 1600, 0, 864, 865, 868, 900, 0, |
227 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
232 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
228 | /* 1280x768@60Hz RB */ |
233 | /* 1280x768@60Hz RB */ |
229 | { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 68250, 1280, 1328, |
234 | { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 68250, 1280, 1328, |
230 | 1360, 1440, 0, 768, 771, 778, 790, 0, |
235 | 1360, 1440, 0, 768, 771, 778, 790, 0, |
231 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
236 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
232 | /* 1280x768@60Hz */ |
237 | /* 1280x768@60Hz */ |
233 | { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344, |
238 | { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344, |
234 | 1472, 1664, 0, 768, 771, 778, 798, 0, |
239 | 1472, 1664, 0, 768, 771, 778, 798, 0, |
235 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
240 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
236 | /* 1280x768@75Hz */ |
241 | /* 1280x768@75Hz */ |
237 | { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360, |
242 | { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360, |
238 | 1488, 1696, 0, 768, 771, 778, 805, 0, |
243 | 1488, 1696, 0, 768, 771, 778, 805, 0, |
239 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
244 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
240 | /* 1280x768@85Hz */ |
245 | /* 1280x768@85Hz */ |
241 | { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360, |
246 | { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360, |
242 | 1496, 1712, 0, 768, 771, 778, 809, 0, |
247 | 1496, 1712, 0, 768, 771, 778, 809, 0, |
243 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
248 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
244 | /* 1280x768@120Hz RB */ |
249 | /* 1280x768@120Hz RB */ |
245 | { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 140250, 1280, 1328, |
250 | { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 140250, 1280, 1328, |
246 | 1360, 1440, 0, 768, 771, 778, 813, 0, |
251 | 1360, 1440, 0, 768, 771, 778, 813, 0, |
247 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
252 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
248 | /* 1280x800@60Hz RB */ |
253 | /* 1280x800@60Hz RB */ |
249 | { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 71000, 1280, 1328, |
254 | { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 71000, 1280, 1328, |
250 | 1360, 1440, 0, 800, 803, 809, 823, 0, |
255 | 1360, 1440, 0, 800, 803, 809, 823, 0, |
251 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
256 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
252 | /* 1280x800@60Hz */ |
257 | /* 1280x800@60Hz */ |
253 | { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352, |
258 | { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352, |
254 | 1480, 1680, 0, 800, 803, 809, 831, 0, |
259 | 1480, 1680, 0, 800, 803, 809, 831, 0, |
255 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
260 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
256 | /* 1280x800@75Hz */ |
261 | /* 1280x800@75Hz */ |
257 | { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360, |
262 | { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360, |
258 | 1488, 1696, 0, 800, 803, 809, 838, 0, |
263 | 1488, 1696, 0, 800, 803, 809, 838, 0, |
259 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
264 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
260 | /* 1280x800@85Hz */ |
265 | /* 1280x800@85Hz */ |
261 | { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360, |
266 | { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360, |
262 | 1496, 1712, 0, 800, 803, 809, 843, 0, |
267 | 1496, 1712, 0, 800, 803, 809, 843, 0, |
263 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
268 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
264 | /* 1280x800@120Hz RB */ |
269 | /* 1280x800@120Hz RB */ |
265 | { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 146250, 1280, 1328, |
270 | { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 146250, 1280, 1328, |
266 | 1360, 1440, 0, 800, 803, 809, 847, 0, |
271 | 1360, 1440, 0, 800, 803, 809, 847, 0, |
267 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
272 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
268 | /* 1280x960@60Hz */ |
273 | /* 1280x960@60Hz */ |
269 | { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376, |
274 | { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376, |
270 | 1488, 1800, 0, 960, 961, 964, 1000, 0, |
275 | 1488, 1800, 0, 960, 961, 964, 1000, 0, |
271 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
276 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
272 | /* 1280x960@85Hz */ |
277 | /* 1280x960@85Hz */ |
273 | { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344, |
278 | { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344, |
274 | 1504, 1728, 0, 960, 961, 964, 1011, 0, |
279 | 1504, 1728, 0, 960, 961, 964, 1011, 0, |
275 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
280 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
276 | /* 1280x960@120Hz RB */ |
281 | /* 1280x960@120Hz RB */ |
277 | { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 175500, 1280, 1328, |
282 | { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 175500, 1280, 1328, |
278 | 1360, 1440, 0, 960, 963, 967, 1017, 0, |
283 | 1360, 1440, 0, 960, 963, 967, 1017, 0, |
279 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
284 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
280 | /* 1280x1024@60Hz */ |
285 | /* 1280x1024@60Hz */ |
281 | { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328, |
286 | { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328, |
282 | 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, |
287 | 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, |
283 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
288 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
284 | /* 1280x1024@75Hz */ |
289 | /* 1280x1024@75Hz */ |
285 | { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296, |
290 | { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296, |
286 | 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, |
291 | 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, |
287 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
292 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
288 | /* 1280x1024@85Hz */ |
293 | /* 1280x1024@85Hz */ |
289 | { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344, |
294 | { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344, |
290 | 1504, 1728, 0, 1024, 1025, 1028, 1072, 0, |
295 | 1504, 1728, 0, 1024, 1025, 1028, 1072, 0, |
291 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
296 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
292 | /* 1280x1024@120Hz RB */ |
297 | /* 1280x1024@120Hz RB */ |
293 | { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 187250, 1280, 1328, |
298 | { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 187250, 1280, 1328, |
294 | 1360, 1440, 0, 1024, 1027, 1034, 1084, 0, |
299 | 1360, 1440, 0, 1024, 1027, 1034, 1084, 0, |
295 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
300 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
296 | /* 1360x768@60Hz */ |
301 | /* 1360x768@60Hz */ |
297 | { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424, |
302 | { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424, |
298 | 1536, 1792, 0, 768, 771, 777, 795, 0, |
303 | 1536, 1792, 0, 768, 771, 777, 795, 0, |
299 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
304 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
300 | /* 1360x768@120Hz RB */ |
305 | /* 1360x768@120Hz RB */ |
301 | { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 148250, 1360, 1408, |
306 | { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 148250, 1360, 1408, |
302 | 1440, 1520, 0, 768, 771, 776, 813, 0, |
307 | 1440, 1520, 0, 768, 771, 776, 813, 0, |
303 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
308 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
304 | /* 1400x1050@60Hz RB */ |
309 | /* 1400x1050@60Hz RB */ |
305 | { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 101000, 1400, 1448, |
310 | { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 101000, 1400, 1448, |
306 | 1480, 1560, 0, 1050, 1053, 1057, 1080, 0, |
311 | 1480, 1560, 0, 1050, 1053, 1057, 1080, 0, |
307 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
312 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
308 | /* 1400x1050@60Hz */ |
313 | /* 1400x1050@60Hz */ |
309 | { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488, |
314 | { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488, |
310 | 1632, 1864, 0, 1050, 1053, 1057, 1089, 0, |
315 | 1632, 1864, 0, 1050, 1053, 1057, 1089, 0, |
311 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
316 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
312 | /* 1400x1050@75Hz */ |
317 | /* 1400x1050@75Hz */ |
313 | { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504, |
318 | { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504, |
314 | 1648, 1896, 0, 1050, 1053, 1057, 1099, 0, |
319 | 1648, 1896, 0, 1050, 1053, 1057, 1099, 0, |
315 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
320 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
316 | /* 1400x1050@85Hz */ |
321 | /* 1400x1050@85Hz */ |
317 | { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504, |
322 | { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504, |
318 | 1656, 1912, 0, 1050, 1053, 1057, 1105, 0, |
323 | 1656, 1912, 0, 1050, 1053, 1057, 1105, 0, |
319 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
324 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
320 | /* 1400x1050@120Hz RB */ |
325 | /* 1400x1050@120Hz RB */ |
321 | { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 208000, 1400, 1448, |
326 | { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 208000, 1400, 1448, |
322 | 1480, 1560, 0, 1050, 1053, 1057, 1112, 0, |
327 | 1480, 1560, 0, 1050, 1053, 1057, 1112, 0, |
323 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
328 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
324 | /* 1440x900@60Hz RB */ |
329 | /* 1440x900@60Hz RB */ |
325 | { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 88750, 1440, 1488, |
330 | { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 88750, 1440, 1488, |
326 | 1520, 1600, 0, 900, 903, 909, 926, 0, |
331 | 1520, 1600, 0, 900, 903, 909, 926, 0, |
327 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
332 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
328 | /* 1440x900@60Hz */ |
333 | /* 1440x900@60Hz */ |
329 | { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520, |
334 | { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520, |
330 | 1672, 1904, 0, 900, 903, 909, 934, 0, |
335 | 1672, 1904, 0, 900, 903, 909, 934, 0, |
331 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
336 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
332 | /* 1440x900@75Hz */ |
337 | /* 1440x900@75Hz */ |
333 | { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536, |
338 | { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536, |
334 | 1688, 1936, 0, 900, 903, 909, 942, 0, |
339 | 1688, 1936, 0, 900, 903, 909, 942, 0, |
335 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
340 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
336 | /* 1440x900@85Hz */ |
341 | /* 1440x900@85Hz */ |
337 | { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544, |
342 | { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544, |
338 | 1696, 1952, 0, 900, 903, 909, 948, 0, |
343 | 1696, 1952, 0, 900, 903, 909, 948, 0, |
339 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
344 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
340 | /* 1440x900@120Hz RB */ |
345 | /* 1440x900@120Hz RB */ |
341 | { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 182750, 1440, 1488, |
346 | { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 182750, 1440, 1488, |
342 | 1520, 1600, 0, 900, 903, 909, 953, 0, |
347 | 1520, 1600, 0, 900, 903, 909, 953, 0, |
343 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
348 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
344 | /* 1600x1200@60Hz */ |
349 | /* 1600x1200@60Hz */ |
345 | { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664, |
350 | { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664, |
346 | 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, |
351 | 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, |
347 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
352 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
348 | /* 1600x1200@65Hz */ |
353 | /* 1600x1200@65Hz */ |
349 | { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664, |
354 | { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664, |
350 | 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, |
355 | 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, |
351 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
356 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
352 | /* 1600x1200@70Hz */ |
357 | /* 1600x1200@70Hz */ |
353 | { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664, |
358 | { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664, |
354 | 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, |
359 | 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, |
355 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
360 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
356 | /* 1600x1200@75Hz */ |
361 | /* 1600x1200@75Hz */ |
357 | { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664, |
362 | { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664, |
358 | 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, |
363 | 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, |
359 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
364 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
360 | /* 1600x1200@85Hz */ |
365 | /* 1600x1200@85Hz */ |
361 | { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664, |
366 | { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664, |
362 | 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, |
367 | 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, |
363 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
368 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
364 | /* 1600x1200@120Hz RB */ |
369 | /* 1600x1200@120Hz RB */ |
365 | { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 268250, 1600, 1648, |
370 | { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 268250, 1600, 1648, |
366 | 1680, 1760, 0, 1200, 1203, 1207, 1271, 0, |
371 | 1680, 1760, 0, 1200, 1203, 1207, 1271, 0, |
367 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
372 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
368 | /* 1680x1050@60Hz RB */ |
373 | /* 1680x1050@60Hz RB */ |
369 | { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 119000, 1680, 1728, |
374 | { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 119000, 1680, 1728, |
370 | 1760, 1840, 0, 1050, 1053, 1059, 1080, 0, |
375 | 1760, 1840, 0, 1050, 1053, 1059, 1080, 0, |
371 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
376 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
372 | /* 1680x1050@60Hz */ |
377 | /* 1680x1050@60Hz */ |
373 | { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784, |
378 | { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784, |
374 | 1960, 2240, 0, 1050, 1053, 1059, 1089, 0, |
379 | 1960, 2240, 0, 1050, 1053, 1059, 1089, 0, |
375 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
380 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
376 | /* 1680x1050@75Hz */ |
381 | /* 1680x1050@75Hz */ |
377 | { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800, |
382 | { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800, |
378 | 1976, 2272, 0, 1050, 1053, 1059, 1099, 0, |
383 | 1976, 2272, 0, 1050, 1053, 1059, 1099, 0, |
379 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
384 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
380 | /* 1680x1050@85Hz */ |
385 | /* 1680x1050@85Hz */ |
381 | { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808, |
386 | { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808, |
382 | 1984, 2288, 0, 1050, 1053, 1059, 1105, 0, |
387 | 1984, 2288, 0, 1050, 1053, 1059, 1105, 0, |
383 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
388 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
384 | /* 1680x1050@120Hz RB */ |
389 | /* 1680x1050@120Hz RB */ |
385 | { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 245500, 1680, 1728, |
390 | { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 245500, 1680, 1728, |
386 | 1760, 1840, 0, 1050, 1053, 1059, 1112, 0, |
391 | 1760, 1840, 0, 1050, 1053, 1059, 1112, 0, |
387 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
392 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
388 | /* 1792x1344@60Hz */ |
393 | /* 1792x1344@60Hz */ |
389 | { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920, |
394 | { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920, |
390 | 2120, 2448, 0, 1344, 1345, 1348, 1394, 0, |
395 | 2120, 2448, 0, 1344, 1345, 1348, 1394, 0, |
391 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
396 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
392 | /* 1792x1344@75Hz */ |
397 | /* 1792x1344@75Hz */ |
393 | { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888, |
398 | { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888, |
394 | 2104, 2456, 0, 1344, 1345, 1348, 1417, 0, |
399 | 2104, 2456, 0, 1344, 1345, 1348, 1417, 0, |
395 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
400 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
396 | /* 1792x1344@120Hz RB */ |
401 | /* 1792x1344@120Hz RB */ |
397 | { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 333250, 1792, 1840, |
402 | { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 333250, 1792, 1840, |
398 | 1872, 1952, 0, 1344, 1347, 1351, 1423, 0, |
403 | 1872, 1952, 0, 1344, 1347, 1351, 1423, 0, |
399 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
404 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
400 | /* 1856x1392@60Hz */ |
405 | /* 1856x1392@60Hz */ |
401 | { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952, |
406 | { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952, |
402 | 2176, 2528, 0, 1392, 1393, 1396, 1439, 0, |
407 | 2176, 2528, 0, 1392, 1393, 1396, 1439, 0, |
403 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
408 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
404 | /* 1856x1392@75Hz */ |
409 | /* 1856x1392@75Hz */ |
405 | { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984, |
410 | { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984, |
406 | 2208, 2560, 0, 1392, 1395, 1399, 1500, 0, |
411 | 2208, 2560, 0, 1392, 1395, 1399, 1500, 0, |
407 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
412 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
408 | /* 1856x1392@120Hz RB */ |
413 | /* 1856x1392@120Hz RB */ |
409 | { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 356500, 1856, 1904, |
414 | { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 356500, 1856, 1904, |
410 | 1936, 2016, 0, 1392, 1395, 1399, 1474, 0, |
415 | 1936, 2016, 0, 1392, 1395, 1399, 1474, 0, |
411 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
416 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
412 | /* 1920x1200@60Hz RB */ |
417 | /* 1920x1200@60Hz RB */ |
413 | { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 154000, 1920, 1968, |
418 | { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 154000, 1920, 1968, |
414 | 2000, 2080, 0, 1200, 1203, 1209, 1235, 0, |
419 | 2000, 2080, 0, 1200, 1203, 1209, 1235, 0, |
415 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
420 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
416 | /* 1920x1200@60Hz */ |
421 | /* 1920x1200@60Hz */ |
417 | { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056, |
422 | { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056, |
418 | 2256, 2592, 0, 1200, 1203, 1209, 1245, 0, |
423 | 2256, 2592, 0, 1200, 1203, 1209, 1245, 0, |
419 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
424 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
420 | /* 1920x1200@75Hz */ |
425 | /* 1920x1200@75Hz */ |
421 | { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056, |
426 | { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056, |
422 | 2264, 2608, 0, 1200, 1203, 1209, 1255, 0, |
427 | 2264, 2608, 0, 1200, 1203, 1209, 1255, 0, |
423 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
428 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
424 | /* 1920x1200@85Hz */ |
429 | /* 1920x1200@85Hz */ |
425 | { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064, |
430 | { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064, |
426 | 2272, 2624, 0, 1200, 1203, 1209, 1262, 0, |
431 | 2272, 2624, 0, 1200, 1203, 1209, 1262, 0, |
427 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
432 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
428 | /* 1920x1200@120Hz RB */ |
433 | /* 1920x1200@120Hz RB */ |
429 | { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 317000, 1920, 1968, |
434 | { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 317000, 1920, 1968, |
430 | 2000, 2080, 0, 1200, 1203, 1209, 1271, 0, |
435 | 2000, 2080, 0, 1200, 1203, 1209, 1271, 0, |
431 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
436 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
432 | /* 1920x1440@60Hz */ |
437 | /* 1920x1440@60Hz */ |
433 | { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048, |
438 | { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048, |
434 | 2256, 2600, 0, 1440, 1441, 1444, 1500, 0, |
439 | 2256, 2600, 0, 1440, 1441, 1444, 1500, 0, |
435 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
440 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
436 | /* 1920x1440@75Hz */ |
441 | /* 1920x1440@75Hz */ |
437 | { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064, |
442 | { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064, |
438 | 2288, 2640, 0, 1440, 1441, 1444, 1500, 0, |
443 | 2288, 2640, 0, 1440, 1441, 1444, 1500, 0, |
439 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
444 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
440 | /* 1920x1440@120Hz RB */ |
445 | /* 1920x1440@120Hz RB */ |
441 | { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 380500, 1920, 1968, |
446 | { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 380500, 1920, 1968, |
442 | 2000, 2080, 0, 1440, 1443, 1447, 1525, 0, |
447 | 2000, 2080, 0, 1440, 1443, 1447, 1525, 0, |
443 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
448 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
444 | /* 2560x1600@60Hz RB */ |
449 | /* 2560x1600@60Hz RB */ |
445 | { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 268500, 2560, 2608, |
450 | { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 268500, 2560, 2608, |
446 | 2640, 2720, 0, 1600, 1603, 1609, 1646, 0, |
451 | 2640, 2720, 0, 1600, 1603, 1609, 1646, 0, |
447 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
452 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
448 | /* 2560x1600@60Hz */ |
453 | /* 2560x1600@60Hz */ |
449 | { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752, |
454 | { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752, |
450 | 3032, 3504, 0, 1600, 1603, 1609, 1658, 0, |
455 | 3032, 3504, 0, 1600, 1603, 1609, 1658, 0, |
451 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
456 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
452 | /* 2560x1600@75HZ */ |
457 | /* 2560x1600@75HZ */ |
453 | { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768, |
458 | { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768, |
454 | 3048, 3536, 0, 1600, 1603, 1609, 1672, 0, |
459 | 3048, 3536, 0, 1600, 1603, 1609, 1672, 0, |
455 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
460 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
456 | /* 2560x1600@85HZ */ |
461 | /* 2560x1600@85HZ */ |
457 | { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768, |
462 | { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768, |
458 | 3048, 3536, 0, 1600, 1603, 1609, 1682, 0, |
463 | 3048, 3536, 0, 1600, 1603, 1609, 1682, 0, |
459 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
464 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
460 | /* 2560x1600@120Hz RB */ |
465 | /* 2560x1600@120Hz RB */ |
461 | { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 552750, 2560, 2608, |
466 | { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 552750, 2560, 2608, |
462 | 2640, 2720, 0, 1600, 1603, 1609, 1694, 0, |
467 | 2640, 2720, 0, 1600, 1603, 1609, 1694, 0, |
463 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
468 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
464 | }; |
469 | }; |
465 | 470 | ||
466 | /* |
471 | /* |
467 | * These more or less come from the DMT spec. The 720x400 modes are |
472 | * These more or less come from the DMT spec. The 720x400 modes are |
468 | * inferred from historical 80x25 practice. The 640x480@67 and 832x624@75 |
473 | * inferred from historical 80x25 practice. The 640x480@67 and 832x624@75 |
469 | * modes are old-school Mac modes. The EDID spec says the 1152x864@75 mode |
474 | * modes are old-school Mac modes. The EDID spec says the 1152x864@75 mode |
470 | * should be 1152x870, again for the Mac, but instead we use the x864 DMT |
475 | * should be 1152x870, again for the Mac, but instead we use the x864 DMT |
471 | * mode. |
476 | * mode. |
472 | * |
477 | * |
473 | * The DMT modes have been fact-checked; the rest are mild guesses. |
478 | * The DMT modes have been fact-checked; the rest are mild guesses. |
474 | */ |
479 | */ |
475 | static const struct drm_display_mode edid_est_modes[] = { |
480 | static const struct drm_display_mode edid_est_modes[] = { |
476 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840, |
481 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840, |
477 | 968, 1056, 0, 600, 601, 605, 628, 0, |
482 | 968, 1056, 0, 600, 601, 605, 628, 0, |
478 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */ |
483 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */ |
479 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824, |
484 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824, |
480 | 896, 1024, 0, 600, 601, 603, 625, 0, |
485 | 896, 1024, 0, 600, 601, 603, 625, 0, |
481 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */ |
486 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */ |
482 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656, |
487 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656, |
483 | 720, 840, 0, 480, 481, 484, 500, 0, |
488 | 720, 840, 0, 480, 481, 484, 500, 0, |
484 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */ |
489 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */ |
485 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664, |
490 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664, |
486 | 704, 832, 0, 480, 489, 491, 520, 0, |
491 | 704, 832, 0, 480, 489, 491, 520, 0, |
487 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */ |
492 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */ |
488 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704, |
493 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704, |
489 | 768, 864, 0, 480, 483, 486, 525, 0, |
494 | 768, 864, 0, 480, 483, 486, 525, 0, |
490 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */ |
495 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */ |
491 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656, |
496 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656, |
492 | 752, 800, 0, 480, 490, 492, 525, 0, |
497 | 752, 800, 0, 480, 490, 492, 525, 0, |
493 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */ |
498 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */ |
494 | { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738, |
499 | { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738, |
495 | 846, 900, 0, 400, 421, 423, 449, 0, |
500 | 846, 900, 0, 400, 421, 423, 449, 0, |
496 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */ |
501 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */ |
497 | { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738, |
502 | { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738, |
498 | 846, 900, 0, 400, 412, 414, 449, 0, |
503 | 846, 900, 0, 400, 412, 414, 449, 0, |
499 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */ |
504 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */ |
500 | { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296, |
505 | { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296, |
501 | 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, |
506 | 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, |
502 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */ |
507 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */ |
503 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040, |
508 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040, |
504 | 1136, 1312, 0, 768, 769, 772, 800, 0, |
509 | 1136, 1312, 0, 768, 769, 772, 800, 0, |
505 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */ |
510 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */ |
506 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048, |
511 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048, |
507 | 1184, 1328, 0, 768, 771, 777, 806, 0, |
512 | 1184, 1328, 0, 768, 771, 777, 806, 0, |
508 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */ |
513 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */ |
509 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048, |
514 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048, |
510 | 1184, 1344, 0, 768, 771, 777, 806, 0, |
515 | 1184, 1344, 0, 768, 771, 777, 806, 0, |
511 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */ |
516 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */ |
512 | { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032, |
517 | { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032, |
513 | 1208, 1264, 0, 768, 768, 776, 817, 0, |
518 | 1208, 1264, 0, 768, 768, 776, 817, 0, |
514 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */ |
519 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */ |
515 | { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864, |
520 | { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864, |
516 | 928, 1152, 0, 624, 625, 628, 667, 0, |
521 | 928, 1152, 0, 624, 625, 628, 667, 0, |
517 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */ |
522 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */ |
518 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816, |
523 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816, |
519 | 896, 1056, 0, 600, 601, 604, 625, 0, |
524 | 896, 1056, 0, 600, 601, 604, 625, 0, |
520 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */ |
525 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */ |
521 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856, |
526 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856, |
522 | 976, 1040, 0, 600, 637, 643, 666, 0, |
527 | 976, 1040, 0, 600, 637, 643, 666, 0, |
523 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */ |
528 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */ |
524 | { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216, |
529 | { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216, |
525 | 1344, 1600, 0, 864, 865, 868, 900, 0, |
530 | 1344, 1600, 0, 864, 865, 868, 900, 0, |
526 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */ |
531 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */ |
527 | }; |
532 | }; |
528 | 533 | ||
529 | struct minimode { |
534 | struct minimode { |
530 | short w; |
535 | short w; |
531 | short h; |
536 | short h; |
532 | short r; |
537 | short r; |
533 | short rb; |
538 | short rb; |
534 | }; |
539 | }; |
535 | 540 | ||
536 | static const struct minimode est3_modes[] = { |
541 | static const struct minimode est3_modes[] = { |
537 | /* byte 6 */ |
542 | /* byte 6 */ |
538 | { 640, 350, 85, 0 }, |
543 | { 640, 350, 85, 0 }, |
539 | { 640, 400, 85, 0 }, |
544 | { 640, 400, 85, 0 }, |
540 | { 720, 400, 85, 0 }, |
545 | { 720, 400, 85, 0 }, |
541 | { 640, 480, 85, 0 }, |
546 | { 640, 480, 85, 0 }, |
542 | { 848, 480, 60, 0 }, |
547 | { 848, 480, 60, 0 }, |
543 | { 800, 600, 85, 0 }, |
548 | { 800, 600, 85, 0 }, |
544 | { 1024, 768, 85, 0 }, |
549 | { 1024, 768, 85, 0 }, |
545 | { 1152, 864, 75, 0 }, |
550 | { 1152, 864, 75, 0 }, |
546 | /* byte 7 */ |
551 | /* byte 7 */ |
547 | { 1280, 768, 60, 1 }, |
552 | { 1280, 768, 60, 1 }, |
548 | { 1280, 768, 60, 0 }, |
553 | { 1280, 768, 60, 0 }, |
549 | { 1280, 768, 75, 0 }, |
554 | { 1280, 768, 75, 0 }, |
550 | { 1280, 768, 85, 0 }, |
555 | { 1280, 768, 85, 0 }, |
551 | { 1280, 960, 60, 0 }, |
556 | { 1280, 960, 60, 0 }, |
552 | { 1280, 960, 85, 0 }, |
557 | { 1280, 960, 85, 0 }, |
553 | { 1280, 1024, 60, 0 }, |
558 | { 1280, 1024, 60, 0 }, |
554 | { 1280, 1024, 85, 0 }, |
559 | { 1280, 1024, 85, 0 }, |
555 | /* byte 8 */ |
560 | /* byte 8 */ |
556 | { 1360, 768, 60, 0 }, |
561 | { 1360, 768, 60, 0 }, |
557 | { 1440, 900, 60, 1 }, |
562 | { 1440, 900, 60, 1 }, |
558 | { 1440, 900, 60, 0 }, |
563 | { 1440, 900, 60, 0 }, |
559 | { 1440, 900, 75, 0 }, |
564 | { 1440, 900, 75, 0 }, |
560 | { 1440, 900, 85, 0 }, |
565 | { 1440, 900, 85, 0 }, |
561 | { 1400, 1050, 60, 1 }, |
566 | { 1400, 1050, 60, 1 }, |
562 | { 1400, 1050, 60, 0 }, |
567 | { 1400, 1050, 60, 0 }, |
563 | { 1400, 1050, 75, 0 }, |
568 | { 1400, 1050, 75, 0 }, |
564 | /* byte 9 */ |
569 | /* byte 9 */ |
565 | { 1400, 1050, 85, 0 }, |
570 | { 1400, 1050, 85, 0 }, |
566 | { 1680, 1050, 60, 1 }, |
571 | { 1680, 1050, 60, 1 }, |
567 | { 1680, 1050, 60, 0 }, |
572 | { 1680, 1050, 60, 0 }, |
568 | { 1680, 1050, 75, 0 }, |
573 | { 1680, 1050, 75, 0 }, |
569 | { 1680, 1050, 85, 0 }, |
574 | { 1680, 1050, 85, 0 }, |
570 | { 1600, 1200, 60, 0 }, |
575 | { 1600, 1200, 60, 0 }, |
571 | { 1600, 1200, 65, 0 }, |
576 | { 1600, 1200, 65, 0 }, |
572 | { 1600, 1200, 70, 0 }, |
577 | { 1600, 1200, 70, 0 }, |
573 | /* byte 10 */ |
578 | /* byte 10 */ |
574 | { 1600, 1200, 75, 0 }, |
579 | { 1600, 1200, 75, 0 }, |
575 | { 1600, 1200, 85, 0 }, |
580 | { 1600, 1200, 85, 0 }, |
576 | { 1792, 1344, 60, 0 }, |
581 | { 1792, 1344, 60, 0 }, |
577 | { 1792, 1344, 75, 0 }, |
582 | { 1792, 1344, 75, 0 }, |
578 | { 1856, 1392, 60, 0 }, |
583 | { 1856, 1392, 60, 0 }, |
579 | { 1856, 1392, 75, 0 }, |
584 | { 1856, 1392, 75, 0 }, |
580 | { 1920, 1200, 60, 1 }, |
585 | { 1920, 1200, 60, 1 }, |
581 | { 1920, 1200, 60, 0 }, |
586 | { 1920, 1200, 60, 0 }, |
582 | /* byte 11 */ |
587 | /* byte 11 */ |
583 | { 1920, 1200, 75, 0 }, |
588 | { 1920, 1200, 75, 0 }, |
584 | { 1920, 1200, 85, 0 }, |
589 | { 1920, 1200, 85, 0 }, |
585 | { 1920, 1440, 60, 0 }, |
590 | { 1920, 1440, 60, 0 }, |
586 | { 1920, 1440, 75, 0 }, |
591 | { 1920, 1440, 75, 0 }, |
587 | }; |
592 | }; |
588 | 593 | ||
589 | static const struct minimode extra_modes[] = { |
594 | static const struct minimode extra_modes[] = { |
590 | { 1024, 576, 60, 0 }, |
595 | { 1024, 576, 60, 0 }, |
591 | { 1366, 768, 60, 0 }, |
596 | { 1366, 768, 60, 0 }, |
592 | { 1600, 900, 60, 0 }, |
597 | { 1600, 900, 60, 0 }, |
593 | { 1680, 945, 60, 0 }, |
598 | { 1680, 945, 60, 0 }, |
594 | { 1920, 1080, 60, 0 }, |
599 | { 1920, 1080, 60, 0 }, |
595 | { 2048, 1152, 60, 0 }, |
600 | { 2048, 1152, 60, 0 }, |
596 | { 2048, 1536, 60, 0 }, |
601 | { 2048, 1536, 60, 0 }, |
597 | }; |
602 | }; |
598 | 603 | ||
599 | /* |
604 | /* |
600 | * Probably taken from CEA-861 spec. |
605 | * Probably taken from CEA-861 spec. |
601 | * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c. |
606 | * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c. |
602 | */ |
607 | */ |
603 | static const struct drm_display_mode edid_cea_modes[] = { |
608 | static const struct drm_display_mode edid_cea_modes[] = { |
604 | /* 1 - 640x480@60Hz */ |
609 | /* 1 - 640x480@60Hz */ |
605 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656, |
610 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656, |
606 | 752, 800, 0, 480, 490, 492, 525, 0, |
611 | 752, 800, 0, 480, 490, 492, 525, 0, |
607 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
612 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
608 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
613 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
609 | /* 2 - 720x480@60Hz */ |
614 | /* 2 - 720x480@60Hz */ |
610 | { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736, |
615 | { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736, |
611 | 798, 858, 0, 480, 489, 495, 525, 0, |
616 | 798, 858, 0, 480, 489, 495, 525, 0, |
612 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
617 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
613 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
618 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
614 | /* 3 - 720x480@60Hz */ |
619 | /* 3 - 720x480@60Hz */ |
615 | { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736, |
620 | { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736, |
616 | 798, 858, 0, 480, 489, 495, 525, 0, |
621 | 798, 858, 0, 480, 489, 495, 525, 0, |
617 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
622 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
618 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
623 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
619 | /* 4 - 1280x720@60Hz */ |
624 | /* 4 - 1280x720@60Hz */ |
620 | { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390, |
625 | { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390, |
621 | 1430, 1650, 0, 720, 725, 730, 750, 0, |
626 | 1430, 1650, 0, 720, 725, 730, 750, 0, |
622 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
627 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
623 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
628 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
624 | /* 5 - 1920x1080i@60Hz */ |
629 | /* 5 - 1920x1080i@60Hz */ |
625 | { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008, |
630 | { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008, |
626 | 2052, 2200, 0, 1080, 1084, 1094, 1125, 0, |
631 | 2052, 2200, 0, 1080, 1084, 1094, 1125, 0, |
627 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | |
632 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | |
628 | DRM_MODE_FLAG_INTERLACE), |
633 | DRM_MODE_FLAG_INTERLACE), |
629 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
634 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
630 | /* 6 - 1440x480i@60Hz */ |
635 | /* 6 - 1440x480i@60Hz */ |
631 | { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, |
636 | { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, |
632 | 1602, 1716, 0, 480, 488, 494, 525, 0, |
637 | 1602, 1716, 0, 480, 488, 494, 525, 0, |
633 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
638 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
634 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
639 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
635 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
640 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
636 | /* 7 - 1440x480i@60Hz */ |
641 | /* 7 - 1440x480i@60Hz */ |
637 | { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, |
642 | { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, |
638 | 1602, 1716, 0, 480, 488, 494, 525, 0, |
643 | 1602, 1716, 0, 480, 488, 494, 525, 0, |
639 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
644 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
640 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
645 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
641 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
646 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
642 | /* 8 - 1440x240@60Hz */ |
647 | /* 8 - 1440x240@60Hz */ |
643 | { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, |
648 | { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, |
644 | 1602, 1716, 0, 240, 244, 247, 262, 0, |
649 | 1602, 1716, 0, 240, 244, 247, 262, 0, |
645 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
650 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
646 | DRM_MODE_FLAG_DBLCLK), |
651 | DRM_MODE_FLAG_DBLCLK), |
647 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
652 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
648 | /* 9 - 1440x240@60Hz */ |
653 | /* 9 - 1440x240@60Hz */ |
649 | { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, |
654 | { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, |
650 | 1602, 1716, 0, 240, 244, 247, 262, 0, |
655 | 1602, 1716, 0, 240, 244, 247, 262, 0, |
651 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
656 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
652 | DRM_MODE_FLAG_DBLCLK), |
657 | DRM_MODE_FLAG_DBLCLK), |
653 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
658 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
654 | /* 10 - 2880x480i@60Hz */ |
659 | /* 10 - 2880x480i@60Hz */ |
655 | { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, |
660 | { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, |
656 | 3204, 3432, 0, 480, 488, 494, 525, 0, |
661 | 3204, 3432, 0, 480, 488, 494, 525, 0, |
657 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
662 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
658 | DRM_MODE_FLAG_INTERLACE), |
663 | DRM_MODE_FLAG_INTERLACE), |
659 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
664 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
660 | /* 11 - 2880x480i@60Hz */ |
665 | /* 11 - 2880x480i@60Hz */ |
661 | { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, |
666 | { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, |
662 | 3204, 3432, 0, 480, 488, 494, 525, 0, |
667 | 3204, 3432, 0, 480, 488, 494, 525, 0, |
663 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
668 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
664 | DRM_MODE_FLAG_INTERLACE), |
669 | DRM_MODE_FLAG_INTERLACE), |
665 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
670 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
666 | /* 12 - 2880x240@60Hz */ |
671 | /* 12 - 2880x240@60Hz */ |
667 | { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, |
672 | { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, |
668 | 3204, 3432, 0, 240, 244, 247, 262, 0, |
673 | 3204, 3432, 0, 240, 244, 247, 262, 0, |
669 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
674 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
670 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
675 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
671 | /* 13 - 2880x240@60Hz */ |
676 | /* 13 - 2880x240@60Hz */ |
672 | { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, |
677 | { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, |
673 | 3204, 3432, 0, 240, 244, 247, 262, 0, |
678 | 3204, 3432, 0, 240, 244, 247, 262, 0, |
674 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
679 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
675 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
680 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
676 | /* 14 - 1440x480@60Hz */ |
681 | /* 14 - 1440x480@60Hz */ |
677 | { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472, |
682 | { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472, |
678 | 1596, 1716, 0, 480, 489, 495, 525, 0, |
683 | 1596, 1716, 0, 480, 489, 495, 525, 0, |
679 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
684 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
680 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
685 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
681 | /* 15 - 1440x480@60Hz */ |
686 | /* 15 - 1440x480@60Hz */ |
682 | { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472, |
687 | { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472, |
683 | 1596, 1716, 0, 480, 489, 495, 525, 0, |
688 | 1596, 1716, 0, 480, 489, 495, 525, 0, |
684 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
689 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
685 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
690 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
686 | /* 16 - 1920x1080@60Hz */ |
691 | /* 16 - 1920x1080@60Hz */ |
687 | { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008, |
692 | { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008, |
688 | 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, |
693 | 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, |
689 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
694 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
690 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
695 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
691 | /* 17 - 720x576@50Hz */ |
696 | /* 17 - 720x576@50Hz */ |
692 | { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732, |
697 | { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732, |
693 | 796, 864, 0, 576, 581, 586, 625, 0, |
698 | 796, 864, 0, 576, 581, 586, 625, 0, |
694 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
699 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
695 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
700 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
696 | /* 18 - 720x576@50Hz */ |
701 | /* 18 - 720x576@50Hz */ |
697 | { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732, |
702 | { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732, |
698 | 796, 864, 0, 576, 581, 586, 625, 0, |
703 | 796, 864, 0, 576, 581, 586, 625, 0, |
699 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
704 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
700 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
705 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
701 | /* 19 - 1280x720@50Hz */ |
706 | /* 19 - 1280x720@50Hz */ |
702 | { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720, |
707 | { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720, |
703 | 1760, 1980, 0, 720, 725, 730, 750, 0, |
708 | 1760, 1980, 0, 720, 725, 730, 750, 0, |
704 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
709 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
705 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
710 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
706 | /* 20 - 1920x1080i@50Hz */ |
711 | /* 20 - 1920x1080i@50Hz */ |
707 | { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448, |
712 | { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448, |
708 | 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, |
713 | 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, |
709 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | |
714 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | |
710 | DRM_MODE_FLAG_INTERLACE), |
715 | DRM_MODE_FLAG_INTERLACE), |
711 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
716 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
712 | /* 21 - 1440x576i@50Hz */ |
717 | /* 21 - 1440x576i@50Hz */ |
713 | { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, |
718 | { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, |
714 | 1590, 1728, 0, 576, 580, 586, 625, 0, |
719 | 1590, 1728, 0, 576, 580, 586, 625, 0, |
715 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
720 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
716 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
721 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
717 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
722 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
718 | /* 22 - 1440x576i@50Hz */ |
723 | /* 22 - 1440x576i@50Hz */ |
719 | { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, |
724 | { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, |
720 | 1590, 1728, 0, 576, 580, 586, 625, 0, |
725 | 1590, 1728, 0, 576, 580, 586, 625, 0, |
721 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
726 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
722 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
727 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
723 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
728 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
724 | /* 23 - 1440x288@50Hz */ |
729 | /* 23 - 1440x288@50Hz */ |
725 | { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, |
730 | { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, |
726 | 1590, 1728, 0, 288, 290, 293, 312, 0, |
731 | 1590, 1728, 0, 288, 290, 293, 312, 0, |
727 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
732 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
728 | DRM_MODE_FLAG_DBLCLK), |
733 | DRM_MODE_FLAG_DBLCLK), |
729 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
734 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
730 | /* 24 - 1440x288@50Hz */ |
735 | /* 24 - 1440x288@50Hz */ |
731 | { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, |
736 | { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, |
732 | 1590, 1728, 0, 288, 290, 293, 312, 0, |
737 | 1590, 1728, 0, 288, 290, 293, 312, 0, |
733 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
738 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
734 | DRM_MODE_FLAG_DBLCLK), |
739 | DRM_MODE_FLAG_DBLCLK), |
735 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
740 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
736 | /* 25 - 2880x576i@50Hz */ |
741 | /* 25 - 2880x576i@50Hz */ |
737 | { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, |
742 | { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, |
738 | 3180, 3456, 0, 576, 580, 586, 625, 0, |
743 | 3180, 3456, 0, 576, 580, 586, 625, 0, |
739 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
744 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
740 | DRM_MODE_FLAG_INTERLACE), |
745 | DRM_MODE_FLAG_INTERLACE), |
741 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
746 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
742 | /* 26 - 2880x576i@50Hz */ |
747 | /* 26 - 2880x576i@50Hz */ |
743 | { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, |
748 | { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, |
744 | 3180, 3456, 0, 576, 580, 586, 625, 0, |
749 | 3180, 3456, 0, 576, 580, 586, 625, 0, |
745 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
750 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
746 | DRM_MODE_FLAG_INTERLACE), |
751 | DRM_MODE_FLAG_INTERLACE), |
747 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
752 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
748 | /* 27 - 2880x288@50Hz */ |
753 | /* 27 - 2880x288@50Hz */ |
749 | { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, |
754 | { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, |
750 | 3180, 3456, 0, 288, 290, 293, 312, 0, |
755 | 3180, 3456, 0, 288, 290, 293, 312, 0, |
751 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
756 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
752 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
757 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
753 | /* 28 - 2880x288@50Hz */ |
758 | /* 28 - 2880x288@50Hz */ |
754 | { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, |
759 | { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, |
755 | 3180, 3456, 0, 288, 290, 293, 312, 0, |
760 | 3180, 3456, 0, 288, 290, 293, 312, 0, |
756 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
761 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
757 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
762 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
758 | /* 29 - 1440x576@50Hz */ |
763 | /* 29 - 1440x576@50Hz */ |
759 | { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, |
764 | { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, |
760 | 1592, 1728, 0, 576, 581, 586, 625, 0, |
765 | 1592, 1728, 0, 576, 581, 586, 625, 0, |
761 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
766 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
762 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
767 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
763 | /* 30 - 1440x576@50Hz */ |
768 | /* 30 - 1440x576@50Hz */ |
764 | { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, |
769 | { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, |
765 | 1592, 1728, 0, 576, 581, 586, 625, 0, |
770 | 1592, 1728, 0, 576, 581, 586, 625, 0, |
766 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
771 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
767 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
772 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
768 | /* 31 - 1920x1080@50Hz */ |
773 | /* 31 - 1920x1080@50Hz */ |
769 | { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448, |
774 | { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448, |
770 | 2492, 2640, 0, 1080, 1084, 1089, 1125, 0, |
775 | 2492, 2640, 0, 1080, 1084, 1089, 1125, 0, |
771 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
776 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
772 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
777 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
773 | /* 32 - 1920x1080@24Hz */ |
778 | /* 32 - 1920x1080@24Hz */ |
774 | { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558, |
779 | { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558, |
775 | 2602, 2750, 0, 1080, 1084, 1089, 1125, 0, |
780 | 2602, 2750, 0, 1080, 1084, 1089, 1125, 0, |
776 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
781 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
777 | .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
782 | .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
778 | /* 33 - 1920x1080@25Hz */ |
783 | /* 33 - 1920x1080@25Hz */ |
779 | { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448, |
784 | { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448, |
780 | 2492, 2640, 0, 1080, 1084, 1089, 1125, 0, |
785 | 2492, 2640, 0, 1080, 1084, 1089, 1125, 0, |
781 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
786 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
782 | .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
787 | .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
783 | /* 34 - 1920x1080@30Hz */ |
788 | /* 34 - 1920x1080@30Hz */ |
784 | { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008, |
789 | { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008, |
785 | 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, |
790 | 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, |
786 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
791 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
787 | .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
792 | .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
788 | /* 35 - 2880x480@60Hz */ |
793 | /* 35 - 2880x480@60Hz */ |
789 | { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944, |
794 | { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944, |
790 | 3192, 3432, 0, 480, 489, 495, 525, 0, |
795 | 3192, 3432, 0, 480, 489, 495, 525, 0, |
791 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
796 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
792 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
797 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
793 | /* 36 - 2880x480@60Hz */ |
798 | /* 36 - 2880x480@60Hz */ |
794 | { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944, |
799 | { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944, |
795 | 3192, 3432, 0, 480, 489, 495, 525, 0, |
800 | 3192, 3432, 0, 480, 489, 495, 525, 0, |
796 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
801 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
797 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
802 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
798 | /* 37 - 2880x576@50Hz */ |
803 | /* 37 - 2880x576@50Hz */ |
799 | { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928, |
804 | { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928, |
800 | 3184, 3456, 0, 576, 581, 586, 625, 0, |
805 | 3184, 3456, 0, 576, 581, 586, 625, 0, |
801 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
806 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
802 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
807 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
803 | /* 38 - 2880x576@50Hz */ |
808 | /* 38 - 2880x576@50Hz */ |
804 | { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928, |
809 | { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928, |
805 | 3184, 3456, 0, 576, 581, 586, 625, 0, |
810 | 3184, 3456, 0, 576, 581, 586, 625, 0, |
806 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
811 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
807 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
812 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
808 | /* 39 - 1920x1080i@50Hz */ |
813 | /* 39 - 1920x1080i@50Hz */ |
809 | { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952, |
814 | { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952, |
810 | 2120, 2304, 0, 1080, 1126, 1136, 1250, 0, |
815 | 2120, 2304, 0, 1080, 1126, 1136, 1250, 0, |
811 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC | |
816 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC | |
812 | DRM_MODE_FLAG_INTERLACE), |
817 | DRM_MODE_FLAG_INTERLACE), |
813 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
818 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
814 | /* 40 - 1920x1080i@100Hz */ |
819 | /* 40 - 1920x1080i@100Hz */ |
815 | { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448, |
820 | { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448, |
816 | 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, |
821 | 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, |
817 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | |
822 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | |
818 | DRM_MODE_FLAG_INTERLACE), |
823 | DRM_MODE_FLAG_INTERLACE), |
819 | .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
824 | .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
820 | /* 41 - 1280x720@100Hz */ |
825 | /* 41 - 1280x720@100Hz */ |
821 | { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720, |
826 | { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720, |
822 | 1760, 1980, 0, 720, 725, 730, 750, 0, |
827 | 1760, 1980, 0, 720, 725, 730, 750, 0, |
823 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
828 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
824 | .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
829 | .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
825 | /* 42 - 720x576@100Hz */ |
830 | /* 42 - 720x576@100Hz */ |
826 | { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732, |
831 | { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732, |
827 | 796, 864, 0, 576, 581, 586, 625, 0, |
832 | 796, 864, 0, 576, 581, 586, 625, 0, |
828 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
833 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
829 | .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
834 | .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
830 | /* 43 - 720x576@100Hz */ |
835 | /* 43 - 720x576@100Hz */ |
831 | { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732, |
836 | { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732, |
832 | 796, 864, 0, 576, 581, 586, 625, 0, |
837 | 796, 864, 0, 576, 581, 586, 625, 0, |
833 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
838 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
834 | .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
839 | .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
835 | /* 44 - 1440x576i@100Hz */ |
840 | /* 44 - 1440x576i@100Hz */ |
836 | { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, |
841 | { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, |
837 | 1590, 1728, 0, 576, 580, 586, 625, 0, |
842 | 1590, 1728, 0, 576, 580, 586, 625, 0, |
838 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
843 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
839 | DRM_MODE_FLAG_DBLCLK), |
844 | DRM_MODE_FLAG_DBLCLK), |
840 | .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
845 | .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
841 | /* 45 - 1440x576i@100Hz */ |
846 | /* 45 - 1440x576i@100Hz */ |
842 | { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, |
847 | { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, |
843 | 1590, 1728, 0, 576, 580, 586, 625, 0, |
848 | 1590, 1728, 0, 576, 580, 586, 625, 0, |
844 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
849 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
845 | DRM_MODE_FLAG_DBLCLK), |
850 | DRM_MODE_FLAG_DBLCLK), |
846 | .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
851 | .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
847 | /* 46 - 1920x1080i@120Hz */ |
852 | /* 46 - 1920x1080i@120Hz */ |
848 | { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008, |
853 | { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008, |
849 | 2052, 2200, 0, 1080, 1084, 1094, 1125, 0, |
854 | 2052, 2200, 0, 1080, 1084, 1094, 1125, 0, |
850 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | |
855 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | |
851 | DRM_MODE_FLAG_INTERLACE), |
856 | DRM_MODE_FLAG_INTERLACE), |
852 | .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
857 | .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
853 | /* 47 - 1280x720@120Hz */ |
858 | /* 47 - 1280x720@120Hz */ |
854 | { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390, |
859 | { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390, |
855 | 1430, 1650, 0, 720, 725, 730, 750, 0, |
860 | 1430, 1650, 0, 720, 725, 730, 750, 0, |
856 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
861 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
857 | .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
862 | .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
858 | /* 48 - 720x480@120Hz */ |
863 | /* 48 - 720x480@120Hz */ |
859 | { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736, |
864 | { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736, |
860 | 798, 858, 0, 480, 489, 495, 525, 0, |
865 | 798, 858, 0, 480, 489, 495, 525, 0, |
861 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
866 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
862 | .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
867 | .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
863 | /* 49 - 720x480@120Hz */ |
868 | /* 49 - 720x480@120Hz */ |
864 | { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736, |
869 | { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736, |
865 | 798, 858, 0, 480, 489, 495, 525, 0, |
870 | 798, 858, 0, 480, 489, 495, 525, 0, |
866 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
871 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
867 | .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
872 | .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
868 | /* 50 - 1440x480i@120Hz */ |
873 | /* 50 - 1440x480i@120Hz */ |
869 | { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478, |
874 | { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478, |
870 | 1602, 1716, 0, 480, 488, 494, 525, 0, |
875 | 1602, 1716, 0, 480, 488, 494, 525, 0, |
871 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
876 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
872 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
877 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
873 | .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
878 | .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
874 | /* 51 - 1440x480i@120Hz */ |
879 | /* 51 - 1440x480i@120Hz */ |
875 | { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478, |
880 | { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478, |
876 | 1602, 1716, 0, 480, 488, 494, 525, 0, |
881 | 1602, 1716, 0, 480, 488, 494, 525, 0, |
877 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
882 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
878 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
883 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
879 | .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
884 | .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
880 | /* 52 - 720x576@200Hz */ |
885 | /* 52 - 720x576@200Hz */ |
881 | { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732, |
886 | { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732, |
882 | 796, 864, 0, 576, 581, 586, 625, 0, |
887 | 796, 864, 0, 576, 581, 586, 625, 0, |
883 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
888 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
884 | .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
889 | .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
885 | /* 53 - 720x576@200Hz */ |
890 | /* 53 - 720x576@200Hz */ |
886 | { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732, |
891 | { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732, |
887 | 796, 864, 0, 576, 581, 586, 625, 0, |
892 | 796, 864, 0, 576, 581, 586, 625, 0, |
888 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
893 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
889 | .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
894 | .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
890 | /* 54 - 1440x576i@200Hz */ |
895 | /* 54 - 1440x576i@200Hz */ |
891 | { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464, |
896 | { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464, |
892 | 1590, 1728, 0, 576, 580, 586, 625, 0, |
897 | 1590, 1728, 0, 576, 580, 586, 625, 0, |
893 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
898 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
894 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
899 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
895 | .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
900 | .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
896 | /* 55 - 1440x576i@200Hz */ |
901 | /* 55 - 1440x576i@200Hz */ |
897 | { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464, |
902 | { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464, |
898 | 1590, 1728, 0, 576, 580, 586, 625, 0, |
903 | 1590, 1728, 0, 576, 580, 586, 625, 0, |
899 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
904 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
900 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
905 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
901 | .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
906 | .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
902 | /* 56 - 720x480@240Hz */ |
907 | /* 56 - 720x480@240Hz */ |
903 | { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736, |
908 | { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736, |
904 | 798, 858, 0, 480, 489, 495, 525, 0, |
909 | 798, 858, 0, 480, 489, 495, 525, 0, |
905 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
910 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
906 | .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
911 | .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
907 | /* 57 - 720x480@240Hz */ |
912 | /* 57 - 720x480@240Hz */ |
908 | { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736, |
913 | { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736, |
909 | 798, 858, 0, 480, 489, 495, 525, 0, |
914 | 798, 858, 0, 480, 489, 495, 525, 0, |
910 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
915 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
911 | .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
916 | .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
912 | /* 58 - 1440x480i@240 */ |
917 | /* 58 - 1440x480i@240 */ |
913 | { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478, |
918 | { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478, |
914 | 1602, 1716, 0, 480, 488, 494, 525, 0, |
919 | 1602, 1716, 0, 480, 488, 494, 525, 0, |
915 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
920 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
916 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
921 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
917 | .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
922 | .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
918 | /* 59 - 1440x480i@240 */ |
923 | /* 59 - 1440x480i@240 */ |
919 | { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478, |
924 | { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478, |
920 | 1602, 1716, 0, 480, 488, 494, 525, 0, |
925 | 1602, 1716, 0, 480, 488, 494, 525, 0, |
921 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
926 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
922 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
927 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
923 | .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
928 | .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
924 | /* 60 - 1280x720@24Hz */ |
929 | /* 60 - 1280x720@24Hz */ |
925 | { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040, |
930 | { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040, |
926 | 3080, 3300, 0, 720, 725, 730, 750, 0, |
931 | 3080, 3300, 0, 720, 725, 730, 750, 0, |
927 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
932 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
928 | .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
933 | .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
929 | /* 61 - 1280x720@25Hz */ |
934 | /* 61 - 1280x720@25Hz */ |
930 | { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700, |
935 | { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700, |
931 | 3740, 3960, 0, 720, 725, 730, 750, 0, |
936 | 3740, 3960, 0, 720, 725, 730, 750, 0, |
932 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
937 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
933 | .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
938 | .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
934 | /* 62 - 1280x720@30Hz */ |
939 | /* 62 - 1280x720@30Hz */ |
935 | { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040, |
940 | { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040, |
936 | 3080, 3300, 0, 720, 725, 730, 750, 0, |
941 | 3080, 3300, 0, 720, 725, 730, 750, 0, |
937 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
942 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
938 | .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
943 | .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
939 | /* 63 - 1920x1080@120Hz */ |
944 | /* 63 - 1920x1080@120Hz */ |
940 | { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008, |
945 | { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008, |
941 | 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, |
946 | 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, |
942 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
947 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
943 | .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
948 | .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
944 | /* 64 - 1920x1080@100Hz */ |
949 | /* 64 - 1920x1080@100Hz */ |
945 | { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448, |
950 | { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448, |
946 | 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, |
951 | 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, |
947 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
952 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
948 | .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
953 | .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
949 | }; |
954 | }; |
950 | 955 | ||
951 | /* |
956 | /* |
952 | * HDMI 1.4 4k modes. |
957 | * HDMI 1.4 4k modes. |
953 | */ |
958 | */ |
954 | static const struct drm_display_mode edid_4k_modes[] = { |
959 | static const struct drm_display_mode edid_4k_modes[] = { |
955 | /* 1 - 3840x2160@30Hz */ |
960 | /* 1 - 3840x2160@30Hz */ |
956 | { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, |
961 | { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, |
957 | 3840, 4016, 4104, 4400, 0, |
962 | 3840, 4016, 4104, 4400, 0, |
958 | 2160, 2168, 2178, 2250, 0, |
963 | 2160, 2168, 2178, 2250, 0, |
959 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
964 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
960 | .vrefresh = 30, }, |
965 | .vrefresh = 30, }, |
961 | /* 2 - 3840x2160@25Hz */ |
966 | /* 2 - 3840x2160@25Hz */ |
962 | { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, |
967 | { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, |
963 | 3840, 4896, 4984, 5280, 0, |
968 | 3840, 4896, 4984, 5280, 0, |
964 | 2160, 2168, 2178, 2250, 0, |
969 | 2160, 2168, 2178, 2250, 0, |
965 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
970 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
966 | .vrefresh = 25, }, |
971 | .vrefresh = 25, }, |
967 | /* 3 - 3840x2160@24Hz */ |
972 | /* 3 - 3840x2160@24Hz */ |
968 | { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, |
973 | { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, |
969 | 3840, 5116, 5204, 5500, 0, |
974 | 3840, 5116, 5204, 5500, 0, |
970 | 2160, 2168, 2178, 2250, 0, |
975 | 2160, 2168, 2178, 2250, 0, |
971 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
976 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
972 | .vrefresh = 24, }, |
977 | .vrefresh = 24, }, |
973 | /* 4 - 4096x2160@24Hz (SMPTE) */ |
978 | /* 4 - 4096x2160@24Hz (SMPTE) */ |
974 | { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000, |
979 | { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000, |
975 | 4096, 5116, 5204, 5500, 0, |
980 | 4096, 5116, 5204, 5500, 0, |
976 | 2160, 2168, 2178, 2250, 0, |
981 | 2160, 2168, 2178, 2250, 0, |
977 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
982 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
978 | .vrefresh = 24, }, |
983 | .vrefresh = 24, }, |
979 | }; |
984 | }; |
980 | 985 | ||
981 | /*** DDC fetch and block validation ***/ |
986 | /*** DDC fetch and block validation ***/ |
982 | 987 | ||
983 | static const u8 edid_header[] = { |
988 | static const u8 edid_header[] = { |
984 | 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 |
989 | 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 |
985 | }; |
990 | }; |
- | 991 | ||
- | 992 | /** |
|
- | 993 | * drm_edid_header_is_valid - sanity check the header of the base EDID block |
|
986 | 994 | * @raw_edid: pointer to raw base EDID block |
|
987 | /* |
995 | * |
- | 996 | * Sanity check the header of the base EDID block. |
|
988 | * Sanity check the header of the base EDID block. Return 8 if the header |
997 | * |
989 | * is perfect, down to 0 if it's totally wrong. |
998 | * Return: 8 if the header is perfect, down to 0 if it's totally wrong. |
990 | */ |
999 | */ |
991 | int drm_edid_header_is_valid(const u8 *raw_edid) |
1000 | int drm_edid_header_is_valid(const u8 *raw_edid) |
992 | { |
1001 | { |
993 | int i, score = 0; |
1002 | int i, score = 0; |
994 | 1003 | ||
995 | for (i = 0; i < sizeof(edid_header); i++) |
1004 | for (i = 0; i < sizeof(edid_header); i++) |
996 | if (raw_edid[i] == edid_header[i]) |
1005 | if (raw_edid[i] == edid_header[i]) |
997 | score++; |
1006 | score++; |
998 | 1007 | ||
999 | return score; |
1008 | return score; |
1000 | } |
1009 | } |
1001 | EXPORT_SYMBOL(drm_edid_header_is_valid); |
1010 | EXPORT_SYMBOL(drm_edid_header_is_valid); |
1002 | 1011 | ||
1003 | static int edid_fixup __read_mostly = 6; |
1012 | static int edid_fixup __read_mostly = 6; |
1004 | module_param_named(edid_fixup, edid_fixup, int, 0400); |
1013 | module_param_named(edid_fixup, edid_fixup, int, 0400); |
1005 | MODULE_PARM_DESC(edid_fixup, |
1014 | MODULE_PARM_DESC(edid_fixup, |
1006 | "Minimum number of valid EDID header bytes (0-8, default 6)"); |
1015 | "Minimum number of valid EDID header bytes (0-8, default 6)"); |
1007 | 1016 | ||
1008 | /* |
1017 | /** |
1009 | * Sanity check the EDID block (base or extension). Return 0 if the block |
1018 | * drm_edid_block_valid - Sanity check the EDID block (base or extension) |
- | 1019 | * @raw_edid: pointer to raw EDID block |
|
- | 1020 | * @block: type of block to validate (0 for base, extension otherwise) |
|
- | 1021 | * @print_bad_edid: if true, dump bad EDID blocks to the console |
|
- | 1022 | * |
|
- | 1023 | * Validate a base or extension EDID block and optionally dump bad blocks to |
|
- | 1024 | * the console. |
|
- | 1025 | * |
|
1010 | * doesn't check out, or 1 if it's valid. |
1026 | * Return: True if the block is valid, false otherwise. |
1011 | */ |
1027 | */ |
1012 | bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid) |
1028 | bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid) |
1013 | { |
1029 | { |
1014 | int i; |
1030 | int i; |
1015 | u8 csum = 0; |
1031 | u8 csum = 0; |
1016 | struct edid *edid = (struct edid *)raw_edid; |
1032 | struct edid *edid = (struct edid *)raw_edid; |
1017 | 1033 | ||
1018 | if (WARN_ON(!raw_edid)) |
1034 | if (WARN_ON(!raw_edid)) |
1019 | return false; |
1035 | return false; |
1020 | 1036 | ||
1021 | if (edid_fixup > 8 || edid_fixup < 0) |
1037 | if (edid_fixup > 8 || edid_fixup < 0) |
1022 | edid_fixup = 6; |
1038 | edid_fixup = 6; |
1023 | 1039 | ||
1024 | if (block == 0) { |
1040 | if (block == 0) { |
1025 | int score = drm_edid_header_is_valid(raw_edid); |
1041 | int score = drm_edid_header_is_valid(raw_edid); |
1026 | if (score == 8) ; |
1042 | if (score == 8) ; |
1027 | else if (score >= edid_fixup) { |
1043 | else if (score >= edid_fixup) { |
1028 | DRM_DEBUG("Fixing EDID header, your hardware may be failing\n"); |
1044 | DRM_DEBUG("Fixing EDID header, your hardware may be failing\n"); |
1029 | memcpy(raw_edid, edid_header, sizeof(edid_header)); |
1045 | memcpy(raw_edid, edid_header, sizeof(edid_header)); |
1030 | } else { |
1046 | } else { |
1031 | goto bad; |
1047 | goto bad; |
1032 | } |
1048 | } |
1033 | } |
1049 | } |
1034 | 1050 | ||
1035 | for (i = 0; i < EDID_LENGTH; i++) |
1051 | for (i = 0; i < EDID_LENGTH; i++) |
1036 | csum += raw_edid[i]; |
1052 | csum += raw_edid[i]; |
1037 | if (csum) { |
1053 | if (csum) { |
1038 | if (print_bad_edid) { |
1054 | if (print_bad_edid) { |
1039 | DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum); |
1055 | DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum); |
1040 | } |
1056 | } |
1041 | 1057 | ||
1042 | /* allow CEA to slide through, switches mangle this */ |
1058 | /* allow CEA to slide through, switches mangle this */ |
1043 | if (raw_edid[0] != 0x02) |
1059 | if (raw_edid[0] != 0x02) |
1044 | goto bad; |
1060 | goto bad; |
1045 | } |
1061 | } |
1046 | 1062 | ||
1047 | /* per-block-type checks */ |
1063 | /* per-block-type checks */ |
1048 | switch (raw_edid[0]) { |
1064 | switch (raw_edid[0]) { |
1049 | case 0: /* base */ |
1065 | case 0: /* base */ |
1050 | if (edid->version != 1) { |
1066 | if (edid->version != 1) { |
1051 | DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version); |
1067 | DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version); |
1052 | goto bad; |
1068 | goto bad; |
1053 | } |
1069 | } |
1054 | 1070 | ||
1055 | if (edid->revision > 4) |
1071 | if (edid->revision > 4) |
1056 | DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n"); |
1072 | DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n"); |
1057 | break; |
1073 | break; |
1058 | 1074 | ||
1059 | default: |
1075 | default: |
1060 | break; |
1076 | break; |
1061 | } |
1077 | } |
1062 | 1078 | ||
1063 | return true; |
1079 | return true; |
1064 | 1080 | ||
1065 | bad: |
1081 | bad: |
1066 | if (print_bad_edid) { |
1082 | if (print_bad_edid) { |
1067 | printk(KERN_ERR "Raw EDID:\n"); |
1083 | printk(KERN_ERR "Raw EDID:\n"); |
1068 | print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1, |
1084 | print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1, |
1069 | raw_edid, EDID_LENGTH, false); |
1085 | raw_edid, EDID_LENGTH, false); |
1070 | } |
1086 | } |
1071 | return false; |
1087 | return false; |
1072 | } |
1088 | } |
1073 | EXPORT_SYMBOL(drm_edid_block_valid); |
1089 | EXPORT_SYMBOL(drm_edid_block_valid); |
1074 | 1090 | ||
1075 | /** |
1091 | /** |
1076 | * drm_edid_is_valid - sanity check EDID data |
1092 | * drm_edid_is_valid - sanity check EDID data |
1077 | * @edid: EDID data |
1093 | * @edid: EDID data |
1078 | * |
1094 | * |
1079 | * Sanity-check an entire EDID record (including extensions) |
1095 | * Sanity-check an entire EDID record (including extensions) |
- | 1096 | * |
|
- | 1097 | * Return: True if the EDID data is valid, false otherwise. |
|
1080 | */ |
1098 | */ |
1081 | bool drm_edid_is_valid(struct edid *edid) |
1099 | bool drm_edid_is_valid(struct edid *edid) |
1082 | { |
1100 | { |
1083 | int i; |
1101 | int i; |
1084 | u8 *raw = (u8 *)edid; |
1102 | u8 *raw = (u8 *)edid; |
1085 | 1103 | ||
1086 | if (!edid) |
1104 | if (!edid) |
1087 | return false; |
1105 | return false; |
1088 | 1106 | ||
1089 | for (i = 0; i <= edid->extensions; i++) |
1107 | for (i = 0; i <= edid->extensions; i++) |
1090 | if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true)) |
1108 | if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true)) |
1091 | return false; |
1109 | return false; |
1092 | 1110 | ||
1093 | return true; |
1111 | return true; |
1094 | } |
1112 | } |
1095 | EXPORT_SYMBOL(drm_edid_is_valid); |
1113 | EXPORT_SYMBOL(drm_edid_is_valid); |
1096 | 1114 | ||
1097 | #define DDC_SEGMENT_ADDR 0x30 |
1115 | #define DDC_SEGMENT_ADDR 0x30 |
1098 | /** |
1116 | /** |
1099 | * Get EDID information via I2C. |
1117 | * drm_do_probe_ddc_edid() - get EDID information via I2C |
- | 1118 | * @adapter: I2C device adaptor |
|
- | 1119 | * @buf: EDID data buffer to be filled |
|
- | 1120 | * @block: 128 byte EDID block to start fetching from |
|
- | 1121 | * @len: EDID data buffer length to fetch |
|
1100 | * |
1122 | * |
1101 | * \param adapter : i2c device adaptor |
- | |
1102 | * \param buf : EDID data buffer to be filled |
1123 | * Try to fetch EDID information by calling I2C driver functions. |
1103 | * \param len : EDID data buffer length |
- | |
1104 | * \return 0 on success or -1 on failure. |
- | |
1105 | * |
1124 | * |
1106 | * Try to fetch EDID information by calling i2c driver function. |
1125 | * Return: 0 on success or -1 on failure. |
1107 | */ |
1126 | */ |
1108 | static int |
1127 | static int |
1109 | drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf, |
1128 | drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf, |
1110 | int block, int len) |
1129 | int block, int len) |
1111 | { |
1130 | { |
1112 | unsigned char start = block * EDID_LENGTH; |
1131 | unsigned char start = block * EDID_LENGTH; |
1113 | unsigned char segment = block >> 1; |
1132 | unsigned char segment = block >> 1; |
1114 | unsigned char xfers = segment ? 3 : 2; |
1133 | unsigned char xfers = segment ? 3 : 2; |
1115 | int ret, retries = 5; |
1134 | int ret, retries = 5; |
- | 1135 | ||
1116 | 1136 | /* |
|
1117 | /* The core i2c driver will automatically retry the transfer if the |
1137 | * The core I2C driver will automatically retry the transfer if the |
1118 | * adapter reports EAGAIN. However, we find that bit-banging transfers |
1138 | * adapter reports EAGAIN. However, we find that bit-banging transfers |
1119 | * are susceptible to errors under a heavily loaded machine and |
1139 | * are susceptible to errors under a heavily loaded machine and |
1120 | * generate spurious NAKs and timeouts. Retrying the transfer |
1140 | * generate spurious NAKs and timeouts. Retrying the transfer |
1121 | * of the individual block a few times seems to overcome this. |
1141 | * of the individual block a few times seems to overcome this. |
1122 | */ |
1142 | */ |
1123 | do { |
1143 | do { |
1124 | struct i2c_msg msgs[] = { |
1144 | struct i2c_msg msgs[] = { |
1125 | { |
1145 | { |
1126 | .addr = DDC_SEGMENT_ADDR, |
1146 | .addr = DDC_SEGMENT_ADDR, |
1127 | .flags = 0, |
1147 | .flags = 0, |
1128 | .len = 1, |
1148 | .len = 1, |
1129 | .buf = &segment, |
1149 | .buf = &segment, |
1130 | }, { |
1150 | }, { |
1131 | .addr = DDC_ADDR, |
1151 | .addr = DDC_ADDR, |
1132 | .flags = 0, |
1152 | .flags = 0, |
1133 | .len = 1, |
1153 | .len = 1, |
1134 | .buf = &start, |
1154 | .buf = &start, |
1135 | }, { |
1155 | }, { |
1136 | .addr = DDC_ADDR, |
1156 | .addr = DDC_ADDR, |
1137 | .flags = I2C_M_RD, |
1157 | .flags = I2C_M_RD, |
1138 | .len = len, |
1158 | .len = len, |
1139 | .buf = buf, |
1159 | .buf = buf, |
1140 | } |
1160 | } |
1141 | }; |
1161 | }; |
1142 | 1162 | ||
1143 | /* |
1163 | /* |
1144 | * Avoid sending the segment addr to not upset non-compliant ddc |
1164 | * Avoid sending the segment addr to not upset non-compliant |
1145 | * monitors. |
1165 | * DDC monitors. |
1146 | */ |
1166 | */ |
1147 | ret = i2c_transfer(adapter, &msgs[3 - xfers], xfers); |
1167 | ret = i2c_transfer(adapter, &msgs[3 - xfers], xfers); |
1148 | 1168 | ||
1149 | if (ret == -ENXIO) { |
1169 | if (ret == -ENXIO) { |
1150 | DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n", |
1170 | DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n", |
1151 | adapter->name); |
1171 | adapter->name); |
1152 | break; |
1172 | break; |
1153 | } |
1173 | } |
1154 | } while (ret != xfers && --retries); |
1174 | } while (ret != xfers && --retries); |
1155 | 1175 | ||
1156 | return ret == xfers ? 0 : -1; |
1176 | return ret == xfers ? 0 : -1; |
1157 | } |
1177 | } |
1158 | 1178 | ||
1159 | static bool drm_edid_is_zero(u8 *in_edid, int length) |
1179 | static bool drm_edid_is_zero(u8 *in_edid, int length) |
1160 | { |
1180 | { |
1161 | if (memchr_inv(in_edid, 0, length)) |
1181 | if (memchr_inv(in_edid, 0, length)) |
1162 | return false; |
1182 | return false; |
1163 | 1183 | ||
1164 | return true; |
1184 | return true; |
1165 | } |
1185 | } |
1166 | 1186 | ||
1167 | static u8 * |
1187 | static u8 * |
1168 | drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter) |
1188 | drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter) |
1169 | { |
1189 | { |
1170 | int i, j = 0, valid_extensions = 0; |
1190 | int i, j = 0, valid_extensions = 0; |
1171 | u8 *block, *new; |
1191 | u8 *block, *new; |
1172 | bool print_bad_edid = !connector->bad_edid_counter || (drm_debug & DRM_UT_KMS); |
1192 | bool print_bad_edid = !connector->bad_edid_counter || (drm_debug & DRM_UT_KMS); |
1173 | 1193 | ||
1174 | if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL) |
1194 | if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL) |
1175 | return NULL; |
1195 | return NULL; |
1176 | 1196 | ||
1177 | /* base block fetch */ |
1197 | /* base block fetch */ |
1178 | for (i = 0; i < 4; i++) { |
1198 | for (i = 0; i < 4; i++) { |
1179 | if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH)) |
1199 | if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH)) |
1180 | goto out; |
1200 | goto out; |
1181 | if (drm_edid_block_valid(block, 0, print_bad_edid)) |
1201 | if (drm_edid_block_valid(block, 0, print_bad_edid)) |
1182 | break; |
1202 | break; |
1183 | if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) { |
1203 | if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) { |
1184 | connector->null_edid_counter++; |
1204 | connector->null_edid_counter++; |
1185 | goto carp; |
1205 | goto carp; |
1186 | } |
1206 | } |
1187 | } |
1207 | } |
1188 | if (i == 4) |
1208 | if (i == 4) |
1189 | goto carp; |
1209 | goto carp; |
1190 | 1210 | ||
1191 | /* if there's no extensions, we're done */ |
1211 | /* if there's no extensions, we're done */ |
1192 | if (block[0x7e] == 0) |
1212 | if (block[0x7e] == 0) |
1193 | return block; |
1213 | return block; |
1194 | 1214 | ||
1195 | new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL); |
1215 | new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL); |
1196 | if (!new) |
1216 | if (!new) |
1197 | goto out; |
1217 | goto out; |
1198 | block = new; |
1218 | block = new; |
1199 | 1219 | ||
1200 | for (j = 1; j <= block[0x7e]; j++) { |
1220 | for (j = 1; j <= block[0x7e]; j++) { |
1201 | for (i = 0; i < 4; i++) { |
1221 | for (i = 0; i < 4; i++) { |
1202 | if (drm_do_probe_ddc_edid(adapter, |
1222 | if (drm_do_probe_ddc_edid(adapter, |
1203 | block + (valid_extensions + 1) * EDID_LENGTH, |
1223 | block + (valid_extensions + 1) * EDID_LENGTH, |
1204 | j, EDID_LENGTH)) |
1224 | j, EDID_LENGTH)) |
1205 | goto out; |
1225 | goto out; |
1206 | if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH, j, print_bad_edid)) { |
1226 | if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH, j, print_bad_edid)) { |
1207 | valid_extensions++; |
1227 | valid_extensions++; |
1208 | break; |
1228 | break; |
1209 | } |
1229 | } |
1210 | } |
1230 | } |
1211 | 1231 | ||
1212 | if (i == 4 && print_bad_edid) { |
1232 | if (i == 4 && print_bad_edid) { |
1213 | dev_warn(connector->dev->dev, |
1233 | dev_warn(connector->dev->dev, |
1214 | "%s: Ignoring invalid EDID block %d.\n", |
1234 | "%s: Ignoring invalid EDID block %d.\n", |
1215 | drm_get_connector_name(connector), j); |
1235 | connector->name, j); |
1216 | 1236 | ||
1217 | connector->bad_edid_counter++; |
1237 | connector->bad_edid_counter++; |
1218 | } |
1238 | } |
1219 | } |
1239 | } |
1220 | 1240 | ||
1221 | if (valid_extensions != block[0x7e]) { |
1241 | if (valid_extensions != block[0x7e]) { |
1222 | block[EDID_LENGTH-1] += block[0x7e] - valid_extensions; |
1242 | block[EDID_LENGTH-1] += block[0x7e] - valid_extensions; |
1223 | block[0x7e] = valid_extensions; |
1243 | block[0x7e] = valid_extensions; |
1224 | new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL); |
1244 | new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL); |
1225 | if (!new) |
1245 | if (!new) |
1226 | goto out; |
1246 | goto out; |
1227 | block = new; |
1247 | block = new; |
1228 | } |
1248 | } |
1229 | 1249 | ||
1230 | return block; |
1250 | return block; |
1231 | 1251 | ||
1232 | carp: |
1252 | carp: |
1233 | if (print_bad_edid) { |
1253 | if (print_bad_edid) { |
1234 | dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n", |
1254 | dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n", |
1235 | drm_get_connector_name(connector), j); |
1255 | connector->name, j); |
1236 | } |
1256 | } |
1237 | connector->bad_edid_counter++; |
1257 | connector->bad_edid_counter++; |
1238 | 1258 | ||
1239 | out: |
1259 | out: |
1240 | kfree(block); |
1260 | kfree(block); |
1241 | return NULL; |
1261 | return NULL; |
1242 | } |
1262 | } |
1243 | 1263 | ||
1244 | /** |
1264 | /** |
1245 | * Probe DDC presence. |
1265 | * drm_probe_ddc() - probe DDC presence |
- | 1266 | * @adapter: I2C adapter to probe |
|
1246 | * |
1267 | * |
1247 | * \param adapter : i2c device adaptor |
- | |
1248 | * \return 1 on success |
1268 | * Return: True on success, false on failure. |
1249 | */ |
1269 | */ |
1250 | bool |
1270 | bool |
1251 | drm_probe_ddc(struct i2c_adapter *adapter) |
1271 | drm_probe_ddc(struct i2c_adapter *adapter) |
1252 | { |
1272 | { |
1253 | unsigned char out; |
1273 | unsigned char out; |
1254 | 1274 | ||
1255 | return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0); |
1275 | return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0); |
1256 | } |
1276 | } |
1257 | EXPORT_SYMBOL(drm_probe_ddc); |
1277 | EXPORT_SYMBOL(drm_probe_ddc); |
1258 | 1278 | ||
1259 | /** |
1279 | /** |
1260 | * drm_get_edid - get EDID data, if available |
1280 | * drm_get_edid - get EDID data, if available |
1261 | * @connector: connector we're probing |
1281 | * @connector: connector we're probing |
1262 | * @adapter: i2c adapter to use for DDC |
1282 | * @adapter: I2C adapter to use for DDC |
1263 | * |
1283 | * |
1264 | * Poke the given i2c channel to grab EDID data if possible. If found, |
1284 | * Poke the given I2C channel to grab EDID data if possible. If found, |
1265 | * attach it to the connector. |
1285 | * attach it to the connector. |
1266 | * |
1286 | * |
1267 | * Return edid data or NULL if we couldn't find any. |
1287 | * Return: Pointer to valid EDID or NULL if we couldn't find any. |
1268 | */ |
1288 | */ |
1269 | struct edid *drm_get_edid(struct drm_connector *connector, |
1289 | struct edid *drm_get_edid(struct drm_connector *connector, |
1270 | struct i2c_adapter *adapter) |
1290 | struct i2c_adapter *adapter) |
1271 | { |
1291 | { |
1272 | struct edid *edid = NULL; |
1292 | struct edid *edid = NULL; |
1273 | 1293 | ||
1274 | if (drm_probe_ddc(adapter)) |
1294 | if (drm_probe_ddc(adapter)) |
1275 | edid = (struct edid *)drm_do_get_edid(connector, adapter); |
1295 | edid = (struct edid *)drm_do_get_edid(connector, adapter); |
1276 | 1296 | ||
1277 | return edid; |
1297 | return edid; |
1278 | } |
1298 | } |
1279 | EXPORT_SYMBOL(drm_get_edid); |
1299 | EXPORT_SYMBOL(drm_get_edid); |
1280 | 1300 | ||
1281 | /** |
1301 | /** |
1282 | * drm_edid_duplicate - duplicate an EDID and the extensions |
1302 | * drm_edid_duplicate - duplicate an EDID and the extensions |
1283 | * @edid: EDID to duplicate |
1303 | * @edid: EDID to duplicate |
1284 | * |
1304 | * |
1285 | * Return duplicate edid or NULL on allocation failure. |
1305 | * Return: Pointer to duplicated EDID or NULL on allocation failure. |
1286 | */ |
1306 | */ |
1287 | struct edid *drm_edid_duplicate(const struct edid *edid) |
1307 | struct edid *drm_edid_duplicate(const struct edid *edid) |
1288 | { |
1308 | { |
1289 | return kmemdup(edid, (edid->extensions + 1) * EDID_LENGTH, GFP_KERNEL); |
1309 | return kmemdup(edid, (edid->extensions + 1) * EDID_LENGTH, GFP_KERNEL); |
1290 | } |
1310 | } |
1291 | EXPORT_SYMBOL(drm_edid_duplicate); |
1311 | EXPORT_SYMBOL(drm_edid_duplicate); |
1292 | 1312 | ||
1293 | /*** EDID parsing ***/ |
1313 | /*** EDID parsing ***/ |
1294 | 1314 | ||
1295 | /** |
1315 | /** |
1296 | * edid_vendor - match a string against EDID's obfuscated vendor field |
1316 | * edid_vendor - match a string against EDID's obfuscated vendor field |
1297 | * @edid: EDID to match |
1317 | * @edid: EDID to match |
1298 | * @vendor: vendor string |
1318 | * @vendor: vendor string |
1299 | * |
1319 | * |
1300 | * Returns true if @vendor is in @edid, false otherwise |
1320 | * Returns true if @vendor is in @edid, false otherwise |
1301 | */ |
1321 | */ |
1302 | static bool edid_vendor(struct edid *edid, char *vendor) |
1322 | static bool edid_vendor(struct edid *edid, char *vendor) |
1303 | { |
1323 | { |
1304 | char edid_vendor[3]; |
1324 | char edid_vendor[3]; |
1305 | 1325 | ||
1306 | edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@'; |
1326 | edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@'; |
1307 | edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) | |
1327 | edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) | |
1308 | ((edid->mfg_id[1] & 0xe0) >> 5)) + '@'; |
1328 | ((edid->mfg_id[1] & 0xe0) >> 5)) + '@'; |
1309 | edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@'; |
1329 | edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@'; |
1310 | 1330 | ||
1311 | return !strncmp(edid_vendor, vendor, 3); |
1331 | return !strncmp(edid_vendor, vendor, 3); |
1312 | } |
1332 | } |
1313 | 1333 | ||
1314 | /** |
1334 | /** |
1315 | * edid_get_quirks - return quirk flags for a given EDID |
1335 | * edid_get_quirks - return quirk flags for a given EDID |
1316 | * @edid: EDID to process |
1336 | * @edid: EDID to process |
1317 | * |
1337 | * |
1318 | * This tells subsequent routines what fixes they need to apply. |
1338 | * This tells subsequent routines what fixes they need to apply. |
1319 | */ |
1339 | */ |
1320 | static u32 edid_get_quirks(struct edid *edid) |
1340 | static u32 edid_get_quirks(struct edid *edid) |
1321 | { |
1341 | { |
1322 | struct edid_quirk *quirk; |
1342 | struct edid_quirk *quirk; |
1323 | int i; |
1343 | int i; |
1324 | 1344 | ||
1325 | for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) { |
1345 | for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) { |
1326 | quirk = &edid_quirk_list[i]; |
1346 | quirk = &edid_quirk_list[i]; |
1327 | 1347 | ||
1328 | if (edid_vendor(edid, quirk->vendor) && |
1348 | if (edid_vendor(edid, quirk->vendor) && |
1329 | (EDID_PRODUCT_ID(edid) == quirk->product_id)) |
1349 | (EDID_PRODUCT_ID(edid) == quirk->product_id)) |
1330 | return quirk->quirks; |
1350 | return quirk->quirks; |
1331 | } |
1351 | } |
1332 | 1352 | ||
1333 | return 0; |
1353 | return 0; |
1334 | } |
1354 | } |
1335 | 1355 | ||
1336 | #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay) |
1356 | #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay) |
1337 | #define MODE_REFRESH_DIFF(c,t) (abs((c) - (t))) |
1357 | #define MODE_REFRESH_DIFF(c,t) (abs((c) - (t))) |
1338 | 1358 | ||
1339 | /** |
1359 | /** |
1340 | * edid_fixup_preferred - set preferred modes based on quirk list |
1360 | * edid_fixup_preferred - set preferred modes based on quirk list |
1341 | * @connector: has mode list to fix up |
1361 | * @connector: has mode list to fix up |
1342 | * @quirks: quirks list |
1362 | * @quirks: quirks list |
1343 | * |
1363 | * |
1344 | * Walk the mode list for @connector, clearing the preferred status |
1364 | * Walk the mode list for @connector, clearing the preferred status |
1345 | * on existing modes and setting it anew for the right mode ala @quirks. |
1365 | * on existing modes and setting it anew for the right mode ala @quirks. |
1346 | */ |
1366 | */ |
1347 | static void edid_fixup_preferred(struct drm_connector *connector, |
1367 | static void edid_fixup_preferred(struct drm_connector *connector, |
1348 | u32 quirks) |
1368 | u32 quirks) |
1349 | { |
1369 | { |
1350 | struct drm_display_mode *t, *cur_mode, *preferred_mode; |
1370 | struct drm_display_mode *t, *cur_mode, *preferred_mode; |
1351 | int target_refresh = 0; |
1371 | int target_refresh = 0; |
1352 | int cur_vrefresh, preferred_vrefresh; |
1372 | int cur_vrefresh, preferred_vrefresh; |
1353 | 1373 | ||
1354 | if (list_empty(&connector->probed_modes)) |
1374 | if (list_empty(&connector->probed_modes)) |
1355 | return; |
1375 | return; |
1356 | 1376 | ||
1357 | if (quirks & EDID_QUIRK_PREFER_LARGE_60) |
1377 | if (quirks & EDID_QUIRK_PREFER_LARGE_60) |
1358 | target_refresh = 60; |
1378 | target_refresh = 60; |
1359 | if (quirks & EDID_QUIRK_PREFER_LARGE_75) |
1379 | if (quirks & EDID_QUIRK_PREFER_LARGE_75) |
1360 | target_refresh = 75; |
1380 | target_refresh = 75; |
1361 | 1381 | ||
1362 | preferred_mode = list_first_entry(&connector->probed_modes, |
1382 | preferred_mode = list_first_entry(&connector->probed_modes, |
1363 | struct drm_display_mode, head); |
1383 | struct drm_display_mode, head); |
1364 | 1384 | ||
1365 | list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) { |
1385 | list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) { |
1366 | cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED; |
1386 | cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED; |
1367 | 1387 | ||
1368 | if (cur_mode == preferred_mode) |
1388 | if (cur_mode == preferred_mode) |
1369 | continue; |
1389 | continue; |
1370 | 1390 | ||
1371 | /* Largest mode is preferred */ |
1391 | /* Largest mode is preferred */ |
1372 | if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode)) |
1392 | if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode)) |
1373 | preferred_mode = cur_mode; |
1393 | preferred_mode = cur_mode; |
1374 | 1394 | ||
1375 | cur_vrefresh = cur_mode->vrefresh ? |
1395 | cur_vrefresh = cur_mode->vrefresh ? |
1376 | cur_mode->vrefresh : drm_mode_vrefresh(cur_mode); |
1396 | cur_mode->vrefresh : drm_mode_vrefresh(cur_mode); |
1377 | preferred_vrefresh = preferred_mode->vrefresh ? |
1397 | preferred_vrefresh = preferred_mode->vrefresh ? |
1378 | preferred_mode->vrefresh : drm_mode_vrefresh(preferred_mode); |
1398 | preferred_mode->vrefresh : drm_mode_vrefresh(preferred_mode); |
1379 | /* At a given size, try to get closest to target refresh */ |
1399 | /* At a given size, try to get closest to target refresh */ |
1380 | if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) && |
1400 | if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) && |
1381 | MODE_REFRESH_DIFF(cur_vrefresh, target_refresh) < |
1401 | MODE_REFRESH_DIFF(cur_vrefresh, target_refresh) < |
1382 | MODE_REFRESH_DIFF(preferred_vrefresh, target_refresh)) { |
1402 | MODE_REFRESH_DIFF(preferred_vrefresh, target_refresh)) { |
1383 | preferred_mode = cur_mode; |
1403 | preferred_mode = cur_mode; |
1384 | } |
1404 | } |
1385 | } |
1405 | } |
1386 | 1406 | ||
1387 | preferred_mode->type |= DRM_MODE_TYPE_PREFERRED; |
1407 | preferred_mode->type |= DRM_MODE_TYPE_PREFERRED; |
1388 | } |
1408 | } |
1389 | 1409 | ||
1390 | static bool |
1410 | static bool |
1391 | mode_is_rb(const struct drm_display_mode *mode) |
1411 | mode_is_rb(const struct drm_display_mode *mode) |
1392 | { |
1412 | { |
1393 | return (mode->htotal - mode->hdisplay == 160) && |
1413 | return (mode->htotal - mode->hdisplay == 160) && |
1394 | (mode->hsync_end - mode->hdisplay == 80) && |
1414 | (mode->hsync_end - mode->hdisplay == 80) && |
1395 | (mode->hsync_end - mode->hsync_start == 32) && |
1415 | (mode->hsync_end - mode->hsync_start == 32) && |
1396 | (mode->vsync_start - mode->vdisplay == 3); |
1416 | (mode->vsync_start - mode->vdisplay == 3); |
1397 | } |
1417 | } |
1398 | 1418 | ||
1399 | /* |
1419 | /* |
1400 | * drm_mode_find_dmt - Create a copy of a mode if present in DMT |
1420 | * drm_mode_find_dmt - Create a copy of a mode if present in DMT |
1401 | * @dev: Device to duplicate against |
1421 | * @dev: Device to duplicate against |
1402 | * @hsize: Mode width |
1422 | * @hsize: Mode width |
1403 | * @vsize: Mode height |
1423 | * @vsize: Mode height |
1404 | * @fresh: Mode refresh rate |
1424 | * @fresh: Mode refresh rate |
1405 | * @rb: Mode reduced-blanking-ness |
1425 | * @rb: Mode reduced-blanking-ness |
1406 | * |
1426 | * |
1407 | * Walk the DMT mode list looking for a match for the given parameters. |
1427 | * Walk the DMT mode list looking for a match for the given parameters. |
- | 1428 | * |
|
1408 | * Return a newly allocated copy of the mode, or NULL if not found. |
1429 | * Return: A newly allocated copy of the mode, or NULL if not found. |
1409 | */ |
1430 | */ |
1410 | struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev, |
1431 | struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev, |
1411 | int hsize, int vsize, int fresh, |
1432 | int hsize, int vsize, int fresh, |
1412 | bool rb) |
1433 | bool rb) |
1413 | { |
1434 | { |
1414 | int i; |
1435 | int i; |
1415 | 1436 | ||
1416 | for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) { |
1437 | for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) { |
1417 | const struct drm_display_mode *ptr = &drm_dmt_modes[i]; |
1438 | const struct drm_display_mode *ptr = &drm_dmt_modes[i]; |
1418 | if (hsize != ptr->hdisplay) |
1439 | if (hsize != ptr->hdisplay) |
1419 | continue; |
1440 | continue; |
1420 | if (vsize != ptr->vdisplay) |
1441 | if (vsize != ptr->vdisplay) |
1421 | continue; |
1442 | continue; |
1422 | if (fresh != drm_mode_vrefresh(ptr)) |
1443 | if (fresh != drm_mode_vrefresh(ptr)) |
1423 | continue; |
1444 | continue; |
1424 | if (rb != mode_is_rb(ptr)) |
1445 | if (rb != mode_is_rb(ptr)) |
1425 | continue; |
1446 | continue; |
1426 | 1447 | ||
1427 | return drm_mode_duplicate(dev, ptr); |
1448 | return drm_mode_duplicate(dev, ptr); |
1428 | } |
1449 | } |
1429 | 1450 | ||
1430 | return NULL; |
1451 | return NULL; |
1431 | } |
1452 | } |
1432 | EXPORT_SYMBOL(drm_mode_find_dmt); |
1453 | EXPORT_SYMBOL(drm_mode_find_dmt); |
1433 | 1454 | ||
1434 | typedef void detailed_cb(struct detailed_timing *timing, void *closure); |
1455 | typedef void detailed_cb(struct detailed_timing *timing, void *closure); |
1435 | 1456 | ||
1436 | static void |
1457 | static void |
1437 | cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure) |
1458 | cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure) |
1438 | { |
1459 | { |
1439 | int i, n = 0; |
1460 | int i, n = 0; |
1440 | u8 d = ext[0x02]; |
1461 | u8 d = ext[0x02]; |
1441 | u8 *det_base = ext + d; |
1462 | u8 *det_base = ext + d; |
1442 | 1463 | ||
1443 | n = (127 - d) / 18; |
1464 | n = (127 - d) / 18; |
1444 | for (i = 0; i < n; i++) |
1465 | for (i = 0; i < n; i++) |
1445 | cb((struct detailed_timing *)(det_base + 18 * i), closure); |
1466 | cb((struct detailed_timing *)(det_base + 18 * i), closure); |
1446 | } |
1467 | } |
1447 | 1468 | ||
1448 | static void |
1469 | static void |
1449 | vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure) |
1470 | vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure) |
1450 | { |
1471 | { |
1451 | unsigned int i, n = min((int)ext[0x02], 6); |
1472 | unsigned int i, n = min((int)ext[0x02], 6); |
1452 | u8 *det_base = ext + 5; |
1473 | u8 *det_base = ext + 5; |
1453 | 1474 | ||
1454 | if (ext[0x01] != 1) |
1475 | if (ext[0x01] != 1) |
1455 | return; /* unknown version */ |
1476 | return; /* unknown version */ |
1456 | 1477 | ||
1457 | for (i = 0; i < n; i++) |
1478 | for (i = 0; i < n; i++) |
1458 | cb((struct detailed_timing *)(det_base + 18 * i), closure); |
1479 | cb((struct detailed_timing *)(det_base + 18 * i), closure); |
1459 | } |
1480 | } |
1460 | 1481 | ||
1461 | static void |
1482 | static void |
1462 | drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure) |
1483 | drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure) |
1463 | { |
1484 | { |
1464 | int i; |
1485 | int i; |
1465 | struct edid *edid = (struct edid *)raw_edid; |
1486 | struct edid *edid = (struct edid *)raw_edid; |
1466 | 1487 | ||
1467 | if (edid == NULL) |
1488 | if (edid == NULL) |
1468 | return; |
1489 | return; |
1469 | 1490 | ||
1470 | for (i = 0; i < EDID_DETAILED_TIMINGS; i++) |
1491 | for (i = 0; i < EDID_DETAILED_TIMINGS; i++) |
1471 | cb(&(edid->detailed_timings[i]), closure); |
1492 | cb(&(edid->detailed_timings[i]), closure); |
1472 | 1493 | ||
1473 | for (i = 1; i <= raw_edid[0x7e]; i++) { |
1494 | for (i = 1; i <= raw_edid[0x7e]; i++) { |
1474 | u8 *ext = raw_edid + (i * EDID_LENGTH); |
1495 | u8 *ext = raw_edid + (i * EDID_LENGTH); |
1475 | switch (*ext) { |
1496 | switch (*ext) { |
1476 | case CEA_EXT: |
1497 | case CEA_EXT: |
1477 | cea_for_each_detailed_block(ext, cb, closure); |
1498 | cea_for_each_detailed_block(ext, cb, closure); |
1478 | break; |
1499 | break; |
1479 | case VTB_EXT: |
1500 | case VTB_EXT: |
1480 | vtb_for_each_detailed_block(ext, cb, closure); |
1501 | vtb_for_each_detailed_block(ext, cb, closure); |
1481 | break; |
1502 | break; |
1482 | default: |
1503 | default: |
1483 | break; |
1504 | break; |
1484 | } |
1505 | } |
1485 | } |
1506 | } |
1486 | } |
1507 | } |
1487 | 1508 | ||
1488 | static void |
1509 | static void |
1489 | is_rb(struct detailed_timing *t, void *data) |
1510 | is_rb(struct detailed_timing *t, void *data) |
1490 | { |
1511 | { |
1491 | u8 *r = (u8 *)t; |
1512 | u8 *r = (u8 *)t; |
1492 | if (r[3] == EDID_DETAIL_MONITOR_RANGE) |
1513 | if (r[3] == EDID_DETAIL_MONITOR_RANGE) |
1493 | if (r[15] & 0x10) |
1514 | if (r[15] & 0x10) |
1494 | *(bool *)data = true; |
1515 | *(bool *)data = true; |
1495 | } |
1516 | } |
1496 | 1517 | ||
1497 | /* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */ |
1518 | /* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */ |
1498 | static bool |
1519 | static bool |
1499 | drm_monitor_supports_rb(struct edid *edid) |
1520 | drm_monitor_supports_rb(struct edid *edid) |
1500 | { |
1521 | { |
1501 | if (edid->revision >= 4) { |
1522 | if (edid->revision >= 4) { |
1502 | bool ret = false; |
1523 | bool ret = false; |
1503 | drm_for_each_detailed_block((u8 *)edid, is_rb, &ret); |
1524 | drm_for_each_detailed_block((u8 *)edid, is_rb, &ret); |
1504 | return ret; |
1525 | return ret; |
1505 | } |
1526 | } |
1506 | 1527 | ||
1507 | return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0); |
1528 | return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0); |
1508 | } |
1529 | } |
1509 | 1530 | ||
1510 | static void |
1531 | static void |
1511 | find_gtf2(struct detailed_timing *t, void *data) |
1532 | find_gtf2(struct detailed_timing *t, void *data) |
1512 | { |
1533 | { |
1513 | u8 *r = (u8 *)t; |
1534 | u8 *r = (u8 *)t; |
1514 | if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02) |
1535 | if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02) |
1515 | *(u8 **)data = r; |
1536 | *(u8 **)data = r; |
1516 | } |
1537 | } |
1517 | 1538 | ||
1518 | /* Secondary GTF curve kicks in above some break frequency */ |
1539 | /* Secondary GTF curve kicks in above some break frequency */ |
1519 | static int |
1540 | static int |
1520 | drm_gtf2_hbreak(struct edid *edid) |
1541 | drm_gtf2_hbreak(struct edid *edid) |
1521 | { |
1542 | { |
1522 | u8 *r = NULL; |
1543 | u8 *r = NULL; |
1523 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); |
1544 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); |
1524 | return r ? (r[12] * 2) : 0; |
1545 | return r ? (r[12] * 2) : 0; |
1525 | } |
1546 | } |
1526 | 1547 | ||
1527 | static int |
1548 | static int |
1528 | drm_gtf2_2c(struct edid *edid) |
1549 | drm_gtf2_2c(struct edid *edid) |
1529 | { |
1550 | { |
1530 | u8 *r = NULL; |
1551 | u8 *r = NULL; |
1531 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); |
1552 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); |
1532 | return r ? r[13] : 0; |
1553 | return r ? r[13] : 0; |
1533 | } |
1554 | } |
1534 | 1555 | ||
1535 | static int |
1556 | static int |
1536 | drm_gtf2_m(struct edid *edid) |
1557 | drm_gtf2_m(struct edid *edid) |
1537 | { |
1558 | { |
1538 | u8 *r = NULL; |
1559 | u8 *r = NULL; |
1539 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); |
1560 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); |
1540 | return r ? (r[15] << 8) + r[14] : 0; |
1561 | return r ? (r[15] << 8) + r[14] : 0; |
1541 | } |
1562 | } |
1542 | 1563 | ||
1543 | static int |
1564 | static int |
1544 | drm_gtf2_k(struct edid *edid) |
1565 | drm_gtf2_k(struct edid *edid) |
1545 | { |
1566 | { |
1546 | u8 *r = NULL; |
1567 | u8 *r = NULL; |
1547 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); |
1568 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); |
1548 | return r ? r[16] : 0; |
1569 | return r ? r[16] : 0; |
1549 | } |
1570 | } |
1550 | 1571 | ||
1551 | static int |
1572 | static int |
1552 | drm_gtf2_2j(struct edid *edid) |
1573 | drm_gtf2_2j(struct edid *edid) |
1553 | { |
1574 | { |
1554 | u8 *r = NULL; |
1575 | u8 *r = NULL; |
1555 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); |
1576 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); |
1556 | return r ? r[17] : 0; |
1577 | return r ? r[17] : 0; |
1557 | } |
1578 | } |
1558 | 1579 | ||
1559 | /** |
1580 | /** |
1560 | * standard_timing_level - get std. timing level(CVT/GTF/DMT) |
1581 | * standard_timing_level - get std. timing level(CVT/GTF/DMT) |
1561 | * @edid: EDID block to scan |
1582 | * @edid: EDID block to scan |
1562 | */ |
1583 | */ |
1563 | static int standard_timing_level(struct edid *edid) |
1584 | static int standard_timing_level(struct edid *edid) |
1564 | { |
1585 | { |
1565 | if (edid->revision >= 2) { |
1586 | if (edid->revision >= 2) { |
1566 | if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)) |
1587 | if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)) |
1567 | return LEVEL_CVT; |
1588 | return LEVEL_CVT; |
1568 | if (drm_gtf2_hbreak(edid)) |
1589 | if (drm_gtf2_hbreak(edid)) |
1569 | return LEVEL_GTF2; |
1590 | return LEVEL_GTF2; |
1570 | return LEVEL_GTF; |
1591 | return LEVEL_GTF; |
1571 | } |
1592 | } |
1572 | return LEVEL_DMT; |
1593 | return LEVEL_DMT; |
1573 | } |
1594 | } |
1574 | 1595 | ||
1575 | /* |
1596 | /* |
1576 | * 0 is reserved. The spec says 0x01 fill for unused timings. Some old |
1597 | * 0 is reserved. The spec says 0x01 fill for unused timings. Some old |
1577 | * monitors fill with ascii space (0x20) instead. |
1598 | * monitors fill with ascii space (0x20) instead. |
1578 | */ |
1599 | */ |
1579 | static int |
1600 | static int |
1580 | bad_std_timing(u8 a, u8 b) |
1601 | bad_std_timing(u8 a, u8 b) |
1581 | { |
1602 | { |
1582 | return (a == 0x00 && b == 0x00) || |
1603 | return (a == 0x00 && b == 0x00) || |
1583 | (a == 0x01 && b == 0x01) || |
1604 | (a == 0x01 && b == 0x01) || |
1584 | (a == 0x20 && b == 0x20); |
1605 | (a == 0x20 && b == 0x20); |
1585 | } |
1606 | } |
1586 | 1607 | ||
1587 | /** |
1608 | /** |
1588 | * drm_mode_std - convert standard mode info (width, height, refresh) into mode |
1609 | * drm_mode_std - convert standard mode info (width, height, refresh) into mode |
- | 1610 | * @connector: connector of for the EDID block |
|
- | 1611 | * @edid: EDID block to scan |
|
1589 | * @t: standard timing params |
1612 | * @t: standard timing params |
1590 | * @timing_level: standard timing level |
- | |
1591 | * |
1613 | * |
1592 | * Take the standard timing params (in this case width, aspect, and refresh) |
1614 | * Take the standard timing params (in this case width, aspect, and refresh) |
1593 | * and convert them into a real mode using CVT/GTF/DMT. |
1615 | * and convert them into a real mode using CVT/GTF/DMT. |
1594 | */ |
1616 | */ |
1595 | static struct drm_display_mode * |
1617 | static struct drm_display_mode * |
1596 | drm_mode_std(struct drm_connector *connector, struct edid *edid, |
1618 | drm_mode_std(struct drm_connector *connector, struct edid *edid, |
1597 | struct std_timing *t, int revision) |
1619 | struct std_timing *t) |
1598 | { |
1620 | { |
1599 | struct drm_device *dev = connector->dev; |
1621 | struct drm_device *dev = connector->dev; |
1600 | struct drm_display_mode *m, *mode = NULL; |
1622 | struct drm_display_mode *m, *mode = NULL; |
1601 | int hsize, vsize; |
1623 | int hsize, vsize; |
1602 | int vrefresh_rate; |
1624 | int vrefresh_rate; |
1603 | unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK) |
1625 | unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK) |
1604 | >> EDID_TIMING_ASPECT_SHIFT; |
1626 | >> EDID_TIMING_ASPECT_SHIFT; |
1605 | unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK) |
1627 | unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK) |
1606 | >> EDID_TIMING_VFREQ_SHIFT; |
1628 | >> EDID_TIMING_VFREQ_SHIFT; |
1607 | int timing_level = standard_timing_level(edid); |
1629 | int timing_level = standard_timing_level(edid); |
1608 | 1630 | ||
1609 | if (bad_std_timing(t->hsize, t->vfreq_aspect)) |
1631 | if (bad_std_timing(t->hsize, t->vfreq_aspect)) |
1610 | return NULL; |
1632 | return NULL; |
1611 | 1633 | ||
1612 | /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */ |
1634 | /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */ |
1613 | hsize = t->hsize * 8 + 248; |
1635 | hsize = t->hsize * 8 + 248; |
1614 | /* vrefresh_rate = vfreq + 60 */ |
1636 | /* vrefresh_rate = vfreq + 60 */ |
1615 | vrefresh_rate = vfreq + 60; |
1637 | vrefresh_rate = vfreq + 60; |
1616 | /* the vdisplay is calculated based on the aspect ratio */ |
1638 | /* the vdisplay is calculated based on the aspect ratio */ |
1617 | if (aspect_ratio == 0) { |
1639 | if (aspect_ratio == 0) { |
1618 | if (revision < 3) |
1640 | if (edid->revision < 3) |
1619 | vsize = hsize; |
1641 | vsize = hsize; |
1620 | else |
1642 | else |
1621 | vsize = (hsize * 10) / 16; |
1643 | vsize = (hsize * 10) / 16; |
1622 | } else if (aspect_ratio == 1) |
1644 | } else if (aspect_ratio == 1) |
1623 | vsize = (hsize * 3) / 4; |
1645 | vsize = (hsize * 3) / 4; |
1624 | else if (aspect_ratio == 2) |
1646 | else if (aspect_ratio == 2) |
1625 | vsize = (hsize * 4) / 5; |
1647 | vsize = (hsize * 4) / 5; |
1626 | else |
1648 | else |
1627 | vsize = (hsize * 9) / 16; |
1649 | vsize = (hsize * 9) / 16; |
1628 | 1650 | ||
1629 | /* HDTV hack, part 1 */ |
1651 | /* HDTV hack, part 1 */ |
1630 | if (vrefresh_rate == 60 && |
1652 | if (vrefresh_rate == 60 && |
1631 | ((hsize == 1360 && vsize == 765) || |
1653 | ((hsize == 1360 && vsize == 765) || |
1632 | (hsize == 1368 && vsize == 769))) { |
1654 | (hsize == 1368 && vsize == 769))) { |
1633 | hsize = 1366; |
1655 | hsize = 1366; |
1634 | vsize = 768; |
1656 | vsize = 768; |
1635 | } |
1657 | } |
1636 | 1658 | ||
1637 | /* |
1659 | /* |
1638 | * If this connector already has a mode for this size and refresh |
1660 | * If this connector already has a mode for this size and refresh |
1639 | * rate (because it came from detailed or CVT info), use that |
1661 | * rate (because it came from detailed or CVT info), use that |
1640 | * instead. This way we don't have to guess at interlace or |
1662 | * instead. This way we don't have to guess at interlace or |
1641 | * reduced blanking. |
1663 | * reduced blanking. |
1642 | */ |
1664 | */ |
1643 | list_for_each_entry(m, &connector->probed_modes, head) |
1665 | list_for_each_entry(m, &connector->probed_modes, head) |
1644 | if (m->hdisplay == hsize && m->vdisplay == vsize && |
1666 | if (m->hdisplay == hsize && m->vdisplay == vsize && |
1645 | drm_mode_vrefresh(m) == vrefresh_rate) |
1667 | drm_mode_vrefresh(m) == vrefresh_rate) |
1646 | return NULL; |
1668 | return NULL; |
1647 | 1669 | ||
1648 | /* HDTV hack, part 2 */ |
1670 | /* HDTV hack, part 2 */ |
1649 | if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) { |
1671 | if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) { |
1650 | mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0, |
1672 | mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0, |
1651 | false); |
1673 | false); |
1652 | mode->hdisplay = 1366; |
1674 | mode->hdisplay = 1366; |
1653 | mode->hsync_start = mode->hsync_start - 1; |
1675 | mode->hsync_start = mode->hsync_start - 1; |
1654 | mode->hsync_end = mode->hsync_end - 1; |
1676 | mode->hsync_end = mode->hsync_end - 1; |
1655 | return mode; |
1677 | return mode; |
1656 | } |
1678 | } |
1657 | 1679 | ||
1658 | /* check whether it can be found in default mode table */ |
1680 | /* check whether it can be found in default mode table */ |
1659 | if (drm_monitor_supports_rb(edid)) { |
1681 | if (drm_monitor_supports_rb(edid)) { |
1660 | mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, |
1682 | mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, |
1661 | true); |
1683 | true); |
1662 | if (mode) |
1684 | if (mode) |
1663 | return mode; |
1685 | return mode; |
1664 | } |
1686 | } |
1665 | mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false); |
1687 | mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false); |
1666 | if (mode) |
1688 | if (mode) |
1667 | return mode; |
1689 | return mode; |
1668 | 1690 | ||
1669 | /* okay, generate it */ |
1691 | /* okay, generate it */ |
1670 | switch (timing_level) { |
1692 | switch (timing_level) { |
1671 | case LEVEL_DMT: |
1693 | case LEVEL_DMT: |
1672 | break; |
1694 | break; |
1673 | case LEVEL_GTF: |
1695 | case LEVEL_GTF: |
1674 | mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); |
1696 | mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); |
1675 | break; |
1697 | break; |
1676 | case LEVEL_GTF2: |
1698 | case LEVEL_GTF2: |
1677 | /* |
1699 | /* |
1678 | * This is potentially wrong if there's ever a monitor with |
1700 | * This is potentially wrong if there's ever a monitor with |
1679 | * more than one ranges section, each claiming a different |
1701 | * more than one ranges section, each claiming a different |
1680 | * secondary GTF curve. Please don't do that. |
1702 | * secondary GTF curve. Please don't do that. |
1681 | */ |
1703 | */ |
1682 | mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); |
1704 | mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); |
1683 | if (!mode) |
1705 | if (!mode) |
1684 | return NULL; |
1706 | return NULL; |
1685 | if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) { |
1707 | if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) { |
1686 | drm_mode_destroy(dev, mode); |
1708 | drm_mode_destroy(dev, mode); |
1687 | mode = drm_gtf_mode_complex(dev, hsize, vsize, |
1709 | mode = drm_gtf_mode_complex(dev, hsize, vsize, |
1688 | vrefresh_rate, 0, 0, |
1710 | vrefresh_rate, 0, 0, |
1689 | drm_gtf2_m(edid), |
1711 | drm_gtf2_m(edid), |
1690 | drm_gtf2_2c(edid), |
1712 | drm_gtf2_2c(edid), |
1691 | drm_gtf2_k(edid), |
1713 | drm_gtf2_k(edid), |
1692 | drm_gtf2_2j(edid)); |
1714 | drm_gtf2_2j(edid)); |
1693 | } |
1715 | } |
1694 | break; |
1716 | break; |
1695 | case LEVEL_CVT: |
1717 | case LEVEL_CVT: |
1696 | mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0, |
1718 | mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0, |
1697 | false); |
1719 | false); |
1698 | break; |
1720 | break; |
1699 | } |
1721 | } |
1700 | return mode; |
1722 | return mode; |
1701 | } |
1723 | } |
1702 | 1724 | ||
1703 | /* |
1725 | /* |
1704 | * EDID is delightfully ambiguous about how interlaced modes are to be |
1726 | * EDID is delightfully ambiguous about how interlaced modes are to be |
1705 | * encoded. Our internal representation is of frame height, but some |
1727 | * encoded. Our internal representation is of frame height, but some |
1706 | * HDTV detailed timings are encoded as field height. |
1728 | * HDTV detailed timings are encoded as field height. |
1707 | * |
1729 | * |
1708 | * The format list here is from CEA, in frame size. Technically we |
1730 | * The format list here is from CEA, in frame size. Technically we |
1709 | * should be checking refresh rate too. Whatever. |
1731 | * should be checking refresh rate too. Whatever. |
1710 | */ |
1732 | */ |
1711 | static void |
1733 | static void |
1712 | drm_mode_do_interlace_quirk(struct drm_display_mode *mode, |
1734 | drm_mode_do_interlace_quirk(struct drm_display_mode *mode, |
1713 | struct detailed_pixel_timing *pt) |
1735 | struct detailed_pixel_timing *pt) |
1714 | { |
1736 | { |
1715 | int i; |
1737 | int i; |
1716 | static const struct { |
1738 | static const struct { |
1717 | int w, h; |
1739 | int w, h; |
1718 | } cea_interlaced[] = { |
1740 | } cea_interlaced[] = { |
1719 | { 1920, 1080 }, |
1741 | { 1920, 1080 }, |
1720 | { 720, 480 }, |
1742 | { 720, 480 }, |
1721 | { 1440, 480 }, |
1743 | { 1440, 480 }, |
1722 | { 2880, 480 }, |
1744 | { 2880, 480 }, |
1723 | { 720, 576 }, |
1745 | { 720, 576 }, |
1724 | { 1440, 576 }, |
1746 | { 1440, 576 }, |
1725 | { 2880, 576 }, |
1747 | { 2880, 576 }, |
1726 | }; |
1748 | }; |
1727 | 1749 | ||
1728 | if (!(pt->misc & DRM_EDID_PT_INTERLACED)) |
1750 | if (!(pt->misc & DRM_EDID_PT_INTERLACED)) |
1729 | return; |
1751 | return; |
1730 | 1752 | ||
1731 | for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) { |
1753 | for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) { |
1732 | if ((mode->hdisplay == cea_interlaced[i].w) && |
1754 | if ((mode->hdisplay == cea_interlaced[i].w) && |
1733 | (mode->vdisplay == cea_interlaced[i].h / 2)) { |
1755 | (mode->vdisplay == cea_interlaced[i].h / 2)) { |
1734 | mode->vdisplay *= 2; |
1756 | mode->vdisplay *= 2; |
1735 | mode->vsync_start *= 2; |
1757 | mode->vsync_start *= 2; |
1736 | mode->vsync_end *= 2; |
1758 | mode->vsync_end *= 2; |
1737 | mode->vtotal *= 2; |
1759 | mode->vtotal *= 2; |
1738 | mode->vtotal |= 1; |
1760 | mode->vtotal |= 1; |
1739 | } |
1761 | } |
1740 | } |
1762 | } |
1741 | 1763 | ||
1742 | mode->flags |= DRM_MODE_FLAG_INTERLACE; |
1764 | mode->flags |= DRM_MODE_FLAG_INTERLACE; |
1743 | } |
1765 | } |
1744 | 1766 | ||
1745 | /** |
1767 | /** |
1746 | * drm_mode_detailed - create a new mode from an EDID detailed timing section |
1768 | * drm_mode_detailed - create a new mode from an EDID detailed timing section |
1747 | * @dev: DRM device (needed to create new mode) |
1769 | * @dev: DRM device (needed to create new mode) |
1748 | * @edid: EDID block |
1770 | * @edid: EDID block |
1749 | * @timing: EDID detailed timing info |
1771 | * @timing: EDID detailed timing info |
1750 | * @quirks: quirks to apply |
1772 | * @quirks: quirks to apply |
1751 | * |
1773 | * |
1752 | * An EDID detailed timing block contains enough info for us to create and |
1774 | * An EDID detailed timing block contains enough info for us to create and |
1753 | * return a new struct drm_display_mode. |
1775 | * return a new struct drm_display_mode. |
1754 | */ |
1776 | */ |
1755 | static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev, |
1777 | static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev, |
1756 | struct edid *edid, |
1778 | struct edid *edid, |
1757 | struct detailed_timing *timing, |
1779 | struct detailed_timing *timing, |
1758 | u32 quirks) |
1780 | u32 quirks) |
1759 | { |
1781 | { |
1760 | struct drm_display_mode *mode; |
1782 | struct drm_display_mode *mode; |
1761 | struct detailed_pixel_timing *pt = &timing->data.pixel_data; |
1783 | struct detailed_pixel_timing *pt = &timing->data.pixel_data; |
1762 | unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo; |
1784 | unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo; |
1763 | unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo; |
1785 | unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo; |
1764 | unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo; |
1786 | unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo; |
1765 | unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo; |
1787 | unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo; |
1766 | unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo; |
1788 | unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo; |
1767 | unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo; |
1789 | unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo; |
1768 | unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 2 | pt->vsync_offset_pulse_width_lo >> 4; |
1790 | unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 2 | pt->vsync_offset_pulse_width_lo >> 4; |
1769 | unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf); |
1791 | unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf); |
1770 | 1792 | ||
1771 | /* ignore tiny modes */ |
1793 | /* ignore tiny modes */ |
1772 | if (hactive < 64 || vactive < 64) |
1794 | if (hactive < 64 || vactive < 64) |
1773 | return NULL; |
1795 | return NULL; |
1774 | 1796 | ||
1775 | if (pt->misc & DRM_EDID_PT_STEREO) { |
1797 | if (pt->misc & DRM_EDID_PT_STEREO) { |
1776 | DRM_DEBUG_KMS("stereo mode not supported\n"); |
1798 | DRM_DEBUG_KMS("stereo mode not supported\n"); |
1777 | return NULL; |
1799 | return NULL; |
1778 | } |
1800 | } |
1779 | if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { |
1801 | if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { |
1780 | DRM_DEBUG_KMS("composite sync not supported\n"); |
1802 | DRM_DEBUG_KMS("composite sync not supported\n"); |
1781 | } |
1803 | } |
1782 | 1804 | ||
1783 | /* it is incorrect if hsync/vsync width is zero */ |
1805 | /* it is incorrect if hsync/vsync width is zero */ |
1784 | if (!hsync_pulse_width || !vsync_pulse_width) { |
1806 | if (!hsync_pulse_width || !vsync_pulse_width) { |
1785 | DRM_DEBUG_KMS("Incorrect Detailed timing. " |
1807 | DRM_DEBUG_KMS("Incorrect Detailed timing. " |
1786 | "Wrong Hsync/Vsync pulse width\n"); |
1808 | "Wrong Hsync/Vsync pulse width\n"); |
1787 | return NULL; |
1809 | return NULL; |
1788 | } |
1810 | } |
1789 | 1811 | ||
1790 | if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) { |
1812 | if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) { |
1791 | mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false); |
1813 | mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false); |
1792 | if (!mode) |
1814 | if (!mode) |
1793 | return NULL; |
1815 | return NULL; |
1794 | 1816 | ||
1795 | goto set_size; |
1817 | goto set_size; |
1796 | } |
1818 | } |
1797 | 1819 | ||
1798 | mode = drm_mode_create(dev); |
1820 | mode = drm_mode_create(dev); |
1799 | if (!mode) |
1821 | if (!mode) |
1800 | return NULL; |
1822 | return NULL; |
1801 | 1823 | ||
1802 | if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH) |
1824 | if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH) |
1803 | timing->pixel_clock = cpu_to_le16(1088); |
1825 | timing->pixel_clock = cpu_to_le16(1088); |
1804 | 1826 | ||
1805 | mode->clock = le16_to_cpu(timing->pixel_clock) * 10; |
1827 | mode->clock = le16_to_cpu(timing->pixel_clock) * 10; |
1806 | 1828 | ||
1807 | mode->hdisplay = hactive; |
1829 | mode->hdisplay = hactive; |
1808 | mode->hsync_start = mode->hdisplay + hsync_offset; |
1830 | mode->hsync_start = mode->hdisplay + hsync_offset; |
1809 | mode->hsync_end = mode->hsync_start + hsync_pulse_width; |
1831 | mode->hsync_end = mode->hsync_start + hsync_pulse_width; |
1810 | mode->htotal = mode->hdisplay + hblank; |
1832 | mode->htotal = mode->hdisplay + hblank; |
1811 | 1833 | ||
1812 | mode->vdisplay = vactive; |
1834 | mode->vdisplay = vactive; |
1813 | mode->vsync_start = mode->vdisplay + vsync_offset; |
1835 | mode->vsync_start = mode->vdisplay + vsync_offset; |
1814 | mode->vsync_end = mode->vsync_start + vsync_pulse_width; |
1836 | mode->vsync_end = mode->vsync_start + vsync_pulse_width; |
1815 | mode->vtotal = mode->vdisplay + vblank; |
1837 | mode->vtotal = mode->vdisplay + vblank; |
1816 | 1838 | ||
1817 | /* Some EDIDs have bogus h/vtotal values */ |
1839 | /* Some EDIDs have bogus h/vtotal values */ |
1818 | if (mode->hsync_end > mode->htotal) |
1840 | if (mode->hsync_end > mode->htotal) |
1819 | mode->htotal = mode->hsync_end + 1; |
1841 | mode->htotal = mode->hsync_end + 1; |
1820 | if (mode->vsync_end > mode->vtotal) |
1842 | if (mode->vsync_end > mode->vtotal) |
1821 | mode->vtotal = mode->vsync_end + 1; |
1843 | mode->vtotal = mode->vsync_end + 1; |
1822 | 1844 | ||
1823 | drm_mode_do_interlace_quirk(mode, pt); |
1845 | drm_mode_do_interlace_quirk(mode, pt); |
1824 | 1846 | ||
1825 | if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) { |
1847 | if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) { |
1826 | pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE; |
1848 | pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE; |
1827 | } |
1849 | } |
1828 | 1850 | ||
1829 | mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? |
1851 | mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? |
1830 | DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; |
1852 | DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; |
1831 | mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? |
1853 | mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? |
1832 | DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; |
1854 | DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; |
1833 | 1855 | ||
1834 | set_size: |
1856 | set_size: |
1835 | mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4; |
1857 | mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4; |
1836 | mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8; |
1858 | mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8; |
1837 | 1859 | ||
1838 | if (quirks & EDID_QUIRK_DETAILED_IN_CM) { |
1860 | if (quirks & EDID_QUIRK_DETAILED_IN_CM) { |
1839 | mode->width_mm *= 10; |
1861 | mode->width_mm *= 10; |
1840 | mode->height_mm *= 10; |
1862 | mode->height_mm *= 10; |
1841 | } |
1863 | } |
1842 | 1864 | ||
1843 | if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) { |
1865 | if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) { |
1844 | mode->width_mm = edid->width_cm * 10; |
1866 | mode->width_mm = edid->width_cm * 10; |
1845 | mode->height_mm = edid->height_cm * 10; |
1867 | mode->height_mm = edid->height_cm * 10; |
1846 | } |
1868 | } |
1847 | 1869 | ||
1848 | mode->type = DRM_MODE_TYPE_DRIVER; |
1870 | mode->type = DRM_MODE_TYPE_DRIVER; |
1849 | mode->vrefresh = drm_mode_vrefresh(mode); |
1871 | mode->vrefresh = drm_mode_vrefresh(mode); |
1850 | drm_mode_set_name(mode); |
1872 | drm_mode_set_name(mode); |
1851 | 1873 | ||
1852 | return mode; |
1874 | return mode; |
1853 | } |
1875 | } |
1854 | 1876 | ||
1855 | static bool |
1877 | static bool |
1856 | mode_in_hsync_range(const struct drm_display_mode *mode, |
1878 | mode_in_hsync_range(const struct drm_display_mode *mode, |
1857 | struct edid *edid, u8 *t) |
1879 | struct edid *edid, u8 *t) |
1858 | { |
1880 | { |
1859 | int hsync, hmin, hmax; |
1881 | int hsync, hmin, hmax; |
1860 | 1882 | ||
1861 | hmin = t[7]; |
1883 | hmin = t[7]; |
1862 | if (edid->revision >= 4) |
1884 | if (edid->revision >= 4) |
1863 | hmin += ((t[4] & 0x04) ? 255 : 0); |
1885 | hmin += ((t[4] & 0x04) ? 255 : 0); |
1864 | hmax = t[8]; |
1886 | hmax = t[8]; |
1865 | if (edid->revision >= 4) |
1887 | if (edid->revision >= 4) |
1866 | hmax += ((t[4] & 0x08) ? 255 : 0); |
1888 | hmax += ((t[4] & 0x08) ? 255 : 0); |
1867 | hsync = drm_mode_hsync(mode); |
1889 | hsync = drm_mode_hsync(mode); |
1868 | 1890 | ||
1869 | return (hsync <= hmax && hsync >= hmin); |
1891 | return (hsync <= hmax && hsync >= hmin); |
1870 | } |
1892 | } |
1871 | 1893 | ||
1872 | static bool |
1894 | static bool |
1873 | mode_in_vsync_range(const struct drm_display_mode *mode, |
1895 | mode_in_vsync_range(const struct drm_display_mode *mode, |
1874 | struct edid *edid, u8 *t) |
1896 | struct edid *edid, u8 *t) |
1875 | { |
1897 | { |
1876 | int vsync, vmin, vmax; |
1898 | int vsync, vmin, vmax; |
1877 | 1899 | ||
1878 | vmin = t[5]; |
1900 | vmin = t[5]; |
1879 | if (edid->revision >= 4) |
1901 | if (edid->revision >= 4) |
1880 | vmin += ((t[4] & 0x01) ? 255 : 0); |
1902 | vmin += ((t[4] & 0x01) ? 255 : 0); |
1881 | vmax = t[6]; |
1903 | vmax = t[6]; |
1882 | if (edid->revision >= 4) |
1904 | if (edid->revision >= 4) |
1883 | vmax += ((t[4] & 0x02) ? 255 : 0); |
1905 | vmax += ((t[4] & 0x02) ? 255 : 0); |
1884 | vsync = drm_mode_vrefresh(mode); |
1906 | vsync = drm_mode_vrefresh(mode); |
1885 | 1907 | ||
1886 | return (vsync <= vmax && vsync >= vmin); |
1908 | return (vsync <= vmax && vsync >= vmin); |
1887 | } |
1909 | } |
1888 | 1910 | ||
1889 | static u32 |
1911 | static u32 |
1890 | range_pixel_clock(struct edid *edid, u8 *t) |
1912 | range_pixel_clock(struct edid *edid, u8 *t) |
1891 | { |
1913 | { |
1892 | /* unspecified */ |
1914 | /* unspecified */ |
1893 | if (t[9] == 0 || t[9] == 255) |
1915 | if (t[9] == 0 || t[9] == 255) |
1894 | return 0; |
1916 | return 0; |
1895 | 1917 | ||
1896 | /* 1.4 with CVT support gives us real precision, yay */ |
1918 | /* 1.4 with CVT support gives us real precision, yay */ |
1897 | if (edid->revision >= 4 && t[10] == 0x04) |
1919 | if (edid->revision >= 4 && t[10] == 0x04) |
1898 | return (t[9] * 10000) - ((t[12] >> 2) * 250); |
1920 | return (t[9] * 10000) - ((t[12] >> 2) * 250); |
1899 | 1921 | ||
1900 | /* 1.3 is pathetic, so fuzz up a bit */ |
1922 | /* 1.3 is pathetic, so fuzz up a bit */ |
1901 | return t[9] * 10000 + 5001; |
1923 | return t[9] * 10000 + 5001; |
1902 | } |
1924 | } |
1903 | 1925 | ||
1904 | static bool |
1926 | static bool |
1905 | mode_in_range(const struct drm_display_mode *mode, struct edid *edid, |
1927 | mode_in_range(const struct drm_display_mode *mode, struct edid *edid, |
1906 | struct detailed_timing *timing) |
1928 | struct detailed_timing *timing) |
1907 | { |
1929 | { |
1908 | u32 max_clock; |
1930 | u32 max_clock; |
1909 | u8 *t = (u8 *)timing; |
1931 | u8 *t = (u8 *)timing; |
1910 | 1932 | ||
1911 | if (!mode_in_hsync_range(mode, edid, t)) |
1933 | if (!mode_in_hsync_range(mode, edid, t)) |
1912 | return false; |
1934 | return false; |
1913 | 1935 | ||
1914 | if (!mode_in_vsync_range(mode, edid, t)) |
1936 | if (!mode_in_vsync_range(mode, edid, t)) |
1915 | return false; |
1937 | return false; |
1916 | 1938 | ||
1917 | if ((max_clock = range_pixel_clock(edid, t))) |
1939 | if ((max_clock = range_pixel_clock(edid, t))) |
1918 | if (mode->clock > max_clock) |
1940 | if (mode->clock > max_clock) |
1919 | return false; |
1941 | return false; |
1920 | 1942 | ||
1921 | /* 1.4 max horizontal check */ |
1943 | /* 1.4 max horizontal check */ |
1922 | if (edid->revision >= 4 && t[10] == 0x04) |
1944 | if (edid->revision >= 4 && t[10] == 0x04) |
1923 | if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3)))) |
1945 | if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3)))) |
1924 | return false; |
1946 | return false; |
1925 | 1947 | ||
1926 | if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid)) |
1948 | if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid)) |
1927 | return false; |
1949 | return false; |
1928 | 1950 | ||
1929 | return true; |
1951 | return true; |
1930 | } |
1952 | } |
1931 | 1953 | ||
1932 | static bool valid_inferred_mode(const struct drm_connector *connector, |
1954 | static bool valid_inferred_mode(const struct drm_connector *connector, |
1933 | const struct drm_display_mode *mode) |
1955 | const struct drm_display_mode *mode) |
1934 | { |
1956 | { |
1935 | struct drm_display_mode *m; |
1957 | struct drm_display_mode *m; |
1936 | bool ok = false; |
1958 | bool ok = false; |
1937 | 1959 | ||
1938 | list_for_each_entry(m, &connector->probed_modes, head) { |
1960 | list_for_each_entry(m, &connector->probed_modes, head) { |
1939 | if (mode->hdisplay == m->hdisplay && |
1961 | if (mode->hdisplay == m->hdisplay && |
1940 | mode->vdisplay == m->vdisplay && |
1962 | mode->vdisplay == m->vdisplay && |
1941 | drm_mode_vrefresh(mode) == drm_mode_vrefresh(m)) |
1963 | drm_mode_vrefresh(mode) == drm_mode_vrefresh(m)) |
1942 | return false; /* duplicated */ |
1964 | return false; /* duplicated */ |
1943 | if (mode->hdisplay <= m->hdisplay && |
1965 | if (mode->hdisplay <= m->hdisplay && |
1944 | mode->vdisplay <= m->vdisplay) |
1966 | mode->vdisplay <= m->vdisplay) |
1945 | ok = true; |
1967 | ok = true; |
1946 | } |
1968 | } |
1947 | return ok; |
1969 | return ok; |
1948 | } |
1970 | } |
1949 | 1971 | ||
1950 | static int |
1972 | static int |
1951 | drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid, |
1973 | drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid, |
1952 | struct detailed_timing *timing) |
1974 | struct detailed_timing *timing) |
1953 | { |
1975 | { |
1954 | int i, modes = 0; |
1976 | int i, modes = 0; |
1955 | struct drm_display_mode *newmode; |
1977 | struct drm_display_mode *newmode; |
1956 | struct drm_device *dev = connector->dev; |
1978 | struct drm_device *dev = connector->dev; |
1957 | 1979 | ||
1958 | for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) { |
1980 | for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) { |
1959 | if (mode_in_range(drm_dmt_modes + i, edid, timing) && |
1981 | if (mode_in_range(drm_dmt_modes + i, edid, timing) && |
1960 | valid_inferred_mode(connector, drm_dmt_modes + i)) { |
1982 | valid_inferred_mode(connector, drm_dmt_modes + i)) { |
1961 | newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]); |
1983 | newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]); |
1962 | if (newmode) { |
1984 | if (newmode) { |
1963 | drm_mode_probed_add(connector, newmode); |
1985 | drm_mode_probed_add(connector, newmode); |
1964 | modes++; |
1986 | modes++; |
1965 | } |
1987 | } |
1966 | } |
1988 | } |
1967 | } |
1989 | } |
1968 | 1990 | ||
1969 | return modes; |
1991 | return modes; |
1970 | } |
1992 | } |
1971 | 1993 | ||
1972 | /* fix up 1366x768 mode from 1368x768; |
1994 | /* fix up 1366x768 mode from 1368x768; |
1973 | * GFT/CVT can't express 1366 width which isn't dividable by 8 |
1995 | * GFT/CVT can't express 1366 width which isn't dividable by 8 |
1974 | */ |
1996 | */ |
1975 | static void fixup_mode_1366x768(struct drm_display_mode *mode) |
1997 | static void fixup_mode_1366x768(struct drm_display_mode *mode) |
1976 | { |
1998 | { |
1977 | if (mode->hdisplay == 1368 && mode->vdisplay == 768) { |
1999 | if (mode->hdisplay == 1368 && mode->vdisplay == 768) { |
1978 | mode->hdisplay = 1366; |
2000 | mode->hdisplay = 1366; |
1979 | mode->hsync_start--; |
2001 | mode->hsync_start--; |
1980 | mode->hsync_end--; |
2002 | mode->hsync_end--; |
1981 | drm_mode_set_name(mode); |
2003 | drm_mode_set_name(mode); |
1982 | } |
2004 | } |
1983 | } |
2005 | } |
1984 | 2006 | ||
1985 | static int |
2007 | static int |
1986 | drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid, |
2008 | drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid, |
1987 | struct detailed_timing *timing) |
2009 | struct detailed_timing *timing) |
1988 | { |
2010 | { |
1989 | int i, modes = 0; |
2011 | int i, modes = 0; |
1990 | struct drm_display_mode *newmode; |
2012 | struct drm_display_mode *newmode; |
1991 | struct drm_device *dev = connector->dev; |
2013 | struct drm_device *dev = connector->dev; |
1992 | 2014 | ||
1993 | for (i = 0; i < ARRAY_SIZE(extra_modes); i++) { |
2015 | for (i = 0; i < ARRAY_SIZE(extra_modes); i++) { |
1994 | const struct minimode *m = &extra_modes[i]; |
2016 | const struct minimode *m = &extra_modes[i]; |
1995 | newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0); |
2017 | newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0); |
1996 | if (!newmode) |
2018 | if (!newmode) |
1997 | return modes; |
2019 | return modes; |
1998 | 2020 | ||
1999 | fixup_mode_1366x768(newmode); |
2021 | fixup_mode_1366x768(newmode); |
2000 | if (!mode_in_range(newmode, edid, timing) || |
2022 | if (!mode_in_range(newmode, edid, timing) || |
2001 | !valid_inferred_mode(connector, newmode)) { |
2023 | !valid_inferred_mode(connector, newmode)) { |
2002 | drm_mode_destroy(dev, newmode); |
2024 | drm_mode_destroy(dev, newmode); |
2003 | continue; |
2025 | continue; |
2004 | } |
2026 | } |
2005 | 2027 | ||
2006 | drm_mode_probed_add(connector, newmode); |
2028 | drm_mode_probed_add(connector, newmode); |
2007 | modes++; |
2029 | modes++; |
2008 | } |
2030 | } |
2009 | 2031 | ||
2010 | return modes; |
2032 | return modes; |
2011 | } |
2033 | } |
2012 | 2034 | ||
2013 | static int |
2035 | static int |
2014 | drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid, |
2036 | drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid, |
2015 | struct detailed_timing *timing) |
2037 | struct detailed_timing *timing) |
2016 | { |
2038 | { |
2017 | int i, modes = 0; |
2039 | int i, modes = 0; |
2018 | struct drm_display_mode *newmode; |
2040 | struct drm_display_mode *newmode; |
2019 | struct drm_device *dev = connector->dev; |
2041 | struct drm_device *dev = connector->dev; |
2020 | bool rb = drm_monitor_supports_rb(edid); |
2042 | bool rb = drm_monitor_supports_rb(edid); |
2021 | 2043 | ||
2022 | for (i = 0; i < ARRAY_SIZE(extra_modes); i++) { |
2044 | for (i = 0; i < ARRAY_SIZE(extra_modes); i++) { |
2023 | const struct minimode *m = &extra_modes[i]; |
2045 | const struct minimode *m = &extra_modes[i]; |
2024 | newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0); |
2046 | newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0); |
2025 | if (!newmode) |
2047 | if (!newmode) |
2026 | return modes; |
2048 | return modes; |
2027 | 2049 | ||
2028 | fixup_mode_1366x768(newmode); |
2050 | fixup_mode_1366x768(newmode); |
2029 | if (!mode_in_range(newmode, edid, timing) || |
2051 | if (!mode_in_range(newmode, edid, timing) || |
2030 | !valid_inferred_mode(connector, newmode)) { |
2052 | !valid_inferred_mode(connector, newmode)) { |
2031 | drm_mode_destroy(dev, newmode); |
2053 | drm_mode_destroy(dev, newmode); |
2032 | continue; |
2054 | continue; |
2033 | } |
2055 | } |
2034 | 2056 | ||
2035 | drm_mode_probed_add(connector, newmode); |
2057 | drm_mode_probed_add(connector, newmode); |
2036 | modes++; |
2058 | modes++; |
2037 | } |
2059 | } |
2038 | 2060 | ||
2039 | return modes; |
2061 | return modes; |
2040 | } |
2062 | } |
2041 | 2063 | ||
2042 | static void |
2064 | static void |
2043 | do_inferred_modes(struct detailed_timing *timing, void *c) |
2065 | do_inferred_modes(struct detailed_timing *timing, void *c) |
2044 | { |
2066 | { |
2045 | struct detailed_mode_closure *closure = c; |
2067 | struct detailed_mode_closure *closure = c; |
2046 | struct detailed_non_pixel *data = &timing->data.other_data; |
2068 | struct detailed_non_pixel *data = &timing->data.other_data; |
2047 | struct detailed_data_monitor_range *range = &data->data.range; |
2069 | struct detailed_data_monitor_range *range = &data->data.range; |
2048 | 2070 | ||
2049 | if (data->type != EDID_DETAIL_MONITOR_RANGE) |
2071 | if (data->type != EDID_DETAIL_MONITOR_RANGE) |
2050 | return; |
2072 | return; |
2051 | 2073 | ||
2052 | closure->modes += drm_dmt_modes_for_range(closure->connector, |
2074 | closure->modes += drm_dmt_modes_for_range(closure->connector, |
2053 | closure->edid, |
2075 | closure->edid, |
2054 | timing); |
2076 | timing); |
2055 | 2077 | ||
2056 | if (!version_greater(closure->edid, 1, 1)) |
2078 | if (!version_greater(closure->edid, 1, 1)) |
2057 | return; /* GTF not defined yet */ |
2079 | return; /* GTF not defined yet */ |
2058 | 2080 | ||
2059 | switch (range->flags) { |
2081 | switch (range->flags) { |
2060 | case 0x02: /* secondary gtf, XXX could do more */ |
2082 | case 0x02: /* secondary gtf, XXX could do more */ |
2061 | case 0x00: /* default gtf */ |
2083 | case 0x00: /* default gtf */ |
2062 | closure->modes += drm_gtf_modes_for_range(closure->connector, |
2084 | closure->modes += drm_gtf_modes_for_range(closure->connector, |
2063 | closure->edid, |
2085 | closure->edid, |
2064 | timing); |
2086 | timing); |
2065 | break; |
2087 | break; |
2066 | case 0x04: /* cvt, only in 1.4+ */ |
2088 | case 0x04: /* cvt, only in 1.4+ */ |
2067 | if (!version_greater(closure->edid, 1, 3)) |
2089 | if (!version_greater(closure->edid, 1, 3)) |
2068 | break; |
2090 | break; |
2069 | 2091 | ||
2070 | closure->modes += drm_cvt_modes_for_range(closure->connector, |
2092 | closure->modes += drm_cvt_modes_for_range(closure->connector, |
2071 | closure->edid, |
2093 | closure->edid, |
2072 | timing); |
2094 | timing); |
2073 | break; |
2095 | break; |
2074 | case 0x01: /* just the ranges, no formula */ |
2096 | case 0x01: /* just the ranges, no formula */ |
2075 | default: |
2097 | default: |
2076 | break; |
2098 | break; |
2077 | } |
2099 | } |
2078 | } |
2100 | } |
2079 | 2101 | ||
2080 | static int |
2102 | static int |
2081 | add_inferred_modes(struct drm_connector *connector, struct edid *edid) |
2103 | add_inferred_modes(struct drm_connector *connector, struct edid *edid) |
2082 | { |
2104 | { |
2083 | struct detailed_mode_closure closure = { |
2105 | struct detailed_mode_closure closure = { |
2084 | connector, edid, 0, 0, 0 |
2106 | connector, edid, 0, 0, 0 |
2085 | }; |
2107 | }; |
2086 | 2108 | ||
2087 | if (version_greater(edid, 1, 0)) |
2109 | if (version_greater(edid, 1, 0)) |
2088 | drm_for_each_detailed_block((u8 *)edid, do_inferred_modes, |
2110 | drm_for_each_detailed_block((u8 *)edid, do_inferred_modes, |
2089 | &closure); |
2111 | &closure); |
2090 | 2112 | ||
2091 | return closure.modes; |
2113 | return closure.modes; |
2092 | } |
2114 | } |
2093 | 2115 | ||
2094 | static int |
2116 | static int |
2095 | drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing) |
2117 | drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing) |
2096 | { |
2118 | { |
2097 | int i, j, m, modes = 0; |
2119 | int i, j, m, modes = 0; |
2098 | struct drm_display_mode *mode; |
2120 | struct drm_display_mode *mode; |
2099 | u8 *est = ((u8 *)timing) + 5; |
2121 | u8 *est = ((u8 *)timing) + 5; |
2100 | 2122 | ||
2101 | for (i = 0; i < 6; i++) { |
2123 | for (i = 0; i < 6; i++) { |
2102 | for (j = 7; j >= 0; j--) { |
2124 | for (j = 7; j >= 0; j--) { |
2103 | m = (i * 8) + (7 - j); |
2125 | m = (i * 8) + (7 - j); |
2104 | if (m >= ARRAY_SIZE(est3_modes)) |
2126 | if (m >= ARRAY_SIZE(est3_modes)) |
2105 | break; |
2127 | break; |
2106 | if (est[i] & (1 << j)) { |
2128 | if (est[i] & (1 << j)) { |
2107 | mode = drm_mode_find_dmt(connector->dev, |
2129 | mode = drm_mode_find_dmt(connector->dev, |
2108 | est3_modes[m].w, |
2130 | est3_modes[m].w, |
2109 | est3_modes[m].h, |
2131 | est3_modes[m].h, |
2110 | est3_modes[m].r, |
2132 | est3_modes[m].r, |
2111 | est3_modes[m].rb); |
2133 | est3_modes[m].rb); |
2112 | if (mode) { |
2134 | if (mode) { |
2113 | drm_mode_probed_add(connector, mode); |
2135 | drm_mode_probed_add(connector, mode); |
2114 | modes++; |
2136 | modes++; |
2115 | } |
2137 | } |
2116 | } |
2138 | } |
2117 | } |
2139 | } |
2118 | } |
2140 | } |
2119 | 2141 | ||
2120 | return modes; |
2142 | return modes; |
2121 | } |
2143 | } |
2122 | 2144 | ||
2123 | static void |
2145 | static void |
2124 | do_established_modes(struct detailed_timing *timing, void *c) |
2146 | do_established_modes(struct detailed_timing *timing, void *c) |
2125 | { |
2147 | { |
2126 | struct detailed_mode_closure *closure = c; |
2148 | struct detailed_mode_closure *closure = c; |
2127 | struct detailed_non_pixel *data = &timing->data.other_data; |
2149 | struct detailed_non_pixel *data = &timing->data.other_data; |
2128 | 2150 | ||
2129 | if (data->type == EDID_DETAIL_EST_TIMINGS) |
2151 | if (data->type == EDID_DETAIL_EST_TIMINGS) |
2130 | closure->modes += drm_est3_modes(closure->connector, timing); |
2152 | closure->modes += drm_est3_modes(closure->connector, timing); |
2131 | } |
2153 | } |
2132 | 2154 | ||
2133 | /** |
2155 | /** |
2134 | * add_established_modes - get est. modes from EDID and add them |
2156 | * add_established_modes - get est. modes from EDID and add them |
- | 2157 | * @connector: connector to add mode(s) to |
|
2135 | * @edid: EDID block to scan |
2158 | * @edid: EDID block to scan |
2136 | * |
2159 | * |
2137 | * Each EDID block contains a bitmap of the supported "established modes" list |
2160 | * Each EDID block contains a bitmap of the supported "established modes" list |
2138 | * (defined above). Tease them out and add them to the global modes list. |
2161 | * (defined above). Tease them out and add them to the global modes list. |
2139 | */ |
2162 | */ |
2140 | static int |
2163 | static int |
2141 | add_established_modes(struct drm_connector *connector, struct edid *edid) |
2164 | add_established_modes(struct drm_connector *connector, struct edid *edid) |
2142 | { |
2165 | { |
2143 | struct drm_device *dev = connector->dev; |
2166 | struct drm_device *dev = connector->dev; |
2144 | unsigned long est_bits = edid->established_timings.t1 | |
2167 | unsigned long est_bits = edid->established_timings.t1 | |
2145 | (edid->established_timings.t2 << 8) | |
2168 | (edid->established_timings.t2 << 8) | |
2146 | ((edid->established_timings.mfg_rsvd & 0x80) << 9); |
2169 | ((edid->established_timings.mfg_rsvd & 0x80) << 9); |
2147 | int i, modes = 0; |
2170 | int i, modes = 0; |
2148 | struct detailed_mode_closure closure = { |
2171 | struct detailed_mode_closure closure = { |
2149 | connector, edid, 0, 0, 0 |
2172 | connector, edid, 0, 0, 0 |
2150 | }; |
2173 | }; |
2151 | 2174 | ||
2152 | for (i = 0; i <= EDID_EST_TIMINGS; i++) { |
2175 | for (i = 0; i <= EDID_EST_TIMINGS; i++) { |
2153 | if (est_bits & (1< |
2176 | if (est_bits & (1< |
2154 | struct drm_display_mode *newmode; |
2177 | struct drm_display_mode *newmode; |
2155 | newmode = drm_mode_duplicate(dev, &edid_est_modes[i]); |
2178 | newmode = drm_mode_duplicate(dev, &edid_est_modes[i]); |
2156 | if (newmode) { |
2179 | if (newmode) { |
2157 | drm_mode_probed_add(connector, newmode); |
2180 | drm_mode_probed_add(connector, newmode); |
2158 | modes++; |
2181 | modes++; |
2159 | } |
2182 | } |
2160 | } |
2183 | } |
2161 | } |
2184 | } |
2162 | 2185 | ||
2163 | if (version_greater(edid, 1, 0)) |
2186 | if (version_greater(edid, 1, 0)) |
2164 | drm_for_each_detailed_block((u8 *)edid, |
2187 | drm_for_each_detailed_block((u8 *)edid, |
2165 | do_established_modes, &closure); |
2188 | do_established_modes, &closure); |
2166 | 2189 | ||
2167 | return modes + closure.modes; |
2190 | return modes + closure.modes; |
2168 | } |
2191 | } |
2169 | 2192 | ||
2170 | static void |
2193 | static void |
2171 | do_standard_modes(struct detailed_timing *timing, void *c) |
2194 | do_standard_modes(struct detailed_timing *timing, void *c) |
2172 | { |
2195 | { |
2173 | struct detailed_mode_closure *closure = c; |
2196 | struct detailed_mode_closure *closure = c; |
2174 | struct detailed_non_pixel *data = &timing->data.other_data; |
2197 | struct detailed_non_pixel *data = &timing->data.other_data; |
2175 | struct drm_connector *connector = closure->connector; |
2198 | struct drm_connector *connector = closure->connector; |
2176 | struct edid *edid = closure->edid; |
2199 | struct edid *edid = closure->edid; |
2177 | 2200 | ||
2178 | if (data->type == EDID_DETAIL_STD_MODES) { |
2201 | if (data->type == EDID_DETAIL_STD_MODES) { |
2179 | int i; |
2202 | int i; |
2180 | for (i = 0; i < 6; i++) { |
2203 | for (i = 0; i < 6; i++) { |
2181 | struct std_timing *std; |
2204 | struct std_timing *std; |
2182 | struct drm_display_mode *newmode; |
2205 | struct drm_display_mode *newmode; |
2183 | 2206 | ||
2184 | std = &data->data.timings[i]; |
2207 | std = &data->data.timings[i]; |
2185 | newmode = drm_mode_std(connector, edid, std, |
2208 | newmode = drm_mode_std(connector, edid, std); |
2186 | edid->revision); |
- | |
2187 | if (newmode) { |
2209 | if (newmode) { |
2188 | drm_mode_probed_add(connector, newmode); |
2210 | drm_mode_probed_add(connector, newmode); |
2189 | closure->modes++; |
2211 | closure->modes++; |
2190 | } |
2212 | } |
2191 | } |
2213 | } |
2192 | } |
2214 | } |
2193 | } |
2215 | } |
2194 | 2216 | ||
2195 | /** |
2217 | /** |
2196 | * add_standard_modes - get std. modes from EDID and add them |
2218 | * add_standard_modes - get std. modes from EDID and add them |
- | 2219 | * @connector: connector to add mode(s) to |
|
2197 | * @edid: EDID block to scan |
2220 | * @edid: EDID block to scan |
2198 | * |
2221 | * |
2199 | * Standard modes can be calculated using the appropriate standard (DMT, |
2222 | * Standard modes can be calculated using the appropriate standard (DMT, |
2200 | * GTF or CVT. Grab them from @edid and add them to the list. |
2223 | * GTF or CVT. Grab them from @edid and add them to the list. |
2201 | */ |
2224 | */ |
2202 | static int |
2225 | static int |
2203 | add_standard_modes(struct drm_connector *connector, struct edid *edid) |
2226 | add_standard_modes(struct drm_connector *connector, struct edid *edid) |
2204 | { |
2227 | { |
2205 | int i, modes = 0; |
2228 | int i, modes = 0; |
2206 | struct detailed_mode_closure closure = { |
2229 | struct detailed_mode_closure closure = { |
2207 | connector, edid, 0, 0, 0 |
2230 | connector, edid, 0, 0, 0 |
2208 | }; |
2231 | }; |
2209 | 2232 | ||
2210 | for (i = 0; i < EDID_STD_TIMINGS; i++) { |
2233 | for (i = 0; i < EDID_STD_TIMINGS; i++) { |
2211 | struct drm_display_mode *newmode; |
2234 | struct drm_display_mode *newmode; |
2212 | 2235 | ||
2213 | newmode = drm_mode_std(connector, edid, |
2236 | newmode = drm_mode_std(connector, edid, |
2214 | &edid->standard_timings[i], |
2237 | &edid->standard_timings[i]); |
2215 | edid->revision); |
- | |
2216 | if (newmode) { |
2238 | if (newmode) { |
2217 | drm_mode_probed_add(connector, newmode); |
2239 | drm_mode_probed_add(connector, newmode); |
2218 | modes++; |
2240 | modes++; |
2219 | } |
2241 | } |
2220 | } |
2242 | } |
2221 | 2243 | ||
2222 | if (version_greater(edid, 1, 0)) |
2244 | if (version_greater(edid, 1, 0)) |
2223 | drm_for_each_detailed_block((u8 *)edid, do_standard_modes, |
2245 | drm_for_each_detailed_block((u8 *)edid, do_standard_modes, |
2224 | &closure); |
2246 | &closure); |
2225 | 2247 | ||
2226 | /* XXX should also look for standard codes in VTB blocks */ |
2248 | /* XXX should also look for standard codes in VTB blocks */ |
2227 | 2249 | ||
2228 | return modes + closure.modes; |
2250 | return modes + closure.modes; |
2229 | } |
2251 | } |
2230 | 2252 | ||
2231 | static int drm_cvt_modes(struct drm_connector *connector, |
2253 | static int drm_cvt_modes(struct drm_connector *connector, |
2232 | struct detailed_timing *timing) |
2254 | struct detailed_timing *timing) |
2233 | { |
2255 | { |
2234 | int i, j, modes = 0; |
2256 | int i, j, modes = 0; |
2235 | struct drm_display_mode *newmode; |
2257 | struct drm_display_mode *newmode; |
2236 | struct drm_device *dev = connector->dev; |
2258 | struct drm_device *dev = connector->dev; |
2237 | struct cvt_timing *cvt; |
2259 | struct cvt_timing *cvt; |
2238 | const int rates[] = { 60, 85, 75, 60, 50 }; |
2260 | const int rates[] = { 60, 85, 75, 60, 50 }; |
2239 | const u8 empty[3] = { 0, 0, 0 }; |
2261 | const u8 empty[3] = { 0, 0, 0 }; |
2240 | 2262 | ||
2241 | for (i = 0; i < 4; i++) { |
2263 | for (i = 0; i < 4; i++) { |
2242 | int uninitialized_var(width), height; |
2264 | int uninitialized_var(width), height; |
2243 | cvt = &(timing->data.other_data.data.cvt[i]); |
2265 | cvt = &(timing->data.other_data.data.cvt[i]); |
2244 | 2266 | ||
2245 | if (!memcmp(cvt->code, empty, 3)) |
2267 | if (!memcmp(cvt->code, empty, 3)) |
2246 | continue; |
2268 | continue; |
2247 | 2269 | ||
2248 | height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2; |
2270 | height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2; |
2249 | switch (cvt->code[1] & 0x0c) { |
2271 | switch (cvt->code[1] & 0x0c) { |
2250 | case 0x00: |
2272 | case 0x00: |
2251 | width = height * 4 / 3; |
2273 | width = height * 4 / 3; |
2252 | break; |
2274 | break; |
2253 | case 0x04: |
2275 | case 0x04: |
2254 | width = height * 16 / 9; |
2276 | width = height * 16 / 9; |
2255 | break; |
2277 | break; |
2256 | case 0x08: |
2278 | case 0x08: |
2257 | width = height * 16 / 10; |
2279 | width = height * 16 / 10; |
2258 | break; |
2280 | break; |
2259 | case 0x0c: |
2281 | case 0x0c: |
2260 | width = height * 15 / 9; |
2282 | width = height * 15 / 9; |
2261 | break; |
2283 | break; |
2262 | } |
2284 | } |
2263 | 2285 | ||
2264 | for (j = 1; j < 5; j++) { |
2286 | for (j = 1; j < 5; j++) { |
2265 | if (cvt->code[2] & (1 << j)) { |
2287 | if (cvt->code[2] & (1 << j)) { |
2266 | newmode = drm_cvt_mode(dev, width, height, |
2288 | newmode = drm_cvt_mode(dev, width, height, |
2267 | rates[j], j == 0, |
2289 | rates[j], j == 0, |
2268 | false, false); |
2290 | false, false); |
2269 | if (newmode) { |
2291 | if (newmode) { |
2270 | drm_mode_probed_add(connector, newmode); |
2292 | drm_mode_probed_add(connector, newmode); |
2271 | modes++; |
2293 | modes++; |
2272 | } |
2294 | } |
2273 | } |
2295 | } |
2274 | } |
2296 | } |
2275 | } |
2297 | } |
2276 | 2298 | ||
2277 | return modes; |
2299 | return modes; |
2278 | } |
2300 | } |
2279 | 2301 | ||
2280 | static void |
2302 | static void |
2281 | do_cvt_mode(struct detailed_timing *timing, void *c) |
2303 | do_cvt_mode(struct detailed_timing *timing, void *c) |
2282 | { |
2304 | { |
2283 | struct detailed_mode_closure *closure = c; |
2305 | struct detailed_mode_closure *closure = c; |
2284 | struct detailed_non_pixel *data = &timing->data.other_data; |
2306 | struct detailed_non_pixel *data = &timing->data.other_data; |
2285 | 2307 | ||
2286 | if (data->type == EDID_DETAIL_CVT_3BYTE) |
2308 | if (data->type == EDID_DETAIL_CVT_3BYTE) |
2287 | closure->modes += drm_cvt_modes(closure->connector, timing); |
2309 | closure->modes += drm_cvt_modes(closure->connector, timing); |
2288 | } |
2310 | } |
2289 | 2311 | ||
2290 | static int |
2312 | static int |
2291 | add_cvt_modes(struct drm_connector *connector, struct edid *edid) |
2313 | add_cvt_modes(struct drm_connector *connector, struct edid *edid) |
2292 | { |
2314 | { |
2293 | struct detailed_mode_closure closure = { |
2315 | struct detailed_mode_closure closure = { |
2294 | connector, edid, 0, 0, 0 |
2316 | connector, edid, 0, 0, 0 |
2295 | }; |
2317 | }; |
2296 | 2318 | ||
2297 | if (version_greater(edid, 1, 2)) |
2319 | if (version_greater(edid, 1, 2)) |
2298 | drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure); |
2320 | drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure); |
2299 | 2321 | ||
2300 | /* XXX should also look for CVT codes in VTB blocks */ |
2322 | /* XXX should also look for CVT codes in VTB blocks */ |
2301 | 2323 | ||
2302 | return closure.modes; |
2324 | return closure.modes; |
2303 | } |
2325 | } |
2304 | 2326 | ||
2305 | static void |
2327 | static void |
2306 | do_detailed_mode(struct detailed_timing *timing, void *c) |
2328 | do_detailed_mode(struct detailed_timing *timing, void *c) |
2307 | { |
2329 | { |
2308 | struct detailed_mode_closure *closure = c; |
2330 | struct detailed_mode_closure *closure = c; |
2309 | struct drm_display_mode *newmode; |
2331 | struct drm_display_mode *newmode; |
2310 | 2332 | ||
2311 | if (timing->pixel_clock) { |
2333 | if (timing->pixel_clock) { |
2312 | newmode = drm_mode_detailed(closure->connector->dev, |
2334 | newmode = drm_mode_detailed(closure->connector->dev, |
2313 | closure->edid, timing, |
2335 | closure->edid, timing, |
2314 | closure->quirks); |
2336 | closure->quirks); |
2315 | if (!newmode) |
2337 | if (!newmode) |
2316 | return; |
2338 | return; |
2317 | 2339 | ||
2318 | if (closure->preferred) |
2340 | if (closure->preferred) |
2319 | newmode->type |= DRM_MODE_TYPE_PREFERRED; |
2341 | newmode->type |= DRM_MODE_TYPE_PREFERRED; |
2320 | 2342 | ||
2321 | drm_mode_probed_add(closure->connector, newmode); |
2343 | drm_mode_probed_add(closure->connector, newmode); |
2322 | closure->modes++; |
2344 | closure->modes++; |
2323 | closure->preferred = 0; |
2345 | closure->preferred = 0; |
2324 | } |
2346 | } |
2325 | } |
2347 | } |
2326 | 2348 | ||
2327 | /* |
2349 | /* |
2328 | * add_detailed_modes - Add modes from detailed timings |
2350 | * add_detailed_modes - Add modes from detailed timings |
2329 | * @connector: attached connector |
2351 | * @connector: attached connector |
2330 | * @edid: EDID block to scan |
2352 | * @edid: EDID block to scan |
2331 | * @quirks: quirks to apply |
2353 | * @quirks: quirks to apply |
2332 | */ |
2354 | */ |
2333 | static int |
2355 | static int |
2334 | add_detailed_modes(struct drm_connector *connector, struct edid *edid, |
2356 | add_detailed_modes(struct drm_connector *connector, struct edid *edid, |
2335 | u32 quirks) |
2357 | u32 quirks) |
2336 | { |
2358 | { |
2337 | struct detailed_mode_closure closure = { |
2359 | struct detailed_mode_closure closure = { |
2338 | connector, |
2360 | connector, |
2339 | edid, |
2361 | edid, |
2340 | 1, |
2362 | 1, |
2341 | quirks, |
2363 | quirks, |
2342 | 0 |
2364 | 0 |
2343 | }; |
2365 | }; |
2344 | 2366 | ||
2345 | if (closure.preferred && !version_greater(edid, 1, 3)) |
2367 | if (closure.preferred && !version_greater(edid, 1, 3)) |
2346 | closure.preferred = |
2368 | closure.preferred = |
2347 | (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING); |
2369 | (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING); |
2348 | 2370 | ||
2349 | drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure); |
2371 | drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure); |
2350 | 2372 | ||
2351 | return closure.modes; |
2373 | return closure.modes; |
2352 | } |
2374 | } |
2353 | 2375 | ||
2354 | #define AUDIO_BLOCK 0x01 |
2376 | #define AUDIO_BLOCK 0x01 |
2355 | #define VIDEO_BLOCK 0x02 |
2377 | #define VIDEO_BLOCK 0x02 |
2356 | #define VENDOR_BLOCK 0x03 |
2378 | #define VENDOR_BLOCK 0x03 |
2357 | #define SPEAKER_BLOCK 0x04 |
2379 | #define SPEAKER_BLOCK 0x04 |
2358 | #define VIDEO_CAPABILITY_BLOCK 0x07 |
2380 | #define VIDEO_CAPABILITY_BLOCK 0x07 |
2359 | #define EDID_BASIC_AUDIO (1 << 6) |
2381 | #define EDID_BASIC_AUDIO (1 << 6) |
2360 | #define EDID_CEA_YCRCB444 (1 << 5) |
2382 | #define EDID_CEA_YCRCB444 (1 << 5) |
2361 | #define EDID_CEA_YCRCB422 (1 << 4) |
2383 | #define EDID_CEA_YCRCB422 (1 << 4) |
2362 | #define EDID_CEA_VCDB_QS (1 << 6) |
2384 | #define EDID_CEA_VCDB_QS (1 << 6) |
2363 | 2385 | ||
2364 | /* |
2386 | /* |
2365 | * Search EDID for CEA extension block. |
2387 | * Search EDID for CEA extension block. |
2366 | */ |
2388 | */ |
2367 | static u8 *drm_find_cea_extension(struct edid *edid) |
2389 | static u8 *drm_find_cea_extension(struct edid *edid) |
2368 | { |
2390 | { |
2369 | u8 *edid_ext = NULL; |
2391 | u8 *edid_ext = NULL; |
2370 | int i; |
2392 | int i; |
2371 | 2393 | ||
2372 | /* No EDID or EDID extensions */ |
2394 | /* No EDID or EDID extensions */ |
2373 | if (edid == NULL || edid->extensions == 0) |
2395 | if (edid == NULL || edid->extensions == 0) |
2374 | return NULL; |
2396 | return NULL; |
2375 | 2397 | ||
2376 | /* Find CEA extension */ |
2398 | /* Find CEA extension */ |
2377 | for (i = 0; i < edid->extensions; i++) { |
2399 | for (i = 0; i < edid->extensions; i++) { |
2378 | edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1); |
2400 | edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1); |
2379 | if (edid_ext[0] == CEA_EXT) |
2401 | if (edid_ext[0] == CEA_EXT) |
2380 | break; |
2402 | break; |
2381 | } |
2403 | } |
2382 | 2404 | ||
2383 | if (i == edid->extensions) |
2405 | if (i == edid->extensions) |
2384 | return NULL; |
2406 | return NULL; |
2385 | 2407 | ||
2386 | return edid_ext; |
2408 | return edid_ext; |
2387 | } |
2409 | } |
2388 | 2410 | ||
2389 | /* |
2411 | /* |
2390 | * Calculate the alternate clock for the CEA mode |
2412 | * Calculate the alternate clock for the CEA mode |
2391 | * (60Hz vs. 59.94Hz etc.) |
2413 | * (60Hz vs. 59.94Hz etc.) |
2392 | */ |
2414 | */ |
2393 | static unsigned int |
2415 | static unsigned int |
2394 | cea_mode_alternate_clock(const struct drm_display_mode *cea_mode) |
2416 | cea_mode_alternate_clock(const struct drm_display_mode *cea_mode) |
2395 | { |
2417 | { |
2396 | unsigned int clock = cea_mode->clock; |
2418 | unsigned int clock = cea_mode->clock; |
2397 | 2419 | ||
2398 | if (cea_mode->vrefresh % 6 != 0) |
2420 | if (cea_mode->vrefresh % 6 != 0) |
2399 | return clock; |
2421 | return clock; |
2400 | 2422 | ||
2401 | /* |
2423 | /* |
2402 | * edid_cea_modes contains the 59.94Hz |
2424 | * edid_cea_modes contains the 59.94Hz |
2403 | * variant for 240 and 480 line modes, |
2425 | * variant for 240 and 480 line modes, |
2404 | * and the 60Hz variant otherwise. |
2426 | * and the 60Hz variant otherwise. |
2405 | */ |
2427 | */ |
2406 | if (cea_mode->vdisplay == 240 || cea_mode->vdisplay == 480) |
2428 | if (cea_mode->vdisplay == 240 || cea_mode->vdisplay == 480) |
2407 | clock = clock * 1001 / 1000; |
2429 | clock = clock * 1001 / 1000; |
2408 | else |
2430 | else |
2409 | clock = DIV_ROUND_UP(clock * 1000, 1001); |
2431 | clock = DIV_ROUND_UP(clock * 1000, 1001); |
2410 | 2432 | ||
2411 | return clock; |
2433 | return clock; |
2412 | } |
2434 | } |
2413 | 2435 | ||
2414 | /** |
2436 | /** |
2415 | * drm_match_cea_mode - look for a CEA mode matching given mode |
2437 | * drm_match_cea_mode - look for a CEA mode matching given mode |
2416 | * @to_match: display mode |
2438 | * @to_match: display mode |
2417 | * |
2439 | * |
2418 | * Returns the CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861 |
2440 | * Return: The CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861 |
2419 | * mode. |
2441 | * mode. |
2420 | */ |
2442 | */ |
2421 | u8 drm_match_cea_mode(const struct drm_display_mode *to_match) |
2443 | u8 drm_match_cea_mode(const struct drm_display_mode *to_match) |
2422 | { |
2444 | { |
2423 | u8 mode; |
2445 | u8 mode; |
2424 | 2446 | ||
2425 | if (!to_match->clock) |
2447 | if (!to_match->clock) |
2426 | return 0; |
2448 | return 0; |
2427 | 2449 | ||
2428 | for (mode = 0; mode < ARRAY_SIZE(edid_cea_modes); mode++) { |
2450 | for (mode = 0; mode < ARRAY_SIZE(edid_cea_modes); mode++) { |
2429 | const struct drm_display_mode *cea_mode = &edid_cea_modes[mode]; |
2451 | const struct drm_display_mode *cea_mode = &edid_cea_modes[mode]; |
2430 | unsigned int clock1, clock2; |
2452 | unsigned int clock1, clock2; |
2431 | 2453 | ||
2432 | /* Check both 60Hz and 59.94Hz */ |
2454 | /* Check both 60Hz and 59.94Hz */ |
2433 | clock1 = cea_mode->clock; |
2455 | clock1 = cea_mode->clock; |
2434 | clock2 = cea_mode_alternate_clock(cea_mode); |
2456 | clock2 = cea_mode_alternate_clock(cea_mode); |
2435 | 2457 | ||
2436 | if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) || |
2458 | if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) || |
2437 | KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) && |
2459 | KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) && |
2438 | drm_mode_equal_no_clocks_no_stereo(to_match, cea_mode)) |
2460 | drm_mode_equal_no_clocks_no_stereo(to_match, cea_mode)) |
2439 | return mode + 1; |
2461 | return mode + 1; |
2440 | } |
2462 | } |
2441 | return 0; |
2463 | return 0; |
2442 | } |
2464 | } |
2443 | EXPORT_SYMBOL(drm_match_cea_mode); |
2465 | EXPORT_SYMBOL(drm_match_cea_mode); |
- | 2466 | ||
- | 2467 | /** |
|
- | 2468 | * drm_get_cea_aspect_ratio - get the picture aspect ratio corresponding to |
|
- | 2469 | * the input VIC from the CEA mode list |
|
- | 2470 | * @video_code: ID given to each of the CEA modes |
|
- | 2471 | * |
|
- | 2472 | * Returns picture aspect ratio |
|
- | 2473 | */ |
|
- | 2474 | enum hdmi_picture_aspect drm_get_cea_aspect_ratio(const u8 video_code) |
|
- | 2475 | { |
|
- | 2476 | /* return picture aspect ratio for video_code - 1 to access the |
|
- | 2477 | * right array element |
|
- | 2478 | */ |
|
- | 2479 | return edid_cea_modes[video_code-1].picture_aspect_ratio; |
|
- | 2480 | } |
|
- | 2481 | EXPORT_SYMBOL(drm_get_cea_aspect_ratio); |
|
2444 | 2482 | ||
2445 | /* |
2483 | /* |
2446 | * Calculate the alternate clock for HDMI modes (those from the HDMI vendor |
2484 | * Calculate the alternate clock for HDMI modes (those from the HDMI vendor |
2447 | * specific block). |
2485 | * specific block). |
2448 | * |
2486 | * |
2449 | * It's almost like cea_mode_alternate_clock(), we just need to add an |
2487 | * It's almost like cea_mode_alternate_clock(), we just need to add an |
2450 | * exception for the VIC 4 mode (4096x2160@24Hz): no alternate clock for this |
2488 | * exception for the VIC 4 mode (4096x2160@24Hz): no alternate clock for this |
2451 | * one. |
2489 | * one. |
2452 | */ |
2490 | */ |
2453 | static unsigned int |
2491 | static unsigned int |
2454 | hdmi_mode_alternate_clock(const struct drm_display_mode *hdmi_mode) |
2492 | hdmi_mode_alternate_clock(const struct drm_display_mode *hdmi_mode) |
2455 | { |
2493 | { |
2456 | if (hdmi_mode->vdisplay == 4096 && hdmi_mode->hdisplay == 2160) |
2494 | if (hdmi_mode->vdisplay == 4096 && hdmi_mode->hdisplay == 2160) |
2457 | return hdmi_mode->clock; |
2495 | return hdmi_mode->clock; |
2458 | 2496 | ||
2459 | return cea_mode_alternate_clock(hdmi_mode); |
2497 | return cea_mode_alternate_clock(hdmi_mode); |
2460 | } |
2498 | } |
2461 | 2499 | ||
2462 | /* |
2500 | /* |
2463 | * drm_match_hdmi_mode - look for a HDMI mode matching given mode |
2501 | * drm_match_hdmi_mode - look for a HDMI mode matching given mode |
2464 | * @to_match: display mode |
2502 | * @to_match: display mode |
2465 | * |
2503 | * |
2466 | * An HDMI mode is one defined in the HDMI vendor specific block. |
2504 | * An HDMI mode is one defined in the HDMI vendor specific block. |
2467 | * |
2505 | * |
2468 | * Returns the HDMI Video ID (VIC) of the mode or 0 if it isn't one. |
2506 | * Returns the HDMI Video ID (VIC) of the mode or 0 if it isn't one. |
2469 | */ |
2507 | */ |
2470 | static u8 drm_match_hdmi_mode(const struct drm_display_mode *to_match) |
2508 | static u8 drm_match_hdmi_mode(const struct drm_display_mode *to_match) |
2471 | { |
2509 | { |
2472 | u8 mode; |
2510 | u8 mode; |
2473 | 2511 | ||
2474 | if (!to_match->clock) |
2512 | if (!to_match->clock) |
2475 | return 0; |
2513 | return 0; |
2476 | 2514 | ||
2477 | for (mode = 0; mode < ARRAY_SIZE(edid_4k_modes); mode++) { |
2515 | for (mode = 0; mode < ARRAY_SIZE(edid_4k_modes); mode++) { |
2478 | const struct drm_display_mode *hdmi_mode = &edid_4k_modes[mode]; |
2516 | const struct drm_display_mode *hdmi_mode = &edid_4k_modes[mode]; |
2479 | unsigned int clock1, clock2; |
2517 | unsigned int clock1, clock2; |
2480 | 2518 | ||
2481 | /* Make sure to also match alternate clocks */ |
2519 | /* Make sure to also match alternate clocks */ |
2482 | clock1 = hdmi_mode->clock; |
2520 | clock1 = hdmi_mode->clock; |
2483 | clock2 = hdmi_mode_alternate_clock(hdmi_mode); |
2521 | clock2 = hdmi_mode_alternate_clock(hdmi_mode); |
2484 | 2522 | ||
2485 | if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) || |
2523 | if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) || |
2486 | KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) && |
2524 | KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) && |
2487 | drm_mode_equal_no_clocks_no_stereo(to_match, hdmi_mode)) |
2525 | drm_mode_equal_no_clocks_no_stereo(to_match, hdmi_mode)) |
2488 | return mode + 1; |
2526 | return mode + 1; |
2489 | } |
2527 | } |
2490 | return 0; |
2528 | return 0; |
2491 | } |
2529 | } |
2492 | 2530 | ||
2493 | static int |
2531 | static int |
2494 | add_alternate_cea_modes(struct drm_connector *connector, struct edid *edid) |
2532 | add_alternate_cea_modes(struct drm_connector *connector, struct edid *edid) |
2495 | { |
2533 | { |
2496 | struct drm_device *dev = connector->dev; |
2534 | struct drm_device *dev = connector->dev; |
2497 | struct drm_display_mode *mode, *tmp; |
2535 | struct drm_display_mode *mode, *tmp; |
2498 | LIST_HEAD(list); |
2536 | LIST_HEAD(list); |
2499 | int modes = 0; |
2537 | int modes = 0; |
2500 | 2538 | ||
2501 | /* Don't add CEA modes if the CEA extension block is missing */ |
2539 | /* Don't add CEA modes if the CEA extension block is missing */ |
2502 | if (!drm_find_cea_extension(edid)) |
2540 | if (!drm_find_cea_extension(edid)) |
2503 | return 0; |
2541 | return 0; |
2504 | 2542 | ||
2505 | /* |
2543 | /* |
2506 | * Go through all probed modes and create a new mode |
2544 | * Go through all probed modes and create a new mode |
2507 | * with the alternate clock for certain CEA modes. |
2545 | * with the alternate clock for certain CEA modes. |
2508 | */ |
2546 | */ |
2509 | list_for_each_entry(mode, &connector->probed_modes, head) { |
2547 | list_for_each_entry(mode, &connector->probed_modes, head) { |
2510 | const struct drm_display_mode *cea_mode = NULL; |
2548 | const struct drm_display_mode *cea_mode = NULL; |
2511 | struct drm_display_mode *newmode; |
2549 | struct drm_display_mode *newmode; |
2512 | u8 mode_idx = drm_match_cea_mode(mode) - 1; |
2550 | u8 mode_idx = drm_match_cea_mode(mode) - 1; |
2513 | unsigned int clock1, clock2; |
2551 | unsigned int clock1, clock2; |
2514 | 2552 | ||
2515 | if (mode_idx < ARRAY_SIZE(edid_cea_modes)) { |
2553 | if (mode_idx < ARRAY_SIZE(edid_cea_modes)) { |
2516 | cea_mode = &edid_cea_modes[mode_idx]; |
2554 | cea_mode = &edid_cea_modes[mode_idx]; |
2517 | clock2 = cea_mode_alternate_clock(cea_mode); |
2555 | clock2 = cea_mode_alternate_clock(cea_mode); |
2518 | } else { |
2556 | } else { |
2519 | mode_idx = drm_match_hdmi_mode(mode) - 1; |
2557 | mode_idx = drm_match_hdmi_mode(mode) - 1; |
2520 | if (mode_idx < ARRAY_SIZE(edid_4k_modes)) { |
2558 | if (mode_idx < ARRAY_SIZE(edid_4k_modes)) { |
2521 | cea_mode = &edid_4k_modes[mode_idx]; |
2559 | cea_mode = &edid_4k_modes[mode_idx]; |
2522 | clock2 = hdmi_mode_alternate_clock(cea_mode); |
2560 | clock2 = hdmi_mode_alternate_clock(cea_mode); |
2523 | } |
2561 | } |
2524 | } |
2562 | } |
2525 | 2563 | ||
2526 | if (!cea_mode) |
2564 | if (!cea_mode) |
2527 | continue; |
2565 | continue; |
2528 | 2566 | ||
2529 | clock1 = cea_mode->clock; |
2567 | clock1 = cea_mode->clock; |
2530 | 2568 | ||
2531 | if (clock1 == clock2) |
2569 | if (clock1 == clock2) |
2532 | continue; |
2570 | continue; |
2533 | 2571 | ||
2534 | if (mode->clock != clock1 && mode->clock != clock2) |
2572 | if (mode->clock != clock1 && mode->clock != clock2) |
2535 | continue; |
2573 | continue; |
2536 | 2574 | ||
2537 | newmode = drm_mode_duplicate(dev, cea_mode); |
2575 | newmode = drm_mode_duplicate(dev, cea_mode); |
2538 | if (!newmode) |
2576 | if (!newmode) |
2539 | continue; |
2577 | continue; |
2540 | 2578 | ||
2541 | /* Carry over the stereo flags */ |
2579 | /* Carry over the stereo flags */ |
2542 | newmode->flags |= mode->flags & DRM_MODE_FLAG_3D_MASK; |
2580 | newmode->flags |= mode->flags & DRM_MODE_FLAG_3D_MASK; |
2543 | 2581 | ||
2544 | /* |
2582 | /* |
2545 | * The current mode could be either variant. Make |
2583 | * The current mode could be either variant. Make |
2546 | * sure to pick the "other" clock for the new mode. |
2584 | * sure to pick the "other" clock for the new mode. |
2547 | */ |
2585 | */ |
2548 | if (mode->clock != clock1) |
2586 | if (mode->clock != clock1) |
2549 | newmode->clock = clock1; |
2587 | newmode->clock = clock1; |
2550 | else |
2588 | else |
2551 | newmode->clock = clock2; |
2589 | newmode->clock = clock2; |
2552 | 2590 | ||
2553 | list_add_tail(&newmode->head, &list); |
2591 | list_add_tail(&newmode->head, &list); |
2554 | } |
2592 | } |
2555 | 2593 | ||
2556 | list_for_each_entry_safe(mode, tmp, &list, head) { |
2594 | list_for_each_entry_safe(mode, tmp, &list, head) { |
2557 | list_del(&mode->head); |
2595 | list_del(&mode->head); |
2558 | drm_mode_probed_add(connector, mode); |
2596 | drm_mode_probed_add(connector, mode); |
2559 | modes++; |
2597 | modes++; |
2560 | } |
2598 | } |
2561 | 2599 | ||
2562 | return modes; |
2600 | return modes; |
2563 | } |
2601 | } |
2564 | 2602 | ||
2565 | static struct drm_display_mode * |
2603 | static struct drm_display_mode * |
2566 | drm_display_mode_from_vic_index(struct drm_connector *connector, |
2604 | drm_display_mode_from_vic_index(struct drm_connector *connector, |
2567 | const u8 *video_db, u8 video_len, |
2605 | const u8 *video_db, u8 video_len, |
2568 | u8 video_index) |
2606 | u8 video_index) |
2569 | { |
2607 | { |
2570 | struct drm_device *dev = connector->dev; |
2608 | struct drm_device *dev = connector->dev; |
2571 | struct drm_display_mode *newmode; |
2609 | struct drm_display_mode *newmode; |
2572 | u8 cea_mode; |
2610 | u8 cea_mode; |
2573 | 2611 | ||
2574 | if (video_db == NULL || video_index >= video_len) |
2612 | if (video_db == NULL || video_index >= video_len) |
2575 | return NULL; |
2613 | return NULL; |
2576 | 2614 | ||
2577 | /* CEA modes are numbered 1..127 */ |
2615 | /* CEA modes are numbered 1..127 */ |
2578 | cea_mode = (video_db[video_index] & 127) - 1; |
2616 | cea_mode = (video_db[video_index] & 127) - 1; |
2579 | if (cea_mode >= ARRAY_SIZE(edid_cea_modes)) |
2617 | if (cea_mode >= ARRAY_SIZE(edid_cea_modes)) |
2580 | return NULL; |
2618 | return NULL; |
2581 | 2619 | ||
2582 | newmode = drm_mode_duplicate(dev, &edid_cea_modes[cea_mode]); |
2620 | newmode = drm_mode_duplicate(dev, &edid_cea_modes[cea_mode]); |
- | 2621 | if (!newmode) |
|
- | 2622 | return NULL; |
|
- | 2623 | ||
2583 | newmode->vrefresh = 0; |
2624 | newmode->vrefresh = 0; |
2584 | 2625 | ||
2585 | return newmode; |
2626 | return newmode; |
2586 | } |
2627 | } |
2587 | 2628 | ||
2588 | static int |
2629 | static int |
2589 | do_cea_modes(struct drm_connector *connector, const u8 *db, u8 len) |
2630 | do_cea_modes(struct drm_connector *connector, const u8 *db, u8 len) |
2590 | { |
2631 | { |
2591 | int i, modes = 0; |
2632 | int i, modes = 0; |
2592 | 2633 | ||
2593 | for (i = 0; i < len; i++) { |
2634 | for (i = 0; i < len; i++) { |
2594 | struct drm_display_mode *mode; |
2635 | struct drm_display_mode *mode; |
2595 | mode = drm_display_mode_from_vic_index(connector, db, len, i); |
2636 | mode = drm_display_mode_from_vic_index(connector, db, len, i); |
2596 | if (mode) { |
2637 | if (mode) { |
2597 | drm_mode_probed_add(connector, mode); |
2638 | drm_mode_probed_add(connector, mode); |
2598 | modes++; |
2639 | modes++; |
2599 | } |
2640 | } |
2600 | } |
2641 | } |
2601 | 2642 | ||
2602 | return modes; |
2643 | return modes; |
2603 | } |
2644 | } |
2604 | 2645 | ||
2605 | struct stereo_mandatory_mode { |
2646 | struct stereo_mandatory_mode { |
2606 | int width, height, vrefresh; |
2647 | int width, height, vrefresh; |
2607 | unsigned int flags; |
2648 | unsigned int flags; |
2608 | }; |
2649 | }; |
2609 | 2650 | ||
2610 | static const struct stereo_mandatory_mode stereo_mandatory_modes[] = { |
2651 | static const struct stereo_mandatory_mode stereo_mandatory_modes[] = { |
2611 | { 1920, 1080, 24, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM }, |
2652 | { 1920, 1080, 24, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM }, |
2612 | { 1920, 1080, 24, DRM_MODE_FLAG_3D_FRAME_PACKING }, |
2653 | { 1920, 1080, 24, DRM_MODE_FLAG_3D_FRAME_PACKING }, |
2613 | { 1920, 1080, 50, |
2654 | { 1920, 1080, 50, |
2614 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF }, |
2655 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF }, |
2615 | { 1920, 1080, 60, |
2656 | { 1920, 1080, 60, |
2616 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF }, |
2657 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF }, |
2617 | { 1280, 720, 50, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM }, |
2658 | { 1280, 720, 50, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM }, |
2618 | { 1280, 720, 50, DRM_MODE_FLAG_3D_FRAME_PACKING }, |
2659 | { 1280, 720, 50, DRM_MODE_FLAG_3D_FRAME_PACKING }, |
2619 | { 1280, 720, 60, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM }, |
2660 | { 1280, 720, 60, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM }, |
2620 | { 1280, 720, 60, DRM_MODE_FLAG_3D_FRAME_PACKING } |
2661 | { 1280, 720, 60, DRM_MODE_FLAG_3D_FRAME_PACKING } |
2621 | }; |
2662 | }; |
2622 | 2663 | ||
2623 | static bool |
2664 | static bool |
2624 | stereo_match_mandatory(const struct drm_display_mode *mode, |
2665 | stereo_match_mandatory(const struct drm_display_mode *mode, |
2625 | const struct stereo_mandatory_mode *stereo_mode) |
2666 | const struct stereo_mandatory_mode *stereo_mode) |
2626 | { |
2667 | { |
2627 | unsigned int interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE; |
2668 | unsigned int interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE; |
2628 | 2669 | ||
2629 | return mode->hdisplay == stereo_mode->width && |
2670 | return mode->hdisplay == stereo_mode->width && |
2630 | mode->vdisplay == stereo_mode->height && |
2671 | mode->vdisplay == stereo_mode->height && |
2631 | interlaced == (stereo_mode->flags & DRM_MODE_FLAG_INTERLACE) && |
2672 | interlaced == (stereo_mode->flags & DRM_MODE_FLAG_INTERLACE) && |
2632 | drm_mode_vrefresh(mode) == stereo_mode->vrefresh; |
2673 | drm_mode_vrefresh(mode) == stereo_mode->vrefresh; |
2633 | } |
2674 | } |
2634 | 2675 | ||
2635 | static int add_hdmi_mandatory_stereo_modes(struct drm_connector *connector) |
2676 | static int add_hdmi_mandatory_stereo_modes(struct drm_connector *connector) |
2636 | { |
2677 | { |
2637 | struct drm_device *dev = connector->dev; |
2678 | struct drm_device *dev = connector->dev; |
2638 | const struct drm_display_mode *mode; |
2679 | const struct drm_display_mode *mode; |
2639 | struct list_head stereo_modes; |
2680 | struct list_head stereo_modes; |
2640 | int modes = 0, i; |
2681 | int modes = 0, i; |
2641 | 2682 | ||
2642 | INIT_LIST_HEAD(&stereo_modes); |
2683 | INIT_LIST_HEAD(&stereo_modes); |
2643 | 2684 | ||
2644 | list_for_each_entry(mode, &connector->probed_modes, head) { |
2685 | list_for_each_entry(mode, &connector->probed_modes, head) { |
2645 | for (i = 0; i < ARRAY_SIZE(stereo_mandatory_modes); i++) { |
2686 | for (i = 0; i < ARRAY_SIZE(stereo_mandatory_modes); i++) { |
2646 | const struct stereo_mandatory_mode *mandatory; |
2687 | const struct stereo_mandatory_mode *mandatory; |
2647 | struct drm_display_mode *new_mode; |
2688 | struct drm_display_mode *new_mode; |
2648 | 2689 | ||
2649 | if (!stereo_match_mandatory(mode, |
2690 | if (!stereo_match_mandatory(mode, |
2650 | &stereo_mandatory_modes[i])) |
2691 | &stereo_mandatory_modes[i])) |
2651 | continue; |
2692 | continue; |
2652 | 2693 | ||
2653 | mandatory = &stereo_mandatory_modes[i]; |
2694 | mandatory = &stereo_mandatory_modes[i]; |
2654 | new_mode = drm_mode_duplicate(dev, mode); |
2695 | new_mode = drm_mode_duplicate(dev, mode); |
2655 | if (!new_mode) |
2696 | if (!new_mode) |
2656 | continue; |
2697 | continue; |
2657 | 2698 | ||
2658 | new_mode->flags |= mandatory->flags; |
2699 | new_mode->flags |= mandatory->flags; |
2659 | list_add_tail(&new_mode->head, &stereo_modes); |
2700 | list_add_tail(&new_mode->head, &stereo_modes); |
2660 | modes++; |
2701 | modes++; |
2661 | } |
2702 | } |
2662 | } |
2703 | } |
2663 | 2704 | ||
2664 | list_splice_tail(&stereo_modes, &connector->probed_modes); |
2705 | list_splice_tail(&stereo_modes, &connector->probed_modes); |
2665 | 2706 | ||
2666 | return modes; |
2707 | return modes; |
2667 | } |
2708 | } |
2668 | 2709 | ||
2669 | static int add_hdmi_mode(struct drm_connector *connector, u8 vic) |
2710 | static int add_hdmi_mode(struct drm_connector *connector, u8 vic) |
2670 | { |
2711 | { |
2671 | struct drm_device *dev = connector->dev; |
2712 | struct drm_device *dev = connector->dev; |
2672 | struct drm_display_mode *newmode; |
2713 | struct drm_display_mode *newmode; |
2673 | 2714 | ||
2674 | vic--; /* VICs start at 1 */ |
2715 | vic--; /* VICs start at 1 */ |
2675 | if (vic >= ARRAY_SIZE(edid_4k_modes)) { |
2716 | if (vic >= ARRAY_SIZE(edid_4k_modes)) { |
2676 | DRM_ERROR("Unknown HDMI VIC: %d\n", vic); |
2717 | DRM_ERROR("Unknown HDMI VIC: %d\n", vic); |
2677 | return 0; |
2718 | return 0; |
2678 | } |
2719 | } |
2679 | 2720 | ||
2680 | newmode = drm_mode_duplicate(dev, &edid_4k_modes[vic]); |
2721 | newmode = drm_mode_duplicate(dev, &edid_4k_modes[vic]); |
2681 | if (!newmode) |
2722 | if (!newmode) |
2682 | return 0; |
2723 | return 0; |
2683 | 2724 | ||
2684 | drm_mode_probed_add(connector, newmode); |
2725 | drm_mode_probed_add(connector, newmode); |
2685 | 2726 | ||
2686 | return 1; |
2727 | return 1; |
2687 | } |
2728 | } |
2688 | 2729 | ||
2689 | static int add_3d_struct_modes(struct drm_connector *connector, u16 structure, |
2730 | static int add_3d_struct_modes(struct drm_connector *connector, u16 structure, |
2690 | const u8 *video_db, u8 video_len, u8 video_index) |
2731 | const u8 *video_db, u8 video_len, u8 video_index) |
2691 | { |
2732 | { |
2692 | struct drm_display_mode *newmode; |
2733 | struct drm_display_mode *newmode; |
2693 | int modes = 0; |
2734 | int modes = 0; |
2694 | 2735 | ||
2695 | if (structure & (1 << 0)) { |
2736 | if (structure & (1 << 0)) { |
2696 | newmode = drm_display_mode_from_vic_index(connector, video_db, |
2737 | newmode = drm_display_mode_from_vic_index(connector, video_db, |
2697 | video_len, |
2738 | video_len, |
2698 | video_index); |
2739 | video_index); |
2699 | if (newmode) { |
2740 | if (newmode) { |
2700 | newmode->flags |= DRM_MODE_FLAG_3D_FRAME_PACKING; |
2741 | newmode->flags |= DRM_MODE_FLAG_3D_FRAME_PACKING; |
2701 | drm_mode_probed_add(connector, newmode); |
2742 | drm_mode_probed_add(connector, newmode); |
2702 | modes++; |
2743 | modes++; |
2703 | } |
2744 | } |
2704 | } |
2745 | } |
2705 | if (structure & (1 << 6)) { |
2746 | if (structure & (1 << 6)) { |
2706 | newmode = drm_display_mode_from_vic_index(connector, video_db, |
2747 | newmode = drm_display_mode_from_vic_index(connector, video_db, |
2707 | video_len, |
2748 | video_len, |
2708 | video_index); |
2749 | video_index); |
2709 | if (newmode) { |
2750 | if (newmode) { |
2710 | newmode->flags |= DRM_MODE_FLAG_3D_TOP_AND_BOTTOM; |
2751 | newmode->flags |= DRM_MODE_FLAG_3D_TOP_AND_BOTTOM; |
2711 | drm_mode_probed_add(connector, newmode); |
2752 | drm_mode_probed_add(connector, newmode); |
2712 | modes++; |
2753 | modes++; |
2713 | } |
2754 | } |
2714 | } |
2755 | } |
2715 | if (structure & (1 << 8)) { |
2756 | if (structure & (1 << 8)) { |
2716 | newmode = drm_display_mode_from_vic_index(connector, video_db, |
2757 | newmode = drm_display_mode_from_vic_index(connector, video_db, |
2717 | video_len, |
2758 | video_len, |
2718 | video_index); |
2759 | video_index); |
2719 | if (newmode) { |
2760 | if (newmode) { |
2720 | newmode->flags |= DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF; |
2761 | newmode->flags |= DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF; |
2721 | drm_mode_probed_add(connector, newmode); |
2762 | drm_mode_probed_add(connector, newmode); |
2722 | modes++; |
2763 | modes++; |
2723 | } |
2764 | } |
2724 | } |
2765 | } |
2725 | 2766 | ||
2726 | return modes; |
2767 | return modes; |
2727 | } |
2768 | } |
2728 | 2769 | ||
2729 | /* |
2770 | /* |
2730 | * do_hdmi_vsdb_modes - Parse the HDMI Vendor Specific data block |
2771 | * do_hdmi_vsdb_modes - Parse the HDMI Vendor Specific data block |
2731 | * @connector: connector corresponding to the HDMI sink |
2772 | * @connector: connector corresponding to the HDMI sink |
2732 | * @db: start of the CEA vendor specific block |
2773 | * @db: start of the CEA vendor specific block |
2733 | * @len: length of the CEA block payload, ie. one can access up to db[len] |
2774 | * @len: length of the CEA block payload, ie. one can access up to db[len] |
2734 | * |
2775 | * |
2735 | * Parses the HDMI VSDB looking for modes to add to @connector. This function |
2776 | * Parses the HDMI VSDB looking for modes to add to @connector. This function |
2736 | * also adds the stereo 3d modes when applicable. |
2777 | * also adds the stereo 3d modes when applicable. |
2737 | */ |
2778 | */ |
2738 | static int |
2779 | static int |
2739 | do_hdmi_vsdb_modes(struct drm_connector *connector, const u8 *db, u8 len, |
2780 | do_hdmi_vsdb_modes(struct drm_connector *connector, const u8 *db, u8 len, |
2740 | const u8 *video_db, u8 video_len) |
2781 | const u8 *video_db, u8 video_len) |
2741 | { |
2782 | { |
2742 | int modes = 0, offset = 0, i, multi_present = 0, multi_len; |
2783 | int modes = 0, offset = 0, i, multi_present = 0, multi_len; |
2743 | u8 vic_len, hdmi_3d_len = 0; |
2784 | u8 vic_len, hdmi_3d_len = 0; |
2744 | u16 mask; |
2785 | u16 mask; |
2745 | u16 structure_all; |
2786 | u16 structure_all; |
2746 | 2787 | ||
2747 | if (len < 8) |
2788 | if (len < 8) |
2748 | goto out; |
2789 | goto out; |
2749 | 2790 | ||
2750 | /* no HDMI_Video_Present */ |
2791 | /* no HDMI_Video_Present */ |
2751 | if (!(db[8] & (1 << 5))) |
2792 | if (!(db[8] & (1 << 5))) |
2752 | goto out; |
2793 | goto out; |
2753 | 2794 | ||
2754 | /* Latency_Fields_Present */ |
2795 | /* Latency_Fields_Present */ |
2755 | if (db[8] & (1 << 7)) |
2796 | if (db[8] & (1 << 7)) |
2756 | offset += 2; |
2797 | offset += 2; |
2757 | 2798 | ||
2758 | /* I_Latency_Fields_Present */ |
2799 | /* I_Latency_Fields_Present */ |
2759 | if (db[8] & (1 << 6)) |
2800 | if (db[8] & (1 << 6)) |
2760 | offset += 2; |
2801 | offset += 2; |
2761 | 2802 | ||
2762 | /* the declared length is not long enough for the 2 first bytes |
2803 | /* the declared length is not long enough for the 2 first bytes |
2763 | * of additional video format capabilities */ |
2804 | * of additional video format capabilities */ |
2764 | if (len < (8 + offset + 2)) |
2805 | if (len < (8 + offset + 2)) |
2765 | goto out; |
2806 | goto out; |
2766 | 2807 | ||
2767 | /* 3D_Present */ |
2808 | /* 3D_Present */ |
2768 | offset++; |
2809 | offset++; |
2769 | if (db[8 + offset] & (1 << 7)) { |
2810 | if (db[8 + offset] & (1 << 7)) { |
2770 | modes += add_hdmi_mandatory_stereo_modes(connector); |
2811 | modes += add_hdmi_mandatory_stereo_modes(connector); |
2771 | 2812 | ||
2772 | /* 3D_Multi_present */ |
2813 | /* 3D_Multi_present */ |
2773 | multi_present = (db[8 + offset] & 0x60) >> 5; |
2814 | multi_present = (db[8 + offset] & 0x60) >> 5; |
2774 | } |
2815 | } |
2775 | 2816 | ||
2776 | offset++; |
2817 | offset++; |
2777 | vic_len = db[8 + offset] >> 5; |
2818 | vic_len = db[8 + offset] >> 5; |
2778 | hdmi_3d_len = db[8 + offset] & 0x1f; |
2819 | hdmi_3d_len = db[8 + offset] & 0x1f; |
2779 | 2820 | ||
2780 | for (i = 0; i < vic_len && len >= (9 + offset + i); i++) { |
2821 | for (i = 0; i < vic_len && len >= (9 + offset + i); i++) { |
2781 | u8 vic; |
2822 | u8 vic; |
2782 | 2823 | ||
2783 | vic = db[9 + offset + i]; |
2824 | vic = db[9 + offset + i]; |
2784 | modes += add_hdmi_mode(connector, vic); |
2825 | modes += add_hdmi_mode(connector, vic); |
2785 | } |
2826 | } |
2786 | offset += 1 + vic_len; |
2827 | offset += 1 + vic_len; |
2787 | 2828 | ||
2788 | if (multi_present == 1) |
2829 | if (multi_present == 1) |
2789 | multi_len = 2; |
2830 | multi_len = 2; |
2790 | else if (multi_present == 2) |
2831 | else if (multi_present == 2) |
2791 | multi_len = 4; |
2832 | multi_len = 4; |
2792 | else |
2833 | else |
2793 | multi_len = 0; |
2834 | multi_len = 0; |
2794 | 2835 | ||
2795 | if (len < (8 + offset + hdmi_3d_len - 1)) |
2836 | if (len < (8 + offset + hdmi_3d_len - 1)) |
2796 | goto out; |
2837 | goto out; |
2797 | 2838 | ||
2798 | if (hdmi_3d_len < multi_len) |
2839 | if (hdmi_3d_len < multi_len) |
2799 | goto out; |
2840 | goto out; |
2800 | 2841 | ||
2801 | if (multi_present == 1 || multi_present == 2) { |
2842 | if (multi_present == 1 || multi_present == 2) { |
2802 | /* 3D_Structure_ALL */ |
2843 | /* 3D_Structure_ALL */ |
2803 | structure_all = (db[8 + offset] << 8) | db[9 + offset]; |
2844 | structure_all = (db[8 + offset] << 8) | db[9 + offset]; |
2804 | 2845 | ||
2805 | /* check if 3D_MASK is present */ |
2846 | /* check if 3D_MASK is present */ |
2806 | if (multi_present == 2) |
2847 | if (multi_present == 2) |
2807 | mask = (db[10 + offset] << 8) | db[11 + offset]; |
2848 | mask = (db[10 + offset] << 8) | db[11 + offset]; |
2808 | else |
2849 | else |
2809 | mask = 0xffff; |
2850 | mask = 0xffff; |
2810 | 2851 | ||
2811 | for (i = 0; i < 16; i++) { |
2852 | for (i = 0; i < 16; i++) { |
2812 | if (mask & (1 << i)) |
2853 | if (mask & (1 << i)) |
2813 | modes += add_3d_struct_modes(connector, |
2854 | modes += add_3d_struct_modes(connector, |
2814 | structure_all, |
2855 | structure_all, |
2815 | video_db, |
2856 | video_db, |
2816 | video_len, i); |
2857 | video_len, i); |
2817 | } |
2858 | } |
2818 | } |
2859 | } |
2819 | 2860 | ||
2820 | offset += multi_len; |
2861 | offset += multi_len; |
2821 | 2862 | ||
2822 | for (i = 0; i < (hdmi_3d_len - multi_len); i++) { |
2863 | for (i = 0; i < (hdmi_3d_len - multi_len); i++) { |
2823 | int vic_index; |
2864 | int vic_index; |
2824 | struct drm_display_mode *newmode = NULL; |
2865 | struct drm_display_mode *newmode = NULL; |
2825 | unsigned int newflag = 0; |
2866 | unsigned int newflag = 0; |
2826 | bool detail_present; |
2867 | bool detail_present; |
2827 | 2868 | ||
2828 | detail_present = ((db[8 + offset + i] & 0x0f) > 7); |
2869 | detail_present = ((db[8 + offset + i] & 0x0f) > 7); |
2829 | 2870 | ||
2830 | if (detail_present && (i + 1 == hdmi_3d_len - multi_len)) |
2871 | if (detail_present && (i + 1 == hdmi_3d_len - multi_len)) |
2831 | break; |
2872 | break; |
2832 | 2873 | ||
2833 | /* 2D_VIC_order_X */ |
2874 | /* 2D_VIC_order_X */ |
2834 | vic_index = db[8 + offset + i] >> 4; |
2875 | vic_index = db[8 + offset + i] >> 4; |
2835 | 2876 | ||
2836 | /* 3D_Structure_X */ |
2877 | /* 3D_Structure_X */ |
2837 | switch (db[8 + offset + i] & 0x0f) { |
2878 | switch (db[8 + offset + i] & 0x0f) { |
2838 | case 0: |
2879 | case 0: |
2839 | newflag = DRM_MODE_FLAG_3D_FRAME_PACKING; |
2880 | newflag = DRM_MODE_FLAG_3D_FRAME_PACKING; |
2840 | break; |
2881 | break; |
2841 | case 6: |
2882 | case 6: |
2842 | newflag = DRM_MODE_FLAG_3D_TOP_AND_BOTTOM; |
2883 | newflag = DRM_MODE_FLAG_3D_TOP_AND_BOTTOM; |
2843 | break; |
2884 | break; |
2844 | case 8: |
2885 | case 8: |
2845 | /* 3D_Detail_X */ |
2886 | /* 3D_Detail_X */ |
2846 | if ((db[9 + offset + i] >> 4) == 1) |
2887 | if ((db[9 + offset + i] >> 4) == 1) |
2847 | newflag = DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF; |
2888 | newflag = DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF; |
2848 | break; |
2889 | break; |
2849 | } |
2890 | } |
2850 | 2891 | ||
2851 | if (newflag != 0) { |
2892 | if (newflag != 0) { |
2852 | newmode = drm_display_mode_from_vic_index(connector, |
2893 | newmode = drm_display_mode_from_vic_index(connector, |
2853 | video_db, |
2894 | video_db, |
2854 | video_len, |
2895 | video_len, |
2855 | vic_index); |
2896 | vic_index); |
2856 | 2897 | ||
2857 | if (newmode) { |
2898 | if (newmode) { |
2858 | newmode->flags |= newflag; |
2899 | newmode->flags |= newflag; |
2859 | drm_mode_probed_add(connector, newmode); |
2900 | drm_mode_probed_add(connector, newmode); |
2860 | modes++; |
2901 | modes++; |
2861 | } |
2902 | } |
2862 | } |
2903 | } |
2863 | 2904 | ||
2864 | if (detail_present) |
2905 | if (detail_present) |
2865 | i++; |
2906 | i++; |
2866 | } |
2907 | } |
2867 | 2908 | ||
2868 | out: |
2909 | out: |
2869 | return modes; |
2910 | return modes; |
2870 | } |
2911 | } |
2871 | 2912 | ||
2872 | static int |
2913 | static int |
2873 | cea_db_payload_len(const u8 *db) |
2914 | cea_db_payload_len(const u8 *db) |
2874 | { |
2915 | { |
2875 | return db[0] & 0x1f; |
2916 | return db[0] & 0x1f; |
2876 | } |
2917 | } |
2877 | 2918 | ||
2878 | static int |
2919 | static int |
2879 | cea_db_tag(const u8 *db) |
2920 | cea_db_tag(const u8 *db) |
2880 | { |
2921 | { |
2881 | return db[0] >> 5; |
2922 | return db[0] >> 5; |
2882 | } |
2923 | } |
2883 | 2924 | ||
2884 | static int |
2925 | static int |
2885 | cea_revision(const u8 *cea) |
2926 | cea_revision(const u8 *cea) |
2886 | { |
2927 | { |
2887 | return cea[1]; |
2928 | return cea[1]; |
2888 | } |
2929 | } |
2889 | 2930 | ||
2890 | static int |
2931 | static int |
2891 | cea_db_offsets(const u8 *cea, int *start, int *end) |
2932 | cea_db_offsets(const u8 *cea, int *start, int *end) |
2892 | { |
2933 | { |
2893 | /* Data block offset in CEA extension block */ |
2934 | /* Data block offset in CEA extension block */ |
2894 | *start = 4; |
2935 | *start = 4; |
2895 | *end = cea[2]; |
2936 | *end = cea[2]; |
2896 | if (*end == 0) |
2937 | if (*end == 0) |
2897 | *end = 127; |
2938 | *end = 127; |
2898 | if (*end < 4 || *end > 127) |
2939 | if (*end < 4 || *end > 127) |
2899 | return -ERANGE; |
2940 | return -ERANGE; |
2900 | return 0; |
2941 | return 0; |
2901 | } |
2942 | } |
2902 | 2943 | ||
2903 | static bool cea_db_is_hdmi_vsdb(const u8 *db) |
2944 | static bool cea_db_is_hdmi_vsdb(const u8 *db) |
2904 | { |
2945 | { |
2905 | int hdmi_id; |
2946 | int hdmi_id; |
2906 | 2947 | ||
2907 | if (cea_db_tag(db) != VENDOR_BLOCK) |
2948 | if (cea_db_tag(db) != VENDOR_BLOCK) |
2908 | return false; |
2949 | return false; |
2909 | 2950 | ||
2910 | if (cea_db_payload_len(db) < 5) |
2951 | if (cea_db_payload_len(db) < 5) |
2911 | return false; |
2952 | return false; |
2912 | 2953 | ||
2913 | hdmi_id = db[1] | (db[2] << 8) | (db[3] << 16); |
2954 | hdmi_id = db[1] | (db[2] << 8) | (db[3] << 16); |
2914 | 2955 | ||
2915 | return hdmi_id == HDMI_IEEE_OUI; |
2956 | return hdmi_id == HDMI_IEEE_OUI; |
2916 | } |
2957 | } |
2917 | 2958 | ||
2918 | #define for_each_cea_db(cea, i, start, end) \ |
2959 | #define for_each_cea_db(cea, i, start, end) \ |
2919 | for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1) |
2960 | for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1) |
2920 | 2961 | ||
2921 | static int |
2962 | static int |
2922 | add_cea_modes(struct drm_connector *connector, struct edid *edid) |
2963 | add_cea_modes(struct drm_connector *connector, struct edid *edid) |
2923 | { |
2964 | { |
2924 | const u8 *cea = drm_find_cea_extension(edid); |
2965 | const u8 *cea = drm_find_cea_extension(edid); |
2925 | const u8 *db, *hdmi = NULL, *video = NULL; |
2966 | const u8 *db, *hdmi = NULL, *video = NULL; |
2926 | u8 dbl, hdmi_len, video_len = 0; |
2967 | u8 dbl, hdmi_len, video_len = 0; |
2927 | int modes = 0; |
2968 | int modes = 0; |
2928 | 2969 | ||
2929 | if (cea && cea_revision(cea) >= 3) { |
2970 | if (cea && cea_revision(cea) >= 3) { |
2930 | int i, start, end; |
2971 | int i, start, end; |
2931 | 2972 | ||
2932 | if (cea_db_offsets(cea, &start, &end)) |
2973 | if (cea_db_offsets(cea, &start, &end)) |
2933 | return 0; |
2974 | return 0; |
2934 | 2975 | ||
2935 | for_each_cea_db(cea, i, start, end) { |
2976 | for_each_cea_db(cea, i, start, end) { |
2936 | db = &cea[i]; |
2977 | db = &cea[i]; |
2937 | dbl = cea_db_payload_len(db); |
2978 | dbl = cea_db_payload_len(db); |
2938 | 2979 | ||
2939 | if (cea_db_tag(db) == VIDEO_BLOCK) { |
2980 | if (cea_db_tag(db) == VIDEO_BLOCK) { |
2940 | video = db + 1; |
2981 | video = db + 1; |
2941 | video_len = dbl; |
2982 | video_len = dbl; |
2942 | modes += do_cea_modes(connector, video, dbl); |
2983 | modes += do_cea_modes(connector, video, dbl); |
2943 | } |
2984 | } |
2944 | else if (cea_db_is_hdmi_vsdb(db)) { |
2985 | else if (cea_db_is_hdmi_vsdb(db)) { |
2945 | hdmi = db; |
2986 | hdmi = db; |
2946 | hdmi_len = dbl; |
2987 | hdmi_len = dbl; |
2947 | } |
2988 | } |
2948 | } |
2989 | } |
2949 | } |
2990 | } |
2950 | 2991 | ||
2951 | /* |
2992 | /* |
2952 | * We parse the HDMI VSDB after having added the cea modes as we will |
2993 | * We parse the HDMI VSDB after having added the cea modes as we will |
2953 | * be patching their flags when the sink supports stereo 3D. |
2994 | * be patching their flags when the sink supports stereo 3D. |
2954 | */ |
2995 | */ |
2955 | if (hdmi) |
2996 | if (hdmi) |
2956 | modes += do_hdmi_vsdb_modes(connector, hdmi, hdmi_len, video, |
2997 | modes += do_hdmi_vsdb_modes(connector, hdmi, hdmi_len, video, |
2957 | video_len); |
2998 | video_len); |
2958 | 2999 | ||
2959 | return modes; |
3000 | return modes; |
2960 | } |
3001 | } |
2961 | 3002 | ||
2962 | static void |
3003 | static void |
2963 | parse_hdmi_vsdb(struct drm_connector *connector, const u8 *db) |
3004 | parse_hdmi_vsdb(struct drm_connector *connector, const u8 *db) |
2964 | { |
3005 | { |
2965 | u8 len = cea_db_payload_len(db); |
3006 | u8 len = cea_db_payload_len(db); |
2966 | 3007 | ||
2967 | if (len >= 6) { |
3008 | if (len >= 6) { |
2968 | connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */ |
3009 | connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */ |
2969 | connector->dvi_dual = db[6] & 1; |
3010 | connector->dvi_dual = db[6] & 1; |
2970 | } |
3011 | } |
2971 | if (len >= 7) |
3012 | if (len >= 7) |
2972 | connector->max_tmds_clock = db[7] * 5; |
3013 | connector->max_tmds_clock = db[7] * 5; |
2973 | if (len >= 8) { |
3014 | if (len >= 8) { |
2974 | connector->latency_present[0] = db[8] >> 7; |
3015 | connector->latency_present[0] = db[8] >> 7; |
2975 | connector->latency_present[1] = (db[8] >> 6) & 1; |
3016 | connector->latency_present[1] = (db[8] >> 6) & 1; |
2976 | } |
3017 | } |
2977 | if (len >= 9) |
3018 | if (len >= 9) |
2978 | connector->video_latency[0] = db[9]; |
3019 | connector->video_latency[0] = db[9]; |
2979 | if (len >= 10) |
3020 | if (len >= 10) |
2980 | connector->audio_latency[0] = db[10]; |
3021 | connector->audio_latency[0] = db[10]; |
2981 | if (len >= 11) |
3022 | if (len >= 11) |
2982 | connector->video_latency[1] = db[11]; |
3023 | connector->video_latency[1] = db[11]; |
2983 | if (len >= 12) |
3024 | if (len >= 12) |
2984 | connector->audio_latency[1] = db[12]; |
3025 | connector->audio_latency[1] = db[12]; |
2985 | 3026 | ||
2986 | DRM_DEBUG_KMS("HDMI: DVI dual %d, " |
3027 | DRM_DEBUG_KMS("HDMI: DVI dual %d, " |
2987 | "max TMDS clock %d, " |
3028 | "max TMDS clock %d, " |
2988 | "latency present %d %d, " |
3029 | "latency present %d %d, " |
2989 | "video latency %d %d, " |
3030 | "video latency %d %d, " |
2990 | "audio latency %d %d\n", |
3031 | "audio latency %d %d\n", |
2991 | connector->dvi_dual, |
3032 | connector->dvi_dual, |
2992 | connector->max_tmds_clock, |
3033 | connector->max_tmds_clock, |
2993 | (int) connector->latency_present[0], |
3034 | (int) connector->latency_present[0], |
2994 | (int) connector->latency_present[1], |
3035 | (int) connector->latency_present[1], |
2995 | connector->video_latency[0], |
3036 | connector->video_latency[0], |
2996 | connector->video_latency[1], |
3037 | connector->video_latency[1], |
2997 | connector->audio_latency[0], |
3038 | connector->audio_latency[0], |
2998 | connector->audio_latency[1]); |
3039 | connector->audio_latency[1]); |
2999 | } |
3040 | } |
3000 | 3041 | ||
3001 | static void |
3042 | static void |
3002 | monitor_name(struct detailed_timing *t, void *data) |
3043 | monitor_name(struct detailed_timing *t, void *data) |
3003 | { |
3044 | { |
3004 | if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME) |
3045 | if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME) |
3005 | *(u8 **)data = t->data.other_data.data.str.str; |
3046 | *(u8 **)data = t->data.other_data.data.str.str; |
3006 | } |
3047 | } |
3007 | 3048 | ||
3008 | /** |
3049 | /** |
3009 | * drm_edid_to_eld - build ELD from EDID |
3050 | * drm_edid_to_eld - build ELD from EDID |
3010 | * @connector: connector corresponding to the HDMI/DP sink |
3051 | * @connector: connector corresponding to the HDMI/DP sink |
3011 | * @edid: EDID to parse |
3052 | * @edid: EDID to parse |
3012 | * |
3053 | * |
3013 | * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver. |
3054 | * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver. The |
3014 | * Some ELD fields are left to the graphics driver caller: |
3055 | * Conn_Type, HDCP and Port_ID ELD fields are left for the graphics driver to |
3015 | * - Conn_Type |
- | |
3016 | * - HDCP |
- | |
3017 | * - Port_ID |
3056 | * fill in. |
3018 | */ |
3057 | */ |
3019 | void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid) |
3058 | void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid) |
3020 | { |
3059 | { |
3021 | uint8_t *eld = connector->eld; |
3060 | uint8_t *eld = connector->eld; |
3022 | u8 *cea; |
3061 | u8 *cea; |
3023 | u8 *name; |
3062 | u8 *name; |
3024 | u8 *db; |
3063 | u8 *db; |
3025 | int sad_count = 0; |
3064 | int sad_count = 0; |
3026 | int mnl; |
3065 | int mnl; |
3027 | int dbl; |
3066 | int dbl; |
3028 | 3067 | ||
3029 | memset(eld, 0, sizeof(connector->eld)); |
3068 | memset(eld, 0, sizeof(connector->eld)); |
3030 | 3069 | ||
3031 | cea = drm_find_cea_extension(edid); |
3070 | cea = drm_find_cea_extension(edid); |
3032 | if (!cea) { |
3071 | if (!cea) { |
3033 | DRM_DEBUG_KMS("ELD: no CEA Extension found\n"); |
3072 | DRM_DEBUG_KMS("ELD: no CEA Extension found\n"); |
3034 | return; |
3073 | return; |
3035 | } |
3074 | } |
3036 | 3075 | ||
3037 | name = NULL; |
3076 | name = NULL; |
3038 | drm_for_each_detailed_block((u8 *)edid, monitor_name, &name); |
3077 | drm_for_each_detailed_block((u8 *)edid, monitor_name, &name); |
3039 | for (mnl = 0; name && mnl < 13; mnl++) { |
3078 | for (mnl = 0; name && mnl < 13; mnl++) { |
3040 | if (name[mnl] == 0x0a) |
3079 | if (name[mnl] == 0x0a) |
3041 | break; |
3080 | break; |
3042 | eld[20 + mnl] = name[mnl]; |
3081 | eld[20 + mnl] = name[mnl]; |
3043 | } |
3082 | } |
3044 | eld[4] = (cea[1] << 5) | mnl; |
3083 | eld[4] = (cea[1] << 5) | mnl; |
3045 | DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20); |
3084 | DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20); |
3046 | 3085 | ||
3047 | eld[0] = 2 << 3; /* ELD version: 2 */ |
3086 | eld[0] = 2 << 3; /* ELD version: 2 */ |
3048 | 3087 | ||
3049 | eld[16] = edid->mfg_id[0]; |
3088 | eld[16] = edid->mfg_id[0]; |
3050 | eld[17] = edid->mfg_id[1]; |
3089 | eld[17] = edid->mfg_id[1]; |
3051 | eld[18] = edid->prod_code[0]; |
3090 | eld[18] = edid->prod_code[0]; |
3052 | eld[19] = edid->prod_code[1]; |
3091 | eld[19] = edid->prod_code[1]; |
3053 | 3092 | ||
3054 | if (cea_revision(cea) >= 3) { |
3093 | if (cea_revision(cea) >= 3) { |
3055 | int i, start, end; |
3094 | int i, start, end; |
3056 | 3095 | ||
3057 | if (cea_db_offsets(cea, &start, &end)) { |
3096 | if (cea_db_offsets(cea, &start, &end)) { |
3058 | start = 0; |
3097 | start = 0; |
3059 | end = 0; |
3098 | end = 0; |
3060 | } |
3099 | } |
3061 | 3100 | ||
3062 | for_each_cea_db(cea, i, start, end) { |
3101 | for_each_cea_db(cea, i, start, end) { |
3063 | db = &cea[i]; |
3102 | db = &cea[i]; |
3064 | dbl = cea_db_payload_len(db); |
3103 | dbl = cea_db_payload_len(db); |
3065 | 3104 | ||
3066 | switch (cea_db_tag(db)) { |
3105 | switch (cea_db_tag(db)) { |
3067 | case AUDIO_BLOCK: |
3106 | case AUDIO_BLOCK: |
3068 | /* Audio Data Block, contains SADs */ |
3107 | /* Audio Data Block, contains SADs */ |
3069 | sad_count = dbl / 3; |
3108 | sad_count = dbl / 3; |
3070 | if (dbl >= 1) |
3109 | if (dbl >= 1) |
3071 | memcpy(eld + 20 + mnl, &db[1], dbl); |
3110 | memcpy(eld + 20 + mnl, &db[1], dbl); |
3072 | break; |
3111 | break; |
3073 | case SPEAKER_BLOCK: |
3112 | case SPEAKER_BLOCK: |
3074 | /* Speaker Allocation Data Block */ |
3113 | /* Speaker Allocation Data Block */ |
3075 | if (dbl >= 1) |
3114 | if (dbl >= 1) |
3076 | eld[7] = db[1]; |
3115 | eld[7] = db[1]; |
3077 | break; |
3116 | break; |
3078 | case VENDOR_BLOCK: |
3117 | case VENDOR_BLOCK: |
3079 | /* HDMI Vendor-Specific Data Block */ |
3118 | /* HDMI Vendor-Specific Data Block */ |
3080 | if (cea_db_is_hdmi_vsdb(db)) |
3119 | if (cea_db_is_hdmi_vsdb(db)) |
3081 | parse_hdmi_vsdb(connector, db); |
3120 | parse_hdmi_vsdb(connector, db); |
3082 | break; |
3121 | break; |
3083 | default: |
3122 | default: |
3084 | break; |
3123 | break; |
3085 | } |
3124 | } |
3086 | } |
3125 | } |
3087 | } |
3126 | } |
3088 | eld[5] |= sad_count << 4; |
3127 | eld[5] |= sad_count << 4; |
3089 | eld[2] = (20 + mnl + sad_count * 3 + 3) / 4; |
3128 | eld[2] = (20 + mnl + sad_count * 3 + 3) / 4; |
3090 | 3129 | ||
3091 | DRM_DEBUG_KMS("ELD size %d, SAD count %d\n", (int)eld[2], sad_count); |
3130 | DRM_DEBUG_KMS("ELD size %d, SAD count %d\n", (int)eld[2], sad_count); |
3092 | } |
3131 | } |
3093 | EXPORT_SYMBOL(drm_edid_to_eld); |
3132 | EXPORT_SYMBOL(drm_edid_to_eld); |
3094 | 3133 | ||
3095 | /** |
3134 | /** |
3096 | * drm_edid_to_sad - extracts SADs from EDID |
3135 | * drm_edid_to_sad - extracts SADs from EDID |
3097 | * @edid: EDID to parse |
3136 | * @edid: EDID to parse |
3098 | * @sads: pointer that will be set to the extracted SADs |
3137 | * @sads: pointer that will be set to the extracted SADs |
3099 | * |
3138 | * |
3100 | * Looks for CEA EDID block and extracts SADs (Short Audio Descriptors) from it. |
3139 | * Looks for CEA EDID block and extracts SADs (Short Audio Descriptors) from it. |
3101 | * Note: returned pointer needs to be kfreed |
- | |
3102 | * |
3140 | * |
- | 3141 | * Note: The returned pointer needs to be freed using kfree(). |
|
- | 3142 | * |
|
3103 | * Return number of found SADs or negative number on error. |
3143 | * Return: The number of found SADs or negative number on error. |
3104 | */ |
3144 | */ |
3105 | int drm_edid_to_sad(struct edid *edid, struct cea_sad **sads) |
3145 | int drm_edid_to_sad(struct edid *edid, struct cea_sad **sads) |
3106 | { |
3146 | { |
3107 | int count = 0; |
3147 | int count = 0; |
3108 | int i, start, end, dbl; |
3148 | int i, start, end, dbl; |
3109 | u8 *cea; |
3149 | u8 *cea; |
3110 | 3150 | ||
3111 | cea = drm_find_cea_extension(edid); |
3151 | cea = drm_find_cea_extension(edid); |
3112 | if (!cea) { |
3152 | if (!cea) { |
3113 | DRM_DEBUG_KMS("SAD: no CEA Extension found\n"); |
3153 | DRM_DEBUG_KMS("SAD: no CEA Extension found\n"); |
3114 | return -ENOENT; |
3154 | return -ENOENT; |
3115 | } |
3155 | } |
3116 | 3156 | ||
3117 | if (cea_revision(cea) < 3) { |
3157 | if (cea_revision(cea) < 3) { |
3118 | DRM_DEBUG_KMS("SAD: wrong CEA revision\n"); |
3158 | DRM_DEBUG_KMS("SAD: wrong CEA revision\n"); |
3119 | return -ENOTSUPP; |
3159 | return -ENOTSUPP; |
3120 | } |
3160 | } |
3121 | 3161 | ||
3122 | if (cea_db_offsets(cea, &start, &end)) { |
3162 | if (cea_db_offsets(cea, &start, &end)) { |
3123 | DRM_DEBUG_KMS("SAD: invalid data block offsets\n"); |
3163 | DRM_DEBUG_KMS("SAD: invalid data block offsets\n"); |
3124 | return -EPROTO; |
3164 | return -EPROTO; |
3125 | } |
3165 | } |
3126 | 3166 | ||
3127 | for_each_cea_db(cea, i, start, end) { |
3167 | for_each_cea_db(cea, i, start, end) { |
3128 | u8 *db = &cea[i]; |
3168 | u8 *db = &cea[i]; |
3129 | 3169 | ||
3130 | if (cea_db_tag(db) == AUDIO_BLOCK) { |
3170 | if (cea_db_tag(db) == AUDIO_BLOCK) { |
3131 | int j; |
3171 | int j; |
3132 | dbl = cea_db_payload_len(db); |
3172 | dbl = cea_db_payload_len(db); |
3133 | 3173 | ||
3134 | count = dbl / 3; /* SAD is 3B */ |
3174 | count = dbl / 3; /* SAD is 3B */ |
3135 | *sads = kcalloc(count, sizeof(**sads), GFP_KERNEL); |
3175 | *sads = kcalloc(count, sizeof(**sads), GFP_KERNEL); |
3136 | if (!*sads) |
3176 | if (!*sads) |
3137 | return -ENOMEM; |
3177 | return -ENOMEM; |
3138 | for (j = 0; j < count; j++) { |
3178 | for (j = 0; j < count; j++) { |
3139 | u8 *sad = &db[1 + j * 3]; |
3179 | u8 *sad = &db[1 + j * 3]; |
3140 | 3180 | ||
3141 | (*sads)[j].format = (sad[0] & 0x78) >> 3; |
3181 | (*sads)[j].format = (sad[0] & 0x78) >> 3; |
3142 | (*sads)[j].channels = sad[0] & 0x7; |
3182 | (*sads)[j].channels = sad[0] & 0x7; |
3143 | (*sads)[j].freq = sad[1] & 0x7F; |
3183 | (*sads)[j].freq = sad[1] & 0x7F; |
3144 | (*sads)[j].byte2 = sad[2]; |
3184 | (*sads)[j].byte2 = sad[2]; |
3145 | } |
3185 | } |
3146 | break; |
3186 | break; |
3147 | } |
3187 | } |
3148 | } |
3188 | } |
3149 | 3189 | ||
3150 | return count; |
3190 | return count; |
3151 | } |
3191 | } |
3152 | EXPORT_SYMBOL(drm_edid_to_sad); |
3192 | EXPORT_SYMBOL(drm_edid_to_sad); |
3153 | 3193 | ||
3154 | /** |
3194 | /** |
3155 | * drm_edid_to_speaker_allocation - extracts Speaker Allocation Data Blocks from EDID |
3195 | * drm_edid_to_speaker_allocation - extracts Speaker Allocation Data Blocks from EDID |
3156 | * @edid: EDID to parse |
3196 | * @edid: EDID to parse |
3157 | * @sadb: pointer to the speaker block |
3197 | * @sadb: pointer to the speaker block |
3158 | * |
3198 | * |
3159 | * Looks for CEA EDID block and extracts the Speaker Allocation Data Block from it. |
3199 | * Looks for CEA EDID block and extracts the Speaker Allocation Data Block from it. |
3160 | * Note: returned pointer needs to be kfreed |
- | |
3161 | * |
3200 | * |
- | 3201 | * Note: The returned pointer needs to be freed using kfree(). |
|
- | 3202 | * |
|
3162 | * Return number of found Speaker Allocation Blocks or negative number on error. |
3203 | * Return: The number of found Speaker Allocation Blocks or negative number on |
- | 3204 | * error. |
|
3163 | */ |
3205 | */ |
3164 | int drm_edid_to_speaker_allocation(struct edid *edid, u8 **sadb) |
3206 | int drm_edid_to_speaker_allocation(struct edid *edid, u8 **sadb) |
3165 | { |
3207 | { |
3166 | int count = 0; |
3208 | int count = 0; |
3167 | int i, start, end, dbl; |
3209 | int i, start, end, dbl; |
3168 | const u8 *cea; |
3210 | const u8 *cea; |
3169 | 3211 | ||
3170 | cea = drm_find_cea_extension(edid); |
3212 | cea = drm_find_cea_extension(edid); |
3171 | if (!cea) { |
3213 | if (!cea) { |
3172 | DRM_DEBUG_KMS("SAD: no CEA Extension found\n"); |
3214 | DRM_DEBUG_KMS("SAD: no CEA Extension found\n"); |
3173 | return -ENOENT; |
3215 | return -ENOENT; |
3174 | } |
3216 | } |
3175 | 3217 | ||
3176 | if (cea_revision(cea) < 3) { |
3218 | if (cea_revision(cea) < 3) { |
3177 | DRM_DEBUG_KMS("SAD: wrong CEA revision\n"); |
3219 | DRM_DEBUG_KMS("SAD: wrong CEA revision\n"); |
3178 | return -ENOTSUPP; |
3220 | return -ENOTSUPP; |
3179 | } |
3221 | } |
3180 | 3222 | ||
3181 | if (cea_db_offsets(cea, &start, &end)) { |
3223 | if (cea_db_offsets(cea, &start, &end)) { |
3182 | DRM_DEBUG_KMS("SAD: invalid data block offsets\n"); |
3224 | DRM_DEBUG_KMS("SAD: invalid data block offsets\n"); |
3183 | return -EPROTO; |
3225 | return -EPROTO; |
3184 | } |
3226 | } |
3185 | 3227 | ||
3186 | for_each_cea_db(cea, i, start, end) { |
3228 | for_each_cea_db(cea, i, start, end) { |
3187 | const u8 *db = &cea[i]; |
3229 | const u8 *db = &cea[i]; |
3188 | 3230 | ||
3189 | if (cea_db_tag(db) == SPEAKER_BLOCK) { |
3231 | if (cea_db_tag(db) == SPEAKER_BLOCK) { |
3190 | dbl = cea_db_payload_len(db); |
3232 | dbl = cea_db_payload_len(db); |
3191 | 3233 | ||
3192 | /* Speaker Allocation Data Block */ |
3234 | /* Speaker Allocation Data Block */ |
3193 | if (dbl == 3) { |
3235 | if (dbl == 3) { |
3194 | *sadb = kmalloc(dbl, GFP_KERNEL); |
3236 | *sadb = kmemdup(&db[1], dbl, GFP_KERNEL); |
3195 | if (!*sadb) |
3237 | if (!*sadb) |
3196 | return -ENOMEM; |
3238 | return -ENOMEM; |
3197 | memcpy(*sadb, &db[1], dbl); |
- | |
3198 | count = dbl; |
3239 | count = dbl; |
3199 | break; |
3240 | break; |
3200 | } |
3241 | } |
3201 | } |
3242 | } |
3202 | } |
3243 | } |
3203 | 3244 | ||
3204 | return count; |
3245 | return count; |
3205 | } |
3246 | } |
3206 | EXPORT_SYMBOL(drm_edid_to_speaker_allocation); |
3247 | EXPORT_SYMBOL(drm_edid_to_speaker_allocation); |
3207 | 3248 | ||
3208 | /** |
3249 | /** |
3209 | * drm_av_sync_delay - HDMI/DP sink audio-video sync delay in millisecond |
3250 | * drm_av_sync_delay - compute the HDMI/DP sink audio-video sync delay |
3210 | * @connector: connector associated with the HDMI/DP sink |
3251 | * @connector: connector associated with the HDMI/DP sink |
3211 | * @mode: the display mode |
3252 | * @mode: the display mode |
- | 3253 | * |
|
- | 3254 | * Return: The HDMI/DP sink's audio-video sync delay in milliseconds or 0 if |
|
- | 3255 | * the sink doesn't support audio or video. |
|
3212 | */ |
3256 | */ |
3213 | int drm_av_sync_delay(struct drm_connector *connector, |
3257 | int drm_av_sync_delay(struct drm_connector *connector, |
3214 | struct drm_display_mode *mode) |
3258 | struct drm_display_mode *mode) |
3215 | { |
3259 | { |
3216 | int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE); |
3260 | int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE); |
3217 | int a, v; |
3261 | int a, v; |
3218 | 3262 | ||
3219 | if (!connector->latency_present[0]) |
3263 | if (!connector->latency_present[0]) |
3220 | return 0; |
3264 | return 0; |
3221 | if (!connector->latency_present[1]) |
3265 | if (!connector->latency_present[1]) |
3222 | i = 0; |
3266 | i = 0; |
3223 | 3267 | ||
3224 | a = connector->audio_latency[i]; |
3268 | a = connector->audio_latency[i]; |
3225 | v = connector->video_latency[i]; |
3269 | v = connector->video_latency[i]; |
3226 | 3270 | ||
3227 | /* |
3271 | /* |
3228 | * HDMI/DP sink doesn't support audio or video? |
3272 | * HDMI/DP sink doesn't support audio or video? |
3229 | */ |
3273 | */ |
3230 | if (a == 255 || v == 255) |
3274 | if (a == 255 || v == 255) |
3231 | return 0; |
3275 | return 0; |
3232 | 3276 | ||
3233 | /* |
3277 | /* |
3234 | * Convert raw EDID values to millisecond. |
3278 | * Convert raw EDID values to millisecond. |
3235 | * Treat unknown latency as 0ms. |
3279 | * Treat unknown latency as 0ms. |
3236 | */ |
3280 | */ |
3237 | if (a) |
3281 | if (a) |
3238 | a = min(2 * (a - 1), 500); |
3282 | a = min(2 * (a - 1), 500); |
3239 | if (v) |
3283 | if (v) |
3240 | v = min(2 * (v - 1), 500); |
3284 | v = min(2 * (v - 1), 500); |
3241 | 3285 | ||
3242 | return max(v - a, 0); |
3286 | return max(v - a, 0); |
3243 | } |
3287 | } |
3244 | EXPORT_SYMBOL(drm_av_sync_delay); |
3288 | EXPORT_SYMBOL(drm_av_sync_delay); |
3245 | 3289 | ||
3246 | /** |
3290 | /** |
3247 | * drm_select_eld - select one ELD from multiple HDMI/DP sinks |
3291 | * drm_select_eld - select one ELD from multiple HDMI/DP sinks |
3248 | * @encoder: the encoder just changed display mode |
3292 | * @encoder: the encoder just changed display mode |
3249 | * @mode: the adjusted display mode |
3293 | * @mode: the adjusted display mode |
3250 | * |
3294 | * |
3251 | * It's possible for one encoder to be associated with multiple HDMI/DP sinks. |
3295 | * It's possible for one encoder to be associated with multiple HDMI/DP sinks. |
3252 | * The policy is now hard coded to simply use the first HDMI/DP sink's ELD. |
3296 | * The policy is now hard coded to simply use the first HDMI/DP sink's ELD. |
- | 3297 | * |
|
- | 3298 | * Return: The connector associated with the first HDMI/DP sink that has ELD |
|
- | 3299 | * attached to it. |
|
3253 | */ |
3300 | */ |
3254 | struct drm_connector *drm_select_eld(struct drm_encoder *encoder, |
3301 | struct drm_connector *drm_select_eld(struct drm_encoder *encoder, |
3255 | struct drm_display_mode *mode) |
3302 | struct drm_display_mode *mode) |
3256 | { |
3303 | { |
3257 | struct drm_connector *connector; |
3304 | struct drm_connector *connector; |
3258 | struct drm_device *dev = encoder->dev; |
3305 | struct drm_device *dev = encoder->dev; |
- | 3306 | ||
- | 3307 | WARN_ON(!mutex_is_locked(&dev->mode_config.mutex)); |
|
- | 3308 | WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex)); |
|
3259 | 3309 | ||
3260 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) |
3310 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) |
3261 | if (connector->encoder == encoder && connector->eld[0]) |
3311 | if (connector->encoder == encoder && connector->eld[0]) |
3262 | return connector; |
3312 | return connector; |
3263 | 3313 | ||
3264 | return NULL; |
3314 | return NULL; |
3265 | } |
3315 | } |
3266 | EXPORT_SYMBOL(drm_select_eld); |
3316 | EXPORT_SYMBOL(drm_select_eld); |
3267 | 3317 | ||
3268 | /** |
3318 | /** |
3269 | * drm_detect_hdmi_monitor - detect whether monitor is hdmi. |
3319 | * drm_detect_hdmi_monitor - detect whether monitor is HDMI |
3270 | * @edid: monitor EDID information |
3320 | * @edid: monitor EDID information |
3271 | * |
3321 | * |
3272 | * Parse the CEA extension according to CEA-861-B. |
3322 | * Parse the CEA extension according to CEA-861-B. |
- | 3323 | * |
|
3273 | * Return true if HDMI, false if not or unknown. |
3324 | * Return: True if the monitor is HDMI, false if not or unknown. |
3274 | */ |
3325 | */ |
3275 | bool drm_detect_hdmi_monitor(struct edid *edid) |
3326 | bool drm_detect_hdmi_monitor(struct edid *edid) |
3276 | { |
3327 | { |
3277 | u8 *edid_ext; |
3328 | u8 *edid_ext; |
3278 | int i; |
3329 | int i; |
3279 | int start_offset, end_offset; |
3330 | int start_offset, end_offset; |
3280 | 3331 | ||
3281 | edid_ext = drm_find_cea_extension(edid); |
3332 | edid_ext = drm_find_cea_extension(edid); |
3282 | if (!edid_ext) |
3333 | if (!edid_ext) |
3283 | return false; |
3334 | return false; |
3284 | 3335 | ||
3285 | if (cea_db_offsets(edid_ext, &start_offset, &end_offset)) |
3336 | if (cea_db_offsets(edid_ext, &start_offset, &end_offset)) |
3286 | return false; |
3337 | return false; |
3287 | 3338 | ||
3288 | /* |
3339 | /* |
3289 | * Because HDMI identifier is in Vendor Specific Block, |
3340 | * Because HDMI identifier is in Vendor Specific Block, |
3290 | * search it from all data blocks of CEA extension. |
3341 | * search it from all data blocks of CEA extension. |
3291 | */ |
3342 | */ |
3292 | for_each_cea_db(edid_ext, i, start_offset, end_offset) { |
3343 | for_each_cea_db(edid_ext, i, start_offset, end_offset) { |
3293 | if (cea_db_is_hdmi_vsdb(&edid_ext[i])) |
3344 | if (cea_db_is_hdmi_vsdb(&edid_ext[i])) |
3294 | return true; |
3345 | return true; |
3295 | } |
3346 | } |
3296 | 3347 | ||
3297 | return false; |
3348 | return false; |
3298 | } |
3349 | } |
3299 | EXPORT_SYMBOL(drm_detect_hdmi_monitor); |
3350 | EXPORT_SYMBOL(drm_detect_hdmi_monitor); |
3300 | 3351 | ||
3301 | /** |
3352 | /** |
3302 | * drm_detect_monitor_audio - check monitor audio capability |
3353 | * drm_detect_monitor_audio - check monitor audio capability |
- | 3354 | * @edid: EDID block to scan |
|
3303 | * |
3355 | * |
3304 | * Monitor should have CEA extension block. |
3356 | * Monitor should have CEA extension block. |
3305 | * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic |
3357 | * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic |
3306 | * audio' only. If there is any audio extension block and supported |
3358 | * audio' only. If there is any audio extension block and supported |
3307 | * audio format, assume at least 'basic audio' support, even if 'basic |
3359 | * audio format, assume at least 'basic audio' support, even if 'basic |
3308 | * audio' is not defined in EDID. |
3360 | * audio' is not defined in EDID. |
3309 | * |
3361 | * |
- | 3362 | * Return: True if the monitor supports audio, false otherwise. |
|
3310 | */ |
3363 | */ |
3311 | bool drm_detect_monitor_audio(struct edid *edid) |
3364 | bool drm_detect_monitor_audio(struct edid *edid) |
3312 | { |
3365 | { |
3313 | u8 *edid_ext; |
3366 | u8 *edid_ext; |
3314 | int i, j; |
3367 | int i, j; |
3315 | bool has_audio = false; |
3368 | bool has_audio = false; |
3316 | int start_offset, end_offset; |
3369 | int start_offset, end_offset; |
3317 | 3370 | ||
3318 | edid_ext = drm_find_cea_extension(edid); |
3371 | edid_ext = drm_find_cea_extension(edid); |
3319 | if (!edid_ext) |
3372 | if (!edid_ext) |
3320 | goto end; |
3373 | goto end; |
3321 | 3374 | ||
3322 | has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0); |
3375 | has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0); |
3323 | 3376 | ||
3324 | if (has_audio) { |
3377 | if (has_audio) { |
3325 | DRM_DEBUG_KMS("Monitor has basic audio support\n"); |
3378 | DRM_DEBUG_KMS("Monitor has basic audio support\n"); |
3326 | goto end; |
3379 | goto end; |
3327 | } |
3380 | } |
3328 | 3381 | ||
3329 | if (cea_db_offsets(edid_ext, &start_offset, &end_offset)) |
3382 | if (cea_db_offsets(edid_ext, &start_offset, &end_offset)) |
3330 | goto end; |
3383 | goto end; |
3331 | 3384 | ||
3332 | for_each_cea_db(edid_ext, i, start_offset, end_offset) { |
3385 | for_each_cea_db(edid_ext, i, start_offset, end_offset) { |
3333 | if (cea_db_tag(&edid_ext[i]) == AUDIO_BLOCK) { |
3386 | if (cea_db_tag(&edid_ext[i]) == AUDIO_BLOCK) { |
3334 | has_audio = true; |
3387 | has_audio = true; |
3335 | for (j = 1; j < cea_db_payload_len(&edid_ext[i]) + 1; j += 3) |
3388 | for (j = 1; j < cea_db_payload_len(&edid_ext[i]) + 1; j += 3) |
3336 | DRM_DEBUG_KMS("CEA audio format %d\n", |
3389 | DRM_DEBUG_KMS("CEA audio format %d\n", |
3337 | (edid_ext[i + j] >> 3) & 0xf); |
3390 | (edid_ext[i + j] >> 3) & 0xf); |
3338 | goto end; |
3391 | goto end; |
3339 | } |
3392 | } |
3340 | } |
3393 | } |
3341 | end: |
3394 | end: |
3342 | return has_audio; |
3395 | return has_audio; |
3343 | } |
3396 | } |
3344 | EXPORT_SYMBOL(drm_detect_monitor_audio); |
3397 | EXPORT_SYMBOL(drm_detect_monitor_audio); |
3345 | 3398 | ||
3346 | /** |
3399 | /** |
3347 | * drm_rgb_quant_range_selectable - is RGB quantization range selectable? |
3400 | * drm_rgb_quant_range_selectable - is RGB quantization range selectable? |
- | 3401 | * @edid: EDID block to scan |
|
3348 | * |
3402 | * |
3349 | * Check whether the monitor reports the RGB quantization range selection |
3403 | * Check whether the monitor reports the RGB quantization range selection |
3350 | * as supported. The AVI infoframe can then be used to inform the monitor |
3404 | * as supported. The AVI infoframe can then be used to inform the monitor |
3351 | * which quantization range (full or limited) is used. |
3405 | * which quantization range (full or limited) is used. |
- | 3406 | * |
|
- | 3407 | * Return: True if the RGB quantization range is selectable, false otherwise. |
|
3352 | */ |
3408 | */ |
3353 | bool drm_rgb_quant_range_selectable(struct edid *edid) |
3409 | bool drm_rgb_quant_range_selectable(struct edid *edid) |
3354 | { |
3410 | { |
3355 | u8 *edid_ext; |
3411 | u8 *edid_ext; |
3356 | int i, start, end; |
3412 | int i, start, end; |
3357 | 3413 | ||
3358 | edid_ext = drm_find_cea_extension(edid); |
3414 | edid_ext = drm_find_cea_extension(edid); |
3359 | if (!edid_ext) |
3415 | if (!edid_ext) |
3360 | return false; |
3416 | return false; |
3361 | 3417 | ||
3362 | if (cea_db_offsets(edid_ext, &start, &end)) |
3418 | if (cea_db_offsets(edid_ext, &start, &end)) |
3363 | return false; |
3419 | return false; |
3364 | 3420 | ||
3365 | for_each_cea_db(edid_ext, i, start, end) { |
3421 | for_each_cea_db(edid_ext, i, start, end) { |
3366 | if (cea_db_tag(&edid_ext[i]) == VIDEO_CAPABILITY_BLOCK && |
3422 | if (cea_db_tag(&edid_ext[i]) == VIDEO_CAPABILITY_BLOCK && |
3367 | cea_db_payload_len(&edid_ext[i]) == 2) { |
3423 | cea_db_payload_len(&edid_ext[i]) == 2) { |
3368 | DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", edid_ext[i + 2]); |
3424 | DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", edid_ext[i + 2]); |
3369 | return edid_ext[i + 2] & EDID_CEA_VCDB_QS; |
3425 | return edid_ext[i + 2] & EDID_CEA_VCDB_QS; |
3370 | } |
3426 | } |
3371 | } |
3427 | } |
3372 | 3428 | ||
3373 | return false; |
3429 | return false; |
3374 | } |
3430 | } |
3375 | EXPORT_SYMBOL(drm_rgb_quant_range_selectable); |
3431 | EXPORT_SYMBOL(drm_rgb_quant_range_selectable); |
3376 | 3432 | ||
3377 | /** |
3433 | /** |
- | 3434 | * drm_assign_hdmi_deep_color_info - detect whether monitor supports |
|
- | 3435 | * hdmi deep color modes and update drm_display_info if so. |
|
- | 3436 | * |
|
- | 3437 | * @edid: monitor EDID information |
|
- | 3438 | * @info: Updated with maximum supported deep color bpc and color format |
|
- | 3439 | * if deep color supported. |
|
- | 3440 | * |
|
- | 3441 | * Parse the CEA extension according to CEA-861-B. |
|
- | 3442 | * Return true if HDMI deep color supported, false if not or unknown. |
|
- | 3443 | */ |
|
- | 3444 | static bool drm_assign_hdmi_deep_color_info(struct edid *edid, |
|
- | 3445 | struct drm_display_info *info, |
|
- | 3446 | struct drm_connector *connector) |
|
- | 3447 | { |
|
- | 3448 | u8 *edid_ext, *hdmi; |
|
- | 3449 | int i; |
|
- | 3450 | int start_offset, end_offset; |
|
- | 3451 | unsigned int dc_bpc = 0; |
|
- | 3452 | ||
- | 3453 | edid_ext = drm_find_cea_extension(edid); |
|
- | 3454 | if (!edid_ext) |
|
- | 3455 | return false; |
|
- | 3456 | ||
- | 3457 | if (cea_db_offsets(edid_ext, &start_offset, &end_offset)) |
|
- | 3458 | return false; |
|
- | 3459 | ||
- | 3460 | /* |
|
- | 3461 | * Because HDMI identifier is in Vendor Specific Block, |
|
- | 3462 | * search it from all data blocks of CEA extension. |
|
- | 3463 | */ |
|
- | 3464 | for_each_cea_db(edid_ext, i, start_offset, end_offset) { |
|
- | 3465 | if (cea_db_is_hdmi_vsdb(&edid_ext[i])) { |
|
- | 3466 | /* HDMI supports at least 8 bpc */ |
|
- | 3467 | info->bpc = 8; |
|
- | 3468 | ||
- | 3469 | hdmi = &edid_ext[i]; |
|
- | 3470 | if (cea_db_payload_len(hdmi) < 6) |
|
- | 3471 | return false; |
|
- | 3472 | ||
- | 3473 | if (hdmi[6] & DRM_EDID_HDMI_DC_30) { |
|
- | 3474 | dc_bpc = 10; |
|
- | 3475 | info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_30; |
|
- | 3476 | DRM_DEBUG("%s: HDMI sink does deep color 30.\n", |
|
- | 3477 | connector->name); |
|
- | 3478 | } |
|
- | 3479 | ||
- | 3480 | if (hdmi[6] & DRM_EDID_HDMI_DC_36) { |
|
- | 3481 | dc_bpc = 12; |
|
- | 3482 | info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_36; |
|
- | 3483 | DRM_DEBUG("%s: HDMI sink does deep color 36.\n", |
|
- | 3484 | connector->name); |
|
- | 3485 | } |
|
- | 3486 | ||
- | 3487 | if (hdmi[6] & DRM_EDID_HDMI_DC_48) { |
|
- | 3488 | dc_bpc = 16; |
|
- | 3489 | info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_48; |
|
- | 3490 | DRM_DEBUG("%s: HDMI sink does deep color 48.\n", |
|
- | 3491 | connector->name); |
|
- | 3492 | } |
|
- | 3493 | ||
- | 3494 | if (dc_bpc > 0) { |
|
- | 3495 | DRM_DEBUG("%s: Assigning HDMI sink color depth as %d bpc.\n", |
|
- | 3496 | connector->name, dc_bpc); |
|
- | 3497 | info->bpc = dc_bpc; |
|
- | 3498 | ||
- | 3499 | /* |
|
- | 3500 | * Deep color support mandates RGB444 support for all video |
|
- | 3501 | * modes and forbids YCRCB422 support for all video modes per |
|
- | 3502 | * HDMI 1.3 spec. |
|
- | 3503 | */ |
|
- | 3504 | info->color_formats = DRM_COLOR_FORMAT_RGB444; |
|
- | 3505 | ||
- | 3506 | /* YCRCB444 is optional according to spec. */ |
|
- | 3507 | if (hdmi[6] & DRM_EDID_HDMI_DC_Y444) { |
|
- | 3508 | info->color_formats |= DRM_COLOR_FORMAT_YCRCB444; |
|
- | 3509 | DRM_DEBUG("%s: HDMI sink does YCRCB444 in deep color.\n", |
|
- | 3510 | connector->name); |
|
- | 3511 | } |
|
- | 3512 | ||
- | 3513 | /* |
|
- | 3514 | * Spec says that if any deep color mode is supported at all, |
|
- | 3515 | * then deep color 36 bit must be supported. |
|
- | 3516 | */ |
|
- | 3517 | if (!(hdmi[6] & DRM_EDID_HDMI_DC_36)) { |
|
- | 3518 | DRM_DEBUG("%s: HDMI sink should do DC_36, but does not!\n", |
|
- | 3519 | connector->name); |
|
- | 3520 | } |
|
- | 3521 | ||
- | 3522 | return true; |
|
- | 3523 | } |
|
- | 3524 | else { |
|
- | 3525 | DRM_DEBUG("%s: No deep color support on this HDMI sink.\n", |
|
- | 3526 | connector->name); |
|
- | 3527 | } |
|
- | 3528 | } |
|
- | 3529 | } |
|
- | 3530 | ||
- | 3531 | return false; |
|
- | 3532 | } |
|
- | 3533 | ||
- | 3534 | /** |
|
3378 | * drm_add_display_info - pull display info out if present |
3535 | * drm_add_display_info - pull display info out if present |
3379 | * @edid: EDID data |
3536 | * @edid: EDID data |
3380 | * @info: display info (attached to connector) |
3537 | * @info: display info (attached to connector) |
- | 3538 | * @connector: connector whose edid is used to build display info |
|
3381 | * |
3539 | * |
3382 | * Grab any available display info and stuff it into the drm_display_info |
3540 | * Grab any available display info and stuff it into the drm_display_info |
3383 | * structure that's part of the connector. Useful for tracking bpp and |
3541 | * structure that's part of the connector. Useful for tracking bpp and |
3384 | * color spaces. |
3542 | * color spaces. |
3385 | */ |
3543 | */ |
3386 | static void drm_add_display_info(struct edid *edid, |
3544 | static void drm_add_display_info(struct edid *edid, |
3387 | struct drm_display_info *info) |
3545 | struct drm_display_info *info, |
- | 3546 | struct drm_connector *connector) |
|
3388 | { |
3547 | { |
3389 | u8 *edid_ext; |
3548 | u8 *edid_ext; |
3390 | 3549 | ||
3391 | info->width_mm = edid->width_cm * 10; |
3550 | info->width_mm = edid->width_cm * 10; |
3392 | info->height_mm = edid->height_cm * 10; |
3551 | info->height_mm = edid->height_cm * 10; |
3393 | 3552 | ||
3394 | /* driver figures it out in this case */ |
3553 | /* driver figures it out in this case */ |
3395 | info->bpc = 0; |
3554 | info->bpc = 0; |
3396 | info->color_formats = 0; |
3555 | info->color_formats = 0; |
3397 | 3556 | ||
3398 | if (edid->revision < 3) |
3557 | if (edid->revision < 3) |
3399 | return; |
3558 | return; |
3400 | 3559 | ||
3401 | if (!(edid->input & DRM_EDID_INPUT_DIGITAL)) |
3560 | if (!(edid->input & DRM_EDID_INPUT_DIGITAL)) |
3402 | return; |
3561 | return; |
3403 | 3562 | ||
3404 | /* Get data from CEA blocks if present */ |
3563 | /* Get data from CEA blocks if present */ |
3405 | edid_ext = drm_find_cea_extension(edid); |
3564 | edid_ext = drm_find_cea_extension(edid); |
3406 | if (edid_ext) { |
3565 | if (edid_ext) { |
3407 | info->cea_rev = edid_ext[1]; |
3566 | info->cea_rev = edid_ext[1]; |
3408 | 3567 | ||
3409 | /* The existence of a CEA block should imply RGB support */ |
3568 | /* The existence of a CEA block should imply RGB support */ |
3410 | info->color_formats = DRM_COLOR_FORMAT_RGB444; |
3569 | info->color_formats = DRM_COLOR_FORMAT_RGB444; |
3411 | if (edid_ext[3] & EDID_CEA_YCRCB444) |
3570 | if (edid_ext[3] & EDID_CEA_YCRCB444) |
3412 | info->color_formats |= DRM_COLOR_FORMAT_YCRCB444; |
3571 | info->color_formats |= DRM_COLOR_FORMAT_YCRCB444; |
3413 | if (edid_ext[3] & EDID_CEA_YCRCB422) |
3572 | if (edid_ext[3] & EDID_CEA_YCRCB422) |
3414 | info->color_formats |= DRM_COLOR_FORMAT_YCRCB422; |
3573 | info->color_formats |= DRM_COLOR_FORMAT_YCRCB422; |
3415 | } |
3574 | } |
- | 3575 | ||
- | 3576 | /* HDMI deep color modes supported? Assign to info, if so */ |
|
- | 3577 | drm_assign_hdmi_deep_color_info(edid, info, connector); |
|
3416 | 3578 | ||
3417 | /* Only defined for 1.4 with digital displays */ |
3579 | /* Only defined for 1.4 with digital displays */ |
3418 | if (edid->revision < 4) |
3580 | if (edid->revision < 4) |
3419 | return; |
3581 | return; |
3420 | 3582 | ||
3421 | switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) { |
3583 | switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) { |
3422 | case DRM_EDID_DIGITAL_DEPTH_6: |
3584 | case DRM_EDID_DIGITAL_DEPTH_6: |
3423 | info->bpc = 6; |
3585 | info->bpc = 6; |
3424 | break; |
3586 | break; |
3425 | case DRM_EDID_DIGITAL_DEPTH_8: |
3587 | case DRM_EDID_DIGITAL_DEPTH_8: |
3426 | info->bpc = 8; |
3588 | info->bpc = 8; |
3427 | break; |
3589 | break; |
3428 | case DRM_EDID_DIGITAL_DEPTH_10: |
3590 | case DRM_EDID_DIGITAL_DEPTH_10: |
3429 | info->bpc = 10; |
3591 | info->bpc = 10; |
3430 | break; |
3592 | break; |
3431 | case DRM_EDID_DIGITAL_DEPTH_12: |
3593 | case DRM_EDID_DIGITAL_DEPTH_12: |
3432 | info->bpc = 12; |
3594 | info->bpc = 12; |
3433 | break; |
3595 | break; |
3434 | case DRM_EDID_DIGITAL_DEPTH_14: |
3596 | case DRM_EDID_DIGITAL_DEPTH_14: |
3435 | info->bpc = 14; |
3597 | info->bpc = 14; |
3436 | break; |
3598 | break; |
3437 | case DRM_EDID_DIGITAL_DEPTH_16: |
3599 | case DRM_EDID_DIGITAL_DEPTH_16: |
3438 | info->bpc = 16; |
3600 | info->bpc = 16; |
3439 | break; |
3601 | break; |
3440 | case DRM_EDID_DIGITAL_DEPTH_UNDEF: |
3602 | case DRM_EDID_DIGITAL_DEPTH_UNDEF: |
3441 | default: |
3603 | default: |
3442 | info->bpc = 0; |
3604 | info->bpc = 0; |
3443 | break; |
3605 | break; |
3444 | } |
3606 | } |
- | 3607 | ||
- | 3608 | DRM_DEBUG("%s: Assigning EDID-1.4 digital sink color depth as %d bpc.\n", |
|
- | 3609 | connector->name, info->bpc); |
|
3445 | 3610 | ||
3446 | info->color_formats |= DRM_COLOR_FORMAT_RGB444; |
3611 | info->color_formats |= DRM_COLOR_FORMAT_RGB444; |
3447 | if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444) |
3612 | if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444) |
3448 | info->color_formats |= DRM_COLOR_FORMAT_YCRCB444; |
3613 | info->color_formats |= DRM_COLOR_FORMAT_YCRCB444; |
3449 | if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422) |
3614 | if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422) |
3450 | info->color_formats |= DRM_COLOR_FORMAT_YCRCB422; |
3615 | info->color_formats |= DRM_COLOR_FORMAT_YCRCB422; |
3451 | } |
3616 | } |
3452 | 3617 | ||
3453 | /** |
3618 | /** |
3454 | * drm_add_edid_modes - add modes from EDID data, if available |
3619 | * drm_add_edid_modes - add modes from EDID data, if available |
3455 | * @connector: connector we're probing |
3620 | * @connector: connector we're probing |
3456 | * @edid: edid data |
3621 | * @edid: EDID data |
3457 | * |
3622 | * |
3458 | * Add the specified modes to the connector's mode list. |
3623 | * Add the specified modes to the connector's mode list. |
3459 | * |
3624 | * |
3460 | * Return number of modes added or 0 if we couldn't find any. |
3625 | * Return: The number of modes added or 0 if we couldn't find any. |
3461 | */ |
3626 | */ |
3462 | int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid) |
3627 | int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid) |
3463 | { |
3628 | { |
3464 | int num_modes = 0; |
3629 | int num_modes = 0; |
3465 | u32 quirks; |
3630 | u32 quirks; |
3466 | 3631 | ||
3467 | if (edid == NULL) { |
3632 | if (edid == NULL) { |
3468 | return 0; |
3633 | return 0; |
3469 | } |
3634 | } |
3470 | if (!drm_edid_is_valid(edid)) { |
3635 | if (!drm_edid_is_valid(edid)) { |
3471 | dev_warn(connector->dev->dev, "%s: EDID invalid.\n", |
3636 | dev_warn(connector->dev->dev, "%s: EDID invalid.\n", |
3472 | drm_get_connector_name(connector)); |
3637 | connector->name); |
3473 | return 0; |
3638 | return 0; |
3474 | } |
3639 | } |
3475 | 3640 | ||
3476 | quirks = edid_get_quirks(edid); |
3641 | quirks = edid_get_quirks(edid); |
3477 | 3642 | ||
3478 | /* |
3643 | /* |
3479 | * EDID spec says modes should be preferred in this order: |
3644 | * EDID spec says modes should be preferred in this order: |
3480 | * - preferred detailed mode |
3645 | * - preferred detailed mode |
3481 | * - other detailed modes from base block |
3646 | * - other detailed modes from base block |
3482 | * - detailed modes from extension blocks |
3647 | * - detailed modes from extension blocks |
3483 | * - CVT 3-byte code modes |
3648 | * - CVT 3-byte code modes |
3484 | * - standard timing codes |
3649 | * - standard timing codes |
3485 | * - established timing codes |
3650 | * - established timing codes |
3486 | * - modes inferred from GTF or CVT range information |
3651 | * - modes inferred from GTF or CVT range information |
3487 | * |
3652 | * |
3488 | * We get this pretty much right. |
3653 | * We get this pretty much right. |
3489 | * |
3654 | * |
3490 | * XXX order for additional mode types in extension blocks? |
3655 | * XXX order for additional mode types in extension blocks? |
3491 | */ |
3656 | */ |
3492 | num_modes += add_detailed_modes(connector, edid, quirks); |
3657 | num_modes += add_detailed_modes(connector, edid, quirks); |
3493 | num_modes += add_cvt_modes(connector, edid); |
3658 | num_modes += add_cvt_modes(connector, edid); |
3494 | num_modes += add_standard_modes(connector, edid); |
3659 | num_modes += add_standard_modes(connector, edid); |
3495 | num_modes += add_established_modes(connector, edid); |
3660 | num_modes += add_established_modes(connector, edid); |
3496 | if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF) |
3661 | if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF) |
3497 | num_modes += add_inferred_modes(connector, edid); |
3662 | num_modes += add_inferred_modes(connector, edid); |
3498 | num_modes += add_cea_modes(connector, edid); |
3663 | num_modes += add_cea_modes(connector, edid); |
3499 | num_modes += add_alternate_cea_modes(connector, edid); |
3664 | num_modes += add_alternate_cea_modes(connector, edid); |
3500 | 3665 | ||
3501 | if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75)) |
3666 | if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75)) |
3502 | edid_fixup_preferred(connector, quirks); |
3667 | edid_fixup_preferred(connector, quirks); |
3503 | 3668 | ||
3504 | drm_add_display_info(edid, &connector->display_info); |
3669 | drm_add_display_info(edid, &connector->display_info, connector); |
3505 | 3670 | ||
3506 | if (quirks & EDID_QUIRK_FORCE_8BPC) |
3671 | if (quirks & EDID_QUIRK_FORCE_8BPC) |
3507 | connector->display_info.bpc = 8; |
3672 | connector->display_info.bpc = 8; |
- | 3673 | ||
- | 3674 | if (quirks & EDID_QUIRK_FORCE_12BPC) |
|
- | 3675 | connector->display_info.bpc = 12; |
|
3508 | 3676 | ||
3509 | return num_modes; |
3677 | return num_modes; |
3510 | } |
3678 | } |
3511 | EXPORT_SYMBOL(drm_add_edid_modes); |
3679 | EXPORT_SYMBOL(drm_add_edid_modes); |
3512 | 3680 | ||
3513 | /** |
3681 | /** |
3514 | * drm_add_modes_noedid - add modes for the connectors without EDID |
3682 | * drm_add_modes_noedid - add modes for the connectors without EDID |
3515 | * @connector: connector we're probing |
3683 | * @connector: connector we're probing |
3516 | * @hdisplay: the horizontal display limit |
3684 | * @hdisplay: the horizontal display limit |
3517 | * @vdisplay: the vertical display limit |
3685 | * @vdisplay: the vertical display limit |
3518 | * |
3686 | * |
3519 | * Add the specified modes to the connector's mode list. Only when the |
3687 | * Add the specified modes to the connector's mode list. Only when the |
3520 | * hdisplay/vdisplay is not beyond the given limit, it will be added. |
3688 | * hdisplay/vdisplay is not beyond the given limit, it will be added. |
3521 | * |
3689 | * |
3522 | * Return number of modes added or 0 if we couldn't find any. |
3690 | * Return: The number of modes added or 0 if we couldn't find any. |
3523 | */ |
3691 | */ |
3524 | int drm_add_modes_noedid(struct drm_connector *connector, |
3692 | int drm_add_modes_noedid(struct drm_connector *connector, |
3525 | int hdisplay, int vdisplay) |
3693 | int hdisplay, int vdisplay) |
3526 | { |
3694 | { |
3527 | int i, count, num_modes = 0; |
3695 | int i, count, num_modes = 0; |
3528 | struct drm_display_mode *mode; |
3696 | struct drm_display_mode *mode; |
3529 | struct drm_device *dev = connector->dev; |
3697 | struct drm_device *dev = connector->dev; |
3530 | 3698 | ||
3531 | count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode); |
3699 | count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode); |
3532 | if (hdisplay < 0) |
3700 | if (hdisplay < 0) |
3533 | hdisplay = 0; |
3701 | hdisplay = 0; |
3534 | if (vdisplay < 0) |
3702 | if (vdisplay < 0) |
3535 | vdisplay = 0; |
3703 | vdisplay = 0; |
3536 | 3704 | ||
3537 | for (i = 0; i < count; i++) { |
3705 | for (i = 0; i < count; i++) { |
3538 | const struct drm_display_mode *ptr = &drm_dmt_modes[i]; |
3706 | const struct drm_display_mode *ptr = &drm_dmt_modes[i]; |
3539 | if (hdisplay && vdisplay) { |
3707 | if (hdisplay && vdisplay) { |
3540 | /* |
3708 | /* |
3541 | * Only when two are valid, they will be used to check |
3709 | * Only when two are valid, they will be used to check |
3542 | * whether the mode should be added to the mode list of |
3710 | * whether the mode should be added to the mode list of |
3543 | * the connector. |
3711 | * the connector. |
3544 | */ |
3712 | */ |
3545 | if (ptr->hdisplay > hdisplay || |
3713 | if (ptr->hdisplay > hdisplay || |
3546 | ptr->vdisplay > vdisplay) |
3714 | ptr->vdisplay > vdisplay) |
3547 | continue; |
3715 | continue; |
3548 | } |
3716 | } |
3549 | if (drm_mode_vrefresh(ptr) > 61) |
3717 | if (drm_mode_vrefresh(ptr) > 61) |
3550 | continue; |
3718 | continue; |
3551 | mode = drm_mode_duplicate(dev, ptr); |
3719 | mode = drm_mode_duplicate(dev, ptr); |
3552 | if (mode) { |
3720 | if (mode) { |
3553 | drm_mode_probed_add(connector, mode); |
3721 | drm_mode_probed_add(connector, mode); |
3554 | num_modes++; |
3722 | num_modes++; |
3555 | } |
3723 | } |
3556 | } |
3724 | } |
3557 | return num_modes; |
3725 | return num_modes; |
3558 | } |
3726 | } |
3559 | EXPORT_SYMBOL(drm_add_modes_noedid); |
3727 | EXPORT_SYMBOL(drm_add_modes_noedid); |
- | 3728 | ||
- | 3729 | /** |
|
- | 3730 | * drm_set_preferred_mode - Sets the preferred mode of a connector |
|
- | 3731 | * @connector: connector whose mode list should be processed |
|
- | 3732 | * @hpref: horizontal resolution of preferred mode |
|
- | 3733 | * @vpref: vertical resolution of preferred mode |
|
- | 3734 | * |
|
- | 3735 | * Marks a mode as preferred if it matches the resolution specified by @hpref |
|
- | 3736 | * and @vpref. |
|
3560 | 3737 | */ |
|
3561 | void drm_set_preferred_mode(struct drm_connector *connector, |
3738 | void drm_set_preferred_mode(struct drm_connector *connector, |
3562 | int hpref, int vpref) |
3739 | int hpref, int vpref) |
3563 | { |
3740 | { |
3564 | struct drm_display_mode *mode; |
3741 | struct drm_display_mode *mode; |
3565 | 3742 | ||
3566 | list_for_each_entry(mode, &connector->probed_modes, head) { |
3743 | list_for_each_entry(mode, &connector->probed_modes, head) { |
3567 | if (drm_mode_width(mode) == hpref && |
3744 | if (mode->hdisplay == hpref && |
3568 | drm_mode_height(mode) == vpref) |
3745 | mode->vdisplay == vpref) |
3569 | mode->type |= DRM_MODE_TYPE_PREFERRED; |
3746 | mode->type |= DRM_MODE_TYPE_PREFERRED; |
3570 | } |
3747 | } |
3571 | } |
3748 | } |
3572 | EXPORT_SYMBOL(drm_set_preferred_mode); |
3749 | EXPORT_SYMBOL(drm_set_preferred_mode); |
3573 | 3750 | ||
3574 | /** |
3751 | /** |
3575 | * drm_hdmi_avi_infoframe_from_display_mode() - fill an HDMI AVI infoframe with |
3752 | * drm_hdmi_avi_infoframe_from_display_mode() - fill an HDMI AVI infoframe with |
3576 | * data from a DRM display mode |
3753 | * data from a DRM display mode |
3577 | * @frame: HDMI AVI infoframe |
3754 | * @frame: HDMI AVI infoframe |
3578 | * @mode: DRM display mode |
3755 | * @mode: DRM display mode |
3579 | * |
3756 | * |
3580 | * Returns 0 on success or a negative error code on failure. |
3757 | * Return: 0 on success or a negative error code on failure. |
3581 | */ |
3758 | */ |
3582 | int |
3759 | int |
3583 | drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame, |
3760 | drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame, |
3584 | const struct drm_display_mode *mode) |
3761 | const struct drm_display_mode *mode) |
3585 | { |
3762 | { |
3586 | int err; |
3763 | int err; |
3587 | 3764 | ||
3588 | if (!frame || !mode) |
3765 | if (!frame || !mode) |
3589 | return -EINVAL; |
3766 | return -EINVAL; |
3590 | 3767 | ||
3591 | err = hdmi_avi_infoframe_init(frame); |
3768 | err = hdmi_avi_infoframe_init(frame); |
3592 | if (err < 0) |
3769 | if (err < 0) |
3593 | return err; |
3770 | return err; |
3594 | 3771 | ||
3595 | if (mode->flags & DRM_MODE_FLAG_DBLCLK) |
3772 | if (mode->flags & DRM_MODE_FLAG_DBLCLK) |
3596 | frame->pixel_repeat = 1; |
3773 | frame->pixel_repeat = 1; |
3597 | 3774 | ||
3598 | frame->video_code = drm_match_cea_mode(mode); |
3775 | frame->video_code = drm_match_cea_mode(mode); |
3599 | 3776 | ||
3600 | frame->picture_aspect = HDMI_PICTURE_ASPECT_NONE; |
3777 | frame->picture_aspect = HDMI_PICTURE_ASPECT_NONE; |
- | 3778 | ||
- | 3779 | /* |
|
- | 3780 | * Populate picture aspect ratio from either |
|
- | 3781 | * user input (if specified) or from the CEA mode list. |
|
- | 3782 | */ |
|
- | 3783 | if (mode->picture_aspect_ratio == HDMI_PICTURE_ASPECT_4_3 || |
|
- | 3784 | mode->picture_aspect_ratio == HDMI_PICTURE_ASPECT_16_9) |
|
- | 3785 | frame->picture_aspect = mode->picture_aspect_ratio; |
|
- | 3786 | else if (frame->video_code > 0) |
|
- | 3787 | frame->picture_aspect = drm_get_cea_aspect_ratio( |
|
- | 3788 | frame->video_code); |
|
- | 3789 | ||
3601 | frame->active_aspect = HDMI_ACTIVE_ASPECT_PICTURE; |
3790 | frame->active_aspect = HDMI_ACTIVE_ASPECT_PICTURE; |
- | 3791 | frame->scan_mode = HDMI_SCAN_MODE_UNDERSCAN; |
|
3602 | 3792 | ||
3603 | return 0; |
3793 | return 0; |
3604 | } |
3794 | } |
3605 | EXPORT_SYMBOL(drm_hdmi_avi_infoframe_from_display_mode); |
3795 | EXPORT_SYMBOL(drm_hdmi_avi_infoframe_from_display_mode); |
3606 | 3796 | ||
3607 | static enum hdmi_3d_structure |
3797 | static enum hdmi_3d_structure |
3608 | s3d_structure_from_display_mode(const struct drm_display_mode *mode) |
3798 | s3d_structure_from_display_mode(const struct drm_display_mode *mode) |
3609 | { |
3799 | { |
3610 | u32 layout = mode->flags & DRM_MODE_FLAG_3D_MASK; |
3800 | u32 layout = mode->flags & DRM_MODE_FLAG_3D_MASK; |
3611 | 3801 | ||
3612 | switch (layout) { |
3802 | switch (layout) { |
3613 | case DRM_MODE_FLAG_3D_FRAME_PACKING: |
3803 | case DRM_MODE_FLAG_3D_FRAME_PACKING: |
3614 | return HDMI_3D_STRUCTURE_FRAME_PACKING; |
3804 | return HDMI_3D_STRUCTURE_FRAME_PACKING; |
3615 | case DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE: |
3805 | case DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE: |
3616 | return HDMI_3D_STRUCTURE_FIELD_ALTERNATIVE; |
3806 | return HDMI_3D_STRUCTURE_FIELD_ALTERNATIVE; |
3617 | case DRM_MODE_FLAG_3D_LINE_ALTERNATIVE: |
3807 | case DRM_MODE_FLAG_3D_LINE_ALTERNATIVE: |
3618 | return HDMI_3D_STRUCTURE_LINE_ALTERNATIVE; |
3808 | return HDMI_3D_STRUCTURE_LINE_ALTERNATIVE; |
3619 | case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL: |
3809 | case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL: |
3620 | return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_FULL; |
3810 | return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_FULL; |
3621 | case DRM_MODE_FLAG_3D_L_DEPTH: |
3811 | case DRM_MODE_FLAG_3D_L_DEPTH: |
3622 | return HDMI_3D_STRUCTURE_L_DEPTH; |
3812 | return HDMI_3D_STRUCTURE_L_DEPTH; |
3623 | case DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH: |
3813 | case DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH: |
3624 | return HDMI_3D_STRUCTURE_L_DEPTH_GFX_GFX_DEPTH; |
3814 | return HDMI_3D_STRUCTURE_L_DEPTH_GFX_GFX_DEPTH; |
3625 | case DRM_MODE_FLAG_3D_TOP_AND_BOTTOM: |
3815 | case DRM_MODE_FLAG_3D_TOP_AND_BOTTOM: |
3626 | return HDMI_3D_STRUCTURE_TOP_AND_BOTTOM; |
3816 | return HDMI_3D_STRUCTURE_TOP_AND_BOTTOM; |
3627 | case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF: |
3817 | case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF: |
3628 | return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_HALF; |
3818 | return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_HALF; |
3629 | default: |
3819 | default: |
3630 | return HDMI_3D_STRUCTURE_INVALID; |
3820 | return HDMI_3D_STRUCTURE_INVALID; |
3631 | } |
3821 | } |
3632 | } |
3822 | } |
3633 | 3823 | ||
3634 | /** |
3824 | /** |
3635 | * drm_hdmi_vendor_infoframe_from_display_mode() - fill an HDMI infoframe with |
3825 | * drm_hdmi_vendor_infoframe_from_display_mode() - fill an HDMI infoframe with |
3636 | * data from a DRM display mode |
3826 | * data from a DRM display mode |
3637 | * @frame: HDMI vendor infoframe |
3827 | * @frame: HDMI vendor infoframe |
3638 | * @mode: DRM display mode |
3828 | * @mode: DRM display mode |
3639 | * |
3829 | * |
3640 | * Note that there's is a need to send HDMI vendor infoframes only when using a |
3830 | * Note that there's is a need to send HDMI vendor infoframes only when using a |
3641 | * 4k or stereoscopic 3D mode. So when giving any other mode as input this |
3831 | * 4k or stereoscopic 3D mode. So when giving any other mode as input this |
3642 | * function will return -EINVAL, error that can be safely ignored. |
3832 | * function will return -EINVAL, error that can be safely ignored. |
3643 | * |
3833 | * |
3644 | * Returns 0 on success or a negative error code on failure. |
3834 | * Return: 0 on success or a negative error code on failure. |
3645 | */ |
3835 | */ |
3646 | int |
3836 | int |
3647 | drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame, |
3837 | drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame, |
3648 | const struct drm_display_mode *mode) |
3838 | const struct drm_display_mode *mode) |
3649 | { |
3839 | { |
3650 | int err; |
3840 | int err; |
3651 | u32 s3d_flags; |
3841 | u32 s3d_flags; |
3652 | u8 vic; |
3842 | u8 vic; |
3653 | 3843 | ||
3654 | if (!frame || !mode) |
3844 | if (!frame || !mode) |
3655 | return -EINVAL; |
3845 | return -EINVAL; |
3656 | 3846 | ||
3657 | vic = drm_match_hdmi_mode(mode); |
3847 | vic = drm_match_hdmi_mode(mode); |
3658 | s3d_flags = mode->flags & DRM_MODE_FLAG_3D_MASK; |
3848 | s3d_flags = mode->flags & DRM_MODE_FLAG_3D_MASK; |
3659 | 3849 | ||
3660 | if (!vic && !s3d_flags) |
3850 | if (!vic && !s3d_flags) |
3661 | return -EINVAL; |
3851 | return -EINVAL; |
3662 | 3852 | ||
3663 | if (vic && s3d_flags) |
3853 | if (vic && s3d_flags) |
3664 | return -EINVAL; |
3854 | return -EINVAL; |
3665 | 3855 | ||
3666 | err = hdmi_vendor_infoframe_init(frame); |
3856 | err = hdmi_vendor_infoframe_init(frame); |
3667 | if (err < 0) |
3857 | if (err < 0) |
3668 | return err; |
3858 | return err; |
3669 | 3859 | ||
3670 | if (vic) |
3860 | if (vic) |
3671 | frame->vic = vic; |
3861 | frame->vic = vic; |
3672 | else |
3862 | else |
3673 | frame->s3d_struct = s3d_structure_from_display_mode(mode); |
3863 | frame->s3d_struct = s3d_structure_from_display_mode(mode); |
3674 | 3864 | ||
3675 | return 0; |
3865 | return 0; |
3676 | } |
3866 | } |
3677 | EXPORT_SYMBOL(drm_hdmi_vendor_infoframe_from_display_mode);>>>>>>>>>>>><>><>><>>><>>>><>><>>>>><>>><>><>>>>><>>><>><>><>>><>><>><>>>>>>>>><>><>><>><>><>>><>>>>=>><>><>><>>>>>=>=>=>=>><>><>>>><>><>><>><>><>><>><>><>>>><>=>>>>> |
3867 | EXPORT_SYMBOL(drm_hdmi_vendor_infoframe_from_display_mode);>>>>>>>>>>>>><>><>><>>><>>>><>><>>>>><>>><>><>>>>><>>><>><>><>>><>><>><>>>>>>>>><>><>><>><>><>>><>>>>=>><>><>><>>>>>=>=>=>=>><>><>>>><>><>><>><>><>><>><>><>>>><>=>>>>> |
3678 | >>><>>=>>=>>>>><>><>><>><>><>><>><>><>><> |
3868 | >>><>>=>>=>>>>><>><>><>><>><>><>><>><>><>><> |