WebSVN – Kolibri OS – Diff – /contrib/sdk/sources/Intel-2D/sna/sna.c


/**************************************************************************
 
Copyright 2001 VA Linux Systems Inc., Fremont, California.
Copyright © 2002 by David Dawes
 
All Rights Reserved.
 
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
to deal in the Software without restriction, including without limitation
on the rights to use, copy, modify, merge, publish, distribute, sub
license, and/or sell copies of the Software, and to permit persons to whom
the Software is furnished to do so, subject to the following conditions:
 
The above copyright notice and this permission notice (including the next
paragraph) shall be included in all copies or substantial portions of the
Software.
 
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
THE COPYRIGHT HOLDERS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
USE OR OTHER DEALINGS IN THE SOFTWARE.
 
**************************************************************************/
 
/*
 * Authors: Jeff Hartmann 
 *          Abraham van der Merwe 
 *          David Dawes 
 *          Alan Hourihane 
 */
 
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
 
#include 
#include 
#include "i915_pciids.h"
 
#include "compiler.h"
#include "sna.h"
#include "sna_reg.h"
 
#include 
#include "../pixdriver.h"
 
#include 
 
#define to_surface(x) (surface_t*)((x)->handle)
 
typedef struct {
    int l;
    int t;
    int r;
    int b;
} rect_t;
 
static struct sna_fb sna_fb;
static int    tls_mask;
 
int tls_alloc(void);
 
static inline void *tls_get(int key)
{
    void *val;
    __asm__ __volatile__(
    "movl %%fs:(%1), %0"
    :"=r"(val)
    :"r"(key));
 
  return val;
};
 
static inline int
tls_set(int key, const void *ptr)
{
    if(!(key & 3))
    {
        __asm__ __volatile__(
        "movl %0, %%fs:(%1)"
        ::"r"(ptr),"r"(key));
        return 0;
    }
    else return -1;
}
 
 
 
 
int kgem_init_fb(struct kgem *kgem, struct sna_fb *fb);
int kgem_update_fb(struct kgem *kgem, struct sna_fb *fb);
uint32_t kgem_surface_size(struct kgem *kgem,bool relaxed_fencing,
				  unsigned flags, uint32_t width, uint32_t height,
				  uint32_t bpp, uint32_t tiling, uint32_t *pitch);
struct kgem_bo *kgem_bo_from_handle(struct kgem *kgem, int handle,
                        int pitch, int height);
 
void kgem_close_batches(struct kgem *kgem);
void sna_bo_destroy(struct kgem *kgem, struct kgem_bo *bo);
 
 
static bool sna_solid_cache_init(struct sna *sna);
 
struct sna *sna_device;
 
__LOCK_INIT_RECURSIVE(, __sna_lock);
 
static void no_render_reset(struct sna *sna)
{
	(void)sna;
}
 
static void no_render_flush(struct sna *sna)
{
	(void)sna;
}
 
static void
no_render_context_switch(struct kgem *kgem,
			 int new_mode)
{
	if (!kgem->nbatch)
		return;
 
	if (kgem_ring_is_idle(kgem, kgem->ring)) {
		DBG(("%s: GPU idle, flushing\n", __FUNCTION__));
		_kgem_submit(kgem);
	}
 
	(void)new_mode;
}
 
static void
no_render_retire(struct kgem *kgem)
{
	(void)kgem;
}
 
static void
no_render_expire(struct kgem *kgem)
{
	(void)kgem;
}
 
static void
no_render_fini(struct sna *sna)
{
	(void)sna;
}
 
const char *no_render_init(struct sna *sna)
{
    struct sna_render *render = &sna->render;
 
    memset (render,0, sizeof (*render));
 
    render->prefer_gpu = PREFER_GPU_BLT;
 
    render->vertices = render->vertex_data;
    render->vertex_size = ARRAY_SIZE(render->vertex_data);
 
    render->reset = no_render_reset;
	render->flush = no_render_flush;
	render->fini = no_render_fini;
 
	sna->kgem.context_switch = no_render_context_switch;
	sna->kgem.retire = no_render_retire;
	sna->kgem.expire = no_render_expire;
 
	sna->kgem.mode = KGEM_RENDER;
	sna->kgem.ring = KGEM_RENDER;
 
	sna_vertex_init(sna);
	return "generic";
 }
 
void sna_vertex_init(struct sna *sna)
{
//    pthread_mutex_init(&sna->render.lock, NULL);
//    pthread_cond_init(&sna->render.wait, NULL);
    sna->render.active = 0;
}
 
int sna_accel_init(struct sna *sna)
{
    const char *backend;
 
	backend = no_render_init(sna);
	if (sna->info->gen >= 0100)
		(void)backend;
	else if (sna->info->gen >= 070)
		backend = gen7_render_init(sna, backend);
	else if (sna->info->gen >= 060)
		backend = gen6_render_init(sna, backend);
	else if (sna->info->gen >= 050)
		backend = gen5_render_init(sna, backend);
	else if (sna->info->gen >= 040)
		backend = gen4_render_init(sna, backend);
	else if (sna->info->gen >= 030)
		backend = gen3_render_init(sna, backend);
 
	DBG(("%s(backend=%s, prefer_gpu=%x)\n",
	     __FUNCTION__, backend, sna->render.prefer_gpu));
 
	kgem_reset(&sna->kgem);
 
    sna_device = sna;
 
    return kgem_init_fb(&sna->kgem, &sna_fb);
}
 
 
#if 0
 
static bool sna_solid_cache_init(struct sna *sna)
{
    struct sna_solid_cache *cache = &sna->render.solid_cache;
 
    DBG(("%s\n", __FUNCTION__));
 
    cache->cache_bo =
        kgem_create_linear(&sna->kgem, sizeof(cache->color));
    if (!cache->cache_bo)
        return FALSE;
 
    /*
     * Initialise [0] with white since it is very common and filling the
     * zeroth slot simplifies some of the checks.
     */
    cache->color[0] = 0xffffffff;
    cache->bo[0] = kgem_create_proxy(cache->cache_bo, 0, sizeof(uint32_t));
    cache->bo[0]->pitch = 4;
    cache->dirty = 1;
    cache->size = 1;
    cache->last = 0;
 
    return TRUE;
}
 
void
sna_render_flush_solid(struct sna *sna)
{
    struct sna_solid_cache *cache = &sna->render.solid_cache;
 
    DBG(("sna_render_flush_solid(size=%d)\n", cache->size));
    assert(cache->dirty);
    assert(cache->size);
 
    kgem_bo_write(&sna->kgem, cache->cache_bo,
              cache->color, cache->size*sizeof(uint32_t));
    cache->dirty = 0;
    cache->last = 0;
}
 
static void
sna_render_finish_solid(struct sna *sna, bool force)
{
    struct sna_solid_cache *cache = &sna->render.solid_cache;
    int i;
 
    DBG(("sna_render_finish_solid(force=%d, domain=%d, busy=%d, dirty=%d)\n",
         force, cache->cache_bo->domain, cache->cache_bo->rq != NULL, cache->dirty));
 
    if (!force && cache->cache_bo->domain != DOMAIN_GPU)
        return;
 
    if (cache->dirty)
        sna_render_flush_solid(sna);
 
    for (i = 0; i < cache->size; i++) {
        if (cache->bo[i] == NULL)
            continue;
 
        kgem_bo_destroy(&sna->kgem, cache->bo[i]);
        cache->bo[i] = NULL;
    }
    kgem_bo_destroy(&sna->kgem, cache->cache_bo);
 
    DBG(("sna_render_finish_solid reset\n"));
 
    cache->cache_bo = kgem_create_linear(&sna->kgem, sizeof(cache->color));
    cache->bo[0] = kgem_create_proxy(cache->cache_bo, 0, sizeof(uint32_t));
    cache->bo[0]->pitch = 4;
    if (force)
        cache->size = 1;
}
 
 
struct kgem_bo *
sna_render_get_solid(struct sna *sna, uint32_t color)
{
    struct sna_solid_cache *cache = &sna->render.solid_cache;
    int i;
 
    DBG(("%s: %08x\n", __FUNCTION__, color));
 
//    if ((color & 0xffffff) == 0) /* alpha only */
//        return kgem_bo_reference(sna->render.alpha_cache.bo[color>>24]);
 
    if (color == 0xffffffff) {
        DBG(("%s(white)\n", __FUNCTION__));
        return kgem_bo_reference(cache->bo[0]);
    }
 
    if (cache->color[cache->last] == color) {
        DBG(("sna_render_get_solid(%d) = %x (last)\n",
             cache->last, color));
        return kgem_bo_reference(cache->bo[cache->last]);
    }
 
    for (i = 1; i < cache->size; i++) {
        if (cache->color[i] == color) {
            if (cache->bo[i] == NULL) {
                DBG(("sna_render_get_solid(%d) = %x (recreate)\n",
                     i, color));
                goto create;
            } else {
                DBG(("sna_render_get_solid(%d) = %x (old)\n",
                     i, color));
                goto done;
            }
        }
    }
 
    sna_render_finish_solid(sna, i == ARRAY_SIZE(cache->color));
 
    i = cache->size++;
    cache->color[i] = color;
    cache->dirty = 1;
    DBG(("sna_render_get_solid(%d) = %x (new)\n", i, color));
 
create:
    cache->bo[i] = kgem_create_proxy(cache->cache_bo,
                     i*sizeof(uint32_t), sizeof(uint32_t));
    cache->bo[i]->pitch = 4;
 
done:
    cache->last = i;
    return kgem_bo_reference(cache->bo[i]);
}
 
#endif
 
 
int sna_blit_copy(bitmap_t *src_bitmap, int dst_x, int dst_y,
                  int w, int h, int src_x, int src_y)
 
{
    struct sna_copy_op copy;
    struct _Pixmap src, dst;
    struct kgem_bo *src_bo;
 
    char proc_info[1024];
    int winx, winy;
 
    get_proc_info(proc_info);
 
    winx = *(uint32_t*)(proc_info+34);
    winy = *(uint32_t*)(proc_info+38);
 
    memset(&src, 0, sizeof(src));
    memset(&dst, 0, sizeof(dst));
 
    src.drawable.bitsPerPixel = 32;
    src.drawable.width  = src_bitmap->width;
    src.drawable.height = src_bitmap->height;
 
    dst.drawable.bitsPerPixel = 32;
    dst.drawable.width  = sna_fb.width;
    dst.drawable.height = sna_fb.height;
 
    memset(©, 0, sizeof(copy));
 
    src_bo = (struct kgem_bo*)src_bitmap->handle;
 
    if( sna_device->render.copy(sna_device, GXcopy,
                                &src, src_bo,
                                &dst, sna_fb.fb_bo, ©) )
    {
        copy.blt(sna_device, ©, src_x, src_y, w, h, winx+dst_x, winy+dst_y);
        copy.done(sna_device, ©);
    }
 
    kgem_submit(&sna_device->kgem);
 
    return 0;
 
//    __asm__ __volatile__("int3");
 
};
 
typedef struct
{
    uint32_t        width;
    uint32_t        height;
    void           *data;
    uint32_t        pitch;
    struct kgem_bo *bo;
    uint32_t        bo_size;
    uint32_t        flags;
}surface_t;
 
 
 
 
#define MI_LOAD_REGISTER_IMM		(0x22<<23)
#define MI_WAIT_FOR_EVENT			(0x03<<23)
 
static bool sna_emit_wait_for_scanline_hsw(struct sna *sna,
                        rect_t *crtc,
                        int pipe, int y1, int y2,
                        bool full_height)
{
    uint32_t event;
    uint32_t *b;
 
    if (!sna->kgem.has_secure_batches)
        return false;
 
    b = kgem_get_batch(&sna->kgem);
    sna->kgem.nbatch += 17;
 
    switch (pipe) {
    default: assert(0);
    case 0: event = 1 << 0; break;
    case 1: event = 1 << 8; break;
    case 2: event = 1 << 14; break;
    }
 
    b[0] = MI_LOAD_REGISTER_IMM | 1;
    b[1] = 0x44050; /* DERRMR */
    b[2] = ~event;
    b[3] = MI_LOAD_REGISTER_IMM | 1;
    b[4] = 0xa188; /* FORCEWAKE_MT */
    b[5] = 2 << 16 | 2;
 
    /* The documentation says that the LOAD_SCAN_LINES command
     * always comes in pairs. Don't ask me why. */
    switch (pipe) {
    default: assert(0);
    case 0: event = 0 << 19; break;
    case 1: event = 1 << 19; break;
    case 2: event = 4 << 19; break;
    }
    b[8] = b[6] = MI_LOAD_SCAN_LINES_INCL | event;
    b[9] = b[7] = (y1 << 16) | (y2-1);
 
    switch (pipe) {
    default: assert(0);
    case 0: event = 1 << 0; break;
    case 1: event = 1 << 8; break;
    case 2: event = 1 << 14; break;
    }
    b[10] = MI_WAIT_FOR_EVENT | event;
 
    b[11] = MI_LOAD_REGISTER_IMM | 1;
    b[12] = 0xa188; /* FORCEWAKE_MT */
    b[13] = 2 << 16;
    b[14] = MI_LOAD_REGISTER_IMM | 1;
    b[15] = 0x44050; /* DERRMR */
    b[16] = ~0;
 
    sna->kgem.batch_flags |= I915_EXEC_SECURE;
    return true;
}
 
 
static bool sna_emit_wait_for_scanline_ivb(struct sna *sna,
                        rect_t *crtc,
                        int pipe, int y1, int y2,
                        bool full_height)
{
    uint32_t *b;
    uint32_t event;
    uint32_t forcewake;
 
    if (!sna->kgem.has_secure_batches)
        return false;
 
    assert(y1 >= 0);
    assert(y2 > y1);
    assert(sna->kgem.mode);
 
    /* Always program one less than the desired value */
    if (--y1 < 0)
        y1 = crtc->b;
    y2--;
 
    switch (pipe) {
    default:
        assert(0);
    case 0:
        event = 1 << (full_height ? 3 : 0);
        break;
    case 1:
        event = 1 << (full_height ? 11 : 8);
        break;
    case 2:
        event = 1 << (full_height ? 21 : 14);
        break;
    }
 
    if (sna->kgem.gen == 071)
        forcewake = 0x1300b0; /* FORCEWAKE_VLV */
    else
        forcewake = 0xa188; /* FORCEWAKE_MT */
 
    b = kgem_get_batch(&sna->kgem);
 
    /* Both the LRI and WAIT_FOR_EVENT must be in the same cacheline */
    if (((sna->kgem.nbatch + 6) >> 4) != (sna->kgem.nbatch + 10) >> 4) {
        int dw = sna->kgem.nbatch + 6;
        dw = ALIGN(dw, 16) - dw;
        while (dw--)
            *b++ = MI_NOOP;
    }
 
    b[0] = MI_LOAD_REGISTER_IMM | 1;
    b[1] = 0x44050; /* DERRMR */
    b[2] = ~event;
    b[3] = MI_LOAD_REGISTER_IMM | 1;
    b[4] = forcewake;
    b[5] = 2 << 16 | 2;
    b[6] = MI_LOAD_REGISTER_IMM | 1;
    b[7] = 0x70068 + 0x1000 * pipe;
    b[8] = (1 << 31) | (1 << 30) | (y1 << 16) | y2;
    b[9] = MI_WAIT_FOR_EVENT | event;
    b[10] = MI_LOAD_REGISTER_IMM | 1;
    b[11] = forcewake;
    b[12] = 2 << 16;
    b[13] = MI_LOAD_REGISTER_IMM | 1;
    b[14] = 0x44050; /* DERRMR */
    b[15] = ~0;
 
    sna->kgem.nbatch = b - sna->kgem.batch + 16;
 
    sna->kgem.batch_flags |= I915_EXEC_SECURE;
    return true;
}
 
 
static bool sna_emit_wait_for_scanline_gen6(struct sna *sna,
                        rect_t *crtc,
					    int pipe, int y1, int y2,
					    bool full_height)
{
	uint32_t *b;
	uint32_t event;
 
//	if (!sna->kgem.has_secure_batches)
//		return false;
 
	assert(y1 >= 0);
	assert(y2 > y1);
	assert(sna->kgem.mode == KGEM_RENDER);
 
	/* Always program one less than the desired value */
	if (--y1 < 0)
		y1 = crtc->b;
	y2--;
 
	/* The scanline granularity is 3 bits */
	y1 &= ~7;
	y2 &= ~7;
	if (y2 == y1)
		return false;
 
	event = 1 << (3*full_height + pipe*8);
 
	b = kgem_get_batch(&sna->kgem);
	sna->kgem.nbatch += 10;
 
	b[0] = MI_LOAD_REGISTER_IMM | 1;
	b[1] = 0x44050; /* DERRMR */
	b[2] = ~event;
	b[3] = MI_LOAD_REGISTER_IMM | 1;
	b[4] = 0x4f100; /* magic */
	b[5] = (1 << 31) | (1 << 30) | pipe << 29 | (y1 << 16) | y2;
	b[6] = MI_WAIT_FOR_EVENT | event;
	b[7] = MI_LOAD_REGISTER_IMM | 1;
	b[8] = 0x44050; /* DERRMR */
	b[9] = ~0;
 
	sna->kgem.batch_flags |= I915_EXEC_SECURE;
 
	return true;
}
 
static bool sna_emit_wait_for_scanline_gen4(struct sna *sna,
                        rect_t *crtc,
                        int pipe, int y1, int y2,
                        bool full_height)
{
    uint32_t event;
    uint32_t *b;
 
    if (pipe == 0) {
        if (full_height)
            event = MI_WAIT_FOR_PIPEA_SVBLANK;
        else
            event = MI_WAIT_FOR_PIPEA_SCAN_LINE_WINDOW;
    } else {
        if (full_height)
            event = MI_WAIT_FOR_PIPEB_SVBLANK;
        else
            event = MI_WAIT_FOR_PIPEB_SCAN_LINE_WINDOW;
    }
 
    b = kgem_get_batch(&sna->kgem);
    sna->kgem.nbatch += 5;
 
    /* The documentation says that the LOAD_SCAN_LINES command
     * always comes in pairs. Don't ask me why. */
    b[2] = b[0] = MI_LOAD_SCAN_LINES_INCL | pipe << 20;
    b[3] = b[1] = (y1 << 16) | (y2-1);
    b[4] = MI_WAIT_FOR_EVENT | event;
 
    return true;
}
 
static bool sna_emit_wait_for_scanline_gen2(struct sna *sna,
                        rect_t *crtc,
                        int pipe, int y1, int y2,
                        bool full_height)
{
    uint32_t *b;
 
    /*
     * Pre-965 doesn't have SVBLANK, so we need a bit
     * of extra time for the blitter to start up and
     * do its job for a full height blit
     */
    if (full_height)
        y2 -= 2;
 
    b = kgem_get_batch(&sna->kgem);
    sna->kgem.nbatch += 5;
 
    /* The documentation says that the LOAD_SCAN_LINES command
     * always comes in pairs. Don't ask me why. */
    b[2] = b[0] = MI_LOAD_SCAN_LINES_INCL | pipe << 20;
    b[3] = b[1] = (y1 << 16) | (y2-1);
    b[4] = MI_WAIT_FOR_EVENT | 1 << (1 + 4*pipe);
 
    return true;
}
 
bool
sna_wait_for_scanline(struct sna *sna,
		      rect_t *crtc,
		      rect_t *clip)
{
	bool full_height;
	int y1, y2, pipe;
	bool ret;
 
//	if (sna->flags & SNA_NO_VSYNC)
//		return false;
 
	/*
	 * Make sure we don't wait for a scanline that will
	 * never occur
	 */
	y1 = clip->t - crtc->t;
    if (y1 < 1)
        y1 = 1;
	y2 = clip->b - crtc->t;
	if (y2 > crtc->b - crtc->t)
		y2 = crtc->b - crtc->t;
//	DBG(("%s: clipped range = %d, %d\n", __FUNCTION__, y1, y2));
//	printf("%s: clipped range = %d, %d\n", __FUNCTION__, y1, y2);
 
	if (y2 <= y1 + 4)
		return false;
 
	full_height = y1 == 0 && y2 == crtc->b - crtc->t;
 
    pipe = sna_fb.pipe;
	DBG(("%s: pipe=%d, y1=%d, y2=%d, full_height?=%d\n",
	     __FUNCTION__, pipe, y1, y2, full_height));
 
	if (sna->kgem.gen >= 0100)
		ret = false;
    else if (sna->kgem.gen >= 075)
        ret = sna_emit_wait_for_scanline_hsw(sna, crtc, pipe, y1, y2, full_height);
    else if (sna->kgem.gen >= 070)
        ret = sna_emit_wait_for_scanline_ivb(sna, crtc, pipe, y1, y2, full_height);
	else if (sna->kgem.gen >= 060)
		ret =sna_emit_wait_for_scanline_gen6(sna, crtc, pipe, y1, y2, full_height);
    else if (sna->kgem.gen >= 040)
        ret = sna_emit_wait_for_scanline_gen4(sna, crtc, pipe, y1, y2, full_height);
    else
        ret = sna_emit_wait_for_scanline_gen2(sna, crtc, pipe, y1, y2, full_height);
 
	return ret;
}
 
 
 
 
 
 
 
 
int intel_get_device_id(struct sna *sna)
{
    struct drm_i915_getparam gp;
    int devid = 0;
 
    memset(&gp, 0, sizeof(gp));
    gp.param = I915_PARAM_CHIPSET_ID;
    gp.value = &devid;
 
    if (drmIoctl(sna->scrn, DRM_IOCTL_I915_GETPARAM, &gp))
        return 0;
    return devid;
}
 
static const struct intel_device_info intel_generic_info = {
	.gen = -1,
};
 
static const struct intel_device_info intel_i915_info = {
	.gen = 030,
};
static const struct intel_device_info intel_i945_info = {
	.gen = 031,
};
 
static const struct intel_device_info intel_g33_info = {
	.gen = 033,
};
 
static const struct intel_device_info intel_i965_info = {
	.gen = 040,
};
 
static const struct intel_device_info intel_g4x_info = {
	.gen = 045,
};
 
static const struct intel_device_info intel_ironlake_info = {
	.gen = 050,
};
 
static const struct intel_device_info intel_sandybridge_info = {
	.gen = 060,
};
 
static const struct intel_device_info intel_ivybridge_info = {
	.gen = 070,
};
 
static const struct intel_device_info intel_valleyview_info = {
	.gen = 071,
};
 
static const struct intel_device_info intel_haswell_info = {
	.gen = 075,
};
 
#define INTEL_DEVICE_MATCH(d,i) \
    { 0x8086, (d), PCI_MATCH_ANY, PCI_MATCH_ANY, 0x3 << 16, 0xff << 16, (intptr_t)(i) }
 
 
static const struct pci_id_match intel_device_match[] = {
 
	INTEL_I915G_IDS(&intel_i915_info),
	INTEL_I915GM_IDS(&intel_i915_info),
	INTEL_I945G_IDS(&intel_i945_info),
	INTEL_I945GM_IDS(&intel_i945_info),
 
	INTEL_G33_IDS(&intel_g33_info),
	INTEL_PINEVIEW_IDS(&intel_g33_info),
 
	INTEL_I965G_IDS(&intel_i965_info),
	INTEL_I965GM_IDS(&intel_i965_info),
 
	INTEL_G45_IDS(&intel_g4x_info),
	INTEL_GM45_IDS(&intel_g4x_info),
 
	INTEL_IRONLAKE_D_IDS(&intel_ironlake_info),
	INTEL_IRONLAKE_M_IDS(&intel_ironlake_info),
 
	INTEL_SNB_D_IDS(&intel_sandybridge_info),
	INTEL_SNB_M_IDS(&intel_sandybridge_info),
 
	INTEL_IVB_D_IDS(&intel_ivybridge_info),
	INTEL_IVB_M_IDS(&intel_ivybridge_info),
 
	INTEL_HSW_D_IDS(&intel_haswell_info),
	INTEL_HSW_M_IDS(&intel_haswell_info),
 
	INTEL_VLV_D_IDS(&intel_valleyview_info),
	INTEL_VLV_M_IDS(&intel_valleyview_info),
 
	INTEL_VGA_DEVICE(PCI_MATCH_ANY, &intel_generic_info),
 
	{ 0, 0, 0 },
};
 
const struct pci_id_match *PciDevMatch(uint16_t dev,const struct pci_id_match *list)
{
    while(list->device_id)
    {
        if(dev==list->device_id)
            return list;
        list++;
    }
    return NULL;
}
 
const struct intel_device_info *
intel_detect_chipset(struct pci_device *pci)
{
    const struct pci_id_match *ent = NULL;
 
    ent = PciDevMatch(pci->device_id, intel_device_match);
 
    if(ent != NULL)
        return (const struct intel_device_info*)ent->match_data;
    else
        return &intel_generic_info;
}
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
int drmIoctl(int fd, unsigned long request, void *arg)
{
    ioctl_t  io;
 
    io.handle   = fd;
    io.io_code  = request;
    io.input    = arg;
    io.inp_size = 64;
    io.output   = NULL;
    io.out_size = 0;
 
    return call_service(&io);
}
 
 
 
bool
gen6_composite(struct sna *sna,
              uint8_t op,
              PixmapPtr src, struct kgem_bo *src_bo,
              PixmapPtr mask,struct kgem_bo *mask_bo,
              PixmapPtr dst, struct kgem_bo *dst_bo,
              int32_t src_x, int32_t src_y,
              int32_t msk_x, int32_t msk_y,
              int32_t dst_x, int32_t dst_y,
              int32_t width, int32_t height,
              struct sna_composite_op *tmp);
 
//#define MAP(ptr) ((void*)((uintptr_t)(ptr) & ~3))
 
 
int sna_bitmap_from_handle(bitmap_t *bitmap, uint32_t handle)
{
    surface_t *sf;
    struct kgem_bo *bo;
 
    sf = malloc(sizeof(*sf));
    if(sf == NULL)
        goto err_1;
 
    __lock_acquire_recursive(__sna_lock);
 
    bo = kgem_bo_from_handle(&sna_device->kgem, handle, bitmap->pitch, bitmap->height);
 
    __lock_release_recursive(__sna_lock);
 
    sf->width   = bitmap->width;
    sf->height  = bitmap->height;
    sf->data    = NULL;
    sf->pitch   = bo->pitch;
    sf->bo      = bo;
    sf->bo_size = PAGE_SIZE * bo->size.pages.count;
    sf->flags   = bitmap->flags;
 
    bitmap->handle = (uint32_t)sf;
 
    return 0;
 
err_2:
    __lock_release_recursive(__sna_lock);
    free(sf);
err_1:
    return -1;
};
 
void sna_set_bo_handle(bitmap_t *bitmap, int handle)
{
    surface_t *sf = to_surface(bitmap);
    struct kgem_bo *bo = sf->bo;
    bo->handle = handle;
}
 
static int sna_create_bitmap(bitmap_t *bitmap)
{
    surface_t *sf;
    struct kgem_bo *bo;
 
    sf = malloc(sizeof(*sf));
    if(sf == NULL)
        goto err_1;
 
    __lock_acquire_recursive(__sna_lock);
 
    bo = kgem_create_2d(&sna_device->kgem, bitmap->width, bitmap->height,
                        32,I915_TILING_NONE, CREATE_CPU_MAP);
 
    if(bo == NULL)
        goto err_2;
 
    void *map = kgem_bo_map(&sna_device->kgem, bo);
    if(map == NULL)
        goto err_3;
 
    sf->width   = bitmap->width;
    sf->height  = bitmap->height;
    sf->data    = map;
    sf->pitch   = bo->pitch;
    sf->bo      = bo;
    sf->bo_size = PAGE_SIZE * bo->size.pages.count;
    sf->flags   = bitmap->flags;
 
    bitmap->handle = (uint32_t)sf;
    __lock_release_recursive(__sna_lock);
 
    return 0;
 
err_3:
    kgem_bo_destroy(&sna_device->kgem, bo);
err_2:
    __lock_release_recursive(__sna_lock);
    free(sf);
err_1:
    return -1;
};
 
static int sna_destroy_bitmap(bitmap_t *bitmap)
{
    surface_t *sf = to_surface(bitmap);
 
    __lock_acquire_recursive(__sna_lock);
 
    kgem_bo_destroy(&sna_device->kgem, sf->bo);
 
    __lock_release_recursive(__sna_lock);
 
    free(sf);
 
    bitmap->handle = -1;
    bitmap->data   = (void*)-1;
    bitmap->pitch  = -1;
 
    return 0;
};
 
static int sna_lock_bitmap(bitmap_t *bitmap)
{
    surface_t *sf = to_surface(bitmap);
 
//    printf("%s\n", __FUNCTION__);
    __lock_acquire_recursive(__sna_lock);
 
    kgem_bo_sync__cpu(&sna_device->kgem, sf->bo);
 
    __lock_release_recursive(__sna_lock);
 
    bitmap->data  = sf->data;
    bitmap->pitch = sf->pitch;
 
    return 0;
};
 
static int sna_resize_bitmap(bitmap_t *bitmap)
{
    surface_t *sf = to_surface(bitmap);
    struct kgem *kgem = &sna_device->kgem;
    struct kgem_bo *bo = sf->bo;
 
    uint32_t   size;
    uint32_t   pitch;
 
    bitmap->pitch = -1;
    bitmap->data = (void *) -1;
 
    size = kgem_surface_size(kgem,kgem->has_relaxed_fencing, CREATE_CPU_MAP,
                 bitmap->width, bitmap->height, 32, I915_TILING_NONE, &pitch);
    assert(size && size <= kgem->max_object_size);
 
    if(sf->bo_size >= size)
    {
        sf->width   = bitmap->width;
        sf->height  = bitmap->height;
        sf->pitch   = pitch;
        bo->pitch   = pitch;
 
        return 0;
    }
    else
    {
        __lock_acquire_recursive(__sna_lock);
 
        sna_bo_destroy(kgem, bo);
 
        sf->bo = NULL;
 
        bo = kgem_create_2d(kgem, bitmap->width, bitmap->height,
                            32, I915_TILING_NONE, CREATE_CPU_MAP);
 
        if(bo == NULL)
        {
            __lock_release_recursive(__sna_lock);
            return -1;
        };
 
        void *map = kgem_bo_map(kgem, bo);
        if(map == NULL)
        {
            sna_bo_destroy(kgem, bo);
            __lock_release_recursive(__sna_lock);
            return -1;
        };
 
        __lock_release_recursive(__sna_lock);
 
        sf->width   = bitmap->width;
        sf->height  = bitmap->height;
        sf->data    = map;
        sf->pitch   = bo->pitch;
        sf->bo      = bo;
        sf->bo_size = PAGE_SIZE * bo->size.pages.count;
    }
 
    return 0;
};
 
 
 
int sna_create_mask()
{
    struct kgem_bo *bo;
 
//    printf("%s width %d height %d\n", __FUNCTION__, sna_fb.width, sna_fb.height);
 
    __lock_acquire_recursive(__sna_lock);
 
    bo = kgem_create_2d(&sna_device->kgem, sna_fb.width, sna_fb.height,
                        8,I915_TILING_NONE, CREATE_CPU_MAP);
 
    if(unlikely(bo == NULL))
        goto err_1;
 
    int *map = kgem_bo_map(&sna_device->kgem, bo);
    if(map == NULL)
        goto err_2;
 
    __lock_release_recursive(__sna_lock);
 
    memset(map, 0, bo->pitch * sna_fb.height);
 
    tls_set(tls_mask, bo);
 
    return 0;
 
err_2:
    kgem_bo_destroy(&sna_device->kgem, bo);
err_1:
    __lock_release_recursive(__sna_lock);
    return -1;
};
 
 
 
int sna_blit_tex(bitmap_t *bitmap, int scale, int vsync,
                 int dst_x, int dst_y,int w, int h, int src_x, int src_y)
 
{
    surface_t *sf = to_surface(bitmap);
 
    struct drm_i915_mask_update update;
 
    struct sna_composite_op composite;
    struct _Pixmap src, dst, mask;
    struct kgem_bo *src_bo, *mask_bo;
    int winx, winy;
 
    char proc_info[1024];
 
    get_proc_info(proc_info);
 
    winx = *(uint32_t*)(proc_info+34);
    winy = *(uint32_t*)(proc_info+38);
//    winw = *(uint32_t*)(proc_info+42)+1;
//    winh = *(uint32_t*)(proc_info+46)+1;
 
    mask_bo = tls_get(tls_mask);
 
    if(unlikely(mask_bo == NULL))
    {
        sna_create_mask();
        mask_bo = tls_get(tls_mask);
        if( mask_bo == NULL)
            return -1;
    };
 
    if(kgem_update_fb(&sna_device->kgem, &sna_fb))
    {
        __lock_acquire_recursive(__sna_lock);
        kgem_bo_destroy(&sna_device->kgem, mask_bo);
        __lock_release_recursive(__sna_lock);
 
        sna_create_mask();
        mask_bo = tls_get(tls_mask);
        if( mask_bo == NULL)
            return -1;
    }
 
    VG_CLEAR(update);
    update.handle = mask_bo->handle;
    update.bo_map = (int)kgem_bo_map__cpu(&sna_device->kgem, mask_bo);
    drmIoctl(sna_device->kgem.fd, SRV_MASK_UPDATE, &update);
    mask_bo->pitch = update.bo_pitch;
 
    memset(&src, 0, sizeof(src));
    memset(&dst, 0, sizeof(dst));
    memset(&mask, 0, sizeof(dst));
 
    src.drawable.bitsPerPixel = 32;
 
    src.drawable.width  = sf->width;
    src.drawable.height = sf->height;
 
    dst.drawable.bitsPerPixel = 32;
    dst.drawable.width  = sna_fb.width;
    dst.drawable.height = sna_fb.height;
 
    mask.drawable.bitsPerPixel = 8;
    mask.drawable.width  = update.width;
    mask.drawable.height = update.height;
 
    memset(&composite, 0, sizeof(composite));
 
    src_bo = sf->bo;
 
    __lock_acquire_recursive(__sna_lock);
 
    if(vsync)
    {
        rect_t crtc, clip;
 
        crtc.l = 0;
        crtc.t = 0;
        crtc.r = sna_fb.width-1;
        crtc.b = sna_fb.height-1;
 
        clip.l = winx+dst_x;
        clip.t = winy+dst_y;
        clip.r = clip.l+w-1;
        clip.b = clip.t+h-1;
 
        kgem_set_mode(&sna_device->kgem, KGEM_RENDER, sna_fb.fb_bo);
        sna_wait_for_scanline(sna_device, &crtc, &clip);
    }
 
    if( sna_device->render.blit_tex(sna_device, PictOpSrc,scale,
              &src, src_bo,
              &mask, mask_bo,
              &dst, sna_fb.fb_bo,
              src_x, src_y,
              dst_x, dst_y,
              winx+dst_x, winy+dst_y,
              w, h,
              &composite) )
    {
        struct sna_composite_rectangles r;
 
        r.src.x = src_x;
        r.src.y = src_y;
        r.mask.x = dst_x;
        r.mask.y = dst_y;
        r.dst.x = winx+dst_x;
        r.dst.y = winy+dst_y;
        r.width  = w;
        r.height = h;
 
        composite.blt(sna_device, &composite, &r);
        composite.done(sna_device, &composite);
 
    };
 
    kgem_submit(&sna_device->kgem);
 
    __lock_release_recursive(__sna_lock);
 
    bitmap->data   = (void*)-1;
    bitmap->pitch  = -1;
 
    return 0;
}
 
 
static void sna_fini()
{
    if( sna_device )
    {
        struct kgem_bo *mask;
 
        __lock_acquire_recursive(__sna_lock);
 
        mask = tls_get(tls_mask);
 
        sna_device->render.fini(sna_device);
        if(mask)
            kgem_bo_destroy(&sna_device->kgem, mask);
//        kgem_close_batches(&sna_device->kgem);
        kgem_cleanup_cache(&sna_device->kgem);
 
        sna_device = NULL;
        __lock_release_recursive(__sna_lock);
    };
}
 
uint32_t DrvInit(uint32_t service, struct pix_driver *driver)
{
    ioctl_t   io;
    int caps = 0;
 
    static struct pci_device device;
    struct sna *sna;
 
    DBG(("%s\n", __FUNCTION__));
 
    __lock_acquire_recursive(__sna_lock);
 
    if(sna_device)
        goto done;
 
    io.handle   = service;
    io.io_code  = SRV_GET_PCI_INFO;
    io.input    = &device;
    io.inp_size = sizeof(device);
    io.output   = NULL;
    io.out_size = 0;
 
    if (call_service(&io)!=0)
        goto err1;
 
    sna = malloc(sizeof(*sna));
    if (sna == NULL)
        goto err1;
 
    memset(sna, 0, sizeof(*sna));
 
    sna->cpu_features = sna_cpu_detect();
 
    sna->PciInfo = &device;
    sna->info = intel_detect_chipset(sna->PciInfo);
    sna->scrn = service;
 
    kgem_init(&sna->kgem, service, sna->PciInfo, sna->info->gen);
 
    /* Disable tiling by default */
    sna->tiling = 0;
 
    /* Default fail-safe value of 75 Hz */
//    sna->vblank_interval = 1000 * 1000 * 1000 / 75;
 
    sna->flags = 0;
 
    sna_accel_init(sna);
 
    tls_mask = tls_alloc();
 
//    printf("tls mask %x\n", tls_mask);
 
    driver->create_bitmap  = sna_create_bitmap;
    driver->destroy_bitmap = sna_destroy_bitmap;
    driver->lock_bitmap    = sna_lock_bitmap;
    driver->blit           = sna_blit_tex;
    driver->resize_bitmap  = sna_resize_bitmap;
    driver->fini           = sna_fini;
done:
    caps = sna_device->render.caps;
 
err1:
    __lock_release_recursive(__sna_lock);
 
    return caps;
}
 
static>
 
static>
#define>
#define>

Rev 4377	Rev 4501
1	/**************************************************************************	1	/**************************************************************************
2		2
3	Copyright 2001 VA Linux Systems Inc., Fremont, California.	3	Copyright 2001 VA Linux Systems Inc., Fremont, California.
4	Copyright © 2002 by David Dawes	4	Copyright © 2002 by David Dawes
5		5
6	All Rights Reserved.	6	All Rights Reserved.
7		7
8	Permission is hereby granted, free of charge, to any person obtaining a	8	Permission is hereby granted, free of charge, to any person obtaining a
9	copy of this software and associated documentation files (the "Software"),	9	copy of this software and associated documentation files (the "Software"),
10	to deal in the Software without restriction, including without limitation	10	to deal in the Software without restriction, including without limitation
11	on the rights to use, copy, modify, merge, publish, distribute, sub	11	on the rights to use, copy, modify, merge, publish, distribute, sub
12	license, and/or sell copies of the Software, and to permit persons to whom	12	license, and/or sell copies of the Software, and to permit persons to whom
13	the Software is furnished to do so, subject to the following conditions:	13	the Software is furnished to do so, subject to the following conditions:
14		14
15	The above copyright notice and this permission notice (including the next	15	The above copyright notice and this permission notice (including the next
16	paragraph) shall be included in all copies or substantial portions of the	16	paragraph) shall be included in all copies or substantial portions of the
17	Software.	17	Software.
18		18
19	THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR	19	THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20	IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,	20	IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21	FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL	21	FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
22	THE COPYRIGHT HOLDERS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,	22	THE COPYRIGHT HOLDERS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
23	DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR	23	DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
24	OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE	24	OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
25	USE OR OTHER DEALINGS IN THE SOFTWARE.	25	USE OR OTHER DEALINGS IN THE SOFTWARE.
26		26
27	**************************************************************************/	27	**************************************************************************/
28		28
29	/*	29	/*
30	* Authors: Jeff Hartmann	30	* Authors: Jeff Hartmann
31	* Abraham van der Merwe	31	* Abraham van der Merwe
32	* David Dawes	32	* David Dawes
33	* Alan Hourihane	33	* Alan Hourihane
34	*/	34	*/
35		35
36	#ifdef HAVE_CONFIG_H	36	#ifdef HAVE_CONFIG_H
37	#include "config.h"	37	#include "config.h"
38	#endif	38	#endif
39		39
40	#include	40	#include
41	#include	41	#include
42	#include "i915_pciids.h"	42	#include "i915_pciids.h"
43		43
44	#include "compiler.h"	44	#include "compiler.h"
45	#include "sna.h"	45	#include "sna.h"
46	#include "sna_reg.h"	46	#include "sna_reg.h"
47		47
48	#include	48	#include
49	#include "../pixdriver.h"	49	#include "../pixdriver.h"
50		50
51	#include	51	#include
52		52
53	#define to_surface(x) (surface_t*)((x)->handle)	53	#define to_surface(x) (surface_t*)((x)->handle)
54		54
55	typedef struct {	55	typedef struct {
56	int l;	56	int l;
57	int t;	57	int t;
58	int r;	58	int r;
59	int b;	59	int b;
60	} rect_t;	60	} rect_t;
61		61
62	static struct sna_fb sna_fb;	62	static struct sna_fb sna_fb;
63	static int tls_mask;	63	static int tls_mask;
64		64
65	int tls_alloc(void);	65	int tls_alloc(void);
66		66
67	static inline void *tls_get(int key)	67	static inline void *tls_get(int key)
68	{	68	{
69	void *val;	69	void *val;
70	__asm__ __volatile__(	70	__asm__ __volatile__(
71	"movl %%fs:(%1), %0"	71	"movl %%fs:(%1), %0"
72	:"=r"(val)	72	:"=r"(val)
73	:"r"(key));	73	:"r"(key));
74		74
75	return val;	75	return val;
76	};	76	};
77		77
78	static inline int	78	static inline int
79	tls_set(int key, const void *ptr)	79	tls_set(int key, const void *ptr)
80	{	80	{
81	if(!(key & 3))	81	if(!(key & 3))
82	{	82	{
83	__asm__ __volatile__(	83	__asm__ __volatile__(
84	"movl %0, %%fs:(%1)"	84	"movl %0, %%fs:(%1)"
85	::"r"(ptr),"r"(key));	85	::"r"(ptr),"r"(key));
86	return 0;	86	return 0;
87	}	87	}
88	else return -1;	88	else return -1;
89	}	89	}
90		90
91		91
92		92
93		93
94	int kgem_init_fb(struct kgem kgem, struct sna_fb fb);	94	int kgem_init_fb(struct kgem kgem, struct sna_fb fb);
95	int kgem_update_fb(struct kgem kgem, struct sna_fb fb);	95	int kgem_update_fb(struct kgem kgem, struct sna_fb fb);
96	uint32_t kgem_surface_size(struct kgem *kgem,bool relaxed_fencing,	96	uint32_t kgem_surface_size(struct kgem *kgem,bool relaxed_fencing,
97	unsigned flags, uint32_t width, uint32_t height,	97	unsigned flags, uint32_t width, uint32_t height,
98	uint32_t bpp, uint32_t tiling, uint32_t *pitch);	98	uint32_t bpp, uint32_t tiling, uint32_t *pitch);
99	struct kgem_bo kgem_bo_from_handle(struct kgem kgem, int handle,	99	struct kgem_bo kgem_bo_from_handle(struct kgem kgem, int handle,
100	int pitch, int height);	100	int pitch, int height);
101		101
102	void kgem_close_batches(struct kgem *kgem);	102	void kgem_close_batches(struct kgem *kgem);
103	void sna_bo_destroy(struct kgem kgem, struct kgem_bo bo);	103	void sna_bo_destroy(struct kgem kgem, struct kgem_bo bo);
104		104
105		105
106	static bool sna_solid_cache_init(struct sna *sna);	106	static bool sna_solid_cache_init(struct sna *sna);
107		107
108	struct sna *sna_device;	108	struct sna *sna_device;
109		109
110	__LOCK_INIT_RECURSIVE(, __sna_lock);	110	__LOCK_INIT_RECURSIVE(, __sna_lock);
111		111
112	static void no_render_reset(struct sna *sna)	112	static void no_render_reset(struct sna *sna)
113	{	113	{
114	(void)sna;	114	(void)sna;
115	}	115	}
116		116
117	static void no_render_flush(struct sna *sna)	117	static void no_render_flush(struct sna *sna)
118	{	118	{
119	(void)sna;	119	(void)sna;
120	}	120	}
121		121
122	static void	122	static void
123	no_render_context_switch(struct kgem *kgem,	123	no_render_context_switch(struct kgem *kgem,
124	int new_mode)	124	int new_mode)
125	{	125	{
126	if (!kgem->nbatch)	126	if (!kgem->nbatch)
127	return;	127	return;
128		128
129	if (kgem_ring_is_idle(kgem, kgem->ring)) {	129	if (kgem_ring_is_idle(kgem, kgem->ring)) {
130	DBG(("%s: GPU idle, flushing\n", __FUNCTION__));	130	DBG(("%s: GPU idle, flushing\n", __FUNCTION__));
131	_kgem_submit(kgem);	131	_kgem_submit(kgem);
132	}	132	}
133		133
134	(void)new_mode;	134	(void)new_mode;
135	}	135	}
136		136
137	static void	137	static void
138	no_render_retire(struct kgem *kgem)	138	no_render_retire(struct kgem *kgem)
139	{	139	{
140	(void)kgem;	140	(void)kgem;
141	}	141	}
142		142
143	static void	143	static void
144	no_render_expire(struct kgem *kgem)	144	no_render_expire(struct kgem *kgem)
145	{	145	{
146	(void)kgem;	146	(void)kgem;
147	}	147	}
148		148
149	static void	149	static void
150	no_render_fini(struct sna *sna)	150	no_render_fini(struct sna *sna)
151	{	151	{
152	(void)sna;	152	(void)sna;
153	}	153	}
154		154
155	const char no_render_init(struct sna sna)	155	const char no_render_init(struct sna sna)
156	{	156	{
157	struct sna_render *render = &sna->render;	157	struct sna_render *render = &sna->render;
158		158
159	memset (render,0, sizeof (*render));	159	memset (render,0, sizeof (*render));
160		160
161	render->prefer_gpu = PREFER_GPU_BLT;	161	render->prefer_gpu = PREFER_GPU_BLT;
162		162
163	render->vertices = render->vertex_data;	163	render->vertices = render->vertex_data;
164	render->vertex_size = ARRAY_SIZE(render->vertex_data);	164	render->vertex_size = ARRAY_SIZE(render->vertex_data);
165		165
166	render->reset = no_render_reset;	166	render->reset = no_render_reset;
167	render->flush = no_render_flush;	167	render->flush = no_render_flush;
168	render->fini = no_render_fini;	168	render->fini = no_render_fini;
169		169
170	sna->kgem.context_switch = no_render_context_switch;	170	sna->kgem.context_switch = no_render_context_switch;
171	sna->kgem.retire = no_render_retire;	171	sna->kgem.retire = no_render_retire;
172	sna->kgem.expire = no_render_expire;	172	sna->kgem.expire = no_render_expire;
173		173
174	sna->kgem.mode = KGEM_RENDER;	174	sna->kgem.mode = KGEM_RENDER;
175	sna->kgem.ring = KGEM_RENDER;	175	sna->kgem.ring = KGEM_RENDER;
176		176
177	sna_vertex_init(sna);	177	sna_vertex_init(sna);
178	return "generic";	178	return "generic";
179	}	179	}
180		180
181	void sna_vertex_init(struct sna *sna)	181	void sna_vertex_init(struct sna *sna)
182	{	182	{
183	// pthread_mutex_init(&sna->render.lock, NULL);	183	// pthread_mutex_init(&sna->render.lock, NULL);
184	// pthread_cond_init(&sna->render.wait, NULL);	184	// pthread_cond_init(&sna->render.wait, NULL);
185	sna->render.active = 0;	185	sna->render.active = 0;
186	}	186	}
187		187
188	int sna_accel_init(struct sna *sna)	188	int sna_accel_init(struct sna *sna)
189	{	189	{
190	const char *backend;	190	const char *backend;
191		191
192	backend = no_render_init(sna);	192	backend = no_render_init(sna);
193	if (sna->info->gen >= 0100)	193	if (sna->info->gen >= 0100)
194	(void)backend;	194	(void)backend;
195	else if (sna->info->gen >= 070)	195	else if (sna->info->gen >= 070)
196	backend = gen7_render_init(sna, backend);	196	backend = gen7_render_init(sna, backend);
197	else if (sna->info->gen >= 060)	197	else if (sna->info->gen >= 060)
198	backend = gen6_render_init(sna, backend);	198	backend = gen6_render_init(sna, backend);
199	else if (sna->info->gen >= 050)	199	else if (sna->info->gen >= 050)
200	backend = gen5_render_init(sna, backend);	200	backend = gen5_render_init(sna, backend);
201	else if (sna->info->gen >= 040)	201	else if (sna->info->gen >= 040)
202	backend = gen4_render_init(sna, backend);	202	backend = gen4_render_init(sna, backend);
203	else if (sna->info->gen >= 030)	203	else if (sna->info->gen >= 030)
204	backend = gen3_render_init(sna, backend);	204	backend = gen3_render_init(sna, backend);
205		205
206	DBG(("%s(backend=%s, prefer_gpu=%x)\n",	206	DBG(("%s(backend=%s, prefer_gpu=%x)\n",
207	__FUNCTION__, backend, sna->render.prefer_gpu));	207	__FUNCTION__, backend, sna->render.prefer_gpu));
208		208
209	kgem_reset(&sna->kgem);	209	kgem_reset(&sna->kgem);
210		210
211	sna_device = sna;	211	sna_device = sna;
212		212
213	return kgem_init_fb(&sna->kgem, &sna_fb);	213	return kgem_init_fb(&sna->kgem, &sna_fb);
214	}	214	}
215		215
216		216
217	#if 0	217	#if 0
218		218
219	static bool sna_solid_cache_init(struct sna *sna)	219	static bool sna_solid_cache_init(struct sna *sna)
220	{	220	{
221	struct sna_solid_cache *cache = &sna->render.solid_cache;	221	struct sna_solid_cache *cache = &sna->render.solid_cache;
222		222
223	DBG(("%s\n", __FUNCTION__));	223	DBG(("%s\n", __FUNCTION__));
224		224
225	cache->cache_bo =	225	cache->cache_bo =
226	kgem_create_linear(&sna->kgem, sizeof(cache->color));	226	kgem_create_linear(&sna->kgem, sizeof(cache->color));
227	if (!cache->cache_bo)	227	if (!cache->cache_bo)
228	return FALSE;	228	return FALSE;
229		229
230	/*	230	/*
231	* Initialise [0] with white since it is very common and filling the	231	* Initialise [0] with white since it is very common and filling the
232	* zeroth slot simplifies some of the checks.	232	* zeroth slot simplifies some of the checks.
233	*/	233	*/
234	cache->color[0] = 0xffffffff;	234	cache->color[0] = 0xffffffff;
235	cache->bo[0] = kgem_create_proxy(cache->cache_bo, 0, sizeof(uint32_t));	235	cache->bo[0] = kgem_create_proxy(cache->cache_bo, 0, sizeof(uint32_t));
236	cache->bo[0]->pitch = 4;	236	cache->bo[0]->pitch = 4;
237	cache->dirty = 1;	237	cache->dirty = 1;
238	cache->size = 1;	238	cache->size = 1;
239	cache->last = 0;	239	cache->last = 0;
240		240
241	return TRUE;	241	return TRUE;
242	}	242	}
243		243
244	void	244	void
245	sna_render_flush_solid(struct sna *sna)	245	sna_render_flush_solid(struct sna *sna)
246	{	246	{
247	struct sna_solid_cache *cache = &sna->render.solid_cache;	247	struct sna_solid_cache *cache = &sna->render.solid_cache;
248		248
249	DBG(("sna_render_flush_solid(size=%d)\n", cache->size));	249	DBG(("sna_render_flush_solid(size=%d)\n", cache->size));
250	assert(cache->dirty);	250	assert(cache->dirty);
251	assert(cache->size);	251	assert(cache->size);
252		252
253	kgem_bo_write(&sna->kgem, cache->cache_bo,	253	kgem_bo_write(&sna->kgem, cache->cache_bo,
254	cache->color, cache->size*sizeof(uint32_t));	254	cache->color, cache->size*sizeof(uint32_t));
255	cache->dirty = 0;	255	cache->dirty = 0;
256	cache->last = 0;	256	cache->last = 0;
257	}	257	}
258		258
259	static void	259	static void
260	sna_render_finish_solid(struct sna *sna, bool force)	260	sna_render_finish_solid(struct sna *sna, bool force)
261	{	261	{
262	struct sna_solid_cache *cache = &sna->render.solid_cache;	262	struct sna_solid_cache *cache = &sna->render.solid_cache;
263	int i;	263	int i;
264		264
265	DBG(("sna_render_finish_solid(force=%d, domain=%d, busy=%d, dirty=%d)\n",	265	DBG(("sna_render_finish_solid(force=%d, domain=%d, busy=%d, dirty=%d)\n",
266	force, cache->cache_bo->domain, cache->cache_bo->rq != NULL, cache->dirty));	266	force, cache->cache_bo->domain, cache->cache_bo->rq != NULL, cache->dirty));
267		267
268	if (!force && cache->cache_bo->domain != DOMAIN_GPU)	268	if (!force && cache->cache_bo->domain != DOMAIN_GPU)
269	return;	269	return;
270		270
271	if (cache->dirty)	271	if (cache->dirty)
272	sna_render_flush_solid(sna);	272	sna_render_flush_solid(sna);
273		273
274	for (i = 0; i < cache->size; i++) {	274	for (i = 0; i < cache->size; i++) {
275	if (cache->bo[i] == NULL)	275	if (cache->bo[i] == NULL)
276	continue;	276	continue;
277		277
278	kgem_bo_destroy(&sna->kgem, cache->bo[i]);	278	kgem_bo_destroy(&sna->kgem, cache->bo[i]);
279	cache->bo[i] = NULL;	279	cache->bo[i] = NULL;
280	}	280	}
281	kgem_bo_destroy(&sna->kgem, cache->cache_bo);	281	kgem_bo_destroy(&sna->kgem, cache->cache_bo);
282		282
283	DBG(("sna_render_finish_solid reset\n"));	283	DBG(("sna_render_finish_solid reset\n"));
284		284
285	cache->cache_bo = kgem_create_linear(&sna->kgem, sizeof(cache->color));	285	cache->cache_bo = kgem_create_linear(&sna->kgem, sizeof(cache->color));
286	cache->bo[0] = kgem_create_proxy(cache->cache_bo, 0, sizeof(uint32_t));	286	cache->bo[0] = kgem_create_proxy(cache->cache_bo, 0, sizeof(uint32_t));
287	cache->bo[0]->pitch = 4;	287	cache->bo[0]->pitch = 4;
288	if (force)	288	if (force)
289	cache->size = 1;	289	cache->size = 1;
290	}	290	}
291		291
292		292
293	struct kgem_bo *	293	struct kgem_bo *
294	sna_render_get_solid(struct sna *sna, uint32_t color)	294	sna_render_get_solid(struct sna *sna, uint32_t color)
295	{	295	{
296	struct sna_solid_cache *cache = &sna->render.solid_cache;	296	struct sna_solid_cache *cache = &sna->render.solid_cache;
297	int i;	297	int i;
298		298
299	DBG(("%s: %08x\n", __FUNCTION__, color));	299	DBG(("%s: %08x\n", __FUNCTION__, color));
300		300
301	// if ((color & 0xffffff) == 0) /* alpha only */	301	// if ((color & 0xffffff) == 0) /* alpha only */
302	// return kgem_bo_reference(sna->render.alpha_cache.bo[color>>24]);	302	// return kgem_bo_reference(sna->render.alpha_cache.bo[color>>24]);
303		303
304	if (color == 0xffffffff) {	304	if (color == 0xffffffff) {
305	DBG(("%s(white)\n", __FUNCTION__));	305	DBG(("%s(white)\n", __FUNCTION__));
306	return kgem_bo_reference(cache->bo[0]);	306	return kgem_bo_reference(cache->bo[0]);
307	}	307	}
308		308
309	if (cache->color[cache->last] == color) {	309	if (cache->color[cache->last] == color) {
310	DBG(("sna_render_get_solid(%d) = %x (last)\n",	310	DBG(("sna_render_get_solid(%d) = %x (last)\n",
311	cache->last, color));	311	cache->last, color));
312	return kgem_bo_reference(cache->bo[cache->last]);	312	return kgem_bo_reference(cache->bo[cache->last]);
313	}	313	}
314		314
315	for (i = 1; i < cache->size; i++) {	315	for (i = 1; i < cache->size; i++) {
316	if (cache->color[i] == color) {	316	if (cache->color[i] == color) {
317	if (cache->bo[i] == NULL) {	317	if (cache->bo[i] == NULL) {
318	DBG(("sna_render_get_solid(%d) = %x (recreate)\n",	318	DBG(("sna_render_get_solid(%d) = %x (recreate)\n",
319	i, color));	319	i, color));
320	goto create;	320	goto create;
321	} else {	321	} else {
322	DBG(("sna_render_get_solid(%d) = %x (old)\n",	322	DBG(("sna_render_get_solid(%d) = %x (old)\n",
323	i, color));	323	i, color));
324	goto done;	324	goto done;
325	}	325	}
326	}	326	}
327	}	327	}
328		328
329	sna_render_finish_solid(sna, i == ARRAY_SIZE(cache->color));	329	sna_render_finish_solid(sna, i == ARRAY_SIZE(cache->color));
330		330
331	i = cache->size++;	331	i = cache->size++;
332	cache->color[i] = color;	332	cache->color[i] = color;
333	cache->dirty = 1;	333	cache->dirty = 1;
334	DBG(("sna_render_get_solid(%d) = %x (new)\n", i, color));	334	DBG(("sna_render_get_solid(%d) = %x (new)\n", i, color));
335		335
336	create:	336	create:
337	cache->bo[i] = kgem_create_proxy(cache->cache_bo,	337	cache->bo[i] = kgem_create_proxy(cache->cache_bo,
338	i*sizeof(uint32_t), sizeof(uint32_t));	338	i*sizeof(uint32_t), sizeof(uint32_t));
339	cache->bo[i]->pitch = 4;	339	cache->bo[i]->pitch = 4;
340		340
341	done:	341	done:
342	cache->last = i;	342	cache->last = i;
343	return kgem_bo_reference(cache->bo[i]);	343	return kgem_bo_reference(cache->bo[i]);
344	}	344	}
345		345
346	#endif	346	#endif
347		347
348		348
349	int sna_blit_copy(bitmap_t *src_bitmap, int dst_x, int dst_y,	349	int sna_blit_copy(bitmap_t *src_bitmap, int dst_x, int dst_y,
350	int w, int h, int src_x, int src_y)	350	int w, int h, int src_x, int src_y)
351		351
352	{	352	{
353	struct sna_copy_op copy;	353	struct sna_copy_op copy;
354	struct _Pixmap src, dst;	354	struct _Pixmap src, dst;
355	struct kgem_bo *src_bo;	355	struct kgem_bo *src_bo;
356		356
357	char proc_info[1024];	357	char proc_info[1024];
358	int winx, winy;	358	int winx, winy;
359		359
360	get_proc_info(proc_info);	360	get_proc_info(proc_info);
361		361
362	winx = (uint32_t)(proc_info+34);	362	winx = (uint32_t)(proc_info+34);
363	winy = (uint32_t)(proc_info+38);	363	winy = (uint32_t)(proc_info+38);
364		364
365	memset(&src, 0, sizeof(src));	365	memset(&src, 0, sizeof(src));
366	memset(&dst, 0, sizeof(dst));	366	memset(&dst, 0, sizeof(dst));
367		367
368	src.drawable.bitsPerPixel = 32;	368	src.drawable.bitsPerPixel = 32;
369	src.drawable.width = src_bitmap->width;	369	src.drawable.width = src_bitmap->width;
370	src.drawable.height = src_bitmap->height;	370	src.drawable.height = src_bitmap->height;
371		371
372	dst.drawable.bitsPerPixel = 32;	372	dst.drawable.bitsPerPixel = 32;
373	dst.drawable.width = sna_fb.width;	373	dst.drawable.width = sna_fb.width;
374	dst.drawable.height = sna_fb.height;	374	dst.drawable.height = sna_fb.height;
375		375
376	memset(©, 0, sizeof(copy));	376	memset(©, 0, sizeof(copy));
377		377
378	src_bo = (struct kgem_bo*)src_bitmap->handle;	378	src_bo = (struct kgem_bo*)src_bitmap->handle;
379		379
380	if( sna_device->render.copy(sna_device, GXcopy,	380	if( sna_device->render.copy(sna_device, GXcopy,
381	&src, src_bo,	381	&src, src_bo,
382	&dst, sna_fb.fb_bo, ©) )	382	&dst, sna_fb.fb_bo, ©) )
383	{	383	{
384	copy.blt(sna_device, ©, src_x, src_y, w, h, winx+dst_x, winy+dst_y);	384	copy.blt(sna_device, ©, src_x, src_y, w, h, winx+dst_x, winy+dst_y);
385	copy.done(sna_device, ©);	385	copy.done(sna_device, ©);
386	}	386	}
387		387
388	kgem_submit(&sna_device->kgem);	388	kgem_submit(&sna_device->kgem);
389		389
390	return 0;	390	return 0;
391		391
392	// __asm__ __volatile__("int3");	392	// __asm__ __volatile__("int3");
393		393
394	};	394	};
395		395
396	typedef struct	396	typedef struct
397	{	397	{
398	uint32_t width;	398	uint32_t width;
399	uint32_t height;	399	uint32_t height;
400	void *data;	400	void *data;
401	uint32_t pitch;	401	uint32_t pitch;
402	struct kgem_bo *bo;	402	struct kgem_bo *bo;
403	uint32_t bo_size;	403	uint32_t bo_size;
404	uint32_t flags;	404	uint32_t flags;
405	}surface_t;	405	}surface_t;
406		406
407		407
408		408
409		409
410	#define MI_LOAD_REGISTER_IMM (0x22<<23)	410	#define MI_LOAD_REGISTER_IMM (0x22<<23)
411	#define MI_WAIT_FOR_EVENT (0x03<<23)	411	#define MI_WAIT_FOR_EVENT (0x03<<23)
412		412
413	static bool sna_emit_wait_for_scanline_hsw(struct sna *sna,	413	static bool sna_emit_wait_for_scanline_hsw(struct sna *sna,
414	rect_t *crtc,	414	rect_t *crtc,
415	int pipe, int y1, int y2,	415	int pipe, int y1, int y2,
416	bool full_height)	416	bool full_height)
417	{	417	{
418	uint32_t event;	418	uint32_t event;
419	uint32_t *b;	419	uint32_t *b;
420		420
421	if (!sna->kgem.has_secure_batches)	421	if (!sna->kgem.has_secure_batches)
422	return false;	422	return false;
423		423
424	b = kgem_get_batch(&sna->kgem);	424	b = kgem_get_batch(&sna->kgem);
425	sna->kgem.nbatch += 17;	425	sna->kgem.nbatch += 17;
426		426
427	switch (pipe) {	427	switch (pipe) {
428	default: assert(0);	428	default: assert(0);
429	case 0: event = 1 << 0; break;	429	case 0: event = 1 << 0; break;
430	case 1: event = 1 << 8; break;	430	case 1: event = 1 << 8; break;
431	case 2: event = 1 << 14; break;	431	case 2: event = 1 << 14; break;
432	}	432	}
433		433
434	b[0] = MI_LOAD_REGISTER_IMM \| 1;	434	b[0] = MI_LOAD_REGISTER_IMM \| 1;
435	b[1] = 0x44050; /* DERRMR */	435	b[1] = 0x44050; /* DERRMR */
436	b[2] = ~event;	436	b[2] = ~event;
437	b[3] = MI_LOAD_REGISTER_IMM \| 1;	437	b[3] = MI_LOAD_REGISTER_IMM \| 1;
438	b[4] = 0xa188; /* FORCEWAKE_MT */	438	b[4] = 0xa188; /* FORCEWAKE_MT */
439	b[5] = 2 << 16 \| 2;	439	b[5] = 2 << 16 \| 2;
440		440
441	/* The documentation says that the LOAD_SCAN_LINES command	441	/* The documentation says that the LOAD_SCAN_LINES command
442	* always comes in pairs. Don't ask me why. */	442	* always comes in pairs. Don't ask me why. */
443	switch (pipe) {	443	switch (pipe) {
444	default: assert(0);	444	default: assert(0);
445	case 0: event = 0 << 19; break;	445	case 0: event = 0 << 19; break;
446	case 1: event = 1 << 19; break;	446	case 1: event = 1 << 19; break;
447	case 2: event = 4 << 19; break;	447	case 2: event = 4 << 19; break;
448	}	448	}
449	b[8] = b[6] = MI_LOAD_SCAN_LINES_INCL \| event;	449	b[8] = b[6] = MI_LOAD_SCAN_LINES_INCL \| event;
450	b[9] = b[7] = (y1 << 16) \| (y2-1);	450	b[9] = b[7] = (y1 << 16) \| (y2-1);
451		451
452	switch (pipe) {	452	switch (pipe) {
453	default: assert(0);	453	default: assert(0);
454	case 0: event = 1 << 0; break;	454	case 0: event = 1 << 0; break;
455	case 1: event = 1 << 8; break;	455	case 1: event = 1 << 8; break;
456	case 2: event = 1 << 14; break;	456	case 2: event = 1 << 14; break;
457	}	457	}
458	b[10] = MI_WAIT_FOR_EVENT \| event;	458	b[10] = MI_WAIT_FOR_EVENT \| event;
459		459
460	b[11] = MI_LOAD_REGISTER_IMM \| 1;	460	b[11] = MI_LOAD_REGISTER_IMM \| 1;
461	b[12] = 0xa188; /* FORCEWAKE_MT */	461	b[12] = 0xa188; /* FORCEWAKE_MT */
462	b[13] = 2 << 16;	462	b[13] = 2 << 16;
463	b[14] = MI_LOAD_REGISTER_IMM \| 1;	463	b[14] = MI_LOAD_REGISTER_IMM \| 1;
464	b[15] = 0x44050; /* DERRMR */	464	b[15] = 0x44050; /* DERRMR */
465	b[16] = ~0;	465	b[16] = ~0;
466		466
467	sna->kgem.batch_flags \|= I915_EXEC_SECURE;	467	sna->kgem.batch_flags \|= I915_EXEC_SECURE;
468	return true;	468	return true;
469	}	469	}
470		470
471		471
472	static bool sna_emit_wait_for_scanline_ivb(struct sna *sna,	472	static bool sna_emit_wait_for_scanline_ivb(struct sna *sna,
473	rect_t *crtc,	473	rect_t *crtc,
474	int pipe, int y1, int y2,	474	int pipe, int y1, int y2,
475	bool full_height)	475	bool full_height)
476	{	476	{
477	uint32_t *b;	477	uint32_t *b;
478	uint32_t event;	478	uint32_t event;
479	uint32_t forcewake;	479	uint32_t forcewake;
480		480
481	if (!sna->kgem.has_secure_batches)	481	if (!sna->kgem.has_secure_batches)
482	return false;	482	return false;
483		483
484	assert(y1 >= 0);	484	assert(y1 >= 0);
485	assert(y2 > y1);	485	assert(y2 > y1);
486	assert(sna->kgem.mode);	486	assert(sna->kgem.mode);
487		487
488	/* Always program one less than the desired value */	488	/* Always program one less than the desired value */
489	if (--y1 < 0)	489	if (--y1 < 0)
490	y1 = crtc->b;	490	y1 = crtc->b;
491	y2--;	491	y2--;
492		492
493	switch (pipe) {	493	switch (pipe) {
494	default:	494	default:
495	assert(0);	495	assert(0);
496	case 0:	496	case 0:
497	event = 1 << (full_height ? 3 : 0);	497	event = 1 << (full_height ? 3 : 0);
498	break;	498	break;
499	case 1:	499	case 1:
500	event = 1 << (full_height ? 11 : 8);	500	event = 1 << (full_height ? 11 : 8);

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(root)/contrib/sdk/sources/Intel-2D/sna/sna.c – Rev 4377 → 4501