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Regard whitespace Rev 1559 → Rev 1560

/kernel/branches/Kolibri-A/trunk/bus/HT.INC
11,9 → 11,9
;; ;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
$Revision: 1554 $
 
 
align 4
 
;=============================================================================
;
20,6 → 20,7
; This code is a part of Kolibri-A and will only work with AMD RS760+ chipsets
;
;=============================================================================
align 4
 
;------------------------------------------
; params: al = nbconfig register#
33,6 → 34,7
add dl, 4
in eax, dx
ret
align 4
 
rs7xx_nbconfig_flush_pci:
mov eax, 0x0B0 ; a scratch reg
40,6 → 42,7
out dx, eax
ret
 
align 4
 
rs7xx_nbconfig_write_pci:
and eax, 0x0FC ; leave register# only
60,10 → 63,9
;
;***************************************************************************
 
align 4
 
rs7xx_pcie_init:
; mov al, 0x7C ; NB_IOC_CFG_CNTL
; mov ebx, 0x20000000
; call rs7xx_nbconfig_write_pci
mov al, 0x7C ; NB_IOC_CFG_CNTL
call rs7xx_nbconfig_read_pci
mov ebx, eax
98,20 → 100,23
call rs7xx_nbconfig_flush_pci
mov eax, ebx
and eax, 0xFFE00000 ; valid bits [31..21]
jnz @f ; NB BAR3 may be invisible!
call pci_ext_config ; try to get pcie ecfg address indirectly
@@:
or eax, eax
jz .rs7xx_pcie_fail
jz .rs7xx_pcie_blocked ; NB BAR3 may be invisible!
; try to get pcie ecfg address indirectly
.addr_found:
mov [mmio_pcie_cfg_addr], eax ; physical address (lower 32 bits)
add [mmio_pcie_cfg_lim], eax
 
; -- map the whole PCIe config space;
or eax, (PG_SHARED + PG_LARGE + PG_UW) ; by the way, UW is unsafe!
mov ecx, PCIe_CONFIG_SPACE ; linear address
mov ebx, ecx
shr ebx, 20
add ebx, sys_pgdir ; PgDir entry @
mov dl, byte[mmio_pcie_cfg_pdes] ; 1 page = 4M in address space
cmp dl, (USER_DMA_BUFFER - PCIe_CONFIG_SPACE) / 4194304
jb @f
mov dl, ((USER_DMA_BUFFER - PCIe_CONFIG_SPACE) / 4194304) - 1
mov byte[mmio_pcie_cfg_pdes], dl
@@:
xor dx, dx ; PDEs counter
@@:
mov dword[ebx], eax ; map 4 buses
119,26 → 124,26
add bx, 4 ; new PDE
add eax, 0x400000 ; +4M phys.
add ecx, 0x400000 ; +4M lin.
inc dx
cmp dx, [mmio_pcie_cfg_pdes] ; all mapped yet?
jnz @b
 
cmp dl, byte[mmio_pcie_cfg_pdes]
jnc .pcie_cfg_mapped
inc dl
jmp @b
.pcie_cfg_mapped:
mov esi, boot_pcie_ok
call boot_log
ret ; <<<<<<<<<<< OK >>>>>>>>>>>
 
ret ; <<< OK >>>
.rs7xx_pcie_fail:
mov esi, boot_rs7xx_fail
call boot_log
ret
 
.rs7xx_pcie_blocked:
mov esi, boot_rs7xx_blkd
call boot_log
call pci_ext_config
jmp .addr_found
ret
 
 
ret
 
 
 
/kernel/branches/Kolibri-A/trunk/bus/pci/PCIe.inc
12,7 → 12,7
;; ;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
$Revision: 1463 $
$Revision: 1554 $
 
;***************************************************************************
; Function
31,13 → 31,14
align 4
mmio_pcie_cfg_addr dd 0x00000000 ; pcie space may be defined here
mmio_pcie_cfg_lim dd 0x000FFFFF ; upper pcie space address
mmio_pcie_cfg_pdes dw 0 ; number of PDEs to map the space
PCIe_bus_range dw 0 ; the Bus range: power-of-2 Megabytes
mmio_pcie_cfg_pdes dw 1 ; number of PDEs to map the space
PCIe_bus_range dw 2 ; the Bus range: power-of-2 Megabytes
 
 
align 4
pci_ext_config:
mov ebx, [mmio_pcie_cfg_addr]
mov eax, [mmio_pcie_cfg_addr]
mov ebx, eax
or ebx,ebx
jz @f
or ebx, 0x7FFFFFFF ; required by PCI-SIG standards
45,7 → 46,7
add ebx, 0x0FFFFC
cmp ebx, [mmio_pcie_cfg_lim]; is the space limit correct?
ja .pcie_failed
jmp .pcie_cfg_mapped
ret ; return the address forced
@@:
mov ebx, [cpu_vendor]
cmp ebx, dword [AMD_str]
75,21 → 76,12
shl eax, 8
test eax, 0x000F0000 ; MMIO Base must be bus0-aligned
jnz .no_pcie_cfg
mov [mmio_pcie_cfg_addr], eax
; add eax, 0x000FFFFC
; sub eax,[mmio_pcie_cfg_lim] ; MMIO must cover at least one bus
; ja .no_pcie_cfg
 
; -- it looks like a true PCIe config space;
 
.pcie_cfg_mapped:
mov esi, boot_pcie_ok
call boot_log
ret ; <<<<<<<<<<< OK >>>>>>>>>>>
.no_pcie_cfg:
 
xor eax, eax
mov [mmio_pcie_cfg_addr], eax
mov [mmio_pcie_cfg_lim], eax
96,6 → 88,7
add bl, 12
cmp bl, 0xC0 ; MMIO regs lay below this offset
jb .check_HT_mmio
 
.pcie_failed:
mov esi, boot_pcie_fail
call boot_log
/kernel/branches/Kolibri-A/trunk/bus/pci/pci32.inc
128,10 → 128,6
align 4
 
pci_read_reg:
cmp byte [BOOT_VAR+0x9020],2 ;what mechanism will we use?
je pci_read_reg_2
 
; mechanism 1
push esi ; save register size into ESI
mov esi,eax
and esi,3
177,67 → 173,7
pop eax
pop esi
ret
pci_read_reg_2:
 
test bh,128 ;mech#2 only supports 16 devices per bus
jnz pci_read_reg_err
 
push esi ; save register size into ESI
mov esi,eax
and esi,3
 
push eax
;store current state of config space
mov dx,0xcf8
in al,dx
mov ah,al
mov dl,0xfa
in al,dx
 
xchg eax,[esp]
; out 0xcfa,bus
mov al,ah
out dx,al
; out 0xcf8,0x80
mov dl,0xf8
mov al,0x80
out dx,al
; compute addr
shr bh,3 ; func is ignored in mechanism 2
or bh,0xc0
mov dx,bx
 
or esi,esi
jz pci_read_byte2
cmp esi,1
jz pci_read_word2
cmp esi,2
jz pci_read_dword2
jmp pci_fin_read2
 
pci_read_byte2:
in al,dx
jmp pci_fin_read2
pci_read_word2:
in ax,dx
jmp pci_fin_read2
pci_read_dword2:
in eax,dx
; jmp pci_fin_read2
pci_fin_read2:
 
; restore configuration space
xchg eax,[esp]
mov dx,0xcfa
out dx,al
mov dl,0xf8
mov al,ah
out dx,al
 
pop eax
pop esi
ret
 
pci_read_reg_err:
xor eax,eax
dec eax
259,10 → 195,6
align 4
 
pci_write_reg:
cmp byte [BOOT_VAR+0x9020],2 ;what mechanism will we use?
je pci_write_reg_2
 
; mechanism 1
push esi ; save register size into ESI
mov esi,eax
and esi,3
301,7 → 233,6
out dx,eax
jmp pci_fin_write1
pci_fin_write1:
 
; restore configuration control
pop eax
mov dl,0xf8
309,70 → 240,8
 
xor eax,eax
pop esi
 
ret
pci_write_reg_2:
 
test bh,128 ;mech#2 only supports 16 devices per bus
jnz pci_write_reg_err
 
 
push esi ; save register size into ESI
mov esi,eax
and esi,3
 
push eax
;store current state of config space
mov dx,0xcf8
in al,dx
mov ah,al
mov dl,0xfa
in al,dx
xchg eax,[esp]
; out 0xcfa,bus
mov al,ah
out dx,al
; out 0xcf8,0x80
mov dl,0xf8
mov al,0x80
out dx,al
; compute addr
shr bh,3 ; func is ignored in mechanism 2
or bh,0xc0
mov dx,bx
; write register
mov eax,ecx
 
or esi,esi
jz pci_write_byte2
cmp esi,1
jz pci_write_word2
cmp esi,2
jz pci_write_dword2
jmp pci_fin_write2
 
pci_write_byte2:
out dx,al
jmp pci_fin_write2
pci_write_word2:
out dx,ax
jmp pci_fin_write2
pci_write_dword2:
out dx,eax
jmp pci_fin_write2
pci_fin_write2:
; restore configuration space
pop eax
mov dx,0xcfa
out dx,al
mov dl,0xf8
mov al,ah
out dx,al
 
xor eax,eax
pop esi
ret
 
pci_write_reg_err:
xor eax,eax
dec eax
/kernel/branches/Kolibri-A/trunk/data32.inc
67,6 → 67,7
; boot_pal_vga db 'Setting VGA 640x480 palette',0
boot_failed db 'Failed to start first app',0
boot_mtrr db 'Setting MTRR',0
boot_uDMA_ok db 'Set user DMA OK',0
boot_pcie_ok db 'PCIe config set OK',0
boot_pcie_fail db 'PCIe config XXX failed XXX',0
boot_rs7xx_fail db 'RS7xx config XXX failed XXX',0
/kernel/branches/Kolibri-A/trunk/kernel.asm
677,9 → 677,9
 
; RESERVE SYSTEM IRQ'S JA PORT'S
 
mov esi,boot_resirqports
call boot_log
call reserve_irqs_ports
; mov esi,boot_resirqports
; call boot_log
; call reserve_irqs_ports
 
 
; SET UP OS TASK
828,6 → 828,8
no_st_network:
 
call init_userDMA ; <<<<<<<<< ============== core/memory.inc =================
mov esi, boot_uDMA_ok
call boot_log
; call pci_ext_config ; <<<<<<<<< bus/pci/pcie.inc
;-------------------------------------------------------------------------------
call rs7xx_pcie_init ; <<<<<<<<< bus/ht.inc