42,7 → 42,7 |
#include <drm_mm.h> |
#include "radeon_object.h" |
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struct fb_info *framebuffer_alloc(size_t size); |
struct fb_info *framebuffer_alloc(size_t size, void *dev); |
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struct radeon_fb_device { |
struct drm_fb_helper helper; |
60,6 → 60,7 |
// .fb_imageblit = cfb_imageblit, |
// .fb_pan_display = drm_fb_helper_pan_display, |
.fb_blank = drm_fb_helper_blank, |
.fb_setcmap = drm_fb_helper_setcmap, |
}; |
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/** |
128,11 → 129,13 |
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static struct drm_fb_helper_funcs radeon_fb_helper_funcs = { |
.gamma_set = radeon_crtc_fb_gamma_set, |
.gamma_get = radeon_crtc_fb_gamma_get, |
}; |
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int radeonfb_create(struct drm_device *dev, |
uint32_t fb_width, uint32_t fb_height, |
uint32_t surface_width, uint32_t surface_height, |
uint32_t surface_depth, uint32_t surface_bpp, |
struct drm_framebuffer **fb_p) |
{ |
struct radeon_device *rdev = dev->dev_private; |
143,7 → 146,7 |
struct drm_mode_fb_cmd mode_cmd; |
struct drm_gem_object *gobj = NULL; |
struct radeon_object *robj = NULL; |
// struct device *device = &rdev->pdev->dev; |
void *device = NULL; //&rdev->pdev->dev; |
int size, aligned_size, ret; |
u64 fb_gpuaddr; |
void *fbptr = NULL; |
150,13 → 153,19 |
unsigned long tmp; |
bool fb_tiled = false; /* useful for testing */ |
u32 tiling_flags = 0; |
int crtc_count; |
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mode_cmd.width = surface_width; |
mode_cmd.height = surface_height; |
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/* avivo can't scanout real 24bpp */ |
if ((surface_bpp == 24) && ASIC_IS_AVIVO(rdev)) |
surface_bpp = 32; |
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mode_cmd.bpp = 32; |
/* need to align pitch with crtc limits */ |
mode_cmd.pitch = radeon_align_pitch(rdev, mode_cmd.width, mode_cmd.bpp, fb_tiled) * ((mode_cmd.bpp + 1) / 8); |
mode_cmd.depth = 24; |
mode_cmd.depth = surface_depth; |
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size = mode_cmd.pitch * mode_cmd.height; |
aligned_size = ALIGN(size, PAGE_SIZE); |
165,7 → 174,6 |
RADEON_GEM_DOMAIN_VRAM, |
false, 0, |
false, &gobj); |
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if (ret) { |
printk(KERN_ERR "failed to allocate framebuffer (%d %d)\n", |
surface_width, surface_height); |
195,7 → 203,7 |
rdev->fbdev_rfb = rfb; |
rdev->fbdev_robj = robj; |
|
info = framebuffer_alloc(sizeof(struct radeon_fb_device)); |
info = framebuffer_alloc(sizeof(struct radeon_fb_device), device); |
if (info == NULL) { |
ret = -ENOMEM; |
goto out_unref; |
205,7 → 213,11 |
rfbdev = info->par; |
rfbdev->helper.funcs = &radeon_fb_helper_funcs; |
rfbdev->helper.dev = dev; |
ret = drm_fb_helper_init_crtc_count(&rfbdev->helper, 2, |
if (rdev->flags & RADEON_SINGLE_CRTC) |
crtc_count = 1; |
else |
crtc_count = 2; |
ret = drm_fb_helper_init_crtc_count(&rfbdev->helper, crtc_count, |
RADEONFB_CONN_LIMIT); |
if (ret) |
goto out_unref; |
220,7 → 232,7 |
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strcpy(info->fix.id, "radeondrmfb"); |
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drm_fb_helper_fill_fix(info, fb->pitch); |
drm_fb_helper_fill_fix(info, fb->pitch, fb->depth); |
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info->flags = FBINFO_DEFAULT; |
info->fbops = &radeonfb_ops; |
281,11 → 293,8 |
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int radeonfb_probe(struct drm_device *dev) |
{ |
int ret; |
ret = drm_fb_helper_single_fb_probe(dev, &radeonfb_create); |
return ret; |
return drm_fb_helper_single_fb_probe(dev, 32, &radeonfb_create); |
} |
EXPORT_SYMBOL(radeonfb_probe); |
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int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb) |
{ |
401,7 → 410,7 |
} |
|
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struct fb_info *framebuffer_alloc(size_t size) |
struct fb_info *framebuffer_alloc(size_t size, void *dev) |
{ |
#define BYTES_PER_LONG (BITS_PER_LONG/8) |
#define PADDING (BYTES_PER_LONG - (sizeof(struct fb_info) % BYTES_PER_LONG)) |
446,6 → 455,8 |
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bool ret = false; |
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ENTER(); |
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list_for_each_entry(connector, &dev->mode_config.connector_list, head) |
{ |
struct drm_display_mode *mode; |
465,7 → 476,7 |
if(crtc == NULL) |
continue; |
|
|
/* |
list_for_each_entry(mode, &connector->modes, head) |
{ |
if (mode->type & DRM_MODE_TYPE_PREFERRED); |
472,7 → 483,6 |
break; |
}; |
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/* |
struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
struct radeon_native_mode *native_mode = &radeon_encoder->native_mode; |
|
536,10 → 546,14 |
DRM_ERROR("failed to set mode %d_%d on crtc %p\n", |
fb->width, fb->height, crtc); |
}; |
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LEAVE(); |
|
return ret; |
}; |
} |
}; |
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LEAVE(); |
return ret; |
}; |
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