50,7 → 50,8 |
uint32_t supported_device, |
int connector_type, |
struct radeon_i2c_bus_rec *i2c_bus, |
uint16_t connector_object_id); |
uint16_t connector_object_id, |
struct radeon_hpd *hpd); |
|
/* from radeon_legacy_encoder.c */ |
extern void |
442,39 → 443,71 |
|
} |
|
struct radeon_i2c_bus_rec combios_setup_i2c_bus(int ddc_line) |
static struct radeon_i2c_bus_rec combios_setup_i2c_bus(struct radeon_device *rdev, |
int ddc_line) |
{ |
struct radeon_i2c_bus_rec i2c; |
|
if (ddc_line == RADEON_GPIOPAD_MASK) { |
i2c.mask_clk_reg = RADEON_GPIOPAD_MASK; |
i2c.mask_data_reg = RADEON_GPIOPAD_MASK; |
i2c.a_clk_reg = RADEON_GPIOPAD_A; |
i2c.a_data_reg = RADEON_GPIOPAD_A; |
i2c.en_clk_reg = RADEON_GPIOPAD_EN; |
i2c.en_data_reg = RADEON_GPIOPAD_EN; |
i2c.y_clk_reg = RADEON_GPIOPAD_Y; |
i2c.y_data_reg = RADEON_GPIOPAD_Y; |
} else if (ddc_line == RADEON_MDGPIO_MASK) { |
i2c.mask_clk_reg = RADEON_MDGPIO_MASK; |
i2c.mask_data_reg = RADEON_MDGPIO_MASK; |
i2c.a_clk_reg = RADEON_MDGPIO_A; |
i2c.a_data_reg = RADEON_MDGPIO_A; |
i2c.en_clk_reg = RADEON_MDGPIO_EN; |
i2c.en_data_reg = RADEON_MDGPIO_EN; |
i2c.y_clk_reg = RADEON_MDGPIO_Y; |
i2c.y_data_reg = RADEON_MDGPIO_Y; |
} else { |
i2c.mask_clk_mask = RADEON_GPIO_EN_1; |
i2c.mask_data_mask = RADEON_GPIO_EN_0; |
i2c.a_clk_mask = RADEON_GPIO_A_1; |
i2c.a_data_mask = RADEON_GPIO_A_0; |
i2c.put_clk_mask = RADEON_GPIO_EN_1; |
i2c.put_data_mask = RADEON_GPIO_EN_0; |
i2c.get_clk_mask = RADEON_GPIO_Y_1; |
i2c.get_data_mask = RADEON_GPIO_Y_0; |
if ((ddc_line == RADEON_LCD_GPIO_MASK) || |
(ddc_line == RADEON_MDGPIO_EN_REG)) { |
i2c.en_clk_mask = RADEON_GPIO_EN_1; |
i2c.en_data_mask = RADEON_GPIO_EN_0; |
i2c.y_clk_mask = RADEON_GPIO_Y_1; |
i2c.y_data_mask = RADEON_GPIO_Y_0; |
|
i2c.mask_clk_reg = ddc_line; |
i2c.mask_data_reg = ddc_line; |
i2c.a_clk_reg = ddc_line; |
i2c.a_data_reg = ddc_line; |
i2c.put_clk_reg = ddc_line; |
i2c.put_data_reg = ddc_line; |
i2c.get_clk_reg = ddc_line + 4; |
i2c.get_data_reg = ddc_line + 4; |
} else { |
i2c.mask_clk_reg = ddc_line; |
i2c.mask_data_reg = ddc_line; |
i2c.a_clk_reg = ddc_line; |
i2c.a_data_reg = ddc_line; |
i2c.put_clk_reg = ddc_line; |
i2c.put_data_reg = ddc_line; |
i2c.get_clk_reg = ddc_line; |
i2c.get_data_reg = ddc_line; |
i2c.en_clk_reg = ddc_line; |
i2c.en_data_reg = ddc_line; |
i2c.y_clk_reg = ddc_line; |
i2c.y_data_reg = ddc_line; |
} |
|
if (rdev->family < CHIP_R200) |
i2c.hw_capable = false; |
else { |
switch (ddc_line) { |
case RADEON_GPIO_VGA_DDC: |
case RADEON_GPIO_DVI_DDC: |
i2c.hw_capable = true; |
break; |
case RADEON_GPIO_MONID: |
/* hw i2c on RADEON_GPIO_MONID doesn't seem to work |
* reliably on some pre-r4xx hardware; not sure why. |
*/ |
i2c.hw_capable = false; |
break; |
default: |
i2c.hw_capable = false; |
break; |
} |
} |
i2c.mm_i2c = false; |
i2c.i2c_id = 0; |
|
if (ddc_line) |
i2c.valid = true; |
else |
495,7 → 528,7 |
uint16_t sclk, mclk; |
|
if (rdev->bios == NULL) |
return NULL; |
return false; |
|
pll_info = combios_get_table_offset(dev, COMBIOS_PLL_INFO_TABLE); |
if (pll_info) { |
993,8 → 1026,8 |
{{0xffffffff, 0xb01cb}, {0, 0}, {0, 0}, {0, 0}}, /* CHIP_R420 */ |
{{0xffffffff, 0xb01cb}, {0, 0}, {0, 0}, {0, 0}}, /* CHIP_R423 */ |
{{0xffffffff, 0xb01cb}, {0, 0}, {0, 0}, {0, 0}}, /* CHIP_RV410 */ |
{{15000, 0xb0155}, {0xffffffff, 0xb01cb}, {0, 0}, {0, 0}}, /* CHIP_RS400 */ |
{{15000, 0xb0155}, {0xffffffff, 0xb01cb}, {0, 0}, {0, 0}}, /* CHIP_RS480 */ |
{ {0, 0}, {0, 0}, {0, 0}, {0, 0} }, /* CHIP_RS400 */ |
{ {0, 0}, {0, 0}, {0, 0}, {0, 0} }, /* CHIP_RS480 */ |
}; |
|
bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder, |
1028,7 → 1061,6 |
tmds_info = combios_get_table_offset(dev, COMBIOS_DFP_INFO_TABLE); |
|
if (tmds_info) { |
|
ver = RBIOS8(tmds_info); |
DRM_INFO("DFP table revision: %d\n", ver); |
if (ver == 3) { |
1063,51 → 1095,139 |
tmds->tmds_pll[i].value); |
} |
} |
} else |
} else { |
DRM_INFO("No TMDS info found in BIOS\n"); |
return false; |
} |
return true; |
} |
|
struct radeon_encoder_int_tmds *radeon_combios_get_tmds_info(struct radeon_encoder *encoder) |
bool radeon_legacy_get_ext_tmds_info_from_table(struct radeon_encoder *encoder, |
struct radeon_encoder_ext_tmds *tmds) |
{ |
struct radeon_encoder_int_tmds *tmds = NULL; |
bool ret; |
struct drm_device *dev = encoder->base.dev; |
struct radeon_device *rdev = dev->dev_private; |
struct radeon_i2c_bus_rec i2c_bus; |
|
tmds = kzalloc(sizeof(struct radeon_encoder_int_tmds), GFP_KERNEL); |
/* default for macs */ |
i2c_bus = combios_setup_i2c_bus(rdev, RADEON_GPIO_MONID); |
tmds->i2c_bus = radeon_i2c_create(dev, &i2c_bus, "DVO"); |
|
if (!tmds) |
return NULL; |
/* XXX some macs have duallink chips */ |
switch (rdev->mode_info.connector_table) { |
case CT_POWERBOOK_EXTERNAL: |
case CT_MINI_EXTERNAL: |
default: |
tmds->dvo_chip = DVO_SIL164; |
tmds->slave_addr = 0x70 >> 1; /* 7 bit addressing */ |
break; |
} |
|
ret = radeon_legacy_get_tmds_info_from_combios(encoder, tmds); |
if (ret == false) |
radeon_legacy_get_tmds_info_from_table(encoder, tmds); |
|
return tmds; |
return true; |
} |
|
void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder) |
bool radeon_legacy_get_ext_tmds_info_from_combios(struct radeon_encoder *encoder, |
struct radeon_encoder_ext_tmds *tmds) |
{ |
struct drm_device *dev = encoder->base.dev; |
struct radeon_device *rdev = dev->dev_private; |
uint16_t ext_tmds_info; |
uint8_t ver; |
uint16_t offset; |
uint8_t ver, id, blocks, clk, data; |
int i; |
enum radeon_combios_ddc gpio; |
struct radeon_i2c_bus_rec i2c_bus; |
|
if (rdev->bios == NULL) |
return; |
return false; |
|
ext_tmds_info = |
combios_get_table_offset(dev, COMBIOS_EXT_TMDS_INFO_TABLE); |
if (ext_tmds_info) { |
ver = RBIOS8(ext_tmds_info); |
tmds->i2c_bus = NULL; |
if (rdev->flags & RADEON_IS_IGP) { |
offset = combios_get_table_offset(dev, COMBIOS_I2C_INFO_TABLE); |
if (offset) { |
ver = RBIOS8(offset); |
DRM_INFO("GPIO Table revision: %d\n", ver); |
blocks = RBIOS8(offset + 2); |
for (i = 0; i < blocks; i++) { |
id = RBIOS8(offset + 3 + (i * 5) + 0); |
if (id == 136) { |
clk = RBIOS8(offset + 3 + (i * 5) + 3); |
data = RBIOS8(offset + 3 + (i * 5) + 4); |
i2c_bus.valid = true; |
i2c_bus.mask_clk_mask = (1 << clk); |
i2c_bus.mask_data_mask = (1 << data); |
i2c_bus.a_clk_mask = (1 << clk); |
i2c_bus.a_data_mask = (1 << data); |
i2c_bus.en_clk_mask = (1 << clk); |
i2c_bus.en_data_mask = (1 << data); |
i2c_bus.y_clk_mask = (1 << clk); |
i2c_bus.y_data_mask = (1 << data); |
i2c_bus.mask_clk_reg = RADEON_GPIOPAD_MASK; |
i2c_bus.mask_data_reg = RADEON_GPIOPAD_MASK; |
i2c_bus.a_clk_reg = RADEON_GPIOPAD_A; |
i2c_bus.a_data_reg = RADEON_GPIOPAD_A; |
i2c_bus.en_clk_reg = RADEON_GPIOPAD_EN; |
i2c_bus.en_data_reg = RADEON_GPIOPAD_EN; |
i2c_bus.y_clk_reg = RADEON_GPIOPAD_Y; |
i2c_bus.y_data_reg = RADEON_GPIOPAD_Y; |
tmds->i2c_bus = radeon_i2c_create(dev, &i2c_bus, "DVO"); |
tmds->dvo_chip = DVO_SIL164; |
tmds->slave_addr = 0x70 >> 1; /* 7 bit addressing */ |
break; |
} |
} |
} |
} else { |
offset = combios_get_table_offset(dev, COMBIOS_EXT_TMDS_INFO_TABLE); |
if (offset) { |
ver = RBIOS8(offset); |
DRM_INFO("External TMDS Table revision: %d\n", ver); |
// TODO |
tmds->slave_addr = RBIOS8(offset + 4 + 2); |
tmds->slave_addr >>= 1; /* 7 bit addressing */ |
gpio = RBIOS8(offset + 4 + 3); |
switch (gpio) { |
case DDC_MONID: |
i2c_bus = combios_setup_i2c_bus(rdev, RADEON_GPIO_MONID); |
tmds->i2c_bus = radeon_i2c_create(dev, &i2c_bus, "DVO"); |
break; |
case DDC_DVI: |
i2c_bus = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC); |
tmds->i2c_bus = radeon_i2c_create(dev, &i2c_bus, "DVO"); |
break; |
case DDC_VGA: |
i2c_bus = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC); |
tmds->i2c_bus = radeon_i2c_create(dev, &i2c_bus, "DVO"); |
break; |
case DDC_CRT2: |
/* R3xx+ chips don't have GPIO_CRT2_DDC gpio pad */ |
if (rdev->family >= CHIP_R300) |
i2c_bus = combios_setup_i2c_bus(rdev, RADEON_GPIO_MONID); |
else |
i2c_bus = combios_setup_i2c_bus(rdev, RADEON_GPIO_CRT2_DDC); |
tmds->i2c_bus = radeon_i2c_create(dev, &i2c_bus, "DVO"); |
break; |
case DDC_LCD: /* MM i2c */ |
DRM_ERROR("MM i2c requires hw i2c engine\n"); |
break; |
default: |
DRM_ERROR("Unsupported gpio %d\n", gpio); |
break; |
} |
} |
} |
|
if (!tmds->i2c_bus) { |
DRM_INFO("No valid Ext TMDS info found in BIOS\n"); |
return false; |
} |
|
return true; |
} |
|
bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) |
{ |
struct radeon_device *rdev = dev->dev_private; |
struct radeon_i2c_bus_rec ddc_i2c; |
struct radeon_hpd hpd; |
|
rdev->mode_info.connector_table = radeon_connector_table; |
if (rdev->mode_info.connector_table == CT_NONE) { |
1168,7 → 1288,8 |
/* these are the most common settings */ |
if (rdev->flags & RADEON_SINGLE_CRTC) { |
/* VGA - primary dac */ |
ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); |
ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC); |
hpd.hpd = RADEON_HPD_NONE; |
radeon_add_legacy_encoder(dev, |
radeon_get_encoder_id(dev, |
ATOM_DEVICE_CRT1_SUPPORT, |
1178,10 → 1299,12 |
ATOM_DEVICE_CRT1_SUPPORT, |
DRM_MODE_CONNECTOR_VGA, |
&ddc_i2c, |
CONNECTOR_OBJECT_ID_VGA); |
CONNECTOR_OBJECT_ID_VGA, |
&hpd); |
} else if (rdev->flags & RADEON_IS_MOBILITY) { |
/* LVDS */ |
ddc_i2c = combios_setup_i2c_bus(RADEON_LCD_GPIO_MASK); |
ddc_i2c = combios_setup_i2c_bus(rdev, 0); |
hpd.hpd = RADEON_HPD_NONE; |
radeon_add_legacy_encoder(dev, |
radeon_get_encoder_id(dev, |
ATOM_DEVICE_LCD1_SUPPORT, |
1191,10 → 1314,12 |
ATOM_DEVICE_LCD1_SUPPORT, |
DRM_MODE_CONNECTOR_LVDS, |
&ddc_i2c, |
CONNECTOR_OBJECT_ID_LVDS); |
CONNECTOR_OBJECT_ID_LVDS, |
&hpd); |
|
/* VGA - primary dac */ |
ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); |
ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC); |
hpd.hpd = RADEON_HPD_NONE; |
radeon_add_legacy_encoder(dev, |
radeon_get_encoder_id(dev, |
ATOM_DEVICE_CRT1_SUPPORT, |
1204,10 → 1329,12 |
ATOM_DEVICE_CRT1_SUPPORT, |
DRM_MODE_CONNECTOR_VGA, |
&ddc_i2c, |
CONNECTOR_OBJECT_ID_VGA); |
CONNECTOR_OBJECT_ID_VGA, |
&hpd); |
} else { |
/* DVI-I - tv dac, int tmds */ |
ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC); |
ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC); |
hpd.hpd = RADEON_HPD_1; |
radeon_add_legacy_encoder(dev, |
radeon_get_encoder_id(dev, |
ATOM_DEVICE_DFP1_SUPPORT, |
1223,10 → 1350,12 |
ATOM_DEVICE_CRT2_SUPPORT, |
DRM_MODE_CONNECTOR_DVII, |
&ddc_i2c, |
CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I); |
CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I, |
&hpd); |
|
/* VGA - primary dac */ |
ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); |
ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC); |
hpd.hpd = RADEON_HPD_NONE; |
radeon_add_legacy_encoder(dev, |
radeon_get_encoder_id(dev, |
ATOM_DEVICE_CRT1_SUPPORT, |
1236,11 → 1365,14 |
ATOM_DEVICE_CRT1_SUPPORT, |
DRM_MODE_CONNECTOR_VGA, |
&ddc_i2c, |
CONNECTOR_OBJECT_ID_VGA); |
CONNECTOR_OBJECT_ID_VGA, |
&hpd); |
} |
|
if (rdev->family != CHIP_R100 && rdev->family != CHIP_R200) { |
/* TV - tv dac */ |
ddc_i2c.valid = false; |
hpd.hpd = RADEON_HPD_NONE; |
radeon_add_legacy_encoder(dev, |
radeon_get_encoder_id(dev, |
ATOM_DEVICE_TV1_SUPPORT, |
1250,7 → 1382,8 |
ATOM_DEVICE_TV1_SUPPORT, |
DRM_MODE_CONNECTOR_SVIDEO, |
&ddc_i2c, |
CONNECTOR_OBJECT_ID_SVIDEO); |
CONNECTOR_OBJECT_ID_SVIDEO, |
&hpd); |
} |
break; |
case CT_IBOOK: |
1257,7 → 1390,8 |
DRM_INFO("Connector Table: %d (ibook)\n", |
rdev->mode_info.connector_table); |
/* LVDS */ |
ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC); |
ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC); |
hpd.hpd = RADEON_HPD_NONE; |
radeon_add_legacy_encoder(dev, |
radeon_get_encoder_id(dev, |
ATOM_DEVICE_LCD1_SUPPORT, |
1265,9 → 1399,11 |
ATOM_DEVICE_LCD1_SUPPORT); |
radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT, |
DRM_MODE_CONNECTOR_LVDS, &ddc_i2c, |
CONNECTOR_OBJECT_ID_LVDS); |
CONNECTOR_OBJECT_ID_LVDS, |
&hpd); |
/* VGA - TV DAC */ |
ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); |
ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC); |
hpd.hpd = RADEON_HPD_NONE; |
radeon_add_legacy_encoder(dev, |
radeon_get_encoder_id(dev, |
ATOM_DEVICE_CRT2_SUPPORT, |
1275,8 → 1411,11 |
ATOM_DEVICE_CRT2_SUPPORT); |
radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT, |
DRM_MODE_CONNECTOR_VGA, &ddc_i2c, |
CONNECTOR_OBJECT_ID_VGA); |
CONNECTOR_OBJECT_ID_VGA, |
&hpd); |
/* TV - TV DAC */ |
ddc_i2c.valid = false; |
hpd.hpd = RADEON_HPD_NONE; |
radeon_add_legacy_encoder(dev, |
radeon_get_encoder_id(dev, |
ATOM_DEVICE_TV1_SUPPORT, |
1285,13 → 1424,15 |
radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, |
DRM_MODE_CONNECTOR_SVIDEO, |
&ddc_i2c, |
CONNECTOR_OBJECT_ID_SVIDEO); |
CONNECTOR_OBJECT_ID_SVIDEO, |
&hpd); |
break; |
case CT_POWERBOOK_EXTERNAL: |
DRM_INFO("Connector Table: %d (powerbook external tmds)\n", |
rdev->mode_info.connector_table); |
/* LVDS */ |
ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC); |
ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC); |
hpd.hpd = RADEON_HPD_NONE; |
radeon_add_legacy_encoder(dev, |
radeon_get_encoder_id(dev, |
ATOM_DEVICE_LCD1_SUPPORT, |
1299,9 → 1440,11 |
ATOM_DEVICE_LCD1_SUPPORT); |
radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT, |
DRM_MODE_CONNECTOR_LVDS, &ddc_i2c, |
CONNECTOR_OBJECT_ID_LVDS); |
CONNECTOR_OBJECT_ID_LVDS, |
&hpd); |
/* DVI-I - primary dac, ext tmds */ |
ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); |
ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC); |
hpd.hpd = RADEON_HPD_2; /* ??? */ |
radeon_add_legacy_encoder(dev, |
radeon_get_encoder_id(dev, |
ATOM_DEVICE_DFP2_SUPPORT, |
1317,8 → 1460,11 |
ATOM_DEVICE_DFP2_SUPPORT | |
ATOM_DEVICE_CRT1_SUPPORT, |
DRM_MODE_CONNECTOR_DVII, &ddc_i2c, |
CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I); |
CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I, |
&hpd); |
/* TV - TV DAC */ |
ddc_i2c.valid = false; |
hpd.hpd = RADEON_HPD_NONE; |
radeon_add_legacy_encoder(dev, |
radeon_get_encoder_id(dev, |
ATOM_DEVICE_TV1_SUPPORT, |
1327,13 → 1473,15 |
radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, |
DRM_MODE_CONNECTOR_SVIDEO, |
&ddc_i2c, |
CONNECTOR_OBJECT_ID_SVIDEO); |
CONNECTOR_OBJECT_ID_SVIDEO, |
&hpd); |
break; |
case CT_POWERBOOK_INTERNAL: |
DRM_INFO("Connector Table: %d (powerbook internal tmds)\n", |
rdev->mode_info.connector_table); |
/* LVDS */ |
ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC); |
ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC); |
hpd.hpd = RADEON_HPD_NONE; |
radeon_add_legacy_encoder(dev, |
radeon_get_encoder_id(dev, |
ATOM_DEVICE_LCD1_SUPPORT, |
1341,9 → 1489,11 |
ATOM_DEVICE_LCD1_SUPPORT); |
radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT, |
DRM_MODE_CONNECTOR_LVDS, &ddc_i2c, |
CONNECTOR_OBJECT_ID_LVDS); |
CONNECTOR_OBJECT_ID_LVDS, |
&hpd); |
/* DVI-I - primary dac, int tmds */ |
ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); |
ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC); |
hpd.hpd = RADEON_HPD_1; /* ??? */ |
radeon_add_legacy_encoder(dev, |
radeon_get_encoder_id(dev, |
ATOM_DEVICE_DFP1_SUPPORT, |
1358,8 → 1508,11 |
ATOM_DEVICE_DFP1_SUPPORT | |
ATOM_DEVICE_CRT1_SUPPORT, |
DRM_MODE_CONNECTOR_DVII, &ddc_i2c, |
CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I); |
CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I, |
&hpd); |
/* TV - TV DAC */ |
ddc_i2c.valid = false; |
hpd.hpd = RADEON_HPD_NONE; |
radeon_add_legacy_encoder(dev, |
radeon_get_encoder_id(dev, |
ATOM_DEVICE_TV1_SUPPORT, |
1368,13 → 1521,15 |
radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, |
DRM_MODE_CONNECTOR_SVIDEO, |
&ddc_i2c, |
CONNECTOR_OBJECT_ID_SVIDEO); |
CONNECTOR_OBJECT_ID_SVIDEO, |
&hpd); |
break; |
case CT_POWERBOOK_VGA: |
DRM_INFO("Connector Table: %d (powerbook vga)\n", |
rdev->mode_info.connector_table); |
/* LVDS */ |
ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC); |
ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC); |
hpd.hpd = RADEON_HPD_NONE; |
radeon_add_legacy_encoder(dev, |
radeon_get_encoder_id(dev, |
ATOM_DEVICE_LCD1_SUPPORT, |
1382,9 → 1537,11 |
ATOM_DEVICE_LCD1_SUPPORT); |
radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT, |
DRM_MODE_CONNECTOR_LVDS, &ddc_i2c, |
CONNECTOR_OBJECT_ID_LVDS); |
CONNECTOR_OBJECT_ID_LVDS, |
&hpd); |
/* VGA - primary dac */ |
ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); |
ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC); |
hpd.hpd = RADEON_HPD_NONE; |
radeon_add_legacy_encoder(dev, |
radeon_get_encoder_id(dev, |
ATOM_DEVICE_CRT1_SUPPORT, |
1392,8 → 1549,11 |
ATOM_DEVICE_CRT1_SUPPORT); |
radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT1_SUPPORT, |
DRM_MODE_CONNECTOR_VGA, &ddc_i2c, |
CONNECTOR_OBJECT_ID_VGA); |
CONNECTOR_OBJECT_ID_VGA, |
&hpd); |
/* TV - TV DAC */ |
ddc_i2c.valid = false; |
hpd.hpd = RADEON_HPD_NONE; |
radeon_add_legacy_encoder(dev, |
radeon_get_encoder_id(dev, |
ATOM_DEVICE_TV1_SUPPORT, |
1402,13 → 1562,15 |
radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, |
DRM_MODE_CONNECTOR_SVIDEO, |
&ddc_i2c, |
CONNECTOR_OBJECT_ID_SVIDEO); |
CONNECTOR_OBJECT_ID_SVIDEO, |
&hpd); |
break; |
case CT_MINI_EXTERNAL: |
DRM_INFO("Connector Table: %d (mini external tmds)\n", |
rdev->mode_info.connector_table); |
/* DVI-I - tv dac, ext tmds */ |
ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_CRT2_DDC); |
ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_CRT2_DDC); |
hpd.hpd = RADEON_HPD_2; /* ??? */ |
radeon_add_legacy_encoder(dev, |
radeon_get_encoder_id(dev, |
ATOM_DEVICE_DFP2_SUPPORT, |
1424,8 → 1586,11 |
ATOM_DEVICE_DFP2_SUPPORT | |
ATOM_DEVICE_CRT2_SUPPORT, |
DRM_MODE_CONNECTOR_DVII, &ddc_i2c, |
CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I); |
CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I, |
&hpd); |
/* TV - TV DAC */ |
ddc_i2c.valid = false; |
hpd.hpd = RADEON_HPD_NONE; |
radeon_add_legacy_encoder(dev, |
radeon_get_encoder_id(dev, |
ATOM_DEVICE_TV1_SUPPORT, |
1434,13 → 1599,15 |
radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_TV1_SUPPORT, |
DRM_MODE_CONNECTOR_SVIDEO, |
&ddc_i2c, |
CONNECTOR_OBJECT_ID_SVIDEO); |
CONNECTOR_OBJECT_ID_SVIDEO, |
&hpd); |
break; |
case CT_MINI_INTERNAL: |
DRM_INFO("Connector Table: %d (mini internal tmds)\n", |
rdev->mode_info.connector_table); |
/* DVI-I - tv dac, int tmds */ |
ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_CRT2_DDC); |
ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_CRT2_DDC); |
hpd.hpd = RADEON_HPD_1; /* ??? */ |
radeon_add_legacy_encoder(dev, |
radeon_get_encoder_id(dev, |
ATOM_DEVICE_DFP1_SUPPORT, |
1455,8 → 1622,11 |
ATOM_DEVICE_DFP1_SUPPORT | |
ATOM_DEVICE_CRT2_SUPPORT, |
DRM_MODE_CONNECTOR_DVII, &ddc_i2c, |
CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I); |
CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I, |
&hpd); |
/* TV - TV DAC */ |
ddc_i2c.valid = false; |
hpd.hpd = RADEON_HPD_NONE; |
radeon_add_legacy_encoder(dev, |
radeon_get_encoder_id(dev, |
ATOM_DEVICE_TV1_SUPPORT, |
1465,13 → 1635,15 |
radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_TV1_SUPPORT, |
DRM_MODE_CONNECTOR_SVIDEO, |
&ddc_i2c, |
CONNECTOR_OBJECT_ID_SVIDEO); |
CONNECTOR_OBJECT_ID_SVIDEO, |
&hpd); |
break; |
case CT_IMAC_G5_ISIGHT: |
DRM_INFO("Connector Table: %d (imac g5 isight)\n", |
rdev->mode_info.connector_table); |
/* DVI-D - int tmds */ |
ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_MONID); |
ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_MONID); |
hpd.hpd = RADEON_HPD_1; /* ??? */ |
radeon_add_legacy_encoder(dev, |
radeon_get_encoder_id(dev, |
ATOM_DEVICE_DFP1_SUPPORT, |
1479,9 → 1651,11 |
ATOM_DEVICE_DFP1_SUPPORT); |
radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_DFP1_SUPPORT, |
DRM_MODE_CONNECTOR_DVID, &ddc_i2c, |
CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D); |
CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D, |
&hpd); |
/* VGA - tv dac */ |
ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC); |
ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC); |
hpd.hpd = RADEON_HPD_NONE; |
radeon_add_legacy_encoder(dev, |
radeon_get_encoder_id(dev, |
ATOM_DEVICE_CRT2_SUPPORT, |
1489,8 → 1663,11 |
ATOM_DEVICE_CRT2_SUPPORT); |
radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT, |
DRM_MODE_CONNECTOR_VGA, &ddc_i2c, |
CONNECTOR_OBJECT_ID_VGA); |
CONNECTOR_OBJECT_ID_VGA, |
&hpd); |
/* TV - TV DAC */ |
ddc_i2c.valid = false; |
hpd.hpd = RADEON_HPD_NONE; |
radeon_add_legacy_encoder(dev, |
radeon_get_encoder_id(dev, |
ATOM_DEVICE_TV1_SUPPORT, |
1499,13 → 1676,15 |
radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, |
DRM_MODE_CONNECTOR_SVIDEO, |
&ddc_i2c, |
CONNECTOR_OBJECT_ID_SVIDEO); |
CONNECTOR_OBJECT_ID_SVIDEO, |
&hpd); |
break; |
case CT_EMAC: |
DRM_INFO("Connector Table: %d (emac)\n", |
rdev->mode_info.connector_table); |
/* VGA - primary dac */ |
ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); |
ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC); |
hpd.hpd = RADEON_HPD_NONE; |
radeon_add_legacy_encoder(dev, |
radeon_get_encoder_id(dev, |
ATOM_DEVICE_CRT1_SUPPORT, |
1513,9 → 1692,11 |
ATOM_DEVICE_CRT1_SUPPORT); |
radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_CRT1_SUPPORT, |
DRM_MODE_CONNECTOR_VGA, &ddc_i2c, |
CONNECTOR_OBJECT_ID_VGA); |
CONNECTOR_OBJECT_ID_VGA, |
&hpd); |
/* VGA - tv dac */ |
ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_CRT2_DDC); |
ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_CRT2_DDC); |
hpd.hpd = RADEON_HPD_NONE; |
radeon_add_legacy_encoder(dev, |
radeon_get_encoder_id(dev, |
ATOM_DEVICE_CRT2_SUPPORT, |
1523,8 → 1704,11 |
ATOM_DEVICE_CRT2_SUPPORT); |
radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT, |
DRM_MODE_CONNECTOR_VGA, &ddc_i2c, |
CONNECTOR_OBJECT_ID_VGA); |
CONNECTOR_OBJECT_ID_VGA, |
&hpd); |
/* TV - TV DAC */ |
ddc_i2c.valid = false; |
hpd.hpd = RADEON_HPD_NONE; |
radeon_add_legacy_encoder(dev, |
radeon_get_encoder_id(dev, |
ATOM_DEVICE_TV1_SUPPORT, |
1533,7 → 1717,8 |
radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, |
DRM_MODE_CONNECTOR_SVIDEO, |
&ddc_i2c, |
CONNECTOR_OBJECT_ID_SVIDEO); |
CONNECTOR_OBJECT_ID_SVIDEO, |
&hpd); |
break; |
default: |
DRM_INFO("Connector table: %d (invalid)\n", |
1550,7 → 1735,8 |
int bios_index, |
enum radeon_combios_connector |
*legacy_connector, |
struct radeon_i2c_bus_rec *ddc_i2c) |
struct radeon_i2c_bus_rec *ddc_i2c, |
struct radeon_hpd *hpd) |
{ |
struct radeon_device *rdev = dev->dev_private; |
|
1558,29 → 1744,26 |
if ((rdev->family == CHIP_RS400 || |
rdev->family == CHIP_RS480) && |
ddc_i2c->mask_clk_reg == RADEON_GPIO_CRT2_DDC) |
*ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_MONID); |
*ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_MONID); |
else if ((rdev->family == CHIP_RS400 || |
rdev->family == CHIP_RS480) && |
ddc_i2c->mask_clk_reg == RADEON_GPIO_MONID) { |
ddc_i2c->valid = true; |
*ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIOPAD_MASK); |
ddc_i2c->mask_clk_mask = (0x20 << 8); |
ddc_i2c->mask_data_mask = 0x80; |
ddc_i2c->a_clk_mask = (0x20 << 8); |
ddc_i2c->a_data_mask = 0x80; |
ddc_i2c->put_clk_mask = (0x20 << 8); |
ddc_i2c->put_data_mask = 0x80; |
ddc_i2c->get_clk_mask = (0x20 << 8); |
ddc_i2c->get_data_mask = 0x80; |
ddc_i2c->mask_clk_reg = RADEON_GPIOPAD_MASK; |
ddc_i2c->mask_data_reg = RADEON_GPIOPAD_MASK; |
ddc_i2c->a_clk_reg = RADEON_GPIOPAD_A; |
ddc_i2c->a_data_reg = RADEON_GPIOPAD_A; |
ddc_i2c->put_clk_reg = RADEON_GPIOPAD_EN; |
ddc_i2c->put_data_reg = RADEON_GPIOPAD_EN; |
ddc_i2c->get_clk_reg = RADEON_LCD_GPIO_Y_REG; |
ddc_i2c->get_data_reg = RADEON_LCD_GPIO_Y_REG; |
ddc_i2c->en_clk_mask = (0x20 << 8); |
ddc_i2c->en_data_mask = 0x80; |
ddc_i2c->y_clk_mask = (0x20 << 8); |
ddc_i2c->y_data_mask = 0x80; |
} |
|
/* R3xx+ chips don't have GPIO_CRT2_DDC gpio pad */ |
if ((rdev->family >= CHIP_R300) && |
ddc_i2c->mask_clk_reg == RADEON_GPIO_CRT2_DDC) |
*ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC); |
|
/* Certain IBM chipset RN50s have a BIOS reporting two VGAs, |
one with VGA DDC and one with CRT2 DDC. - kill the CRT2 DDC one */ |
if (dev->pdev->device == 0x515e && |
1624,6 → 1807,12 |
dev->pdev->subsystem_device == 0x280a) |
return false; |
|
/* MSI S270 has non-existent TV port */ |
if (dev->pdev->device == 0x5955 && |
dev->pdev->subsystem_vendor == 0x1462 && |
dev->pdev->subsystem_device == 0x0131) |
return false; |
|
return true; |
} |
|
1671,6 → 1860,7 |
enum radeon_combios_connector connector; |
int i = 0; |
struct radeon_i2c_bus_rec ddc_i2c; |
struct radeon_hpd hpd; |
|
if (rdev->bios == NULL) |
return false; |
1691,26 → 1881,40 |
switch (ddc_type) { |
case DDC_MONID: |
ddc_i2c = |
combios_setup_i2c_bus(RADEON_GPIO_MONID); |
combios_setup_i2c_bus(rdev, RADEON_GPIO_MONID); |
break; |
case DDC_DVI: |
ddc_i2c = |
combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC); |
combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC); |
break; |
case DDC_VGA: |
ddc_i2c = |
combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); |
combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC); |
break; |
case DDC_CRT2: |
ddc_i2c = |
combios_setup_i2c_bus(RADEON_GPIO_CRT2_DDC); |
combios_setup_i2c_bus(rdev, RADEON_GPIO_CRT2_DDC); |
break; |
default: |
break; |
} |
|
switch (connector) { |
case CONNECTOR_PROPRIETARY_LEGACY: |
case CONNECTOR_DVI_I_LEGACY: |
case CONNECTOR_DVI_D_LEGACY: |
if ((tmp >> 4) & 0x1) |
hpd.hpd = RADEON_HPD_2; |
else |
hpd.hpd = RADEON_HPD_1; |
break; |
default: |
hpd.hpd = RADEON_HPD_NONE; |
break; |
} |
|
if (!radeon_apply_legacy_quirks(dev, i, &connector, |
&ddc_i2c)) |
&ddc_i2c, &hpd)) |
continue; |
|
switch (connector) { |
1727,7 → 1931,8 |
legacy_connector_convert |
[connector], |
&ddc_i2c, |
CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D); |
CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D, |
&hpd); |
break; |
case CONNECTOR_CRT_LEGACY: |
if (tmp & 0x1) { |
1753,7 → 1958,8 |
legacy_connector_convert |
[connector], |
&ddc_i2c, |
CONNECTOR_OBJECT_ID_VGA); |
CONNECTOR_OBJECT_ID_VGA, |
&hpd); |
break; |
case CONNECTOR_DVI_I_LEGACY: |
devices = 0; |
1799,7 → 2005,8 |
legacy_connector_convert |
[connector], |
&ddc_i2c, |
connector_object_id); |
connector_object_id, |
&hpd); |
break; |
case CONNECTOR_DVI_D_LEGACY: |
if ((tmp >> 4) & 0x1) { |
1817,7 → 2024,8 |
legacy_connector_convert |
[connector], |
&ddc_i2c, |
connector_object_id); |
connector_object_id, |
&hpd); |
break; |
case CONNECTOR_CTV_LEGACY: |
case CONNECTOR_STV_LEGACY: |
1832,7 → 2040,8 |
legacy_connector_convert |
[connector], |
&ddc_i2c, |
CONNECTOR_OBJECT_ID_SVIDEO); |
CONNECTOR_OBJECT_ID_SVIDEO, |
&hpd); |
break; |
default: |
DRM_ERROR("Unknown connector type: %d\n", |
1858,7 → 2067,8 |
0), |
ATOM_DEVICE_DFP1_SUPPORT); |
|
ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC); |
ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC); |
hpd.hpd = RADEON_HPD_NONE; |
radeon_add_legacy_connector(dev, |
0, |
ATOM_DEVICE_CRT1_SUPPORT | |
1865,7 → 2075,8 |
ATOM_DEVICE_DFP1_SUPPORT, |
DRM_MODE_CONNECTOR_DVII, |
&ddc_i2c, |
CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I); |
CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I, |
&hpd); |
} else { |
uint16_t crt_info = |
combios_get_table_offset(dev, COMBIOS_CRT_INFO_TABLE); |
1876,13 → 2087,15 |
ATOM_DEVICE_CRT1_SUPPORT, |
1), |
ATOM_DEVICE_CRT1_SUPPORT); |
ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); |
ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC); |
hpd.hpd = RADEON_HPD_NONE; |
radeon_add_legacy_connector(dev, |
0, |
ATOM_DEVICE_CRT1_SUPPORT, |
DRM_MODE_CONNECTOR_VGA, |
&ddc_i2c, |
CONNECTOR_OBJECT_ID_VGA); |
CONNECTOR_OBJECT_ID_VGA, |
&hpd); |
} else { |
DRM_DEBUG("No connector info found\n"); |
return false; |
1910,27 → 2123,27 |
case DDC_MONID: |
ddc_i2c = |
combios_setup_i2c_bus |
(RADEON_GPIO_MONID); |
(rdev, RADEON_GPIO_MONID); |
break; |
case DDC_DVI: |
ddc_i2c = |
combios_setup_i2c_bus |
(RADEON_GPIO_DVI_DDC); |
(rdev, RADEON_GPIO_DVI_DDC); |
break; |
case DDC_VGA: |
ddc_i2c = |
combios_setup_i2c_bus |
(RADEON_GPIO_VGA_DDC); |
(rdev, RADEON_GPIO_VGA_DDC); |
break; |
case DDC_CRT2: |
ddc_i2c = |
combios_setup_i2c_bus |
(RADEON_GPIO_CRT2_DDC); |
(rdev, RADEON_GPIO_CRT2_DDC); |
break; |
case DDC_LCD: |
ddc_i2c = |
combios_setup_i2c_bus |
(RADEON_LCD_GPIO_MASK); |
(rdev, RADEON_GPIOPAD_MASK); |
ddc_i2c.mask_clk_mask = |
RBIOS32(lcd_ddc_info + 3); |
ddc_i2c.mask_data_mask = |
1939,19 → 2152,19 |
RBIOS32(lcd_ddc_info + 3); |
ddc_i2c.a_data_mask = |
RBIOS32(lcd_ddc_info + 7); |
ddc_i2c.put_clk_mask = |
ddc_i2c.en_clk_mask = |
RBIOS32(lcd_ddc_info + 3); |
ddc_i2c.put_data_mask = |
ddc_i2c.en_data_mask = |
RBIOS32(lcd_ddc_info + 7); |
ddc_i2c.get_clk_mask = |
ddc_i2c.y_clk_mask = |
RBIOS32(lcd_ddc_info + 3); |
ddc_i2c.get_data_mask = |
ddc_i2c.y_data_mask = |
RBIOS32(lcd_ddc_info + 7); |
break; |
case DDC_GPIO: |
ddc_i2c = |
combios_setup_i2c_bus |
(RADEON_MDGPIO_EN_REG); |
(rdev, RADEON_MDGPIO_MASK); |
ddc_i2c.mask_clk_mask = |
RBIOS32(lcd_ddc_info + 3); |
ddc_i2c.mask_data_mask = |
1960,13 → 2173,13 |
RBIOS32(lcd_ddc_info + 3); |
ddc_i2c.a_data_mask = |
RBIOS32(lcd_ddc_info + 7); |
ddc_i2c.put_clk_mask = |
ddc_i2c.en_clk_mask = |
RBIOS32(lcd_ddc_info + 3); |
ddc_i2c.put_data_mask = |
ddc_i2c.en_data_mask = |
RBIOS32(lcd_ddc_info + 7); |
ddc_i2c.get_clk_mask = |
ddc_i2c.y_clk_mask = |
RBIOS32(lcd_ddc_info + 3); |
ddc_i2c.get_data_mask = |
ddc_i2c.y_data_mask = |
RBIOS32(lcd_ddc_info + 7); |
break; |
default: |
1977,12 → 2190,14 |
} else |
ddc_i2c.valid = false; |
|
hpd.hpd = RADEON_HPD_NONE; |
radeon_add_legacy_connector(dev, |
5, |
ATOM_DEVICE_LCD1_SUPPORT, |
DRM_MODE_CONNECTOR_LVDS, |
&ddc_i2c, |
CONNECTOR_OBJECT_ID_LVDS); |
CONNECTOR_OBJECT_ID_LVDS, |
&hpd); |
} |
} |
|
1993,6 → 2208,7 |
if (tv_info) { |
if (RBIOS8(tv_info + 6) == 'T') { |
if (radeon_apply_legacy_tv_quirks(dev)) { |
hpd.hpd = RADEON_HPD_NONE; |
radeon_add_legacy_encoder(dev, |
radeon_get_encoder_id |
(dev, |
2003,7 → 2219,8 |
ATOM_DEVICE_TV1_SUPPORT, |
DRM_MODE_CONNECTOR_SVIDEO, |
&ddc_i2c, |
CONNECTOR_OBJECT_ID_SVIDEO); |
CONNECTOR_OBJECT_ID_SVIDEO, |
&hpd); |
} |
} |
} |
2014,6 → 2231,193 |
return true; |
} |
|
void radeon_external_tmds_setup(struct drm_encoder *encoder) |
{ |
struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
struct radeon_encoder_ext_tmds *tmds = radeon_encoder->enc_priv; |
|
if (!tmds) |
return; |
|
switch (tmds->dvo_chip) { |
case DVO_SIL164: |
/* sil 164 */ |
radeon_i2c_do_lock(tmds->i2c_bus, 1); |
radeon_i2c_sw_put_byte(tmds->i2c_bus, |
tmds->slave_addr, |
0x08, 0x30); |
radeon_i2c_sw_put_byte(tmds->i2c_bus, |
tmds->slave_addr, |
0x09, 0x00); |
radeon_i2c_sw_put_byte(tmds->i2c_bus, |
tmds->slave_addr, |
0x0a, 0x90); |
radeon_i2c_sw_put_byte(tmds->i2c_bus, |
tmds->slave_addr, |
0x0c, 0x89); |
radeon_i2c_sw_put_byte(tmds->i2c_bus, |
tmds->slave_addr, |
0x08, 0x3b); |
radeon_i2c_do_lock(tmds->i2c_bus, 0); |
break; |
case DVO_SIL1178: |
/* sil 1178 - untested */ |
/* |
* 0x0f, 0x44 |
* 0x0f, 0x4c |
* 0x0e, 0x01 |
* 0x0a, 0x80 |
* 0x09, 0x30 |
* 0x0c, 0xc9 |
* 0x0d, 0x70 |
* 0x08, 0x32 |
* 0x08, 0x33 |
*/ |
break; |
default: |
break; |
} |
|
} |
|
bool radeon_combios_external_tmds_setup(struct drm_encoder *encoder) |
{ |
struct drm_device *dev = encoder->dev; |
struct radeon_device *rdev = dev->dev_private; |
struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
uint16_t offset; |
uint8_t blocks, slave_addr, rev; |
uint32_t index, id; |
uint32_t reg, val, and_mask, or_mask; |
struct radeon_encoder_ext_tmds *tmds = radeon_encoder->enc_priv; |
|
if (rdev->bios == NULL) |
return false; |
|
if (!tmds) |
return false; |
|
if (rdev->flags & RADEON_IS_IGP) { |
offset = combios_get_table_offset(dev, COMBIOS_TMDS_POWER_ON_TABLE); |
rev = RBIOS8(offset); |
if (offset) { |
rev = RBIOS8(offset); |
if (rev > 1) { |
blocks = RBIOS8(offset + 3); |
index = offset + 4; |
while (blocks > 0) { |
id = RBIOS16(index); |
index += 2; |
switch (id >> 13) { |
case 0: |
reg = (id & 0x1fff) * 4; |
val = RBIOS32(index); |
index += 4; |
WREG32(reg, val); |
break; |
case 2: |
reg = (id & 0x1fff) * 4; |
and_mask = RBIOS32(index); |
index += 4; |
or_mask = RBIOS32(index); |
index += 4; |
val = RREG32(reg); |
val = (val & and_mask) | or_mask; |
WREG32(reg, val); |
break; |
case 3: |
val = RBIOS16(index); |
index += 2; |
udelay(val); |
break; |
case 4: |
val = RBIOS16(index); |
index += 2; |
udelay(val * 1000); |
break; |
case 6: |
slave_addr = id & 0xff; |
slave_addr >>= 1; /* 7 bit addressing */ |
index++; |
reg = RBIOS8(index); |
index++; |
val = RBIOS8(index); |
index++; |
radeon_i2c_do_lock(tmds->i2c_bus, 1); |
radeon_i2c_sw_put_byte(tmds->i2c_bus, |
slave_addr, |
reg, val); |
radeon_i2c_do_lock(tmds->i2c_bus, 0); |
break; |
default: |
DRM_ERROR("Unknown id %d\n", id >> 13); |
break; |
} |
blocks--; |
} |
return true; |
} |
} |
} else { |
offset = combios_get_table_offset(dev, COMBIOS_EXT_TMDS_INFO_TABLE); |
if (offset) { |
index = offset + 10; |
id = RBIOS16(index); |
while (id != 0xffff) { |
index += 2; |
switch (id >> 13) { |
case 0: |
reg = (id & 0x1fff) * 4; |
val = RBIOS32(index); |
WREG32(reg, val); |
break; |
case 2: |
reg = (id & 0x1fff) * 4; |
and_mask = RBIOS32(index); |
index += 4; |
or_mask = RBIOS32(index); |
index += 4; |
val = RREG32(reg); |
val = (val & and_mask) | or_mask; |
WREG32(reg, val); |
break; |
case 4: |
val = RBIOS16(index); |
index += 2; |
udelay(val); |
break; |
case 5: |
reg = id & 0x1fff; |
and_mask = RBIOS32(index); |
index += 4; |
or_mask = RBIOS32(index); |
index += 4; |
val = RREG32_PLL(reg); |
val = (val & and_mask) | or_mask; |
WREG32_PLL(reg, val); |
break; |
case 6: |
reg = id & 0x1fff; |
val = RBIOS8(index); |
index += 1; |
radeon_i2c_do_lock(tmds->i2c_bus, 1); |
radeon_i2c_sw_put_byte(tmds->i2c_bus, |
tmds->slave_addr, |
reg, val); |
radeon_i2c_do_lock(tmds->i2c_bus, 0); |
break; |
default: |
DRM_ERROR("Unknown id %d\n", id >> 13); |
break; |
} |
id = RBIOS16(index); |
} |
return true; |
} |
} |
return false; |
} |
|
static void combios_parse_mmio_table(struct drm_device *dev, uint16_t offset) |
{ |
struct radeon_device *rdev = dev->dev_private; |