| 31,7 → 31,7 |
|---|
| #include "nid.h" |
| #include "atom.h" |
| #include "ni_reg.h" |
| //#include "cayman_blit_shaders.h" |
| #include "cayman_blit_shaders.h" |
| |
| extern void evergreen_mc_stop(struct radeon_device *rdev, struct evergreen_mc_save *save); |
| extern void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *save); |
| 389,7 → 389,6 |
|---|
| return err; |
| } |
| |
| #if 0 |
| /* |
| * Core functions |
| */ |
| 1029,12 → 1028,6 |
|---|
| } |
| } |
| |
| void cayman_pcie_gart_fini(struct radeon_device *rdev) |
| { |
| cayman_pcie_gart_disable(rdev); |
| radeon_gart_table_vram_free(rdev); |
| radeon_gart_fini(rdev); |
| } |
| |
| /* |
| * CP. |
| 1044,7 → 1037,6 |
|---|
| if (enable) |
| WREG32(CP_ME_CNTL, 0); |
| else { |
| radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size); |
| WREG32(CP_ME_CNTL, (CP_ME_HALT | CP_PFP_HALT)); |
| WREG32(SCRATCH_UMSK, 0); |
| } |
| 1142,12 → 1134,8 |
|---|
| return 0; |
| } |
| |
| static void cayman_cp_fini(struct radeon_device *rdev) |
| { |
| cayman_cp_enable(rdev, false); |
| radeon_ring_fini(rdev); |
| } |
| |
| |
| int cayman_cp_resume(struct radeon_device *rdev) |
| { |
| u32 tmp; |
| 1388,26 → 1376,10 |
|---|
| return r; |
| cayman_gpu_init(rdev); |
| |
| r = evergreen_blit_init(rdev); |
| if (r) { |
| evergreen_blit_fini(rdev); |
| rdev->asic->copy = NULL; |
| dev_warn(rdev->dev, "failed blitter (%d) falling back to memcpy\n", r); |
| } |
| |
| /* allocate wb buffer */ |
| r = radeon_wb_init(rdev); |
| if (r) |
| return r; |
| |
| /* Enable IRQ */ |
| r = r600_irq_init(rdev); |
| if (r) { |
| DRM_ERROR("radeon: IH init failed (%d).\n", r); |
| radeon_irq_kms_fini(rdev); |
| return r; |
| } |
| evergreen_irq_set(rdev); |
| |
| r = radeon_ring_init(rdev, rdev->cp.ring_size); |
| if (r) |
| 1422,54 → 1394,10 |
|---|
| return 0; |
| } |
| |
| int cayman_resume(struct radeon_device *rdev) |
| { |
| int r; |
| |
| /* Do not reset GPU before posting, on rv770 hw unlike on r500 hw, |
| * posting will perform necessary task to bring back GPU into good |
| * shape. |
| */ |
| /* post card */ |
| atom_asic_init(rdev->mode_info.atom_context); |
| |
| r = cayman_startup(rdev); |
| if (r) { |
| DRM_ERROR("cayman startup failed on resume\n"); |
| return r; |
| } |
| |
| r = r600_ib_test(rdev); |
| if (r) { |
| DRM_ERROR("radeon: failled testing IB (%d).\n", r); |
| return r; |
| } |
| |
| return r; |
| |
| } |
| |
| int cayman_suspend(struct radeon_device *rdev) |
| { |
| int r; |
| |
| /* FIXME: we should wait for ring to be empty */ |
| cayman_cp_enable(rdev, false); |
| rdev->cp.ready = false; |
| evergreen_irq_suspend(rdev); |
| radeon_wb_disable(rdev); |
| cayman_pcie_gart_disable(rdev); |
| |
| /* unpin shaders bo */ |
| r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false); |
| if (likely(r == 0)) { |
| radeon_bo_unpin(rdev->r600_blit.shader_obj); |
| radeon_bo_unreserve(rdev->r600_blit.shader_obj); |
| } |
| |
| return 0; |
| } |
| |
| /* Plan is to move initialization in that function and use |
| * helper function so that radeon_device_init pretty much |
| * do nothing more than calling asic specific function. This |
| 1514,9 → 1442,6 |
|---|
| /* Initialize clocks */ |
| radeon_get_clock_info(rdev->ddev); |
| /* Fence driver */ |
| r = radeon_fence_driver_init(rdev); |
| if (r) |
| return r; |
| /* initialize memory controller */ |
| r = evergreen_mc_init(rdev); |
| if (r) |
| 1526,15 → 1451,10 |
|---|
| if (r) |
| return r; |
| |
| r = radeon_irq_kms_init(rdev); |
| if (r) |
| return r; |
| |
| rdev->cp.ring_obj = NULL; |
| r600_ring_init(rdev, 1024 * 1024); |
| |
| rdev->ih.ring_obj = NULL; |
| r600_ih_ring_init(rdev, 64 * 1024); |
| |
| r = r600_pcie_gart_init(rdev); |
| if (r) |
| 1544,25 → 1464,10 |
|---|
| r = cayman_startup(rdev); |
| if (r) { |
| dev_err(rdev->dev, "disabling GPU acceleration\n"); |
| cayman_cp_fini(rdev); |
| r600_irq_fini(rdev); |
| radeon_wb_fini(rdev); |
| radeon_irq_kms_fini(rdev); |
| cayman_pcie_gart_fini(rdev); |
| rdev->accel_working = false; |
| } |
| if (rdev->accel_working) { |
| r = radeon_ib_pool_init(rdev); |
| if (r) { |
| DRM_ERROR("radeon: failed initializing IB pool (%d).\n", r); |
| rdev->accel_working = false; |
| } |
| r = r600_ib_test(rdev); |
| if (r) { |
| DRM_ERROR("radeon: failed testing IB (%d).\n", r); |
| rdev->accel_working = false; |
| } |
| } |
| |
| /* Don't start up if the MC ucode is missing. |
| * The default clocks and voltages before the MC ucode |
| 1576,19 → 1481,3 |
|---|
| return 0; |
| } |
| |
| void cayman_fini(struct radeon_device *rdev) |
| { |
| evergreen_blit_fini(rdev); |
| cayman_cp_fini(rdev); |
| r600_irq_fini(rdev); |
| radeon_wb_fini(rdev); |
| radeon_irq_kms_fini(rdev); |
| cayman_pcie_gart_fini(rdev); |
| radeon_gem_fini(rdev); |
| radeon_fence_driver_fini(rdev); |
| radeon_bo_fini(rdev); |
| radeon_atombios_fini(rdev); |
| kfree(rdev->bios); |
| rdev->bios = NULL; |
| } |
| #endif |