| 610,16 → 610,19 |
|---|
| { |
| unsigned i; |
| int r; |
| void __iomem *ptr = (void *)rdev->vram_scratch.ptr; |
| unsigned index; |
| u32 tmp; |
| u64 gpu_addr; |
| |
| if (!ptr) { |
| DRM_ERROR("invalid vram scratch pointer\n"); |
| return -EINVAL; |
| } |
| if (ring->idx == R600_RING_TYPE_DMA_INDEX) |
| index = R600_WB_DMA_RING_TEST_OFFSET; |
| else |
| index = CAYMAN_WB_DMA1_RING_TEST_OFFSET; |
| |
| gpu_addr = rdev->wb.gpu_addr + index; |
| |
| tmp = 0xCAFEDEAD; |
| writel(tmp, ptr); |
| rdev->wb.wb[index/4] = cpu_to_le32(tmp); |
| |
| r = radeon_ring_lock(rdev, ring, 5); |
| if (r) { |
| 627,14 → 630,14 |
|---|
| return r; |
| } |
| radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_WRITE, SDMA_WRITE_SUB_OPCODE_LINEAR, 0)); |
| radeon_ring_write(ring, rdev->vram_scratch.gpu_addr & 0xfffffffc); |
| radeon_ring_write(ring, upper_32_bits(rdev->vram_scratch.gpu_addr)); |
| radeon_ring_write(ring, lower_32_bits(gpu_addr)); |
| radeon_ring_write(ring, upper_32_bits(gpu_addr)); |
| radeon_ring_write(ring, 1); /* number of DWs to follow */ |
| radeon_ring_write(ring, 0xDEADBEEF); |
| radeon_ring_unlock_commit(rdev, ring, false); |
| |
| for (i = 0; i < rdev->usec_timeout; i++) { |
| tmp = readl(ptr); |
| tmp = le32_to_cpu(rdev->wb.wb[index/4]); |
| if (tmp == 0xDEADBEEF) |
| break; |
| DRM_UDELAY(1); |