3626,7 → 3626,6 |
intel_dp_reset_link_train(struct intel_dp *intel_dp, uint32_t *DP, |
uint8_t dp_train_pat) |
{ |
if (!intel_dp->train_set_valid) |
memset(intel_dp->train_set, 0, sizeof(intel_dp->train_set)); |
intel_dp_set_signal_levels(intel_dp, DP); |
return intel_dp_set_link_train(intel_dp, DP, dp_train_pat); |
3744,22 → 3743,6 |
break; |
} |
|
/* |
* if we used previously trained voltage and pre-emphasis values |
* and we don't get clock recovery, reset link training values |
*/ |
if (intel_dp->train_set_valid) { |
DRM_DEBUG_KMS("clock recovery not ok, reset"); |
/* clear the flag as we are not reusing train set */ |
intel_dp->train_set_valid = false; |
if (!intel_dp_reset_link_train(intel_dp, &DP, |
DP_TRAINING_PATTERN_1 | |
DP_LINK_SCRAMBLING_DISABLE)) { |
DRM_ERROR("failed to enable link training\n"); |
return; |
} |
continue; |
} |
|
/* Check to see if we've tried the max voltage */ |
for (i = 0; i < intel_dp->lane_count; i++) |
3852,7 → 3835,6 |
/* Make sure clock is still ok */ |
if (!drm_dp_clock_recovery_ok(link_status, |
intel_dp->lane_count)) { |
intel_dp->train_set_valid = false; |
intel_dp_link_training_clock_recovery(intel_dp); |
intel_dp_set_link_train(intel_dp, &DP, |
training_pattern | |
3869,7 → 3851,6 |
|
/* Try 5 times, then try clock recovery if that fails */ |
if (tries > 5) { |
intel_dp->train_set_valid = false; |
intel_dp_link_training_clock_recovery(intel_dp); |
intel_dp_set_link_train(intel_dp, &DP, |
training_pattern | |
3891,11 → 3872,9 |
|
intel_dp->DP = DP; |
|
if (channel_eq) { |
intel_dp->train_set_valid = true; |
if (channel_eq) |
DRM_DEBUG_KMS("Channel EQ done. DP Training successful\n"); |
} |
} |
|
void intel_dp_stop_link_train(struct intel_dp *intel_dp) |
{ |
4611,7 → 4590,7 |
return I915_READ(PORT_HOTPLUG_STAT) & bit; |
} |
|
static bool vlv_digital_port_connected(struct drm_i915_private *dev_priv, |
static bool gm45_digital_port_connected(struct drm_i915_private *dev_priv, |
struct intel_digital_port *port) |
{ |
u32 bit; |
4618,13 → 4597,13 |
|
switch (port->port) { |
case PORT_B: |
bit = PORTB_HOTPLUG_LIVE_STATUS_VLV; |
bit = PORTB_HOTPLUG_LIVE_STATUS_GM45; |
break; |
case PORT_C: |
bit = PORTC_HOTPLUG_LIVE_STATUS_VLV; |
bit = PORTC_HOTPLUG_LIVE_STATUS_GM45; |
break; |
case PORT_D: |
bit = PORTD_HOTPLUG_LIVE_STATUS_VLV; |
bit = PORTD_HOTPLUG_LIVE_STATUS_GM45; |
break; |
default: |
MISSING_CASE(port->port); |
4676,8 → 4655,8 |
return cpt_digital_port_connected(dev_priv, port); |
else if (IS_BROXTON(dev_priv)) |
return bxt_digital_port_connected(dev_priv, port); |
else if (IS_VALLEYVIEW(dev_priv)) |
return vlv_digital_port_connected(dev_priv, port); |
else if (IS_GM45(dev_priv)) |
return gm45_digital_port_connected(dev_priv, port); |
else |
return g4x_digital_port_connected(dev_priv, port); |
} |
5029,7 → 5008,7 |
kfree(intel_dig_port); |
} |
|
static void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder) |
void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder) |
{ |
struct intel_dp *intel_dp = enc_to_intel_dp(&intel_encoder->base); |
|
5071,15 → 5050,17 |
edp_panel_vdd_schedule_off(intel_dp); |
} |
|
static void intel_dp_encoder_reset(struct drm_encoder *encoder) |
void intel_dp_encoder_reset(struct drm_encoder *encoder) |
{ |
struct intel_dp *intel_dp; |
struct drm_i915_private *dev_priv = to_i915(encoder->dev); |
struct intel_dp *intel_dp = enc_to_intel_dp(encoder); |
|
if (!HAS_DDI(dev_priv)) |
intel_dp->DP = I915_READ(intel_dp->output_reg); |
|
if (to_intel_encoder(encoder)->type != INTEL_OUTPUT_EDP) |
return; |
|
intel_dp = enc_to_intel_dp(encoder); |
|
pps_lock(intel_dp); |
|
/* |
5151,9 → 5132,6 |
intel_display_power_get(dev_priv, power_domain); |
|
if (long_hpd) { |
/* indicate that we need to restart link training */ |
intel_dp->train_set_valid = false; |
|
if (!intel_digital_port_connected(dev_priv, intel_dig_port)) |
goto mst_fail; |
|
6127,8 → 6105,9 |
return true; |
} |
|
void |
intel_dp_init(struct drm_device *dev, int output_reg, enum port port) |
bool intel_dp_init(struct drm_device *dev, |
int output_reg, |
enum port port) |
{ |
struct drm_i915_private *dev_priv = dev->dev_private; |
struct intel_digital_port *intel_dig_port; |
6138,7 → 6117,7 |
|
intel_dig_port = kzalloc(sizeof(*intel_dig_port), GFP_KERNEL); |
if (!intel_dig_port) |
return; |
return false; |
|
intel_connector = intel_connector_alloc(); |
if (!intel_connector) |
6193,7 → 6172,7 |
if (!intel_dp_init_connector(intel_dig_port, intel_connector)) |
goto err_init_connector; |
|
return; |
return true; |
|
err_init_connector: |
drm_encoder_cleanup(encoder); |
6200,8 → 6179,7 |
kfree(intel_connector); |
err_connector_alloc: |
kfree(intel_dig_port); |
|
return; |
return false; |
} |
|
void intel_dp_mst_suspend(struct drm_device *dev) |