| 1390,7 → 1390,27 |
|---|
| else |
| pipe_config->port_clock = 270000; |
| } |
| |
| if (is_edp(intel_dp) && dev_priv->vbt.edp_bpp && |
| pipe_config->pipe_bpp > dev_priv->vbt.edp_bpp) { |
| /* |
| * This is a big fat ugly hack. |
| * |
| * Some machines in UEFI boot mode provide us a VBT that has 18 |
| * bpp and 1.62 GHz link bandwidth for eDP, which for reasons |
| * unknown we fail to light up. Yet the same BIOS boots up with |
| * 24 bpp and 2.7 GHz link. Use the same bpp as the BIOS uses as |
| * max, not what it tells us to use. |
| * |
| * Note: This will still be broken if the eDP panel is not lit |
| * up by the BIOS, and thus we can't get the mode at module |
| * load. |
| */ |
| DRM_DEBUG_KMS("pipe has %d bpp for eDP panel, overriding BIOS-provided max %d bpp\n", |
| pipe_config->pipe_bpp, dev_priv->vbt.edp_bpp); |
| dev_priv->vbt.edp_bpp = pipe_config->pipe_bpp; |
| } |
| } |
| |
| static bool is_edp_psr(struct intel_dp *intel_dp) |
| { |