1297,8 → 1297,6 |
int ret = 0, mmio_bar, mmio_size; |
uint32_t aperture_size; |
|
ENTER(); |
|
info = (struct intel_device_info *) flags; |
|
#if 0 |
1384,17 → 1382,9 |
aperture_size = dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT; |
dev_priv->mm.gtt_base_addr = dev_priv->mm.gtt->gma_bus_addr; |
|
dbgprintf("gtt_base_addr %x aperture_size %d\n", |
DRM_INFO("gtt_base_addr %x aperture_size %d\n", |
dev_priv->mm.gtt_base_addr, aperture_size ); |
|
// dev_priv->mm.gtt_mapping = |
// io_mapping_create_wc(dev_priv->mm.gtt_base_addr, |
// aperture_size); |
// if (dev_priv->mm.gtt_mapping == NULL) { |
// ret = -EIO; |
// goto out_rmmap; |
// } |
|
// i915_mtrr_setup(dev_priv, dev_priv->mm.gtt_base_addr, |
// aperture_size); |
|
1489,8 → 1479,6 |
if (IS_GEN5(dev)) |
intel_gpu_ips_init(dev_priv); |
|
LEAVE(); |
|
return 0; |
|
out_gem_unload: |