BlueGreycalmElegant

Català-Valencià – Catalan中文 – Chinese (Simplified)中文 – Chinese (Traditional)Česky – CzechDansk – DanishNederlands – DutchEnglish – EnglishSuomi – FinnishFrançais – FrenchDeutsch – Germanעברית – Hebrewहिंदी – HindiMagyar – HungarianBahasa Indonesia – IndonesianItaliano – Italian日本語 – Japanese한국어 – KoreanМакедонски – Macedonianमराठी – MarathiNorsk – NorwegianPolski – PolishPortuguês – PortuguesePortuguês – Portuguese (Brazil)Русский – RussianSlovenčina – SlovakSlovenščina – SlovenianEspañol – SpanishSvenska – SwedishTürkçe – TurkishУкраїнська – UkrainianOëzbekcha – Uzbek

Compare Revisions

• This comparison shows the changes necessary to convert path

  → /drivers/ @ 1316

  → /drivers/ @ 1317

  ↔ Reverse comparison

• Compare Path:	Rev

  With Path:	Rev

Regard whitespace Rev 1316 → Rev 1317

/drivers/old/ati2d.asm
0,0 → 1,1731
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; ;;
;; Copyright (C) KolibriOS team 2004-2007. All rights reserved. ;;
;; Distributed under terms of the GNU General Public License ;;
;; ;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
format MS COFF
DEBUG equ 1
include 'proc32.inc'
include 'imports.inc'
R500_HW2D equ 0
API_VERSION equ 0x01000100
STRIDE equ 8
VID_ATI equ 0x1002
LOAD_FROM_FILE equ 0
LOAD_FROM_MEM equ 1
LOAD_INDIRECT equ 2
LOAD_SYSTEM equ 3
SRV_GETVERSION equ 0
struc BITMAPINFOHEADER {
.biSize dd ? ; DWORD
.biWidth dd ? ; LONG
.biHeight dd ? ; LONG
.biPlanes dw ? ; WORD
.biBitCount dw ? ; WORD
.biCompression dd ? ; DWORD
.biSizeImage dd ? ; DWORD
.biXPelsPerMeter dd ? ; LONG
.biYPelsPerMeter dd ? ; LONG
.biClrUsed dd ? ; DWORD
.biClrImportant dd ? ; DWORD
}
virtual at 0
BI BITMAPINFOHEADER
end virtual
struc CURSOR
{;common object header
.magic dd ? ;'CURS'
.destroy dd ? ;internal destructor
.fd dd ? ;next object in list
.bk dd ? ;prev object in list
.pid dd ? ;owner id
;cursor data
.base dd ? ;allocated memory
.hot_x dd ? ;hotspot coords
.hot_y dd ?
}
virtual at 0
CURSOR CURSOR
end virtual
CURSOR_SIZE equ 32
OS_BASE equ 0x80000000
SLOT_BASE equ (OS_BASE+0x0080000)
LFB_BASE equ 0xFE000000
PG_SW equ 0x003
PG_NOCACHE equ 0x018
PCI_MEMORY_MASK equ 0xfffffff0
struc IOCTL
{ .handle dd ?
.io_code dd ?
.input dd ?
.inp_size dd ?
.output dd ?
.out_size dd ?
}
virtual at 0
IOCTL IOCTL
end virtual
;MMIO equ 0F9000000h
RD_RB3D_CNTL equ 1c3ch
RD_MEM_CNTL equ 0140h
RD_CRTC_GEN_CNTL equ 0050h
RD_CRTC_CUR_EN equ 10000h
RD_DISPLAY_BASE_ADDR equ 023ch
RD_DEFAULT_OFFSET equ 16e0h
CUR_HORZ_VERT_OFF equ 0268h
CUR_HORZ_VERT_POSN equ 0264h
CUR_OFFSET equ 0260h
RD_RB3D_CNTL equ 1c3ch
RD_RBBM_STATUS equ 0e40h
RD_RBBM_FIFOCNT_MASK equ 007fh
RD_RBBM_ACTIVE equ 80000000h
RD_TIMEOUT equ 2000000
RD_DP_GUI_MASTER_CNTL equ 0146ch
RD_DP_BRUSH_BKGD_CLR equ 01478h
RD_DP_BRUSH_FRGD_CLR equ 0147ch
RD_DP_SRC_BKGD_CLR equ 015dch
RD_DP_SRC_FRGD_CLR equ 015d8h
RD_DP_CNTL equ 016c0h
RD_DP_DATATYPE equ 016c4h
RD_DP_WRITE_MASK equ 016cch
RD_DP_SRC_SOURCE_MEMORY equ (2 shl 24)
RD_DP_SRC_SOURCE_HOST_DATA equ (3 shl 24)
RD_DEFAULT_SC_BOTTOM_RIGHT equ 16e8h
RD_GMC_BRUSH_SOLID_COLOR equ (13 shl 4)
RD_DEFAULT_SC_RIGHT_MAX equ 1fffh
RD_DEFAULT_SC_BOTTOM_MAX equ 1fff0000h
RD_GMC_DST_DATATYPE_SHIFT equ 8
RD_ROP3_S equ 00cc0000h
RD_ROP3_P equ 00f00000h
RD_RB2D_DSTCACHE_MODE equ 03428h
RD_RB2D_DSTCACHE_CTLSTAT equ 0342ch
RD_RB2D_DC_FLUSH_ALL equ 000fh
RD_RB2D_DC_BUSY equ 80000000h
RD_GMC_BRUSH_SOLID_COLOR equ 000000D0h
RD_GMC_SRC_DATATYPE_COLOR equ (3 shl 12)
RD_GMC_CLR_CMP_CNTL_DIS equ (1 shl 28)
RD_GMC_WR_MSK_DIS equ (1 shl 30)
cmdSolidFill equ 73f036d0h
RD_DST_PITCH_OFFSET equ 142ch
RD_SRC_PITCH_OFFSET equ 1428h
RD_DST_X_LEFT_TO_RIGHT equ 1
RD_DST_Y_TOP_TO_BOTTOM equ 2
RD_DST_Y_X equ 1438h
RD_DST_WIDTH_HEIGHT equ 1598h
RD_DST_LINE_START equ 1600h
RD_DST_LINE_END equ 1604h
R300_MEM_NUM_CHANNELS_MASK equ 0003h
macro rdr op1, op2
{
mov edi, [ati_io]
mov op1, [edi+op2]
}
macro BEGIN_RING
{
mov edi, [rhd.ring_base]
mov edx, [rhd.ring_wp]
}
macro COMMIT_RING
{
and edx, 0x1FFF
mov [rhd.ring_wp], edx
lock add [esp], dword 0 ; Flush writes to ring
wrr RADEON_CP_RB_WPTR, edx
rdr eax, RADEON_CP_RB_RPTR
}
macro OUT_PACKET0 reg, count
{
mov eax, (RADEON_CP_PACKET0 + (count shl 16) + (reg shr 2))
mov [edi+edx*4], eax
inc edx
}
macro OUT_PACKET3 pkt, count
{
mov eax, (RADEON_CP_PACKET3 or pkt or (count shl 16))
mov [edi+edx*4], eax
inc edx
}
macro OUT_RING val
{
mov eax, val
mov [edi+edx*4], eax
inc edx
}
macro RADEON_WAIT_UNTIL_IDLE
{
OUT_PACKET0 RADEON_WAIT_UNTIL, 0
OUT_RING RADEON_WAIT_2D_IDLECLEAN + \
RADEON_WAIT_3D_IDLECLEAN + \
RADEON_WAIT_HOST_IDLECLEAN
}
macro RADEON_PURGE_CACHE
{
OUT_PACKET0 R5XX_RB3D_DSTCACHE_CTLSTAT, 0
OUT_RING R5XX_RB3D_DC_FLUSH_ALL
}
macro RADEON_PURGE_ZCACHE
{
OUT_PACKET0 RADEON_RB3D_ZCACHE_CTLSTAT, 0
OUT_RING RADEON_RB3D_ZC_FLUSH_ALL
}
macro wrr dest, src
{
mov edi, [ati_io]
mov dword [edi+dest], src
}
macro rmask dest, val, mask
{
mov edi, [ati_io]
mov eax, [edi+dest]
and eax, not mask
or eax, (val and mask)
mov [edi+dest], eax
}
public START
public service_proc
public version
CURSOR_IMAGE_OFFSET equ 0x00500000
DRV_ENTRY equ 1
DRV_EXIT equ -1
section '.flat' code readable align 16
proc START stdcall, state:dword
cmp [state], 1
jne .restore
if DEBUG
mov esi, msgInit
call SysMsgBoardStr
end if
call detect_ati
test eax, eax
jz .fail
mov ebx, [SelectHwCursor]
mov ecx, [SetHwCursor]
mov edx, [HwCursorRestore]
mov esi, [HwCursorCreate]
mov [oldSelect], ebx
mov [oldSet], ecx
mov [oldRestore], edx
mov [oldCreate], esi
call eax
or eax, -1
mov [cursor_map], eax
mov [cursor_map+4], eax
mov edx, cursor_map
mov [cursor_start], edx
add edx, 8
mov [cursor_end], edx
stdcall RegService, sz_ati_srv, service_proc
test eax, eax
jz .restore
if R500_HW2D
stdcall RegService, sz_HDraw_srv, r500_HDraw
mov ebx, START
and ebx, -4096
mov [eax+0x20], ebx
mov [eax+0x24], dword 0 ;hack
end if
mov ebx, [fnSelect]
mov ecx, [fnSet]
mov [SelectHwCursor], ebx
mov [SetHwCursor], ecx
mov dword [HwCursorRestore], drv_restore
mov dword [HwCursorCreate], ati_cursor
ret
.restore:
mov eax, [oldSelect]
mov ebx, [oldSet]
mov ecx, [oldRestore]
mov edx, [oldCreate]
mov [SelectHwCursor], eax
mov [SetHwCursor], ebx
mov [HwCursorRestore], ecx
mov [HwCursorCreate], edx
xor eax, eax
ret
.fail:
if DEBUG
mov esi, msgFail
call SysMsgBoardStr
end if
xor eax, eax
ret
endp
handle equ IOCTL.handle
io_code equ IOCTL.io_code
input equ IOCTL.input
inp_size equ IOCTL.inp_size
output equ IOCTL.output
out_size equ IOCTL.out_size
align 4
proc service_proc stdcall, ioctl:dword
mov ebx, [ioctl]
cmp [ebx+io_code], SRV_GETVERSION
jne .fail
mov eax, [ebx+output]
cmp [ebx+out_size], 4
jne .fail
mov [eax], dword API_VERSION
xor eax, eax
ret
.fail:
or eax, -1
ret
endp
restore handle
restore io_code
restore input
restore inp_size
restore output
restore out_size
align 4
proc detect_ati
locals
last_bus dd ?
endl
xor eax, eax
mov [bus], eax
inc eax
call PciApi
cmp eax, -1
je .err
mov [last_bus], eax
.next_bus:
and [devfn], 0
.next_dev:
stdcall PciRead32, [bus], [devfn], dword 0
test eax, eax
jz .next
cmp eax, -1
je .next
mov edi, devices
@@:
mov ebx, [edi]
test ebx, ebx
jz .next
cmp eax, ebx
je .found
add edi, STRIDE
jmp @B
.next:
inc [devfn]
cmp [devfn], 256
jb .next_dev
mov eax, [bus]
inc eax
mov [bus], eax
cmp eax, [last_bus]
jna .next_bus
xor eax, eax
ret
.found:
mov eax, [edi+4]
ret
.err:
xor eax, eax
ret
endp
align 4
proc init_r200
stdcall PciRead32, [bus], [devfn], dword 0x18
and eax, PCI_MEMORY_MASK
stdcall MapIoMem,eax,0x10000,(PG_SW+PG_NOCACHE)
test eax, eax
jz .fail
mov [ati_io], eax
mov edi, eax
mov dword [edi+RD_RB3D_CNTL], 0
call engRestore
mov edi, [ati_io]
mov eax, [edi+0x50]
mov ebx,3
shl ebx,20
not ebx
and eax,ebx
mov ebx, 2
shl ebx,20
or eax, ebx
mov [edi+0x50], eax
call r200_ShowCursor
mov [fnSelect], r200_SelectCursor
mov [fnSet], r200_SetCursor
xor eax, eax
inc eax
.fail:
ret
endp
if R500_HW2D
include 'r500hw.inc'
end if
align 4
proc init_r500
stdcall PciRead32, [bus], [devfn], dword 0x18
and eax, PCI_MEMORY_MASK
stdcall MapIoMem,eax,0x10000,(PG_SW+PG_NOCACHE)
test eax, eax
jz .fail
mov [ati_io], eax
mov [fnSelect], r500_SelectCursor
mov [fnSet], r500_SetCursor
rdr eax, 0x6110
mov [r500_LFB], eax
if R500_HW2D
call R5xx2DInit
end if
wrr 0x6410, 0x001F001F
wrr 0x6400, dword (3 shl 8)
xor eax, eax
inc eax
.fail:
ret
endp
align 4
drv_restore:
ret 8
align 4
proc r500_SelectCursor stdcall,hcursor:dword
mov esi, [hcursor]
mov edx, [esi+CURSOR.base]
sub edx, LFB_BASE
add edx, [r500_LFB]
wrr 0x6408, edx
mov eax, [esi+CURSOR.hot_x]
shl eax, 16
mov ax, word [esi+CURSOR.hot_y]
wrr 0x6418, eax
ret
endp
align 4
proc r500_SetCursor stdcall, hcursor:dword, x:dword, y:dword
pushfd
cli
mov esi, [hcursor]
mov edi, [ati_io]
mov eax, [x]
shl eax, 16
mov ax, word [y]
mov [edi+0x6414], eax
or dword [edi+0x6400], 1
popfd
ret
endp
align 4
r500_ShowCursor:
mov edi, [ati_io]
or dword [edi+0x6400], 1
ret
align 4
r200_ShowCursor:
mov edi, [ati_io]
mov eax, [edi+RD_CRTC_GEN_CNTL]
bts eax,16
mov [edi+RD_CRTC_GEN_CNTL], eax
ret
align 4
proc r200_SelectCursor stdcall,hcursor:dword
ret
endp
align 4
proc r200_SetCursor stdcall, hcursor:dword, x:dword, y:dword
pushfd
cli
xor eax, eax
xor edx, edx
mov esi, [hcursor]
mov ebx, [x]
mov ecx, [y]
sub ebx, [esi+CURSOR.hot_x]
jnc @F
neg ebx
mov eax, ebx
shl eax, 16
xor ebx, ebx
@@:
sub ecx, [esi+CURSOR.hot_y]
jnc @F
neg ecx
mov ax, cx
mov edx, ecx
xor ecx, ecx
@@:
or eax, 0x80000000
wrr CUR_HORZ_VERT_OFF, eax
shl ebx, 16
mov bx, cx
or ebx, 0x80000000
wrr CUR_HORZ_VERT_POSN, ebx
shl edx, 8
add edx, [esi+CURSOR.base]
sub edx, LFBAddress
wrr CUR_OFFSET, edx
popfd
ret
endp
align 4
proc video_alloc
pushfd
cli
mov ebx, [cursor_start]
mov ecx, [cursor_end]
.l1:
bsf eax,[ebx];
jnz .found
add ebx,4
cmp ebx, ecx
jb .l1
popfd
xor eax,eax
ret
.found:
btr [ebx], eax
popfd
mov [cursor_start],ebx
sub ebx, cursor_map
lea eax,[eax+ebx*8]
shl eax,14
add eax, LFBAddress+CURSOR_IMAGE_OFFSET
ret
endp
align 4
video_free:
pushfd
cli
sub eax, LFBAddress+CURSOR_IMAGE_OFFSET
shr eax, 14
mov ebx, cursor_map
bts [ebx], eax
shr eax, 3
and eax, not 3
add eax, ebx
cmp [cursor_start], eax
ja @f
popfd
ret
@@:
mov [cursor_start], eax
popfd
ret
; param
; eax= pid
; ebx= src
; ecx= flags
align 4
ati_cursor:
.src equ esp
.flags equ esp+4
.hcursor equ esp+8
sub esp, 4 ;space for .hcursor
push ecx
push ebx
mov ebx, eax
mov eax, CURSOR_SIZE
call CreateObject
test eax, eax
jz .fail
mov [.hcursor],eax
xor ebx, ebx
mov [eax+CURSOR.magic], 'CURS'
mov [eax+CURSOR.destroy], destroy_cursor
mov [eax+CURSOR.hot_x], ebx
mov [eax+CURSOR.hot_y], ebx
call video_alloc
mov edi, [.hcursor]
mov [edi+CURSOR.base], eax
mov esi, [.src]
mov ebx, [.flags]
cmp bx, LOAD_INDIRECT
je .indirect
movzx ecx, word [esi+10]
movzx edx, word [esi+12]
mov [edi+CURSOR.hot_x], ecx
mov [edi+CURSOR.hot_y], edx
stdcall ati_init_cursor, eax, esi
mov eax, [.hcursor]
.fail:
add esp, 12
ret
.indirect:
shr ebx, 16
movzx ecx, bh
movzx edx, bl
mov [edi+CURSOR.hot_x], ecx
mov [edi+CURSOR.hot_y], edx
mov edi, eax
mov ebx, eax
mov ecx, 64*64
xor eax,eax
cld
rep stosd
mov edi, ebx
mov esi, [.src]
mov ebx, 32
cld
@@:
mov ecx, 32
rep movsd
add edi, 128
dec ebx
jnz @B
mov eax, [.hcursor]
add esp, 12
ret
align 4
destroy_cursor:
push eax
mov eax, [eax+CURSOR.base]
call video_free
pop eax
call DestroyObject
ret
align 4
proc ati_init_cursor stdcall, dst:dword, src:dword
locals
rBase dd ?
pQuad dd ?
pBits dd ?
pAnd dd ?
width dd ?
height dd ?
counter dd ?
endl
mov esi, [src]
add esi,[esi+18]
mov eax,esi
cmp [esi+BI.biBitCount], 24
je .img_24
cmp [esi+BI.biBitCount], 8
je .img_8
cmp [esi+BI.biBitCount], 4
je .img_4
.img_2:
add eax, [esi]
mov [pQuad],eax
add eax,8
mov [pBits],eax
add eax, 128
mov [pAnd],eax
mov eax,[esi+4]
mov [width],eax
mov ebx,[esi+8]
shr ebx,1
mov [height],ebx
mov edi, pCursor
add edi, 32*31*4
mov [rBase],edi
mov esi,[pQuad]
.l21:
mov ebx, [pBits]
mov ebx, [ebx]
bswap ebx
mov eax, [pAnd]
mov eax, [eax]
bswap eax
mov [counter], 32
@@:
xor edx, edx
shl eax,1
setc dl
dec edx
xor ecx, ecx
shl ebx,1
setc cl
mov ecx, [esi+ecx*4]
and ecx, edx
and edx, 0xFF000000
or edx, ecx
mov [edi], edx
add edi, 4
dec [counter]
jnz @B
add [pBits], 4
add [pAnd], 4
mov edi,[rBase]
sub edi,128
mov [rBase],edi
sub [height],1
jnz .l21
jmp .copy
.img_4:
add eax, [esi]
mov [pQuad],eax
add eax,64
mov [pBits],eax
add eax, 0x200
mov [pAnd],eax
mov eax,[esi+4]
mov [width],eax
mov ebx,[esi+8]
shr ebx,1
mov [height],ebx
mov edi, pCursor
add edi, 32*31*4
mov [rBase],edi
mov esi,[pQuad]
mov ebx, [pBits]
.l4:
mov eax, [pAnd]
mov eax, [eax]
bswap eax
mov [counter], 16
@@:
xor edx, edx
shl eax,1
setc dl
dec edx
movzx ecx, byte [ebx]
and cl, 0xF0
shr ecx, 2
mov ecx, [esi+ecx]
and ecx, edx
and edx, 0xFF000000
or edx, ecx
mov [edi], edx
xor edx, edx
shl eax,1
setc dl
dec edx
movzx ecx, byte [ebx]
and cl, 0x0F
mov ecx, [esi+ecx*4]
and ecx, edx
and edx, 0xFF000000
or edx, ecx
mov [edi+4], edx
inc ebx
add edi, 8
dec [counter]
jnz @B
add [pAnd], 4
mov edi,[rBase]
sub edi,128
mov [rBase],edi
sub [height],1
jnz .l4
jmp .copy
.img_8:
add eax, [esi]
mov [pQuad],eax
add eax,1024
mov [pBits],eax
add eax, 1024
mov [pAnd],eax
mov eax,[esi+4]
mov [width],eax
mov ebx,[esi+8]
shr ebx,1
mov [height],ebx
mov edi, pCursor
add edi, 32*31*4
mov [rBase],edi
mov esi,[pQuad]
mov ebx, [pBits]
.l81:
mov eax, [pAnd]
mov eax, [eax]
bswap eax
mov [counter], 32
@@:
xor edx, edx
shl eax,1
setc dl
dec edx
movzx ecx, byte [ebx]
mov ecx, [esi+ecx*4]
and ecx, edx
and edx, 0xFF000000
or edx, ecx
mov [edi], edx
inc ebx
add edi, 4
dec [counter]
jnz @B
add [pAnd], 4
mov edi,[rBase]
sub edi,128
mov [rBase],edi
sub [height],1
jnz .l81
jmp .copy
.img_24:
add eax, [esi]
mov [pQuad],eax
add eax, 0xC00
mov [pAnd],eax
mov eax,[esi+BI.biWidth]
mov [width],eax
mov ebx,[esi+BI.biHeight]
shr ebx,1
mov [height],ebx
mov edi, pCursor
add edi, 32*31*4
mov [rBase],edi
mov esi,[pAnd]
mov ebx, [pQuad]
.row_24:
mov eax, [esi]
bswap eax
mov [counter], 32
@@:
xor edx, edx
shl eax,1
setc dl
dec edx
mov ecx, [ebx]
and ecx, 0x00FFFFFF
and ecx, edx
and edx, 0xFF000000
or edx, ecx
mov [edi], edx
add ebx, 3
add edi, 4
dec [counter]
jnz @B
add esi, 4
mov edi,[rBase]
sub edi,128
mov [rBase],edi
sub [height],1
jnz .row_24
.copy:
mov edi, [dst]
mov ecx, 64*64
xor eax,eax
rep stosd
mov esi, pCursor
mov edi, [dst]
mov ebx, 32
cld
@@:
mov ecx, 32
rep movsd
add edi, 128
dec ebx
jnz @B
ret
endp
align 4
proc engFlush
mov edi, [ati_io]
mov eax, [edi+RD_RB2D_DSTCACHE_CTLSTAT]
or eax,RD_RB2D_DC_FLUSH_ALL
mov [edi+RD_RB2D_DSTCACHE_CTLSTAT],eax
mov ecx, RD_TIMEOUT
@@:
mov eax,[edi+RD_RB2D_DSTCACHE_CTLSTAT]
and eax, RD_RB2D_DC_BUSY
jz .exit
sub ecx,1
jnz @B
.exit:
ret
endp
align 4
engWaitForFifo:
cnt equ bp+8
push ebp
mov ebp, esp
mov edi, [ati_io]
mov ecx, RD_TIMEOUT
@@:
mov eax, [edi+RD_RBBM_STATUS]
and eax, RD_RBBM_FIFOCNT_MASK
cmp eax, [ebp+8]
jae .exit
sub ecx,1
jmp @B
.exit:
leave
ret 4
align 4
proc engWaitForIdle
push dword 64
call engWaitForFifo
mov edi, [ati_io]
mov ecx ,RD_TIMEOUT
@@:
mov eax, [edi+RD_RBBM_STATUS]
and eax,RD_RBBM_ACTIVE
jz .exit
sub ecx,1
jnz @B
.exit:
call engFlush
ret
endp
align 4
proc engRestore
; push dword 1
; call engWaitForFifo
; mov dword [MMIO+RD_RB2D_DSTCACHE_MODE], 0
push dword 3
call engWaitForFifo
mov edi, [ati_io]
mov eax, [edi+RD_DISPLAY_BASE_ADDR]
shr eax, 10d
or eax,(64d shl 22d)
mov [edi+RD_DEFAULT_OFFSET],eax
mov [edi+RD_SRC_PITCH_OFFSET],eax
mov [edi+RD_DST_PITCH_OFFSET],eax
push dword 1
call engWaitForFifo
mov edi, [ati_io]
mov eax, [edi+RD_DP_DATATYPE]
btr eax, 29d
mov [edi+RD_DP_DATATYPE],eax
push dword 1
call engWaitForFifo
mov edi, [ati_io]
mov dword [edi+RD_DEFAULT_SC_BOTTOM_RIGHT],\
(RD_DEFAULT_SC_RIGHT_MAX or RD_DEFAULT_SC_BOTTOM_MAX)
push dword 1
call engWaitForFifo
mov edi, [ati_io]
mov dword [edi+RD_DP_GUI_MASTER_CNTL],\
(RD_GMC_BRUSH_SOLID_COLOR or \
RD_GMC_SRC_DATATYPE_COLOR or \
(6 shl RD_GMC_DST_DATATYPE_SHIFT) or \
RD_GMC_CLR_CMP_CNTL_DIS or \
RD_ROP3_P or \
RD_GMC_WR_MSK_DIS)
push dword 7
call engWaitForFifo
mov edi, [ati_io]
mov dword [edi+RD_DST_LINE_START],0
mov dword [edi+RD_DST_LINE_END], 0
mov dword [edi+RD_DP_BRUSH_FRGD_CLR], 808000ffh
mov dword [edi+RD_DP_BRUSH_BKGD_CLR], 002020ffh
mov dword [edi+RD_DP_SRC_FRGD_CLR], 808000ffh
mov dword [edi+RD_DP_SRC_BKGD_CLR], 004000ffh
mov dword [edi+RD_DP_WRITE_MASK],0ffffffffh
call engWaitForIdle
ret
endp
align 4
dword2str:
mov esi, hex_buff
mov ecx, -8
@@:
rol eax, 4
mov ebx, eax
and ebx, 0x0F
mov bl, [ebx+hexletters]
mov [8+esi+ecx], bl
inc ecx
jnz @B
ret
hexletters db '0123456789ABCDEF'
hex_buff db 8 dup(0),13,10,0
R200M equ 0x5a62 ;R300
R7000 equ 0x5159 ;R200
R750M equ 0x4c57 ;M7 mobile rv200
R8500 equ 0x514C ;R200
R9000 equ 0x4966 ;RV250
R9200 equ 0x5961 ;RV280
R9200SE equ 0x5964 ;RV280
R9500 equ 0x4144 ;R300
R9500P equ 0x4E45 ;R300
R9550 equ 0x4153 ;RV350
R9600 equ 0x4150 ;RV350
R9600XT equ 0x4152 ;RV360
R9700P equ 0x4E44 ;R300
R9800 equ 0x4E49 ;R350
R9800P equ 0x4E48 ;R350
R9800XT equ 0x4E4A ;R360
align 4
devices:
dd (R200M shl 16)+VID_ATI, init_r200 ;R300
dd (R7000 shl 16)+VID_ATI, init_r200
dd (R750M shl 16)+VID_ATI, init_r200 ;M7
dd (R8500 shl 16)+VID_ATI, init_r200
dd (R9000 shl 16)+VID_ATI, init_r200
dd (0x514D shl 16)+VID_ATI, init_r200 ;R200 9100
dd (R9200 shl 16)+VID_ATI, init_r200
dd (R9200SE shl 16)+VID_ATI, init_r200
dd (0x5960 shl 16)+VID_ATI, init_r200 ;RV280 9250
dd (R9500 shl 16)+VID_ATI, init_r200
dd (R9500P shl 16)+VID_ATI, init_r200
dd (R9550 shl 16)+VID_ATI, init_r200
dd (R9600 shl 16)+VID_ATI, init_r200
dd (R9600XT shl 16)+VID_ATI, init_r200
dd (0x4155 shl 16)+VID_ATI, init_r200 ;RV350 9600
dd (0x4151 shl 16)+VID_ATI, init_r200 ;RV350 9600
dd (0x4E51 shl 16)+VID_ATI, init_r200 ;RV350 9600
dd (R9700P shl 16)+VID_ATI, init_r200
dd (0x4148 shl 16)+VID_ATI, init_r200 ;R350 9800
dd (R9800 shl 16)+VID_ATI, init_r200
dd (R9800P shl 16)+VID_ATI, init_r200
dd (R9800XT shl 16)+VID_ATI, init_r200
dd (0x5B60 shl 16)+VID_ATI, init_r200 ;RV370 X300/X550
dd (0x5B63 shl 16)+VID_ATI, init_r200 ;RV370 X550
dd (0x5B62 shl 16)+VID_ATI, init_r200 ;RV380x X600
dd (0x3E50 shl 16)+VID_ATI, init_r200 ;RV380 X600/X550
dd (0x5B4F shl 16)+VID_ATI, init_r200 ;RV410 X700
dd (0x5B4D shl 16)+VID_ATI, init_r200 ;RV410 X700
dd (0x5B4B shl 16)+VID_ATI, init_r200 ;RV410 X700
dd (0x5B4C shl 16)+VID_ATI, init_r200 ;RV410 X700
dd (0x4a49 shl 16)+VID_ATI, init_r200 ;R420 X800 PRO/GTO
dd (0x4a4B shl 16)+VID_ATI, init_r200 ;R420 X800
dd (0x5549 shl 16)+VID_ATI, init_r200 ;R423 X800
dd (0x4a4A shl 16)+VID_ATI, init_r200 ;R420 X800
dd (0x554F shl 16)+VID_ATI, init_r200 ;R430 X800
dd (0x554D shl 16)+VID_ATI, init_r200 ;R430 X800
dd (0x554E shl 16)+VID_ATI, init_r200 ;R430 X800
dd (0x5D57 shl 16)+VID_ATI, init_r200 ;R423 X800 XT
dd (0x4A50 shl 16)+VID_ATI, init_r200 ;R420 X800 XT
dd (0x554A shl 16)+VID_ATI, init_r200 ;R423 X800 XT
dd (0x5D4F shl 16)+VID_ATI, init_r200 ;R423 X800/X850
dd (0x554B shl 16)+VID_ATI, init_r200 ;R423 X800 GT
dd (0x4B4B shl 16)+VID_ATI, init_r200 ;R481 X850
dd (0x4B49 shl 16)+VID_ATI, init_r200 ;R481 X850
dd (0x4B4C shl 16)+VID_ATI, init_r200 ;R481 X850
dd (0x5D4D shl 16)+VID_ATI, init_r200 ;R480 X850
dd (0x5D52 shl 16)+VID_ATI, init_r200 ;R480 X850
dd (0x7100 shl 16)+VID_ATI, init_r500 ;Radeon X1800
dd (0x7101 shl 16)+VID_ATI, init_r500 ;Mobility Radeon X1800 XT
dd (0x7102 shl 16)+VID_ATI, init_r500 ;Mobility Radeon X1800
dd (0x7103 shl 16)+VID_ATI, init_r500 ;Mobility FireGL V7200
dd (0x7104 shl 16)+VID_ATI, init_r500 ;FireGL V7200
dd (0x7105 shl 16)+VID_ATI, init_r500 ;FireGL V5300
dd (0x7106 shl 16)+VID_ATI, init_r500 ;Mobility FireGL V7100
dd (0x7108 shl 16)+VID_ATI, init_r500 ;Radeon X1800
dd (0x7109 shl 16)+VID_ATI, init_r500 ;Radeon X1800
dd (0x710A shl 16)+VID_ATI, init_r500 ;Radeon X1800
dd (0x710B shl 16)+VID_ATI, init_r500 ;Radeon X1800
dd (0x710C shl 16)+VID_ATI, init_r500 ;Radeon X1800
dd (0x710E shl 16)+VID_ATI, init_r500 ;FireGL V7300
dd (0x710F shl 16)+VID_ATI, init_r500 ;FireGL V7350
dd (0x7140 shl 16)+VID_ATI, init_r500 ;Radeon X1600/X1550
dd (0x7141 shl 16)+VID_ATI, init_r500 ;RV505
dd (0x7142 shl 16)+VID_ATI, init_r500 ;Radeon X1300/X1550
dd (0x7143 shl 16)+VID_ATI, init_r500 ;Radeon X1550
dd (0x7144 shl 16)+VID_ATI, init_r500 ;M54-GL
dd (0x7145 shl 16)+VID_ATI, init_r500 ;Mobility Radeon X1400
dd (0x7146 shl 16)+VID_ATI, init_r500 ;Radeon X1300/X1550
dd (0x7147 shl 16)+VID_ATI, init_r500 ;Radeon X1550 64-bit
dd (0x7149 shl 16)+VID_ATI, init_r500 ;Mobility Radeon X1300
dd (0x714A shl 16)+VID_ATI, init_r500 ;Mobility Radeon X1300
dd (0x714B shl 16)+VID_ATI, init_r500 ;Mobility Radeon X1300
dd (0x714C shl 16)+VID_ATI, init_r500 ;Mobility Radeon X1300
dd (0x714D shl 16)+VID_ATI, init_r500 ;Radeon X1300
dd (0x714E shl 16)+VID_ATI, init_r500 ;Radeon X1300
dd (0x714F shl 16)+VID_ATI, init_r500 ;RV505
dd (0x7151 shl 16)+VID_ATI, init_r500 ;RV505
dd (0x7152 shl 16)+VID_ATI, init_r500 ;FireGL V3300
dd (0x7153 shl 16)+VID_ATI, init_r500 ;FireGL V3350
dd (0x715E shl 16)+VID_ATI, init_r500 ;Radeon X1300
dd (0x715F shl 16)+VID_ATI, init_r500 ;Radeon X1550 64-bit
dd (0x7180 shl 16)+VID_ATI, init_r500 ;Radeon X1300/X1550
dd (0x7181 shl 16)+VID_ATI, init_r500 ;Radeon X1600
dd (0x7183 shl 16)+VID_ATI, init_r500 ;Radeon X1300/X1550
dd (0x7186 shl 16)+VID_ATI, init_r500 ;Mobility Radeon X1450
dd (0x7187 shl 16)+VID_ATI, init_r500 ;Radeon X1300/X1550
dd (0x7188 shl 16)+VID_ATI, init_r500 ;Mobility Radeon X2300
dd (0x718A shl 16)+VID_ATI, init_r500 ;Mobility Radeon X2300
dd (0x718B shl 16)+VID_ATI, init_r500 ;Mobility Radeon X1350
dd (0x718C shl 16)+VID_ATI, init_r500 ;Mobility Radeon X1350
dd (0x718D shl 16)+VID_ATI, init_r500 ;Mobility Radeon X1450
dd (0x718F shl 16)+VID_ATI, init_r500 ;Radeon X1300
dd (0x7193 shl 16)+VID_ATI, init_r500 ;Radeon X1550
dd (0x7196 shl 16)+VID_ATI, init_r500 ;Mobility Radeon X1350
dd (0x719B shl 16)+VID_ATI, init_r500 ;FireMV 2250
dd (0x719F shl 16)+VID_ATI, init_r500 ;Radeon X1550 64-bit
dd (0x71C0 shl 16)+VID_ATI, init_r500 ;Radeon X1600
dd (0x71C1 shl 16)+VID_ATI, init_r500 ;Radeon X1650
dd (0x71C2 shl 16)+VID_ATI, init_r500 ;Radeon X1600
dd (0x71C3 shl 16)+VID_ATI, init_r500 ;Radeon X1600
dd (0x71C4 shl 16)+VID_ATI, init_r500 ;Mobility FireGL V5200
dd (0x71C5 shl 16)+VID_ATI, init_r500 ;Mobility Radeon X1600
dd (0x71C6 shl 16)+VID_ATI, init_r500 ;Radeon X1650
dd (0x71C7 shl 16)+VID_ATI, init_r500 ;Radeon X1650
dd (0x71CD shl 16)+VID_ATI, init_r500 ;Radeon X1600
dd (0x71CE shl 16)+VID_ATI, init_r500 ;Radeon X1300 XT/X1600 Pro
dd (0x71D2 shl 16)+VID_ATI, init_r500 ;FireGL V3400
dd (0x71D4 shl 16)+VID_ATI, init_r500 ;Mobility FireGL V5250
dd (0x71D5 shl 16)+VID_ATI, init_r500 ;Mobility Radeon X1700
dd (0x71D6 shl 16)+VID_ATI, init_r500 ;Mobility Radeon X1700 XT
dd (0x71DA shl 16)+VID_ATI, init_r500 ;FireGL V5200
dd (0x71DE shl 16)+VID_ATI, init_r500 ;Mobility Radeon X1700
dd (0x7200 shl 16)+VID_ATI, init_r500 ;Radeon X2300HD
dd (0x7210 shl 16)+VID_ATI, init_r500 ;Mobility Radeon HD 2300
dd (0x7211 shl 16)+VID_ATI, init_r500 ;Mobility Radeon HD 2300
dd (0x7240 shl 16)+VID_ATI, init_r500 ;Radeon X1950
dd (0x7243 shl 16)+VID_ATI, init_r500 ;Radeon X1900
dd (0x7244 shl 16)+VID_ATI, init_r500 ;Radeon X1950
dd (0x7245 shl 16)+VID_ATI, init_r500 ;Radeon X1900
dd (0x7246 shl 16)+VID_ATI, init_r500 ;Radeon X1900
dd (0x7247 shl 16)+VID_ATI, init_r500 ;Radeon X1900
dd (0x7248 shl 16)+VID_ATI, init_r500 ;Radeon X1900
dd (0x7249 shl 16)+VID_ATI, init_r500 ;Radeon X1900
dd (0x724A shl 16)+VID_ATI, init_r500 ;Radeon X1900
dd (0x724B shl 16)+VID_ATI, init_r500 ;Radeon X1900
dd (0x724C shl 16)+VID_ATI, init_r500 ;Radeon X1900
dd (0x724D shl 16)+VID_ATI, init_r500 ;Radeon X1900
dd (0x724E shl 16)+VID_ATI, init_r500 ;AMD Stream Processor
dd (0x724F shl 16)+VID_ATI, init_r500 ;Radeon X1900
dd (0x7280 shl 16)+VID_ATI, init_r500 ;Radeon X1950
dd (0x7281 shl 16)+VID_ATI, init_r500 ;RV560
dd (0x7283 shl 16)+VID_ATI, init_r500 ;RV560
dd (0x7284 shl 16)+VID_ATI, init_r500 ;Mobility Radeon X1900
dd (0x7287 shl 16)+VID_ATI, init_r500 ;RV560
dd (0x7288 shl 16)+VID_ATI, init_r500 ;Radeon X1950 GT
dd (0x7289 shl 16)+VID_ATI, init_r500 ;RV570
dd (0x728B shl 16)+VID_ATI, init_r500 ;RV570
dd (0x728C shl 16)+VID_ATI, init_r500 ;ATI FireGL V7400
dd (0x7290 shl 16)+VID_ATI, init_r500 ;RV560
dd (0x7291 shl 16)+VID_ATI, init_r500 ;Radeon X1650
dd (0x7293 shl 16)+VID_ATI, init_r500 ;Radeon X1650
dd (0x7297 shl 16)+VID_ATI, init_r500 ;RV560
dd (0x791E shl 16)+VID_ATI, init_r500 ;Radeon X1200
dd (0x791F shl 16)+VID_ATI, init_r500 ;Radeon X1200
dd (0x793F shl 16)+VID_ATI, init_r500 ;Radeon Xpress 1200
dd (0x7941 shl 16)+VID_ATI, init_r500 ;Radeon Xpress 1200
dd (0x7942 shl 16)+VID_ATI, init_r500 ;Radeon Xpress 1200 (M)
dd (0x796C shl 16)+VID_ATI, init_r500 ;RS740
dd (0x796D shl 16)+VID_ATI, init_r500 ;RS740M
dd (0x796E shl 16)+VID_ATI, init_r500 ;ATI Radeon 2100 RS740
dd (0x796F shl 16)+VID_ATI, init_r500 ;RS740M
dd (0x9400 shl 16)+VID_ATI, init_r500 ;Radeon HD 2900 XT
dd (0x9401 shl 16)+VID_ATI, init_r500 ;Radeon HD 2900 XT
dd (0x9402 shl 16)+VID_ATI, init_r500 ;Radeon HD 2900 XT
dd (0x9403 shl 16)+VID_ATI, init_r500 ;Radeon HD 2900 Pro
dd (0x9405 shl 16)+VID_ATI, init_r500 ;Radeon HD 2900 GT
dd (0x940A shl 16)+VID_ATI, init_r500 ;FireGL V8650
dd (0x940B shl 16)+VID_ATI, init_r500 ;FireGL V8600
dd (0x940F shl 16)+VID_ATI, init_r500 ;FireGL V7600
dd (0x94C0 shl 16)+VID_ATI, init_r500 ;RV610
dd (0x94C1 shl 16)+VID_ATI, init_r500 ;Radeon HD 2400 XT
dd (0x94C3 shl 16)+VID_ATI, init_r500 ;Radeon HD 2400 Pro
dd (0x94C4 shl 16)+VID_ATI, init_r500 ;ATI Radeon HD 2400 PRO AGP
dd (0x94C5 shl 16)+VID_ATI, init_r500 ;FireGL V4000
dd (0x94C6 shl 16)+VID_ATI, init_r500 ;RV610
dd (0x94C7 shl 16)+VID_ATI, init_r500 ;ATI Radeon HD 2350
dd (0x94C8 shl 16)+VID_ATI, init_r500 ;Mobility Radeon HD 2400 XT
dd (0x94C9 shl 16)+VID_ATI, init_r500 ;Mobility Radeon HD 2400
dd (0x94CB shl 16)+VID_ATI, init_r500 ;ATI RADEON E2400
dd (0x94CC shl 16)+VID_ATI, init_r500 ;ATI Radeon HD 2400
dd (0x9500 shl 16)+VID_ATI, init_r500 ;RV670
dd (0x9501 shl 16)+VID_ATI, init_r500 ;ATI Radeon HD3870
dd (0x9504 shl 16)+VID_ATI, init_r500 ;ATI Mobility Radeon HD 3850
dd (0x9505 shl 16)+VID_ATI, init_r500 ;ATI Radeon HD3850
dd (0x9506 shl 16)+VID_ATI, init_r500 ;ATI Mobility Radeon HD 3850 X2
dd (0x9507 shl 16)+VID_ATI, init_r500 ;RV670
dd (0x9508 shl 16)+VID_ATI, init_r500 ;ATI Mobility Radeon HD 3870
dd (0x9509 shl 16)+VID_ATI, init_r500 ;ATI Mobility Radeon HD 3870 X2
dd (0x950F shl 16)+VID_ATI, init_r500 ;ATI Radeon HD3870 X2
dd (0x9511 shl 16)+VID_ATI, init_r500 ;ATI FireGL V7700
dd (0x9515 shl 16)+VID_ATI, init_r500 ;ATI Radeon HD 3850 AGP
dd (0x9517 shl 16)+VID_ATI, init_r500 ;ATI Radeon HD 3960
dd (0x9519 shl 16)+VID_ATI, init_r500 ;FireStream 9170
dd (0x9580 shl 16)+VID_ATI, init_r500 ;RV630
dd (0x9581 shl 16)+VID_ATI, init_r500 ;Mobility Radeon HD 2600
dd (0x9583 shl 16)+VID_ATI, init_r500 ;Mobility Radeon HD 2600 XT
dd (0x9586 shl 16)+VID_ATI, init_r500 ;ATI Radeon HD 2600 XT AGP
dd (0x9587 shl 16)+VID_ATI, init_r500 ;ATI Radeon HD 2600 Pro AGP
dd (0x9588 shl 16)+VID_ATI, init_r500 ;Radeon HD 2600 XT
dd (0x9589 shl 16)+VID_ATI, init_r500 ;Radeon HD 2600 Pro
dd (0x958A shl 16)+VID_ATI, init_r500 ;Gemini RV630
dd (0x958B shl 16)+VID_ATI, init_r500 ;Gemini ATI Mobility Radeon HD 2600 XT
dd (0x958C shl 16)+VID_ATI, init_r500 ;FireGL V5600
dd (0x958D shl 16)+VID_ATI, init_r500 ;FireGL V3600
dd (0x958E shl 16)+VID_ATI, init_r500 ;ATI Radeon HD 2600 LE
dd (0x958F shl 16)+VID_ATI, init_r500 ;ATI Mobility FireGL Graphics Processor
dd (0x9590 shl 16)+VID_ATI, init_r500 ;ATI Radeon HD 3600 Series
dd (0x9591 shl 16)+VID_ATI, init_r500 ;Mobility Radeon HD 3650
dd (0x9593 shl 16)+VID_ATI, init_r500 ;Mobility Radeon HD 3670
dd (0x9595 shl 16)+VID_ATI, init_r500 ;Mobility FireGL V5700
dd (0x9596 shl 16)+VID_ATI, init_r500 ;ATI Radeon HD 3650 AGP
dd (0x9597 shl 16)+VID_ATI, init_r500 ;ATI Radeon HD 3600 Series
dd (0x9598 shl 16)+VID_ATI, init_r500 ;ATI Radeon HD 3670
dd (0x9599 shl 16)+VID_ATI, init_r500 ;ATI Radeon HD 3600 Series
dd (0x959B shl 16)+VID_ATI, init_r500 ;Mobility FireGL Graphics Processor
dd (0x95C0 shl 16)+VID_ATI, init_r500 ;ATI Radeon HD 3470
dd (0x95C2 shl 16)+VID_ATI, init_r500 ;ATI Mobility Radeon HD 3430 (M82)
dd (0x95C4 shl 16)+VID_ATI, init_r500 ;Mobility Radeon HD 3400 Series (M82)
dd (0x95C5 shl 16)+VID_ATI, init_r500 ;ATI Radeon HD 3450
dd (0x95C7 shl 16)+VID_ATI, init_r500 ;ATI Radeon HD 3430
dd (0x95CC shl 16)+VID_ATI, init_r500 ;Fire PRO Professional Graphics ASIC
dd (0x95CD shl 16)+VID_ATI, init_r500 ;ATI FireMV 2450
dd (0x95CE shl 16)+VID_ATI, init_r500 ;ATI FireMV 2260
dd (0x95CF shl 16)+VID_ATI, init_r500 ;ATI FireMV 2260
dd (0x9610 shl 16)+VID_ATI, init_r500 ;ATI Radeon HD 3200 Graphics
dd (0x9611 shl 16)+VID_ATI, init_r500 ;ATI Radeon 3100 Graphics
dd (0x9612 shl 16)+VID_ATI, init_r500 ;ATI Radeon HD 3200 Graphics
dd (0x9613 shl 16)+VID_ATI, init_r500 ;ATI Radeon 3100 Graphics
dd (0x9614 shl 16)+VID_ATI, init_r500 ;ATI Radeon HD 3300 Graphics
dd (0x9440 shl 16)+VID_ATI, init_r500 ;ATI Radeon 4800 Series
dd (0x9441 shl 16)+VID_ATI, init_r500 ;ATI Radeon 4870 X2
dd (0x9442 shl 16)+VID_ATI, init_r500 ;ATI Radeon 4800 Series
dd (0x9444 shl 16)+VID_ATI, init_r500 ;Everest ATI FirePro Graphics Accelerator
dd (0x9446 shl 16)+VID_ATI, init_r500 ;K2 ATI FirePro Graphics Accelerator
dd (0x944E shl 16)+VID_ATI, init_r500 ;RV770
dd (0x9456 shl 16)+VID_ATI, init_r500 ;Denali ATI FirePro Graphics
dd 0 ;terminator
version dd (5 shl 16) or (API_VERSION and 0xFFFF)
if R500_HW2D
align 16
R5xxRops dd R5XX_ROP3_ZERO, R5XX_ROP3_ZERO ;GXclear
dd R5XX_ROP3_DSa, R5XX_ROP3_DPa ;Gxand
dd R5XX_ROP3_SDna, R5XX_ROP3_PDna ;GXandReverse
dd R5XX_ROP3_S, R5XX_ROP3_P ;GXcopy
dd R5XX_ROP3_DSna, R5XX_ROP3_DPna ;GXandInverted
dd R5XX_ROP3_D, R5XX_ROP3_D ;GXnoop
dd R5XX_ROP3_DSx, R5XX_ROP3_DPx ;GXxor
dd R5XX_ROP3_DSo, R5XX_ROP3_DPo ;GXor
dd R5XX_ROP3_DSon, R5XX_ROP3_DPon ;GXnor
dd R5XX_ROP3_DSxn, R5XX_ROP3_PDxn ;GXequiv
dd R5XX_ROP3_Dn, R5XX_ROP3_Dn ;GXinvert
dd R5XX_ROP3_SDno, R5XX_ROP3_PDno ;GXorReverse
dd R5XX_ROP3_Sn, R5XX_ROP3_Pn ;GXcopyInverted
dd R5XX_ROP3_DSno, R5XX_ROP3_DPno ;GXorInverted
dd R5XX_ROP3_DSan, R5XX_ROP3_DPan ;GXnand
dd R5XX_ROP3_ONE, R5XX_ROP3_ONE ;GXset
end if
sz_ati_srv db 'HWCURSOR',0
msgInit db 'detect hardware...',13,10,0
msgPCI db 'PCI accsess not supported',13,10,0
msgFail db 'device not found',13,10,0
msg_neg db 'neg ecx',13,10,0
if R500_HW2D
sz_HDraw_srv db 'HDRAW',0
msgR5xx2DFlushtimeout \
db 'R5xx2DFlush timeout error',13,10,0
msgR5xxFIFOWaitLocaltimeout \
db 'R5xxFIFOWaitLocal timeout error', 13, 10,0
msgR5xx2DIdleLocaltimeout \
db 'R5xx2DIdleLocal timeout error', 13,10,0
align 4
R520_cp_microcode:
dd 0x4200e000, 0000000000
dd 0x4000e000, 0000000000
dd 0x00000099, 0x00000008
dd 0x0000009d, 0x00000008
dd 0x4a554b4a, 0000000000
dd 0x4a4a4467, 0000000000
dd 0x55526f75, 0000000000
dd 0x4a7e7d65, 0000000000
dd 0xe0dae6f6, 0000000000
dd 0x4ac54a4a, 0000000000
dd 0xc8828282, 0000000000
dd 0xbf4acfc1, 0000000000
dd 0x87b04ad5, 0000000000
dd 0xb5838383, 0000000000
dd 0x4a0f85ba, 0000000000
dd 0x000ca000, 0x00000004
dd 0x000d0012, 0x00000038
dd 0x0000e8b4, 0x00000004
dd 0x000d0014, 0x00000038
dd 0x0000e8b6, 0x00000004
dd 0x000d0016, 0x00000038
dd 0x0000e854, 0x00000004
dd 0x000d0018, 0x00000038
dd 0x0000e855, 0x00000004
dd 0x000d001a, 0x00000038
dd 0x0000e856, 0x00000004
dd 0x000d001c, 0x00000038
dd 0x0000e857, 0x00000004
dd 0x000d001e, 0x00000038
dd 0x0000e824, 0x00000004
dd 0x000d0020, 0x00000038
dd 0x0000e825, 0x00000004
dd 0x000d0022, 0x00000038
dd 0x0000e830, 0x00000004
dd 0x000d0024, 0x00000038
dd 0x0000f0c0, 0x00000004
dd 0x000d0026, 0x00000038
dd 0x0000f0c1, 0x00000004
dd 0x000d0028, 0x00000038
dd 0x0000e000, 0x00000004
dd 0x000d002a, 0x00000038
dd 0x0000e000, 0x00000004
dd 0x000d002c, 0x00000038
dd 0x0000e000, 0x00000004
dd 0x000d002e, 0x00000038
dd 0x0000e000, 0x00000004
dd 0x000d0030, 0x00000038
dd 0x0000e000, 0x00000004
dd 0x000d0032, 0x00000038
dd 0x0000f180, 0x00000004
dd 0x000d0034, 0x00000038
dd 0x0000f393, 0x00000004
dd 0x000d0036, 0x00000038
dd 0x0000f38a, 0x00000004
dd 0x000d0038, 0x00000038
dd 0x0000f38e, 0x00000004
dd 0x0000e821, 0x00000004
dd 0x0140a000, 0x00000004
dd 0x00000043, 0x00000018
dd 0x00cce800, 0x00000004
dd 0x001b0001, 0x00000004
dd 0x08004800, 0x00000004
dd 0x001b0001, 0x00000004
dd 0x08004800, 0x00000004
dd 0x001b0001, 0x00000004
dd 0x08004800, 0x00000004
dd 0x0000003a, 0x00000008
dd 0x0000a000, 0000000000
dd 0x2000451d, 0x00000004
dd 0x0000e580, 0x00000004
dd 0x000ce581, 0x00000004
dd 0x08004580, 0x00000004
dd 0x000ce581, 0x00000004
dd 0x00000047, 0x00000008
dd 0x0000a000, 0000000000
dd 0x000c2000, 0x00000004
dd 0x0000e50e, 0x00000004
dd 0x00032000, 0x00000004
dd 0x00022051, 0x00000028
dd 0x00000051, 0x00000024
dd 0x0800450f, 0x00000004
dd 0x0000a04b, 0x00000008
dd 0x0000e565, 0x00000004
dd 0x0000e566, 0x00000004
dd 0x00000052, 0x00000008
dd 0x03cca5b4, 0x00000004
dd 0x05432000, 0x00000004
dd 0x00022000, 0x00000004
dd 0x4ccce05e, 0x00000030
dd 0x08274565, 0x00000004
dd 0x0000005e, 0x00000030
dd 0x08004564, 0x00000004
dd 0x0000e566, 0x00000004
dd 0x00000055, 0x00000008
dd 0x00802061, 0x00000010
dd 0x00202000, 0x00000004
dd 0x001b00ff, 0x00000004
dd 0x01000064, 0x00000010
dd 0x001f2000, 0x00000004
dd 0x001c00ff, 0x00000004
dd 0000000000, 0x0000000c
dd 0x00000072, 0x00000030
dd 0x00000055, 0x00000008
dd 0x0000e576, 0x00000004
dd 0x0000e577, 0x00000004
dd 0x0000e50e, 0x00000004
dd 0x0000e50f, 0x00000004
dd 0x0140a000, 0x00000004
dd 0x00000069, 0x00000018
dd 0x00c0e5f9, 0x000000c2
dd 0x00000069, 0x00000008
dd 0x0014e50e, 0x00000004
dd 0x0040e50f, 0x00000004
dd 0x00c0006c, 0x00000008
dd 0x0000e570, 0x00000004
dd 0x0000e571, 0x00000004
dd 0x0000e572, 0x0000000c
dd 0x0000a000, 0x00000004
dd 0x0140a000, 0x00000004
dd 0x0000e568, 0x00000004
dd 0x000c2000, 0x00000004
dd 0x00000076, 0x00000018
dd 0x000b0000, 0x00000004
dd 0x18c0e562, 0x00000004
dd 0x00000078, 0x00000008
dd 0x00c00077, 0x00000008
dd 0x000700c7, 0x00000004
dd 0x00000080, 0x00000038
dd 0x0000e5bb, 0x00000004
dd 0x0000e5bc, 0000000000
dd 0x0000a000, 0x00000004
dd 0x0000e821, 0x00000004
dd 0x0000e800, 0000000000
dd 0x0000e821, 0x00000004
dd 0x0000e82e, 0000000000
dd 0x02cca000, 0x00000004
dd 0x00140000, 0x00000004
dd 0x000ce1cc, 0x00000004
dd 0x050de1cd, 0x00000004
dd 0x00400000, 0x00000004
dd 0x0000008f, 0x00000018
dd 0x00c0a000, 0x00000004
dd 0x0000008c, 0x00000008
dd 0x00000091, 0x00000020
dd 0x4200e000, 0000000000
dd 0x00000098, 0x00000038
dd 0x000ca000, 0x00000004
dd 0x00140000, 0x00000004
dd 0x000c2000, 0x00000004
dd 0x00160000, 0x00000004
dd 0x700ce000, 0x00000004
dd 0x00140094, 0x00000008
dd 0x4000e000, 0000000000
dd 0x02400000, 0x00000004
dd 0x400ee000, 0x00000004
dd 0x02400000, 0x00000004
dd 0x4000e000, 0000000000
dd 0x000c2000, 0x00000004
dd 0x0240e51b, 0x00000004
dd 0x0080e50a, 0x00000005
dd 0x0080e50b, 0x00000005
dd 0x00220000, 0x00000004
dd 0x000700c7, 0x00000004
dd 0x000000a4, 0x00000038
dd 0x0080e5bd, 0x00000005
dd 0x0000e5bb, 0x00000005
dd 0x0080e5bc, 0x00000005
dd 0x00210000, 0x00000004
dd 0x02800000, 0x00000004
dd 0x00c000ab, 0x00000018
dd 0x4180e000, 0x00000040
dd 0x000000ad, 0x00000024
dd 0x01000000, 0x0000000c
dd 0x0100e51d, 0x0000000c
dd 0x000045bb, 0x00000004
dd 0x000080a7, 0x00000008
dd 0x0000f3ce, 0x00000004
dd 0x0140a000, 0x00000004
dd 0x00cc2000, 0x00000004
dd 0x08c053cf, 0x00000040
dd 0x00008000, 0000000000
dd 0x0000f3d2, 0x00000004
dd 0x0140a000, 0x00000004
dd 0x00cc2000, 0x00000004
dd 0x08c053d3, 0x00000040
dd 0x00008000, 0000000000
dd 0x0000f39d, 0x00000004
dd 0x0140a000, 0x00000004
dd 0x00cc2000, 0x00000004
dd 0x08c0539e, 0x00000040
dd 0x00008000, 0000000000
dd 0x03c00830, 0x00000004
dd 0x4200e000, 0000000000
dd 0x0000a000, 0x00000004
dd 0x200045e0, 0x00000004
dd 0x0000e5e1, 0000000000
dd 0x00000001, 0000000000
dd 0x000700c4, 0x00000004
dd 0x0800e394, 0000000000
dd 0000000000, 0000000000
dd 0x0000e8c4, 0x00000004
dd 0x0000e8c5, 0x00000004
dd 0x0000e8c6, 0x00000004
dd 0x0000e928, 0x00000004
dd 0x0000e929, 0x00000004
dd 0x0000e92a, 0x00000004
dd 0x000000c8, 0x00000008
dd 0x0000e928, 0x00000004
dd 0x0000e929, 0x00000004
dd 0x0000e92a, 0x00000004
dd 0x000000cf, 0x00000008
dd 0xdeadbeef, 0000000000
dd 0x00000116, 0000000000
dd 0x000700d3, 0x00000004
dd 0x080050e7, 0x00000004
dd 0x000700d4, 0x00000004
dd 0x0800401c, 0x00000004
dd 0x0000e01d, 0000000000
dd 0x02c02000, 0x00000004
dd 0x00060000, 0x00000004
dd 0x000000de, 0x00000034
dd 0x000000db, 0x00000008
dd 0x00008000, 0x00000004
dd 0xc000e000, 0000000000
dd 0x0000e1cc, 0x00000004
dd 0x0500e1cd, 0x00000004
dd 0x000ca000, 0x00000004
dd 0x000000e5, 0x00000034
dd 0x000000e1, 0x00000008
dd 0x0000a000, 0000000000
dd 0x0019e1cc, 0x00000004
dd 0x001b0001, 0x00000004
dd 0x0500a000, 0x00000004
dd 0x080041cd, 0x00000004
dd 0x000ca000, 0x00000004
dd 0x000000fb, 0x00000034
dd 0x0000004a, 0x00000008
dd 0000000000, 0000000000
dd 0000000000, 0000000000
dd 0000000000, 0000000000
dd 0000000000, 0000000000
dd 0000000000, 0000000000
dd 0000000000, 0000000000
dd 0000000000, 0000000000
dd 0000000000, 0000000000
dd 0000000000, 0000000000
dd 0x000c2000, 0x00000004
dd 0x001d0018, 0x00000004
dd 0x001a0001, 0x00000004
dd 0x000000fb, 0x00000034
dd 0x0000004a, 0x00000008
dd 0x0500a04a, 0x00000008
dd 0000000000, 0000000000
dd 0000000000, 0000000000
dd 0000000000, 0000000000
dd 0000000000, 0000000000
end if
if 0
msg6100 db '6100: ',0
msg6104 db '6104: ',0
msg6108 db '6108: ',0
msg6110 db '6110: ',0
msg6120 db '6120: ',0
msg6124 db '6124: ',0
msg6128 db '6128: ',0
msg612C db '612C: ',0
msg6130 db '6130: ',0
msg6134 db '6134: ',0
msg6138 db '6138: ',0
end if
buff db 8 dup(0)
db 13,10, 0
section '.data' data readable writable align 16
pCursor db 4096 dup(?)
cursor_map rd 2
cursor_start rd 1
cursor_end rd 1
fnSelect rd 1
fnSet rd 1
oldSelect rd 1
oldSet rd 1
oldRestore rd 1
oldCreate rd 1
r500_LFB rd 1
bus dd ?
devfn dd ?
ati_io dd ?
if R500_HW2D
__xmin rd 1
__xmax rd 1
__ymin rd 1
__ymax rd 1
rhd RHD
end if

/drivers/old/r500hw.inc
0,0 → 1,1272
if 0
Copyright 2008 Serge
The below code is a rework from code in
xf86-video-radeonhd/src/r5xx_accel.c, xf86-video-radeonhd/src/r5xx_xaa.c
git://anongit.freedesktop.org/git/nouveau/xf86-video-radeonhd
git://anongit.freedesktop.org/git/xorg/driver/xf86-video-ati
Copyright 2008 Luc Verhaegen <lverhaegen@novell.com>
Copyright 2008 Matthias Hopf <mhopf@novell.com>
Copyright 2008 Egbert Eich <eich@novell.com>
Copyright 2008 Advanced Micro Devices, Inc.
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
to deal in the Software without restriction, including without limitation
the rights to use, copy, modify, merge, publish, distribute, sublicense,
and/or sell copies of the Software, and to permit persons to whom the
Software is furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
OTHER DEALINGS IN THE SOFTWARE.
The below code is a rework from code in xf86-video-ati/src/radeon_accel.c
The original license is included below, it has the messed up disclaimer and
an all rights reserved statement.
Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
VA Linux Systems Inc., Fremont, California.
All Rights Reserved.
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
"Software"), to deal in the Software without restriction, including
without limitation on the rights to use, copy, modify, merge,
publish, distribute, sublicense, and/or sell copies of the Software,
and to permit persons to whom the Software is furnished to do so,
subject to the following conditions:
The above copyright notice and this permission notice (including the
next paragraph) shall be included in all copies or substantial
portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
NON-INFRINGEMENT. IN NO EVENT SHALL ATI, VA LINUX SYSTEMS AND/OR
THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
DEALINGS IN THE SOFTWARE.
Authors:
Kevin E. Martin <martin@xfree86.org>
Rickard E. Faith <faith@valinux.com>
Alan Hourihane <alanh@fairlite.demon.co.uk>
end if
RADEON_CP_ME_RAM_ADDR equ 0x07d4
RADEON_CP_ME_RAM_RADDR equ 0x07d8
RADEON_CP_ME_RAM_DATAH equ 0x07dc
RADEON_CP_ME_RAM_DATAL equ 0x07e0
RADEON_CP_RB_BASE equ 0x0700
RADEON_CP_RB_CNTL equ 0x0704
RADEON_RB_NO_UPDATE equ (1 shl 27)
RADEON_CP_RB_RPTR_ADDR equ 0x070c
RADEON_CP_RB_RPTR equ 0x0710
RADEON_CP_RB_WPTR equ 0x0714
RADEON_CP_CSQ_CNTL equ 0x0740
RADEON_CSQ_CNT_PRIMARY_MASK equ (0xff shl 0)
RADEON_CSQ_PRIDIS_INDDIS equ (0 shl 28)
RADEON_CSQ_PRIPIO_INDDIS equ (1 shl 28)
RADEON_CSQ_PRIBM_INDDIS equ (2 shl 28)
RADEON_CSQ_PRIPIO_INDBM equ (3 shl 28)
RADEON_CSQ_PRIBM_INDBM equ (4 shl 28)
RADEON_CSQ_PRIPIO_INDPIO equ (15 shl 28)
RADEON_CP_RB_WPTR_DELAY equ 0x0718
RADEON_SCRATCH_UMSK equ 0x0770
RADEON_SCRATCH_ADDR equ 0x0774
RADEON_ISYNC_CNTL equ 0x1724
RADEON_ISYNC_ANY2D_IDLE3D equ (1 shl 0)
RADEON_ISYNC_ANY3D_IDLE2D equ (1 shl 1)
RADEON_ISYNC_TRIG2D_IDLE3D equ (1 shl 2)
RADEON_ISYNC_TRIG3D_IDLE2D equ (1 shl 3)
RADEON_ISYNC_WAIT_IDLEGUI equ (1 shl 4)
RADEON_ISYNC_CPSCRATCH_IDLEGUI equ (1 shl 5)
RADEON_AIC_CNTL equ 0x01d0
RADEON_PCIGART_TRANSLATE_EN equ (1 shl 0)
RADEON_AIC_STAT equ 0x01d4
RADEON_AIC_PT_BASE equ 0x01d8
RADEON_AIC_LO_ADDR equ 0x01dc
RADEON_AIC_HI_ADDR equ 0x01e0
RADEON_AIC_TLB_ADDR equ 0x01e4
RADEON_AIC_TLB_DATA equ 0x01e8
RADEON_WAIT_UNTIL equ 0x1720
RADEON_WAIT_CRTC_PFLIP equ (1 shl 0)
RADEON_WAIT_2D_IDLE equ (1 shl 14)
RADEON_WAIT_3D_IDLE equ (1 shl 15)
RADEON_WAIT_2D_IDLECLEAN equ (1 shl 16)
RADEON_WAIT_3D_IDLECLEAN equ (1 shl 17)
RADEON_WAIT_HOST_IDLECLEAN equ (1 shl 18)
D1GRPH_PITCH equ 0x6120
D1GRPH_X_END equ 0x6134
D1GRPH_Y_END equ 0x6138
R5XX_DATATYPE_ARGB8888 equ 6
R5XX_RB3D_CNTL equ 0x1c3c
R5XX_RBBM_STATUS equ 0x0e40
R5XX_RBBM_FIFOCNT_MASK equ 0x007f
R5XX_RBBM_ACTIVE equ (1 shl 31)
R5XX_RBBM_SOFT_RESET equ 0x00f0
R5XX_SOFT_RESET_CP equ (1 shl 0)
R5XX_SOFT_RESET_HI equ (1 shl 1)
R5XX_SOFT_RESET_SE equ (1 shl 2)
R5XX_SOFT_RESET_RE equ (1 shl 3)
R5XX_SOFT_RESET_PP equ (1 shl 4)
R5XX_SOFT_RESET_E2 equ (1 shl 5)
R5XX_SOFT_RESET_RB equ (1 shl 6)
R5XX_SOFT_RESET_HDP equ (1 shl 7)
R5XX_SRC_PITCH_OFFSET equ 0x1428
R5XX_DST_PITCH_OFFSET equ 0x142c
R5XX_DP_DATATYPE equ 0x16c4
R5XX_HOST_BIG_ENDIAN_EN equ (1 shl 29)
R5XX_DP_CNTL equ 0x16c0
R5XX_DST_X_LEFT_TO_RIGHT equ (1 shl 0)
R5XX_DST_Y_TOP_TO_BOTTOM equ (1 shl 1)
R5XX_DP_DST_TILE_LINEAR equ (0 shl 3)
R5XX_DP_DST_TILE_MACRO equ (1 shl 3)
R5XX_DP_DST_TILE_MICRO equ (2 shl 3)
R5XX_DP_DST_TILE_BOTH equ (3 shl 3)
RADEON_RB3D_ZCACHE_CTLSTAT equ 0x3254
RADEON_RB3D_ZC_FLUSH equ (1 shl 0)
RADEON_RB3D_ZC_FREE equ (1 shl 2)
RADEON_RB3D_ZC_FLUSH_ALL equ 0x5
RADEON_RB3D_ZC_BUSY equ (1 shl 31)
R5XX_RB3D_DSTCACHE_CTLSTAT equ 0x325C
R5XX_RB3D_DC_FLUSH equ (3 shl 0)
R5XX_RB3D_DC_FREE equ (3 shl 2)
R5XX_RB3D_DC_FLUSH_ALL equ 0xf
R5XX_RB3D_DC_BUSY equ (1 shl 31)
R5XX_SURFACE_CNTL equ 0x0b00
R5XX_SURF_TRANSLATION_DIS equ (1 shl 8)
R5XX_NONSURF_AP0_SWP_16BPP equ (1 shl 20)
R5XX_NONSURF_AP0_SWP_32BPP equ (1 shl 21)
R5XX_NONSURF_AP1_SWP_16BPP equ (1 shl 22)
R5XX_NONSURF_AP1_SWP_32BPP equ (1 shl 23)
R5XX_DEFAULT_SC_BOTTOM_RIGHT equ 0x16e8
R5XX_DEFAULT_SC_RIGHT_MAX equ (0x1fff shl 0)
R5XX_DEFAULT_SC_BOTTOM_MAX equ (0x1fff shl 16)
R5XX_SC_TOP_LEFT equ 0x16ec
R5XX_SC_BOTTOM_RIGHT equ 0x16f0
R5XX_SC_SIGN_MASK_LO equ 0x8000
R5XX_SC_SIGN_MASK_HI equ 0x80000000
R5XX_DP_GUI_MASTER_CNTL equ 0x146c
R5XX_GMC_SRC_PITCH_OFFSET_CNTL equ (1 shl 0)
R5XX_GMC_DST_PITCH_OFFSET_CNTL equ (1 shl 1)
R5XX_GMC_SRC_CLIPPING equ (1 shl 2)
R5XX_GMC_DST_CLIPPING equ (1 shl 3)
R5XX_GMC_BRUSH_DATATYPE_MASK equ (0x0f shl 4)
R5XX_GMC_BRUSH_8X8_MONO_FG_BG equ (0 shl 4)
R5XX_GMC_BRUSH_8X8_MONO_FG_LA equ (1 shl 4)
R5XX_GMC_BRUSH_1X8_MONO_FG_BG equ (4 shl 4)
R5XX_GMC_BRUSH_1X8_MONO_FG_LA equ (5 shl 4)
R5XX_GMC_BRUSH_32x1_MONO_FG_BG equ (6 shl 4)
R5XX_GMC_BRUSH_32x1_MONO_FG_LA equ (7 shl 4)
R5XX_GMC_BRUSH_32x32_MONO_FG_BG equ (8 shl 4)
R5XX_GMC_BRUSH_32x32_MONO_FG_LA equ (9 shl 4)
R5XX_GMC_BRUSH_8x8_COLOR equ (10 shl 4)
R5XX_GMC_BRUSH_1X8_COLOR equ (12 shl 4)
R5XX_GMC_BRUSH_SOLID_COLOR equ (13 shl 4)
R5XX_GMC_BRUSH_NONE equ (15 shl 4)
R5XX_GMC_DST_8BPP_CI equ (2 shl 8)
R5XX_GMC_DST_15BPP equ (3 shl 8)
R5XX_GMC_DST_16BPP equ (4 shl 8)
R5XX_GMC_DST_24BPP equ (5 shl 8)
R5XX_GMC_DST_32BPP equ (6 shl 8)
R5XX_GMC_DST_8BPP_RGB equ (7 shl 8)
R5XX_GMC_DST_Y8 equ (8 shl 8)
R5XX_GMC_DST_RGB8 equ (9 shl 8)
R5XX_GMC_DST_VYUY equ (11 shl 8)
R5XX_GMC_DST_YVYU equ (12 shl 8)
R5XX_GMC_DST_AYUV444 equ (14 shl 8)
R5XX_GMC_DST_ARGB4444 equ (15 shl 8)
R5XX_GMC_DST_DATATYPE_MASK equ (0x0f shl 8)
R5XX_GMC_DST_DATATYPE_SHIFT equ 8
R5XX_GMC_SRC_DATATYPE_MASK equ (3 shl 12)
R5XX_GMC_SRC_DATATYPE_MONO_FG_BG equ (0 shl 12)
R5XX_GMC_SRC_DATATYPE_MONO_FG_LA equ (1 shl 12)
R5XX_GMC_SRC_DATATYPE_COLOR equ (3 shl 12)
R5XX_GMC_BYTE_PIX_ORDER equ (1 shl 14)
R5XX_GMC_BYTE_MSB_TO_LSB equ (0 shl 14)
R5XX_GMC_BYTE_LSB_TO_MSB equ (1 shl 14)
R5XX_GMC_CONVERSION_TEMP equ (1 shl 15)
R5XX_GMC_CONVERSION_TEMP_6500 equ (0 shl 15)
R5XX_GMC_CONVERSION_TEMP_9300 equ (1 shl 15)
R5XX_GMC_ROP3_MASK equ (0xff shl 16)
R5XX_DP_SRC_SOURCE_MASK equ (7 shl 24)
R5XX_DP_SRC_SOURCE_MEMORY equ (2 shl 24)
R5XX_DP_SRC_SOURCE_HOST_DATA equ (3 shl 24)
R5XX_GMC_3D_FCN_EN equ (1 shl 27)
R5XX_GMC_CLR_CMP_CNTL_DIS equ (1 shl 28)
R5XX_GMC_AUX_CLIP_DIS equ (1 shl 29)
R5XX_GMC_WR_MSK_DIS equ (1 shl 30)
R5XX_GMC_LD_BRUSH_Y_X equ (1 shl 31)
R5XX_ROP3_ZERO equ 0x00000000
R5XX_ROP3_DSa equ 0x00880000
R5XX_ROP3_SDna equ 0x00440000
R5XX_ROP3_S equ 0x00cc0000
R5XX_ROP3_DSna equ 0x00220000
R5XX_ROP3_D equ 0x00aa0000
R5XX_ROP3_DSx equ 0x00660000
R5XX_ROP3_DSo equ 0x00ee0000
R5XX_ROP3_DSon equ 0x00110000
R5XX_ROP3_DSxn equ 0x00990000
R5XX_ROP3_Dn equ 0x00550000
R5XX_ROP3_SDno equ 0x00dd0000
R5XX_ROP3_Sn equ 0x00330000
R5XX_ROP3_DSno equ 0x00bb0000
R5XX_ROP3_DSan equ 0x00770000
R5XX_ROP3_ONE equ 0x00ff0000
R5XX_ROP3_DPa equ 0x00a00000
R5XX_ROP3_PDna equ 0x00500000
R5XX_ROP3_P equ 0x00f00000
R5XX_ROP3_DPna equ 0x000a0000
R5XX_ROP3_D equ 0x00aa0000
R5XX_ROP3_DPx equ 0x005a0000
R5XX_ROP3_DPo equ 0x00fa0000
R5XX_ROP3_DPon equ 0x00050000
R5XX_ROP3_PDxn equ 0x00a50000
R5XX_ROP3_PDno equ 0x00f50000
R5XX_ROP3_Pn equ 0x000f0000
R5XX_ROP3_DPno equ 0x00af0000
R5XX_ROP3_DPan equ 0x005f0000
R5XX_HOST_PATH_CNTL equ 0x0130
R5XX_HDP_SOFT_RESET equ (1 shl 26)
R5XX_HDP_APER_CNTL equ (1 shl 23)
R5XX_RB3D_DSTCACHE_MODE equ 0x3258
R5XX_RB3D_DC_CACHE_ENABLE equ (0)
R5XX_RB3D_DC_2D_CACHE_DISABLE equ (1)
R5XX_RB3D_DC_3D_CACHE_DISABLE equ (2)
R5XX_RB3D_DC_CACHE_DISABLE equ (3)
R5XX_RB3D_DC_2D_CACHE_LINESIZE_128 equ (1 shl 2)
R5XX_RB3D_DC_3D_CACHE_LINESIZE_128 equ (2 shl 2)
R5XX_RB3D_DC_2D_CACHE_AUTOFLUSH equ (1 shl 8)
R5XX_RB3D_DC_3D_CACHE_AUTOFLUSH equ (2 shl 8)
R200_RB3D_DC_2D_CACHE_AUTOFREE equ (1 shl 10)
R200_RB3D_DC_3D_CACHE_AUTOFREE equ (2 shl 10)
R5XX_RB3D_DC_FORCE_RMW equ (1 shl 16)
R5XX_RB3D_DC_DISABLE_RI_FILL equ (1 shl 24)
R5XX_RB3D_DC_DISABLE_RI_READ equ (1 shl 25)
R5XX_BRUSH_Y_X equ 0x1474
R5XX_DP_BRUSH_BKGD_CLR equ 0x1478
R5XX_DP_BRUSH_FRGD_CLR equ 0x147c
R5XX_BRUSH_DATA0 equ 0x1480
R5XX_BRUSH_DATA1 equ 0x1484
R5XX_SRC_Y_X equ 0x1434
R5XX_DST_Y_X equ 0x1438
R5XX_DST_HEIGHT_WIDTH equ 0x143c
R5XX_DST_WIDTH_HEIGHT equ 0x1598
R5XX_DST_LINE_START equ 0x1600
R5XX_DST_LINE_END equ 0x1604
R5XX_DST_LINE_PATCOUNT equ 0x1608
R5XX_BRES_CNTL_SHIFT equ 8
R5XX_DP_SRC_BKGD_CLR equ 0x15dc
R5XX_DP_SRC_FRGD_CLR equ 0x15d8
R5XX_DP_WRITE_MASK equ 0x16cc
RADEON_CP_PACKET0 equ 0x00000000
struc RHD
{
.control rd 1
.control_saved rd 1
.datatype rd 1
.surface_cntl rd 1
.dst_pitch_offset rd 1
.ring_base rd 1
.ring_rp rd 1
.ring_wp rd 1
};
R5XX_LOOP_COUNT equ 2000000
align 4
R5xxFIFOWaitLocal:
mov ecx, R5XX_LOOP_COUNT
@@:
rdr ebx, R5XX_RBBM_STATUS
and ebx, R5XX_RBBM_FIFOCNT_MASK
cmp eax, ebx
jbe .done
loop @B
mov esi, msgR5xxFIFOWaitLocaltimeout
call SysMsgBoardStr
xor eax, eax
ret
.done:
mov eax, 1
ret
align 4
R5xxFIFOWait:
call R5xxFIFOWaitLocal
test eax, eax
jz .reset
ret
.reset:
call R5xx2DReset
call R5xx2DSetup
ret
; Wait for the graphics engine to be completely idle: the FIFO has
; drained, the Pixel Cache is flushed, and the engine is idle. This is
; a standard "sync" function that will make the hardware "quiescent".
align 4
R5xx2DIdleLocal:
mov ecx, R5XX_LOOP_COUNT
@@:
rdr eax, R5XX_RBBM_STATUS
and eax, R5XX_RBBM_FIFOCNT_MASK
cmp eax, 0x40
je @F
loop @B
mov esi, msgR5xx2DIdleLocaltimeout
call SysMsgBoardStr
xor eax, eax
ret
@@:
mov ecx, R5XX_LOOP_COUNT
@@:
rdr eax, R5XX_RBBM_STATUS
test eax, R5XX_RBBM_ACTIVE
jz .done
loop @B
mov esi, msgR5xx2DIdleLocaltimeout
call SysMsgBoardStr
xor eax, eax
ret
.done:
call R5xx2DFlush
ret
align 4
R5xx2DFlush:
rmask R5XX_RB3D_DSTCACHE_CTLSTAT, R5XX_RB3D_DC_FLUSH_ALL, R5XX_RB3D_DC_FLUSH_ALL
mov ecx, R5XX_LOOP_COUNT
@@:
rdr eax, R5XX_RB3D_DSTCACHE_CTLSTAT
test eax, R5XX_RB3D_DC_BUSY
jz .done
loop @B
.fail:
mov esi, msgR5xx2DFlushtimeout
call SysMsgBoardStr
xor eax, eax
ret
.done:
mov eax, 1
ret
align 4
proc R5xx2DReset
locals
save rd 1
tmp rd 1
endl
; The following RBBM_SOFT_RESET sequence can help un-wedge
; an R300 after the command processor got stuck.
rdr eax, R5XX_RBBM_SOFT_RESET
mov [save], eax
or eax, R5XX_SOFT_RESET_CP or \
R5XX_SOFT_RESET_HI or R5XX_SOFT_RESET_SE or \
R5XX_SOFT_RESET_RE or R5XX_SOFT_RESET_PP or \
R5XX_SOFT_RESET_E2 or R5XX_SOFT_RESET_RB
mov [tmp], eax
wrr R5XX_RBBM_SOFT_RESET, eax
rdr ebx, R5XX_RBBM_SOFT_RESET
and eax, not (R5XX_SOFT_RESET_CP or R5XX_SOFT_RESET_HI or \
R5XX_SOFT_RESET_SE or R5XX_SOFT_RESET_RE or \
R5XX_SOFT_RESET_PP or R5XX_SOFT_RESET_E2 or \
R5XX_SOFT_RESET_RB)
wrr R5XX_RBBM_SOFT_RESET, eax
rdr ebx, R5XX_RBBM_SOFT_RESET
mov eax, [save]
wrr R5XX_RBBM_SOFT_RESET, eax
rdr ebx, R5XX_RBBM_SOFT_RESET
call R5xx2DFlush
; Soft resetting HDP thru RBBM_SOFT_RESET register can cause some
; unexpected behaviour on some machines. Here we use
; R5XX_HOST_PATH_CNTL to reset it.
rdr edx, R5XX_HOST_PATH_CNTL
rdr ebx, R5XX_RBBM_SOFT_RESET
or ebx, R5XX_SOFT_RESET_CP or R5XX_SOFT_RESET_HI or R5XX_SOFT_RESET_E2
wrr R5XX_RBBM_SOFT_RESET, ebx
rdr eax, R5XX_RBBM_SOFT_RESET
wrr R5XX_RBBM_SOFT_RESET, 0
rdr ebx, R5XX_RB3D_DSTCACHE_MODE
or ebx, (1 shl 17)
wrr R5XX_RB3D_DSTCACHE_MODE, ebx
lea eax, [edx+R5XX_HDP_SOFT_RESET]
wrr R5XX_HOST_PATH_CNTL, eax
rdr ebx, R5XX_HOST_PATH_CNTL
wrr R5XX_HOST_PATH_CNTL, edx
ret
endp
align 4
R5xx2DSetup:
; Setup engine location. This shouldn't be necessary since we
; set them appropriately before any accel ops, but let's avoid
; random bogus DMA in case we inadvertently trigger the engine
; in the wrong place (happened).
mov eax, 2
call R5xxFIFOWaitLocal
mov eax, [rhd.dst_pitch_offset]
wrr R5XX_DST_PITCH_OFFSET, eax
wrr R5XX_SRC_PITCH_OFFSET, eax
mov eax, 1
call R5xxFIFOWaitLocal
rmask R5XX_DP_DATATYPE, 0, R5XX_HOST_BIG_ENDIAN_EN
mov eax, [rhd.surface_cntl]
wrr R5XX_SURFACE_CNTL, eax
mov eax, 1
call R5xxFIFOWaitLocal
wrr R5XX_DEFAULT_SC_BOTTOM_RIGHT,\
(R5XX_DEFAULT_SC_RIGHT_MAX or R5XX_DEFAULT_SC_BOTTOM_MAX)
mov eax, 1
call R5xxFIFOWaitLocal
mov eax, [rhd.control]
or eax, (R5XX_GMC_BRUSH_SOLID_COLOR or R5XX_GMC_SRC_DATATYPE_COLOR)
wrr R5XX_DP_GUI_MASTER_CNTL, eax
mov eax, 5
call R5xxFIFOWaitLocal
wrr R5XX_DP_BRUSH_FRGD_CLR, 0xFFFFFFFF
wrr R5XX_DP_BRUSH_BKGD_CLR, 0x00000000
wrr R5XX_DP_SRC_FRGD_CLR, 0xFFFFFFFF
wrr R5XX_DP_SRC_BKGD_CLR, 0x00000000
wrr R5XX_DP_WRITE_MASK, 0xFFFFFFFF
call R5xx2DIdleLocal
ret
align 4
R5xx2DPreInit:
mov [rhd.control],\
(R5XX_DATATYPE_ARGB8888 shl R5XX_GMC_DST_DATATYPE_SHIFT) or\
R5XX_GMC_CLR_CMP_CNTL_DIS or R5XX_GMC_DST_PITCH_OFFSET_CNTL
mov [rhd.datatype], R5XX_DATATYPE_ARGB8888
mov [rhd.surface_cntl],0
rdr eax, D1GRPH_PITCH
shl eax, 18
mov ebx, [r500_LFB]
shr ebx, 10
or eax, ebx
mov [rhd.dst_pitch_offset], eax
ret
RADEON_BUS_CNTL equ 0x0030
RADEON_BUS_MASTER_DIS equ (1 shl 6)
align 4
R5xxCpInit:
stdcall CreateRingBuffer, 0x8000, PG_SW+PG_NOCACHE
test eax, eax
jz .fail
mov [rhd.ring_base], eax
call GetPgAddr
wrr RADEON_CP_RB_BASE, eax
wrr RADEON_CP_RB_WPTR_DELAY, 0
rdr ebx, RADEON_CP_RB_RPTR
wrr RADEON_CP_RB_WPTR, ebx
mov [rhd.ring_rp], ebx
mov [rhd.ring_wp], ebx
wrr RADEON_CP_RB_RPTR_ADDR, 0 ;ring buffer read pointer
;no update
wrr RADEON_CP_RB_CNTL, RADEON_RB_NO_UPDATE + 12
wrr RADEON_SCRATCH_UMSK, 0 ;no scratch update
rdr ebx, RADEON_BUS_CNTL
and ebx, not RADEON_BUS_MASTER_DIS
wrr RADEON_BUS_CNTL, ebx
; wrr RADEON_LAST_FRAME_REG, 0
; wrr RADEON_LAST_DISPATCH_REG, 0
; wrr RADEON_LAST_CLEAR_REG, 0
call R5xx2DIdleLocal
wrr RADEON_ISYNC_CNTL, RADEON_ISYNC_ANY2D_IDLE3D + \
RADEON_ISYNC_ANY3D_IDLE2D + \
RADEON_ISYNC_WAIT_IDLEGUI + \
RADEON_ISYNC_CPSCRATCH_IDLEGUI
.fail:
ret
align 4
load_microcode:
pushfd
cli
call R5xx2DIdleLocal
wrr RADEON_CP_ME_RAM_ADDR, 0
lea esi, [R520_cp_microcode]
mov ecx, 256
@@:
mov eax, [esi]
mov ebx, [esi+4]
wrr RADEON_CP_ME_RAM_DATAH, ebx
wrr RADEON_CP_ME_RAM_DATAL, eax
add esi, 8
loop @B
popfd
ret
align 4
R5xx2DInit:
call R5xx2DPreInit
wrr R5XX_RB3D_CNTL, 0
call R5xx2DReset
call R5xx2DSetup
rdr eax, RADEON_AIC_CNTL ;disable GART
and eax, not RADEON_PCIGART_TRANSLATE_EN
wrr RADEON_AIC_CNTL, eax
call load_microcode
call R5xxCpInit
rdr eax, D1GRPH_X_END
rdr ebx, D1GRPH_Y_END
dec eax
dec ebx
mov [__xmin], 0 ;set clip
mov [__ymin], 0
mov [__xmax], eax
mov [__ymax], ebx
wrr RADEON_CP_CSQ_CNTL, RADEON_CSQ_PRIBM_INDBM
; BEGIN_RING
; RADEON_PURGE_CACHE
; RADEON_PURGE_ZCACHE
; RADEON_WAIT_UNTIL_IDLE
; COMMIT_RING
ret
proc R5xxSetupForSolidFill stdcall,color:dword, rop:dword, planemask:dword
mov edx, [rop]
mov edx, [R5xxRops+4+edx*8]
or edx, [rhd.control]
or edx, (R5XX_GMC_BRUSH_SOLID_COLOR or R5XX_GMC_SRC_DATATYPE_COLOR)
; Save for later clipping
mov [rhd.control_saved], edx
mov eax, 4
call R5xxFIFOWait
wrr R5XX_DP_GUI_MASTER_CNTL, edx
mov eax, [color]
wrr R5XX_DP_BRUSH_FRGD_CLR, eax
mov ebx, [planemask]
wrr R5XX_DP_WRITE_MASK, ebx
wrr R5XX_DP_CNTL, (R5XX_DST_X_LEFT_TO_RIGHT or R5XX_DST_Y_TOP_TO_BOTTOM)
ret
endp
align 4
proc R5xxSolidFillRect stdcall, x:dword, y:dword, w:dword, h:dword
mov eax, 3
call R5xxFIFOWait
mov eax, [rhd.dst_pitch_offset]
wrr R5XX_DST_PITCH_OFFSET, eax
mov ebx, [y]
shl ebx, 16
mov bx, word [x]
wrr R5XX_DST_Y_X, ebx
mov ecx, [w]
shl ecx, 16
mov cx, word [h]
wrr R5XX_DST_WIDTH_HEIGHT, ecx
ret
endp
handle equ IOCTL.handle
io_code equ IOCTL.io_code
input equ IOCTL.input
inp_size equ IOCTL.inp_size
output equ IOCTL.output
out_size equ IOCTL.out_size
SRV_GETVERSION equ 0
SOLID_FILL equ 1
LINE_2P equ 2
align 4
proc r500_entry stdcall, state:dword
.close:
; call r500_close
xor eax, eax
ret
endp
CURRENT_TASK equ (OS_BASE+0x0003000)
TASK_COUNT equ (OS_BASE+0x0003004)
WIN_STACK equ (OS_BASE+0x000C000)
align 4
proc r500_HDraw stdcall, ioctl:dword
mov ebx, [ioctl]
mov eax, [ebx+io_code]
cmp eax, LINE_2P
ja .fail
cmp eax, SRV_GETVERSION
jne @F
mov eax, [ebx+output]
cmp [ebx+out_size], 4
jne .fail
mov [eax], dword API_VERSION
xor eax, eax
ret
@@:
mov edx, [CURRENT_TASK]
movzx edx, word [WIN_STACK+edx*2]
cmp edx, [TASK_COUNT]
jne .skip ;skip if window inactive
cmp eax, SOLID_FILL
jne @F
cmp [ebx+inp_size], 5
jne .fail
mov esi, [ebx+input]
call solid_fill
.skip:
xor eax, eax
ret
@@:
cmp eax, LINE_2P
jne @F
cmp [ebx+inp_size], 5
jne .fail
mov esi, [ebx+input]
call solid_line
xor eax, eax
ret
@@:
.fail:
or eax, -1
ret
endp
restore handle
restore io_code
restore input
restore inp_size
restore output
restore out_size
struc FILL
{
.color rd 1
.x rd 1
.y rd 1
.w rd 1
.h rd 1
}
virtual at 0
FILL FILL
end virtual
struc LINE2P
{
.color rd 1
.x1 rd 1
.y1 rd 1
.x2 rd 1
.y2 rd 1
}
virtual at 0
LINE2P LINE2P
end virtual
GXcopy equ 3
RADEON_CP_PACKET3 equ 0xC0000000
PAINT_MULTI equ 0xC0009A00
DST_PITCH_OFFSET_CNTL equ ( 1 shl 1)
BRUSH_SOLID_COLOR equ ( 13 shl 4)
COLOR_ARGB equ ( 6 shl 8)
SRC_DATATYPE_COLOR equ ( 3 shl 12)
;RADEON_ROP3_P equ
; esi= input params
align 4
solid_fill:
mov ebx, [esi+FILL.x]
mov ecx, [esi+FILL.y]
mov eax, [esi+FILL.w]
mov edx, [esi+FILL.h]
lea eax, [eax+ebx-1] ;x2
lea edx, [edx+ecx-1] ;y2
push edx ;y2
push eax ;x2
mov eax, esp ;&x2
lea ebx, [esp+4] ;&y2
lea ecx, [esi+FILL.x]
lea edx, [esi+FILL.y]
push ebx ;&y2
push eax ;&x2
push edx ;&y1
push ecx ;&x1
call _BlockClip
add esp, 16
test eax, eax
jnz .exit
;mov edx, [R5xxRops+4+GXcopy*8]
;or edx, [rhd.control]
;or edx, (R5XX_GMC_BRUSH_SOLID_COLOR or R5XX_GMC_SRC_DATATYPE_COLOR)
pushfd
cli
BEGIN_RING
OUT_PACKET3 PAINT_MULTI, 4
OUT_RING (DST_PITCH_OFFSET_CNTL + \
BRUSH_SOLID_COLOR + \
COLOR_ARGB + \
SRC_DATATYPE_COLOR + \
(1 shl 28)+(1 shl 30) + \
R5XX_ROP3_P)
OUT_RING [rhd.dst_pitch_offset]
OUT_RING [esi+FILL.color]
mov ebx, [esi+FILL.y]
shl ebx, 16
mov bx, word [esi+FILL.x]
OUT_RING ebx
mov ecx, [esp+4] ;x2
sub ecx, [esi+FILL.x]
inc ecx ;w
mov eax, [esp+8] ;y2
sub eax, [esi+FILL.y]
inc eax ;h
shl ecx, 16
mov cx, ax ;w|h
OUT_RING ecx
COMMIT_RING
if 0
; mov eax, 7
; call R5xxFIFOWait
; wrr R5XX_DP_GUI_MASTER_CNTL, edx
; mov eax, [esi+FILL.color]
; wrr R5XX_DP_BRUSH_FRGD_CLR, eax
; wrr R5XX_DP_WRITE_MASK, 0xFFFFFFFF
; wrr R5XX_DP_CNTL, (R5XX_DST_X_LEFT_TO_RIGHT or R5XX_DST_Y_TOP_TO_BOTTOM)
; mov eax, [rhd.dst_pitch_offset]
; wrr R5XX_DST_PITCH_OFFSET, eax
; mov ebx, [esi+FILL.y]
; shl ebx, 16
; mov bx, word [esi+FILL.x]
; wrr R5XX_DST_Y_X, ebx
; mov ecx, [esp+4] ;x2
; sub ecx, [esi+FILL.x]
; inc ecx ;w
; mov eax, [esp+8] ;y2
; sub eax, [esi+FILL.y]
; inc eax ;h
; shl ecx, 16
; mov cx, ax ;w|h
; wrr R5XX_DST_WIDTH_HEIGHT, ecx
end if
popfd
.exit:
add esp, 8
ret
align 4
solid_line:
lea eax, [esi+LINE2P.y2]
lea ebx, [esi+LINE2P.x2]
lea ecx, [esi+LINE2P.y1]
lea edx, [esi+LINE2P.x1]
push eax
push ebx
push ecx
push edx
call _LineClip
add esp, 16
test eax, eax
jnz .exit
mov edx, [R5xxRops+4+GXcopy*8]
or edx, [rhd.control]
or edx, (R5XX_GMC_BRUSH_SOLID_COLOR or R5XX_GMC_SRC_DATATYPE_COLOR)
pushfd
cli
mov eax, 7
call R5xxFIFOWait
wrr R5XX_DST_LINE_PATCOUNT, (0x55 shl R5XX_BRES_CNTL_SHIFT)
wrr R5XX_DP_GUI_MASTER_CNTL, edx
mov eax, [esi+FILL.color]
wrr R5XX_DP_BRUSH_FRGD_CLR, eax
wrr R5XX_DP_WRITE_MASK, 0xFFFFFFFF
mov eax, [rhd.dst_pitch_offset]
wrr R5XX_DST_PITCH_OFFSET, eax
mov ebx, [esi+LINE2P.y1]
shl ebx, 16
mov bx, word [esi+LINE2P.x1]
wrr R5XX_DST_LINE_START, ebx
mov ecx, [esi+LINE2P.y2]
shl ecx, 16
mov cx, word [esi+LINE2P.x2]
wrr R5XX_DST_LINE_END, ecx
popfd
.exit:
ret
align 4
__L1OutCode:
cmp eax, [__xmin]
mov ecx, edx
setl dl
sal edx, 3
cmp eax, [__xmax]
jle L9
or edx, 4
L9:
cmp ecx, [__ymin]
jge L11
or edx, 1
L11:
cmp ecx, [__ymax]
jle L13
or edx, 2
L13:
movzx eax, dl
ret
align 4
_line_inter:
push ebp
mov ebp, edx
push edi
push esi
push ebx
sub esp, 4
mov ebx, [eax]
mov [esp], eax
mov edx, [esp+24]
mov edi, [ebp]
sub ecx, ebx
mov eax, ecx
sar eax, 31
sub edx, edi
mov esi, eax
xor esi, ecx
sub esi, eax
mov eax, [esp+28]
lea ecx, [edx+edx]
sub eax, ebx
cdq
xor eax, edx
sub eax, edx
imul ecx, eax
test ecx, ecx
jle L17
add ecx, esi
jmp L19
L17:
sub ecx, esi
L19:
lea edx, [esi+esi]
mov eax, ecx
mov ebx, edx
cdq
idiv ebx
lea eax, [eax+edi]
mov [ebp], eax
mov eax, [esp]
mov edx, [esp+28]
mov [eax], edx
pop eax
pop ebx
pop esi
pop edi
pop ebp
ret
_LineClip:
push ebp
push edi
push esi
push ebx
mov eax, [esp+24]
mov ecx, [esp+20]
mov ebp, [esp+28]
mov edi, [esp+32]
mov edx, [eax]
mov eax, [ecx]
call __L1OutCode
mov edx, [edi]
mov bl, al
mov eax, [ebp]
call __L1OutCode
L48:
mov esi, eax
L47:
mov eax, esi
and al, bl
jne L23
mov edx, esi
cmp bl, dl
je L23
test bl, bl
jne L26
movsx eax, dl
test al, 1
je L28
push [__ymin]
mov ecx, [esp+24]
push dword [ecx]
jmp L51
L28:
test al, 2
je L31
push [__ymax]
mov edx, [esp+24]
push dword [edx]
L51:
mov eax, [esp+32]
mov edx, ebp
mov ecx, [eax]
mov eax, edi
jmp L49
L31:
test al, 4
je L33
push [__xmax]
jmp L52
L33:
test al, 8
je L30
push [__xmin]
L52:
mov edx, [esp+28]
push dword [edx]
mov edx, edi
mov eax, [esp+28]
mov ecx, [eax]
mov eax, ebp
L49:
call _line_inter
pop esi
pop eax
L30:
mov edx, [edi]
mov eax, [ebp]
call __L1OutCode
jmp L48
L26:
movsx eax, bl
test al, 1
je L36
push [__ymin]
jmp L53
L36:
test al, 2
je L39
push [__ymax]
L53:
push dword [ebp]
mov ecx, [edi]
mov edx, [esp+28]
mov eax, [esp+32]
jmp L50
L39:
test al, 4
je L41
push [__xmax]
jmp L54
L41:
test al, 8
je L38
push [__xmin]
L54:
push dword [edi]
mov ecx, [ebp]
mov edx, [esp+32]
mov eax, [esp+28]
L50:
call _line_inter
pop edx
pop ecx
L38:
mov ecx, [esp+24]
mov edx, [ecx]
mov ecx, [esp+20]
mov eax, [ecx]
call __L1OutCode
mov bl, al
jmp L47
L23:
pop ebx
movsx eax, al
pop esi
pop edi
pop ebp
ret
align 4
_block_inter:
test cl, 1
push ebx
mov ebx, eax
je L57
mov eax, [__ymin]
jmp L66
L57:
test cl, 2
je L60
mov eax, [__ymax]
L66:
mov [edx], eax
jmp L65
L60:
test cl, 4
je L62
mov eax, [__xmax]
jmp L67
L62:
and cl, 8
je L65
mov eax, [__xmin]
L67:
mov [ebx], eax
L65:
pop ebx
ret
align 4
_BlockClip:
push ebp
push edi
push esi
push ebx
mov eax, [esp+24]
mov ecx, [esp+20]
mov ebp, [esp+28]
mov edi, [esp+32]
mov edx, [eax]
mov eax, [ecx]
call __L1OutCode
mov edx, [edi]
mov ebx, eax
mov eax, [ebp]
call __L1OutCode
L80:
mov esi, eax
L79:
test esi, ebx
jne L70
cmp ebx, esi
je L72
test ebx, ebx
jne L74
mov edx, edi
mov eax, ebp
mov ecx, esi
call _block_inter
mov edx, [edi]
mov eax, [ebp]
call __L1OutCode
jmp L80
L74:
mov edx, [esp+24]
mov ecx, ebx
mov eax, [esp+20]
call _block_inter
mov eax, [esp+24]
mov ecx, [esp+20]
mov edx, [eax]
mov eax, [ecx]
call __L1OutCode
mov ebx, eax
jmp L79
L72:
mov esi, ebx
L70:
mov eax, esi
and eax, ebx
pop ebx
cwde
pop esi
pop edi
pop ebp
ret