| 14,9 → 14,6 |
|---|
| include '../proc32.inc' |
| include '../imports.inc' |
| |
| OS_BASE equ 0x80000000 |
| SLOT_BASE equ OS_BASE+0x0080000 |
| |
| struc UHCI |
| { |
| .bus dd ? |
| 28,6 → 25,14 |
|---|
| .reset dd ? |
| .start dd ? |
| .stop dd ? |
| |
| .port_c_suspend dd ? |
| .resuming_ports dd ? |
| .rh_state dd ? |
| .rh_numports dd ? |
| .is_stopped dd ? |
| .dead dd ? |
| |
| .sizeof: |
| } |
| |
| 48,6 → 53,24 |
|---|
| IOCTL IOCTL |
| end virtual |
| |
| struc TD ;transfer descriptor |
| { |
| .link dd ? |
| .status dd ? |
| .token dd ? |
| .buffer dd ? |
| |
| .addr dd ? |
| .frame dd ? |
| .fd dd ? |
| .bk dd ? |
| .sizeof: |
| } |
| |
| virtual at 0 |
| TD TD |
| end virtual |
| |
| public START |
| public service_proc |
| public version |
| 209,6 → 232,7 |
|---|
| |
| stdcall uhci_reset, esi |
| |
| stdcall finish_reset, [uhci] |
| |
| .fail: |
| if DEBUG |
| 229,10 → 253,28 |
|---|
| UHCI_USBCMD_CONFIGURE equ 0x0040 ; Config Flag |
| UHCI_USBINTR_RESUME equ 0x0002 ; Resume interrupt enable |
| |
| PORTSC0 equ 0x10 |
| PORTSC1 equ 0x12 |
| |
| |
| UHCI_RH_RESET equ 0 |
| UHCI_RH_SUSPENDED equ 1 |
| UHCI_RH_AUTO_STOPPED equ 2 |
| UHCI_RH_RESUMING equ 3 |
| |
| ; In this state the HC changes from running to halted |
| ; so it can legally appear either way. |
| UHCI_RH_SUSPENDING equ 4 |
| |
| ; In the following states it's an error if the HC is halted. |
| ; These two must come last. |
| UHCI_RH_RUNNING equ 5 ; The normal state |
| UHCI_RH_RUNNING_NODEVS equ 6 ; Running with no devices |
| |
| UHCI_IS_STOPPED equ 9999 |
| |
| align 4 |
| proc uhci_reset stdcall, uhci:dword |
| |
| mov esi, [uhci] |
| stdcall PciRead16, [esi+UHCI.bus], [esi+UHCI.devfn], USB_LEGKEY |
| test eax, not (UHCI_USBLEGSUP_RO or UHCI_USBLEGSUP_RWC) |
| 248,6 → 290,11 |
|---|
| |
| test ax, UHCI_USBCMD_EGSM |
| jz .reset |
| |
| add edx, UHCI_USBINTR |
| in ax, dx |
| test ax, not UHCI_USBINTR_RESUME |
| jnz .reset |
| ret |
| .reset: |
| stdcall PciWrite16, [esi+UHCI.bus], [esi+UHCI.devfn], USB_LEGKEY, UHCI_USBLEGSUP_RWC |
| 263,15 → 310,76 |
|---|
| ret |
| endp |
| |
| proc finish_reset stdcall, uhci:dword |
| |
| DEVICE_ID equ 0x8086; pci device id |
| VENDOR_ID equ 0x24D4; device vendor id |
| mov esi, [uhci] |
| mov edx, [esi+UHCI.io_base] |
| add edx, PORTSC0 |
| xor eax, eax |
| out dx, ax |
| add edx, (PORTSC1-PORTSC0) |
| out dx, ax |
| |
| mov [esi+UHCI.port_c_suspend], eax |
| mov [esi+UHCI.resuming_ports], eax |
| mov [esi+UHCI.rh_state], UHCI_RH_RESET |
| mov [esi+UHCI.rh_numports], 2 |
| |
| mov [esi+UHCI.is_stopped], UHCI_IS_STOPPED |
| ; mov [ uhci_to_hcd(uhci)->state = HC_STATE_HALT; |
| ; uhci_to_hcd(uhci)->poll_rh = 0; |
| |
| mov [esi+UHCI.dead], eax ; Full reset resurrects the controller |
| |
| ret |
| endp |
| |
| proc insert_td stdcall, td:dword, frame:dword |
| |
| mov edi, [td] |
| mov eax, [frame] |
| and eax, -1024 |
| mov [edi+TD.frame], eax |
| |
| mov ebx, [framelist] |
| mov edx, [dma_framelist] |
| shl eax, 5 |
| |
| mov ecx, [eax+ebx] |
| test ecx, ecx |
| jz .empty |
| |
| mov ecx, [ecx+TD.bk] ;last TD |
| |
| mov edx, [ecx+TD.fd] |
| mov [edi+TD.fd], edx |
| mov [edi+TD.bk], ecx |
| mov [ecx+TD.fd], edi |
| mov [edx+TD.bk], edi |
| |
| mov eax, [ecx+TD.link] |
| mov [edi+TD.link], eax |
| mov ebx, [edi+TD.addr] |
| mov [ecx+TD.link], ebx |
| ret |
| .empty: |
| mov ecx, [eax+edx] |
| mov [edi+TD.link], ecx |
| mov [ebx+eax], edi |
| mov ecx, [edi+TD.addr] |
| mov [eax+edx], ecx |
| ret |
| endp |
| |
| DEVICE_ID equ 0x24D2 ; pci device id |
| VENDOR_ID equ 0x8086 ; device vendor id |
| QEMU_USB equ 0x7020 |
| |
| ;all initialized data place here |
| |
| align 4 |
| devices dd (DEVICE_ID shl 16)+VENDOR_ID |
| dd (QEMU_USB shl 16)+VENDOR_ID |
| dd 0 ;terminator |
| |
| version dd (5 shl 16) or (API_VERSION and 0xFFFF) |