| /kernel/trunk/bus/pci/pci32.inc |
|---|
| 680,8 → 680,7 |
| jmp .no_device |
| .has_device: |
| push eax |
| push sizeof.PCIDEV |
| pop eax |
| movi eax, sizeof.PCIDEV |
| call malloc |
| pop ecx |
| test eax, eax |
| /kernel/trunk/bus/usb/ehci.inc |
|---|
| 330,8 → 330,7 |
| ; 2b. Fill first 32 entries. |
| inc eax |
| inc eax ; set Type to EHCI_TYPE_QH |
| push 32 |
| pop ecx |
| movi ecx, 32 |
| mov edx, ecx |
| @@: |
| stosd |
| 434,14 → 433,12 |
| ; now edi = MMIOBase2 |
| ; 6. Transfer the controller to a known state. |
| ; 6b. Stop the controller if it is running. |
| push 10 |
| pop ecx |
| movi ecx, 10 |
| test dword [edi+EhciStatusReg], 1 shl 12 |
| jnz .stopped |
| and dword [edi+EhciCommandReg], not 1 |
| @@: |
| push 1 |
| pop esi |
| movi esi, 1 |
| call delay_ms |
| test dword [edi+EhciStatusReg], 1 shl 12 |
| jnz .stopped |
| 451,11 → 448,9 |
| .stopped: |
| ; 6c. Reset the controller. Wait up to 50 ms checking status every 1 ms. |
| or dword [edi+EhciCommandReg], 2 |
| push 50 |
| pop ecx |
| movi ecx, 50 |
| @@: |
| push 1 |
| pop esi |
| movi esi, 1 |
| call delay_ms |
| test dword [edi+EhciCommandReg], 2 |
| jz .reset_ok |
| 515,8 → 510,7 |
| test byte [esi+ehci_controller.StructuralParams-sizeof.ehci_controller], 10h |
| jz @f |
| push esi |
| push 20 |
| pop esi |
| movi esi, 20 |
| call delay_ms |
| pop esi |
| @@: |
| 676,8 → 670,7 |
| test al, 1 |
| jz .has_ownership |
| push esi |
| push 1 |
| pop esi |
| movi esi, 1 |
| call delay_ms |
| pop esi |
| dec dword [esp] |
| 862,8 → 855,7 |
| push eax ecx |
| sub edi, ehci_pipe.SoftwarePart |
| xor eax, eax |
| push ehci_pipe.SoftwarePart/4 |
| pop ecx |
| movi ecx, ehci_pipe.SoftwarePart/4 |
| rep stosd |
| pop ecx eax |
| ; 2. Setup PID in the first TD and make sure that the it is not active. |
| 883,8 → 875,7 |
| and eax, 3FFF0000h |
| ; Use 1 requests per microframe for control/bulk endpoints, |
| ; use value from the endpoint descriptor for periodic endpoints |
| push 1 |
| pop edx |
| movi edx, 1 |
| test [.type], 1 |
| jz @f |
| mov edx, [.maxpacket] |
| 1292,8 → 1283,7 |
| @@: |
| ; 3. Call the worker procedure to notify the protocol layer |
| ; about new EHCI device. It is high-speed. |
| push USB_SPEED_HS |
| pop eax |
| movi eax, USB_SPEED_HS |
| call ehci_new_device |
| test eax, eax |
| jnz .nothing |
| 1794,8 → 1784,7 |
| ; all corresponding bits are set. In this case, return some error code, |
| ; the order is quite arbitrary. |
| pop eax ; status |
| push USB_STATUS_UNDERRUN |
| pop ecx |
| movi ecx, USB_STATUS_UNDERRUN |
| test al, 40h ; not Halted? |
| jz .know_error |
| mov cl, USB_STATUS_OVERRUN |
| /kernel/trunk/bus/usb/hccommon.inc |
|---|
| 398,8 → 398,7 |
| jnc @f |
| or byte [esp], 1 shl CONTROL_PIPE |
| @@: |
| push 4 |
| pop edx |
| movi edx, 4 |
| call usb_process_one_wait_list |
| jnc @f |
| or byte [esp], 1 shl INTERRUPT_PIPE |
| /kernel/trunk/bus/usb/hub.inc |
|---|
| 253,8 → 253,7 |
| ; 2a. Save registers. |
| push edx |
| ; 2b. Call the allocator. |
| push 40 |
| pop eax |
| movi eax, 40 |
| call malloc |
| ; 2c. Restore registers. |
| pop ecx |
| /kernel/trunk/bus/usb/init.inc |
|---|
| 131,8 → 131,7 |
| proc create_usb_thread |
| ; 1. Create the thread. |
| push edi |
| push 1 |
| pop ebx |
| movi ebx, 1 |
| mov ecx, usb_thread_proc |
| xor edx, edx |
| call new_sys_threads |
| /kernel/trunk/bus/usb/ohci.inc |
|---|
| 351,8 → 351,7 |
| lea esi, [eax+ohci_controller.IntEDs+32*sizeof.ohci_static_ep] |
| call get_pg_addr |
| add eax, ohci_controller.IntEDs |
| push 32 |
| pop ecx |
| movi ecx, 32 |
| mov edx, ecx |
| @@: |
| stosd |
| 429,10 → 428,8 |
| ; 5c. Save FmInterval register. |
| pushd [edi+OhciFmIntervalReg] |
| ; 5d. Issue software reset and wait up to 10ms, checking status every 1 ms. |
| push 1 |
| pop ecx |
| push 10 |
| pop edx |
| movi ecx, 1 |
| movi edx, 10 |
| mov [edi+OhciCommandStatusReg], ecx |
| @@: |
| mov esi, ecx |
| 633,14 → 630,12 |
| ; (This should generate SMI, BIOS should release its ownership in SMI handler.) |
| mov dword [eax+OhciCommandStatusReg], 8 |
| ; 4c. Wait for result no more than 50 ms, checking for status every 1 ms. |
| push 50 |
| pop ecx |
| movi ecx, 50 |
| @@: |
| test dword [eax+OhciControlReg], edx |
| jz .has_ownership |
| push esi |
| push 1 |
| pop esi |
| movi esi, 1 |
| call delay_ms |
| pop esi |
| loop @b |
| 984,8 → 979,7 |
| ; if so, return an error. |
| lea edx, [esi + ohci_controller.IntEDs - sizeof.ohci_controller] |
| lea eax, [esi + ohci_controller.IntEDs + 32*sizeof.ohci_static_ep - sizeof.ohci_controller] |
| push 64 |
| pop ecx |
| movi ecx, 64 |
| call usb1_select_interrupt_list |
| test edx, edx |
| jz .return0 |
| /kernel/trunk/bus/usb/scheduler.inc |
|---|
| 206,8 → 206,7 |
| sub ecx, 3 |
| cmp ecx, 5 ; maximum 32ms |
| jbe @f |
| push 5 |
| pop ecx |
| movi ecx, 5 |
| @@: |
| ; There are four nested loops, |
| ; * Loop #4 (the innermost one) calculates the total periodic bandwidth |
| 221,10 → 220,8 |
| ; ebx = number of iterations of loop #1 |
| ; [esp] = delta of counter for loop #3, in bytes |
| ; [esp+4] = delta between the first group and the target group, in bytes |
| push 1 |
| pop ebx |
| push sizeof.ehci_static_ep |
| pop edx |
| movi ebx, 1 |
| movi edx, sizeof.ehci_static_ep |
| shl ebx, cl |
| shl edx, cl |
| mov eax, 64*sizeof.ehci_static_ep |
| 282,8 → 279,7 |
| ja @f |
| mov [.bandwidth], edi |
| mov [.target], edx |
| push 1 |
| pop eax |
| movi eax, 1 |
| shl eax, cl |
| mov [.targetsmask], eax |
| @@: |
| 317,8 → 313,7 |
| mov ecx, [.targetsmask] |
| add [edx+ehci_static_ep.Bandwidths+ecx*2], ax |
| add edx, ehci_static_ep.SoftwarePart |
| push 1 |
| pop eax |
| movi eax, 1 |
| shl eax, cl |
| pop edi ebx ; restore used registers to be stdcall |
| ret |
| 371,8 → 366,7 |
| end virtual |
| ; 10. Select the best variant. |
| ; edx = S-Mask = bitmask of scheduled microframes |
| push 0x11 |
| pop edx |
| movi edx, 0x11 |
| cmp ecx, 1 |
| ja @f |
| mov dl, 0x55 |
| /kernel/trunk/bus/usb/uhci.inc |
|---|
| 315,8 → 315,7 |
| ; 2b. Fill first 32 entries. |
| inc eax |
| inc eax ; set QH bit for uhci_pipe.NextQH |
| push 32 |
| pop ecx |
| movi ecx, 32 |
| mov edx, ecx |
| @@: |
| stosd |
| 416,12 → 415,10 |
| mov ax, 2 |
| out dx, ax |
| ; 5f. Wait up to 10ms. |
| push 10 |
| pop ecx |
| movi ecx, 10 |
| @@: |
| push esi |
| push 1 |
| pop esi |
| movi esi, 1 |
| call delay_ms |
| pop esi |
| in ax, dx |
| 435,8 → 432,7 |
| ; emergency variant for tests - always wait 10 ms |
| ; wait 10 ms |
| push esi |
| push 10 |
| pop esi |
| movi esi, 10 |
| call delay_ms |
| pop esi |
| ; clear reset signal |
| 998,8 → 994,7 |
| ; * if several non-fatal errors have occured during transaction retries, |
| ; all corresponding bits are set. In this case, return some error code, |
| ; the order is quite arbitrary. |
| push USB_STATUS_UNDERRUN |
| pop ecx |
| movi ecx, USB_STATUS_UNDERRUN |
| test al, 1 shl (22-16) ; not Stalled? |
| jz .know_error |
| mov cl, USB_STATUS_OVERRUN |
| 1260,8 → 1255,7 |
| ; 2. Status bits in UHCI are invalid during reset signalling. |
| ; Wait a millisecond while status bits become valid again. |
| push esi |
| push 1 |
| pop esi |
| movi esi, 1 |
| call delay_ms |
| pop esi |
| ; 3. ConnectStatus bit is zero during reset and becomes 1 during step 2; |
| 1458,8 → 1452,7 |
| ; if so, return an error. |
| lea edx, [esi + uhci_controller.IntEDs - sizeof.uhci_controller] |
| lea eax, [esi + uhci_controller.IntEDs + 32*sizeof.uhci_static_ep - sizeof.uhci_controller] |
| push 64 |
| pop ecx |
| movi ecx, 64 |
| call usb1_select_interrupt_list |
| test edx, edx |
| jz .return0 |