| 193,7 → 193,7 |
|---|
| result = rv770_send_msg_to_smc(rdev, PPSMC_MSG_TwoLevelsDisabled); |
| |
| if (result != PPSMC_Result_OK) |
| DRM_ERROR("Could not force DPM to low.\n"); |
| DRM_DEBUG("Could not force DPM to low.\n"); |
| |
| WREG32_P(GENERAL_PWRMGT, 0, ~GLOBAL_PWRMGT_EN); |
| |
| 231,6 → 231,7 |
|---|
| MC_CG_SEQ_DRAMCONF_S0 : MC_CG_SEQ_DRAMCONF_S1; |
| } |
| |
| #if 0 |
| int rv770_read_smc_soft_register(struct radeon_device *rdev, |
| u16 reg_offset, u32 *value) |
| { |
| 240,6 → 241,7 |
|---|
| pi->soft_regs_start + reg_offset, |
| value, pi->sram_end); |
| } |
| #endif |
| |
| int rv770_write_smc_soft_register(struct radeon_device *rdev, |
| u16 reg_offset, u32 value) |
| 1416,7 → 1418,7 |
|---|
| int rv770_set_sw_state(struct radeon_device *rdev) |
| { |
| if (rv770_send_msg_to_smc(rdev, PPSMC_MSG_SwitchToSwState) != PPSMC_Result_OK) |
| return -EINVAL; |
| DRM_DEBUG("rv770_set_sw_state failed\n"); |
| return 0; |
| } |
| |
| 2075,6 → 2077,7 |
|---|
| return 0; |
| } |
| |
| #if 0 |
| void rv770_dpm_reset_asic(struct radeon_device *rdev) |
| { |
| struct rv7xx_power_info *pi = rv770_get_pi(rdev); |
| 2087,6 → 2090,7 |
|---|
| if (pi->dcodt) |
| rv770_program_dcodt_after_state_switch(rdev, boot_ps, boot_ps); |
| } |
| #endif |
| |
| void rv770_dpm_setup_asic(struct radeon_device *rdev) |
| { |
| 2488,6 → 2492,50 |
|---|
| } |
| } |
| |
| u32 rv770_dpm_get_current_sclk(struct radeon_device *rdev) |
| { |
| struct radeon_ps *rps = rdev->pm.dpm.current_ps; |
| struct rv7xx_ps *ps = rv770_get_ps(rps); |
| struct rv7xx_pl *pl; |
| u32 current_index = |
| (RREG32(TARGET_AND_CURRENT_PROFILE_INDEX) & CURRENT_PROFILE_INDEX_MASK) >> |
| CURRENT_PROFILE_INDEX_SHIFT; |
| |
| if (current_index > 2) { |
| return 0; |
| } else { |
| if (current_index == 0) |
| pl = &ps->low; |
| else if (current_index == 1) |
| pl = &ps->medium; |
| else /* current_index == 2 */ |
| pl = &ps->high; |
| return pl->sclk; |
| } |
| } |
| |
| u32 rv770_dpm_get_current_mclk(struct radeon_device *rdev) |
| { |
| struct radeon_ps *rps = rdev->pm.dpm.current_ps; |
| struct rv7xx_ps *ps = rv770_get_ps(rps); |
| struct rv7xx_pl *pl; |
| u32 current_index = |
| (RREG32(TARGET_AND_CURRENT_PROFILE_INDEX) & CURRENT_PROFILE_INDEX_MASK) >> |
| CURRENT_PROFILE_INDEX_SHIFT; |
| |
| if (current_index > 2) { |
| return 0; |
| } else { |
| if (current_index == 0) |
| pl = &ps->low; |
| else if (current_index == 1) |
| pl = &ps->medium; |
| else /* current_index == 2 */ |
| pl = &ps->high; |
| return pl->mclk; |
| } |
| } |
| |
| void rv770_dpm_fini(struct radeon_device *rdev) |
| { |
| int i; |