| 400,8 → 400,14 |
|---|
| r = rs400_gart_enable(rdev); |
| if (r) |
| return r; |
| |
| /* allocate wb buffer */ |
| r = radeon_wb_init(rdev); |
| if (r) |
| return r; |
| |
| /* Enable IRQ */ |
| // r100_irq_set(rdev); |
| r100_irq_set(rdev); |
| rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); |
| /* 1M ring buffer */ |
| r = r100_cp_init(rdev, 1024 * 1024); |
| 409,11 → 415,11 |
|---|
| dev_err(rdev->dev, "failed initializing CP (%d).\n", r); |
| return r; |
| } |
| // r = r100_ib_init(rdev); |
| // if (r) { |
| // dev_err(rdev->dev, "failled initializing IB (%d).\n", r); |
| // return r; |
| // } |
| r = r100_ib_init(rdev); |
| if (r) { |
| dev_err(rdev->dev, "failed initializing IB (%d).\n", r); |
| return r; |
| } |
| return 0; |
| } |
| |
| 462,12 → 468,12 |
|---|
| /* initialize memory controller */ |
| rs400_mc_init(rdev); |
| /* Fence driver */ |
| // r = radeon_fence_driver_init(rdev); |
| // if (r) |
| // return r; |
| // r = radeon_irq_kms_init(rdev); |
| // if (r) |
| // return r; |
| r = radeon_fence_driver_init(rdev); |
| if (r) |
| return r; |
| r = radeon_irq_kms_init(rdev); |
| if (r) |
| return r; |
| /* Memory manager */ |
| r = radeon_bo_init(rdev); |
| if (r) |