| 356,6 → 356,7 |
|---|
| rdev->mc.vram_location = G_00015C_MC_FB_START(tmp) << 16; |
| rdev->mc.gtt_location = 0xFFFFFFFFUL; |
| r = radeon_mc_setup(rdev); |
| rdev->mc.igp_sideport_enabled = radeon_combios_sideport_present(rdev); |
| if (r) |
| return r; |
| return 0; |
| 395,6 → 396,7 |
|---|
| return r; |
| /* Enable IRQ */ |
| // r100_irq_set(rdev); |
| rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); |
| /* 1M ring buffer */ |
| // r = r100_cp_init(rdev, 1024 * 1024); |
| // if (r) { |
| 452,6 → 454,8 |
|---|
| |
| /* Initialize clocks */ |
| radeon_get_clock_info(rdev->ddev); |
| /* Initialize power management */ |
| radeon_pm_init(rdev); |
| /* Get vram informations */ |
| rs400_vram_info(rdev); |
| /* Initialize memory controller (also test AGP) */ |